corrected FPGA copy loop

This commit is contained in:
Markus Fröschle
2012-10-31 14:28:27 +00:00
parent b87eaa8b7f
commit b3f023c229

View File

@@ -83,7 +83,7 @@ void init_fpga(void)
MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK;
MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK;
}
} while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) || (fpga_data < (uint8_t *) FPGA_FLASH_DATA_END));
} while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) && (fpga_data < (uint8_t *) FPGA_FLASH_DATA_END));
if (fpga_data < (uint8_t *) FPGA_FLASH_DATA_END)
{