removed locked MMU pages
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@@ -230,110 +230,6 @@ void mmu_init(void)
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/* clear all MMU TLB entries */
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MCF_MMU_MMUOR = MCF_MMU_MMUOR_CA;
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/* create locked TLB entries */
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/*
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* 0x0000'0000 - 0x000F'FFFF (first MB of physical memory) locked virtual = physical
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*/
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MCF_MMU_MMUTR = 0x0 | /* virtual address */
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MCF_MMU_MMUTR_SG | /* shared global */
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MCF_MMU_MMUTR_V; /* valid */
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MCF_MMU_MMUDR = 0x0 | /* physical address */
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MCF_MMU_MMUDR_SZ(0) | /* 1 MB page size */
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MCF_MMU_MMUDR_CM(0x1) | /* cacheable, copyback */
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MCF_MMU_MMUDR_R | /* read access enable */
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MCF_MMU_MMUDR_W | /* write access enable */
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MCF_MMU_MMUDR_X | /* execute access enable */
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MCF_MMU_MMUDR_LK; /* lock entry */
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MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */
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MCF_MMU_MMUOR_UAA; /* update allocation address field */
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MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | /* instruction */
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MCF_MMU_MMUOR_ACC | /* access TLB */
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MCF_MMU_MMUOR_UAA; /* update allocation address field */
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/*
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* 0x00d0'0000 - 0x00df'ffff (last megabyte of ST RAM = Falcon video memory) locked ID = 6
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* mapped to physical address 0x60d0'0000 (FPGA video memory)
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* video RAM: read write execute normal write true
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*/
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MCF_MMU_MMUTR = 0x00d00000 | /* virtual address */
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#if defined(MACHINE_FIREBEE)
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MCF_MMU_MMUTR_ID(SCA_PAGE_ID) |
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#endif /* MACHINE_FIREBEE */
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MCF_MMU_MMUTR_SG | /* shared global */
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MCF_MMU_MMUTR_V; /* valid */
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#if defined(MACHINE_FIREBEE)
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/* map FPGA video memory for FireBee only */
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MCF_MMU_MMUDR = 0x60d00000 | /* physical address */
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#elif defined(MACHINE_M5484LITE)
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MCF_MMU_MMUDR = 0x00d00000 | /* physical address */
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#endif /* MACHINE_FIREBEE */
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MCF_MMU_MMUDR_SZ(0) | /* 1 MB page size */
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MCF_MMU_MMUDR_CM(0x0) | /* cachable writethrough */
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/* caveat: can't be supervisor protected since TOS puts the application stack there! */
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//MCF_MMU_MMUDR_SP | /* supervisor protect */
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MCF_MMU_MMUDR_R | /* read access enable */
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MCF_MMU_MMUDR_W | /* write access enable */
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MCF_MMU_MMUDR_X | /* execute access enable */
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MCF_MMU_MMUDR_LK; /* lock entry */
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MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */
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MCF_MMU_MMUOR_UAA; /* update allocation address field */
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MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | /* instruction */
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MCF_MMU_MMUOR_ACC | /* access TLB */
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MCF_MMU_MMUOR_UAA; /* update allocation address field */
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#if defined(MACHINE_FIREBEE)
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video_tlb = 0x2000; /* set page as video page */
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video_sbt = 0x0; /* clear time */
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#endif /* MACHINE_FIREBEE */
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#if MACHINE_FIREBEE
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/*
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* Map FireBee I/O area (0xfff0'0000 - 0xffff'ffff physical) to the Falcon-compatible I/O
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* area (0x00f0'0000 - 0x00ff'ffff virtual) for the FireBee
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*/
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MCF_MMU_MMUTR = 0x00f00000 | /* virtual address */
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MCF_MMU_MMUTR_SG | /* shared global */
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MCF_MMU_MMUTR_V; /* valid */
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MCF_MMU_MMUDR = 0xfff00000 | /* physical address */
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MCF_MMU_MMUDR_SZ(0) | /* 1 MB page size */
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MCF_MMU_MMUDR_CM(0x2) | /* nocache precise */
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MCF_MMU_MMUDR_SP | /* supervisor protect */
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MCF_MMU_MMUDR_R | /* read access enable */
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MCF_MMU_MMUDR_W | /* write access enable */
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MCF_MMU_MMUDR_X | /* execute access enable */
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MCF_MMU_MMUDR_LK; /* lock entry */
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MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */
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MCF_MMU_MMUOR_UAA; /* update allocation address field */
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MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | /* instruction */
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MCF_MMU_MMUOR_ACC | /* access TLB */
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MCF_MMU_MMUOR_UAA; /* update allocation address field */
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#endif /* MACHINE_FIREBEE */
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/*
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* Map (locked) the very last MB of physical SDRAM (this is where the driver buffers reside) to the same
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* virtual address. Used uncached for drivers.
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*/
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MCF_MMU_MMUTR = (SDRAM_START + SDRAM_SIZE - 0x00100000) | /* virtual address */
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MCF_MMU_MMUTR_SG | /* shared global */
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MCF_MMU_MMUTR_V; /* valid */
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MCF_MMU_MMUDR = (SDRAM_START + SDRAM_SIZE - 0x00100000) | /* physical address */
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MCF_MMU_MMUDR_SZ(0) | /* 1 MB page size */
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MCF_MMU_MMUDR_CM(0x2) | /* nocache precise */
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MCF_MMU_MMUDR_SP | /* supervisor protect */
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MCF_MMU_MMUDR_R | /* read access enable */
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MCF_MMU_MMUDR_W | /* write access enable */
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//MCF_MMU_MMUDR_X | /* execute access enable */
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MCF_MMU_MMUDR_LK; /* lock entry */
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MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */
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MCF_MMU_MMUOR_UAA; /* update allocation address field */
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MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | /* instruction */
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MCF_MMU_MMUOR_ACC | /* access TLB */
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MCF_MMU_MMUOR_UAA; /* update allocation address field */
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}
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