forked from Firebee/FPGA_Config
7 lines
167 B
VHDL
7 lines
167 B
VHDL
altddio_out1_inst : altddio_out1 PORT MAP (
|
|
datain_h => datain_h_sig,
|
|
datain_l => datain_l_sig,
|
|
outclock => outclock_sig,
|
|
dataout => dataout_sig
|
|
);
|