forked from Firebee/FPGA_Config
248 lines
18 KiB
Plaintext
248 lines
18 KiB
Plaintext
Simulator report for firebee1
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Fri Mar 10 13:17:46 2017
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Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
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; Table of Contents ;
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---------------------
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1. Legal Notice
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2. Simulator Summary
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3. Simulator Settings
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4. Simulation Waveforms
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5. |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ALTSYNCRAM
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6. |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ALTSYNCRAM
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7. |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ALTSYNCRAM
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8. |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ALTSYNCRAM
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9. |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|ALTSYNCRAM
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10. |firebee1|Video:Fredi_Aschwanden|BLITTER:BLITTER|altsyncram0:$00000|altsyncram:altsyncram_component|altsyncram_3on1:auto_generated|ALTSYNCRAM
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11. |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ALTSYNCRAM
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12. |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ALTSYNCRAM
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13. |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ALTSYNCRAM
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14. |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ALTSYNCRAM
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15. |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ALTSYNCRAM
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16. |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ALTSYNCRAM
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17. |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4|altsyncram_46r:auto_generated|ALTSYNCRAM
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18. |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ALTSYNCRAM
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19. |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ALTSYNCRAM
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20. Coverage Summary
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21. Complete 1/0-Value Coverage
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22. Missing 1-Value Coverage
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23. Missing 0-Value Coverage
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24. Simulator INI Usage
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25. Simulator Messages
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 1991-2010 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Altera Program License
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Subscription Agreement, Altera MegaCore Function License
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Agreement, or other applicable license agreement, including,
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without limitation, that your use is for the sole purpose of
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programming logic devices manufactured by Altera and sold by
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Altera or its authorized distributors. Please refer to the
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applicable agreement for further details.
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+-------------------+
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; Simulator Summary ;
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+------+------------+
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; Type ; Value ;
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+------+------------+
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+---------------------------------------------------------------------------------------------------------------------------+
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; Simulator Settings ;
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+--------------------------------------------------------------------------------------------+--------------+---------------+
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; Option ; Setting ; Default Value ;
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+--------------------------------------------------------------------------------------------+--------------+---------------+
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; Simulation mode ; Timing ; Timing ;
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; Start time ; 0 ns ; 0 ns ;
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; End time ; 2 us ; ;
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; Simulation results format ; CVWF ; ;
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; Vector input source ; firebee1.vwf ; ;
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; Add pins automatically to simulation output waveforms ; Off ; On ;
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; Check outputs ; Off ; Off ;
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; Report simulation coverage ; On ; On ;
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; Display complete 1/0 value coverage report ; On ; On ;
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; Display missing 1-value coverage report ; On ; On ;
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; Display missing 0-value coverage report ; On ; On ;
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; Detect setup and hold time violations ; Off ; Off ;
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; Detect glitches ; Off ; Off ;
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; Disable timing delays in Timing Simulation ; Off ; Off ;
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; Generate Signal Activity File ; Off ; Off ;
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; Generate VCD File for PowerPlay Power Analyzer ; Off ; Off ;
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; Group bus channels in simulation results ; Off ; Off ;
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; Preserve fewer signal transitions to reduce memory requirements ; On ; On ;
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; Trigger vector comparison with the specified mode ; INPUT_EDGE ; INPUT_EDGE ;
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; Disable setup and hold time violations detection in input registers of bi-directional pins ; Off ; Off ;
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; Overwrite Waveform Inputs With Simulation Outputs ; Off ; ;
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; Perform Glitch Filtering in Timing Simulation ; Auto ; Auto ;
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; Interconnect Delay Model Type ; Transport ; Transport ;
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; Cell Delay Model Type ; Transport ; Transport ;
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+--------------------------------------------------------------------------------------------+--------------+---------------+
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+----------------------+
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; Simulation Waveforms ;
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+----------------------+
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Waveform report data cannot be output to ASCII.
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Please use Quartus II to view the waveform report data.
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+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo1:WRF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_3fh1:auto_generated|altsyncram_ci31:fifo_ram|ALTSYNCRAM ;
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+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+-----------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ALTSYNCRAM ;
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+-----------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+------------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ALTSYNCRAM ;
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+------------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+-------------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM55|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ALTSYNCRAM ;
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+-------------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|dcfifo0:RDF|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_0hh1:auto_generated|altsyncram_bi31:fifo_ram|ALTSYNCRAM ;
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+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+-----------------------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|Video:Fredi_Aschwanden|BLITTER:BLITTER|altsyncram0:$00000|altsyncram:altsyncram_component|altsyncram_3on1:auto_generated|ALTSYNCRAM ;
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+-----------------------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+----------------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_GREEN|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ALTSYNCRAM ;
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+----------------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+---------------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_BLUE|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ALTSYNCRAM ;
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+---------------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+--------------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|Video:Fredi_Aschwanden|altdpram1:FALCON_CLUT_RED|altsyncram:altsyncram_component|altsyncram_lf92:auto_generated|ALTSYNCRAM ;
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+--------------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+----------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|Video:Fredi_Aschwanden|altdpram0:ST_CLUT_RED|altsyncram:altsyncram_component|altsyncram_rb92:auto_generated|ALTSYNCRAM ;
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+----------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+-------------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM54|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ALTSYNCRAM ;
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+-------------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+-----------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|Video:Fredi_Aschwanden|altdpram2:ACP_CLUT_RAM|altsyncram:altsyncram_component|altsyncram_pf92:auto_generated|ALTSYNCRAM ;
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+-----------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|altpll_reconfig1:inst7|altpll_reconfig1_pllrcfg_t4q:altpll_reconfig1_pllrcfg_t4q_component|altsyncram:altsyncram4|altsyncram_46r:auto_generated|ALTSYNCRAM ;
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+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+-------------------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|Video:Fredi_Aschwanden|lpm_fifo_dc0:inst|dcfifo:dcfifo_component|dcfifo_8fi1:auto_generated|altsyncram_tl31:fifo_ram|ALTSYNCRAM ;
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+-------------------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
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; |firebee1|Video:Fredi_Aschwanden|lpm_fifoDZ:inst63|scfifo:scfifo_component|scfifo_lk21:auto_generated|a_dpfifo_oq21:dpfifo|altsyncram_gj81:FIFOram|ALTSYNCRAM ;
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+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
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Please refer to fitter text-based report (*.fit.rpt) to view logical memory report content in ASCII.
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+------------------+
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; Coverage Summary ;
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+------+-----------+
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; Type ; Value ;
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+------+-----------+
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The following table displays output ports that toggle between 1 and 0 during simulation.
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+-------------------------------------------------+
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; Complete 1/0-Value Coverage ;
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+-----------+------------------+------------------+
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; Node Name ; Output Port Name ; Output Port Type ;
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+-----------+------------------+------------------+
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The following table displays output ports that do not toggle to 1 during simulation.
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+-------------------------------------------------+
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; Missing 1-Value Coverage ;
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+-----------+------------------+------------------+
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; Node Name ; Output Port Name ; Output Port Type ;
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+-----------+------------------+------------------+
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The following table displays output ports that do not toggle to 0 during simulation.
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+-------------------------------------------------+
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; Missing 0-Value Coverage ;
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+-----------+------------------+------------------+
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; Node Name ; Output Port Name ; Output Port Type ;
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+-----------+------------------+------------------+
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+---------------------+
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; Simulator INI Usage ;
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+--------+------------+
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; Option ; Usage ;
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+--------+------------+
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+--------------------+
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; Simulator Messages ;
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+--------------------+
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Info: *******************************************************************
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Info: Running Quartus II Simulator
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Info: Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
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Info: Processing started: Fri Mar 10 13:17:43 2017
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Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off firebeei1 -c firebee1
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Info: Can't find specified vector source file "C:/FireBee/FPGA/firebee1.vwf"
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Warning: Can't display state machine states -- register holding state machine bit "|firebee1|FalconIO_SDCard_IDE_CF:Wolfgang_Foerster_and_Fredi_Aschwanden|WF1772IP_TOP_SOC:I_FDC|WF1772IP_TRANSCEIVER:I_TRANSCEIVER|MFM_STATE.A_00" was synthesized away
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Error: No valid vector source file specified and default file "C:/FireBee/FPGA/firebee1.cvwf" does not exist
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Error: Quartus II Simulator was unsuccessful. 1 error, 1 warning
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Error: Peak virtual memory: 241 megabytes
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Error: Processing ended: Fri Mar 10 13:17:46 2017
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Error: Elapsed time: 00:00:03
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Error: Total CPU time (on all processors): 00:00:03
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