forked from Firebee/FPGA_Config
315 lines
11 KiB
Plaintext
315 lines
11 KiB
Plaintext
-- WARNING: Do NOT edit the input and output ports in this file in a text
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-- editor if you plan to continue editing the block that represents it in
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-- the Block Editor! File corruption is VERY likely to occur.
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-- Copyright (C) 1991-2010 Altera Corporation
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-- Your use of Altera Corporation's design tools, logic functions
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-- and other software and tools, and its AMPP partner logic
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-- functions, and any output files from any of the foregoing
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-- (including device programming or simulation files), and any
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-- associated documentation or information are expressly subject
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-- to the terms and conditions of the Altera Program License
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-- Subscription Agreement, Altera MegaCore Function License
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-- Agreement, or other applicable license agreement, including,
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-- without limitation, that your use is for the sole purpose of
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-- programming logic devices manufactured by Altera and sold by
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-- Altera or its authorized distributors. Please refer to the
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-- applicable agreement for further details.
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-- Generated by Quartus II Version 9.1 (Build Build 350 03/24/2010)
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-- Created on Sat Jan 15 11:06:17 2011
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INCLUDE "lpm_bustri_WORD.inc";
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INCLUDE "VIDEO/BLITTER/lpm_clshift0.INC";
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INCLUDE "VIDEO/BLITTER/altsyncram0.INC";
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CONSTANT BL_SKEW_LF = 255;
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-- Title Statement (optional)
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TITLE "Blitter";
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-- Parameters Statement (optional)
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-- {{ALTERA_PARAMETERS_BEGIN}} DO NOT REMOVE THIS LINE!
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-- {{ALTERA_PARAMETERS_END}} DO NOT REMOVE THIS LINE!
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-- Subdesign Section
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SUBDESIGN BLITTER
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(
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-- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
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nRSTO : INPUT;
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MAIN_CLK : INPUT;
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FB_ALE : INPUT;
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nFB_WR : INPUT;
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nFB_OE : INPUT;
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FB_SIZE0 : INPUT;
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FB_SIZE1 : INPUT;
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VIDEO_RAM_CTR[15..0] : INPUT;
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BLITTER_ON : INPUT;
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FB_ADR[31..0] : INPUT;
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nFB_CS1 : INPUT;
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nFB_CS2 : INPUT;
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nFB_CS3 : INPUT;
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DDRCLK0 : INPUT;
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BLITTER_DIN[127..0] : INPUT;
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BLITTER_DACK[4..0] : INPUT;
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SR_BLITTER_DACK : INPUT;
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BLITTER_RUN : OUTPUT;
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BLITTER_DOUT[127..0] : OUTPUT;
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BLITTER_ADR[31..0] : OUTPUT;
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BLITTER_SIG : OUTPUT;
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BLITTER_WR : OUTPUT;
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BLITTER_TA : OUTPUT;
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FB_AD[31..0] : BIDIR;
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-- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
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)
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VARIABLE
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FB_B[3..0] :NODE;
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FB_16B[1..0] :NODE;
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BLITTER_CS :NODE;
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BL_BUSY :NODE;
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BL_HRAM_CS :NODE;
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BL_HRAM_ADR[3..0] :NODE;
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BL_HRAM_OUT[15..0] :NODE;
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BL_HRAM_BE[1..0] :NODE;
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BL_SRC_X_INC_CS :NODE;
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BL_SRC_X_INC[15..0] :DFFE;
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BL_SRC_Y_INC_CS :NODE;
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BL_SRC_Y_INC[15..0] :DFFE;
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BL_ENDMASK1_CS :NODE;
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BL_ENDMASK1[15..0] :DFFE;
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BL_ENDMASK2_CS :NODE;
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BL_ENDMASK2[15..0] :DFFE;
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BL_ENDMASK3_CS :NODE;
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BL_ENDMASK3[15..0] :DFFE;
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BL_SRC_ADRH_CS :NODE;
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BL_SRC_ADRL_CS :NODE;
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BL_SRC_ADR[31..0] :DFFE;
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BL_DST_X_INC_CS :NODE;
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BL_DST_X_INC[15..0] :DFFE;
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BL_DST_Y_INC_CS :NODE;
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BL_DST_Y_INC[15..0] :DFFE;
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BL_DST_ADRH_CS :NODE;
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BL_DST_ADRL_CS :NODE;
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BL_DST_ADR[31..0] :DFFE;
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BL_X_CNT_CS :NODE;
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BL_X_CNT[15..0] :DFFE;
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BL_Y_CNT_CS :NODE;
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BL_Y_CNT[15..0] :DFFE;
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BL_HT_OP_CS :NODE;
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BL_HT_OP[7..0] :DFFE;
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BL_LC_OP[7..0] :DFFE;
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BL_LN_CS :NODE;
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BL_LN[7..0] :DFFE;
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BL_SKEW[7..0] :DFFE;
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BL_SKEW_EXT[6..0] :NODE;
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BL_SKEW_IN[255..0] :DFFE;
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BL_SKEW_OUT[255..0] :NODE;
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BL_DATA_DDR_READY :DFF; -- 1 WENN DATEN GESCHRIEBEN ODER LESBAR
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BL_READ_SRC :DFFE;
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BL_DST_BUFFER[127..0] :DFFE;
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BL_READ_DST :DFFE;
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HOP_OUT[127..0] :NODE;
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COUNT[18..0] :DFF;
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BEGIN
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-- BYT SELECT 32 BIT
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FB_B0 = FB_ADR[1..0]==0; -- ADR==0
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FB_B1 = FB_ADR[1..0]==1 -- ADR==1
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# FB_SIZE1 & !FB_SIZE0 & !FB_ADR1 -- HIGH WORD
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# FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE
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FB_B2 = FB_ADR[1..0]==2 -- ADR==2
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# FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE
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FB_B3 = FB_ADR[1..0]==3 -- ADR==3
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# FB_SIZE1 & !FB_SIZE0 & FB_ADR1 -- LOW WORD
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# FB_SIZE1 & FB_SIZE0 # !FB_SIZE1 & !FB_SIZE0; -- LONG UND LINE
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-- BYT SELECT 16 BIT
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FB_16B0 = FB_ADR[0]==0; -- ADR==0
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FB_16B1 = FB_ADR[0]==1 -- ADR==1
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# !(!FB_SIZE1 & FB_SIZE0); -- NOT BYT
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-- BLITTER CS
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BLITTER_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..6]==H"3E28"; -- FFFF8A00-3F/40
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BLITTER_TA = BLITTER_CS;
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-- REGISTER
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-- HALFTON RAM
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BL_HRAM_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..5]==H"7C50"; -- $F8A00/20
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BL_HRAM_BE1 = BL_HRAM_CS & FB_16B0 # !BL_HRAM_CS;
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BL_HRAM_BE0 = BL_HRAM_CS & FB_16B1 # !BL_HRAM_CS;
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BL_HRAM_ADR[] = BL_HRAM_CS & FB_ADR[4..1]
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# !BL_HRAM_CS & BL_LN[3..0];
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BL_HRAM_OUT[] = altsyncram0(BL_HRAM_ADR[],BL_HRAM_BE[],DDRCLK0,FB_AD[31..16],BL_HRAM_CS & !nFB_WR);
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-- SRC X INC
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BL_SRC_X_INC[].CLK = MAIN_CLK;
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BL_SRC_X_INC[] = !BL_BUSY & FB_AD[31..16];
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BL_SRC_X_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C510"; -- $F8A20/2
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BL_SRC_X_INC[15..8].ENA = BL_SRC_X_INC_CS & !nFB_WR & FB_16B0;
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BL_SRC_X_INC[7..0].ENA = BL_SRC_X_INC_CS & !nFB_WR & FB_16B1;
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-- SRC Y INC
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BL_SRC_Y_INC[].CLK = MAIN_CLK;
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BL_SRC_Y_INC[] = !BL_BUSY & FB_AD[31..16];
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BL_SRC_Y_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C511"; -- $F8A22/2
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BL_SRC_Y_INC[15..8].ENA = BL_SRC_Y_INC_CS & !nFB_WR & FB_16B0;
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BL_SRC_Y_INC[7..0].ENA = BL_SRC_Y_INC_CS & !nFB_WR & FB_16B1;
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-- SRC ADR HIGH
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BL_SRC_ADR[].CLK = MAIN_CLK;
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BL_SRC_ADR[31..16] = !BL_BUSY & FB_AD[31..16];
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BL_SRC_ADRH_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C512"; -- $F8A24/2
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BL_SRC_ADR[31..24].ENA = BL_SRC_ADRH_CS & !nFB_WR & FB_16B0;
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BL_SRC_ADR[23..16].ENA = BL_SRC_ADRH_CS & !nFB_WR & FB_16B1;
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-- SRC ADR LOW
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BL_SRC_ADR[].CLK = MAIN_CLK;
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BL_SRC_ADR[15..0] = !BL_BUSY & FB_AD[31..16];
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BL_SRC_ADRL_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C513"; -- $F8A26/2
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BL_SRC_ADR[15..8].ENA = BL_SRC_ADRL_CS & !nFB_WR & FB_16B0;
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BL_SRC_ADR[7..0].ENA = BL_SRC_ADRL_CS & !nFB_WR & FB_16B1;
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-- ENDMASK 1
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BL_ENDMASK1[].CLK = MAIN_CLK;
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BL_ENDMASK1[] = FB_AD[31..16];
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BL_ENDMASK1_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C514"; -- $F8A28/2
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BL_ENDMASK1[15..8].ENA = BL_ENDMASK1_CS & !nFB_WR & FB_16B0;
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BL_ENDMASK1[7..0].ENA = BL_ENDMASK1_CS & !nFB_WR & FB_16B1;
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-- ENDMASK 2
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BL_ENDMASK2[].CLK = MAIN_CLK;
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BL_ENDMASK2[] = FB_AD[31..16];
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BL_ENDMASK2_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C515"; -- $F8A2A/2
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BL_ENDMASK2[15..8].ENA = BL_ENDMASK2_CS & !nFB_WR & FB_16B0;
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BL_ENDMASK2[7..0].ENA = BL_ENDMASK2_CS & !nFB_WR & FB_16B1;
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-- ENDMASK 3
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BL_ENDMASK3[].CLK = MAIN_CLK;
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BL_ENDMASK3[] = FB_AD[31..16];
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BL_ENDMASK3_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C516"; -- $F8A2C/2
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BL_ENDMASK3[15..8].ENA = BL_ENDMASK3_CS & !nFB_WR & FB_16B0;
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BL_ENDMASK3[7..0].ENA = BL_ENDMASK3_CS & !nFB_WR & FB_16B1;
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-- DST X INC
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BL_DST_X_INC[].CLK = MAIN_CLK;
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BL_DST_X_INC[] = !BL_BUSY & FB_AD[31..16];
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BL_DST_X_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C517"; -- $F8A2E/2
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BL_DST_X_INC[15..8].ENA = BL_DST_X_INC_CS & !nFB_WR & FB_16B0;
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BL_DST_X_INC[7..0].ENA = BL_DST_X_INC_CS & !nFB_WR & FB_16B1;
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-- DST Y INC
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BL_DST_Y_INC[].CLK = MAIN_CLK;
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BL_DST_Y_INC[] = !BL_BUSY & FB_AD[31..16];
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BL_DST_Y_INC_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C518"; -- $F8A30/2
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BL_DST_Y_INC[15..8].ENA = BL_DST_Y_INC_CS & !nFB_WR & FB_16B0;
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BL_DST_Y_INC[7..0].ENA = BL_DST_Y_INC_CS & !nFB_WR & FB_16B1;
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-- DST ADR HIGH
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BL_DST_ADR[].CLK = MAIN_CLK;
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BL_DST_ADR[31..16] = !BL_BUSY & FB_AD[31..16];
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BL_DST_ADRH_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C512"; -- $F8A24/2
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BL_DST_ADR[31..24].ENA = BL_DST_ADRH_CS & !nFB_WR & FB_16B0;
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BL_DST_ADR[23..16].ENA = BL_DST_ADRH_CS & !nFB_WR & FB_16B1;
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-- DST ADR LOW
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BL_DST_ADR[].CLK = MAIN_CLK;
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BL_DST_ADR[15..0] = !BL_BUSY & FB_AD[31..16];
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BL_DST_ADRL_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C513"; -- $F8A26/2
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BL_DST_ADR[15..8].ENA = BL_DST_ADRL_CS & !nFB_WR & FB_16B0;
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BL_DST_ADR[7..0].ENA = BL_DST_ADRL_CS & !nFB_WR & FB_16B1;
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-- X COUNT
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BL_X_CNT[].CLK = MAIN_CLK;
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BL_X_CNT[] = !BL_BUSY & FB_AD[31..16];
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BL_X_CNT_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51B"; -- $F8A36/2
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BL_X_CNT[15..8].ENA = BL_X_CNT_CS & !nFB_WR & FB_16B0;
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BL_X_CNT[7..0].ENA = BL_X_CNT_CS & !nFB_WR & FB_16B1;
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-- Y COUNT
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BL_Y_CNT[].CLK = MAIN_CLK;
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BL_Y_CNT[] = !BL_BUSY & FB_AD[31..16];
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BL_Y_CNT_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51C"; -- $F8A38/2
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BL_Y_CNT[15..8].ENA = BL_Y_CNT_CS & !nFB_WR & FB_16B0;
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BL_Y_CNT[7..0].ENA = BL_Y_CNT_CS & !nFB_WR & FB_16B1;
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-- HALFTONE OP BYT
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BL_HT_OP[].CLK = MAIN_CLK;
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BL_HT_OP[] = FB_AD[31..24];
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BL_HT_OP_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51D"; -- $F8A3A/2
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BL_HT_OP[7..0].ENA = BL_HT_OP_CS & !nFB_WR & FB_16B0;
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-- LOGIC OP BYT
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BL_LC_OP[].CLK = MAIN_CLK;
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BL_LC_OP[] = FB_AD[23..16];
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BL_LC_OP[7..0].ENA = BL_HT_OP_CS & !nFB_WR & FB_16B1; -- $F8A3B
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-- LINE NUMBER BYT
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BL_LN[].CLK = MAIN_CLK;
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BL_LN[] = !BL_BUSY & FB_AD[31..24];
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BL_LN_CS = !BL_BUSY & !nFB_CS1 & FB_ADR[19..1]==H"7C51E"; -- $F8A3C/2
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BL_LN[7..0].ENA = BL_LN_CS & !nFB_WR & FB_16B0;
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-- SKEW BYT
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BL_SKEW[].CLK = MAIN_CLK;
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BL_SKEW[] = FB_AD[31..24];
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BL_SKEW[7..0].ENA = BL_LN_CS & !nFB_WR & FB_16B1; -- $F8A3D
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--- REGISTER OUT
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FB_AD[31..16] = lpm_bustri_WORD(
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BL_HRAM_CS & BL_HRAM_OUT[]
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# BL_SRC_X_INC_CS & BL_SRC_X_INC[]
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# BL_SRC_Y_INC_CS & BL_SRC_Y_INC[]
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# BL_SRC_ADRH_CS & BL_SRC_ADR[31..16]
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# BL_SRC_ADRL_CS & BL_SRC_ADR[15..0]
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# BL_ENDMASK1_CS & BL_ENDMASK1[]
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# BL_ENDMASK2_CS & BL_ENDMASK2[]
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# BL_ENDMASK3_CS & BL_ENDMASK3[]
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# BL_DST_X_INC_CS & BL_DST_X_INC[]
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# BL_DST_Y_INC_CS & BL_DST_Y_INC[]
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# BL_DST_ADRH_CS & BL_DST_ADR[31..16]
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# BL_DST_ADRL_CS & BL_DST_ADR[15..0]
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# BL_X_CNT_CS & BL_X_CNT[]
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# BL_Y_CNT_CS & BL_Y_CNT[]
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# BL_HT_OP_CS & (BL_HT_OP[],BL_LC_OP[])
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# BL_LN_CS & (BL_LN[],BL_SKEW[])
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,BLITTER_CS & !nFB_OE); -- FFFF8A00-3F/40
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-----------------------------------------
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--
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BL_READ_SRC.CLK = DDRCLK0;
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BL_READ_DST.CLK = DDRCLK0;
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-- READY SIGNAL 1 CLOCK SP<53>TER
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BL_DATA_DDR_READY.CLK = DDRCLK0;
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BL_DATA_DDR_READY = BL_DATA_DDR_READY & BLITTER_DACK0;
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-- SRC BUFFER LADEN
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BL_SKEW_IN[].CLK = DDRCLK0;
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BL_SKEW_IN[].ENA = BL_DATA_DDR_READY & BL_READ_SRC;
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BL_SKEW_IN[255..128] = BLITTER_DIN[];
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BL_SKEW_IN[127..0] = BL_SKEW_IN[255..128];
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-- DST BUFFER LADEN
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BL_DST_BUFFER[].CLK = DDRCLK0;
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BL_DST_BUFFER[].ENA = BL_DATA_DDR_READY & BL_READ_DST;
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BL_DST_BUFFER[] = BLITTER_DIN[];
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-- SKEW EXTENDET
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BL_SKEW_EXT[6..4] = BL_SRC_ADR[3..1];
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BL_SKEW_EXT[3..0] = BL_SKEW[3..0];
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-- SKEW EXT MUX
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BL_SKEW_OUT[] = lpm_clshift0(BL_SKEW_IN[],BL_SKEW_EXT[]); -- BIT 127..0 SIND RELEVANT
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-- HOP
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IF BL_HT_OP[1..0]==B"00" THEN
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HOP_OUT[] = H"FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF";
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ELSE
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IF BL_HT_OP[1..0]==B"01" THEN
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HOP_OUT[] = (BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[]);
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ELSE
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IF BL_HT_OP[1..0]==B"10" THEN
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HOP_OUT[] = BL_SKEW_OUT[127..0];
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ELSE
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HOP_OUT[] = BL_SKEW_OUT[127..0] & (BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[],BL_HRAM_OUT[]);
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END IF;
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END IF;
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END IF;
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BLITTER_RUN = GND; --VCC;
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BLITTER_SIG = GND; --VCC;
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BLITTER_WR = GND; --VCC;
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BL_BUSY = GND;
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COUNT[] = COUNT[] + 16;
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COUNT[].CLK = BLITTER_DACK0;
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BLITTER_DOUT[] = H"112233445566778899AABBCCDDEEFF00";
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BLITTER_ADR[] = (0, COUNT[]) + 400000;
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END;
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