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Markus Fröschle
2016-01-14 06:44:52 +00:00
parent 4ed4616156
commit 52e1b53192
1 changed files with 1 additions and 1 deletions
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FPGA_Quartus_13.1/Video/DDR_CTR.vhd
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@@ -876,7 +876,7 @@ BEGIN
WHEN "010001" => WHEN "010001" =>
CPU_AC_d <= CPU_AC_q; CPU_AC_d <= CPU_AC_q;
BLITTER_AC_d <= BLITTER_AC_q; BLITTER_AC_d <= BLITTER_AC_q;
VA_S_d(9 DOWNTO 0) <= (sizeIt(CPU_AC_q,10) and CPU_COL_ADR) or (sizeIt(BLITTER_AC_q,10) and BLITTER_COL_ADR); VA_S_d(9 DOWNTO 0) <= (sizeIt(CPU_AC_q, 10) and CPU_COL_ADR) or (sizeIt(BLITTER_AC_q, 10) and BLITTER_COL_ADR);
-- AUTO PRECHARGE WENN NICHT FIFO PAGE -- AUTO PRECHARGE WENN NICHT FIFO PAGE
VA_S_d(10) <= VA_S_q(10); VA_S_d(10) <= VA_S_q(10);