forked from Firebee/FPGA_Config
add missing file
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Markus Fröschle
170
FPGA_Quartus_13.1/firebee_utils_pkg.vhd
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170
FPGA_Quartus_13.1/firebee_utils_pkg.vhd
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----------------------------------------------------------------------
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---- ----
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---- This file is part of the 'Firebee' project. ----
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---- http://acp.atari.org ----
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---- ----
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---- Description: ----
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---- This package contains utility functions, procedures and constants
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---- for the Firebee project.
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----
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---- Author(s): ----
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---- - Markus Froeschle, mfro@mubf.de
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---- ----
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----------------------------------------------------------------------
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---- ----
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---- Copyright (C) 2015 Markus Froeschle
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---- ----
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---- This source file is free software; you can redistribute it ----
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---- and/or modify it under the terms of the GNU General Public ----
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---- License as published by the Free Software Foundation; either ----
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---- version 2 of the License, or (at your option) any later ----
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---- version. ----
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---- ----
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---- This program is distributed in the hope that it will be ----
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---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
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---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
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---- PURPOSE. See the GNU General Public License for more ----
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---- details. ----
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---- ----
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---- You should have received a copy of the GNU General Public ----
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---- License along with this program; if not, write to the Free ----
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---- Software Foundation, Inc., 51 Franklin Street, Fifth Floor, ----
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---- Boston, MA 02110-1301, USA. ----
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---- ----
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----------------------------------------------------------------------
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--
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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package firebee_utils_pkg is
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function f_addr_cmp_l(signal addr : std_logic_vector; constant addr_const : std_logic_vector) return std_logic;
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function f_addr_cmp_w(signal addr : std_logic_vector; constant addr_const : std_logic_vector) return std_logic;
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function f_addr_cmp_b(signal addr : std_logic_vector; constant addr_const : std_logic_vector) return std_logic;
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function f_addr_cmp_mask(signal addr : std_logic_vector; constant addr_const : std_logic_vector; constant num_ignore : integer) return std_logic;
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function max(left : integer; right : integer) return integer;
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function min(left : integer; right : integer) return integer;
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component synchronizer IS
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PORT
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(
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-- Input ports
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source_signal : in std_logic;
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target_clock : in std_logic;
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target_signal : out std_logic
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);
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end component synchronizer;
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-- size constants for the TSIZE vector
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type tsize_t is (SIZE_LONG, SIZE_WORD, SIZE_BYTE, SIZE_LINE, SIZE_TRISTATE);
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attribute enum_encoding : string;
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attribute enum_encoding of tsize_t: type is "00 10 01 11 ZZ";
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-- constant SIZE_LONG : std_logic_vector(1 downto 0) := "00";
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-- constant SIZE_WORD : std_logic_vector(1 downto 0) := "10";
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-- constant SIZE_BYTE : std_logic_vector(1 downto 0) := "01";
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-- constant SIZE_LINE : std_logic_vector(1 downto 0) := "11";
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end firebee_utils_pkg;
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package body firebee_utils_pkg is
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-- returns the smaller of two integers
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function min(left : integer; right : integer) return integer is
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begin
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if left < right then
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return left;
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else
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return right;
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end if;
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end function min;
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-- returns the larger of two integers
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function max(left : integer; right : integer) return integer is
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begin
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if left > right then
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return left;
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else
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return right;
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end if;
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end function max;
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-- returns the number of bits needed to represent n
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function log2ceil(n : natural) return natural is
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variable n_bit : unsigned(31 downto 0);
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begin -- log2ceil
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if n = 0 then
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return 0;
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end if;
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n_bit := to_unsigned(n-1,32);
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for i in 31 downto 0 loop
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if n_bit(i) = '1' then
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return i + 1;
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end if;
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end loop; -- i
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return 1;
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end log2ceil;
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-- this is for arbitrary sized address compares. It compares from the highest bit of addr_const to the lowest - num_ignore
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-- bit, thus allowing any size of comparision.
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function f_addr_cmp_mask(signal addr : std_logic_vector;
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constant addr_const : std_logic_vector;
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constant num_ignore : integer
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) return std_logic is
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variable ret : std_logic := '1';
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variable hi : integer;
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variable lo : integer;
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begin
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hi := min(addr_const'high, addr'high);
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lo := max(addr_const'low, addr'low);
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-- report("faddr_cmp_mask(): hi = " & to_string(hi) & " lo = " & to_string(lo) & " log2ceil(num_ignore) = " & to_string(log2ceil(num_ignore)));
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l_loop: for i in hi downto lo + log2ceil(num_ignore) - 1 loop
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if addr(i) /= addr_const(i) then
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-- synthesis translate_off
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-- report("f_addr_cmp_mask(): addr = " & to_hstring(unsigned(addr)) & " differs from addr_const = " & to_hstring(unsigned(addr_const)) &
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-- " at bit = " & integer'image(i));
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-- report("addr(" & integer'image(i) & ") (" & to_string(addr) & ") = " & to_string(addr(i)) &
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-- " addr_const(" & integer'image(i) & ") ( " & to_string(addr_const) & ") = " & to_string(addr_const(i)));
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-- synthesis translate_on
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ret := '0';
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exit l_loop;
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else
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-- pragma synthesis off
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-- report("f_addr_cmp_mask(): addr = " & to_hstring(unsigned(addr)) & " equals to addr_const = " & to_hstring(unsigned(addr_const)) &
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-- " at bit = " & integer'image(i));
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-- report("addr(" & integer'image(i) & ") (" & to_string(addr) & ") = " & to_string(addr(i)) &
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-- " addr_const(" & integer'image(i) & ") ( " & to_string(addr_const) & ") = " & to_string(addr_const(i)));
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-- pragma synthesis on
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end if;
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end loop;
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-- pragma synthesis off
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report("f_addr_cmp_mask(" & to_hstring(unsigned(addr)) & ", " & to_hstring(unsigned(addr_const)) & "): return " & to_string(ret));
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-- pragma synthesis on
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return ret;
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end function f_addr_cmp_mask;
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function f_addr_cmp_l(signal addr : std_logic_vector;
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constant addr_const : std_logic_vector
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) return std_logic is
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begin
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return f_addr_cmp_mask(addr, addr_const, 2);
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end function f_addr_cmp_l;
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function f_addr_cmp_w(signal addr : std_logic_vector;
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constant addr_const : std_logic_vector
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) return std_logic is
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begin
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return f_addr_cmp_mask(addr, addr_const, 1);
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end function f_addr_cmp_w;
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function f_addr_cmp_b(signal addr : std_logic_vector;
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constant addr_const : std_logic_vector
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) return std_logic is
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begin
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return f_addr_cmp_mask(addr, addr_const, 0);
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end function f_addr_cmp_b;
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end package body firebee_utils_pkg;
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