forked from Firebee/FPGA_Config
add config from 30-11-2018
This commit is contained in:
32
FPGA_30_11_2018/Video/BLITTER/altsyncram0.inc
Normal file
32
FPGA_30_11_2018/Video/BLITTER/altsyncram0.inc
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@@ -0,0 +1,32 @@
|
||||
--Copyright (C) 1991-2010 Altera Corporation
|
||||
--Your use of Altera Corporation's design tools, logic functions
|
||||
--and other software and tools, and its AMPP partner logic
|
||||
--functions, and any output files from any of the foregoing
|
||||
--(including device programming or simulation files), and any
|
||||
--associated documentation or information are expressly subject
|
||||
--to the terms and conditions of the Altera Program License
|
||||
--Subscription Agreement, Altera MegaCore Function License
|
||||
--Agreement, or other applicable license agreement, including,
|
||||
--without limitation, that your use is for the sole purpose of
|
||||
--programming logic devices manufactured by Altera and sold by
|
||||
--Altera or its authorized distributors. Please refer to the
|
||||
--applicable agreement for further details.
|
||||
|
||||
|
||||
FUNCTION altsyncram0
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||||
(
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address_a[3..0],
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address_b[3..0],
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byteena_a[1..0],
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clock_a,
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clock_b,
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data_a[15..0],
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data_b[15..0],
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wren_a,
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wren_b
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)
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RETURNS (
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q_a[15..0],
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q_b[15..0]
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);
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4
FPGA_30_11_2018/Video/BLITTER/altsyncram0.qip
Normal file
4
FPGA_30_11_2018/Video/BLITTER/altsyncram0.qip
Normal file
@@ -0,0 +1,4 @@
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||||
set_global_assignment -name IP_TOOL_NAME "ALTSYNCRAM"
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set_global_assignment -name IP_TOOL_VERSION "9.1"
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set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "altsyncram0.tdf"]
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set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "altsyncram0.inc"]
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221
FPGA_30_11_2018/Video/BLITTER/altsyncram0.tdf
Normal file
221
FPGA_30_11_2018/Video/BLITTER/altsyncram0.tdf
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@@ -0,0 +1,221 @@
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||||
-- megafunction wizard: %ALTSYNCRAM%
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||||
-- GENERATION: STANDARD
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-- VERSION: WM1.0
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-- MODULE: altsyncram
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-- ============================================================
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-- File Name: altsyncram0.tdf
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-- Megafunction Name(s):
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-- altsyncram
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--
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-- Simulation Library Files(s):
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||||
-- altera_mf
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||||
-- ============================================================
|
||||
-- ************************************************************
|
||||
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
|
||||
--
|
||||
-- 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
|
||||
-- ************************************************************
|
||||
|
||||
|
||||
--Copyright (C) 1991-2010 Altera Corporation
|
||||
--Your use of Altera Corporation's design tools, logic functions
|
||||
--and other software and tools, and its AMPP partner logic
|
||||
--functions, and any output files from any of the foregoing
|
||||
--(including device programming or simulation files), and any
|
||||
--associated documentation or information are expressly subject
|
||||
--to the terms and conditions of the Altera Program License
|
||||
--Subscription Agreement, Altera MegaCore Function License
|
||||
--Agreement, or other applicable license agreement, including,
|
||||
--without limitation, that your use is for the sole purpose of
|
||||
--programming logic devices manufactured by Altera and sold by
|
||||
--Altera or its authorized distributors. Please refer to the
|
||||
--applicable agreement for further details.
|
||||
|
||||
INCLUDE "altsyncram.inc";
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||||
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||||
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||||
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SUBDESIGN altsyncram0
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(
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address_a[3..0] : INPUT;
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address_b[3..0] : INPUT;
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byteena_a[1..0] : INPUT = VCC;
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clock_a : INPUT = VCC;
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clock_b : INPUT;
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data_a[15..0] : INPUT;
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data_b[15..0] : INPUT;
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wren_a : INPUT = GND;
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wren_b : INPUT = GND;
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q_a[15..0] : OUTPUT;
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q_b[15..0] : OUTPUT;
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)
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VARIABLE
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||||
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altsyncram_component : altsyncram WITH (
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ADDRESS_REG_B = "CLOCK1",
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BYTE_SIZE = 8,
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CLOCK_ENABLE_INPUT_A = "BYPASS",
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||||
CLOCK_ENABLE_INPUT_B = "BYPASS",
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CLOCK_ENABLE_OUTPUT_A = "BYPASS",
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CLOCK_ENABLE_OUTPUT_B = "BYPASS",
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INDATA_REG_B = "CLOCK1",
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INTENDED_DEVICE_FAMILY = "Cyclone III",
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LPM_TYPE = "altsyncram",
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||||
NUMWORDS_A = 16,
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NUMWORDS_B = 16,
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OPERATION_MODE = "BIDIR_DUAL_PORT",
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OUTDATA_ACLR_A = "NONE",
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OUTDATA_ACLR_B = "NONE",
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OUTDATA_REG_A = "UNREGISTERED",
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OUTDATA_REG_B = "UNREGISTERED",
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||||
POWER_UP_UNINITIALIZED = "FALSE",
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||||
READ_DURING_WRITE_MODE_PORT_A = "NEW_DATA_WITH_NBE_READ",
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READ_DURING_WRITE_MODE_PORT_B = "NEW_DATA_WITH_NBE_READ",
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WIDTHAD_A = 4,
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WIDTHAD_B = 4,
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WIDTH_A = 16,
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WIDTH_B = 16,
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WIDTH_BYTEENA_A = 2,
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WIDTH_BYTEENA_B = 1,
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WRCONTROL_WRADDRESS_REG_B = "CLOCK1"
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);
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BEGIN
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||||
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q_a[15..0] = altsyncram_component.q_a[15..0];
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q_b[15..0] = altsyncram_component.q_b[15..0];
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altsyncram_component.wren_a = wren_a;
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altsyncram_component.clock0 = clock_a;
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altsyncram_component.wren_b = wren_b;
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altsyncram_component.clock1 = clock_b;
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altsyncram_component.byteena_a[1..0] = byteena_a[1..0];
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altsyncram_component.address_a[3..0] = address_a[3..0];
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altsyncram_component.address_b[3..0] = address_b[3..0];
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altsyncram_component.data_a[15..0] = data_a[15..0];
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altsyncram_component.data_b[15..0] = data_b[15..0];
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END;
|
||||
|
||||
|
||||
|
||||
-- ============================================================
|
||||
-- CNX file retrieval info
|
||||
-- ============================================================
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||||
-- Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0"
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||||
-- Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC "0"
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||||
-- Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC "0"
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||||
-- Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC "1"
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||||
-- Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8"
|
||||
-- Retrieval info: PRIVATE: BlankMemory NUMERIC "1"
|
||||
-- Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: CLRdata NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: CLRq NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: CLRrdaddress NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: CLRrren NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: CLRwraddress NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: CLRwren NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: Clock NUMERIC "5"
|
||||
-- Retrieval info: PRIVATE: Clock_A NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: Clock_B NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: ECC NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: INDATA_REG_B NUMERIC "1"
|
||||
-- Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_A"
|
||||
-- Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
|
||||
-- Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: JTAG_ID STRING "NONE"
|
||||
-- Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: MEMSIZE NUMERIC "256"
|
||||
-- Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: MIFfilename STRING ""
|
||||
-- Retrieval info: PRIVATE: OPERATION_MODE NUMERIC "3"
|
||||
-- Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC "2"
|
||||
-- Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC "4"
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||||
-- Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC "4"
|
||||
-- Retrieval info: PRIVATE: REGdata NUMERIC "1"
|
||||
-- Retrieval info: PRIVATE: REGq NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: REGrdaddress NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: REGrren NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: REGwraddress NUMERIC "1"
|
||||
-- Retrieval info: PRIVATE: REGwren NUMERIC "1"
|
||||
-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
|
||||
-- Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: UseDPRAM NUMERIC "1"
|
||||
-- Retrieval info: PRIVATE: VarWidth NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC "16"
|
||||
-- Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC "16"
|
||||
-- Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC "16"
|
||||
-- Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC "16"
|
||||
-- Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC "1"
|
||||
-- Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: enable NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: rden NUMERIC "0"
|
||||
-- Retrieval info: CONSTANT: ADDRESS_REG_B STRING "CLOCK1"
|
||||
-- Retrieval info: CONSTANT: BYTE_SIZE NUMERIC "8"
|
||||
-- Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS"
|
||||
-- Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING "BYPASS"
|
||||
-- Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS"
|
||||
-- Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING "BYPASS"
|
||||
-- Retrieval info: CONSTANT: INDATA_REG_B STRING "CLOCK1"
|
||||
-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
|
||||
-- Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram"
|
||||
-- Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "16"
|
||||
-- Retrieval info: CONSTANT: NUMWORDS_B NUMERIC "16"
|
||||
-- Retrieval info: CONSTANT: OPERATION_MODE STRING "BIDIR_DUAL_PORT"
|
||||
-- Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE"
|
||||
-- Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING "NONE"
|
||||
-- Retrieval info: CONSTANT: OUTDATA_REG_A STRING "UNREGISTERED"
|
||||
-- Retrieval info: CONSTANT: OUTDATA_REG_B STRING "UNREGISTERED"
|
||||
-- Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING "FALSE"
|
||||
-- Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING "NEW_DATA_WITH_NBE_READ"
|
||||
-- Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_B STRING "NEW_DATA_WITH_NBE_READ"
|
||||
-- Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "4"
|
||||
-- Retrieval info: CONSTANT: WIDTHAD_B NUMERIC "4"
|
||||
-- Retrieval info: CONSTANT: WIDTH_A NUMERIC "16"
|
||||
-- Retrieval info: CONSTANT: WIDTH_B NUMERIC "16"
|
||||
-- Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "2"
|
||||
-- Retrieval info: CONSTANT: WIDTH_BYTEENA_B NUMERIC "1"
|
||||
-- Retrieval info: CONSTANT: WRCONTROL_WRADDRESS_REG_B STRING "CLOCK1"
|
||||
-- Retrieval info: USED_PORT: address_a 0 0 4 0 INPUT NODEFVAL address_a[3..0]
|
||||
-- Retrieval info: USED_PORT: address_b 0 0 4 0 INPUT NODEFVAL address_b[3..0]
|
||||
-- Retrieval info: USED_PORT: byteena_a 0 0 2 0 INPUT VCC byteena_a[1..0]
|
||||
-- Retrieval info: USED_PORT: clock_a 0 0 0 0 INPUT VCC clock_a
|
||||
-- Retrieval info: USED_PORT: clock_b 0 0 0 0 INPUT NODEFVAL clock_b
|
||||
-- Retrieval info: USED_PORT: data_a 0 0 16 0 INPUT NODEFVAL data_a[15..0]
|
||||
-- Retrieval info: USED_PORT: data_b 0 0 16 0 INPUT NODEFVAL data_b[15..0]
|
||||
-- Retrieval info: USED_PORT: q_a 0 0 16 0 OUTPUT NODEFVAL q_a[15..0]
|
||||
-- Retrieval info: USED_PORT: q_b 0 0 16 0 OUTPUT NODEFVAL q_b[15..0]
|
||||
-- Retrieval info: USED_PORT: wren_a 0 0 0 0 INPUT GND wren_a
|
||||
-- Retrieval info: USED_PORT: wren_b 0 0 0 0 INPUT GND wren_b
|
||||
-- Retrieval info: CONNECT: @data_a 0 0 16 0 data_a 0 0 16 0
|
||||
-- Retrieval info: CONNECT: @wren_a 0 0 0 0 wren_a 0 0 0 0
|
||||
-- Retrieval info: CONNECT: q_a 0 0 16 0 @q_a 0 0 16 0
|
||||
-- Retrieval info: CONNECT: q_b 0 0 16 0 @q_b 0 0 16 0
|
||||
-- Retrieval info: CONNECT: @address_a 0 0 4 0 address_a 0 0 4 0
|
||||
-- Retrieval info: CONNECT: @data_b 0 0 16 0 data_b 0 0 16 0
|
||||
-- Retrieval info: CONNECT: @address_b 0 0 4 0 address_b 0 0 4 0
|
||||
-- Retrieval info: CONNECT: @wren_b 0 0 0 0 wren_b 0 0 0 0
|
||||
-- Retrieval info: CONNECT: @byteena_a 0 0 2 0 byteena_a 0 0 2 0
|
||||
-- Retrieval info: CONNECT: @clock0 0 0 0 0 clock_a 0 0 0 0
|
||||
-- Retrieval info: CONNECT: @clock1 0 0 0 0 clock_b 0 0 0 0
|
||||
-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0.tdf TRUE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0.inc TRUE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0.cmp FALSE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0.bsf FALSE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0_inst.tdf FALSE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0_waveforms.html FALSE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL altsyncram0_wave*.jpg FALSE
|
||||
-- Retrieval info: LIB_FILE: altera_mf
|
||||
25
FPGA_30_11_2018/Video/BLITTER/lpm_clshift144.inc
Normal file
25
FPGA_30_11_2018/Video/BLITTER/lpm_clshift144.inc
Normal file
@@ -0,0 +1,25 @@
|
||||
--Copyright (C) 1991-2010 Altera Corporation
|
||||
--Your use of Altera Corporation's design tools, logic functions
|
||||
--and other software and tools, and its AMPP partner logic
|
||||
--functions, and any output files from any of the foregoing
|
||||
--(including device programming or simulation files), and any
|
||||
--associated documentation or information are expressly subject
|
||||
--to the terms and conditions of the Altera Program License
|
||||
--Subscription Agreement, Altera MegaCore Function License
|
||||
--Agreement, or other applicable license agreement, including,
|
||||
--without limitation, that your use is for the sole purpose of
|
||||
--programming logic devices manufactured by Altera and sold by
|
||||
--Altera or its authorized distributors. Please refer to the
|
||||
--applicable agreement for further details.
|
||||
|
||||
|
||||
FUNCTION lpm_clshift144
|
||||
(
|
||||
data[143..0],
|
||||
direction,
|
||||
distance[7..0]
|
||||
)
|
||||
|
||||
RETURNS (
|
||||
result[143..0]
|
||||
);
|
||||
4
FPGA_30_11_2018/Video/BLITTER/lpm_clshift144.qip
Normal file
4
FPGA_30_11_2018/Video/BLITTER/lpm_clshift144.qip
Normal file
@@ -0,0 +1,4 @@
|
||||
set_global_assignment -name IP_TOOL_NAME "LPM_CLSHIFT"
|
||||
set_global_assignment -name IP_TOOL_VERSION "9.1"
|
||||
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_clshift144.tdf"]
|
||||
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_clshift144.inc"]
|
||||
94
FPGA_30_11_2018/Video/BLITTER/lpm_clshift144.tdf
Normal file
94
FPGA_30_11_2018/Video/BLITTER/lpm_clshift144.tdf
Normal file
@@ -0,0 +1,94 @@
|
||||
-- megafunction wizard: %LPM_CLSHIFT%
|
||||
-- GENERATION: STANDARD
|
||||
-- VERSION: WM1.0
|
||||
-- MODULE: lpm_clshift
|
||||
|
||||
-- ============================================================
|
||||
-- File Name: lpm_clshift144.tdf
|
||||
-- Megafunction Name(s):
|
||||
-- lpm_clshift
|
||||
--
|
||||
-- Simulation Library Files(s):
|
||||
--
|
||||
-- ============================================================
|
||||
-- ************************************************************
|
||||
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
|
||||
--
|
||||
-- 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
|
||||
-- ************************************************************
|
||||
|
||||
|
||||
--Copyright (C) 1991-2010 Altera Corporation
|
||||
--Your use of Altera Corporation's design tools, logic functions
|
||||
--and other software and tools, and its AMPP partner logic
|
||||
--functions, and any output files from any of the foregoing
|
||||
--(including device programming or simulation files), and any
|
||||
--associated documentation or information are expressly subject
|
||||
--to the terms and conditions of the Altera Program License
|
||||
--Subscription Agreement, Altera MegaCore Function License
|
||||
--Agreement, or other applicable license agreement, including,
|
||||
--without limitation, that your use is for the sole purpose of
|
||||
--programming logic devices manufactured by Altera and sold by
|
||||
--Altera or its authorized distributors. Please refer to the
|
||||
--applicable agreement for further details.
|
||||
|
||||
INCLUDE "lpm_clshift.inc";
|
||||
|
||||
|
||||
|
||||
SUBDESIGN lpm_clshift144
|
||||
(
|
||||
data[143..0] : INPUT;
|
||||
direction : INPUT;
|
||||
distance[7..0] : INPUT;
|
||||
result[143..0] : OUTPUT;
|
||||
)
|
||||
|
||||
VARIABLE
|
||||
|
||||
lpm_clshift_component : lpm_clshift WITH (
|
||||
LPM_SHIFTTYPE = "LOGICAL",
|
||||
LPM_TYPE = "LPM_CLSHIFT",
|
||||
LPM_WIDTH = 144,
|
||||
LPM_WIDTHDIST = 8
|
||||
);
|
||||
|
||||
BEGIN
|
||||
|
||||
result[143..0] = lpm_clshift_component.result[143..0];
|
||||
lpm_clshift_component.distance[7..0] = distance[7..0];
|
||||
lpm_clshift_component.direction = direction;
|
||||
lpm_clshift_component.data[143..0] = data[143..0];
|
||||
END;
|
||||
|
||||
|
||||
|
||||
-- ============================================================
|
||||
-- CNX file retrieval info
|
||||
-- ============================================================
|
||||
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
|
||||
-- Retrieval info: PRIVATE: LPM_SHIFTTYPE NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: LPM_WIDTH NUMERIC "144"
|
||||
-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
|
||||
-- Retrieval info: PRIVATE: lpm_width_varies NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: lpm_widthdist NUMERIC "8"
|
||||
-- Retrieval info: PRIVATE: lpm_widthdist_style NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: port_direction NUMERIC "2"
|
||||
-- Retrieval info: CONSTANT: LPM_SHIFTTYPE STRING "LOGICAL"
|
||||
-- Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_CLSHIFT"
|
||||
-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "144"
|
||||
-- Retrieval info: CONSTANT: LPM_WIDTHDIST NUMERIC "8"
|
||||
-- Retrieval info: USED_PORT: data 0 0 144 0 INPUT NODEFVAL data[143..0]
|
||||
-- Retrieval info: USED_PORT: direction 0 0 0 0 INPUT NODEFVAL direction
|
||||
-- Retrieval info: USED_PORT: distance 0 0 8 0 INPUT NODEFVAL distance[7..0]
|
||||
-- Retrieval info: USED_PORT: result 0 0 144 0 OUTPUT NODEFVAL result[143..0]
|
||||
-- Retrieval info: CONNECT: @distance 0 0 8 0 distance 0 0 8 0
|
||||
-- Retrieval info: CONNECT: @data 0 0 144 0 data 0 0 144 0
|
||||
-- Retrieval info: CONNECT: result 0 0 144 0 @result 0 0 144 0
|
||||
-- Retrieval info: CONNECT: @direction 0 0 0 0 direction 0 0 0 0
|
||||
-- Retrieval info: LIBRARY: lpm lpm.lpm_components.all
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift144.tdf TRUE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift144.inc TRUE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift144.cmp FALSE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift144.bsf FALSE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift144_inst.tdf FALSE
|
||||
25
FPGA_30_11_2018/Video/BLITTER/lpm_clshift384.inc
Normal file
25
FPGA_30_11_2018/Video/BLITTER/lpm_clshift384.inc
Normal file
@@ -0,0 +1,25 @@
|
||||
--Copyright (C) 1991-2010 Altera Corporation
|
||||
--Your use of Altera Corporation's design tools, logic functions
|
||||
--and other software and tools, and its AMPP partner logic
|
||||
--functions, and any output files from any of the foregoing
|
||||
--(including device programming or simulation files), and any
|
||||
--associated documentation or information are expressly subject
|
||||
--to the terms and conditions of the Altera Program License
|
||||
--Subscription Agreement, Altera MegaCore Function License
|
||||
--Agreement, or other applicable license agreement, including,
|
||||
--without limitation, that your use is for the sole purpose of
|
||||
--programming logic devices manufactured by Altera and sold by
|
||||
--Altera or its authorized distributors. Please refer to the
|
||||
--applicable agreement for further details.
|
||||
|
||||
|
||||
FUNCTION lpm_clshift384
|
||||
(
|
||||
data[383..0],
|
||||
direction,
|
||||
distance[7..0]
|
||||
)
|
||||
|
||||
RETURNS (
|
||||
result[383..0]
|
||||
);
|
||||
5
FPGA_30_11_2018/Video/BLITTER/lpm_clshift384.qip
Normal file
5
FPGA_30_11_2018/Video/BLITTER/lpm_clshift384.qip
Normal file
@@ -0,0 +1,5 @@
|
||||
set_global_assignment -name IP_TOOL_NAME "LPM_CLSHIFT"
|
||||
set_global_assignment -name IP_TOOL_VERSION "9.1"
|
||||
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_clshift384.tdf"]
|
||||
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_clshift384.inc"]
|
||||
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_clshift384.cmp"]
|
||||
94
FPGA_30_11_2018/Video/BLITTER/lpm_clshift384.tdf
Normal file
94
FPGA_30_11_2018/Video/BLITTER/lpm_clshift384.tdf
Normal file
@@ -0,0 +1,94 @@
|
||||
-- megafunction wizard: %LPM_CLSHIFT%
|
||||
-- GENERATION: STANDARD
|
||||
-- VERSION: WM1.0
|
||||
-- MODULE: lpm_clshift
|
||||
|
||||
-- ============================================================
|
||||
-- File Name: lpm_clshift0.tdf
|
||||
-- Megafunction Name(s):
|
||||
-- lpm_clshift
|
||||
--
|
||||
-- Simulation Library Files(s):
|
||||
--
|
||||
-- ============================================================
|
||||
-- ************************************************************
|
||||
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
|
||||
--
|
||||
-- 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
|
||||
-- ************************************************************
|
||||
|
||||
|
||||
--Copyright (C) 1991-2010 Altera Corporation
|
||||
--Your use of Altera Corporation's design tools, logic functions
|
||||
--and other software and tools, and its AMPP partner logic
|
||||
--functions, and any output files from any of the foregoing
|
||||
--(including device programming or simulation files), and any
|
||||
--associated documentation or information are expressly subject
|
||||
--to the terms and conditions of the Altera Program License
|
||||
--Subscription Agreement, Altera MegaCore Function License
|
||||
--Agreement, or other applicable license agreement, including,
|
||||
--without limitation, that your use is for the sole purpose of
|
||||
--programming logic devices manufactured by Altera and sold by
|
||||
--Altera or its authorized distributors. Please refer to the
|
||||
--applicable agreement for further details.
|
||||
|
||||
INCLUDE "lpm_clshift.inc";
|
||||
|
||||
|
||||
|
||||
SUBDESIGN lpm_clshift384
|
||||
(
|
||||
data[383..0] : INPUT;
|
||||
direction : INPUT;
|
||||
distance[7..0] : INPUT;
|
||||
result[383..0] : OUTPUT;
|
||||
)
|
||||
|
||||
VARIABLE
|
||||
|
||||
lpm_clshift_component : lpm_clshift WITH (
|
||||
LPM_SHIFTTYPE = "LOGICAL",
|
||||
LPM_TYPE = "LPM_CLSHIFT",
|
||||
LPM_WIDTH = 384,
|
||||
LPM_WIDTHDIST = 8
|
||||
);
|
||||
|
||||
BEGIN
|
||||
|
||||
result[383..0] = lpm_clshift_component.result[383..0];
|
||||
lpm_clshift_component.distance[7..0] = distance[7..0];
|
||||
lpm_clshift_component.direction = direction;
|
||||
lpm_clshift_component.data[383..0] = data[383..0];
|
||||
END;
|
||||
|
||||
|
||||
|
||||
-- ============================================================
|
||||
-- CNX file retrieval info
|
||||
-- ============================================================
|
||||
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
|
||||
-- Retrieval info: PRIVATE: LPM_SHIFTTYPE NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: LPM_WIDTH NUMERIC "384"
|
||||
-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
|
||||
-- Retrieval info: PRIVATE: lpm_width_varies NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: lpm_widthdist NUMERIC "8"
|
||||
-- Retrieval info: PRIVATE: lpm_widthdist_style NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: port_direction NUMERIC "2"
|
||||
-- Retrieval info: CONSTANT: LPM_SHIFTTYPE STRING "LOGICAL"
|
||||
-- Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_CLSHIFT"
|
||||
-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "384"
|
||||
-- Retrieval info: CONSTANT: LPM_WIDTHDIST NUMERIC "8"
|
||||
-- Retrieval info: USED_PORT: data 0 0 384 0 INPUT NODEFVAL data[383..0]
|
||||
-- Retrieval info: USED_PORT: direction 0 0 0 0 INPUT NODEFVAL direction
|
||||
-- Retrieval info: USED_PORT: distance 0 0 8 0 INPUT NODEFVAL distance[7..0]
|
||||
-- Retrieval info: USED_PORT: result 0 0 384 0 OUTPUT NODEFVAL result[383..0]
|
||||
-- Retrieval info: CONNECT: @distance 0 0 8 0 distance 0 0 8 0
|
||||
-- Retrieval info: CONNECT: @data 0 0 384 0 data 0 0 384 0
|
||||
-- Retrieval info: CONNECT: result 0 0 384 0 @result 0 0 384 0
|
||||
-- Retrieval info: CONNECT: @direction 0 0 0 0 direction 0 0 0 0
|
||||
-- Retrieval info: LIBRARY: lpm lpm.lpm_components.all
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift0.tdf TRUE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift0.inc TRUE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift0.cmp TRUE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift0.bsf TRUE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_clshift0_inst.tdf FALSE
|
||||
24
FPGA_30_11_2018/Video/BLITTER/lpm_ror128.inc
Normal file
24
FPGA_30_11_2018/Video/BLITTER/lpm_ror128.inc
Normal file
@@ -0,0 +1,24 @@
|
||||
--Copyright (C) 1991-2010 Altera Corporation
|
||||
--Your use of Altera Corporation's design tools, logic functions
|
||||
--and other software and tools, and its AMPP partner logic
|
||||
--functions, and any output files from any of the foregoing
|
||||
--(including device programming or simulation files), and any
|
||||
--associated documentation or information are expressly subject
|
||||
--to the terms and conditions of the Altera Program License
|
||||
--Subscription Agreement, Altera MegaCore Function License
|
||||
--Agreement, or other applicable license agreement, including,
|
||||
--without limitation, that your use is for the sole purpose of
|
||||
--programming logic devices manufactured by Altera and sold by
|
||||
--Altera or its authorized distributors. Please refer to the
|
||||
--applicable agreement for further details.
|
||||
|
||||
|
||||
FUNCTION lpm_ror128
|
||||
(
|
||||
data[127..0],
|
||||
distance[6..0]
|
||||
)
|
||||
|
||||
RETURNS (
|
||||
result[127..0]
|
||||
);
|
||||
5
FPGA_30_11_2018/Video/BLITTER/lpm_ror128.qip
Normal file
5
FPGA_30_11_2018/Video/BLITTER/lpm_ror128.qip
Normal file
@@ -0,0 +1,5 @@
|
||||
set_global_assignment -name IP_TOOL_NAME "LPM_CLSHIFT"
|
||||
set_global_assignment -name IP_TOOL_VERSION "9.1"
|
||||
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_ror128.tdf"]
|
||||
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_ror128.inc"]
|
||||
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "lpm_ror128.cmp"]
|
||||
92
FPGA_30_11_2018/Video/BLITTER/lpm_ror128.tdf
Normal file
92
FPGA_30_11_2018/Video/BLITTER/lpm_ror128.tdf
Normal file
@@ -0,0 +1,92 @@
|
||||
-- megafunction wizard: %LPM_CLSHIFT%
|
||||
-- GENERATION: STANDARD
|
||||
-- VERSION: WM1.0
|
||||
-- MODULE: lpm_clshift
|
||||
|
||||
-- ============================================================
|
||||
-- File Name: lpm_ror128.tdf
|
||||
-- Megafunction Name(s):
|
||||
-- lpm_clshift
|
||||
--
|
||||
-- Simulation Library Files(s):
|
||||
--
|
||||
-- ============================================================
|
||||
-- ************************************************************
|
||||
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
|
||||
--
|
||||
-- 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
|
||||
-- ************************************************************
|
||||
|
||||
|
||||
--Copyright (C) 1991-2010 Altera Corporation
|
||||
--Your use of Altera Corporation's design tools, logic functions
|
||||
--and other software and tools, and its AMPP partner logic
|
||||
--functions, and any output files from any of the foregoing
|
||||
--(including device programming or simulation files), and any
|
||||
--associated documentation or information are expressly subject
|
||||
--to the terms and conditions of the Altera Program License
|
||||
--Subscription Agreement, Altera MegaCore Function License
|
||||
--Agreement, or other applicable license agreement, including,
|
||||
--without limitation, that your use is for the sole purpose of
|
||||
--programming logic devices manufactured by Altera and sold by
|
||||
--Altera or its authorized distributors. Please refer to the
|
||||
--applicable agreement for further details.
|
||||
|
||||
INCLUDE "lpm_clshift.inc";
|
||||
|
||||
|
||||
|
||||
SUBDESIGN lpm_ror128
|
||||
(
|
||||
data[127..0] : INPUT;
|
||||
distance[6..0] : INPUT;
|
||||
result[127..0] : OUTPUT;
|
||||
)
|
||||
|
||||
VARIABLE
|
||||
|
||||
lpm_clshift_component : lpm_clshift WITH (
|
||||
LPM_SHIFTTYPE = "ROTATE",
|
||||
LPM_TYPE = "LPM_CLSHIFT",
|
||||
LPM_WIDTH = 128,
|
||||
LPM_WIDTHDIST = 7
|
||||
);
|
||||
|
||||
BEGIN
|
||||
|
||||
result[127..0] = lpm_clshift_component.result[127..0];
|
||||
lpm_clshift_component.distance[6..0] = distance[6..0];
|
||||
lpm_clshift_component.direction = VCC;
|
||||
lpm_clshift_component.data[127..0] = data[127..0];
|
||||
END;
|
||||
|
||||
|
||||
|
||||
-- ============================================================
|
||||
-- CNX file retrieval info
|
||||
-- ============================================================
|
||||
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
|
||||
-- Retrieval info: PRIVATE: LPM_SHIFTTYPE NUMERIC "2"
|
||||
-- Retrieval info: PRIVATE: LPM_WIDTH NUMERIC "128"
|
||||
-- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
|
||||
-- Retrieval info: PRIVATE: lpm_width_varies NUMERIC "0"
|
||||
-- Retrieval info: PRIVATE: lpm_widthdist NUMERIC "7"
|
||||
-- Retrieval info: PRIVATE: lpm_widthdist_style NUMERIC "1"
|
||||
-- Retrieval info: PRIVATE: port_direction NUMERIC "1"
|
||||
-- Retrieval info: CONSTANT: LPM_SHIFTTYPE STRING "ROTATE"
|
||||
-- Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_CLSHIFT"
|
||||
-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "128"
|
||||
-- Retrieval info: CONSTANT: LPM_WIDTHDIST NUMERIC "7"
|
||||
-- Retrieval info: USED_PORT: data 0 0 128 0 INPUT NODEFVAL data[127..0]
|
||||
-- Retrieval info: USED_PORT: distance 0 0 7 0 INPUT NODEFVAL distance[6..0]
|
||||
-- Retrieval info: USED_PORT: result 0 0 128 0 OUTPUT NODEFVAL result[127..0]
|
||||
-- Retrieval info: CONNECT: @distance 0 0 7 0 distance 0 0 7 0
|
||||
-- Retrieval info: CONNECT: @data 0 0 128 0 data 0 0 128 0
|
||||
-- Retrieval info: CONNECT: result 0 0 128 0 @result 0 0 128 0
|
||||
-- Retrieval info: CONNECT: @direction 0 0 0 0 VCC 0 0 0 0
|
||||
-- Retrieval info: LIBRARY: lpm lpm.lpm_components.all
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_ror128.tdf TRUE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_ror128.inc TRUE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_ror128.cmp TRUE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_ror128.bsf FALSE
|
||||
-- Retrieval info: GEN_FILE: TYPE_NORMAL lpm_ror128_inst.tdf FALSE
|
||||
Reference in New Issue
Block a user