1971 lines
51 KiB
Diff
1971 lines
51 KiB
Diff
diff -urN gdb-5.0.orig/gdb/Makefile.in gdb-5.0/gdb/Makefile.in
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--- gdb-5.0.orig/gdb/Makefile.in Sat May 27 16:55:48 2000
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+++ gdb-5.0/gdb/Makefile.in Tue Jan 23 16:44:03 2001
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@@ -1098,7 +1098,7 @@
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symm-tdep.c symm-nat.c \
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tahoe-tdep.c ultra3-nat.c ultra3-xdep.c umax-xdep.c \
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vax-tdep.c \
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- vx-share/xdr_ld.c vx-share/xdr_ptrace.c vx-share/xdr_rdb.c \
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+ vx-share/xdr_ld.c vx-share/xdr_ptrace.c vx-share/xdr_rdb.c remote-m68k-bdm.c \
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win32-nat.c \
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xcoffread.c xcoffsolib.c z8k-tdep.c
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@@ -1701,6 +1701,9 @@
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remote-mm.o: remote-mm.c $(bfd_h) gdb_wait.h $(defs_h) $(inferior_h) \
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minimon.h target.h terminal.h gdb_string.h
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+
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+remote-m68k-bdm.o: remote-m68k-bdm.c $(bfd_h) $(wait_h) $(defs_h) $(inferior_h) \
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+ $(gdbcore_h) target.h
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remote-nindy.o: remote-nindy.c $(floatformat_h) gdb_wait.h $(command_h) \
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$(defs_h) $(gdbcore_h) $(inferior_h) \
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diff -urN gdb-5.0.orig/gdb/config/m68k/bdm.mt gdb-5.0/gdb/config/m68k/bdm.mt
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--- gdb-5.0.orig/gdb/config/m68k/bdm.mt Thu Jan 1 10:00:00 1970
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+++ gdb-5.0/gdb/config/m68k/bdm.mt Tue Jan 23 16:44:03 2001
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@@ -0,0 +1,5 @@
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+# Target: m68k bdm interface for the CPU32 and Coldfire processors.
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+#
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+TM_CLIBS= -lBDM
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+TDEPFILES= m68k-tdep.o remote-m68k-bdm.o
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+TM_FILE= tm-bdm.h
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diff -urN gdb-5.0.orig/gdb/config/m68k/tm-bdm.h gdb-5.0/gdb/config/m68k/tm-bdm.h
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--- gdb-5.0.orig/gdb/config/m68k/tm-bdm.h Thu Jan 1 10:00:00 1970
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+++ gdb-5.0/gdb/config/m68k/tm-bdm.h Mon Feb 12 22:52:14 2001
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@@ -0,0 +1,120 @@
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+/*
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+ * Target machine description for Coldfire BDM (Moto 5200)
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+ * Copyright (C) 1995 W. Eric Norum
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+ * Copyright (C) 1998 Chris Johns (ccj@acm.org)
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+ *
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+ * Based on:
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+ * 1. `A Background Debug Mode Driver Package for Motorola's
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+ * 16- and 32-Bit Microcontrollers', Scott Howard, Motorola
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+ * Canada, 1993.
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+ * 2. `Linux device driver for public domain BDM Interface',
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+ * M. Schraut, Technische Universitaet Muenchen, Lehrstuhl
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+ * fuer Prozessrechner, 1995.
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+ * 3. BDM support for gdb by W. Eric Norum
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+ * Saskatchewan Accelerator Laboratory
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+ * University of Saskatchewan
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+ * 107 North Road
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+ * Saskatoon, Saskatchewan, CANADA
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+ * S7N 5C6
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+ *
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+ * This file is part of GDB.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+ */
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+
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+/*
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+ * Coldfire does it for us if we use PCC to get the PC
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+ */
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+#define DECR_PC_AFTER_BREAK 0
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+
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+/*
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+ * We have to control this directly as the CPU32 and Coldfire have different
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+ * breakpoint opcodes.
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+ */
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+#define BREAKPOINT_FROM_PC m68k_bdm_breakpoint_from_pc
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+
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+/*
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+ * Include the generic stuff
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+ */
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+#include "m68k/tm-m68k.h"
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+
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+/*
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+ * Override some of the generic definitions
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+ */
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+
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+/*
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+ * For uCLinux we need to detect we have a subroutine call
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+ * which is really a trap #0. This should be caught by the
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+ * the IN_SIGTRAMP handler defined above, but incase it is
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+ * not we should try and catch it here.
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+ */
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+
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+extern CORE_ADDR m68k_bdm_saved_pc_after_call PARAMS ((struct frame_info *));
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+
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+#undef SAVED_PC_AFTER_CALL
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+#define SAVED_PC_AFTER_CALL(frame) \
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+ m68k_bdm_saved_pc_after_call (frame)
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+
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+/*
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+ * we need 40 registers for the CPU32 and Coldfire:
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+ * 8 data registers
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+ * 8 address registers
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+ * 2 other registers (PC, PS)
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+ * 22 special registers (actual set depends on architecture)
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+ * 0 floating point registers
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+ */
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+#undef NUM_REGS
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+#undef REGISTER_BYTES
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+#define NUM_REGS 40
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+#define REGISTER_BYTES (16*4 + 2*4 + 22*4)
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+
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+#undef REGISTER_NAMES
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+#define REGISTER_NAME(i) bdm_register_name(i)
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+extern const char *bdm_register_name(int i);
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+
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+#undef FP0_REGNUM
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+#undef FPC_REGNUM
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+#undef FPS_REGNUM
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+#undef FPI_REGNUM
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+#define FP0_REGNUM 40 /* Floating point register 0 */
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+#define FPC_REGNUM FP0_REGNUM + 8 /* 68881 control register */
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+#define FPS_REGNUM FPC_REGNUM + 1 /* 68881 status register */
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+#define FPI_REGNUM FPS_REGNUM + 1 /* 68881 iaddr register */
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+
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+/*
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+ * The other definitions and macros don't need to be changed:
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+ * a) The Coldfire has no floating point registers
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+ * b) The REGISTER_BYTES_OK macro isn't used
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+ */
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+
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+#define TARGET_HAS_HARDWARE_WATCHPOINTS
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+
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+/* We need to remove watchpoints when stepping, else we hit them again! */
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+
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+#define HAVE_NONSTEPPABLE_WATCHPOINT
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+
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+#define STOPPED_BY_WATCHPOINT(w) cf_stopped_by_watchpoint ()
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+
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+/* Use these macros for watchpoint insertion/deletion. */
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+/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
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+
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+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
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+ cf_can_use_watchpoint (type, cnt, ot)
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+
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+#define target_insert_watchpoint(addr, len, type) cf_insert_watchpoint (addr, len, type)
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+#define target_remove_watchpoint(addr, len, type) cf_remove_watchpoint (addr, len, type)
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+#define target_insert_hw_breakpoint(addr, shadow) cf_insert_hw_breakpoint (addr, shadow)
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+#define target_remove_hw_breakpoint(addr, shadow) cf_remove_hw_breakpoint (addr, shadow)
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+#define target_stopped_data_address() cf_stopped_data_address ()
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diff -urN gdb-5.0.orig/gdb/configure.tgt gdb-5.0/gdb/configure.tgt
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--- gdb-5.0.orig/gdb/configure.tgt Sat May 27 16:55:49 2000
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+++ gdb-5.0/gdb/configure.tgt Tue Jan 23 16:44:03 2001
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@@ -150,6 +150,7 @@
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m68*-*bug-*) gdb_target=monitor ;;
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m68*-monitor-*) gdb_target=monitor ;;
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m68*-est-*) gdb_target=monitor ;;
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+m68*-bdm-*) gdb_target=bdm ;;
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m68*-*-aout*) gdb_target=monitor ;;
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m68*-*-coff*) gdb_target=monitor ;;
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m68*-*-elf*) gdb_target=monitor ;;
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diff -urN gdb-5.0.orig/gdb/doc/gdb.texinfo gdb-5.0/gdb/doc/gdb.texinfo
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--- gdb-5.0.orig/gdb/doc/gdb.texinfo Sat May 27 16:55:50 2000
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+++ gdb-5.0/gdb/doc/gdb.texinfo Tue Jan 23 16:44:03 2001
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@@ -10106,6 +10106,7 @@
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* i960:: Intel i960
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* M32R/D:: Mitsubishi M32R/D
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* M68K:: Motorola M68K
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+* Motorola BDM:: Motorola M68K/Coldfire Background Debug Mode
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* M88K:: Motorola M88K
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* MIPS Embedded:: MIPS Embedded
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* PA:: HP PA Embedded
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@@ -10747,6 +10748,10 @@
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@item target abug @var{dev}
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ABug ROM monitor for M68K.
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+@kindex target bdm
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+Background Debug Mode interface to Motorola 68k/Coldfire machine.
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+@xref{Motorola BDM Target, ,@value{GDBN} and Motorola 68k/Coldfire BDM}.
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+
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@kindex target cpu32bug
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@item target cpu32bug @var{dev}
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CPU32BUG monitor, running on a CPU32 (M68K) board.
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@@ -10785,6 +10790,101 @@
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ROMBUG ROM monitor for OS/9000.
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@end table
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+
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+
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+@node Motorola BDM
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+@subsection @value{GDBN} and Motorola BDM
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+
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+@cindex BDM
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+@cindex CPU32
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+@cindex Coldfire
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+Background Debug Mode (@dfn{BDM}) provides a full set of debug options
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+including the ability to:
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+@itemize @bullet
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+@item Insert breakpoints
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+@item Single-step
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+@item Display register contents
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+@item Display memory contents
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+@item Modify register contents
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+@item Modify memory contents
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+@end itemize
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+
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+A small interface circuit connects the BDM interface port on the
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+target machine to a parallel printer port on the debugging host.
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+A target system can be configured and a program downloaded and
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+executed with no bootstrap memory on the target machine and no other
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+connection between the debugging host and the target machine.
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+
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+The @code{target} command tells @value{GDBN}
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+to debug a program running on a target machine
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+@xref{Target Commands, ,Commands for managing targets}.
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+For example, the following command tells @value{GDBN} to use a BDM
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+interface connected to a ColdFire processor and the @code{LPT0} parallel port:
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+@example
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+target bdm /dev/bdmcf0
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+@end example
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+
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+Do not attempt to use the parallel port for any other purpose while
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+@value{GDBN} is using it to control a BDM target.
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+
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+Once the BDM target has been selected a few other commands become
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+available:
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+
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+@table @code
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+@item bdm_reset
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+@kindex bdm_reset
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+Reset the target machine and enable BDM operation in the target.
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+
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+@item bdm_restart
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+@kindex bdm_restart
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+Reset the target machine and disable BDM operation in the target.
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+This command is useful only if the target machine has some kind of
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+bootstrap memory installed.
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+
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+@item bdm_status
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+@kindex bdm_status
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+Print the status of the target machine and the BDM interface.
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+
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+@item bdm_setdelay @var{N}
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+@kindex bdm_setdelay
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+Some BDM interface circuits can not handle high-speed data transfer.
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+This command lets you insert a delay between each BDM clock.
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+The larger the value of @var{N}, the longer the delay.
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+On most machines the default delay of @var{0} should work just fine.
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+
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+@item bdm_setdebug @var{N}
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+@kindex bdm_setdebug
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+Setting the level (@var{N}) to a non-zero value turns on
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+debugging messages in the BDM support library.
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+
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+@item bdm_setdriverdebug @var{N}
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+@kindex bdm_setdriverdebug
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+Setting the level (@var{N}) to a non-zero value turns on
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+debugging messages in the BDM device driver.
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+
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+@end table
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+
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+The registers which can be displayed and modified are:
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+@itemize @bullet
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+@item The data registers: @code{$d0}-@code{$d7}
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+@item The address registers: @code{$a0}-@code{$a5}, @code{$fp}, @code{$sp}
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+@item The program counter: @code{$pc}
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+@item The status register: @code{$ps}
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+@item The program counter at the beginning of the most recently executed
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+instruction: @code{$pcc}
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+@item The user stack pointer: @code{$usp}
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+@item The supervisor stack pointer: @code{$ssp}
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+@item The source function code register: @code{$sfc}
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+@item The destinaton function code register: @code{$dfc}
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+@item The vector base register: @code{$vbr}
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+@item The fault address register: @code{$far}
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+@item The BDM temporary register: @code{$atemp}
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+@item The module base address register: @code{$mbar}
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+@end itemize
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+
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+Target processor interrupts are disabled during single-step (step, next,
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+stepi, nexti) operations.
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+
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@node M88K
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@subsection M88K
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diff -urN gdb-5.0.orig/gdb/remote-m68k-bdm.c gdb-5.0/gdb/remote-m68k-bdm.c
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--- gdb-5.0.orig/gdb/remote-m68k-bdm.c Thu Jan 1 10:00:00 1970
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+++ gdb-5.0/gdb/remote-m68k-bdm.c Sat Sep 1 16:49:14 2001
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@@ -0,0 +1,1676 @@
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+/*
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+ * Motorola Background Debug Mode Target
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+ * Copyright (C) 1995 W. Eric Norum
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+ * Copyright (C) 1998 Chris Johns (ccj@acm.org)
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+ * Copyright (C) 2000 Bryan Feir (bryan@sgl.crestech.ca)
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+ *
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+ * Based on:
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+ * 1. `A Background Debug Mode Driver Package for Motorola's
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+ * 16- and 32-Bit Microcontrollers', Scott Howard, Motorola
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+ * Canada, 1993.
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+ * 2. `Linux device driver for public domain BDM Interface',
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+ * M. Schraut, Technische Universitaet Muenchen, Lehrstuhl
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+ * fuer Prozessrechner, 1995.
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+ * 3. BDM support for gdb by W. Eric Norum
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+ * Saskatchewan Accelerator Laboratory
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+ * University of Saskatchewan
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+ * 107 North Road
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+ * Saskatoon, Saskatchewan, CANADA
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+ * S7N 5C6
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+ * 4. Coldfire support added by C Johns.
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+ * 5. Hardware breakpoint support added by B Feir.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+ *
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+ * W. Eric Norum
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+ * Saskatchewan Accelerator Laboratory
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+ * University of Saskatchewan
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+ * 107 North Road
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+ * Saskatoon, Saskatchewan, CANADA
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+ * S7N 5C6
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+ *
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+ * eric@skatter.usask.ca
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+ *
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+ * Coldfire support by:
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+ * Chris Johns
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+ * Objective Design Systems
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+ * 35 Cairo Street
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+ * Cammeray, Sydney, 2062, Australia
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+ *
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+ * ccj@acm.org
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+ *
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+ * Coldfire hardware breakpoint support by:
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+ * Bryan Feir
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+ * CRESTech (Centre for Research in Earth and Space Technology)
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+ * 4850 Keele Street, 1st floor
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+ * Toronto, Ontario, CANADA M6E 3E5
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+ *
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+ * bryan@sgl.crestech.ca
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+ */
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+
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+/*
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+ * $Revision: 1.1 $ $Date: 2004/03/28 23:13:10 $ $Author: codewiz $
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+ */
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+
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+#include "defs.h"
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+#include "gdbcore.h"
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+#include "target.h"
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+#include <unistd.h>
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+#include <stdlib.h>
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+#include <stdarg.h>
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+#include <errno.h>
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+#include <signal.h>
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+#include <string.h>
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+#include <stdio.h>
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+#include <fcntl.h>
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+#include <ctype.h>
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+#include <sys/types.h>
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+#include <sys/ioctl.h>
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+#include <sys/time.h>
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+#include "command.h"
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+#include "inferior.h"
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+#include "value.h"
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+#include "breakpoint.h"
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+#include "BDMlib.h"
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+
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+extern struct target_ops bdm_ops; /* Forward declaration */
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+
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+/*
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+ * The name of the BDM driver special file
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+ */
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+static char *dev_name;
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+static int cpu_type;
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+
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+/*
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+ * The different register names for the processors.
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+ */
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+static const char *cpu32plus_reg_names[NUM_REGS] = {
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+ "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
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+ "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp",
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+ "ps", "pc",
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+ "pcc", "usp", "ssp", "sfc", "dfc", "atemp", "far",
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+ "vbr",
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+ NULL, NULL, NULL, NULL,
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+ "mbar",
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+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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+};
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+
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+static const char *cpu32_reg_names[NUM_REGS] = {
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+ "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
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+ "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp",
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+ "ps", "pc",
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+ "pcc", "usp", "ssp", "sfc", "dfc", NULL, NULL,
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+ "vbr",
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+ NULL, NULL, NULL, NULL,
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+ NULL,
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+ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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+};
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+
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+static const char *cf_reg_names[NUM_REGS] = {
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+ "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
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+ "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp",
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+ "ps", "pc",
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+ NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
|
+ "vbr",
|
|
+ "cacr", "acr0", "acr1", "rambar",
|
|
+ "mbar",
|
|
+ "csr", "aatr", "tdr", "pbr", "pbmr", "abhr", "ablr", "dbr", "dbmr",
|
|
+};
|
|
+
|
|
+static const char **bdm_reg_names = cpu32plus_reg_names;
|
|
+
|
|
+const char *bdm_register_name(int i)
|
|
+{
|
|
+ if ((i < 0) || (i >= NUM_REGS))
|
|
+ return NULL;
|
|
+ return bdm_reg_names[i];
|
|
+}
|
|
+
|
|
+static int reg_to_dev_num[] =
|
|
+{ BDM_REG_SR,
|
|
+ BDM_REG_RPC,
|
|
+ BDM_REG_PCC,
|
|
+ BDM_REG_USP,
|
|
+ BDM_REG_SSP,
|
|
+ BDM_REG_SFC,
|
|
+ BDM_REG_DFC,
|
|
+ BDM_REG_ATEMP,
|
|
+ BDM_REG_FAR,
|
|
+ BDM_REG_VBR,
|
|
+ BDM_REG_CACR,
|
|
+ BDM_REG_ACR0,
|
|
+ BDM_REG_ACR1,
|
|
+ BDM_REG_RAMBAR,
|
|
+ BDM_REG_MBAR,
|
|
+ BDM_REG_CSR,
|
|
+ BDM_REG_AATR,
|
|
+ BDM_REG_TDR,
|
|
+ BDM_REG_PBR,
|
|
+ BDM_REG_PBMR,
|
|
+ BDM_REG_ABHR,
|
|
+ BDM_REG_ABLR,
|
|
+ BDM_REG_DBR,
|
|
+ BDM_REG_DBMR
|
|
+ };
|
|
+
|
|
+/*
|
|
+ * The name of the most recently loaded program
|
|
+ */
|
|
+static char *bdm_prog_loaded;
|
|
+
|
|
+/*
|
|
+ * default delay for interface
|
|
+ */
|
|
+#define BDM_DEFAULT_DELAY 0
|
|
+static int bdm_delay = -1;
|
|
+
|
|
+/*
|
|
+ * does gdb wait or not, only valid for a Coldfire processor
|
|
+ */
|
|
+static int bdm_gdb_no_wait = 0;
|
|
+
|
|
+/*
|
|
+ * Hold BDM ATEMP register (CPU32 only).
|
|
+ */
|
|
+static unsigned long atemp;
|
|
+static int haveAtemp;
|
|
+
|
|
+static int hit_watchpoint;
|
|
+
|
|
+/*
|
|
+ * CF BDM Debug hardware version number.
|
|
+ */
|
|
+
|
|
+static unsigned long cf_debug_ver;
|
|
+
|
|
+/*
|
|
+ * Not sure if this is defined somewhere. Cannot see anywhere.
|
|
+ */
|
|
+extern int (*ui_loop_hook) (int);
|
|
+
|
|
+/*
|
|
+ * Forward declarations
|
|
+ */
|
|
+static void bdm_load (char *, int);
|
|
+
|
|
+/*
|
|
+ * give target time to come up after reset
|
|
+ * time in usec
|
|
+ */
|
|
+#define TIME_TO_COME_UP 60000
|
|
+
|
|
+/*
|
|
+ * Downloader routines
|
|
+ */
|
|
+static int downLoaderReturn;
|
|
+static int downLoaderFirst;
|
|
+static unsigned long downLoadBaseAddress, downLoadStartAddress;
|
|
+static int bdmDebugLevel;
|
|
+static const char *downloadErrorString;
|
|
+
|
|
+static void
|
|
+downloadSection (bfd *abfd, sec_ptr sec, PTR ignore)
|
|
+{
|
|
+ unsigned long dfc;
|
|
+ unsigned long address;
|
|
+ unsigned long nleft;
|
|
+ int count;
|
|
+ file_ptr offset;
|
|
+ char cbuf[1024];
|
|
+
|
|
+ /*
|
|
+ * See if the section needs loading
|
|
+ */
|
|
+ if (bdmDebugLevel)
|
|
+ printf_filtered ("Section flags:%#x", bfd_get_section_flags (abfd, sec));
|
|
+ if ((downLoaderReturn < 0) ||
|
|
+ ((bfd_get_section_flags (abfd, sec) & SEC_HAS_CONTENTS) == 0) ||
|
|
+ ((bfd_get_section_flags (abfd, sec) & SEC_LOAD) == 0))
|
|
+ return;
|
|
+ address = bfd_section_lma (abfd, sec);
|
|
+ if (bdmDebugLevel)
|
|
+ printf_filtered ("Section address:%#x", address);
|
|
+ if (downLoaderFirst && (bfd_get_section_flags (abfd, sec) & SEC_CODE)) {
|
|
+ downLoadStartAddress = bfd_get_start_address (abfd);
|
|
+ downLoadBaseAddress = address;
|
|
+ downLoaderFirst = 0;
|
|
+ if (bdmDebugLevel)
|
|
+ printf_filtered ("Start address:%#x Base address:%#x", downLoadStartAddress, downLoadBaseAddress);
|
|
+ }
|
|
+
|
|
+ /*
|
|
+ * Set the appropriate destination address space
|
|
+ */
|
|
+ if (bfd_get_section_flags (abfd, sec) & SEC_CODE)
|
|
+ dfc = 0x6; /* Supervisor program space */
|
|
+ else
|
|
+ dfc = 0x5; /* Supervisor data space */
|
|
+ if (bdmWriteSystemRegister (BDM_REG_DFC, dfc) < 0) {
|
|
+ downLoaderReturn = -1;
|
|
+ return;
|
|
+ }
|
|
+
|
|
+ /*
|
|
+ * Load the section in `sizeof cbuf` chunks
|
|
+ */
|
|
+ nleft = bfd_get_section_size_before_reloc (sec);
|
|
+ if (nleft == 0)
|
|
+ return;
|
|
+ offset = 0;
|
|
+ while (nleft) {
|
|
+ if (nleft > sizeof cbuf)
|
|
+ count = sizeof cbuf;
|
|
+ else
|
|
+ count = nleft;
|
|
+ if (!bfd_get_section_contents (abfd, sec, cbuf, offset, count)) {
|
|
+ downloadErrorString = "Error reading section contents";
|
|
+ downLoaderReturn = -1;
|
|
+ return;
|
|
+ }
|
|
+ if (bdmWriteMemory (address, cbuf, count) < 0) {
|
|
+ downLoaderReturn = -1;
|
|
+ return;
|
|
+ }
|
|
+ address += count;
|
|
+ offset += count;
|
|
+ nleft -= count;
|
|
+ }
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Load an executable image into the target
|
|
+ */
|
|
+static int
|
|
+loadExecutable (const char *name)
|
|
+{
|
|
+ bfd *abfd;
|
|
+ unsigned long dfc;
|
|
+ unsigned long l;
|
|
+
|
|
+ /*
|
|
+ * Make sure target is there
|
|
+ */
|
|
+ if (!bdmCheck ())
|
|
+ return -1;
|
|
+
|
|
+ /*
|
|
+ * Open and verify the file
|
|
+ */
|
|
+ bfd_init ();
|
|
+ abfd = bfd_openr (name, "default");
|
|
+ if (abfd == NULL) {
|
|
+ downloadErrorString = bfd_errmsg (bfd_get_error());
|
|
+ return -1;
|
|
+ }
|
|
+ if (!bfd_check_format (abfd, bfd_object)) {
|
|
+ downloadErrorString = "Not an object file";
|
|
+ return -1;
|
|
+ }
|
|
+
|
|
+ /*
|
|
+ * Save the destination function code register
|
|
+ */
|
|
+ if (bdmReadSystemRegister (BDM_REG_DFC, &dfc) < 0)
|
|
+ return -1;
|
|
+
|
|
+ /*
|
|
+ * Load each section of the executable file
|
|
+ */
|
|
+ downLoaderFirst = 1;
|
|
+ downLoaderReturn = 0;
|
|
+ bfd_map_over_sections (abfd, downloadSection, NULL);
|
|
+ if (downLoaderReturn < 0)
|
|
+ return -1;
|
|
+
|
|
+ /*
|
|
+ * Set up stack pointer and program counter
|
|
+ */
|
|
+ if ((bdmReadLongWord (downLoadBaseAddress, &l) < 0)
|
|
+ || (bdmWriteSystemRegister (BDM_REG_SSP, l) < 0)
|
|
+ || (bdmReadLongWord (downLoadBaseAddress+4, &l) < 0)
|
|
+ || (bdmWriteSystemRegister (BDM_REG_RPC, l) < 0)
|
|
+ || (bdmWriteSystemRegister (BDM_REG_VBR, downLoadBaseAddress) < 0)
|
|
+ || (bdmWriteSystemRegister (BDM_REG_DFC, dfc) < 0))
|
|
+ return -1;
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+/*
|
|
+ * The breakpoint codes for the different processors
|
|
+ */
|
|
+static char cpu32_breakpoint[] = {0x4a, 0xfa};
|
|
+static char cf_breakpoint[] = {0x4a, 0xc8};
|
|
+static char *breakpointCode;
|
|
+static int breakpointSize;
|
|
+
|
|
+static int cf_init_watchpoints();
|
|
+
|
|
+/* Immediately after a function call, return the saved pc before the frame
|
|
+ is setup. For uCLinux which uses a TRAP #0 for a system call we need to
|
|
+ read the first long word of the stack to see if the stack frame format is
|
|
+ type 4 and the vector is 32 (0x4080), and the opcode at the PC is
|
|
+ "move.w #0x2700,sr". If it is then get the second long from the stack. */
|
|
+
|
|
+CORE_ADDR
|
|
+m68k_bdm_saved_pc_after_call (frame)
|
|
+ struct frame_info *frame;
|
|
+{
|
|
+ unsigned int op;
|
|
+ unsigned int eframe;
|
|
+ int sp;
|
|
+
|
|
+ sp = read_register (SP_REGNUM);
|
|
+ eframe = read_memory_integer (sp, 2);
|
|
+ op = read_memory_integer (frame->pc, 4);
|
|
+
|
|
+ /*
|
|
+ * This test could break if some changes the syste call.
|
|
+ */
|
|
+
|
|
+ if (eframe == 0x4080 && op == 0x46fc2700)
|
|
+ return read_memory_integer (sp + 4, 4);
|
|
+ else
|
|
+ return read_memory_integer (sp, 4);
|
|
+}
|
|
+
|
|
+unsigned char *m68k_bdm_breakpoint_from_pc (pcptr, lenptr)
|
|
+ CORE_ADDR *pcptr;
|
|
+ int *lenptr;
|
|
+{
|
|
+ *lenptr = breakpointSize;
|
|
+ return breakpointCode;
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Short pause
|
|
+ */
|
|
+static void
|
|
+nap (int microseconds)
|
|
+{
|
|
+ struct timeval tv;
|
|
+
|
|
+ tv.tv_sec = microseconds / 1000000;
|
|
+ tv.tv_usec = microseconds % 1000000;
|
|
+ select (0, NULL, NULL, NULL, &tv);
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Display error message and jump back to main input loop
|
|
+ */
|
|
+static void
|
|
+bdm_report_error (void)
|
|
+{
|
|
+ error ("BDM error: %s", bdmErrorString ());
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Initialize bdm interface port
|
|
+ */
|
|
+static void
|
|
+bdm_init (int tty, char *arg)
|
|
+{
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Return interface status
|
|
+ */
|
|
+static int
|
|
+bdm_get_status (void)
|
|
+{
|
|
+ int status;
|
|
+
|
|
+ if ((status = bdmStatus ()) < 0)
|
|
+ bdm_report_error ();
|
|
+ return status;
|
|
+}
|
|
+
|
|
+static void
|
|
+bdm_get_status_interactive (int pid, char *arg)
|
|
+{
|
|
+ printf ("BDM status: 0x%x\n", bdm_get_status ());
|
|
+}
|
|
+
|
|
+/*
|
|
+ * release chip: reset and disable bdm mode
|
|
+ */
|
|
+static void
|
|
+bdm_release_chip (void)
|
|
+{
|
|
+ haveAtemp = 0;
|
|
+ registers_changed ();
|
|
+ if (bdmRelease () < 0)
|
|
+ bdm_report_error ();
|
|
+}
|
|
+
|
|
+/*
|
|
+ * stop chip
|
|
+ */
|
|
+static void
|
|
+bdm_stop_chip (void)
|
|
+{
|
|
+ if (bdmStop () < 0)
|
|
+ bdm_report_error ();
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Allow chip to resume execution
|
|
+ */
|
|
+static void
|
|
+bdm_go (void)
|
|
+{
|
|
+ haveAtemp = 0;
|
|
+ if (bdmGo () < 0)
|
|
+ bdm_report_error ();
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Reset chip, enter BDM mode
|
|
+ */
|
|
+static void
|
|
+bdm_reset (void)
|
|
+{
|
|
+ registers_changed ();
|
|
+ if (bdmReset () < 0)
|
|
+ bdm_report_error ();
|
|
+ nap (TIME_TO_COME_UP);
|
|
+}
|
|
+
|
|
+/*
|
|
+ * step cpu32 chip: execute a single instruction
|
|
+ * This is complicated by the presence of interrupts.
|
|
+ * Consider the following sequence of events:
|
|
+ * - User attempts to `continue' from a breakpoint.
|
|
+ * - Gdb calls bdm_step_chip to single-step the instruction that
|
|
+ * had been replaced by the BGND instruction.
|
|
+ * - The target processor executes the instruction and stops.
|
|
+ * - GDB replaces the instruction with a BGND instruction to
|
|
+ * force a breakpoint the next time the instruction is hit.
|
|
+ * - GDB calls bdm_go and the target resumes execution.
|
|
+ * This all seems fine, but now consider what happens when a interrupt
|
|
+ * is pending:
|
|
+ * - User attempts to `continue' from a breakpoint.
|
|
+ * - Gdb calls bdm_step_chip to single-step the instruction that
|
|
+ * had been replaced by the BGND instruction.
|
|
+ * - The target processor does not execute the replaced instruction,
|
|
+ * but rather executes the first instruction of the interrupt
|
|
+ * service routine, then stops.
|
|
+ * - GDB replaces the instruction with a BGND instruction to
|
|
+ * force a breakpoint the next time the instruction is hit.
|
|
+ * - GDB calls bdm_go and the target resumes execution.
|
|
+ * - The target finishes off the interrupt, and upon returing from
|
|
+ * the interrupt generates another breakpoint!
|
|
+ * The solution is simple -- disable interrupts when single stepping.
|
|
+ * The problem then becomes the handling of instructions which involve
|
|
+ * the program status word!
|
|
+ */
|
|
+static void
|
|
+bdm_step_cpu32_chip (void)
|
|
+{
|
|
+ unsigned long pc;
|
|
+ unsigned short instruction;
|
|
+ unsigned short immediate;
|
|
+ unsigned long d7;
|
|
+ unsigned long sr;
|
|
+ unsigned long nsr;
|
|
+ enum {
|
|
+ op_other,
|
|
+ op_ANDIsr,
|
|
+ op_EORIsr,
|
|
+ op_ORIsr,
|
|
+ op_TOsr,
|
|
+ op_FROMsr,
|
|
+ op_FROMsrTOd7
|
|
+ } op;
|
|
+
|
|
+ /*
|
|
+ * Get the existing status register
|
|
+ */
|
|
+ if (bdmReadSystemRegister (BDM_REG_SR, &sr) < 0)
|
|
+ bdm_report_error ();
|
|
+
|
|
+ /*
|
|
+ * Read the instuction about to be executed
|
|
+ */
|
|
+ if ((bdmReadSystemRegister (BDM_REG_RPC, &pc) < 0)
|
|
+ || (bdmReadWord (pc, &instruction) < 0))
|
|
+ bdm_report_error ();
|
|
+
|
|
+ /*
|
|
+ * See what operation is to be performed
|
|
+ */
|
|
+ if (instruction == 0x027C)
|
|
+ op = op_ANDIsr;
|
|
+ else if (instruction == 0x0A7C)
|
|
+ op = op_EORIsr;
|
|
+ else if (instruction == 0x007C)
|
|
+ op = op_ORIsr;
|
|
+ else if (instruction == 0x40C7)
|
|
+ op = op_FROMsrTOd7;
|
|
+ else if ((instruction & 0xFFC0) == 0x40C0)
|
|
+ op = op_FROMsr;
|
|
+ else if ((instruction & 0xFFC0) == 0x46C0)
|
|
+ op = op_TOsr;
|
|
+ else
|
|
+ op = op_other;
|
|
+
|
|
+ /*
|
|
+ * Set things up for the single-step operation
|
|
+ */
|
|
+ switch (op) {
|
|
+ case op_FROMsr:
|
|
+ /*
|
|
+ * It's storing the SR somewhere.
|
|
+ * Store the SR in D7 and change the instruction
|
|
+ * to save D7. This fails if the addressing mode
|
|
+ * is one of the esoteric modes that uses D7 as
|
|
+ * and index register, but we'll just have to hope
|
|
+ * that doesn't happen too often.
|
|
+ */
|
|
+ if ((bdmReadRegister (7, &d7) < 0)
|
|
+ || (bdmWriteRegister (7, sr) < 0)
|
|
+ || (bdmWriteWord (pc, 0x3007 |
|
|
+ ((instruction & 0x38) << 3) |
|
|
+ ((instruction & 0x07) << 9)) < 0))
|
|
+ bdm_report_error ();
|
|
+ break;
|
|
+
|
|
+ case op_ANDIsr:
|
|
+ case op_EORIsr:
|
|
+ case op_ORIsr:
|
|
+ /*
|
|
+ * It's an immediate operation to the SR -- pick up the value
|
|
+ */
|
|
+ if (bdmReadWord (pc+2, &immediate) < 0)
|
|
+ bdm_report_error ();
|
|
+ break;
|
|
+
|
|
+ case op_TOsr:
|
|
+ case op_other:
|
|
+ break;
|
|
+ }
|
|
+
|
|
+ /*
|
|
+ * Ensure the step is done with interrupts disabled
|
|
+ */
|
|
+ if (bdmWriteSystemRegister (BDM_REG_SR, sr | 0x0700) < 0)
|
|
+ bdm_report_error ();
|
|
+
|
|
+ /*
|
|
+ * Do the single-step
|
|
+ */
|
|
+ if (bdmStep () < 0)
|
|
+ bdm_report_error ();
|
|
+
|
|
+ /*
|
|
+ * Get the ATEMP register since the following operations may
|
|
+ * modify it.
|
|
+ */
|
|
+ if (bdmReadSystemRegister (BDM_REG_ATEMP, &atemp) < 0)
|
|
+ bdm_report_error ();
|
|
+ haveAtemp = 1;
|
|
+
|
|
+ /*
|
|
+ * Clean things up
|
|
+ */
|
|
+ switch (op) {
|
|
+ case op_FROMsr:
|
|
+ if ((bdmWriteRegister (7, d7) < 0)
|
|
+ || (bdmWriteWord (pc, instruction) < 0)
|
|
+ || (bdmWriteSystemRegister (BDM_REG_SR, sr) < 0))
|
|
+ bdm_report_error ();
|
|
+ break;
|
|
+
|
|
+ case op_FROMsrTOd7:
|
|
+ if ((bdmReadRegister (7, &d7) < 0)
|
|
+ || (bdmWriteRegister (7, (d7 & ~0xFFFF) | (sr & 0xFFFF)) < 0)
|
|
+ || (bdmWriteSystemRegister (BDM_REG_SR, sr) < 0))
|
|
+ bdm_report_error ();
|
|
+ break;
|
|
+
|
|
+ case op_ANDIsr:
|
|
+ if (bdmWriteSystemRegister (BDM_REG_SR, sr & immediate) < 0)
|
|
+ bdm_report_error ();
|
|
+ break;
|
|
+
|
|
+ case op_EORIsr:
|
|
+ if (bdmWriteSystemRegister (BDM_REG_SR, sr ^ immediate) < 0)
|
|
+ bdm_report_error ();
|
|
+ break;
|
|
+
|
|
+ case op_ORIsr:
|
|
+ if (bdmWriteSystemRegister (BDM_REG_SR, sr | immediate) < 0)
|
|
+ bdm_report_error ();
|
|
+ break;
|
|
+
|
|
+ case op_TOsr:
|
|
+ break;
|
|
+
|
|
+ case op_other:
|
|
+ if ((bdmReadSystemRegister (BDM_REG_SR, &nsr) < 0)
|
|
+ || (bdmWriteSystemRegister (BDM_REG_SR, (nsr & ~0x0700) | (sr & 0x0700)) < 0))
|
|
+ bdm_report_error ();
|
|
+ break;
|
|
+ }
|
|
+}
|
|
+
|
|
+static void
|
|
+bdm_step_chip (void)
|
|
+{
|
|
+ /*
|
|
+ * The cpu32 is harder to step than the Coldfire.
|
|
+ */
|
|
+ if (cpu_type == BDM_CPU32) {
|
|
+ bdm_step_cpu32_chip();
|
|
+ return;
|
|
+ }
|
|
+
|
|
+ /*
|
|
+ * Do the single-step
|
|
+ */
|
|
+ if (bdmStep () < 0)
|
|
+ bdm_report_error ();
|
|
+}
|
|
+
|
|
+/*
|
|
+ * true if runnable
|
|
+ */
|
|
+static int
|
|
+bdm_can_run (void)
|
|
+{
|
|
+ return 1;
|
|
+}
|
|
+
|
|
+static void
|
|
+bdm_setdelay(int delay)
|
|
+{
|
|
+ if (bdmSetDelay (delay) < 0)
|
|
+ bdm_report_error ();
|
|
+}
|
|
+
|
|
+static void
|
|
+bdm_setdelay_interactive (char *arg, int from_tty)
|
|
+{
|
|
+ char *dummy;
|
|
+
|
|
+ if (!arg) {
|
|
+ if (bdm_delay >= 0)
|
|
+ printf_filtered("bdm_delay is %d", bdm_delay);
|
|
+ else
|
|
+ printf_filtered("using default delay %d", BDM_DEFAULT_DELAY);
|
|
+ }
|
|
+ else {
|
|
+ bdm_delay = strtoul(arg, &dummy, 0);
|
|
+ bdm_setdelay (bdm_delay);
|
|
+ }
|
|
+}
|
|
+
|
|
+static void
|
|
+bdm_setdebug_interactive (char *arg, int from_tty)
|
|
+{
|
|
+ char *dummy;
|
|
+
|
|
+ if (arg) {
|
|
+ bdmDebugLevel = strtoul(arg, &dummy, 0);
|
|
+ bdmSetDebugFlag (bdmDebugLevel);
|
|
+ }
|
|
+ else
|
|
+ error ("Argument missing");
|
|
+}
|
|
+
|
|
+static void
|
|
+bdm_setdriverdebug_interactive (char *arg, int from_tty)
|
|
+{
|
|
+ char *dummy;
|
|
+
|
|
+ if (arg)
|
|
+ bdmSetDriverDebugFlag (strtoul(arg, &dummy, 0));
|
|
+ else
|
|
+ error ("Argument missing");
|
|
+}
|
|
+
|
|
+static void
|
|
+bdm_set_no_wait (char *arg, int from_tty)
|
|
+{
|
|
+ bdm_gdb_no_wait = 1;
|
|
+}
|
|
+
|
|
+static void
|
|
+bdm_set_wait (char *arg, int from_tty)
|
|
+{
|
|
+ if (cpu_type == BDM_CPU32) {
|
|
+ error ("No wait mode is not supported on a CPU32");
|
|
+ return;
|
|
+ }
|
|
+ if (bdm_get_status ())
|
|
+ bdm_gdb_no_wait = 0;
|
|
+ else
|
|
+ error ("The target is running, please stop first");
|
|
+}
|
|
+
|
|
+static void
|
|
+bdm_issue_stop (char *arg, int from_tty)
|
|
+{
|
|
+ bdm_stop_chip ();
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Open a connection the target via bdm
|
|
+ * name is the devicename of bdm and the filename to be used
|
|
+ * used for communication.
|
|
+ */
|
|
+static void
|
|
+bdm_open (char *name, int from_tty)
|
|
+{
|
|
+ char *p;
|
|
+ int version;
|
|
+ unsigned long csr;
|
|
+
|
|
+ if (bdmIsOpen ())
|
|
+ error ("Bdm is already open, must close it first");
|
|
+ if (name == NULL)
|
|
+ error ("Use `target bdm <DEVICE-NAME>' to use the bdm target");
|
|
+
|
|
+ /*
|
|
+ * Find the first whitespace character after device and chop it off
|
|
+ */
|
|
+ for (p = name; (*p != '\0') && (!isspace (*p)); p++) ;
|
|
+ if ((*p == '\0') && (p == name))
|
|
+ error ("Please include the name the bdm port device.");
|
|
+ dev_name = savestring (name, p - name);
|
|
+
|
|
+ target_preopen (from_tty);
|
|
+ unpush_target (&bdm_ops);
|
|
+
|
|
+ if (bdmOpen (dev_name) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (bdmStatus () & (BDM_TARGETPOWER | BDM_TARGETNC)) {
|
|
+ bdmClose ();
|
|
+ error ("Target or cable problem");
|
|
+ }
|
|
+
|
|
+ /*
|
|
+ * Ask the driver for it's version.
|
|
+ * We are only interested in the major number when checking the
|
|
+ * driver version number.
|
|
+ */
|
|
+ if (bdmGetDrvVersion (&version) < 0)
|
|
+ bdm_report_error ();
|
|
+ if ((version & 0xff00) != (BDM_DRV_VERSION & 0xff00)) {
|
|
+ printf_filtered ("Incorrect driver version, looking for %i.%i and found %i.%i\n",
|
|
+ BDM_DRV_VERSION >> 8, BDM_DRV_VERSION & 0xff,
|
|
+ version >> 8, version & 0xff);
|
|
+ bdmClose ();
|
|
+ error ("Can't run with wrong BDM driver");
|
|
+ }
|
|
+
|
|
+ /*
|
|
+ * Get the processor type.
|
|
+ */
|
|
+ if (bdmGetProcessor (&cpu_type) < 0)
|
|
+ bdm_report_error ();
|
|
+ switch (cpu_type) {
|
|
+ case BDM_CPU32:
|
|
+ bdm_reg_names = cpu32_reg_names;
|
|
+ breakpointCode = cpu32_breakpoint;
|
|
+ breakpointSize = sizeof cpu32_breakpoint;
|
|
+ break;
|
|
+
|
|
+ case BDM_COLDFIRE:
|
|
+ bdm_reg_names = cf_reg_names;
|
|
+ breakpointCode = cf_breakpoint;
|
|
+ breakpointSize = sizeof cf_breakpoint;
|
|
+ cf_init_watchpoints();
|
|
+
|
|
+ /*
|
|
+ * Read the CSR register to determine the debug module
|
|
+ * version.
|
|
+ */
|
|
+ if (bdmReadSystemRegister (BDM_REG_CSR, &csr) < 0)
|
|
+ bdm_report_error ();
|
|
+ cf_debug_ver = (csr >> 20) & 0x0f;
|
|
+ break;
|
|
+
|
|
+ default:
|
|
+ bdmClose ();
|
|
+ error ("Unknown processor type returned from the driver.");
|
|
+ }
|
|
+
|
|
+ push_target (&bdm_ops);
|
|
+
|
|
+ if (bdm_delay >= 0)
|
|
+ bdm_setdelay (bdm_delay);
|
|
+ else
|
|
+ bdm_setdelay (BDM_DEFAULT_DELAY);
|
|
+ if (from_tty)
|
|
+ printf_filtered ("Remote %s connected to %s\n", target_shortname, dev_name);
|
|
+ if (cpu_type == BDM_COLDFIRE)
|
|
+ printf_filtered (" Coldfire debug module version is %d (%s)\n",
|
|
+ cf_debug_ver,
|
|
+ cf_debug_ver == 0 ? "5206(e)" : "5307/5407(e)");
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Terminate current application and return to system prompt.
|
|
+ * On a target, just let the program keep on running
|
|
+ */
|
|
+static void
|
|
+bdm_kill (void)
|
|
+{
|
|
+ if (bdm_get_status () & BDM_TARGETSTOPPED)
|
|
+ bdm_go ();
|
|
+}
|
|
+
|
|
+static void
|
|
+bdm_close (quitting)
|
|
+int quitting;
|
|
+{
|
|
+ if (quitting)
|
|
+ bdm_kill ();
|
|
+ bdmClose ();
|
|
+}
|
|
+
|
|
+/*
|
|
+ * _detach -- Terminate the open connection to the remote debugger.
|
|
+ * takes a program previously attached to and detaches it.
|
|
+ * We better not have left any breakpoints
|
|
+ * in the program or it'll die when it hits one.
|
|
+ * Close the open connection to the remote debugger.
|
|
+ * Use this when you want to detach and do something else
|
|
+ * with your gdb.
|
|
+ */
|
|
+static void
|
|
+bdm_detach (char *args, int from_tty)
|
|
+{
|
|
+ pop_target (); /* calls bdm_close to do the real work */
|
|
+}
|
|
+
|
|
+/*
|
|
+ * _resume -- Tell the remote machine to resume.
|
|
+ */
|
|
+static void
|
|
+bdm_resume (int pid, int step, enum target_signal sig)
|
|
+{
|
|
+ if (step)
|
|
+ bdm_step_chip ();
|
|
+ else
|
|
+ bdm_go ();
|
|
+}
|
|
+
|
|
+/*
|
|
+ * We have fallen into an exception supported by the runtime system.
|
|
+ * by executing a `breakpoint' instruction.
|
|
+ */
|
|
+static void
|
|
+analyze_exception (struct target_waitstatus *status)
|
|
+{
|
|
+ unsigned long pc, sp;
|
|
+ unsigned short vec;
|
|
+ char opcode[20]; /* `big enough' */
|
|
+
|
|
+ if (cpu_type == BDM_CPU32) {
|
|
+ if (bdmReadSystemRegister (BDM_REG_PCC, &pc) < 0)
|
|
+ bdm_report_error ();
|
|
+ }
|
|
+ else {
|
|
+ if (bdmReadSystemRegister (BDM_REG_RPC, &pc) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (pc)
|
|
+ pc -= 2;
|
|
+ }
|
|
+ status->kind = TARGET_WAITKIND_STOPPED;
|
|
+
|
|
+ /*
|
|
+ * See if it was a `breakpoint' instruction
|
|
+ */
|
|
+ if (bdmReadMemory (pc, opcode, breakpointSize) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (memcmp (breakpointCode, opcode, breakpointSize) == 0) {
|
|
+ if (bdmWriteSystemRegister (BDM_REG_RPC, pc) < 0)
|
|
+ bdm_report_error ();
|
|
+ status->value.sig = TARGET_SIGNAL_TRAP;
|
|
+ return;
|
|
+ }
|
|
+ /*
|
|
+ * FIXME: Why an illegal instruction signal ?
|
|
+ */
|
|
+ status->value.sig = TARGET_SIGNAL_ILL;
|
|
+}
|
|
+
|
|
+static int sigintFlag;
|
|
+static void
|
|
+bdm_signal_handler (int s)
|
|
+{
|
|
+ sigintFlag++;
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Wait until the remote machine stops, then return,
|
|
+ * storing status in status just as `wait' would.
|
|
+ */
|
|
+static int
|
|
+bdm_wait (int pid, struct target_waitstatus *status)
|
|
+{
|
|
+ unsigned long csr;
|
|
+ int bdm_stat;
|
|
+ int detach = 0;
|
|
+ int ui_count = 0;
|
|
+ void (*ofunc) ();
|
|
+
|
|
+ hit_watchpoint = 0;
|
|
+ if (bdm_gdb_no_wait) {
|
|
+ status->kind = TARGET_WAITKIND_STOPPED;
|
|
+ status->value.sig = TARGET_SIGNAL_GRANT;
|
|
+ return 0;
|
|
+ }
|
|
+
|
|
+ status->kind = TARGET_WAITKIND_EXITED;
|
|
+ status->value.integer = 0;
|
|
+
|
|
+ /*
|
|
+ * Catch SIGINT signals
|
|
+ */
|
|
+ sigintFlag = 0;
|
|
+ ofunc = signal (SIGINT, bdm_signal_handler);
|
|
+
|
|
+ /*
|
|
+ * A work around a problem with the 5206e processor. Not sure
|
|
+ * what the issue is. It could be the processor.
|
|
+ */
|
|
+ if (cpu_type == BDM_COLDFIRE && cf_debug_ver == 0)
|
|
+ nap (10000);
|
|
+
|
|
+ /*
|
|
+ * Wait here till the target requires service
|
|
+ */
|
|
+ while ((bdm_stat = bdm_get_status ()) == 0) {
|
|
+ ui_count = 0;
|
|
+ while (ui_count++ < 6) {
|
|
+ nap (50000);
|
|
+
|
|
+ /* N.B. The UI may destroy our world (for instance by calling
|
|
+ remote_stop,) in which case we want to get out of here as
|
|
+ quickly as possible. It is not safe to touch scb, since
|
|
+ someone else might have freed it. The ui_loop_hook signals that
|
|
+ we should exit by returning 1. */
|
|
+
|
|
+ if (ui_loop_hook)
|
|
+ detach = ui_loop_hook (0);
|
|
+
|
|
+ if (detach || sigintFlag)
|
|
+ bdm_stop_chip ();
|
|
+ }
|
|
+ }
|
|
+
|
|
+ signal (SIGINT, ofunc);
|
|
+
|
|
+ /*
|
|
+ * Determine why the target stopped
|
|
+ */
|
|
+ switch (bdm_stat) {
|
|
+ case BDM_TARGETNC:
|
|
+ status->kind = TARGET_WAITKIND_EXITED;
|
|
+ status->value.integer = 9999;
|
|
+ break;
|
|
+ case BDM_TARGETPOWER:
|
|
+ status->kind = TARGET_WAITKIND_STOPPED;
|
|
+ status->value.sig = TARGET_SIGNAL_PWR;
|
|
+ break;
|
|
+ case BDM_TARGETRESET:
|
|
+ status->kind = TARGET_WAITKIND_STOPPED;
|
|
+ status->value.sig = TARGET_SIGNAL_ABRT;
|
|
+ break;
|
|
+ case BDM_TARGETSTOPPED:
|
|
+ case BDM_TARGETHALT:
|
|
+ case BDM_TARGETSTOPPED | BDM_TARGETHALT:
|
|
+ if (sigintFlag) {
|
|
+ status->kind = TARGET_WAITKIND_STOPPED;
|
|
+ status->value.sig = TARGET_SIGNAL_TSTP;
|
|
+ }
|
|
+ else {
|
|
+ if (cpu_type == BDM_CPU32) {
|
|
+ if (!haveAtemp
|
|
+ && (bdmReadSystemRegister (BDM_REG_ATEMP, &atemp) < 0))
|
|
+ bdm_report_error ();
|
|
+ switch (atemp & 0xffff) {
|
|
+ case 0xffff: /* double bus fault */
|
|
+ status->kind = TARGET_WAITKIND_STOPPED;
|
|
+ status->value.sig = TARGET_SIGNAL_BUS;
|
|
+ break;
|
|
+ case 0x0: /* HW bkpt */
|
|
+ status->kind = TARGET_WAITKIND_STOPPED;
|
|
+ status->value.sig = TARGET_SIGNAL_TRAP;
|
|
+ break;
|
|
+ case 0x1: /* background mode */
|
|
+ analyze_exception (status);
|
|
+ break;
|
|
+ default:
|
|
+ printf_filtered ("bdm_wait: Unknown atemp:%#lx\n", atemp);
|
|
+ status->kind = TARGET_WAITKIND_STOPPED;
|
|
+ status->value.sig = TARGET_SIGNAL_GRANT;
|
|
+ }
|
|
+ }
|
|
+ else {
|
|
+ if (bdmReadSystemRegister (BDM_REG_CSR, &csr) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (csr & 0x08000000) { /* double bus fault */
|
|
+ status->kind = TARGET_WAITKIND_STOPPED;
|
|
+ status->value.sig = TARGET_SIGNAL_BUS;
|
|
+ }
|
|
+ else {
|
|
+ if (csr & 0x04000000) { /* hardware trigger */
|
|
+ hit_watchpoint = 1;
|
|
+ status->kind = TARGET_WAITKIND_STOPPED;
|
|
+ status->value.sig = TARGET_SIGNAL_TRAP;
|
|
+ }
|
|
+ else {
|
|
+ if (csr & 0x01000000) { /* -BKPT signal */
|
|
+ status->kind = TARGET_WAITKIND_STOPPED;
|
|
+ status->value.sig = TARGET_SIGNAL_TRAP;
|
|
+ }
|
|
+ else {
|
|
+ if (csr & 0x02000000) { /* HALT/software bkpt */
|
|
+ analyze_exception (status);
|
|
+ }
|
|
+ else {
|
|
+ printf_filtered ("bdm_wait: Unknown csr:%#lx",
|
|
+ csr);
|
|
+ status->kind = TARGET_WAITKIND_STOPPED;
|
|
+ status->value.sig = TARGET_SIGNAL_GRANT;
|
|
+ }
|
|
+ }
|
|
+ }
|
|
+ }
|
|
+ }
|
|
+ }
|
|
+ break;
|
|
+ default:
|
|
+ printf_filtered ("bdm_wait: Unknown BDM status: %#x", bdm_stat);
|
|
+ break;
|
|
+ }
|
|
+ haveAtemp = 0;
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+/*
|
|
+ * The following routines handle the Coldfire hardware breakpoints. Only one
|
|
+ * breakpoint supported so far, and it can be either a PC breakpoint or an
|
|
+ * address watchpoint. Unfortunately, the TARGET_CAN_USE_HARDWARE_WATCHPOINT
|
|
+ * macro only allows for bounds checking within one of the two types and not
|
|
+ * limits that cover the sum of both, so extra work is needed.
|
|
+ *
|
|
+ * (Actually, very few processors seem to have much support for that routine
|
|
+ * at all.)
|
|
+ *
|
|
+ * As a result, the way this is handled is that the can_use routine will allow
|
|
+ * the first breakpoint of either type to be added. Any further checking so
|
|
+ * that only one of the two can be used is done later when GDB actually tries
|
|
+ * to create the breakpoints, usually when the processor is restarted.
|
|
+ *
|
|
+ * We keep a local copy of the breakpoints list becasue the chain that GDB
|
|
+ * keeps isn't exported globally.
|
|
+ *
|
|
+ * While things could be simplified with only one breakpoint present, setting
|
|
+ * up more general routines allows for later expansion if newer versions of
|
|
+ * the ColdFire chip support more breakpoints at once.
|
|
+ *
|
|
+ * Also, the ColdFire supports things like multi-level triggers and triggers
|
|
+ * based on the data bus instead of just the address bus. The GDB commands
|
|
+ * don't allow for access to this, but much of it isn't necessary anyway,
|
|
+ * as GDB has its own method of handling 'breakpoint conditions' that is
|
|
+ * sufficient for most tasks.
|
|
+ */
|
|
+
|
|
+#define TDR_TRC_DDATA 0x00000000
|
|
+#define TDR_TRC_HALT 0x40000000
|
|
+#define TDR_TRC_DINT 0x80000000
|
|
+#define TDR_L2_EBL 0x20000000
|
|
+#define TDR_L2_ALL 0x1FFF0000
|
|
+#define TDR_L2_EDLW 0x10000000
|
|
+#define TDR_L2_EDWL 0x08000000
|
|
+#define TDR_L2_EDWU 0x04000000
|
|
+#define TDR_L2_EDLL 0x02000000
|
|
+#define TDR_L2_EDLM 0x01000000
|
|
+#define TDR_L2_EDUM 0x00800000
|
|
+#define TDR_L2_EDUU 0x00400000
|
|
+#define TDR_L2_DI 0x00200000
|
|
+#define TDR_L2_EAI 0x00100000
|
|
+#define TDR_L2_EAR 0x00080000
|
|
+#define TDR_L2_EAL 0x00040000
|
|
+#define TDR_L2_EPC 0x00020000
|
|
+#define TDR_L2_PCI 0x00010000
|
|
+#define TDR_L1_EBL 0x00002000
|
|
+#define TDR_L1_ALL 0x00001FFF
|
|
+#define TDR_L1_EDLW 0x00001000
|
|
+#define TDR_L1_EDWL 0x00000800
|
|
+#define TDR_L1_EDWU 0x00000400
|
|
+#define TDR_L1_EDLL 0x00000200
|
|
+#define TDR_L1_EDLM 0x00000100
|
|
+#define TDR_L1_EDUM 0x00000080
|
|
+#define TDR_L1_EDUU 0x00000040
|
|
+#define TDR_L1_DI 0x00000020
|
|
+#define TDR_L1_EAI 0x00000010
|
|
+#define TDR_L1_EAR 0x00000008
|
|
+#define TDR_L1_EAL 0x00000004
|
|
+#define TDR_L1_EPC 0x00000002
|
|
+#define TDR_L1_PCI 0x00000001
|
|
+
|
|
+struct cf_break {
|
|
+ enum target_hw_bp_type type;
|
|
+ CORE_ADDR addr;
|
|
+ int len;
|
|
+};
|
|
+
|
|
+#define CF_BREAKPOINT_MAX 1
|
|
+
|
|
+static struct cf_break cf_breakpoints[CF_BREAKPOINT_MAX];
|
|
+static int cf_breakpoint_count;
|
|
+
|
|
+static int
|
|
+cf_init_watchpoints(void)
|
|
+{
|
|
+ if (cpu_type != BDM_COLDFIRE) {
|
|
+ return(-1);
|
|
+ }
|
|
+ cf_breakpoint_count = 0;
|
|
+ if (bdmWriteSystemRegister (BDM_REG_TDR, TDR_TRC_HALT) < 0)
|
|
+ bdm_report_error ();
|
|
+ return(0);
|
|
+}
|
|
+
|
|
+int
|
|
+cf_stopped_by_watchpoint(void)
|
|
+{
|
|
+ return hit_watchpoint;
|
|
+}
|
|
+
|
|
+int
|
|
+cf_can_use_watchpoint(type, cnt, ot)
|
|
+ enum target_hw_bp_type type;
|
|
+ int cnt;
|
|
+ int ot;
|
|
+{
|
|
+ unsigned long tdr;
|
|
+
|
|
+ if (cpu_type != BDM_COLDFIRE) {
|
|
+ return(0);
|
|
+ }
|
|
+
|
|
+ if (type == bp_hardware_breakpoint || type == bp_read_watchpoint ||
|
|
+ type == bp_hardware_watchpoint || type == bp_access_watchpoint) {
|
|
+ if (cnt <= 1) {
|
|
+ return(1);
|
|
+ }
|
|
+ }
|
|
+
|
|
+ return(-1);
|
|
+}
|
|
+
|
|
+int
|
|
+cf_insert_hw_breakpoint(addr, shadow)
|
|
+ CORE_ADDR addr;
|
|
+ char *shadow;
|
|
+{
|
|
+ unsigned long tdr;
|
|
+
|
|
+ if (cpu_type != BDM_COLDFIRE) {
|
|
+ return(-1);
|
|
+ }
|
|
+
|
|
+ if (cf_breakpoint_count < CF_BREAKPOINT_MAX) {
|
|
+ cf_breakpoints[cf_breakpoint_count].type = hw_execute;
|
|
+ cf_breakpoints[cf_breakpoint_count].addr = addr;
|
|
+ cf_breakpoints[cf_breakpoint_count++].len = 2;
|
|
+
|
|
+ if (bdmReadSystemRegister (BDM_REG_TDR, &tdr) < 0)
|
|
+ bdm_report_error ();
|
|
+ tdr = ((tdr & ~TDR_L1_ALL) | (TDR_L1_EBL|TDR_L1_EPC));
|
|
+ if (bdmWriteSystemRegister (BDM_REG_PBR, addr) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (bdmWriteSystemRegister (BDM_REG_PBMR, 0) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (bdmWriteSystemRegister (BDM_REG_TDR, tdr) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (bdmDebugLevel)
|
|
+ printf_filtered ("Insert PC Breakpoint @0x%08x\n", addr);
|
|
+ }
|
|
+ else {
|
|
+ return(-1);
|
|
+ }
|
|
+ return(0);
|
|
+}
|
|
+
|
|
+static int
|
|
+cf_check_breakpoint(type, addr, len)
|
|
+ enum target_hw_bp_type type;
|
|
+ CORE_ADDR addr;
|
|
+ int len;
|
|
+{
|
|
+ int i;
|
|
+
|
|
+ for (i = 0; i < cf_breakpoint_count; i++) {
|
|
+ if (cf_breakpoints[i].type == type &&
|
|
+ cf_breakpoints[i].addr == addr &&
|
|
+ cf_breakpoints[i].len == len) {
|
|
+ for (; i < CF_BREAKPOINT_MAX-1; i++) {
|
|
+ cf_breakpoints[i] = cf_breakpoints[i+1];
|
|
+ }
|
|
+ cf_breakpoint_count--;
|
|
+ return(1);
|
|
+ }
|
|
+ }
|
|
+ return(0);
|
|
+}
|
|
+
|
|
+int
|
|
+cf_remove_hw_breakpoint(addr, shadow)
|
|
+ CORE_ADDR addr;
|
|
+ char *shadow;
|
|
+{
|
|
+ unsigned long tdr;
|
|
+ unsigned long csr;
|
|
+
|
|
+ if (cpu_type != BDM_COLDFIRE) {
|
|
+ return(-1);
|
|
+ }
|
|
+
|
|
+ if (cf_check_breakpoint(hw_execute, addr, 2)) {
|
|
+ if (bdmReadSystemRegister (BDM_REG_TDR, &tdr) < 0)
|
|
+ bdm_report_error ();
|
|
+ tdr &= ~TDR_L1_EPC;
|
|
+ if ((tdr & TDR_L1_ALL) == 0) {
|
|
+ tdr &= ~TDR_L1_EBL;
|
|
+ }
|
|
+ if (bdmWriteSystemRegister (BDM_REG_TDR, tdr) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (bdmDebugLevel)
|
|
+ printf_filtered ("Remove PC Breakpoint @0x%08x\n", addr);
|
|
+ }
|
|
+ else {
|
|
+ return(-1);
|
|
+ }
|
|
+ return(0);
|
|
+}
|
|
+
|
|
+#define AATR_READONLY 0x7F85
|
|
+#define AATR_WRITEONLY 0x7F05
|
|
+#define AATR_READWRITE 0xFF05
|
|
+
|
|
+int
|
|
+cf_insert_watchpoint(addr, len, type)
|
|
+ CORE_ADDR addr;
|
|
+ int len;
|
|
+ enum target_hw_bp_type type;
|
|
+{
|
|
+ unsigned long tdr;
|
|
+
|
|
+ if (cpu_type != BDM_COLDFIRE) {
|
|
+ return(-1);
|
|
+ }
|
|
+
|
|
+ if (cf_breakpoint_count < CF_BREAKPOINT_MAX) {
|
|
+ cf_breakpoints[cf_breakpoint_count].type = type;
|
|
+ cf_breakpoints[cf_breakpoint_count].addr = addr;
|
|
+ cf_breakpoints[cf_breakpoint_count++].len = len;
|
|
+
|
|
+ if (bdmReadSystemRegister (BDM_REG_TDR, &tdr) < 0)
|
|
+ bdm_report_error ();
|
|
+ tdr = ((tdr & ~TDR_L1_ALL) | (TDR_L1_EBL|TDR_L1_EAR));
|
|
+ if (bdmWriteSystemRegister (BDM_REG_ABLR, addr) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (bdmWriteSystemRegister (BDM_REG_ABHR, addr+len-1) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (type == hw_read) {
|
|
+ if (bdmWriteSystemRegister (BDM_REG_AATR, AATR_READONLY) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (bdmDebugLevel)
|
|
+ printf_filtered ("Insert read Watchpoint @0x%08x-0x%08x\n",
|
|
+ addr, addr+len-1);
|
|
+ }
|
|
+ else if (type == hw_write) {
|
|
+ if (bdmWriteSystemRegister (BDM_REG_AATR, AATR_WRITEONLY) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (bdmDebugLevel)
|
|
+ printf_filtered ("Insert write Watchpoint @0x%08x-0x%08x\n",
|
|
+ addr, addr+len-1);
|
|
+ }
|
|
+ else {
|
|
+ if (bdmWriteSystemRegister (BDM_REG_AATR, AATR_READWRITE) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (bdmDebugLevel)
|
|
+ printf_filtered ("Insert access Watchpoint @0x%08x-0x%08x\n",
|
|
+ addr, addr+len-1);
|
|
+ }
|
|
+ if (bdmWriteSystemRegister (BDM_REG_TDR, tdr) < 0)
|
|
+ bdm_report_error ();
|
|
+ }
|
|
+ else {
|
|
+ return(-1);
|
|
+ }
|
|
+ return(0);
|
|
+}
|
|
+
|
|
+int
|
|
+cf_remove_watchpoint(addr, len, type)
|
|
+ CORE_ADDR addr;
|
|
+ int len;
|
|
+ enum target_hw_bp_type type;
|
|
+{
|
|
+ unsigned long tdr;
|
|
+ unsigned long csr;
|
|
+
|
|
+ if (cpu_type != BDM_COLDFIRE) {
|
|
+ return(-1);
|
|
+ }
|
|
+
|
|
+ if (cf_check_breakpoint(type, addr, len)) {
|
|
+ if (bdmReadSystemRegister (BDM_REG_TDR, &tdr) < 0)
|
|
+ bdm_report_error ();
|
|
+ tdr &= ~TDR_L1_EAR;
|
|
+ if ((tdr & TDR_L1_ALL) == 0) {
|
|
+ tdr &= ~TDR_L1_EBL;
|
|
+ }
|
|
+ if (bdmWriteSystemRegister (BDM_REG_TDR, tdr) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (bdmDebugLevel)
|
|
+ printf_filtered ("Remove %s Watchpoint @0x%08x-0x%08x\n",
|
|
+ (type == hw_read) ? "read" :
|
|
+ ((type == hw_write) ? "write" : "access"),
|
|
+ addr, addr+len-1);
|
|
+ }
|
|
+ else {
|
|
+ return(-1);
|
|
+ }
|
|
+ return(0);
|
|
+}
|
|
+
|
|
+int
|
|
+cf_stopped_data_address()
|
|
+{
|
|
+ unsigned long tdr;
|
|
+ unsigned long ablr;
|
|
+
|
|
+ if (cpu_type != BDM_COLDFIRE) {
|
|
+ return(-1);
|
|
+ }
|
|
+
|
|
+ if (bdmReadSystemRegister (BDM_REG_TDR, &tdr) < 0)
|
|
+ bdm_report_error ();
|
|
+ if (bdmReadSystemRegister (BDM_REG_ABLR, &ablr) < 0)
|
|
+ bdm_report_error ();
|
|
+
|
|
+ if (tdr & TDR_L1_EAR) {
|
|
+ return(ablr);
|
|
+ }
|
|
+ return(0);
|
|
+}
|
|
+
|
|
+/* This is called not only when we first attach, but also when the
|
|
+ user types "run" after having attached. */
|
|
+void
|
|
+bdm_create_inferior (char *execfile, char *args, char **env)
|
|
+{
|
|
+ char *prg_file = NULL;
|
|
+ unsigned long entry_pt;
|
|
+
|
|
+ clear_proceed_status ();
|
|
+ init_wait_for_inferior ();
|
|
+ if (*args) {
|
|
+ prg_file = args;
|
|
+ }
|
|
+ else {
|
|
+ prg_file = execfile;
|
|
+ }
|
|
+ if (!(prg_file) && !(bdm_prog_loaded))
|
|
+ error ("No program specified to run\n");
|
|
+ if (bdm_prog_loaded)
|
|
+ printf_filtered ("Note: `%s' has already been loaded.\n", bdm_prog_loaded);
|
|
+ if (query ("Do you want to download `%s'?", prg_file))
|
|
+ bdm_load (prg_file, 0);
|
|
+ if (bdmReadSystemRegister (BDM_REG_RPC, &entry_pt) < 0)
|
|
+ bdm_report_error ();
|
|
+ proceed (entry_pt, TARGET_SIGNAL_DEFAULT, 0);
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Fetch register REGNO, or all user registers if REGNO is -1.
|
|
+ */
|
|
+static void
|
|
+bdm_fetch_register (int regno)
|
|
+{
|
|
+ unsigned long l;
|
|
+ char cbuf[4];
|
|
+ int ret;
|
|
+
|
|
+ if (regno < 0) {
|
|
+ for (regno = 0 ; regno < NUM_REGS ; regno++)
|
|
+ bdm_fetch_register (regno);
|
|
+ }
|
|
+ else {
|
|
+ /*
|
|
+ * When the target is running the
|
|
+ * cpu registers can not be accessed.
|
|
+ */
|
|
+ if (bdm_gdb_no_wait && (bdm_get_status () == 0)) {
|
|
+ l = 0;
|
|
+ ret = 0;
|
|
+ }
|
|
+ else {
|
|
+ if (regno < 16) {
|
|
+ ret = bdmReadRegister (regno, &l);
|
|
+ }
|
|
+ else {
|
|
+ if ((regno - 16) < (sizeof (reg_to_dev_num) / sizeof (int))) {
|
|
+ ret = bdmReadSystemRegister (reg_to_dev_num[regno - 16], &l);
|
|
+ }
|
|
+ else {
|
|
+ error ("Bad register number (%d)", regno);
|
|
+ return;
|
|
+ }
|
|
+ }
|
|
+ }
|
|
+ if (ret < 0)
|
|
+ bdm_report_error ();
|
|
+ cbuf[0] = l >> 24;
|
|
+ cbuf[1] = l >> 16;
|
|
+ cbuf[2] = l >> 8;
|
|
+ cbuf[3] = l;
|
|
+ supply_register (regno, cbuf);
|
|
+ }
|
|
+}
|
|
+
|
|
+void
|
|
+bdm_prepare_to_store (void)
|
|
+{
|
|
+ /* Do nothing, since we can store individual regs */
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Store register REGNO, or all user registers if REGNO == -1.
|
|
+ */
|
|
+void
|
|
+bdm_store_register (int regno)
|
|
+{
|
|
+ unsigned long l;
|
|
+ int ret;
|
|
+
|
|
+ if (bdm_gdb_no_wait && (bdm_get_status () == 0))
|
|
+ return;
|
|
+
|
|
+ if (regno == -1) {
|
|
+ for (regno = 0 ; regno < NUM_REGS ; regno++)
|
|
+ bdm_store_register (regno);
|
|
+ }
|
|
+ else {
|
|
+ l = read_register (regno);
|
|
+ if (regno < 16) {
|
|
+ ret = bdmWriteRegister (regno, l);
|
|
+ }
|
|
+ else {
|
|
+ if ((regno - 16) < (sizeof (reg_to_dev_num) / sizeof (int))) {
|
|
+ ret = bdmWriteSystemRegister (reg_to_dev_num[regno - 16], l);
|
|
+ }
|
|
+ else {
|
|
+ error ("Bad register number (%d)", regno);
|
|
+ return;
|
|
+ }
|
|
+ }
|
|
+ if (ret < 0)
|
|
+ bdm_report_error ();
|
|
+ }
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Transfer memory contents between target and host
|
|
+ */
|
|
+static int
|
|
+bdm_xfer_inferior_memory (CORE_ADDR memaddr, char *myaddr, int len, int write, struct target_ops *t)
|
|
+{
|
|
+ int ret;
|
|
+
|
|
+ if (write)
|
|
+ ret = bdmWriteMemory (memaddr, myaddr, len);
|
|
+ else
|
|
+ ret = bdmReadMemory (memaddr, myaddr, len);
|
|
+ if (ret < 0)
|
|
+ bdm_report_error ();
|
|
+ return len;
|
|
+}
|
|
+
|
|
+static void
|
|
+bdm_files_info (struct target_ops *t)
|
|
+{
|
|
+ printf_filtered ("target %s is attached to %s\n", t->to_shortname, dev_name);
|
|
+ if (bdm_prog_loaded) {
|
|
+ printf_filtered ("and running program %s\n", bdm_prog_loaded);
|
|
+ }
|
|
+ else {
|
|
+ printf_filtered ("no program loaded\n");
|
|
+ }
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Load a file.
|
|
+ */
|
|
+static void
|
|
+bdm_load (char *args, int from_tty)
|
|
+{
|
|
+ char *p;
|
|
+
|
|
+ if (bdm_prog_loaded) {
|
|
+ free (bdm_prog_loaded);
|
|
+ bdm_prog_loaded = NULL;
|
|
+ }
|
|
+ if (!args) {
|
|
+ error (
|
|
+ "The bdmload command must include the filename to load.\n"
|
|
+ "You may want to use 'run', which uses the file given\n"
|
|
+ "on the command line when gdb was invoked.");
|
|
+ }
|
|
+ if ((bdm_get_status () & BDM_TARGETSTOPPED) == 0)
|
|
+ bdm_stop_chip ();
|
|
+
|
|
+ /* strip off additional (unwanted) arguments after file name */
|
|
+ for (p = args; (*p != '\0') && (!isspace (*p)); p++) ;
|
|
+ *p = '\0';
|
|
+
|
|
+ if (loadExecutable (args) < 0)
|
|
+ error ("%s", downloadErrorString);
|
|
+ bdm_prog_loaded = savestring (args, strlen (args));
|
|
+}
|
|
+
|
|
+/*
|
|
+ * Select a CPU32 processor register set.
|
|
+ */
|
|
+static void
|
|
+bdm_select_cpu32 (char *args, int from_tty)
|
|
+{
|
|
+ bdm_reg_names = cpu32_reg_names;
|
|
+}
|
|
+
|
|
+struct target_ops bdm_ops;
|
|
+
|
|
+static void
|
|
+init_bdm_ops(void)
|
|
+{
|
|
+ bdm_ops.to_shortname = "bdm";
|
|
+ bdm_ops.to_longname = "CPU32 and Coldfire Background Debug Mode Interface for downloading and remote debugging";
|
|
+ bdm_ops.to_doc = "Uses the Public Domain Background Debug Mode Interface connected to the\n"
|
|
+"BDM-port of the CPU32 or Coldfire based microcontroller and to a parallel port\n"
|
|
+"of the PC.\n"
|
|
+"Usage: target bdm <device>\n"
|
|
+"where <device> is the BDM character special file (e.g. /dev/bdm0).";
|
|
+ bdm_ops.to_open = bdm_open;
|
|
+ bdm_ops.to_close = bdm_close;
|
|
+ bdm_ops.to_detach = bdm_detach;
|
|
+ bdm_ops.to_resume = bdm_resume;
|
|
+ bdm_ops.to_wait = bdm_wait;
|
|
+ bdm_ops.to_fetch_registers = bdm_fetch_register;
|
|
+ bdm_ops.to_store_registers = bdm_store_register;
|
|
+ bdm_ops.to_prepare_to_store = bdm_prepare_to_store;
|
|
+ bdm_ops.to_xfer_memory = bdm_xfer_inferior_memory;
|
|
+ bdm_ops.to_files_info = bdm_files_info;
|
|
+ bdm_ops.to_insert_breakpoint = memory_insert_breakpoint;
|
|
+ bdm_ops.to_remove_breakpoint = memory_remove_breakpoint;
|
|
+ bdm_ops.to_kill = bdm_kill;
|
|
+ bdm_ops.to_load = bdm_load;
|
|
+ bdm_ops.to_create_inferior = bdm_create_inferior;
|
|
+ bdm_ops.to_mourn_inferior = generic_mourn_inferior;
|
|
+ bdm_ops.to_can_run = bdm_can_run;
|
|
+ bdm_ops.to_stratum = process_stratum;
|
|
+ bdm_ops.to_has_all_memory = 1;
|
|
+ bdm_ops.to_has_memory = 1;
|
|
+ bdm_ops.to_has_stack = 1;
|
|
+ bdm_ops.to_has_registers = 1;
|
|
+ bdm_ops.to_has_execution = 1;
|
|
+ bdm_ops.to_magic = OPS_MAGIC;
|
|
+};
|
|
+
|
|
+void
|
|
+_initialize_remote_bdmcf (void)
|
|
+{
|
|
+ init_bdm_ops ();
|
|
+ add_com ("bdm_reset", class_obscure,
|
|
+ (void (*)(char *, int))bdm_reset,
|
|
+ "Reset target and enter BDM mode.");
|
|
+ add_com ("bdm_release", class_obscure,
|
|
+ (void (*)(char *, int))bdm_release_chip,
|
|
+ "Reset target without BDM-mode.");
|
|
+ add_com ("bdm_status", class_obscure,
|
|
+ (void (*)(char *, int))bdm_get_status_interactive,
|
|
+ "Show status of bdm interface\n");
|
|
+ add_com ("bdm_setdelay", class_obscure,
|
|
+ bdm_setdelay_interactive,
|
|
+ "set delay for download");
|
|
+ add_com ("bdm_setdebug", class_obscure,
|
|
+ bdm_setdebug_interactive,
|
|
+ "enable/disable BDM diagnostic messages");
|
|
+ add_com ("bdm_setdriverdebug", class_obscure,
|
|
+ bdm_setdriverdebug_interactive,
|
|
+ "enable/disable BDM driver diagnostic messages");
|
|
+ add_com ("bdm_no_wait", class_obscure,
|
|
+ bdm_set_no_wait,
|
|
+ "Cause GDB to not wait for the target to stop when running.");
|
|
+ add_com ("bdm_wait", class_obscure,
|
|
+ bdm_set_wait,
|
|
+ "Cause GDB to wait for the target to stop when running.");
|
|
+ add_com ("bdm_stop", class_obscure,
|
|
+ bdm_issue_stop,
|
|
+ "Stop the target if running.");
|
|
+ add_com ("bdm-select-cpu32", class_obscure,
|
|
+ bdm_select_cpu32,
|
|
+ "Selects the CPU32 register set rather than the default CPU32+.");
|
|
+
|
|
+ add_target (&bdm_ops);
|
|
+}
|