79 lines
2.2 KiB
Plaintext
79 lines
2.2 KiB
Plaintext
#!/usr/local/bin/bdmctrl
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#
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# This script is for use with the bdmctrl utility and allows loading
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# boot loading the 68332.
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#
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# NOTE: see other scripts for flash loading examples.
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#
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# Usage ./bdmctrl m68332.test /dev/bdmicd0 object-file-to-load
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#
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# see flashlib/README and bdmctrl/README.bdmctrl for more information
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#
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open $1
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reset
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# reset sometimes leaves %dfc and %sfc in a broken state. This happens rarely,
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# but _when_ it happens, the target will just crash. I have never seen this
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# with the m683xx branch of the bdm software, so I assume that the problem is
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# related to the m68k branch. More investigation will be needed on this issue.
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#
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write %dfc 5 b
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write %sfc 5 b
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check-register %a0 a1 a2 a3 a4 a5 a6 a7
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check-register d0 d1 d2 d3 d4 d5 d6 d7
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check-register vbr pcc rpc
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dump-register vbr rpc dfc sfc
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write 0x0fffb04 0x1000 w # set RAMBAR to map internal RAM to 0x100000
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check-mem 0x100000 0x0800 # check internal RAM
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# From here on, the tests are hardware dependant. You will probably need to
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# customize.
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reset # reset again, since RAMBAR is writable only once
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write %dfc 5 b
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write %sfc 5 b
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# ROM definition
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write 0x00fffa48 0x000066830 l # CSBOOT 512K,asy,both,r,as,0wait,s/u
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# RAM definiton
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write 0x00fffa4c 0x080076830 l # CS0: 1024KB,$800000,asy,both,r,as,0wait,s/u
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write 0x00fffa50 0x080073030 l # CS1: 1024KB,$800000,asy,lower,w,as,0wait,s/u
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write 0x00fffa54 0x080075030 l # CS2: 1024KB,$800000,asy,upper,w,as,0wait,s/u
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# disable remaining chip selects
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write 0x00fffa58 0x0fff80000 l
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write 0x00fffa5c 0x0fff80000 l
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write 0x00fffa60 0x0fff80000 l
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write 0x00fffa64 0x0fff80000 l
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write 0x00fffa68 0x0fff80000 l
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write 0x00fffa6c 0x0fff80000 l
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write 0x00fffa70 0x0fff80000 l
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write 0x00fffa74 0x0fff80000 l
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write 0x00fffa78 0x0fff80000 l
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dump-mem 0x0fffa40 48 l # show the chipselect definitions
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check-mem 0x800000 0x0800 # check external RAM
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load -v $2 .text .data
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write main 0x04afa 2 # BGND instruction should stop target on main()
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dump-register a0 a1 a2 a3 a4 a5 a6 a7
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dump-register d0 d1 d2 d3 d4 d5 d6 d7
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dump-register vbr pcc rpc sfc dfc ssp
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execute
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wait
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dump-register a0 a1 a2 a3 a4 a5 a6 a7
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dump-register d0 d1 d2 d3 d4 d5 d6 d7
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dump-register vbr pcc rpc sfc dfc ssp
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