initial push
This commit is contained in:
Bernd Mueller
1650
schematics/cpu32/icd32/bdm_icd1.eps
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1650
schematics/cpu32/icd32/bdm_icd1.eps
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BIN
schematics/cpu32/icd32/bdm_icd2comb.pdf
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BIN
schematics/cpu32/icd32/bdm_icd2comb.pdf
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76
schematics/cpu32/icd32/icd-bdm2.jed
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76
schematics/cpu32/icd32/icd-bdm2.jed
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Created Tue Jun 23 1998 08:38:05 am
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Device PALCE16V8H/4
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*
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QF2194*
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F0*
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L0000 11111111111111111111111111111101*
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L0032 00000000000000000000000000000000*
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L0064 00000000000000000000000000000000*
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L0096 00000000000000000000000000000000*
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L0128 00000000000000000000000000000000*
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L0160 00000000000000000000000000000000*
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L0192 00000000000000000000000000000000*
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L0224 00000000000000000000000000000000*
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L0256 11111111111111111111111111111111*
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L0288 11110111111111111101011111011111*
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L0320 11111111011111111101101111110111*
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L0352 00000000000000000000000000000000*
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L0384 00000000000000000000000000000000*
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L0416 00000000000000000000000000000000*
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L0448 00000000000000000000000000000000*
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L0480 00000000000000000000000000000000*
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L0512 11111111111111110111011111111111*
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L0544 01111111111111111111111111111111*
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L0576 00000000000000000000000000000000*
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L0608 00000000000000000000000000000000*
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L0640 00000000000000000000000000000000*
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L0672 00000000000000000000000000000000*
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L0704 00000000000000000000000000000000*
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L0736 00000000000000000000000000000000*
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L0768 11111111111111111111111111111111*
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L0800 11111111111111111111111101111111*
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L0832 00000000000000000000000000000000*
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L0864 00000000000000000000000000000000*
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L0896 00000000000000000000000000000000*
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L0928 00000000000000000000000000000000*
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L0960 00000000000000000000000000000000*
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L0992 00000000000000000000000000000000*
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L1024 11111111111110111111111111111111*
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L1056 00000000000000000000000000000000*
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L1088 00000000000000000000000000000000*
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L1120 00000000000000000000000000000000*
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L1152 00000000000000000000000000000000*
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L1184 00000000000000000000000000000000*
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L1216 00000000000000000000000000000000*
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L1248 00000000000000000000000000000000*
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L1280 11111111111111111111111111111111*
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L1312 11111111111111111111011111111111*
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L1344 00000000000000000000000000000000*
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L1376 00000000000000000000000000000000*
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L1408 00000000000000000000000000000000*
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L1440 00000000000000000000000000000000*
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L1472 00000000000000000000000000000000*
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L1504 00000000000000000000000000000000*
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L1536 11111111111111111111111111111111*
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L1568 11111111111111111111101111111111*
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L1600 11110111111111111111111111101111*
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L1632 00000000000000000000000000000000*
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L1664 00000000000000000000000000000000*
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L1696 00000000000000000000000000000000*
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L1728 00000000000000000000000000000000*
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L1760 00000000000000000000000000000000*
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L1792 11111111111111111111111111111111*
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L1824 11111111111111111111111111111011*
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L1856 00000000000000000000000000000000*
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L1888 00000000000000000000000000000000*
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L1920 00000000000000000000000000000000*
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L1952 00000000000000000000000000000000*
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L1984 00000000000000000000000000000000*
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L2016 00000000000000000000000000000000*
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L2048 11111101*
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L2056 0110010001100101011000100010111001001101001100110011000000110010*
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L2120 11111111*
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L2128 1000000011100000110000001100000010000000110000001110000011000000*
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L2192 11*
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C43C1*
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\30000
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51
schematics/cpu32/icd32/icd.jed
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51
schematics/cpu32/icd32/icd.jed
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GAL16V8
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V024)
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Copyright (c) National Semiconductor Corporation 1990,1991
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Assembled from "ICD.eqn". Date: 4-27-98
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*
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NOTE PINS DSI:2 DSCLK:3 BREAK:4 RESET:5 OE:6 M_FREEZE:7 M_DSO:8*
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NOTE PINS SW:9 BERR:11 MAGIC:12 FF_BREAK:13 FREEZE:14 M_RESET:15*
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NOTE PINS DSO:16 M_DSI:17 M_DSCLK:18 M_BERR:19*
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QF2194*QP20*F0*
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L0000
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11111111111111111111111111111101
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11111111111111111111111111111110*
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L0256
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11111111111111111111111111111111
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11110111111111111101111111011111*
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L0512
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11111111111111110111011111111111
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01111111111111111111111111111111*
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L0768
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11111111111111111111111111111111
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11111111111111111111111101111111*
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L1024
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11111111111110111111111111111111
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11111111111101111111111111111111*
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L1280
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11111111111111111111111111111111
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11111111111111111111011111111111*
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L1536
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11111111111111111111111111111111
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11111111011111111111111111111111
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11111111111111111111011111011111
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11111111110111111111111111011111*
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L1792
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11111111111111111111111111111111*
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L2048
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11111111*
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L2056
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0000000000000000000000000000000000000000000000000000000000000000*
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L2120
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11111111*
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L2128
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1100000011000000110000001100000011000000110000001111000011000000*
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L2192
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11*
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C4499*
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0000
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117
schematics/cpu32/icd32/icd.log
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117
schematics/cpu32/icd32/icd.log
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OPL2PLA - OPAL design entry compiler V008
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Copyright (c) National Semiconductor Corporation 1991
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Input Pins
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==========
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Pin name pin number arch visible default
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-------- ---------- ---- ------- -------
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DSI 2 com visible
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DSCLK 3 com visible
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BREAK 4 com visible
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RESET 5 com visible
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OE 6 com visible
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M_FREEZE 7 com visible
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M_DSO 8 com visible
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SW 9 com visible
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BERR 11 com visible
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Output Pins
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===========
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Pin name pin number arch visible default
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-------- ---------- ---- ------- -------
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M_BERR 19 com visible rst
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M_DSCLK 18 com visible rst
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DSO 16 com visible rst
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FREEZE 14 com visible rst
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MAGIC 12 com visible rst
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Feedback Pins
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=============
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Pin name pin number arch visible default
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-------- ---------- ---- ------- -------
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M_DSI 17 com visible rst
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M_RESET 15 com visible rst
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FF_BREAK 13 com visible rst
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Dot extensions
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==============
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Pin name pin number arch visible default
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-------- ---------- ---- ------- -------
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M_DSI.oe com visible rst
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M_RESET.oe com visible rst
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M_BERR.oe com visible rst
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V024)
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Copyright (c) National Semiconductor Corporation 1990,1991
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Document file for ICD.eqn
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Device: 16V8
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$LABELS 20 nc DSI DSCLK BREAK RESET OE M_FREEZE M_DSO SW GND BERR MAGIC FF_BREAK
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FREEZE M_RESET DSO M_DSI M_DSCLK M_BERR VCC
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Pin Label Type
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--- ----- ----
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2 DSI pos,com input
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3 DSCLK pos,com input
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4 BREAK pos,com input
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5 RESET pos,com input
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6 OE pos,com input
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7 M_FREEZE pos,com input
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8 M_DSO pos,com input
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9 SW unused
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11 BERR pos,com input
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12 MAGIC pos,trst,com output
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13 FF_BREAK pos,trst,com feedback
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14 FREEZE pos,trst,com output
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15 M_RESET pos,trst,com feedback
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16 DSO pos,trst,com output
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17 M_DSI pos,trst,com feedback
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18 M_DSCLK pos,trst,com output
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19 M_BERR pos,trst,com output
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V024)
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Copyright (c) National Semiconductor Corporation 1990,1991
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Device Utilization:
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No of dedicated inputs used : 8/10 (80.0%)
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No of dedicated outputs used : 2/2 (100.0%)
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No of feedbacks used as dedicated outputs : 3/6 (50.0%)
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No of feedbacks used : 3/6 (50.0%)
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------------------------------------------
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Pin Label Terms Usage
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------------------------------------------
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19 M_BERR 3/8 (37.5%)
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18 M_DSCLK 2/8 (25.0%)
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17 M_DSI 3/8 (37.5%)
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16 DSO 2/8 (25.0%)
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15 M_RESET 3/8 (37.5%)
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14 FREEZE 2/8 (25.0%)
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13 FF_BREAK 4/8 (50.0%)
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12 MAGIC 2/8 (25.0%)
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------------------------------------------
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Total 18/64 (28.1%)
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------------------------------------------
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EQN2JED - Boolean Equations to JEDEC file assembler (Version V024)
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Copyright (c) National Semiconductor Corporation 1990,1991
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Chip diagram (DIP)
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._____ _____.
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| \__/ |
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| 1 20 | VCC
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DSI | 2 19 | M_BERR
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DSCLK | 3 18 | M_DSCLK
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BREAK | 4 17 | M_DSI
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RESET | 5 16 | DSO
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OE | 6 15 | M_RESET
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M_FREEZE | 7 14 | FREEZE
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M_DSO | 8 13 | FF_BREAK
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SW | 9 12 | MAGIC
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GND | 10 11 | BERR
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|______________|
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37
schematics/cpu32/icd32/icd.opl
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37
schematics/cpu32/icd32/icd.opl
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begin header
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end header
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begin definition
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device GAL16V8;
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ues 0000000000000000;
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inputs
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DSI=2,DSCLK=3,BREAK=4,RESET=5,
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OE=6,M_FREEZE=7,M_DSO=8,SW=9,BERR=11;
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outputs (com)
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M_BERR=19,M_DSCLK=18,DSO=16,FREEZE=14,MAGIC=12;
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feedback (com)
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M_DSI=17,M_RESET=15,FF_BREAK=13;
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end definition
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begin equations
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M_DSI = DSI;
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M_DSI.oe = M_FREEZE & OE;
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M_DSCLK = DSCLK & FF_BREAK & M_RESET;
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FF_BREAK = BREAK | ( FF_BREAK & ( M_FREEZE | M_DSI ) );
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M_RESET = RESET;
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M_RESET.oe = /RESET;
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M_BERR = /BERR;
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M_BERR.oe = BERR;
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FREEZE = M_FREEZE;
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DSO = M_DSO;
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MAGIC = 0;
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end equations
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