153 lines
4.7 KiB
C
153 lines
4.7 KiB
C
#include <stdio.h>
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#include <mint/osbind.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "bas_printf.h"
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#include "MCF5475.h"
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#include "driver_vec.h"
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#define FPGA_CONFIG (1 << 2)
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#define FPGA_CONF_DONE (1 << 5)
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#define SRAM1_START 0xff101000
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#define SRAM1_END SRAM1_START + 0x1000
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#define SAFE_STACK SRAM1_END - 4
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#define NOP() __asm__ __volatile__("nop\n\t" : : : "memory")
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#define SYSCLK 132000
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long bas_start = 0xe0000000;
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extern volatile uint32_t _VRAM[];
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volatile int32_t time, start, end;
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int i;
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void do_tests(void)
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{
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volatile unsigned long *t1 = (volatile unsigned long *) 0xf0000000;
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volatile unsigned short *t2 = (volatile unsigned short *) 0xf0000004;
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volatile unsigned short *t3 = (volatile unsigned short *) 0xf0000006;
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long value = 0;
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while (1)
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{
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*t1 = value;
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*t2 = (short) value;
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*t3 = (short) (value >> 16);
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xprintf("W: 0x%lx R: 0x%lx W: 0x%04x R: 0x%04x W: 0x%04x R: 0x%04x\r\n", value, *t1,
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(unsigned short) value, *t2, (unsigned short)(value >> 16), *t3);
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value++;
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}
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}
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void wait_for_jtag(void)
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{
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long i;
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/* set supervisor stack to end of SRAM1 */
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__asm__ __volatile__ (
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" move #0x2700,sr\n\t" /* disable interrupts */
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" move.l %[stack],d0\n\t" /* 4KB on-chip core SRAM1 */
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" move.l d0,sp\n\t" /* set stack pointer */
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:
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: [stack] "i" (SAFE_STACK)
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: "d0", "cc" /* clobber */
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);
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MCF_EPORT_EPIER = 0x0; /* disable EPORT interrupts */
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MCF_INTC_IMRL = 0xffffffff;
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MCF_INTC_IMRH = 0xffffffff; /* disable interrupt controller */
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MCF_MMU_MMUCR &= ~MCF_MMU_MMUCR_EN; /* disable MMU */
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xprintf("relocated supervisor stack, disabled interrupts and disabled MMU\r\n");
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/*
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* configure FEC1L port directions to enable external JTAG configuration download to FPGA
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*/
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MCF_GPIO_PDDR_FEC1L = 0 |
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MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4; /* bit 4 = LED => output */
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/* all other bits = input */
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/*
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* configure DSPI_CS3 as GPIO input to avoid the MCU driving against the FPGA blink
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*/
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MCF_PAD_PAR_DSPI &= ~MCF_PAD_PAR_DSPI_PAR_CS3(MCF_PAD_PAR_DSPI_PAR_CS3_DSPICS3);
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/*
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* now that GPIO ports have been switched to input, we can poll for FPGA config
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* started from the JTAG interface (CONF_DONE goes low) and finish (CONF_DONE goes high)
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*/
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xprintf("waiting for JTAG configuration start\r\n");
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while ((MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)); /* wait for JTAG config load started */
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xprintf("waiting for JTAG configuration to finish\r\n");
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while (!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)); /* wait for JTAG config load finished */
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xprintf("JTAG configuration finished.\r\n");
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/* wait */
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xprintf("wait a little to let things settle...\r\n");
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for (i = 0; i < 100000L; i++);
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xprintf("disable caches\r\n");
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__asm__ __volatile(
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"move.l #0x01000000,d0 \r\n"
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"movec d0,CACR \r\n"
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: /* no output */
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: /* no input */
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: "d0", "memory");
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/* begin of tests */
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do_tests();
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xprintf("wait a little to let things settle...\r\n");
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for (i = 0; i < 100000L; i++);
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xprintf("INFO: endless loop now. Press reset to reboot\r\n");
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while (1)
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;
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}
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int main(int argc, char *argv[])
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{
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printf("FPGA JTAG configuration support\r\n");
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printf("test FPGA DDR RAM controller\r\n");
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printf("\xbd 2014 M. F\x94schle\r\n");
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printf("You may now savely load a new FPGA configuration through the JTAG interface\r\n"
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"and your Firebee will reboot once finished using that new configuration.\r\n");
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if (argc == 2)
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{
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/*
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* we got an argument. This is supposed to be the address that we need to jump to after JTAG
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* configuration has been finished. Meant to support BaS in RAM testing
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*/
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char *addr_str = argv[1];
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char *addr = NULL;
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char *end = NULL;
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addr = (char *) strtol(addr_str, &end, 16);
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if (addr != NULL && addr <= (char *) 0xe0000000 && addr >= (char *) 0x10000000)
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{
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/*
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* seems to be a valid address
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*/
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bas_start = (long) addr;
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printf("BaS start address set to %p\r\n", (void *) bas_start);
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}
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else
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{
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printf("\r\nNote: BaS start address %p not valid. Stick to %p.\r\n", addr, (void *) bas_start);
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}
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}
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Supexec(wait_for_jtag);
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return 0; /* just to make the compiler happy, we will never return */
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}
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