Markus Fröschle e0a1dfedcf enabled flow analysis

2014-12-22 10:05:59 +00:00

..

altpll4.mif

worked on testbench

2014-06-11 16:41:25 +00:00

firebee_assignment_defaults.qdf

initial import after removal of FPGA_quartus

2014-06-09 20:35:29 +00:00

firebee.qpf

initial import after removal of FPGA_quartus

2014-06-09 20:35:29 +00:00

firebee.qsf

enabled flow analysis

2014-12-22 10:05:59 +00:00

firebee.sdc

relaxed timing and uncommented unneeded components in toplevel until timing issues are solved

2014-12-20 12:26:32 +00:00