121 lines
4.3 KiB
Verilog
121 lines
4.3 KiB
Verilog
// megafunction wizard: %LPM_MUX%
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// GENERATION: STANDARD
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// VERSION: WM1.0
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// MODULE: LPM_MUX
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// ============================================================
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// File Name: lpm_muxDZ.v
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// Megafunction Name(s):
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// LPM_MUX
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//
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// Simulation Library Files(s):
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// lpm
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// ============================================================
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// ************************************************************
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// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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//
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// 13.1.0 Build 162 10/23/2013 SJ Web Edition
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// ************************************************************
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//Copyright (C) 1991-2013 Altera Corporation
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//Your use of Altera Corporation's design tools, logic functions
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//and other software and tools, and its AMPP partner logic
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//functions, and any output files from any of the foregoing
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//(including device programming or simulation files), and any
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//associated documentation or information are expressly subject
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//to the terms and conditions of the Altera Program License
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//Subscription Agreement, Altera MegaCore Function License
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//Agreement, or other applicable license agreement, including,
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//without limitation, that your use is for the sole purpose of
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//programming logic devices manufactured by Altera and sold by
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//Altera or its authorized distributors. Please refer to the
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//applicable agreement for further details.
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// synopsys translate_off
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`timescale 1 ps / 1 ps
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// synopsys translate_on
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module lpm_muxDZ (
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clken,
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clock,
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data0x,
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data1x,
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sel,
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result);
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input clken;
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input clock;
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input [127:0] data0x;
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input [127:0] data1x;
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input sel;
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output [127:0] result;
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`ifndef ALTERA_RESERVED_QIS
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// synopsys translate_off
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`endif
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tri1 clken;
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`ifndef ALTERA_RESERVED_QIS
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// synopsys translate_on
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`endif
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wire [127:0] sub_wire0;
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wire [127:0] sub_wire3 = data1x[127:0];
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wire [127:0] result = sub_wire0[127:0];
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wire [127:0] sub_wire1 = data0x[127:0];
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wire [255:0] sub_wire2 = {sub_wire3, sub_wire1};
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wire sub_wire4 = sel;
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wire sub_wire5 = sub_wire4;
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lpm_mux LPM_MUX_component (
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.clock (clock),
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.data (sub_wire2),
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.sel (sub_wire5),
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.clken (clken),
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.result (sub_wire0)
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// synopsys translate_off
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,
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.aclr ()
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// synopsys translate_on
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);
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defparam
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LPM_MUX_component.lpm_pipeline = 1,
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LPM_MUX_component.lpm_size = 2,
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LPM_MUX_component.lpm_type = "LPM_MUX",
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LPM_MUX_component.lpm_width = 128,
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LPM_MUX_component.lpm_widths = 1;
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endmodule
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// ============================================================
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// CNX file retrieval info
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// ============================================================
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// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
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// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
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// Retrieval info: PRIVATE: new_diagram STRING "1"
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// Retrieval info: LIBRARY: lpm lpm.lpm_components.all
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// Retrieval info: CONSTANT: LPM_PIPELINE NUMERIC "1"
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// Retrieval info: CONSTANT: LPM_SIZE NUMERIC "2"
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// Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_MUX"
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// Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "128"
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// Retrieval info: CONSTANT: LPM_WIDTHS NUMERIC "1"
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// Retrieval info: USED_PORT: clken 0 0 0 0 INPUT VCC "clken"
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// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT NODEFVAL "clock"
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// Retrieval info: USED_PORT: data0x 0 0 128 0 INPUT NODEFVAL "data0x[127..0]"
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// Retrieval info: USED_PORT: data1x 0 0 128 0 INPUT NODEFVAL "data1x[127..0]"
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// Retrieval info: USED_PORT: result 0 0 128 0 OUTPUT NODEFVAL "result[127..0]"
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// Retrieval info: USED_PORT: sel 0 0 0 0 INPUT NODEFVAL "sel"
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// Retrieval info: CONNECT: @clken 0 0 0 0 clken 0 0 0 0
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// Retrieval info: CONNECT: @clock 0 0 0 0 clock 0 0 0 0
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// Retrieval info: CONNECT: @data 0 0 128 0 data0x 0 0 128 0
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// Retrieval info: CONNECT: @data 0 0 128 128 data1x 0 0 128 0
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// Retrieval info: CONNECT: @sel 0 0 1 0 sel 0 0 0 0
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// Retrieval info: CONNECT: result 0 0 128 0 @result 0 0 128 0
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// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_muxDZ.v TRUE
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// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_muxDZ.inc FALSE
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// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_muxDZ.cmp FALSE
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// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_muxDZ.bsf FALSE
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// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_muxDZ_inst.v FALSE
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// Retrieval info: GEN_FILE: TYPE_NORMAL lpm_muxDZ_bb.v FALSE
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// Retrieval info: LIB_FILE: lpm
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