108 lines
4.3 KiB
Verilog
108 lines
4.3 KiB
Verilog
// megafunction wizard: %ALTDDIO_OUT%
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// GENERATION: STANDARD
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// VERSION: WM1.0
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// MODULE: ALTDDIO_OUT
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// ============================================================
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// File Name: altddio_out0.v
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// Megafunction Name(s):
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// ALTDDIO_OUT
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//
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// Simulation Library Files(s):
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// altera_mf
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// ============================================================
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// ************************************************************
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// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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//
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// 13.1.0 Build 162 10/23/2013 SJ Web Edition
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// ************************************************************
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//Copyright (C) 1991-2013 Altera Corporation
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//Your use of Altera Corporation's design tools, logic functions
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//and other software and tools, and its AMPP partner logic
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//functions, and any output files from any of the foregoing
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//(including device programming or simulation files), and any
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//associated documentation or information are expressly subject
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//to the terms and conditions of the Altera Program License
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//Subscription Agreement, Altera MegaCore Function License
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//Agreement, or other applicable license agreement, including,
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//without limitation, that your use is for the sole purpose of
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//programming logic devices manufactured by Altera and sold by
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//Altera or its authorized distributors. Please refer to the
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//applicable agreement for further details.
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// synopsys translate_off
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`timescale 1 ps / 1 ps
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// synopsys translate_on
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module altddio_out0 (
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datain_h,
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datain_l,
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outclock,
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dataout);
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input [3:0] datain_h;
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input [3:0] datain_l;
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input outclock;
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output [3:0] dataout;
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wire [3:0] sub_wire0;
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wire [3:0] dataout = sub_wire0[3:0];
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altddio_out ALTDDIO_OUT_component (
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.datain_h (datain_h),
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.datain_l (datain_l),
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.outclock (outclock),
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.dataout (sub_wire0),
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.aclr (1'b0),
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.aset (1'b0),
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.oe (1'b1),
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.oe_out (),
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.outclocken (1'b1),
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.sclr (1'b0),
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.sset (1'b0));
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defparam
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ALTDDIO_OUT_component.extend_oe_disable = "OFF",
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ALTDDIO_OUT_component.intended_device_family = "Cyclone III",
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ALTDDIO_OUT_component.invert_output = "ON",
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ALTDDIO_OUT_component.lpm_hint = "UNUSED",
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ALTDDIO_OUT_component.lpm_type = "altddio_out",
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ALTDDIO_OUT_component.oe_reg = "UNREGISTERED",
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ALTDDIO_OUT_component.power_up_high = "ON",
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ALTDDIO_OUT_component.width = 4;
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endmodule
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// ============================================================
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// CNX file retrieval info
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// ============================================================
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// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
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// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
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// Retrieval info: CONSTANT: EXTEND_OE_DISABLE STRING "OFF"
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// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
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// Retrieval info: CONSTANT: INVERT_OUTPUT STRING "ON"
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// Retrieval info: CONSTANT: LPM_HINT STRING "UNUSED"
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// Retrieval info: CONSTANT: LPM_TYPE STRING "altddio_out"
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// Retrieval info: CONSTANT: OE_REG STRING "UNREGISTERED"
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// Retrieval info: CONSTANT: POWER_UP_HIGH STRING "ON"
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// Retrieval info: CONSTANT: WIDTH NUMERIC "4"
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// Retrieval info: USED_PORT: datain_h 0 0 4 0 INPUT NODEFVAL "datain_h[3..0]"
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// Retrieval info: CONNECT: @datain_h 0 0 4 0 datain_h 0 0 4 0
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// Retrieval info: USED_PORT: datain_l 0 0 4 0 INPUT NODEFVAL "datain_l[3..0]"
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// Retrieval info: CONNECT: @datain_l 0 0 4 0 datain_l 0 0 4 0
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// Retrieval info: USED_PORT: dataout 0 0 4 0 OUTPUT NODEFVAL "dataout[3..0]"
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// Retrieval info: CONNECT: dataout 0 0 4 0 @dataout 0 0 4 0
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// Retrieval info: USED_PORT: outclock 0 0 0 0 INPUT_CLK_EXT NODEFVAL "outclock"
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// Retrieval info: CONNECT: @outclock 0 0 0 0 outclock 0 0 0 0
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// Retrieval info: GEN_FILE: TYPE_NORMAL altddio_out0.v TRUE FALSE
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// Retrieval info: GEN_FILE: TYPE_NORMAL altddio_out0.qip TRUE FALSE
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// Retrieval info: GEN_FILE: TYPE_NORMAL altddio_out0.bsf FALSE TRUE
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// Retrieval info: GEN_FILE: TYPE_NORMAL altddio_out0_inst.v FALSE TRUE
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// Retrieval info: GEN_FILE: TYPE_NORMAL altddio_out0_bb.v FALSE TRUE
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// Retrieval info: GEN_FILE: TYPE_NORMAL altddio_out0.inc FALSE TRUE
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// Retrieval info: GEN_FILE: TYPE_NORMAL altddio_out0.cmp FALSE TRUE
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// Retrieval info: GEN_FILE: TYPE_NORMAL altddio_out0.ppf TRUE FALSE
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// Retrieval info: LIB_FILE: altera_mf
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