84 lines
4.0 KiB
VHDL
84 lines
4.0 KiB
VHDL
----------------------------------------------------------------------
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---- ----
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---- YM2149 compatible sound generator. ----
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---- ----
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---- This file is part of the SUSKA ATARI clone project. ----
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---- http://www.experiment-s.de ----
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---- ----
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---- Description: ----
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---- Model of the ST or STE's YM2149 sound generator. ----
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---- ----
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---- This is the package file containing the component ----
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---- declarations. ----
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---- ----
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---- ----
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---- To Do: ----
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---- - ----
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---- ----
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---- Author(s): ----
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---- - Wolfgang Foerster, wf@experiment-s.de; wf@inventronik.de ----
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---- ----
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----------------------------------------------------------------------
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---- ----
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---- Copyright (C) 2006 - 2011 Wolfgang Foerster ----
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---- ----
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---- This source file may be used and distributed without ----
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---- restriction provided that this copyright statement is not ----
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---- removed from the file and that any derivative work contains ----
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---- the original copyright notice and the associated disclaimer. ----
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---- ----
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---- This source file is free software; you can redistribute it ----
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---- and/or modify it under the terms of the GNU Lesser General ----
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---- Public License as published by the Free Software Foundation; ----
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---- either version 2.1 of the License, or (at your option) any ----
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---- later version. ----
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---- ----
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---- This source is distributed in the hope that it will be ----
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---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
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---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
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---- PURPOSE. See the GNU Lesser General Public License for more ----
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---- details. ----
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---- ----
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---- You should have received a copy of the GNU Lesser General ----
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---- Public License along with this source; if not, download it ----
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---- from http://www.gnu.org/licenses/lgpl.html ----
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---- ----
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----------------------------------------------------------------------
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--
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-- Revision History
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--
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-- Revision 2K6A 2006/06/03 WF
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-- Initial Release.
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-- Revision 2K6B 2006/11/07 WF
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-- Modified Source to compile with the Xilinx ISE.
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-- Revision 2K8A 2008/07/14 WF
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-- Minor changes.
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--
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library ieee;
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use ieee.std_logic_1164.all;
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package WF2149IP_PKG is
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type BUSCYCLES is (INACTIVE, R_READ, R_WRITE, ADDRESS);
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component WF2149IP_WAVE
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port(
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RESETn : in std_logic;
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SYS_CLK : in std_logic;
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WAV_STRB : in std_logic;
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ADR : in std_logic_vector(3 downto 0);
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DATA_IN : in std_logic_vector(7 downto 0);
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DATA_OUT : out std_logic_vector(7 downto 0);
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DATA_EN : out std_logic;
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BUSCYCLE : in BUSCYCLES;
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CTRL_REG : in std_logic_vector(5 downto 0);
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OUT_A : out std_logic;
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OUT_B : out std_logic;
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OUT_C : out std_logic
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);
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end component;
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end WF2149IP_PKG; |