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FireBee_SVN/FPGA_quartus_ori/Video
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Markus Fröschle f12bb14647 changed component name to lower case
2015-10-17 16:10:06 +00:00
..
BLITTER
get rid of CLK33M
2015-09-20 12:32:02 +00:00
altddio_bidir0.bsf
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altddio_bidir0.cmp
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altddio_bidir0.inc
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altddio_bidir0.ppf
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altddio_bidir0.qip
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altddio_bidir0.vhd
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altddio_out0.bsf
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altddio_out0.cmp
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altddio_out0.inc
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altddio_out0.ppf
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altddio_out0.qip
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altddio_out0.vhd
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altddio_out1.bsf
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altddio_out1.cmp
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altddio_out1.inc
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altddio_out1.ppf
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altddio_out1.qip
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altddio_out1.vhd
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altddio_out2.bsf
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altddio_out2.cmp
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altddio_out2.inc
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altddio_out2.ppf
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altddio_out2.qip
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altddio_out2.vhd
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altdpram0.bsf
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altdpram0.cmp
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altdpram0.inc
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altdpram0.qip
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altdpram0.vhd
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altdpram1.bsf
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altdpram1.cmp
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altdpram1.inc
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altdpram1.qip
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altdpram1.vhd
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altdpram2.bsf
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altdpram2.cmp
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altdpram2.inc
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altdpram2.qip
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altdpram2.vhd
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DDR_CTR.tdf
changed component name to lower case
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lpm_bustri0.bsf
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lpm_bustri0.cmp
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lpm_bustri0.inc
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lpm_bustri0.qip
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lpm_bustri0.vhd
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lpm_bustri1.bsf
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lpm_bustri1.cmp
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lpm_bustri1.vhd
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lpm_bustri2.bsf
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lpm_bustri2.vhd
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lpm_bustri3.bsf
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lpm_bustri3.vhd
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lpm_bustri4.bsf
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lpm_bustri4.vhd
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lpm_bustri5.bsf
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lpm_bustri5.inc
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lpm_bustri6.bsf
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lpm_bustri6.qip
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lpm_bustri6.vhd
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lpm_bustri7.bsf
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lpm_bustri7.cmp
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lpm_bustri7.qip
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lpm_bustri7.vhd
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lpm_compare1.bsf
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lpm_compare1.cmp
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lpm_compare1.inc
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lpm_compare1.qip
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lpm_compare1.vhd
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lpm_constant0.bsf
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lpm_constant0.cmp
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lpm_constant0.qip
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lpm_constant0.vhd
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lpm_constant1.bsf
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lpm_constant1.cmp
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lpm_constant1.inc
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lpm_constant1.qip
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lpm_constant1.vhd
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lpm_constant2.bsf
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lpm_constant2.cmp
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lpm_constant2.qip
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lpm_constant2.vhd
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lpm_constant3.bsf
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lpm_constant3.cmp
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lpm_constant3.qip
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lpm_constant3.vhd
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lpm_constant4.bsf
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lpm_constant4.cmp
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lpm_constant4.inc
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lpm_constant4.qip
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lpm_constant4.vhd
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lpm_ff0.bsf
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lpm_ff0.cmp
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lpm_ff0.qip
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lpm_ff0.vhd
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lpm_ff1.bsf
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lpm_ff1.vhd
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lpm_ff2.bsf
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lpm_ff2.vhd
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lpm_ff3.bsf
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lpm_ff3.cmp
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lpm_ff3.vhd
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lpm_ff4.bsf
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lpm_ff4.cmp
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lpm_ff5.bsf
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lpm_ff6.bsf
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lpm_ff6.cmp
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lpm_ff6.vhd
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lpm_fifo_dc0.bsf
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lpm_fifo_dc0.cmp
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lpm_fifo_dc0.qip
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lpm_fifo_dc0.vhd
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lpm_fifoDZ.bsf
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lpm_fifoDZ.vhd
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lpm_latch1.bsf
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lpm_latch1.vhd
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lpm_mux0.bsf
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lpm_mux1.bsf
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lpm_mux1.cmp
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lpm_mux2.bsf
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lpm_mux2.vhd
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lpm_mux3.bsf
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lpm_mux5.bsf
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lpm_mux6.bsf
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lpm_muxDZ2.bsf
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lpm_muxDZ2.vhd
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lpm_muxDZ.bsf
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lpm_muxDZ.cmp
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lpm_muxDZ.vhd
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lpm_muxVDM.bsf
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lpm_muxVDM.cmp
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lpm_muxVDM.qip
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lpm_muxVDM.vhd
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lpm_shiftreg0.bsf
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lpm_shiftreg0.cmp
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lpm_shiftreg0.qip
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lpm_shiftreg0.vhd
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lpm_shiftreg1.bsf
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lpm_shiftreg1.cmp
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lpm_shiftreg1.qip
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lpm_shiftreg1.vhd
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lpm_shiftreg2.bsf
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lpm_shiftreg2.cmp
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lpm_shiftreg2.qip
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lpm_shiftreg2.vhd
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lpm_shiftreg3.bsf
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lpm_shiftreg3.cmp
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lpm_shiftreg3.inc
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lpm_shiftreg3.qip
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lpm_shiftreg3.vhd
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lpm_shiftreg4.bsf
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lpm_shiftreg4.cmp
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lpm_shiftreg4.vhd
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lpm_shiftreg5.bsf
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lpm_shiftreg5.vhd
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lpm_shiftreg6.bsf
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lpm_shiftreg6.cmp
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2015-09-20 05:45:41 +00:00
lpm_shiftreg6.inc
another try to make the old config work
2015-09-20 05:45:41 +00:00
lpm_shiftreg6.qip
another try to make the old config work
2015-09-20 05:45:41 +00:00
lpm_shiftreg6.vhd
another try to make the old config work
2015-09-20 05:45:41 +00:00
VIDEO_MOD_MUX_CLUTCTR.tdf
improved timing, added timing constraints, got rid of CLK_33M
2015-09-23 09:49:05 +00:00
Video.bdf
add false paths to design constraints
2015-09-20 16:23:52 +00:00