Markus Fröschle 3b0e69127f now gets accepted by Modelsim

2014-09-01 14:24:55 +00:00

..

backend/Altera/Firebee

added false_path to CLK_MAIN

2014-08-17 08:43:43 +00:00

rtl/vhdl

now gets accepted by Modelsim

2014-09-01 14:24:55 +00:00

testbenches

started simulator for DDR RAM

2014-06-16 14:35:54 +00:00