214 lines
5.2 KiB
Plaintext
214 lines
5.2 KiB
Plaintext
#ifdef MACHINE_FIREBEE
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#include "firebee.h"
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#endif /* MACHINE_FIREBEE */
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#ifdef MACHINE_M5484LITE
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#include "m5484l.h"
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#endif /* MACHINE_M5484LITE */
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/* make bas_rom access flags rx if compiling to RAM */
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#if COMPILE_RAM
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#define ROMFLAGS WX
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#else
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#define ROMFLAGS RX
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#endif /* COMPILE_RAM */
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MEMORY
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{
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bas_rom (ROMFLAGS) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000
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/*
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* target to copy BaS data segment to. 20k should be enough for now
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*/
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bas_ram (WX) : ORIGIN = 0x1FFFB000, LENGTH = 0x900000
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}
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SECTIONS
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{
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/* BaS in ROM */
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.text :
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{
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OBJDIR/startcf.o(.text) /* this one is the entry point so it must be the first */
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OBJDIR/sysinit.o(.text)
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OBJDIR/fault_vectors.o(.text)
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#ifdef MACHINE_FIREBEE
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OBJDIR/init_fpga.o(.text)
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#endif /* MACHINE_FIREBEE */
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OBJDIR/wait.o(.text)
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OBJDIR/exceptions.o(.text)
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OBJDIR/illegal_instruction.o(.text)
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OBJDIR/supervisor.o(.text)
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OBJDIR/mmu.o(.text)
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OBJDIR/BaS.o(.text)
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OBJDIR/pci.o(.text)
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OBJDIR/usb.o(.text)
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OBJDIR/usb_mem.o(.text)
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OBJDIR/ohci-hcd.o(.text)
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OBJDIR/ehci-hcd.o(.text)
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OBJDIR/wait.o(.text)
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OBJDIR/unicode.o(.text)
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OBJDIR/mmc.o(.text)
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OBJDIR/ff.o(.text)
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OBJDIR/sd_card.o(.text)
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OBJDIR/s19reader.o(.text)
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OBJDIR/bas_printf.o(.text)
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OBJDIR/bas_string.o(.text)
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OBJDIR/printf_helper.o(.text)
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OBJDIR/cache.o(.text)
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OBJDIR/dma.o(.text)
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OBJDIR/MCD_dmaApi.o(.text)
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OBJDIR/MCD_tasks.o(.text)
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OBJDIR/MCD_tasksInit.o(.text)
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OBJDIR/xhdi_sd.o(.text)
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OBJDIR/xhdi_interface.o(.text)
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OBJDIR/xhdi_vec.o(.text)
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/*
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* if we compile to RAM anyway, there is no need to copy anything
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*/
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#if COMPILE_RAM
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. = ALIGN(16);
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__BAS_DATA_START = .;
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*(.data)
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__BAS_DATA_END = .;
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__BAS_BSS_START = .;
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*(.bss)
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__BAS_BSS_END = .;
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#endif /* COMPILE_RAM */
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#if (FORMAT == elf32-m68k)
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*(.rodata)
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*(.rodata.*)
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#endif
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#if COMPILE_RAM
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. = ALIGN(16);
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_usb_buffer = .;
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#endif /* COMPILE_RAM */
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} > bas_rom
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#if (TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS)
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/* BaS in RAM */
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.bas :
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/*
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* The BaS is stored in the flash, just after the init part.
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* Then it will be copied to its final location in the RAM.
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* This data must be aligned for optimal copy loop speed.
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*/
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AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4))
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{
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. = ALIGN(16);
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__BAS_DATA_START = .;
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*(.data)
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__BAS_DATA_END = .;
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__BAS_BSS_START = .;
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*(.bss)
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__BAS_BSS_END = .;
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/* The BaS copy routine assumes that tha BaS size
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* is a multiple of the following value.
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*/
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. = ALIGN(16);
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_usb_buffer = .;
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//. = . + USB_BUFFER_SIZE;
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} > bas_ram
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#endif
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/*
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* Global memory map
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*/
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/* SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes */
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___SDRAM = SDRAM_START;
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___SDRAM_SIZE = SDRAM_SIZE;
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_SDRAM_VECTOR_TABLE = ___SDRAM;
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/* ST-RAM */
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__STRAM = ___SDRAM;
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__STRAM_END = __TOS;
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/* TOS */
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__TOS = 0x00e00000;
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/* FastRAM */
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__FASTRAM = 0x10000000;
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__TARGET_ADDRESS = TARGET_ADDRESS;
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#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
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__FASTRAM_END = __BAS_IN_RAM;
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#else
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__FASTRAM_END = TARGET_ADDRESS;
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#endif
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/* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
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___BOOT_FLASH = BOOTFLASH_BASE_ADDRESS;
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___BOOT_FLASH_SIZE = BOOTFLASH_SIZE;
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#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
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/* BaS */
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__BAS_LMA = LOADADDR(.bas);
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__BAS_IN_RAM = ADDR(.bas);
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__BAS_SIZE = SIZEOF(.bas);
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#else
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/* BaS is already in RAM - no need to copy anything */
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__BAS_IN_RAM = __FASTRAM_END;
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__BAS_SIZE = 0;
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__BAS_LMA = __BAS_IN_RAM;
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#endif
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/* Other flash components */
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__FIRETOS = 0xe0400000;
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__EMUTOS = 0xe0600000;
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__EMUTOS_SIZE = 0x00100000;
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/* where FPGA data lives in flash */
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__FPGA_FLASH_DATA = 0xe0700000;
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__FPGA_FLASH_DATA_SIZE = 0x100000;
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/* VIDEO RAM BASIS */
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__VRAM = 0x60000000;
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/* Memory mapped registers */
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__MBAR = 0xFF000000;
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/* 32KB on-chip System SRAM */
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__SYS_SRAM = __MBAR + 0x10000;
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__SYS_SRAM_SIZE = 0x00008000;
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/* MMU memory mapped registers */
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__MMUBAR = 0xFF040000;
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/*
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* 4KB on-chip Core SRAM0: -> exception table
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*/
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__RAMBAR0 = 0xFF100000;
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__RAMBAR0_SIZE = 0x00001000;
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/* 4KB on-chip Core SRAM1 */
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__RAMBAR1 = 0xFF101000;
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__RAMBAR1_SIZE = 0x00001000;
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__SUP_SP = __RAMBAR0 + __RAMBAR0_SIZE - 4;
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/* system variables */
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/* RAMBAR0 0 to 0x7FF -> exception vectors */
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_rt_mod = __RAMBAR0 + 0x800;
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_rt_ssp = __RAMBAR0 + 0x804;
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_rt_usp = __RAMBAR0 + 0x808;
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_rt_vbr = __RAMBAR0 + 0x80C; /* (8)01 */
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_rt_cacr = __RAMBAR0 + 0x810; /* 002 */
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_rt_asid = __RAMBAR0 + 0x814; /* 003 */
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_rt_acr0 = __RAMBAR0 + 0x818; /* 004 */
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_rt_acr1 = __RAMBAR0 + 0x81c; /* 005 */
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_rt_acr2 = __RAMBAR0 + 0x820; /* 006 */
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_rt_acr3 = __RAMBAR0 + 0x824; /* 007 */
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_rt_mmubar = __RAMBAR0 + 0x828; /* 008 */
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_rt_sr = __RAMBAR0 + 0x82c;
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_d0_save = __RAMBAR0 + 0x830;
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_a7_save = __RAMBAR0 + 0x834;
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_video_tlb = __RAMBAR0 + 0x838;
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_video_sbt = __RAMBAR0 + 0x83C;
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_rt_mbar = __RAMBAR0 + 0x844; /* (c)0f */
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}
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