336 lines
11 KiB
C
336 lines
11 KiB
C
/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c,v 1.26 2003/11/10 18:41:22 tsi Exp $ */
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/*
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* Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
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* VA Linux Systems Inc., Fremont, California.
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*
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation on the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
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* THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/*
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* Authors:
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* Kevin E. Martin <martin@xfree86.org>
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* Rickard E. Faith <faith@valinux.com>
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*
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* References:
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*
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* !!!! FIXME !!!!
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* RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical
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* Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April
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* 1999.
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*
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* RAGE 128 Software Development Manual (Technical Reference Manual P/N
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* SDK-G04000 Rev. 0.01), ATI Technologies: June 1999.
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*
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*/
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#include "bas_types.h"
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#include "bas_printf.h"
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#include "radeonfb.h"
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#define DBG_RADEON
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#ifdef DBG_RADEON
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#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
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#else
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#define dbg(format, arg...) do { ; } while (0)
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#endif /* DBG_RADEON */
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#define CURSOR_WIDTH 64
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#define CURSOR_HEIGHT 64
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/*
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* The cursor bits are always 32bpp. On MSBFirst buses,
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* configure byte swapping to swap 32 bit units when writing
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* the cursor image. Byte swapping must always be returned
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* to its previous value before returning.
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*/
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#define CURSOR_SWAPPING_DECL_MMIO
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#define CURSOR_SWAPPING_DECL unsigned long __surface_cntl=0;
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#define CURSOR_SWAPPING_START() \
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if (rinfo->big_endian) \
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OUTREG(SURFACE_CNTL, \
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((__surface_cntl = INREG(SURFACE_CNTL)) | \
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NONSURF_AP0_SWP_32BPP) & \
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~NONSURF_AP0_SWP_16BPP);
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#define CURSOR_SWAPPING_END() \
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if (rinfo->big_endian) \
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(OUTREG(SURFACE_CNTL, __surface_cntl));
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/* Set cursor foreground and background colors */
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void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg)
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{
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struct radeonfb_info *rinfo = info->par;
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unsigned long *pixels = (unsigned long *)((unsigned long) rinfo->fb_base + rinfo->cursor_start);
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int pixel, i;
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CURSOR_SWAPPING_DECL_MMIO
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CURSOR_SWAPPING_DECL
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// DPRINTVALHEX("radeonfb: RADEONSetCursorColors: cursor_start ",rinfo->cursor_start);
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// DPRINT("\r\n");
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fg |= 0xff000000;
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bg |= 0xff000000;
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/* Don't recolour the image if we don't have to. */
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if (fg == rinfo->cursor_fg && bg == rinfo->cursor_bg)
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return;
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CURSOR_SWAPPING_START();
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/*
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* Note: We assume that the pixels are either fully opaque or fully
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* transparent, so we won't premultiply them, and we can just
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* check for non-zero pixel values; those are either fg or bg
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*/
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for (i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++)
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if ((pixel = *pixels))
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*pixels = (pixel == rinfo->cursor_fg) ? fg : bg;
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CURSOR_SWAPPING_END();
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rinfo->cursor_fg = fg;
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rinfo->cursor_bg = bg;
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}
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/* Set cursor position to (x,y) with offset into cursor bitmap at
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* (xorigin,yorigin)
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*/
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void radeon_set_cursor_position(struct fb_info *info, int x, int y)
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{
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struct radeonfb_info *rinfo = info->par;
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struct fb_var_screeninfo *mode = &info->var;
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int xorigin = 0;
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int yorigin = 0;
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if (mode->vmode & FB_VMODE_DOUBLE)
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y <<= 1;
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if (x < 0)
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xorigin = 1 - x;
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if (y < 0)
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yorigin = 1 - y;
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// DPRINTVALHEX("radeonfb: RADEONSetCursorPosition: cursor_start ",rinfo->cursor_start);
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// DPRINTVAL(" x ",x);
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// DPRINTVAL(" y ",y);
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// DPRINT("\r\n");
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OUTREG(CUR_HORZ_VERT_OFF, (CUR_LOCK | (xorigin << 16) | yorigin));
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OUTREG(CUR_HORZ_VERT_POSN, (CUR_LOCK | ((xorigin ? 0 : x) << 16) | (yorigin ? 0 : y)));
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OUTREG(CUR_OFFSET, rinfo->cursor_start + yorigin * 256);
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rinfo->cursor_x = (unsigned long)x;
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if (mode->vmode & FB_VMODE_DOUBLE)
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rinfo->cursor_y = (unsigned long) y >> 1;
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else
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rinfo->cursor_y = (unsigned long) y;
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}
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/*
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* Copy cursor image from `image' to video memory. RADEONSetCursorPosition
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* will be called after this, so we can ignore xorigin and yorigin.
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*/
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void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom)
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{
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struct radeonfb_info *rinfo = info->par;
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unsigned long *d = (unsigned long *)((unsigned long)rinfo->fb_base+rinfo->cursor_start);
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unsigned long save = 0;
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unsigned short chunk, mchunk;
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unsigned long i, j, k;
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CURSOR_SWAPPING_DECL
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// DPRINTVALHEX("radeonfb: RADEONLoadCursorImage: cursor_start ",rinfo->cursor_start);
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// DPRINT("\r\n");
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save = INREG(CRTC_GEN_CNTL) & ~(unsigned long) (3 << 20);
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save |= (unsigned long) (2 << 20);
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OUTREG(CRTC_GEN_CNTL, save & (unsigned long)~CRTC_CUR_EN);
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/*
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* Convert the bitmap to ARGB32.
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*/
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CURSOR_SWAPPING_START();
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#define ARGB_PER_CHUNK (8 * sizeof (chunk))
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switch(zoom)
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{
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case 1:
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default:
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for (i = 0; i < CURSOR_HEIGHT; i++)
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{
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if (i < 16)
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{
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mchunk = *mask++;
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chunk = *data++;
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}
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else
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mchunk = chunk = 0;
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for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j++)
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{
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for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
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{
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if (mchunk & 0x8000)
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{
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if (chunk & 0x8000)
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*d++ = 0xff000000; /* Black, fully opaque. */
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else
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*d++ = 0xffffffff; /* White, fully opaque. */
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}
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else
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*d++ = 0x00000000; /* White/Black, fully transparent. */
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}
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}
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}
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break;
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case 2:
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for (i = 0; i < CURSOR_HEIGHT; i++)
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{
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if (i < 16*2)
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{
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mchunk = *mask;
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chunk = *data;
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if ((i & 1) == 1)
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{
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mask++;
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data++;
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}
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}
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else
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mchunk = chunk = 0;
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for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=2)
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{
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for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
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{
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if (mchunk & 0x8000)
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{
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if (chunk & 0x8000)
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{
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*d++ = 0xff000000; /* Black, fully opaque. */
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*d++ = 0xff000000;
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}
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else
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{
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*d++ = 0xffffffff; /* White, fully opaque. */
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*d++ = 0xffffffff;
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}
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}
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else
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{
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*d++ = 0x00000000; /* White/Black, fully transparent. */
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*d++ = 0x00000000;
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}
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}
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}
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}
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break;
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case 4:
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for (i = 0; i < CURSOR_HEIGHT; i++)
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{
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if (i < 16 * 4)
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{
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mchunk = *mask;
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chunk = *data;
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if ((i & 3) == 3)
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{
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mask++;
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data++;
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}
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}
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else
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mchunk = chunk = 0;
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for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=4)
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{
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for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1)
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{
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if (mchunk & 0x8000)
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{
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if (chunk & 0x8000)
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{
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*d++ = 0xff000000; /* Black, fully opaque. */
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*d++ = 0xff000000;
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*d++ = 0xff000000;
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*d++ = 0xff000000;
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}
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else
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{
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*d++ = 0xffffffff; /* White, fully opaque. */
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*d++ = 0xffffffff;
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*d++ = 0xffffffff;
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*d++ = 0xffffffff;
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}
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}
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else
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{
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*d++ = 0x00000000; /* White/Black, fully transparent. */
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*d++ = 0x00000000;
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*d++ = 0x00000000;
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*d++ = 0x00000000;
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}
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}
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}
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}
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break;
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}
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CURSOR_SWAPPING_END();
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rinfo->cursor_bg = 0xffffffff; /* White, fully opaque. */
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rinfo->cursor_fg = 0xff000000; /* Black, fully opaque. */
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OUTREG(CRTC_GEN_CNTL, save);
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}
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/* Hide hardware cursor. */
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void radeon_hide_cursor(struct fb_info *info)
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{
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struct radeonfb_info *rinfo = info->par;
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// DPRINT("radeonfb: RADEONHideCursor\r\n");
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OUTREGP(CRTC_GEN_CNTL, 0, ~CRTC_CUR_EN);
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rinfo->cursor_show = 0;
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}
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/* Show hardware cursor. */
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void radeon_show_cursor(struct fb_info *info)
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{
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struct radeonfb_info *rinfo = info->par;
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// DPRINT("radeonfb: RADEONShowCursor\r\n");
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OUTREGP(CRTC_GEN_CNTL, CRTC_CUR_EN, ~CRTC_CUR_EN);
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rinfo->cursor_show = 1;
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}
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/* Initialize hardware cursor support. */
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long radeon_cursor_init(struct fb_info *info)
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{
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struct radeonfb_info *rinfo = info->par;
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int size_bytes = CURSOR_WIDTH * 4 * CURSOR_HEIGHT;
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unsigned long fbarea = offscreen_alloc(rinfo->info, size_bytes + 256);
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dbg("radeonfb: %s: fbarea: %p\r\n", fbarea);
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if (!fbarea)
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rinfo->cursor_start = 0;
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else
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{
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unsigned short data[16], mask[16];
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memset(data, 0, sizeof(data));
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memset(mask, 0, sizeof(data));
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rinfo->cursor_start = RADEON_ALIGN(fbarea - (unsigned long) rinfo->fb_base, 256);
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rinfo->cursor_end = rinfo->cursor_start + size_bytes;
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radeon_load_cursor_image(info, mask, data, 1);
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}
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dbg("radeonfb: %s cursor_start: %p\r\n", rinfo->cursor_start);
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return (rinfo->cursor_start ? fbarea : 0);
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}
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