375 lines
9.1 KiB
C
375 lines
9.1 KiB
C
//***********************************************************************************/
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// movem
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//***********************************************************************************/
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ii_movem_lset: .macro
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// movem.l rx,xxx.L
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ii_lset 0x48f9
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// movem.l xxx.L,rx
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ii_lset 0x4cf9
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// movem.w rx,xxx.L
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ii_lset 0x48b9
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// movem.w xxx.L,rx
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ii_lset 0x4cb9
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// movem.l rx,-(ax)
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ii_lset 0x48e0
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ii_lset 0x48e1
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ii_lset 0x48e2
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ii_lset 0x48e3
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ii_lset 0x48e4
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ii_lset 0x48e5
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ii_lset 0x48e6
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ii_lset 0x48e7
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// movem.l (ax)+,rx
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ii_lset 0x4cd8
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ii_lset 0x4cd9
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ii_lset 0x4cda
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ii_lset 0x4cdb
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ii_lset 0x4cdc
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ii_lset 0x4cdd
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ii_lset 0x4cde
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ii_lset 0x4cdf
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.endm
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//***********************************************************************************/
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ii_movem_func: .macro
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//-------------------------------------------------------------------
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// movem.l
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//--------------------------------------------------------------------
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// movem.l (ax)+,reg
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//--------------------------------------------------------------------
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.long 0
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az_reg_table:
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.byte 0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4 // 0-f
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.byte 1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5 // 10-1f
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.byte 1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5 // 20-2f
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.byte 2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6 // 30-3f
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.byte 1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5 // 40-4f
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.byte 2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6 // 50
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.byte 2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6 // 60
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.byte 3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7 // 70
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.byte 1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5 // 80-8f
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.byte 2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6 // 90
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.byte 2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6 // a0
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.byte 3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7 // b0
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.byte 2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6 // c0
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.byte 3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7 // d0
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.byte 3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7 // e0
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.byte 4,5,5,6,5,6,6,7,5,6,6,7,6,7,7,8 // f0
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//-------------------------------------------------------------------------------
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ii_0x48e0: // movem.l reglist,-(a0)
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mvm_mem_macro 0x48d0,a0_off(a7),2
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ii_0x48e1: // movem.l reglist,-(a1)
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mvm_mem_macro 0x48d1,a1_off(a7),2
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ii_0x48e2: // movem.l reglist,-(a2)
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mvm_mem_macro 0x48d2,a2,2
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ii_0x48e3: // movem.l reglist,-(a3)
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mvm_mem_macro 0x48d3,a3,2
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ii_0x48e4: // movem.l reglist,-(a4)
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mvm_mem_macro 0x48d4,a4,2
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ii_0x48e5: // movem.l reglist,-(a5)
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mvm_mem_macro 0x48d5,a5,2
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ii_0x48e6: // movem.l reglist,-(a6)
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mvm_mem_macro 0x48d6,a6,2
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ii_0x48e7: // movem.l reglist,-(a7)
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mvm_mem_macro 0x48d7,usp,2
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//-------------------------------------------------------------------------------
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ii_0x4cd8: // movem.l (a0)+,reglist
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mvm_reg_macro 0x4cd0,0x41e8,2
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ii_0x4cd9: // movem.l (a1)+,reglist
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mvm_reg_macro 0x4cd1,0x43e9,2
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ii_0x4cda: // movem.l (a2)+,reglist
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mvm_reg_macro 0x4cd2,0x45ea,2
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ii_0x4cdb: // movem.l (a3)+,reglist
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mvm_reg_macro 0x4cd3,0x47eb,2
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ii_0x4cdc: // movem.l (a4)+,reglist
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mvm_reg_macro 0x4cd4,0x49ec,2
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ii_0x4cdd: // movem.l (a5)+,reglist
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mvm_reg_macro 0x4cd5,0x4bed,2
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ii_0x4cde: // movem.l (a6)+,reglist
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mvm_reg_macro 0x4cd6,0x4dee,2
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ii_0x4cdf: // movem.l (a7)+,reglist
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mvm_reg_macro 0x4cd7,0x4fef,2
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//----------------------------------------------------------------------------
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ii_0x48f9: // movem.l reg,xxx.L
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#ifdef halten_movem
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halt
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#endif
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move.w (a0)+,d0
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move.l (a0)+,a1
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movemrm_macro l
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//---------------------------------------------------------------------------------------------
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ii_0x4cf9: // movem.l xxx.L,reg
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#ifdef halten_movem
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halt
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#endif
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move.w (a0)+,d0
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move.l (a0)+,a1
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movemmr_macro l
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//----------------------------------------------------------------------------
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ii_0x48b9: // movem.w reg,xxx.L
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#ifdef halten_movem
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halt
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#endif
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move.w (a0)+,d0
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move.l (a0)+,a1
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movemrm_macro w
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//---------------------------------------------------------------------------------------------
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ii_0x4cb9: // movem.w xxx.L,reg
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#ifdef halten_movem
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halt
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#endif
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move.w (a0)+,d0
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move.l (a0)+,a1
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movemmr_macro w
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.endm
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//==============================================================
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mvm_mem_macro:.macro
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#ifdef halten_movem
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halt
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#endif
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lea az_reg_table,a1
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mvz.b (a0),d1
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mvz.b 0(a1,d1)+,d0
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mvz.b 1(a0),d1
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mvz.b 0(a1,d1)+,d1
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add.l d0,d1
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lsl.l #\3,d1 // * anzahl byts pro wert
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move.l \2,a1
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sub.l d1,a1 // ax-anzahl byts
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move.l a1,\2
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lea ___RAMBAR1,a1
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move.l a1,pc_off(a7)
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move.l a1,d0
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addq.l #1,d0
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movec d0,RAMBAR1
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move.w #\1,(a1)+ // movem.x reg_list,-(a7)
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move.w (a0)+,(a1)+ // register list
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move.w #0x4ef9,(a1)+ // jmp.l
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move.l a0,(a1) // r<>cksprungadresse
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move.l #___RAMBAR1 + 0x81,d0 // instruction
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movec d0,RAMBAR1
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movem.l (a7),d0/d1/a0/a1
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lea ii_ss(a7),a7 // stack erh<72>hen
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rte
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.endm
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//---------------------------------------------------------------------------------
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mvm_reg_macro:.macro
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#ifdef halten_movem
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halt
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#endif
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lea az_reg_table,a1
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mvz.b (a0),d1
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mvz.b 0(a1,d1)+,d0
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mvz.b 1(a0),d1
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mvz.b 0(a1,d1)+,d1
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add.l d0,d1
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lea ___RAMBAR1,a1
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move.l a1,pc_off(a7)
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move.l a1,d0
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addq.l #1,d0
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movec d0,RAMBAR1
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move.w #\1,(a1)+ // movem.x (ax),reg_list
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move.w (a0)+,(a1)+ // register list
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move.w #\2,(a1)+ // lea 0(ax),ax
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lsl.l #\3,d1 // * anzahl byts pro wert
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move.w d1,(a1)+ // offset von lea
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move.w #0x4ef9,(a1)+ // jmp.l
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move.l a0,(a1) // r<>cksprungadresse
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move.l #___RAMBAR1 + 0x81,d0 // instruction
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movec d0,RAMBAR1
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movem.l (a7),d0/d1/a0/a1
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lea ii_ss(a7),a7 // stack erh<72>hen
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rte
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.endm
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//---------------------------------------------------------------------------------
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movemrm_macro:.macro // in d0 register liste, in a1 zieladresse
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#ifdef halten_movem
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halt
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#endif
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tst.b d0 // datenregister zu verschieben?
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bne mrm_dx\@ // ja->
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lsr.l #8,d0 // sonst zu addressregister
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jmp mmrm_nd7\@ // ->
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mrm_dx\@:
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lsr.l #1,d0
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bcc mmrm_nd0\@
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.ifc 1,l
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move.l d0_off(a7),(a1)+
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.else
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move.w d0_off+2(a7),(a1)+
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.endif
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mmrm_nd0\@:
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lsr.l #1,d0
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bcc mmrm_nd1\@
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.ifc 1,l
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move.l d1_off(a7),(a1)+
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.else
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move.w d1_off+2(a7),(a1)+
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.endif
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mmrm_nd1\@:
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lsr.l #1,d0
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bcc mmrm_nd2\@
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move.\1 d2,(a1)+
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mmrm_nd2\@:
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lsr.l #1,d0
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bcc mmrm_nd3\@
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move.\1 d3,(a1)+
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mmrm_nd3\@:
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lsr.l #1,d0
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bcc mmrm_nd4\@
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move.\1 d4,(a1)+
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mmrm_nd4\@:
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lsr.l #1,d0
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bcc mmrm_nd5\@
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move.\1 d5,(a1)+
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mmrm_nd5\@:
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lsr.l #1,d0
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bcc mmrm_nd6\@
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move.l d6,(a1)+
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mmrm_nd6\@:
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lsr.l #1,d0
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bcc mmrm_nd7\@
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move.\1 d7,(a1)+
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mmrm_nd7\@:
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tst.b d0 // addressregister zu verschieben?
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beq mmrm_na7\@
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lsr.l #1,d0
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bcc mmrm_na0\@
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.ifc 1,l
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move.l a0_off(a7),(a1)+
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.else
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move.w a0_off+2(a7),(a1)+
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.endif
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mmrm_na0\@:
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lsr.l #1,d0
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bcc mmrm_na1\@
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.ifc 1,l
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move.l a1_off(a7),(a1)+
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.else
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move.w a1_off+2(a7),(a1)+
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.endif
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mmrm_na1\@:
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lsr.l #1,d0
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bcc mmrm_na2\@
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move.\1 a2,(a1)+
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mmrm_na2\@:
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lsr.l #1,d0
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bcc mmrm_na3\@
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move.\1 a3,(a1)+
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mmrm_na3\@:
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lsr.l #1,d0
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bcc mmrm_na4\@
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move.\1 a4,(a1)+
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mmrm_na4\@:
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lsr.l #1,d0
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bcc mmrm_na5\@
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move.\1 a5,(a1)+
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mmrm_na5\@:
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lsr.l #1,d0
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bcc mmrm_na6\@
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move.\1 a6,(a1)+
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mmrm_na6\@:
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lsr.l #1,d0
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bcc mmrm_na7\@
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move.l a0,d1 // sichern
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move.l usp,a0 // ist ja usp
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move.\1 a0,(a1)+ // nach a0
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move.l d1,a0 // pc zur<75>ck
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mmrm_na7\@:
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ii_end
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.endm
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//---------------------------------------------------------------------------------------------
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movemmr_macro:.macro // in d0 register liste, in a1 source adr
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#ifdef halten_movem
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halt
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#endif
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tst.b d0 // datenregister zu verschieben?
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bne mmr_dx\@ // ja->
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lsr.l #8,d0 // sonst zu addressregister
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bra mmmr_nd7\@ // ->
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mmr_dx\@:
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lsr.l #1,d0
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bcc mmmr_nd0\@
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.ifc 1,l
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move.l (a1)+,d0_off(a7)
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.else
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move.w (a1)+,d0_off+2(a7)
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.endif
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mmmr_nd0\@:
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lsr.l #1,d0
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bcc mmmr_nd1\@
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.ifc 1,l
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move.l (a1)+,d1_off(a7)
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.else
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move.w (a1)+,d1_off+2(a7)
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.endif
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mmmr_nd1\@:
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lsr.l #1,d0
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bcc mmmr_nd2\@
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move.\1 (a1)+,d2
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mmmr_nd2\@:
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lsr.l #1,d0
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bcc mmmr_nd3\@
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move.\1 (a1)+,d3
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mmmr_nd3\@:
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lsr.l #1,d0
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bcc mmmr_nd4\@
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move.\1 (a1)+,d4
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mmmr_nd4\@:
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lsr.l #1,d0
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bcc mmmr_nd5\@
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move.\1 (a1)+,d5
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mmmr_nd5\@:
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lsr.l #1,d0
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bcc mmmr_nd6\@
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move.\1 (a1)+,d6
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mmmr_nd6\@:
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lsr.l #1,d0
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bcc mmmr_nd7\@
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move.\1 (a1)+,d7
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mmmr_nd7\@:
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tst.b d0 // addressregister zu verschieben?
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beq mmmr_na7\@ // nein->
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lsr.l #1,d0
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bcc mmmr_na0\@
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.ifc 1,l
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move.l (a1)+,a0_off(a7)
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.else
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move.w (a1)+,a0_off+2(a7)
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.endif
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mmmr_na0\@:
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lsr.l #1,d0
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bcc mmmr_na1\@
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.ifc 1,l
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move.l (a1)+,a1_off(a7)
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.else
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move.w (a1)+,a1_off+2(a7)
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.endif
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mmmr_na1\@:
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lsr.l #1,d0
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bcc mmmr_na2\@
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move.\1 (a1)+,a2
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mmmr_na2\@:
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lsr.l #1,d0
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bcc mmmr_na3\@
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move.\1 (a1)+,a3
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mmmr_na3\@:
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lsr.l #1,d0
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bcc mmmr_na4\@
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move.\1 (a1)+,a4
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mmmr_na4\@:
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lsr.l #1,d0
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bcc mmmr_na5\@
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move.\1 (a1)+,a5
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mmmr_na5\@:
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lsr.l #1,d0
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bcc mmmr_na6\@
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move.\1 (a1)+,a6
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mmmr_na6\@:
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lsr.l #1,d0
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bcc mmmr_na7\@
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move.\1 (a1)+,a1 // nach a0
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move.l a1,usp // war ja usp
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mmmr_na7\@:
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ii_end
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.endm
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