716 lines
20 KiB
C
716 lines
20 KiB
C
#include <stdint.h>
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#include <bas_types.h>
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#include <sd_card.h>
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#include <bas_printf.h>
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#include <sysinit.h>
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#include <wait.h>
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#include <MCF5475.h>
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/*
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* Firebee: MMCv3/SDv1/SDv2 (SPI mode) control module
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*
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*
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* Copyright (C) 2011, ChaN, all right reserved.
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*
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* This software is a free software and there is NO WARRANTY.
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* No restriction on use. You can use, modify and redistribute it for
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* personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
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* Redistributions of source code must retain the above copyright notice.
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*
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*/
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/* Copyright (C) 2012, mfro, all rights reserved. */
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#define CS_LOW() { dspi_fifo_val |= MCF_DSPI_DTFR_CS5; }
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#define CS_HIGH() { dspi_fifo_val &= ~MCF_DSPI_DTFR_CS5; }
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/*
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* DCTAR_PBR (baud rate prescaler) and DCTAR_BR (baud rate scaler) together determine the SPI baud rate. The forumula is
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*
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* baud rate = system clock / DCTAR_PBR * 1 / DCTAR_BR.
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*
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* System clock for the Firebee is 133 MHZ.
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*
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* The SPICLK_FAST() example calculates as follows: baud rate = 133 MHz / 3 * 1 / 2 = 22,16 MHz
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* SPICLK_SLOW() should be between 100 and 400 kHz: 133 MHz / 1 * 1 / 1024 = 129 kHz
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*/
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#define SPICLK_FAST() { MCF_DSPI_DCTAR0 = MCF_DSPI_DCTAR_TRSZ(0b0111) | /* transfer size = 8 bit */ \
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MCF_DSPI_DCTAR_PCSSCK(0b01) | /* 3 clock DSPICS to DSPISCK delay prescaler */ \
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MCF_DSPI_DCTAR_PASC_3CLK | /* 3 clock DSPISCK to DSPICS negation prescaler */ \
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MCF_DSPI_DCTAR_PDT_3CLK | /* 3 clock delay between DSPICS assertions prescaler */ \
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MCF_DSPI_DCTAR_PBR_3CLK | /* 3 clock baudrate prescaler */ \
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MCF_DSPI_DCTAR_CSSCK(1) | /* delay scaler * 4 */\
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MCF_DSPI_DCTAR_ASC(0b0001) | /* 2 */ \
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MCF_DSPI_DCTAR_DT(0b0010) | /* 2 */ \
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MCF_DSPI_DCTAR_BR(0b0000); } /* clock / 2 */
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#define SPICLK_SLOW() { MCF_DSPI_DCTAR0 = MCF_DSPI_DCTAR_TRSZ(0b111) | /* transfer size = 8 bit */ \
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MCF_DSPI_DCTAR_PCSSCK(0b01) | /* 3 clock DSPICS to DSPISCK delay prescaler */ \
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MCF_DSPI_DCTAR_PASC_3CLK | /* 3 clock DSPISCK to DSPICS negation prescaler */ \
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MCF_DSPI_DCTAR_PDT_3CLK | /* 3 clock delay between DSPICS assertions prescaler */ \
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MCF_DSPI_DCTAR_PBR_3CLK | /* 1 clock baudrate prescaler */ \
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MCF_DSPI_DCTAR_CSSCK(8) | /* delay scaler * 512 */\
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MCF_DSPI_DCTAR_ASC(8) | /* 2 */ \
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MCF_DSPI_DCTAR_DT(9) | /* 2 */ \
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MCF_DSPI_DCTAR_BR(7); }
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/*--------------------------------------------------------------------------
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Module Private Functions
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---------------------------------------------------------------------------*/
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#include "diskio.h"
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/* MMC/SD command */
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#define CMD0 (0) /* GO_IDLE_STATE */
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#define CMD1 (1) /* SEND_OP_COND (MMC) */
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#define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */
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#define CMD8 (8) /* SEND_IF_COND */
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#define CMD9 (9) /* SEND_CSD */
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#define CMD10 (10) /* SEND_CID */
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#define CMD12 (12) /* STOP_TRANSMISSION */
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#define ACMD13 (0x80+13) /* SD_STATUS (SDC) */
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#define CMD16 (16) /* SET_BLOCKLEN */
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#define CMD17 (17) /* READ_SINGLE_BLOCK */
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#define CMD18 (18) /* READ_MULTIPLE_BLOCK */
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#define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */
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#define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
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#define CMD24 (24) /* WRITE_BLOCK */
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#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
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#define CMD32 (32) /* ERASE_ER_BLK_START */
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#define CMD33 (33) /* ERASE_ER_BLK_END */
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#define CMD38 (38) /* ERASE */
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#define CMD55 (55) /* APP_CMD */
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#define CMD58 (58) /* READ_OCR */
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static volatile DSTATUS Stat = 0 /* STA_NOINIT */; /* Physical drive status */
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static uint8_t CardType; /* Card type flags */
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static uint32_t dspi_fifo_val = // MCF_DSPI_DTFR_CONT | /* enable continous chip select */
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/* CTAS use DCTAR0 for clock and attributes */
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MCF_DSPI_DTFR_CTCNT;
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/*-----------------------------------------------------------------------*/
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/* Send/Receive data to the MMC (Platform dependent) */
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/*-----------------------------------------------------------------------*/
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/*
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* Exchange a byte. If last is false (0), there will be more bytes to follow (EOQ flag in DTFR left unset)
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*/
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static uint8_t xchg_spi(uint8_t byte, int last)
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{
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uint32_t fifo;
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uint8_t res;
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fifo = dspi_fifo_val | (byte & 0xff); /* transfer bytes only */
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//fifo |= (last ? MCF_DSPI_DTFR_EOQ : 0); /* mark last transfer */
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MCF_DSPI_DTFR = fifo;
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while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait until DSPI transfer complete */
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fifo = MCF_DSPI_DRFR; /* read transferred word */
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MCF_DSPI_DSR = -1; /* clear DSPI status register */
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res = fifo & 0xff;
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return res;
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}
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/* Receive multiple byte
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*
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* buff: pointer to data buffer
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* btr: number of bytes to receive (16, 64 or 512)
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*/
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static void rcvr_spi_multi(uint8_t *buff, uint32_t count)
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{
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int i;
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for (i = 0; i < count - 1; i++)
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*buff++ = xchg_spi(0xff, 0);
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*buff++ = xchg_spi(0xff, 1); /* transfer last byte and stop transmission */
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}
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#if _USE_WRITE
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/* Send multiple byte
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*
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* buff: pointer to data
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* btx: number of bytes to send
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*/
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static void xmit_spi_multi(const uint8_t *buff, uint32_t btx)
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{
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int i;
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for (i = 0; i < btx - 1; i++)
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xchg_spi(*buff++, 0);
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xchg_spi(*buff++, 1); /* transfer last byte and indicate end of transmission */
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}
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#endif
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static bool card_ready(void)
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{
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uint8_t d;
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d = xchg_spi(0xff, 1);
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return (d == 0xff);
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}
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/*
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* Wait for card ready
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*
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* wt: timeout in ms
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* returns 1: ready, 0: timeout
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*/
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static int wait_ready(uint32_t wt)
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{
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return waitfor(wt, card_ready);
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}
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/*
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* Deselect card and release SPI
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*/
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static void deselect(void)
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{
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CS_HIGH();
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xchg_spi(0xFF, 1); /* Dummy clock (force DO hi-z for multiple slave SPI) */
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}
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/*
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* Select card and wait for ready
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*/
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static int select(void) /* 1:OK, 0:Timeout */
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{
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CS_LOW();
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xchg_spi(0xFF, 1); /* Dummy clock (force DO enabled) */
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if (wait_ready(5000000))
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return 1; /* OK */
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deselect();
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return 0; /* Timeout */
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}
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/*
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* Control SPI module (Platform dependent)
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*/
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static void power_on(void) /* Enable SSP module */
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{
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MCF_PAD_PAR_DSPI = 0x1fff; /* configure all DSPI GPIO pins for DSPI usage */
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/*
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* initialize DSPI module configuration register
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*/
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MCF_DSPI_DMCR = MCF_DSPI_DMCR_MSTR | /* FireBee is DSPI master*/
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MCF_DSPI_DMCR_CSIS5 | /* CS5 inactive state high */
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MCF_DSPI_DMCR_CSIS3 | /* CS3 inactive state high */
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MCF_DSPI_DMCR_CSIS2 | /* CS2 inactive state high */
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MCF_DSPI_DMCR_CSIS0 | /* CS0 inactive state high */
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MCF_DSPI_DMCR_DTXF | /* disable transmit FIFO */
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MCF_DSPI_DMCR_DRXF | /* disable receive FIFO */
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MCF_DSPI_DMCR_CTXF | /* clear transmit FIFO */
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MCF_DSPI_DMCR_CRXF; /* clear receive FIFO */
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/* initialize DSPI clock and transfer attributes register 0 */
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SPICLK_SLOW();
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CS_HIGH(); /* Set CS# high */
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/* card should now be initialized as MMC */
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wait(10 * 1000); /* 10ms */
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}
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static void power_off (void) /* Disable SPI function */
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{
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select(); /* Wait for card ready */
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deselect();
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}
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/*-----------------------------------------------------------------------*/
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/* Receive a data packet from the MMC */
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/*-----------------------------------------------------------------------*/
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static int rcvr_datablock(uint8_t *buff, uint32_t btr)
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{
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uint8_t token;
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int32_t target = MCF_SLT_SCNT(0) - (500L * 1000L * 132L);
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do { /* Wait for DataStart token in timeout of 200ms */
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token = xchg_spi(0xFF, 0);
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/* This loop will take a time. Insert rot_rdq() here for multitask environment. */
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} while ((token == 0xFF) && MCF_SLT_SCNT(0) > target);
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if (token == 0xff)
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{
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xprintf("no data start token received after 500ms in rcvr_datablock\r\n");
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return 0;
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}
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if (token != 0xFE)
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{
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xprintf("invalid token (%x) in rcvr_datablock()!\r\n", token);
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return 0; /* Function fails if invalid DataStart token or timeout */
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}
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rcvr_spi_multi(buff, btr); /* Store trailing data to the buffer */
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xchg_spi(0xFF, 1);
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xchg_spi(0xFF, 1); /* Discard CRC */
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return 1; /* Function succeeded */
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}
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/*-----------------------------------------------------------------------*/
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/* Send a data packet to the MMC */
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/*-----------------------------------------------------------------------*/
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#if _USE_WRITE
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static int xmit_datablock(const uint8_t *buff, uint8_t token)
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{
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uint8_t resp;
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if (!wait_ready(500 * 1000))
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{
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xprintf("card did not respond ready after 500 ms in xmit_datablock()\r\n");
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return 0; /* Wait for card ready */
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}
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xchg_spi(token, 1); /* Send token */
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if (token != 0xFD) { /* Send data if token is other than StopTran */
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xmit_spi_multi(buff, 512); /* Data */
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xchg_spi(0xFF, 1);
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xchg_spi(0xFF, 1); /* Dummy CRC */
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resp = xchg_spi(0xFF, 1); /* Receive data resp */
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if ((resp & 0x1F) != 0x05) /* Function fails if the data packet was not accepted */
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{
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xprintf("card did not accept data packet in xmit_datablock()\r\n");
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return 0;
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}
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}
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wait_ready(30000);
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return 1;
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}
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#endif
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/*-----------------------------------------------------------------------*/
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/* Send a command packet to the MMC */
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/*-----------------------------------------------------------------------*/
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static uint8_t send_cmd(uint8_t cmd, uint32_t arg)
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{
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int n;
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int res;
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if (cmd & 0x80)
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{ /* Send a CMD55 prior to ACMD<n> */
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cmd &= 0x7F;
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res = send_cmd(CMD55, 0);
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if (res > 1)
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return res;
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}
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/* Select card */
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deselect();
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if (!select())
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return 0xFF;
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if (!wait_ready(500 * 1000))
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{
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xprintf("card did not respond ready after 500 ms in send_cmd()\r\n");
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return 0xff; /* Wait for card ready */
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}
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/* Send command packet */
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xchg_spi(0x40 | cmd, 0); /* Start + command index */
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xchg_spi((uint8_t)(arg >> 24), 0); /* Argument[31..24] */
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xchg_spi((uint8_t)(arg >> 16), 0); /* Argument[23..16] */
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xchg_spi((uint8_t)(arg >> 8), 0); /* Argument[15..8] */
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xchg_spi((uint8_t)arg, 1); /* Argument[7..0] */
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n = 0x01; /* Dummy CRC + Stop */
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if (cmd == CMD0)
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n = 0x95; /* Valid CRC for CMD0(0) */
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if (cmd == CMD8)
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n = 0x87; /* Valid CRC for CMD8(0x1AA) */
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xchg_spi(n, 0);
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/* Receive command resp */
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if (cmd == CMD12)
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xchg_spi(0xFF, 0); /* Discard following one byte when CMD12 */
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n = 10000; /* Wait for response (1000 bytes max) */
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do
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res = xchg_spi(0xFF, 1);
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while ((res & 0x80) && --n);
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return res; /* Return received response */
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}
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/*--------------------------------------------------------------------------
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Public Functions
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---------------------------------------------------------------------------*/
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/*
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* Initialize disk drive
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*
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* drv: physical drive number (0)
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*/
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DSTATUS disk_initialize(uint8_t drv)
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{
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uint8_t n, cmd, card_type, ocr[4];
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if (drv)
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return STA_NOINIT; /* Supports only drive 0 */
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power_on(); /* Initialize SPI */
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if (Stat & STA_NODISK)
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return Stat; /* Is card existing in the socket? */
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SPICLK_SLOW();
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for (n = 10; n; n--)
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xchg_spi(0xFF, 1); /* Send 80 dummy clocks */
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card_type = 0;
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if (send_cmd(CMD0, 0) == 1) { /* Put the card SPI/Idle state */
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int32_t target;
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if (send_cmd(CMD8, 0x1AA) == 1) { /* SDv2? */
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for (n = 0; n < 4; n++)
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ocr[n] = xchg_spi(0xFF, 1); /* Get 32 bit return value of R7 resp */
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if (ocr[2] == 0x01 && ocr[3] == 0xAA)
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{
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/* Is the card supports vcc of 2.7-3.6V? */
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target = MCF_SLT_SCNT(0) - (1000L * 1000L * 132); /* 1 sec */
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while (MCF_SLT_SCNT(0) > target && send_cmd(ACMD41, 1UL << 30)) ; /* Wait for end of initialization with ACMD41(HCS) */
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target = MCF_SLT_SCNT(0) - (1000L * 1000L * 132); /* 1 sec */
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if (MCF_SLT_SCNT(0) > target && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
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for (n = 0; n < 4; n++)
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ocr[n] = xchg_spi(0xFF, 1);
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card_type = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* Card id SDv2 */
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}
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}
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}
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else
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{ /* Not SDv2 card */
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if (send_cmd(ACMD41, 0) <= 1)
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{ /* SDv1 or MMC? */
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card_type = CT_SD1;
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cmd = ACMD41; /* SDv1 (ACMD41(0)) */
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} else {
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card_type = CT_MMC;
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cmd = CMD1; /* MMCv3 (CMD1(0)) */
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}
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target = MCF_SLT_SCNT(0) - (1000L * 1000L * 132); /* 1 sec */
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while (MCF_SLT_SCNT(0) > target && send_cmd(cmd, 0)); /* Wait for end of initialization */
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if (send_cmd(CMD16, 512) != 0) /* Set block length: 512 */
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card_type = 0;
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}
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}
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CardType = card_type; /* Card type */
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deselect();
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if (card_type) { /* OK */
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SPICLK_FAST(); /* Set fast clock */
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Stat &= ~STA_NOINIT; /* Clear STA_NOINIT flag */
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} else { /* Failed */
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xprintf("no card type detected in disk_initialize()\r\n");
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power_off();
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Stat = STA_NOINIT;
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}
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return Stat;
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}
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/*-----------------------------------------------------------------------*/
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/* Get disk status */
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/*-----------------------------------------------------------------------*/
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DSTATUS disk_status(uint8_t drv)
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{
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if (drv) return STA_NOINIT; /* Supports only drive 0 */
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return Stat; /* Return disk status */
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}
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/*-----------------------------------------------------------------------*/
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/* Read sector(s) */
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/*-----------------------------------------------------------------------*/
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DRESULT disk_read(uint8_t drv, uint8_t *buff, uint32_t sector, uint8_t count)
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{
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if (drv || !count) return RES_PARERR; /* Check parameter */
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if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
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if (!(CardType & CT_BLOCK)) sector *= 512; /* LBA or BA conversion (byte addressing cards) */
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if (count == 1) { /* Single sector read */
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if ((send_cmd(CMD17, sector) == 0) /* READ_SINGLE_BLOCK */
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&& rcvr_datablock(buff, 512))
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count = 0;
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}
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else { /* Multiple sector read */
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if (send_cmd(CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */
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do {
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if (!rcvr_datablock(buff, 512)) break;
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buff += 512;
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} while (--count);
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send_cmd(CMD12, 0); /* STOP_TRANSMISSION */
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}
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}
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deselect();
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return count ? RES_ERROR : RES_OK; /* Return result */
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}
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/*-----------------------------------------------------------------------*/
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/* Write sector(s) */
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/*-----------------------------------------------------------------------*/
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#if _USE_WRITE
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DRESULT disk_write(uint8_t drv, const uint8_t *buff, uint32_t sector, uint8_t count)
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{
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int res;
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|
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if (drv || !count) return RES_PARERR; /* Check parameter */
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if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check drive status */
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if (Stat & STA_PROTECT) return RES_WRPRT; /* Check write protect */
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if (!(CardType & CT_BLOCK))
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{
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sector *= 512; /* LBA ==> BA conversion (byte addressing cards) */
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}
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if (count == 1)
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{ /* Single sector write */
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res = send_cmd(CMD24, sector);
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if (res == 0)
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{
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count = 0;
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}
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else
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xprintf("send_cmd(CMD24, ...) failed in disk_write()\r\n");
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if (xmit_datablock(buff, 0xFE))
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{
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count = 0;
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}
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else
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{
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xprintf("xmit_datablock(buff, ...) failed in disk_write()\r\n");
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}
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}
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else { /* Multiple sector write */
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if (CardType & CT_SDC) send_cmd(ACMD23, count); /* Predefine number of sectors */
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if (send_cmd(CMD25, sector) == 0)
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{ /* WRITE_MULTIPLE_BLOCK */
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do
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{
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if (!xmit_datablock(buff, 0xFC)) break;
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buff += 512;
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} while (--count);
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if (!xmit_datablock(0, 0xFD)) /* STOP_TRAN token */
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{
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count = 1;
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}
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}
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}
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deselect();
|
|
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if (count)
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xprintf("disk_write() failed (count=%d)\r\n", count);
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return count ? RES_ERROR : RES_OK; /* Return result */
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}
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#endif
|
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|
|
|
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/*-----------------------------------------------------------------------*/
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/* Miscellaneous drive controls other than data read/write */
|
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/*-----------------------------------------------------------------------*/
|
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|
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#if _USE_IOCTL
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DRESULT disk_ioctl(uint8_t drv, uint8_t ctrl, void *buff)
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|
{
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DRESULT res;
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uint8_t n, csd[16], *ptr = buff;
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uint32_t *dp, st, ed, csize;
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|
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if (drv) return RES_PARERR; /* Check parameter */
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if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
|
|
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res = RES_ERROR;
|
|
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switch (ctrl) {
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case CTRL_SYNC : /* Wait for end of internal write process of the drive */
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if (select()) {
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deselect();
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res = RES_OK;
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}
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break;
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case GET_SECTOR_COUNT : /* Get drive capacity in unit of sector (DWORD) */
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if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
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if ((csd[0] >> 6) == 1) { /* SDC ver 2.00 */
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csize = csd[9] + ((uint16_t)csd[8] << 8) + ((uint32_t)(csd[7] & 63) << 16) + 1;
|
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*(uint32_t*)buff = csize << 10;
|
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} else { /* SDC ver 1.XX or MMC ver 3 */
|
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n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
|
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csize = (csd[8] >> 6) + ((uint16_t)csd[7] << 2) + ((uint16_t)(csd[6] & 3) << 10) + 1;
|
|
*(uint32_t*)buff = csize << (n - 9);
|
|
}
|
|
res = RES_OK;
|
|
}
|
|
break;
|
|
|
|
case GET_SECTOR_SIZE : /* Get sector size in unit of byte (WORD) */
|
|
*(uint16_t*)buff = 512;
|
|
res = RES_OK;
|
|
break;
|
|
|
|
case GET_BLOCK_SIZE : /* Get erase block size in unit of sector (DWORD) */
|
|
if (CardType & CT_SD2) { /* SDC ver 2.00 */
|
|
if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
|
|
xchg_spi(0xFF, 1);
|
|
if (rcvr_datablock(csd, 16)) { /* Read partial block */
|
|
for (n = 64 - 16; n; n--) xchg_spi(0xFF, 1); /* Purge trailing data */
|
|
*(uint32_t*)buff = 16UL << (csd[10] >> 4);
|
|
res = RES_OK;
|
|
}
|
|
}
|
|
} else { /* SDC ver 1.XX or MMC */
|
|
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
|
|
if (CardType & CT_SD1) { /* SDC ver 1.XX */
|
|
*(uint32_t*)buff = (((csd[10] & 63) << 1) + ((uint16_t)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
|
|
} else { /* MMC */
|
|
*(uint32_t*)buff = ((uint16_t)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
|
|
}
|
|
res = RES_OK;
|
|
}
|
|
}
|
|
break;
|
|
|
|
case CTRL_ERASE_SECTOR : /* Erase a block of sectors (used when _USE_ERASE == 1) */
|
|
if (!(CardType & CT_SDC)) break; /* Check if the card is SDC */
|
|
if (disk_ioctl(drv, MMC_GET_CSD, csd)) break; /* Get CSD */
|
|
if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break; /* Check if sector erase can be applied to the card */
|
|
dp = buff; st = dp[0]; ed = dp[1]; /* Load sector block */
|
|
if (!(CardType & CT_BLOCK)) {
|
|
st *= 512; ed *= 512;
|
|
}
|
|
if (send_cmd(CMD32, st) == 0 && send_cmd(CMD33, ed) == 0 && send_cmd(CMD38, 0) == 0 && wait_ready(30000)) /* Erase sector block */
|
|
res = RES_OK; /* FatFs does not check result of this command */
|
|
break;
|
|
|
|
/* Following command are not used by FatFs module */
|
|
|
|
case MMC_GET_TYPE : /* Get MMC/SDC type (BYTE) */
|
|
*ptr = CardType;
|
|
res = RES_OK;
|
|
break;
|
|
|
|
case MMC_GET_CSD : /* Read CSD (16 bytes) */
|
|
if (send_cmd(CMD9, 0) == 0 /* READ_CSD */
|
|
&& rcvr_datablock(ptr, 16))
|
|
res = RES_OK;
|
|
break;
|
|
|
|
case MMC_GET_CID : /* Read CID (16 bytes) */
|
|
if (send_cmd(CMD10, 0) == 0 /* READ_CID */
|
|
&& rcvr_datablock(ptr, 16))
|
|
res = RES_OK;
|
|
break;
|
|
|
|
case MMC_GET_OCR : /* Read OCR (4 bytes) */
|
|
if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
|
|
for (n = 4; n; n--) *ptr++ = xchg_spi(0xFF, 1);
|
|
res = RES_OK;
|
|
}
|
|
break;
|
|
|
|
case MMC_GET_SDSTAT : /* Read SD status (64 bytes) */
|
|
if (send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
|
|
xchg_spi(0xFF, 1);
|
|
if (rcvr_datablock(ptr, 64))
|
|
res = RES_OK;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
res = RES_PARERR;
|
|
break;
|
|
}
|
|
|
|
deselect();
|
|
|
|
return res;
|
|
}
|
|
#endif
|
|
|
|
|
|
/*-----------------------------------------------------------------------*/
|
|
/* Device timer function */
|
|
/*-----------------------------------------------------------------------*/
|
|
/* This function must be called from timer interrupt routine in period
|
|
/ of 1 ms to generate card control timing.
|
|
*/
|
|
|
|
#ifdef _NOT_USED_
|
|
void disk_timerproc (void)
|
|
{
|
|
uint8_t s;
|
|
|
|
s = Stat;
|
|
if (WP) /* Write protected */
|
|
s |= STA_PROTECT;
|
|
else /* Write enabled */
|
|
s &= ~STA_PROTECT;
|
|
//if (INS) /* Card is in socket */
|
|
s &= ~STA_NODISK;
|
|
//else /* Socket empty */
|
|
// s |= (STA_NODISK | STA_NOINIT);
|
|
Stat = s;
|
|
}
|
|
#endif /* _NOT_USED_ */
|