332 lines
8.2 KiB
C
332 lines
8.2 KiB
C
/*
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* Interrupts
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*
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* Handle interrupts, the levels.
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*
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*
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* This file is part of BaS_gcc.
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*
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* BaS_gcc is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* BaS_gcc is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with BaS_gcc. If not, see <http://www.gnu.org/licenses/>.
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*
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* Created on: 26.02.2013
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* Author: Markus Fröschle
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*/
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#include <bas_types.h>
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#include "MCF5475.h"
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#include "bas_utils.h"
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#include "bas_printf.h"
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#include "bas_string.h"
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#include "exceptions.h"
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#include "interrupts.h"
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#include "bas_printf.h"
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#include "startcf.h"
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#include "cache.h"
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#include "util.h"
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#include "dma.h"
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extern void (*rt_vbr[])(void);
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#define VBR rt_vbr
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//#define IRQ_DEBUG
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#if defined(IRQ_DEBUG)
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#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
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#else
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#define dbg(format, arg...) do { ; } while (0)
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#endif
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/*
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* register an interrupt handler at the Coldfire interrupt controller and add the handler to
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* the interrupt vector table
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*/
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int register_interrupt_handler(uint8_t source, uint8_t level, uint8_t priority, uint8_t intr, void (*handler)(void))
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{
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int ipl;
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int i;
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volatile uint8_t *ICR = &MCF_INTC_ICR01 - 1;
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uint8_t lp;
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source &= 63;
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priority &= 7;
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if (source < 1 || source > 63)
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{
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dbg("interrupt source %d not defined\r\n", source);
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return -1;
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}
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lp = MCF_INTC_ICR_IL(level) | MCF_INTC_ICR_IP(priority);
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/* check if this combination is already set somewhere */
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for (i = 1; i < 64; i++)
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{
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if (ICR[i] == lp)
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{
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dbg("level %d and priority %d already used for interrupt source %d!\r\n",
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level, priority, i);
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return -1;
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}
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}
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/* disable interrupts */
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ipl = set_ipl(7);
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VBR[64 + source] = handler; /* first 64 vectors are system exceptions */
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/* set level and priority in interrupt controller */
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ICR[source] = lp;
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/* set interrupt mask to where it was before */
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set_ipl(ipl);
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return 0;
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}
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#ifndef MAX_ISR_ENTRY
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#define MAX_ISR_ENTRY (20)
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#endif
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struct isrentry
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{
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int vector;
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int (*handler)(void *, void *);
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void *hdev;
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void *harg;
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};
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static struct isrentry isrtab[MAX_ISR_ENTRY]; /* list of interrupt service routines */
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/*
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* clear the table of interrupt service handlers
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*/
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void isr_init(void)
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{
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memset(isrtab, 0, sizeof(isrtab));
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}
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/*
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* This function places an interrupt handler in the ISR table,
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* thereby registering it so that the low-level handler may call it.
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*
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* The two parameters are intended for the first arg to be a
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* pointer to the device itself, and the second a pointer to a data
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* structure used by the device driver for that particular device.
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*/
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int isr_register_handler(int vector, int (*handler)(void *, void *), void *hdev, void *harg)
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{
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int index;
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if ((vector == 0) || (handler == NULL))
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{
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dbg("illegal vector or handler!\r\n");
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return false;
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}
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for (index = 0; index < MAX_ISR_ENTRY; index++)
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{
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if (isrtab[index].vector == vector)
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{
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/* one cross each, only! */
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dbg("already set handler with this vector (%d, %d)\r\n", vector);
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return false;
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}
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if (isrtab[index].vector == 0)
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{
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isrtab[index].vector = vector;
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isrtab[index].handler = handler;
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isrtab[index].hdev = hdev;
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isrtab[index].harg = harg;
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return true;
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}
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}
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dbg("no available slots to register handler for vector %d\n\r", vector);
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return false; /* no available slots */
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}
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void isr_remove_handler(int (*handler)(void *, void *))
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{
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/*
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* This routine removes from the ISR table all
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* entries that matches 'handler'.
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*/
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int index;
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for (index = 0; index < MAX_ISR_ENTRY; index++)
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{
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if (isrtab[index].handler == handler)
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{
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memset(&isrtab[index], 0, sizeof(struct isrentry));
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return;
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}
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}
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dbg("no such handler registered (handler=%p\r\n", handler);
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}
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/*
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* This routine searches the ISR table for an entry that matches
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* 'vector'. If one is found, then 'handler' is executed.
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*/
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bool isr_execute_handler(int vector)
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{
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int index;
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bool retval = false;
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/*
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* locate a BaS Interrupt Service Routine handler.
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*/
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for (index = 0; index < MAX_ISR_ENTRY; index++)
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{
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if (isrtab[index].vector == vector)
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{
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retval = true;
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if (isrtab[index].handler(isrtab[index].hdev, isrtab[index].harg))
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{
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return retval;
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}
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}
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}
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dbg("no BaS isr handler for vector %d found\r\n", vector);
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return retval;
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}
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/*
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* PIC interrupt handler for Firebee
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*
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* Handles PIC requests that come in from PSC3 serial interface. Currently, that
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* is RTC/NVRAM requests only
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*/
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int pic_interrupt_handler(void *arg1, void *arg2)
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{
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uint8_t rcv_byte;
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rcv_byte = MCF_PSC3_PSCRB_8BIT;
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if (rcv_byte == 2) // PIC requests RTC data
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{
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uint8_t *rtc_reg = (uint8_t *) 0xffff8961;
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uint8_t *rtc_data = (uint8_t *) 0xffff8963;
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int index = 0;
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xprintf("PIC interrupt: requesting RTC data\r\n");
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MCF_PSC3_PSCTB_8BIT = 0x82; // header byte to PIC
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do
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{
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*rtc_reg = 0;
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MCF_PSC3_PSCTB_8BIT = *rtc_data;
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} while (index++ < 64);
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}
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return 1;
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}
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void video_addr_timeout(void)
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{
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dbg("video address timeout\r\n");
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}
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/*
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* blink the Firebee's LED to show we are still alive
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*/
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void blink_led(void)
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{
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static uint16_t blinker = 0;
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if ((blinker++ & 0x80) > 0)
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{
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MCF_GPIO_PODR_FEC1L |= (1 << 4); /* LED off */
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}
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else
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{
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MCF_GPIO_PODR_FEC1L &= ~(1 << 4); /* LED on */
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}
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}
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/*
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* Atari MFP interrupt registers.
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*
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* TODO: should go into a header file
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*/
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#define FALCON_MFP_IERA *((volatile uint8_t *) 0xfffffa07)
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#define FALCON_MFP_IERB *((volatile uint8_t *) 0xfffffa09)
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#define FALCON_MFP_IPRA *((volatile uint8_t *) 0xfffffa0b)
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#define FALCON_MFP_IPRB *((volatile uint8_t *) 0xfffffa0d)
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#define FALCON_MFP_IMRA *((volatile uint8_t *) 0xfffffa13)
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#define FALCON_MFP_IMRB *((volatile uint8_t *) 0xfffffa15)
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bool irq6_acsi_dma_interrupt(void)
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{
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dbg("ACSI DMA interrupt\r\n");
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/*
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* TODO: implement handler
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*/
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return false;
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}
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bool irq6_interrupt_handler(uint32_t sf1, uint32_t sf2)
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{
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bool handled = false;
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MCF_EPORT_EPFR |= (1 << 6); /* clear int6 from edge port */
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if (FALCON_MFP_IPRA || FALCON_MFP_IPRB)
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{
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blink_led();
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}
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return handled;
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}
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#if defined(MACHINE_FIREBEE)
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#define vbasehi (* (volatile uint8_t *) 0xffff8201)
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#define vbasemid (* (volatile uint8_t *) 0xffff8203)
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#define vbaselow (* (volatile uint8_t *) 0xffff820d)
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#define vwrap (* (volatile uint16_t *) 0xffff8210)
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#define vde (* (volatile uint16_t *) 0xffff82aa)
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#define vdb (* (volatile uint16_t *) 0xffff82a8)
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/*
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* this is the higlevel interrupt service routine for gpt0 timer interrupts.
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*
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* It is called from handler_gpt0 in exceptions.S
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*
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* The gpt0 timer is not used as a timer, but as interrupt trigger by the FPGA which fires
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* everytime the video base address high byte (0xffff8201) gets written by user code (i.e.
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* everytime the video base address is set).
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* The interrupt service routine checks if that page was already set as a video page (in that
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* case it does nothing), if not (if we have a newly set page), it sets up an MMU mapping for
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* that page (effectively rerouting any further access to Falcon video RAM to Firebee FPGA
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* video RAM starting at 0x60000000) and copies SDRAM contents of that page to the video
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* RAM page.
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*/
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void gpt0_interrupt_handler(void)
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{
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dbg("screen base = 0x%x\r\n", vbasehi);
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MCF_GPT0_GMS &= ~1; /* rearm trigger */
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NOP();
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MCF_GPT0_GMS |= 1;
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}
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#endif /* MACHINE_FIREBEE */
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