423 lines
12 KiB
C
423 lines
12 KiB
C
#include "video.h"
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#include "videl.h"
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#include "screen.h"
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#include "pci.h"
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#include "pci_ids.h"
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#include "mod_devicetable.h"
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#include "fb.h"
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#include "radeonfb.h"
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#define DEBUG
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#include "debug.h"
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#ifdef _USE_VIDEL_
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#define MON_ALL -1 /* code used in VMODE_ENTRY for match on mode only */
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/*
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* tables that cover all(?) valid Falcon modes
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* note:
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* . 256-colour and Truecolor modes are not currently supported by the VDI
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*/
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static const VMODE_ENTRY vga_init_table[] = {
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/* the entries in this table are for VGA/NTSC (i.e. VGA 60Hz) and VGA/PAL
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* (i.e. VGA 50Hz). in *this* table, each entry applies to four video modes:
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* mode, mode|VIDEL_VERTICAL, mode|VIDEL_PAL, mode|VIDEL_VERTICAL|VIDEL_PAL
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*/
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{ 0x0011, MON_ALL, 0x0017, 0x0012, 0x0001, 0x020a, 0x0009, 0x0011, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 },
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{ 0x0012, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x028a, 0x006b, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 },
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{ 0x0013, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x029a, 0x007b, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 },
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{ 0x0014, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x02ac, 0x0091, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 },
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{ 0x0018, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x0273, 0x0050, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 },
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{ 0x0019, MON_ALL, 0x0017, 0x0012, 0x0001, 0x020e, 0x000d, 0x0011, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 },
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{ 0x001a, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x02a3, 0x007c, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 },
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{ 0x001b, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x02ab, 0x0084, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 },
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{ 0x0092, MON_ALL, 0x0017, 0x0012, 0x0001, 0x020e, 0x000d, 0x0011, 0x0419, 0x03af, 0x008f, 0x008f, 0x03af, 0x0415 },
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{ 0x0098, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x0273, 0x0050, 0x0096, 0x0419, 0x03af, 0x008f, 0x008f, 0x03af, 0x0415 },
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{ 0x0099, MON_ALL, 0x0017, 0x0012, 0x0001, 0x020e, 0x000d, 0x0011, 0x0419, 0x03af, 0x008f, 0x008f, 0x03af, 0x0415 },
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{ -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
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};
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/*
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* Initialise palette registers
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* This routine is also used by resolution change
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*/
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void initialise_palette_registers(int16_t rez,int16_t mode)
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{
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initialise_falcon_palette(mode);
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}
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/*
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* determine regc0 based on video mode & monitor type
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*/
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static int16_t determine_regc0(int16_t mode, int16_t monitor)
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{
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if (mode&VIDEL_VGA)
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return 0x0186;
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if (!(mode&VIDEL_COMPAT))
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return (monitor==MON_TV)?0x0183:0x0181;
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/* handle ST-compatible modes */
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if ((mode&(VIDEL_80COL|VIDEL_BPPMASK)) == (VIDEL_80COL|VIDEL_1BPP)) { /* 80-column, 2-colour */
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switch(monitor) {
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case MON_MONO:
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return 0x0080;
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case MON_TV:
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return 0x0183;
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default:
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return 0x0181;
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}
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}
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return (monitor==MON_TV)?0x0083:0x0081;
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}
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/*
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* determine vctl based on video mode and monitor type
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*/
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static int16_t determine_vctl(int16_t mode,int16_t monitor)
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{
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int16_t vctl;
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if (mode&VIDEL_VGA) {
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vctl = (mode&VIDEL_80COL) ? 0x08 : 0x04;
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if (mode&VIDEL_VERTICAL)
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vctl |= 0x01;
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} else {
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vctl = (mode&VIDEL_80COL) ? 0x04 : 0x00;
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if (mode&VIDEL_VERTICAL)
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vctl |= 0x02;
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}
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if (!(mode&VIDEL_COMPAT))
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return vctl;
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switch(mode&VIDEL_BPPMASK) {
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case VIDEL_1BPP:
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if (!(mode&VIDEL_VGA) && (monitor == MON_MONO))
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vctl = 0x08;
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break;
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case VIDEL_2BPP:
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vctl = (mode&VIDEL_VGA)? 0x09 : 0x04;
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break;
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case VIDEL_4BPP:
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vctl = (mode&VIDEL_VGA)? 0x05 : 0x00;
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break;
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}
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return vctl;
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}
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/*
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* determine scanline width based on video mode
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*/
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static int16_t determine_width(int16_t mode)
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{
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int16_t linewidth;
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linewidth = (mode&VIDEL_80COL) ? 40 : 20;
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linewidth <<= (mode & VIDEL_BPPMASK);
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if (mode&VIDEL_OVERSCAN)
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linewidth = linewidth * 12 / 10; /* multiply by 1.2 */
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return linewidth;
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}
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static int set_videl_vga(int16_t mode)
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{
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volatile char *videlregs = (char *)0xffff8200;
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#define videlword(n) (*(volatile uint16_t *)(videlregs+(n)))
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const VMODE_ENTRY *p;
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int16_t linewidth, monitor, vctl;
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monitor = vmontype();
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p = lookup_videl_mode(mode,monitor);/* validate mode */
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if (!p)
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return -1;
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videlregs[0x0a] = (mode&VIDEL_PAL) ? 2 : 0; /* video sync to 50Hz if PAL */
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// FIXME: vsync() can't work if the screen is initially turned off
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//vsync(); /* wait for vbl so we're not interrupted :-) */
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videlword(0x82) = p->hht; /* H hold timer */
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videlword(0x84) = p->hbb; /* H border begin */
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videlword(0x86) = p->hbe; /* H border end */
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videlword(0x88) = p->hdb; /* H display begin */
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videlword(0x8a) = p->hde; /* H display end */
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videlword(0x8c) = p->hss; /* H SS */
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videlword(0xa2) = p->vft; /* V freq timer */
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videlword(0xa4) = p->vbb; /* V border begin */
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videlword(0xa6) = p->vbe; /* V border end */
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videlword(0xa8) = p->vdb; /* V display begin */
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videlword(0xaa) = p->vde; /* V display end */
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videlword(0xac) = p->vss; /* V SS */
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videlregs[0x60] = 0x00; /* clear ST shift for safety */
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videlword(0x0e) = 0; /* offset */
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linewidth = determine_width(mode);
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vctl = determine_vctl(mode,monitor);
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videlword(0x10) = linewidth; /* scanline width */
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videlword(0xc2) = vctl; /* video control */
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videlword(0xc0) = determine_regc0(mode,monitor);
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videlword(0x66) = 0x0000; /* clear SPSHIFT */
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switch(mode&VIDEL_BPPMASK) { /* set SPSHIFT / ST shift */
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case VIDEL_1BPP: /* 2 colours (mono) */
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if (monitor == MON_MONO)
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videlregs[0x60] = 0x02;
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else videlword(0x66) = 0x0400;
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break;
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case VIDEL_2BPP: /* 4 colours */
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videlregs[0x60] = 0x01;
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videlword(0x10) = linewidth; /* writing to the ST shifter has */
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videlword(0xc2) = vctl; /* just overwritten these registers */
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break;
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case VIDEL_4BPP: /* 16 colours */
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/* if not ST-compatible, SPSHIFT was already set correctly above */
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if (mode&VIDEL_COMPAT)
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videlregs[0x60] = 0x00; /* else set ST shifter */
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break;
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case VIDEL_8BPP: /* 256 colours */
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videlword(0x66) = 0x0010;
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break;
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case VIDEL_TRUECOLOR: /* 65536 colours (Truecolor) */
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videlword(0x66) = 0x0100;
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break;
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}
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return 0;
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}
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int16_t current_video_mode;
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/* Set physical screen address */
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static void setphys(int32_t addr,int checkaddr)
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{
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*(volatile uint8_t *) VIDEOBASE_ADDR_HI = ((uint32_t) addr) >> 16;
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*(volatile uint8_t *) VIDEOBASE_ADDR_MID = ((uint32_t) addr) >> 8;
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*(volatile uint8_t *) VIDEOBASE_ADDR_LOW = ((uint32_t) addr);
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}
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/*
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* In the original TOS there used to be an early screen init,
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* before memory configuration. This is not used here, and all is
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* done at the same time from C.
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*/
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void videl_screen_init(void)
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{
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uint32_t screen_start;
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uint16_t boot_resolution = FALCON_DEFAULT_BOOT;
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int16_t monitor_type, sync_mode;
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int16_t rez = 0; /* avoid 'may be uninitialized' warning */
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/* Initialize the interrupt handlers.
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* It is important to do this first because the initialization code below
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* may call vsync(), which temporarily enables the interrupts. */
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/* TODO: VEC_HBL = int_hbl; */
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/* TODO: VEC_VBL = int_vbl; */
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/*
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* first, see what we're connected to, and set the
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* resolution / video mode appropriately
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*/
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monitor_type = MON_COLOR;
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xprintf("monitor_type = %d\r\n", monitor_type);
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/* reset VIDEL on boot-up */
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/* first set the physbase to a safe memory */
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setphys(0xd00000, 0);
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if (!lookup_videl_mode(boot_resolution, monitor_type)) /* mode isn't in table */
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{
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xprintf("Invalid video mode 0x%04x changed to 0x%04x\r\n",
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boot_resolution, FALCON_DEFAULT_BOOT);
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boot_resolution = FALCON_DEFAULT_BOOT; /* so pick one that is */
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}
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if (!VALID_VDI_BPP(boot_resolution)) /* mustn't confuse VDI */
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{
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xprintf("VDI doesn't support video mode 0x%04x, changed to 0x%04x\r\n",
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boot_resolution, FALCON_DEFAULT_BOOT);
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boot_resolution = FALCON_DEFAULT_BOOT; /* so use default */
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}
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vsetmode(boot_resolution);
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rez = FALCON_REZ; /* fake value indicates Falcon/Videl */
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sync_mode = (boot_resolution & VIDEL_PAL) ? 0x02 : 0x00;
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*(volatile uint8_t *) SYNCMODE = sync_mode;
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/*
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* next, set up the palette(s)
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*/
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initialise_palette_registers(rez, boot_resolution);
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/* FIXME: sshiftmod = rez; */
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/* videoram is placed just below the phystop */
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screen_start = 0xd00000;
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/* correct physical address */
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setphys(screen_start, 1);
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}
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#endif /* _USE_VIDEL_ */
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static uint8_t mon1_EDID[40];
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static uint8_t mon2_EDID[40];
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static struct radeonfb_info rfb =
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{
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.mon1_EDID = mon1_EDID,
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.mon2_EDID = mon2_EDID,
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};
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static struct fb_var_screeninfo default_fb =
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{
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.xres = 640,
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.yres = 480,
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.xres_virtual = 640,
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.yres_virtual = 480,
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.bits_per_pixel = 8,
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.grayscale = 0,
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.red = { .length = 8 },
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.green = { .length = 8 },
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.blue = { .length = 8 },
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.activate = FB_ACTIVATE_NOW,
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.height = -1,
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.width = -1,
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.pixclock = 39721,
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.left_margin = 40,
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.right_margin = 24,
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.upper_margin = 32,
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.lower_margin = 11,
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.hsync_len = 96,
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.vsync_len = 2,
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.vmode = FB_VMODE_NONINTERLACED,
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};
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static struct fb_info fb =
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{
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.par = &rfb,
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.fix =
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{
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"ATI Radeon",
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0x80000000,
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0x00800000,
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FB_TYPE_PLANES,
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0,
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FB_VISUAL_PSEUDOCOLOR,
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1,
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1,
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1,
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640,
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0x88000000,
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0x4000,
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1,
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},
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};
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struct fb_info *info_fb = &fb;
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const char monitor_layout[1024] = "\0";
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int16_t ignore_edid;
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struct mode_option resolution =
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{
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.used = 0,
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.width = 640,
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.height = 480,
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.bpp = 8,
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.freq = 60,
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.flags = 0
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};
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int16_t force_measure_pll = 0;
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void install_vbl_timer(void *func, int remove)
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{
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dbg("not implemented\r\n");
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}
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/*
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* detect and initialise PCI graphics cards
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*/
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void video_init(void)
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{
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/*
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* detect PCI video card
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*/
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int index = 0;
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int32_t handle;
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struct pci_device_id *board;
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int32_t id;
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bool radeon_found = false;
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dbg("\r\n");
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/* FIXME: we currently just return here because the PCI configuration of ATI cards does not (yet) work */
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//return;
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do
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{
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/*
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* scan PCI bus for graphics cards
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*/
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handle = pci_find_classcode(PCI_BASE_CLASS_DISPLAY | PCI_FIND_BASE_CLASS, index);
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dbg("handle=%d\r\n", handle);
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if (handle > 0) /* found a display device */
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{
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dbg("handle = 0x%x\r\n", handle);
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id = swpl(pci_read_config_longword(handle, PCIIDR)); /* get vendor + device id */
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dbg("PCIIDR=0x%x\r\n", id);
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board = &radeonfb_pci_table[0];
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do
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{
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/* check it against elements of table */
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dbg("check %x %x against %08x\r\n", board->device, board->vendor, id);
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if ((board->device == (id >> 16)) && (board->vendor == (id & 0xffff)))
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{
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radeon_found = true;
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dbg("matched\r\n");
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xprintf("registering RADEON card with PCI handle 0x%02x\r\n", handle);
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if (radeonfb_pci_register(handle, board) >= 0)
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{
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info_fb->fbops->fb_check_modes(info_fb, &resolution);
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fb_set_var(info_fb, &default_fb);
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inf("RADEON video card found and registered\r\n");
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}
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else
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{
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err("failed to register RADEON PCI video card\r\n");
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}
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return;
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}
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board++;
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} while (board->vendor);
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}
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index++;
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} while (handle > 0);
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inf("RADEON video card %sfound and %sregistered\r\n",
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(radeon_found ? "" : "not "), (radeon_found ? "" : "not "));
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}
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