Files
FireBee_SVN/FPGA_quartus/Video/lpm_fifo_dc0_waveforms.html
2011-01-03 08:10:50 +00:00

14 lines
802 B
HTML

<html>
<head>
<title>Sample Waveforms for lpm_fifo_dc0.vhd </title>
</head>
<body>
<h2><CENTER>Sample behavioral waveforms for design file lpm_fifo_dc0.vhd </CENTER></h2>
<P>The following waveforms show the behavior of dcfifo megafunction for the chosen set of parameters in design lpm_fifo_dc0.vhd. The design lpm_fifo_dc0.vhd has a depth of 512 words of 128 bits each. The fifo is in legacy synchronous mode. The data becomes available after 'rdreq' is asserted; 'rdreq' acts as a read request. </P>
<CENTER><img src=lpm_fifo_dc0_wave0.jpg> </CENTER>
<P><CENTER><FONT size=2>Fig. 1 : Wave showing read and write operation. </CENTER></P>
<P><FONT size=3>The above waveform shows the behavior of the design under normal read and write conditions with aclr . </P>
<P></P>
</body>
</html>