172 lines
6.7 KiB
C
172 lines
6.7 KiB
C
#include "radeonfb.h"
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#include "pci.h"
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#include "x86emu.h"
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#include "x86pcibios.h"
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#include "x86emu_regs.h"
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#include "bas_printf.h"
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extern unsigned short offset_port;
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// #define DEBUG
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#include "debug.h"
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int x86_pcibios_handler(struct X86EMU *emu)
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{
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int ret = 0;
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unsigned long dev;
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switch (emu->x86.R_AX)
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{
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case PCI_BIOS_PRESENT:
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dbg("PCI_BIOS_PRESENT\r\n");
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emu->x86.R_AH = 0x00; /* no config space/special cycle support */
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emu->x86.R_AL = 0x01; /* config mechanism 1 */
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emu->x86.R_EDX = 'P' | 'C' << 8 | 'I' << 16 | ' ' << 24;
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emu->x86.R_EBX = 0x0210; /* Version 2.10 */
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emu->x86.R_ECX = 0xFF00; /* FixME: Max bus number */
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emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
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ret = 1;
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break;
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case FIND_PCI_DEVICE:
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dbg("FIND_PCI_DEVICE vendor = %04x, device = %04x\r\n", emu->x86.R_DX, emu->x86.R_CX);
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dev = pci_find_device((uintptr_t) emu->x86.R_DX, ((unsigned long) emu->x86.R_CX), 0);
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if (dev != 0)
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{
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dbg("dev = %d\r\n", dev);
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emu->x86.R_BH = PCI_BUS_FROM_HANDLE(dev);
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//X86_BH = (char)(dev >> 16) / PCI_MAX_FUNCTION); // dev->bus->secondary;
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emu->x86.R_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev);
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//X86_BL = (char)dev; // dev->path.u.pci.devfn;
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emu->x86.R_AH = SUCCESSFUL;
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emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
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ret = 1;
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}
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else
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{
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dbg("device not found\r\n");
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emu->x86.R_AH = DEVICE_NOT_FOUND;
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emu->x86.R_EFLG |= FB_CF; /* set carry flag */
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ret = 0;
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}
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break;
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case FIND_PCI_CLASS_CODE:
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/* FixME: support SI != 0 */
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dbg("FIND_PCI_CLASS_CODE %x", emu->x86.R_ECX);
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dev = pci_find_classcode(emu->x86.R_ECX, 0);
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if (dev != 0) {
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dbg(" ...OK\r\n");
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emu->x86.R_BH = PCI_BUS_FROM_HANDLE(dev);
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emu->x86.R_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev);
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emu->x86.R_AH = SUCCESSFUL;
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emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
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ret = 1;
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}
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else
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{
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dbg(" ... error\r\n");
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emu->x86.R_AH = DEVICE_NOT_FOUND;
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emu->x86.R_EFLG |= FB_CF; /* set carry flag */
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ret = 0;
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}
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break;
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case READ_CONFIG_BYTE:
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// bus, devfn
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dbg("READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
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emu->x86.R_CL = pci_read_config_byte(dev, emu->x86.R_DI);
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dbg("dev=0x%04x value = 0x%04x\r\n", emu->x86.R_CL);
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emu->x86.R_AH = SUCCESSFUL;
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emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
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ret = 1;
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break;
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case READ_CONFIG_WORD:
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// bus, devfn
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dbg("READ_CONFIG_WORD bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
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if (emu->x86.R_DI == PCIBAR1)
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emu->x86.R_CX = offset_port + 1;
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else
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emu->x86.R_CX = pci_read_config_word(dev, emu->x86.R_DI);
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dbg("offset_port=0x%04x dev=0x%04x, value = %x\r\n", offset_port, dev, emu->x86.R_CX);
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emu->x86.R_AH = SUCCESSFUL;
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emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
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ret = 1;
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break;
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case READ_CONFIG_DWORD:
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// bus, devfn
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dbg("READ_CONFIG_DWORD bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
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if (emu->x86.R_DI == PCIBAR1)
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emu->x86.R_CX = (unsigned long) offset_port + 1;
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else
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emu->x86.R_ECX = pci_read_config_longword(dev, emu->x86.R_DI);
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dbg("value = %x\r\n", emu->x86.R_ECX);
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emu->x86.R_AH = SUCCESSFUL;
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emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
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ret = 1;
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break;
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case WRITE_CONFIG_BYTE:
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// bus, devfn
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dbg("READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x, value = %x\r\n",
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emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI, emu->x86.R_CL);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
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pci_write_config_byte(dev, emu->x86.R_DI, emu->x86.R_CL);
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emu->x86.R_AH = SUCCESSFUL;
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emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
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ret = 1;
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break;
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case WRITE_CONFIG_WORD:
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// bus, devfn
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
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dbg("WRITE_CONFIG_WORD bus = %x, devfn = %x, reg = %x, value = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI, emu->x86.R_CX);
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if (emu->x86.R_DI == PCIBAR1)
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{
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offset_port = emu->x86.R_CX;
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emu->x86.R_AH = SUCCESSFUL;
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emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
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ret = 1;
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break;
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}
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pci_write_config_word(dev, emu->x86.R_DI, emu->x86.R_CX);
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emu->x86.R_AH = SUCCESSFUL;
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emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
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ret = 1;
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break;
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case WRITE_CONFIG_DWORD:
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// bus, devfn
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
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dbg("WRITE_CONFIG_DWORD bus = %x, devfn = %x, value = %x\r\n",
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emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI, emu->x86.R_ECX);
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if (emu->x86.R_DI == PCIBAR1)
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{
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offset_port = (unsigned short) emu->x86.R_ECX & 0xFFFC;
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emu->x86.R_AH = SUCCESSFUL;
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emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
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ret = 1;
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break;
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}
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pci_write_config_longword(dev, emu->x86.R_DI, emu->x86.R_ECX);
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emu->x86.R_AH = SUCCESSFUL;
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emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
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ret = 1;
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break;
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default:
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dbg("PCI_BIOS FUNC_NOT_SUPPORTED\r\n");
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emu->x86.R_AH = FUNC_NOT_SUPPORTED;
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emu->x86.R_EFLG |= FB_CF;
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break;
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}
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return ret;
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}
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