; This is the board specific initialization file used in CodeWarrior Embedded product for ColdFire architecture
;        $RCSfile: M5475EVB.cfg,v $
;        $Revision: 1.4 $   $Date: 2008/01/09 11:46:41 $
; Please do NOT modifiy this file. If you wish to modify this file, please keep a backup copy of this file.

ResetHalt

;Set VBR - debugger must know this in order
;   to do exception capture
writecontrolreg 0x0801 0x00000000

; If MBAR changes all following writes must change
;   and if a memory configuration file is used,
;   the reserved areas in the register block must
;   change also.
;Turn on MBAR at 0xFF00_0000
writecontrolreg 0x0C0F 0xFF000000

;Turn on RAMBAR0 at address FF10_0000 
writecontrolreg 0x0C04 0xFF100035

;Turn on RAMBAR1 at address FF10_1000 
writecontrolreg 0x0C05 0xFF101035

;Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
writemem.l 0xFF000500 0xE0000000;
writemem.l 0xFF000508 0x00001180;  16-bit port
writemem.l 0xFF000504 0x007F0001;

;SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
writemem.l 0xFF000004 0x000002AA;   SDRAMDS configuration
writemem.l 0xFF000020 0x0000001A;   SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
writemem.l 0xFF000024 0x0800001A;   SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
writemem.l 0xFF000028 0x1000001A;   SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
writemem.l 0xFF00002C 0x1800001A;   SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
writemem.l 0xFF000108 0x53722938;   SDCFG1
writemem.l 0xFF00010C 0x24330000;   SDCFG2

writemem.l 0xFF000104 0xE10F0002;   SDCR + IPALL
writemem.l 0xFF000100 0x40010000;   SDMR (write to LEMR)
writemem.l 0xFF000100 0x05890000;   SDRM (write to LMR)
writemem.l 0xFF000104 0xE10F0002;   SDCR + IPALL
writemem.l 0xFF000104 0xE10F0004;   SDCR + IREF (first refresh)
writemem.l 0xFF000104 0xE10F0004;   SDCR + IREF (second refresh)
writemem.l 0xFF000100 0x01890000;   SDMR (write to LMR)
writemem.l 0xFF000104 0x710F0F00;   SDCR (lock SDMR and enable refresh)

delay 1000