5 Commits

Author	SHA1	Message	Date
Markus Fröschle	40e6a71e47	started testbench bus transaction implementation	2014-06-13 06:26:42 +00:00
Markus Fröschle	05a13bdf16	added clock signals	2014-06-11 17:52:44 +00:00
Markus Fröschle	8d0ede14c8	worked on testbench	2014-06-11 16:41:25 +00:00
Markus Fröschle	2c29f6a232	tried less restrictive option to speed up synthesis	2014-06-10 06:52:16 +00:00
Markus Fröschle	727aa5bce9	initial import after removal of FPGA_quartus	2014-06-09 20:35:29 +00:00