55 Commits

Author	SHA1	Message	Date
Markus Fröschle	8d0ede14c8	worked on testbench	2014-06-11 16:41:25 +00:00
Markus Fröschle	2c29f6a232	tried less restrictive option to speed up synthesis	2014-06-10 06:52:16 +00:00
Markus Fröschle	3b6fc36db1	removed dsp56k	2014-06-09 20:37:34 +00:00
Markus Fröschle	727aa5bce9	initial import after removal of FPGA_quartus	2014-06-09 20:35:29 +00:00
Matthias Alles	af014dc0d6	Initial checkin of DSP 56k VHDL code.	2010-11-02 07:29:43 +00:00