From fe65b2ca00ab31c6adfe634b3f8c30670ebefe34 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Markus=20Fr=C3=B6schle?= Date: Sun, 11 Jan 2015 10:27:36 +0000 Subject: [PATCH] replaced DMA API routines by fresh download with originals moved more interrupt handlers to generalized handler cleaned up lowlevel interrupt handling fixed wrong assignment of interrupt masks reformatted --- BaS_gcc/dma/MCD_dmaApi.c | 620 +++++++++++++++----------------- BaS_gcc/dma/MCD_tasks.c | 370 +++++++++---------- BaS_gcc/dma/MCD_tasksInit.c | 283 ++++++++------- BaS_gcc/dma/dma.c | 4 +- BaS_gcc/include/MCD_dma.h | 122 +++---- BaS_gcc/include/MCD_tasksInit.h | 8 +- BaS_gcc/include/fec.h | 50 +-- BaS_gcc/include/interrupts.h | 17 +- BaS_gcc/net/fec.c | 24 +- BaS_gcc/net/net_timer.c | 4 +- BaS_gcc/sys/BaS.c | 7 +- BaS_gcc/sys/exceptions.S | 40 +-- BaS_gcc/sys/interrupts.c | 68 ++-- BaS_gcc/sys/mmu.c | 98 ++--- 14 files changed, 842 insertions(+), 873 deletions(-) diff --git a/BaS_gcc/dma/MCD_dmaApi.c b/BaS_gcc/dma/MCD_dmaApi.c index 1ecce25..839fce1 100755 --- a/BaS_gcc/dma/MCD_dmaApi.c +++ b/BaS_gcc/dma/MCD_dmaApi.c @@ -8,7 +8,6 @@ #include "MCD_dma.h" #include "MCD_tasksInit.h" #include "MCD_progCheck.h" -#include "bas_types.h" /********************************************************************/ /* @@ -30,6 +29,7 @@ extern TaskTableEntry MCD_modelTaskTableSrc[NUMOFVARIANTS]; volatile TaskTableEntry *MCD_taskTable; TaskTableEntry *MCD_modelTaskTable; + /* * MCD_chStatus[] is an array of status indicators for remembering * whether a DMA has ever been attempted on each channel, pausing @@ -46,8 +46,8 @@ static int MCD_chStatus[NCHANNELS] = /* * Prototypes for local functions */ -static void MCD_memcpy(int *dest, int *src, uint32_t size); -static void MCD_resmActions(int channel); +static void MCD_memcpy (int *dest, int *src, u32 size); +static void MCD_resmActions (int channel); /* * Buffer descriptors used for storage of progress info for single Dmas @@ -61,6 +61,7 @@ MCD_bufDesc MCD_singleBufDescs[NCHANNELS]; #endif MCD_bufDesc *MCD_relocBuffDesc; + /* * Defines for the debug control register's functions */ @@ -117,11 +118,11 @@ MCD_bufDesc *MCD_relocBuffDesc; typedef struct MCD_remVariants_struct MCD_remVariant; struct MCD_remVariants_struct { - int remDestRsdIncr[NCHANNELS]; /* -1,0,1 */ - int remSrcRsdIncr[NCHANNELS]; /* -1,0,1 */ - int16_t remDestIncr[NCHANNELS]; /* DestIncr */ - int16_t remSrcIncr[NCHANNELS]; /* srcIncr */ - uint32_t remXferSize[NCHANNELS]; /* xferSize */ + int remDestRsdIncr[NCHANNELS]; /* -1,0,1 */ + int remSrcRsdIncr[NCHANNELS]; /* -1,0,1 */ + s16 remDestIncr[NCHANNELS]; /* DestIncr */ + s16 remSrcIncr[NCHANNELS]; /* srcIncr */ + u32 remXferSize[NCHANNELS]; /* xferSize */ }; /* @@ -142,9 +143,9 @@ MCD_remVariant MCD_remVariants; * MCD_TABLE_UNALIGNED if taskTableDest is not 512-byte aligned * MCD_OK otherwise */ -extern uint32_t MCD_funcDescTab0[]; +extern u32 MCD_funcDescTab0[]; -int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags) +int MCD_initDma (dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags) { int i; TaskTableEntry *entryPtr; @@ -156,7 +157,7 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags) if ((flags & MCD_RELOC_TASKS) != 0) { int fixedSize; - uint32_t *fixedPtr; + u32 *fixedPtr; /*int *tablePtr = taskTableDest;TBD*/ int varTabsOffset, funcDescTabsOffset, contextSavesOffset; int taskDescTabsOffset; @@ -166,8 +167,8 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags) int i; /* check if physical address is aligned on 512 byte boundary */ - if (((uint32_t) taskTableDest & 0x000001ff) != 0) - return (MCD_TABLE_UNALIGNED); + if (((u32)taskTableDest & 0x000001ff) != 0) + return(MCD_TABLE_UNALIGNED); MCD_taskTable = taskTableDest; /* set up local pointer to task Table */ @@ -182,7 +183,7 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags) taskTableSize = NCHANNELS * sizeof(TaskTableEntry); /* align variable tables to size */ - varTabsOffset = taskTableSize + (uint32_t) taskTableDest; + varTabsOffset = taskTableSize + (u32)taskTableDest; if ((varTabsOffset & (VAR_TAB_SIZE - 1)) != 0) varTabsOffset = (varTabsOffset + VAR_TAB_SIZE) & (~VAR_TAB_SIZE); /* align function descriptor tables */ @@ -190,28 +191,27 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags) funcDescTabsOffset = varTabsOffset + varTabsSize; if ((funcDescTabsOffset & (FUNCDESC_TAB_SIZE - 1)) != 0) - funcDescTabsOffset = (funcDescTabsOffset + FUNCDESC_TAB_SIZE) - & (~FUNCDESC_TAB_SIZE); + funcDescTabsOffset = (funcDescTabsOffset + FUNCDESC_TAB_SIZE) & + (~FUNCDESC_TAB_SIZE); funcDescTabsSize = FUNCDESC_TAB_NUM * FUNCDESC_TAB_SIZE; contextSavesOffset = funcDescTabsOffset + funcDescTabsSize; contextSavesSize = (NCHANNELS * CONTEXT_SAVE_SIZE); - fixedSize = taskTableSize + varTabsSize + funcDescTabsSize - + contextSavesSize; + fixedSize = taskTableSize + varTabsSize + funcDescTabsSize + + contextSavesSize; /* zero the thing out */ - fixedPtr = (uint32_t *) taskTableDest; - for (i = 0; i < (fixedSize / 4); i++) + fixedPtr = (u32 *)taskTableDest; + for (i = 0;i<(fixedSize/4);i++) fixedPtr[i] = 0; - entryPtr = (TaskTableEntry*) MCD_taskTable; + entryPtr = (TaskTableEntry*)MCD_taskTable; /* set up fixed pointers */ for (i = 0; i < NCHANNELS; i++) { - entryPtr[i].varTab = (uint32_t) varTabsOffset; /* update ptr to local value */ - entryPtr[i].FDTandFlags = (uint32_t) funcDescTabsOffset - | MCD_TT_FLAGS_DEF; - entryPtr[i].contextSaveSpace = (uint32_t) contextSavesOffset; + entryPtr[i].varTab = (u32)varTabsOffset; /* update ptr to local value */ + entryPtr[i].FDTandFlags = (u32)funcDescTabsOffset | MCD_TT_FLAGS_DEF; + entryPtr[i].contextSaveSpace = (u32)contextSavesOffset; varTabsOffset += VAR_TAB_SIZE; #ifdef MCD_INCLUDE_EU /* if not there is only one, just point to the same one */ funcDescTabsOffset += FUNCDESC_TAB_SIZE; @@ -219,37 +219,36 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags) contextSavesOffset += CONTEXT_SAVE_SIZE; } /* copy over the function descriptor table */ - for (i = 0; i < FUNCDESC_TAB_NUM; i++) + for ( i = 0; i < FUNCDESC_TAB_NUM; i++) { - MCD_memcpy((void*) (entryPtr[i].FDTandFlags & ~MCD_TT_FLAGS_MASK), - (void*) MCD_funcDescTab0, FUNCDESC_TAB_SIZE); + MCD_memcpy((void*)(entryPtr[i].FDTandFlags & ~MCD_TT_FLAGS_MASK), + (void*)MCD_funcDescTab0, FUNCDESC_TAB_SIZE); } /* copy model task table to where the context saves stuff leaves off*/ - MCD_modelTaskTable = (TaskTableEntry*) contextSavesOffset; + MCD_modelTaskTable = (TaskTableEntry*)contextSavesOffset; - MCD_memcpy((void*) MCD_modelTaskTable, (void*) MCD_modelTaskTableSrc, - NUMOFVARIANTS * sizeof(TaskTableEntry)); + MCD_memcpy ((void*)MCD_modelTaskTable, (void*)MCD_modelTaskTableSrc, + NUMOFVARIANTS * sizeof(TaskTableEntry)); entryPtr = MCD_modelTaskTable; /* point to local version of - model task table */ - taskDescTabsOffset = (uint32_t) MCD_modelTaskTable - + (NUMOFVARIANTS * sizeof(TaskTableEntry)); + model task table */ + taskDescTabsOffset = (u32)MCD_modelTaskTable + + (NUMOFVARIANTS * sizeof(TaskTableEntry)); /* copy actual task code and update TDT ptrs in local model task table */ for (i = 0; i < NUMOFVARIANTS; i++) { taskDescTabSize = entryPtr[i].TDTend - entryPtr[i].TDTstart + 4; - MCD_memcpy((void*) taskDescTabsOffset, (void*) entryPtr[i].TDTstart, - taskDescTabSize); - entryPtr[i].TDTstart = (uint32_t) taskDescTabsOffset; + MCD_memcpy ((void*)taskDescTabsOffset, (void*)entryPtr[i].TDTstart, taskDescTabSize); + entryPtr[i].TDTstart = (u32)taskDescTabsOffset; taskDescTabsOffset += taskDescTabSize; - entryPtr[i].TDTend = (uint32_t) taskDescTabsOffset - 4; + entryPtr[i].TDTend = (u32)taskDescTabsOffset - 4; } #ifdef MCD_INCLUDE_EU /* Tack single DMA BDs onto end of code so API controls - where they are since DMA might write to them */ + where they are since DMA might write to them */ MCD_relocBuffDesc = (MCD_bufDesc*)(entryPtr[NUMOFVARIANTS - 1].TDTend + 4); -#else /* DMA does not touch them so they can be wherever and we don't need to +#else /* DMA does not touch them so they can be wherever and we don't need to waste SRAM on them */ MCD_relocBuffDesc = MCD_singleBufDescs; #endif @@ -257,20 +256,20 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags) else { /* point the would-be relocated task tables and the - buffer descriptors to the ones the linker generated */ + buffer descriptors to the ones the linker generated */ - if (((uint32_t) MCD_realTaskTableSrc & 0x000001ff) != 0) - return (MCD_TABLE_UNALIGNED); + if (((u32)MCD_realTaskTableSrc & 0x000001ff) != 0) + return(MCD_TABLE_UNALIGNED); /* need to add code to make sure that every thing else is aligned properly TBD*/ /* this is problematic if we init more than once or after running tasks, - need to add variable to see if we have aleady init'd */ + need to add variable to see if we have aleady init'd */ entryPtr = MCD_realTaskTableSrc; for (i = 0; i < NCHANNELS; i++) { - if (((entryPtr[i].varTab & (VAR_TAB_SIZE - 1)) != 0) - || ((entryPtr[i].FDTandFlags & (FUNCDESC_TAB_SIZE - 1)) != 0)) - return (MCD_TABLE_UNALIGNED); + if (((entryPtr[i].varTab & (VAR_TAB_SIZE - 1)) != 0) || + ((entryPtr[i].FDTandFlags & (FUNCDESC_TAB_SIZE - 1)) != 0)) + return(MCD_TABLE_UNALIGNED); } MCD_taskTable = MCD_realTaskTableSrc; @@ -278,29 +277,30 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags) MCD_relocBuffDesc = MCD_singleBufDescs; } + /* Make all channels as totally inactive, and remember them as such: */ - MCD_dmaBar->taskbar = (uint32_t) MCD_taskTable; - for (i = 0; i < NCHANNELS; i++) + MCD_dmaBar->taskbar = (u32) MCD_taskTable; + for (i = 0; i < NCHANNELS; i++) { MCD_dmaBar->taskControl[i] = 0x0; MCD_chStatus[i] = MCD_NO_DMA; } - /* Set up pausing mechanism to inactive state: */ - MCD_dmaBar->debugComp1 = 0; /* no particular values yet for either comparator registers */ + /* Set up pausing mechanism to inactive state: */ + MCD_dmaBar->debugComp1 = 0; /* no particular values yet for either comparator registers */ MCD_dmaBar->debugComp2 = 0; MCD_dmaBar->debugControl = DBG_CTL_DISABLE; MCD_dmaBar->debugStatus = DBG_KILL_ALL_STAT; /* enable or disable commbus prefetch, really need an ifdef or - something to keep from trying to set this in the 8220 */ + something to keep from trying to set this in the 8220 */ if ((flags & MCD_COMM_PREFETCH_EN) != 0) MCD_dmaBar->ptdControl &= ~PTD_CTL_COMM_PREFETCH; else MCD_dmaBar->ptdControl |= PTD_CTL_COMM_PREFETCH; - return (MCD_OK); + return(MCD_OK); } /*********************** End of MCD_initDma() ***********************/ @@ -310,35 +310,35 @@ int MCD_initDma(dmaRegs *dmaBarAddr, void *taskTableDest, uint32_t flags) * Arguments: channel - channel number * Returns: Predefined status indicators */ -int MCD_dmaStatus(int channel) +int MCD_dmaStatus (int channel) { - uint16_t tcrValue; + u16 tcrValue; - if ((channel < 0) || (channel >= NCHANNELS)) - return (MCD_CHANNEL_INVALID); + if((channel < 0) || (channel >= NCHANNELS)) + return(MCD_CHANNEL_INVALID); tcrValue = MCD_dmaBar->taskControl[channel]; if ((tcrValue & TASK_CTL_EN) == 0) - { /* nothing running */ + { /* nothing running */ /* if last reported with task enabled */ - if (MCD_chStatus[channel] == MCD_RUNNING - || MCD_chStatus[channel] == MCD_IDLE) + if ( MCD_chStatus[channel] == MCD_RUNNING + || MCD_chStatus[channel] == MCD_IDLE) MCD_chStatus[channel] = MCD_DONE; } else /* something is running */ { /* There are three possibilities: paused, running or idle. */ - if (MCD_chStatus[channel] == MCD_RUNNING - || MCD_chStatus[channel] == MCD_IDLE) + if ( MCD_chStatus[channel] == MCD_RUNNING + || MCD_chStatus[channel] == MCD_IDLE) { MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT; /* This register is selected to know which initiator is - actually asserted. */ - if ((MCD_dmaBar->ptdDebug >> channel) & 0x1) + actually asserted. */ + if ((MCD_dmaBar->ptdDebug >> channel ) & 0x1 ) MCD_chStatus[channel] = MCD_RUNNING; else MCD_chStatus[channel] = MCD_IDLE; - /* do not change the status if it is already paused. */ + /* do not change the status if it is already paused. */ } } return MCD_chStatus[channel]; @@ -352,48 +352,49 @@ int MCD_dmaStatus(int channel) * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK */ -int MCD_startDma(int channel, /* the channel on which to run the DMA */ - int8_t *srcAddr, /* the address to move data from, or physical buffer-descriptor address */ - int16_t srcIncr, /* the amount to increment the source address per transfer */ - int8_t *destAddr, /* the address to move data to */ - int16_t destIncr, /* the amount to increment the destination address per transfer */ - uint32_t dmaSize, /* the number of bytes to transfer independent of the transfer size */ - uint32_t xferSize, /* the number bytes in of each data movement (1, 2, or 4) */ - uint32_t initiator, /* what device initiates the DMA */ - int priority, /* priority of the DMA */ - uint32_t flags, /* flags describing the DMA */ - uint32_t funcDesc /* a description of byte swapping, bit swapping, and CRC actions */ +int MCD_startDma ( + int channel, /* the channel on which to run the DMA */ + s8 *srcAddr, /* the address to move data from, or physical buffer-descriptor address */ + s16 srcIncr, /* the amount to increment the source address per transfer */ + s8 *destAddr, /* the address to move data to */ + s16 destIncr, /* the amount to increment the destination address per transfer */ + u32 dmaSize, /* the number of bytes to transfer independent of the transfer size */ + u32 xferSize, /* the number bytes in of each data movement (1, 2, or 4) */ + u32 initiator, /* what device initiates the DMA */ + int priority, /* priority of the DMA */ + u32 flags, /* flags describing the DMA */ + u32 funcDesc /* a description of byte swapping, bit swapping, and CRC actions */ #ifdef MCD_NEED_ADDR_TRANS - int8_t *srcAddrVirt /* virtual buffer descriptor address TBD*/ + s8 *srcAddrVirt /* virtual buffer descriptor address TBD*/ #endif - ) +) { int srcRsdIncr, destRsdIncr; int *cSave; short xferSizeIncr; int tcrCount = 0; #ifdef MCD_INCLUDE_EU - uint32_t *realFuncArray; + u32 *realFuncArray; #endif - if ((channel < 0) || (channel >= NCHANNELS)) - return (MCD_CHANNEL_INVALID); - - /* tbd - need to determine the proper response to a bad funcDesc when not - including EU functions, for now, assign a benign funcDesc, but maybe - should return an error */ + if((channel < 0) || (channel >= NCHANNELS)) + return(MCD_CHANNEL_INVALID); + + /* tbd - need to determine the proper response to a bad funcDesc when not + including EU functions, for now, assign a benign funcDesc, but maybe + should return an error */ #ifndef MCD_INCLUDE_EU funcDesc = MCD_FUNC_NOEU1; #endif - + #ifdef MCD_DEBUG - printf("startDma:Setting up params\n"); +printf("startDma:Setting up params\n"); #endif - /* Set us up for task-wise priority. We don't technically need to do this on every start, but - since the register involved is in the same longword as other registers that users are in control - of, setting it more than once is probably preferable. That since the documentation doesn't seem - to be completely consistent about the nature of the PTD control register. */ - MCD_dmaBar->ptdControl |= (uint16_t) 0x8000; + /* Set us up for task-wise priority. We don't technically need to do this on every start, but + since the register involved is in the same longword as other registers that users are in control + of, setting it more than once is probably preferable. That since the documentation doesn't seem + to be completely consistent about the nature of the PTD control register. */ + MCD_dmaBar->ptdControl |= (u16) 0x8000; #if 1 /* Not sure what we need to keep here rtm TBD */ /* Calculate additional parameters to the regular DMA calls. */ srcRsdIncr = srcIncr < 0 ? -1 : (srcIncr > 0 ? 1 : 0); @@ -409,49 +410,47 @@ int MCD_startDma(int channel, /* the channel on which to run the DMA */ MCD_remVariants.remXferSize[channel] = xferSize; #endif - cSave = (int*) (MCD_taskTable[channel].contextSaveSpace) + CSAVE_OFFSET - + CURRBD; + cSave = (int*)(MCD_taskTable[channel].contextSaveSpace) + CSAVE_OFFSET + CURRBD; #ifdef MCD_INCLUDE_EU /* may move this to EU specific calls */ - realFuncArray = (uint32_t *) (MCD_taskTable[channel].FDTandFlags & 0xffffff00); + realFuncArray = (u32 *) (MCD_taskTable[channel].FDTandFlags & 0xffffff00); /* Modify the LURC's normal and byte-residue-loop functions according to parameter. */ - realFuncArray[(LURC*16)] = xferSize == 4 ? funcDesc : xferSize == 2 ? funcDesc & 0xfffff00f : funcDesc & 0xffff000f; + realFuncArray[(LURC*16)] = xferSize == 4 ? + funcDesc : xferSize == 2 ? + funcDesc & 0xfffff00f : funcDesc & 0xffff000f; realFuncArray[(LURC*16+1)] = (funcDesc & MCD_BYTE_SWAP_KILLER) | MCD_NO_BYTE_SWAP_ATALL; #endif - /* - * Write the initiator field in the TCR, and also set the initiator-hold - * bit. Note that,due to a hardware quirk, this could collide with an - * MDE access to the initiator-register file, so we have to verify that the write - * reads back correctly. - */ + /* Write the initiator field in the TCR, and also set the initiator-hold + bit. Note that,due to a hardware quirk, this could collide with an + MDE access to the initiator-register file, so we have to verify that the write + reads back correctly. */ - MCD_dmaBar->taskControl[channel] = (initiator << 8) | TASK_CTL_HIPRITSKEN - | TASK_CTL_HLDINITNUM; + MCD_dmaBar->taskControl[channel] = + (initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM; - while (((MCD_dmaBar->taskControl[channel] & 0x1fff) - != ((initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM)) - && (tcrCount < 1000)) + while(((MCD_dmaBar->taskControl[channel] & 0x1fff) != + ((initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM)) && + (tcrCount < 1000)) { tcrCount++; /*MCD_dmaBar->ptd_tcr[channel] = (initiator << 8) | 0x0020;*/ - MCD_dmaBar->taskControl[channel] = (initiator << 8) - | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM; + MCD_dmaBar->taskControl[channel] = + (initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM; } - MCD_dmaBar->priority[channel] = (uint8_t) priority & PRIORITY_PRI_MASK; - + MCD_dmaBar->priority[channel] = (u8)priority & PRIORITY_PRI_MASK; /* should be albe to handle this stuff with only one write to ts reg - tbd */ if (channel < 8 && channel >= 0) { - MCD_dmaBar->taskSize0 &= ~(0xf << (7 - channel) * 4); - MCD_dmaBar->taskSize0 |= (xferSize & 3) << (((7 - channel) * 4) + 2); - MCD_dmaBar->taskSize0 |= (xferSize & 3) << ((7 - channel) * 4); + MCD_dmaBar->taskSize0 &= ~(0xf << (7-channel)*4); + MCD_dmaBar->taskSize0 |= (xferSize & 3) << (((7 - channel)*4) + 2); + MCD_dmaBar->taskSize0 |= (xferSize & 3) << ((7 - channel)*4); } else { - MCD_dmaBar->taskSize1 &= ~(0xf << (15 - channel) * 4); - MCD_dmaBar->taskSize1 |= (xferSize & 3) << (((15 - channel) * 4) + 2); - MCD_dmaBar->taskSize1 |= (xferSize & 3) << ((15 - channel) * 4); + MCD_dmaBar->taskSize1 &= ~(0xf << (15-channel)*4); + MCD_dmaBar->taskSize1 |= (xferSize & 3) << (((15 - channel)*4) + 2); + MCD_dmaBar->taskSize1 |= (xferSize & 3) << ((15 - channel)*4); } /* setup task table flags/options which mostly control the line buffers */ @@ -461,113 +460,94 @@ int MCD_startDma(int channel, /* the channel on which to run the DMA */ if (flags & MCD_FECTX_DMA) { /* TDTStart and TDTEnd */ - MCD_taskTable[channel].TDTstart = - MCD_modelTaskTable[TASK_FECTX].TDTstart; + MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_FECTX].TDTstart; MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_FECTX].TDTend; MCD_startDmaENetXmit(srcAddr, srcAddr, destAddr, MCD_taskTable, channel); } else if (flags & MCD_FECRX_DMA) { /* TDTStart and TDTEnd */ - MCD_taskTable[channel].TDTstart = - MCD_modelTaskTable[TASK_FECRX].TDTstart; + MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_FECRX].TDTstart; MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_FECRX].TDTend; MCD_startDmaENetRcv(srcAddr, srcAddr, destAddr, MCD_taskTable, channel); } - else if (flags & MCD_SINGLE_DMA) + else if(flags & MCD_SINGLE_DMA) { - /* - * this buffer descriptor is used for storing off initial parameters for later - * progress query calculation and for the DMA to write the resulting checksum - * The DMA does not use this to determine how to operate, that info is passed - * with the init routine - */ + /* this buffer descriptor is used for storing off initial parameters for later + progress query calculation and for the DMA to write the resulting checksum + The DMA does not use this to determine how to operate, that info is passed + with the init routine*/ MCD_relocBuffDesc[channel].srcAddr = srcAddr; MCD_relocBuffDesc[channel].destAddr = destAddr; - MCD_relocBuffDesc[channel].lastDestAddr = destAddr; /* definitely not its final value */ + MCD_relocBuffDesc[channel].lastDestAddr = destAddr; /* definitely not its final value */ MCD_relocBuffDesc[channel].dmaSize = dmaSize; - MCD_relocBuffDesc[channel].flags = 0; /* not used */ - MCD_relocBuffDesc[channel].csumResult = 0; /* not used */ - MCD_relocBuffDesc[channel].next = 0; /* not used */ + MCD_relocBuffDesc[channel].flags = 0; /* not used */ + MCD_relocBuffDesc[channel].csumResult = 0; /* not used */ + MCD_relocBuffDesc[channel].next = 0; /* not used */ /* Initialize the progress-querying stuff to show no progress:*/ - ((volatile int *) MCD_taskTable[channel].contextSaveSpace)[SRCPTR - + CSAVE_OFFSET] = (int) srcAddr; - ((volatile int *) MCD_taskTable[channel].contextSaveSpace)[DESTPTR - + CSAVE_OFFSET] = (int) destAddr; - ((volatile int *) MCD_taskTable[channel].contextSaveSpace)[DCOUNT - + CSAVE_OFFSET] = 0; - ((volatile int *) MCD_taskTable[channel].contextSaveSpace)[CURRBD - + CSAVE_OFFSET] = (uint32_t) &(MCD_relocBuffDesc[channel]); + ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET] = (int)srcAddr; + ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET] = (int)destAddr; + ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET] = 0; + ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET] = + (u32) &(MCD_relocBuffDesc[channel]); /* tbd - need to keep the user from trying to call the EU routine - when MCD_INCLUDE_EU is not defined */ - if (funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2) + when MCD_INCLUDE_EU is not defined */ + if( funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2) { - /* TDTStart and TDTEnd */ - MCD_taskTable[channel].TDTstart = - MCD_modelTaskTable[TASK_SINGLENOEU].TDTstart; - MCD_taskTable[channel].TDTend = - MCD_modelTaskTable[TASK_SINGLENOEU].TDTend; - MCD_startDmaSingleNoEu(srcAddr, srcIncr, destAddr, destIncr, - dmaSize, xferSizeIncr, flags, - (int *) &(MCD_relocBuffDesc[channel]), cSave, MCD_taskTable, - channel); + /* TDTStart and TDTEnd */ + MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_SINGLENOEU].TDTstart; + MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_SINGLENOEU].TDTend; + MCD_startDmaSingleNoEu(srcAddr, srcIncr, destAddr, destIncr, dmaSize, + xferSizeIncr, flags, (int *)&(MCD_relocBuffDesc[channel]), cSave, + MCD_taskTable, channel); } else { - /* TDTStart and TDTEnd */ - MCD_taskTable[channel].TDTstart = - MCD_modelTaskTable[TASK_SINGLEEU].TDTstart; - MCD_taskTable[channel].TDTend = - MCD_modelTaskTable[TASK_SINGLEEU].TDTend; - MCD_startDmaSingleEu(srcAddr, srcIncr, destAddr, destIncr, dmaSize, - xferSizeIncr, flags, (int *) &(MCD_relocBuffDesc[channel]), - cSave, MCD_taskTable, channel); + /* TDTStart and TDTEnd */ + MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_SINGLEEU].TDTstart; + MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_SINGLEEU].TDTend; + MCD_startDmaSingleEu(srcAddr, srcIncr, destAddr, destIncr, dmaSize, + xferSizeIncr, flags, (int *)&(MCD_relocBuffDesc[channel]), cSave, + MCD_taskTable, channel); } } else { /* chained DMAS */ /* Initialize the progress-querying stuff to show no progress:*/ #if 1 /* (!defined(MCD_NEED_ADDR_TRANS)) */ - ((volatile int *) MCD_taskTable[channel].contextSaveSpace)[SRCPTR - + CSAVE_OFFSET] = (int) ((MCD_bufDesc*) srcAddr)->srcAddr; - ((volatile int *) MCD_taskTable[channel].contextSaveSpace)[DESTPTR - + CSAVE_OFFSET] = (int) ((MCD_bufDesc*) srcAddr)->destAddr; -#else /* if using address translation, need the virtual addr of the first buffdesc */ - ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET] - = (int)((MCD_bufDesc*) srcAddrVirt)->srcAddr; + = (int)((MCD_bufDesc*) srcAddr)->srcAddr; ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET] - = (int)((MCD_bufDesc*) srcAddrVirt)->destAddr; + = (int)((MCD_bufDesc*) srcAddr)->destAddr; +#else /* if using address translation, need the virtual addr of the first buffdesc */ + ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET] + = (int)((MCD_bufDesc*) srcAddrVirt)->srcAddr; + ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET] + = (int)((MCD_bufDesc*) srcAddrVirt)->destAddr; #endif - ((volatile int *) MCD_taskTable[channel].contextSaveSpace)[DCOUNT - + CSAVE_OFFSET] = 0; - ((volatile int *) MCD_taskTable[channel].contextSaveSpace)[CURRBD - + CSAVE_OFFSET] = (uint32_t) srcAddr; + ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET] = 0; + ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET] = (u32) srcAddr; - if (funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2) + if( funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2) { - /*TDTStart and TDTEnd*/ - MCD_taskTable[channel].TDTstart = - MCD_modelTaskTable[TASK_CHAINNOEU].TDTstart; - MCD_taskTable[channel].TDTend = - MCD_modelTaskTable[TASK_CHAINNOEU].TDTend; - MCD_startDmaChainNoEu((int *) srcAddr, srcIncr, destIncr, xferSize, - xferSizeIncr, cSave, MCD_taskTable, channel); + /*TDTStart and TDTEnd*/ + MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_CHAINNOEU].TDTstart; + MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_CHAINNOEU].TDTend; + MCD_startDmaChainNoEu((int *)srcAddr, srcIncr, destIncr, xferSize, + xferSizeIncr, cSave, MCD_taskTable, channel); } else { - /*TDTStart and TDTEnd*/ - MCD_taskTable[channel].TDTstart = - MCD_modelTaskTable[TASK_CHAINEU].TDTstart; - MCD_taskTable[channel].TDTend = - MCD_modelTaskTable[TASK_CHAINEU].TDTend; - MCD_startDmaChainEu((int *) srcAddr, srcIncr, destIncr, xferSize, - xferSizeIncr, cSave, MCD_taskTable, channel); + /*TDTStart and TDTEnd*/ + MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_CHAINEU].TDTstart; + MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_CHAINEU].TDTend; + MCD_startDmaChainEu((int *)srcAddr, srcIncr, destIncr, xferSize, + xferSizeIncr, cSave, MCD_taskTable, channel); } } MCD_chStatus[channel] = MCD_IDLE; - return (MCD_OK); + return(MCD_OK); } /************************ End of MCD_startDma() *********************/ @@ -582,7 +562,7 @@ int MCD_startDma(int channel, /* the channel on which to run the DMA */ * Notes: * MCD_XferProgrQuery() upon completing or after aborting a DMA, or * while the DMA is in progress, this function returns the first - * DMA-destination address not (or not yet) used in the DMA. When + * DMA-destination address not (or not yet) used in the DMA. When * encountering a non-ready buffer descriptor, the information for * the last completed descriptor is returned. * @@ -604,136 +584,117 @@ int MCD_startDma(int channel, /* the channel on which to run the DMA */ */ #define STABTIME 0 -int MCD_XferProgrQuery(int channel, MCD_XferProg *progRep) +int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep) { MCD_XferProg prevRep; - int again; /* true if we are to try again to get consistent results */ - int i; /* used as a time-waste counter */ + int again; /* true if we are to try again to get consistent results */ + int i; /* used as a time-waste counter */ int destDiffBytes; /* Total number of bytes that we think actually got xfered. */ int numIterations; /* number of iterations */ int bytesNotXfered; /* bytes that did not get xfered. */ - int8_t *LWAlignedInitDestAddr, *LWAlignedCurrDestAddr; + s8 *LWAlignedInitDestAddr, *LWAlignedCurrDestAddr; int subModVal, addModVal; /* Mode values to added and subtracted from the - final destAddr */ + final destAddr */ - if ((channel < 0) || (channel >= NCHANNELS)) - return (MCD_CHANNEL_INVALID); + if((channel < 0) || (channel >= NCHANNELS)) + return(MCD_CHANNEL_INVALID); /* Read a trial value for the progress-reporting values*/ prevRep.lastSrcAddr = - (int8_t *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[SRCPTR - + CSAVE_OFFSET]; + (s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET]; prevRep.lastDestAddr = - (int8_t *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DESTPTR - + CSAVE_OFFSET]; - prevRep.dmaSize = - ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DCOUNT - + CSAVE_OFFSET]; + (s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET]; + prevRep.dmaSize = ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET]; prevRep.currBufDesc = - (MCD_bufDesc*) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[CURRBD - + CSAVE_OFFSET]; + (MCD_bufDesc*) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET]; /* Repeatedly reread those values until they match previous values: */ - do - { + do { /* Waste a little bit of time to ensure stability: */ - for (i = 0; i < STABTIME; i++) - i += i >> 2; /* make sure this loop does something so that it doesn't get optimized out */ + for (i = 0; i < STABTIME; i++) + i += i >> 2; /* make sure this loop does something so that it doesn't get optimized out */ /* Check them again: */ progRep->lastSrcAddr = - (int8_t *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[SRCPTR - + CSAVE_OFFSET]; + (s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET]; progRep->lastDestAddr = - (int8_t *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DESTPTR - + CSAVE_OFFSET]; - progRep->dmaSize = - ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DCOUNT - + CSAVE_OFFSET]; + (s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET]; + progRep->dmaSize = ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET]; progRep->currBufDesc = - (MCD_bufDesc*) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[CURRBD - + CSAVE_OFFSET]; - /* See if they match: */ - if (prevRep.lastSrcAddr != progRep->lastSrcAddr - || prevRep.lastDestAddr != progRep->lastDestAddr - || prevRep.dmaSize != progRep->dmaSize - || prevRep.currBufDesc != progRep->currBufDesc) - { - /* If they don't match, remember previous values and try again:*/ - prevRep.lastSrcAddr = progRep->lastSrcAddr; - prevRep.lastDestAddr = progRep->lastDestAddr; - prevRep.dmaSize = progRep->dmaSize; - prevRep.currBufDesc = progRep->currBufDesc; - again = MCD_TRUE; - } - else - again = MCD_FALSE; + (MCD_bufDesc*) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET]; + /* See if they match: */ + if ( prevRep.lastSrcAddr != progRep->lastSrcAddr + || prevRep.lastDestAddr != progRep->lastDestAddr + || prevRep.dmaSize != progRep->dmaSize + || prevRep.currBufDesc != progRep->currBufDesc) + { + /* If they don't match, remember previous values and try again:*/ + prevRep.lastSrcAddr = progRep->lastSrcAddr; + prevRep.lastDestAddr = progRep->lastDestAddr; + prevRep.dmaSize = progRep->dmaSize; + prevRep.currBufDesc = progRep->currBufDesc; + again = MCD_TRUE; + } + else + again = MCD_FALSE; } while (again == MCD_TRUE); + /* Update the dCount, srcAddr and destAddr */ /* To calculate dmaCount, we consider destination address. C - overs M1,P1,Z for destination */ - switch (MCD_remVariants.remDestRsdIncr[channel]) - { - case MINUS1: - subModVal = ((int) progRep->lastDestAddr) - & ((MCD_remVariants.remXferSize[channel]) - 1); - addModVal = ((int) progRep->currBufDesc->destAddr) - & ((MCD_remVariants.remXferSize[channel]) - 1); - LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr) - addModVal; - LWAlignedCurrDestAddr = (progRep->lastDestAddr) - subModVal; - destDiffBytes = LWAlignedInitDestAddr - LWAlignedCurrDestAddr; - bytesNotXfered = (destDiffBytes / MCD_remVariants.remDestIncr[channel]) - * (MCD_remVariants.remDestIncr[channel] - + MCD_remVariants.remXferSize[channel]); - progRep->dmaSize = destDiffBytes - bytesNotXfered + addModVal - - subModVal; - break; - case ZERO: - progRep->lastDestAddr = progRep->currBufDesc->destAddr; - break; - case PLUS1: - /* This value has to be subtracted from the final calculated dCount. */ - subModVal = ((int) progRep->currBufDesc->destAddr) - & ((MCD_remVariants.remXferSize[channel]) - 1); - /* These bytes are already in lastDestAddr. */ - addModVal = ((int) progRep->lastDestAddr) - & ((MCD_remVariants.remXferSize[channel]) - 1); - LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr) - subModVal; - LWAlignedCurrDestAddr = (progRep->lastDestAddr) - addModVal; - destDiffBytes = (progRep->lastDestAddr - LWAlignedInitDestAddr); - numIterations = (LWAlignedCurrDestAddr - LWAlignedInitDestAddr) - / MCD_remVariants.remDestIncr[channel]; - bytesNotXfered = numIterations - * (MCD_remVariants.remDestIncr[channel] - - MCD_remVariants.remXferSize[channel]); - progRep->dmaSize = destDiffBytes - bytesNotXfered - subModVal; - break; - default: - break; + overs M1,P1,Z for destination */ + switch(MCD_remVariants.remDestRsdIncr[channel]) { + case MINUS1: + subModVal = ((int)progRep->lastDestAddr) & ((MCD_remVariants.remXferSize[channel]) - 1); + addModVal = ((int)progRep->currBufDesc->destAddr) & ((MCD_remVariants.remXferSize[channel]) - 1); + LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr) - addModVal; + LWAlignedCurrDestAddr = (progRep->lastDestAddr) - subModVal; + destDiffBytes = LWAlignedInitDestAddr - LWAlignedCurrDestAddr; + bytesNotXfered = (destDiffBytes/MCD_remVariants.remDestIncr[channel]) * + ( MCD_remVariants.remDestIncr[channel] + + MCD_remVariants.remXferSize[channel]); + progRep->dmaSize = destDiffBytes - bytesNotXfered + addModVal - subModVal; + break; + case ZERO: + progRep->lastDestAddr = progRep->currBufDesc->destAddr; + break; + case PLUS1: + /* This value has to be subtracted from the final calculated dCount. */ + subModVal = ((int)progRep->currBufDesc->destAddr) & ((MCD_remVariants.remXferSize[channel]) - 1); + /* These bytes are already in lastDestAddr. */ + addModVal = ((int)progRep->lastDestAddr) & ((MCD_remVariants.remXferSize[channel]) - 1); + LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr) - subModVal; + LWAlignedCurrDestAddr = (progRep->lastDestAddr) - addModVal; + destDiffBytes = (progRep->lastDestAddr - LWAlignedInitDestAddr); + numIterations = ( LWAlignedCurrDestAddr - LWAlignedInitDestAddr)/MCD_remVariants.remDestIncr[channel]; + bytesNotXfered = numIterations * + ( MCD_remVariants.remDestIncr[channel] + - MCD_remVariants.remXferSize[channel]); + progRep->dmaSize = destDiffBytes - bytesNotXfered - subModVal; + break; + default: + break; } /* This covers M1,P1,Z for source */ - switch (MCD_remVariants.remSrcRsdIncr[channel]) - { - case MINUS1: - progRep->lastSrcAddr = progRep->currBufDesc->srcAddr - + (MCD_remVariants.remSrcIncr[channel] - * (progRep->dmaSize - / MCD_remVariants.remXferSize[channel])); - break; - case ZERO: - progRep->lastSrcAddr = progRep->currBufDesc->srcAddr; - break; - case PLUS1: - progRep->lastSrcAddr = progRep->currBufDesc->srcAddr - + (MCD_remVariants.remSrcIncr[channel] - * (progRep->dmaSize - / MCD_remVariants.remXferSize[channel])); - break; - default: - break; + switch(MCD_remVariants.remSrcRsdIncr[channel]) { + case MINUS1: + progRep->lastSrcAddr = + progRep->currBufDesc->srcAddr + + ( MCD_remVariants.remSrcIncr[channel] * + (progRep->dmaSize/MCD_remVariants.remXferSize[channel])); + break; + case ZERO: + progRep->lastSrcAddr = progRep->currBufDesc->srcAddr; + break; + case PLUS1: + progRep->lastSrcAddr = + progRep->currBufDesc->srcAddr + + ( MCD_remVariants.remSrcIncr[channel] * + (progRep->dmaSize/MCD_remVariants.remXferSize[channel])); + break; + default: break; } - return (MCD_OK); + return(MCD_OK); } /******************* End of MCD_XferProgrQuery() ********************/ @@ -744,19 +705,16 @@ int MCD_XferProgrQuery(int channel, MCD_XferProg *progRep) * enable before resuming it, but the resume function has to do nothing * if there is no DMA on that channel (i.e., if the enable bit is 0). */ -static void MCD_resmActions(int channel) +static void MCD_resmActions (int channel) { - uint32_t debugStatus; - - MCD_dmaBar->debugControl = DBG_CTL_DISABLE; - debugStatus = MCD_dmaBar->debugStatus; - MCD_dmaBar->debugStatus = debugStatus; - MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT; /* This register is selected to know - which initiator is actually asserted. */ - if ((MCD_dmaBar->ptdDebug >> channel) & 0x1) - MCD_chStatus[channel] = MCD_RUNNING; - else - MCD_chStatus[channel] = MCD_IDLE; + MCD_dmaBar->debugControl = DBG_CTL_DISABLE; + MCD_dmaBar->debugStatus = MCD_dmaBar->debugStatus; + MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT; /* This register is selected to know + which initiator is actually asserted. */ + if((MCD_dmaBar->ptdDebug >> channel ) & 0x1) + MCD_chStatus[channel] = MCD_RUNNING; + else + MCD_chStatus[channel] = MCD_IDLE; } /********************* End of MCD_resmActions() *********************/ @@ -772,15 +730,15 @@ static void MCD_resmActions(int channel) * always goes to the MCD_HALTED state even if it is killed while in * the MCD_NO_DMA or MCD_IDLE states. */ -int MCD_killDma(int channel) +int MCD_killDma (int channel) { - /* MCD_XferProg progRep; */ + /* MCD_XferProg progRep; */ - if ((channel < 0) || (channel >= NCHANNELS)) - return (MCD_CHANNEL_INVALID); + if((channel < 0) || (channel >= NCHANNELS)) + return(MCD_CHANNEL_INVALID); MCD_dmaBar->taskControl[channel] = 0x0; - MCD_resumeDma(channel); + MCD_resumeDma (channel); /* * This must be after the write to the TCR so that the task doesn't * start up again momentarily, and before the status assignment so @@ -795,7 +753,7 @@ int MCD_killDma(int channel) * MCD_XferProgrQuery (channel, &progRep); * progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr; */ - return (MCD_OK); + return(MCD_OK); } /************************ End of MCD_killDma() **********************/ @@ -810,15 +768,15 @@ int MCD_killDma(int channel) * This routine does not check to see if there is a task which can * be continued. Also this routine should not be used with single DMAs. */ -int MCD_continDma(int channel) +int MCD_continDma (int channel) { - if ((channel < 0) || (channel >= NCHANNELS)) - return (MCD_CHANNEL_INVALID); + if((channel < 0) || (channel >= NCHANNELS)) + return(MCD_CHANNEL_INVALID); MCD_dmaBar->taskControl[channel] |= TASK_CTL_EN; MCD_chStatus[channel] = MCD_RUNNING; - return (MCD_OK); + return(MCD_OK); } /********************** End of MCD_continDma() **********************/ @@ -850,7 +808,7 @@ int MCD_continDma(int channel) * this means that bits 14 and 0 must enable debug functions before * bits 1 and 2, respectively, have any effect. * - * NOTE: It's extremely important to not pause more than one DMA channel + * NOTE: It's extremely important to not pause more than one DMA channel * at a time. ********************************************************************/ @@ -861,12 +819,12 @@ int MCD_continDma(int channel) * Arguments: channel * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK */ -int MCD_pauseDma(int channel) +int MCD_pauseDma (int channel) { /* MCD_XferProg progRep; */ - if ((channel < 0) || (channel >= NCHANNELS)) - return (MCD_CHANNEL_INVALID); + if((channel < 0) || (channel >= NCHANNELS)) + return(MCD_CHANNEL_INVALID); if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN) { @@ -881,7 +839,7 @@ int MCD_pauseDma(int channel) * progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr; */ } - return (MCD_OK); + return(MCD_OK); } /************************* End of MCD_pauseDma() ********************/ @@ -892,15 +850,15 @@ int MCD_pauseDma(int channel) * Arguments: channel - channel on which to resume DMA * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK */ -int MCD_resumeDma(int channel) +int MCD_resumeDma (int channel) { - if ((channel < 0) || (channel >= NCHANNELS)) - return (MCD_CHANNEL_INVALID); + if((channel < 0) || (channel >= NCHANNELS)) + return(MCD_CHANNEL_INVALID); if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN) - MCD_resmActions(channel); + MCD_resmActions (channel); - return (MCD_OK); + return(MCD_OK); } /************************ End of MCD_resumeDma() ********************/ @@ -914,16 +872,16 @@ int MCD_resumeDma(int channel) * Notes: * */ -int MCD_csumQuery(int channel, uint32_t *csum) +int MCD_csumQuery (int channel, u32 *csum) { #ifdef MCD_INCLUDE_EU if((channel < 0) || (channel >= NCHANNELS)) - return(MCD_CHANNEL_INVALID); + return(MCD_CHANNEL_INVALID); *csum = MCD_relocBuffDesc[channel].csumResult; return(MCD_OK); #else - return (MCD_ERROR); + return(MCD_ERROR); #endif } /*********************** End of MCD_resumeDma() *********************/ @@ -938,7 +896,7 @@ int MCD_getCodeSize(void) #ifdef MCD_INCLUDE_EU return(0x2b5c); #else - return (0x173c); + return(0x173c); #endif } /********************** End of MCD_getCodeSize() ********************/ @@ -957,7 +915,7 @@ char MCD_versionString[] = "Multi-channel DMA API Alpha v0.3 (2004-04-26)"; int MCD_getVersion(char **longVersion) { *longVersion = MCD_versionString; - return ((MCD_REV_MAJOR << 8) | MCD_REV_MINOR); + return((MCD_REV_MAJOR << 8) | MCD_REV_MINOR); } /********************** End of MCD_getVersion() *********************/ @@ -965,11 +923,11 @@ int MCD_getVersion(char **longVersion) /* Private version of memcpy() * Note that everything this is used for is longword-aligned. */ -static void MCD_memcpy(int *dest, int *src, uint32_t size) +static void MCD_memcpy (int *dest, int *src, u32 size) { - uint32_t i; + u32 i; - for (i = 0; i < size; i += sizeof(int), dest++, src++) + for (i = 0; i < size; i += sizeof(int), dest++, src++) *dest = *src; } /********************************************************************/ diff --git a/BaS_gcc/dma/MCD_tasks.c b/BaS_gcc/dma/MCD_tasks.c index ded6ff3..76e8e37 100755 --- a/BaS_gcc/dma/MCD_tasks.c +++ b/BaS_gcc/dma/MCD_tasks.c @@ -7,253 +7,253 @@ #include "MCD_dma.h" -uint32_t MCD_varTab0[]; -uint32_t MCD_varTab1[]; -uint32_t MCD_varTab2[]; -uint32_t MCD_varTab3[]; -uint32_t MCD_varTab4[]; -uint32_t MCD_varTab5[]; -uint32_t MCD_varTab6[]; -uint32_t MCD_varTab7[]; -uint32_t MCD_varTab8[]; -uint32_t MCD_varTab9[]; -uint32_t MCD_varTab10[]; -uint32_t MCD_varTab11[]; -uint32_t MCD_varTab12[]; -uint32_t MCD_varTab13[]; -uint32_t MCD_varTab14[]; -uint32_t MCD_varTab15[]; +u32 MCD_varTab0[]; +u32 MCD_varTab1[]; +u32 MCD_varTab2[]; +u32 MCD_varTab3[]; +u32 MCD_varTab4[]; +u32 MCD_varTab5[]; +u32 MCD_varTab6[]; +u32 MCD_varTab7[]; +u32 MCD_varTab8[]; +u32 MCD_varTab9[]; +u32 MCD_varTab10[]; +u32 MCD_varTab11[]; +u32 MCD_varTab12[]; +u32 MCD_varTab13[]; +u32 MCD_varTab14[]; +u32 MCD_varTab15[]; -uint32_t MCD_funcDescTab0[]; +u32 MCD_funcDescTab0[]; #ifdef MCD_INCLUDE_EU -uint32_t MCD_funcDescTab1[]; -uint32_t MCD_funcDescTab2[]; -uint32_t MCD_funcDescTab3[]; -uint32_t MCD_funcDescTab4[]; -uint32_t MCD_funcDescTab5[]; -uint32_t MCD_funcDescTab6[]; -uint32_t MCD_funcDescTab7[]; -uint32_t MCD_funcDescTab8[]; -uint32_t MCD_funcDescTab9[]; -uint32_t MCD_funcDescTab10[]; -uint32_t MCD_funcDescTab11[]; -uint32_t MCD_funcDescTab12[]; -uint32_t MCD_funcDescTab13[]; -uint32_t MCD_funcDescTab14[]; -uint32_t MCD_funcDescTab15[]; +u32 MCD_funcDescTab1[]; +u32 MCD_funcDescTab2[]; +u32 MCD_funcDescTab3[]; +u32 MCD_funcDescTab4[]; +u32 MCD_funcDescTab5[]; +u32 MCD_funcDescTab6[]; +u32 MCD_funcDescTab7[]; +u32 MCD_funcDescTab8[]; +u32 MCD_funcDescTab9[]; +u32 MCD_funcDescTab10[]; +u32 MCD_funcDescTab11[]; +u32 MCD_funcDescTab12[]; +u32 MCD_funcDescTab13[]; +u32 MCD_funcDescTab14[]; +u32 MCD_funcDescTab15[]; #endif -uint32_t MCD_contextSave0[]; -uint32_t MCD_contextSave1[]; -uint32_t MCD_contextSave2[]; -uint32_t MCD_contextSave3[]; -uint32_t MCD_contextSave4[]; -uint32_t MCD_contextSave5[]; -uint32_t MCD_contextSave6[]; -uint32_t MCD_contextSave7[]; -uint32_t MCD_contextSave8[]; -uint32_t MCD_contextSave9[]; -uint32_t MCD_contextSave10[]; -uint32_t MCD_contextSave11[]; -uint32_t MCD_contextSave12[]; -uint32_t MCD_contextSave13[]; -uint32_t MCD_contextSave14[]; -uint32_t MCD_contextSave15[]; +u32 MCD_contextSave0[]; +u32 MCD_contextSave1[]; +u32 MCD_contextSave2[]; +u32 MCD_contextSave3[]; +u32 MCD_contextSave4[]; +u32 MCD_contextSave5[]; +u32 MCD_contextSave6[]; +u32 MCD_contextSave7[]; +u32 MCD_contextSave8[]; +u32 MCD_contextSave9[]; +u32 MCD_contextSave10[]; +u32 MCD_contextSave11[]; +u32 MCD_contextSave12[]; +u32 MCD_contextSave13[]; +u32 MCD_contextSave14[]; +u32 MCD_contextSave15[]; -uint32_t MCD_realTaskTableSrc[] = +u32 MCD_realTaskTableSrc[] = { 0x00000000, 0x00000000, - (uint32_t)MCD_varTab0, /* Task 0 Variable Table */ - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_varTab0, /* Task 0 Variable Table */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave0, /* Task 0 context save space */ + (u32)MCD_contextSave0, /* Task 0 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab1, /* Task 1 Variable Table */ + (u32)MCD_varTab1, /* Task 1 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab1, /* Task 1 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab1, /* Task 1 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave1, /* Task 1 context save space */ + (u32)MCD_contextSave1, /* Task 1 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab2, /* Task 2 Variable Table */ + (u32)MCD_varTab2, /* Task 2 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab2, /* Task 2 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab2, /* Task 2 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave2, /* Task 2 context save space */ + (u32)MCD_contextSave2, /* Task 2 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab3, /* Task 3 Variable Table */ + (u32)MCD_varTab3, /* Task 3 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab3, /* Task 3 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab3, /* Task 3 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave3, /* Task 3 context save space */ + (u32)MCD_contextSave3, /* Task 3 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab4, /* Task 4 Variable Table */ + (u32)MCD_varTab4, /* Task 4 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab4, /* Task 4 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab4, /* Task 4 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave4, /* Task 4 context save space */ + (u32)MCD_contextSave4, /* Task 4 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab5, /* Task 5 Variable Table */ + (u32)MCD_varTab5, /* Task 5 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab5, /* Task 5 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab5, /* Task 5 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave5, /* Task 5 context save space */ + (u32)MCD_contextSave5, /* Task 5 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab6, /* Task 6 Variable Table */ + (u32)MCD_varTab6, /* Task 6 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab6, /* Task 6 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab6, /* Task 6 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave6, /* Task 6 context save space */ + (u32)MCD_contextSave6, /* Task 6 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab7, /* Task 7 Variable Table */ + (u32)MCD_varTab7, /* Task 7 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab7, /* Task 7 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab7, /* Task 7 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave7, /* Task 7 context save space */ + (u32)MCD_contextSave7, /* Task 7 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab8, /* Task 8 Variable Table */ + (u32)MCD_varTab8, /* Task 8 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab8, /* Task 8 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab8, /* Task 8 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave8, /* Task 8 context save space */ + (u32)MCD_contextSave8, /* Task 8 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab9, /* Task 9 Variable Table */ + (u32)MCD_varTab9, /* Task 9 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab9, /* Task 9 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab9, /* Task 9 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave9, /* Task 9 context save space */ + (u32)MCD_contextSave9, /* Task 9 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab10, /* Task 10 Variable Table */ + (u32)MCD_varTab10, /* Task 10 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave10, /* Task 10 context save space */ + (u32)MCD_contextSave10, /* Task 10 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab11, /* Task 11 Variable Table */ + (u32)MCD_varTab11, /* Task 11 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave11, /* Task 11 context save space */ + (u32)MCD_contextSave11, /* Task 11 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab12, /* Task 12 Variable Table */ + (u32)MCD_varTab12, /* Task 12 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave12, /* Task 12 context save space */ + (u32)MCD_contextSave12, /* Task 12 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab13, /* Task 13 Variable Table */ + (u32)MCD_varTab13, /* Task 13 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave13, /* Task 13 context save space */ + (u32)MCD_contextSave13, /* Task 13 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab14, /* Task 14 Variable Table */ + (u32)MCD_varTab14, /* Task 14 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave14, /* Task 14 context save space */ + (u32)MCD_contextSave14, /* Task 14 context save space */ 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_varTab15, /* Task 15 Variable Table */ + (u32)MCD_varTab15, /* Task 15 Variable Table */ #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */ #else - (uint32_t)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ + (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ #endif 0x00000000, 0x00000000, - (uint32_t)MCD_contextSave15, /* Task 15 context save space */ + (u32)MCD_contextSave15, /* Task 15 context save space */ 0x00000000, }; -uint32_t MCD_varTab0[] = +u32 MCD_varTab0[] = { /* Task 0 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -290,7 +290,7 @@ uint32_t MCD_varTab0[] = }; -uint32_t MCD_varTab1[] = +u32 MCD_varTab1[] = { /* Task 1 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -326,7 +326,7 @@ uint32_t MCD_varTab1[] = 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab2[]= +u32 MCD_varTab2[]= { /* Task 2 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -362,7 +362,7 @@ uint32_t MCD_varTab2[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab3[]= +u32 MCD_varTab3[]= { /* Task 3 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -398,7 +398,7 @@ uint32_t MCD_varTab3[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab4[]= +u32 MCD_varTab4[]= { /* Task 4 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -434,7 +434,7 @@ uint32_t MCD_varTab4[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab5[]= +u32 MCD_varTab5[]= { /* Task 5 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -470,7 +470,7 @@ uint32_t MCD_varTab5[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab6[]= +u32 MCD_varTab6[]= { /* Task 6 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -506,7 +506,7 @@ uint32_t MCD_varTab6[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab7[]= +u32 MCD_varTab7[]= { /* Task 7 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -542,7 +542,7 @@ uint32_t MCD_varTab7[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab8[]= +u32 MCD_varTab8[]= { /* Task 8 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -578,7 +578,7 @@ uint32_t MCD_varTab8[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab9[]= +u32 MCD_varTab9[]= { /* Task 9 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -614,7 +614,7 @@ uint32_t MCD_varTab9[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab10[]= +u32 MCD_varTab10[]= { /* Task 10 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -650,7 +650,7 @@ uint32_t MCD_varTab10[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab11[]= +u32 MCD_varTab11[]= { /* Task 11 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -686,7 +686,7 @@ uint32_t MCD_varTab11[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab12[]= +u32 MCD_varTab12[]= { /* Task 12 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -722,7 +722,7 @@ uint32_t MCD_varTab12[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab13[]= +u32 MCD_varTab13[]= { /* Task 13 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -758,7 +758,7 @@ uint32_t MCD_varTab13[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab14[]= +u32 MCD_varTab14[]= { /* Task 14 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -794,7 +794,7 @@ uint32_t MCD_varTab14[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_varTab15[]= +u32 MCD_varTab15[]= { /* Task 15 Variable Table */ 0x00000000, /* var[0] */ 0x00000000, /* var[1] */ @@ -830,7 +830,7 @@ uint32_t MCD_varTab15[]= 0x00000000, /* inc[7] */ }; -uint32_t MCD_funcDescTab0[]= +u32 MCD_funcDescTab0[]= { /* Task 0 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -899,7 +899,7 @@ uint32_t MCD_funcDescTab0[]= }; #ifdef MCD_INCLUDE_EU -uint32_t MCD_funcDescTab1[]= +u32 MCD_funcDescTab1[]= { /* Task 1 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -967,7 +967,7 @@ uint32_t MCD_funcDescTab1[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab2[]= +u32 MCD_funcDescTab2[]= { /* Task 2 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1035,7 +1035,7 @@ uint32_t MCD_funcDescTab2[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab3[]= +u32 MCD_funcDescTab3[]= { /* Task 3 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1103,7 +1103,7 @@ uint32_t MCD_funcDescTab3[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab4[]= +u32 MCD_funcDescTab4[]= { /* Task 4 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1171,7 +1171,7 @@ uint32_t MCD_funcDescTab4[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab5[]= +u32 MCD_funcDescTab5[]= { /* Task 5 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1239,7 +1239,7 @@ uint32_t MCD_funcDescTab5[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab6[]= +u32 MCD_funcDescTab6[]= { /* Task 6 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1307,7 +1307,7 @@ uint32_t MCD_funcDescTab6[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab7[]= +u32 MCD_funcDescTab7[]= { /* Task 7 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1375,7 +1375,7 @@ uint32_t MCD_funcDescTab7[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab8[]= +u32 MCD_funcDescTab8[]= { /* Task 8 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1443,7 +1443,7 @@ uint32_t MCD_funcDescTab8[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab9[]= +u32 MCD_funcDescTab9[]= { /* Task 9 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1511,7 +1511,7 @@ uint32_t MCD_funcDescTab9[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab10[]= +u32 MCD_funcDescTab10[]= { /* Task 10 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1579,7 +1579,7 @@ uint32_t MCD_funcDescTab10[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab11[]= +u32 MCD_funcDescTab11[]= { /* Task 11 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1647,7 +1647,7 @@ uint32_t MCD_funcDescTab11[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab12[]= +u32 MCD_funcDescTab12[]= { /* Task 12 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1715,7 +1715,7 @@ uint32_t MCD_funcDescTab12[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab13[]= +u32 MCD_funcDescTab13[]= { /* Task 13 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1783,7 +1783,7 @@ uint32_t MCD_funcDescTab13[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab14[]= +u32 MCD_funcDescTab14[]= { /* Task 14 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1851,7 +1851,7 @@ uint32_t MCD_funcDescTab14[]= 0x202f2000, /* andCrcRestartBit(), EU# 3 */ }; -uint32_t MCD_funcDescTab15[]= +u32 MCD_funcDescTab15[]= { /* Task 15 Function Descriptor Table */ 0x00000000, 0x00000000, @@ -1920,45 +1920,45 @@ uint32_t MCD_funcDescTab15[]= }; #endif /*MCD_INCLUDE_EU*/ -uint32_t MCD_contextSave0[128]; /* Task 0 context save space */ -uint32_t MCD_contextSave1[128]; /* Task 1 context save space */ -uint32_t MCD_contextSave2[128]; /* Task 2 context save space */ -uint32_t MCD_contextSave3[128]; /* Task 3 context save space */ -uint32_t MCD_contextSave4[128]; /* Task 4 context save space */ -uint32_t MCD_contextSave5[128]; /* Task 5 context save space */ -uint32_t MCD_contextSave6[128]; /* Task 6 context save space */ -uint32_t MCD_contextSave7[128]; /* Task 7 context save space */ -uint32_t MCD_contextSave8[128]; /* Task 8 context save space */ -uint32_t MCD_contextSave9[128]; /* Task 9 context save space */ -uint32_t MCD_contextSave10[128]; /* Task 10 context save space */ -uint32_t MCD_contextSave11[128]; /* Task 11 context save space */ -uint32_t MCD_contextSave12[128]; /* Task 12 context save space */ -uint32_t MCD_contextSave13[128]; /* Task 13 context save space */ -uint32_t MCD_contextSave14[128]; /* Task 14 context save space */ -uint32_t MCD_contextSave15[128]; /* Task 15 context save space */ +u32 MCD_contextSave0[128]; /* Task 0 context save space */ +u32 MCD_contextSave1[128]; /* Task 1 context save space */ +u32 MCD_contextSave2[128]; /* Task 2 context save space */ +u32 MCD_contextSave3[128]; /* Task 3 context save space */ +u32 MCD_contextSave4[128]; /* Task 4 context save space */ +u32 MCD_contextSave5[128]; /* Task 5 context save space */ +u32 MCD_contextSave6[128]; /* Task 6 context save space */ +u32 MCD_contextSave7[128]; /* Task 7 context save space */ +u32 MCD_contextSave8[128]; /* Task 8 context save space */ +u32 MCD_contextSave9[128]; /* Task 9 context save space */ +u32 MCD_contextSave10[128]; /* Task 10 context save space */ +u32 MCD_contextSave11[128]; /* Task 11 context save space */ +u32 MCD_contextSave12[128]; /* Task 12 context save space */ +u32 MCD_contextSave13[128]; /* Task 13 context save space */ +u32 MCD_contextSave14[128]; /* Task 14 context save space */ +u32 MCD_contextSave15[128]; /* Task 15 context save space */ -uint32_t MCD_ChainNoEu_TDT[]; -uint32_t MCD_SingleNoEu_TDT[]; +u32 MCD_ChainNoEu_TDT[]; +u32 MCD_SingleNoEu_TDT[]; #ifdef MCD_INCLUDE_EU -uint32_t MCD_ChainEu_TDT[]; -uint32_t MCD_SingleEu_TDT[]; +u32 MCD_ChainEu_TDT[]; +u32 MCD_SingleEu_TDT[]; #endif -uint32_t MCD_ENetRcv_TDT[]; -uint32_t MCD_ENetXmit_TDT[]; +u32 MCD_ENetRcv_TDT[]; +u32 MCD_ENetXmit_TDT[]; -uint32_t MCD_modelTaskTableSrc[]= +u32 MCD_modelTaskTableSrc[]= { - (uint32_t)MCD_ChainNoEu_TDT, - (uint32_t)&((uint8_t*)MCD_ChainNoEu_TDT)[0x0000016c], + (u32)MCD_ChainNoEu_TDT, + (u32)&((u8*)MCD_ChainNoEu_TDT)[0x0000016c], 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_SingleNoEu_TDT, - (uint32_t)&((uint8_t*)MCD_SingleNoEu_TDT)[0x000000d4], + (u32)MCD_SingleNoEu_TDT, + (u32)&((u8*)MCD_SingleNoEu_TDT)[0x000000d4], 0x00000000, 0x00000000, 0x00000000, @@ -1966,16 +1966,16 @@ uint32_t MCD_modelTaskTableSrc[]= 0x00000000, 0x00000000, #ifdef MCD_INCLUDE_EU - (uint32_t)MCD_ChainEu_TDT, - (uint32_t)&((uint8_t*)MCD_ChainEu_TDT)[0x000001b4], + (u32)MCD_ChainEu_TDT, + (u32)&((u8*)MCD_ChainEu_TDT)[0x000001b4], 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_SingleEu_TDT, - (uint32_t)&((uint8_t*)MCD_SingleEu_TDT)[0x00000124], + (u32)MCD_SingleEu_TDT, + (u32)&((u8*)MCD_SingleEu_TDT)[0x00000124], 0x00000000, 0x00000000, 0x00000000, @@ -1983,16 +1983,16 @@ uint32_t MCD_modelTaskTableSrc[]= 0x00000000, 0x00000000, #endif - (uint32_t)MCD_ENetRcv_TDT, - (uint32_t)&((uint8_t*)MCD_ENetRcv_TDT)[0x0000009c], + (u32)MCD_ENetRcv_TDT, + (u32)&((u8*)MCD_ENetRcv_TDT)[0x0000009c], 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - (uint32_t)MCD_ENetXmit_TDT, - (uint32_t)&((uint8_t*)MCD_ENetXmit_TDT)[0x000000d0], + (u32)MCD_ENetXmit_TDT, + (u32)&((u8*)MCD_ENetXmit_TDT)[0x000000d0], 0x00000000, 0x00000000, 0x00000000, @@ -2000,7 +2000,7 @@ uint32_t MCD_modelTaskTableSrc[]= 0x00000000, 0x00000000, }; -uint32_t MCD_ChainNoEu_TDT[]= +u32 MCD_ChainNoEu_TDT[]= { 0x80004000, /* 0000(:370): LCDEXT: idx0 = 0x00000000; ; */ 0x8118801b, /* 0004(:370): LCD: idx1 = var2; idx1 once var0; idx1 += inc3 */ @@ -2095,7 +2095,7 @@ uint32_t MCD_ChainNoEu_TDT[]= 0x000001f8, /* 0168(:0): NOP */ 0x000001f8, /* 016C(:0): NOP */ }; -uint32_t MCD_SingleNoEu_TDT[]= +u32 MCD_SingleNoEu_TDT[]= { 0x8198001b, /* 0000(:657): LCD: idx0 = var3; idx0 once var0; idx0 += inc3 */ 0x7000000d, /* 0004(:658): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */ @@ -2153,7 +2153,7 @@ uint32_t MCD_SingleNoEu_TDT[]= 0x040001f8, /* 00D4(:713): DRD1A: FN=0 INT init=0 WS=0 RS=0 */ }; #ifdef MCD_INCLUDE_EU -uint32_t MCD_ChainEu_TDT[]= +u32 MCD_ChainEu_TDT[]= { 0x80004000, /* 0000(:947): LCDEXT: idx0 = 0x00000000; ; */ 0x8198801b, /* 0004(:947): LCD: idx1 = var3; idx1 once var0; idx1 += inc3 */ @@ -2266,7 +2266,7 @@ uint32_t MCD_ChainEu_TDT[]= 0x000001f8, /* 01B0(:0): NOP */ 0x000001f8, /* 01B4(:0): NOP */ }; -uint32_t MCD_SingleEu_TDT[]= +u32 MCD_SingleEu_TDT[]= { 0x8218001b, /* 0000(:1248): LCD: idx0 = var4; idx0 once var0; idx0 += inc3 */ 0x7000000d, /* 0004(:1249): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */ @@ -2344,7 +2344,7 @@ uint32_t MCD_SingleEu_TDT[]= 0x040001f8, /* 0124(:1316): DRD1A: FN=0 INT init=0 WS=0 RS=0 */ }; #endif -uint32_t MCD_ENetRcv_TDT[]= +u32 MCD_ENetRcv_TDT[]= { 0x80004000, /* 0000(:1389): LCDEXT: idx0 = 0x00000000; ; */ 0x81988000, /* 0004(:1389): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */ @@ -2387,7 +2387,7 @@ uint32_t MCD_ENetRcv_TDT[]= 0x040001f8, /* 0098(:1441): DRD1A: FN=0 INT init=0 WS=0 RS=0 */ 0x000001f8, /* 009C(:0): NOP */ }; -uint32_t MCD_ENetXmit_TDT[]= +u32 MCD_ENetXmit_TDT[]= { 0x80004000, /* 0000(:1516): LCDEXT: idx0 = 0x00000000; ; */ 0x81988000, /* 0004(:1516): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */ diff --git a/BaS_gcc/dma/MCD_tasksInit.c b/BaS_gcc/dma/MCD_tasksInit.c index 291fba9..fd651b2 100755 --- a/BaS_gcc/dma/MCD_tasksInit.c +++ b/BaS_gcc/dma/MCD_tasksInit.c @@ -11,7 +11,6 @@ */ #include "MCD_dma.h" -#include "MCD_tasksInit.h" extern dmaRegs *MCD_dmaBar; @@ -23,33 +22,33 @@ extern dmaRegs *MCD_dmaBar; void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel) { - MCD_SET_VAR(taskTable+channel, 2, (uint32_t)currBD); /* var[2] */ - MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ - MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ - MCD_SET_VAR(taskTable+channel, 11, (uint32_t)xferSize); /* var[11] */ - MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ - MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave); /* var[0] */ - MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */ - MCD_SET_VAR(taskTable+channel, 3, (uint32_t)0x00000000); /* var[3] */ - MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */ - MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */ - MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */ - MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */ - MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */ - MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */ - MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000); /* var[10] */ - MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000000); /* var[12] */ - MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x80000000); /* var[13] */ - MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0x00000010); /* var[14] */ - MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000004); /* var[15] */ - MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x08000000); /* var[16] */ - MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000); /* inc[3] */ - MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000000); /* inc[4] */ - MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000001); /* inc[5] */ - MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x40000000); /* inc[6] */ + MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */ + MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ + MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ + MCD_SET_VAR(taskTable+channel, 11, (u32)xferSize); /* var[11] */ + MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ + MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */ + MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */ + MCD_SET_VAR(taskTable+channel, 3, (u32)0x00000000); /* var[3] */ + MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */ + MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */ + MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */ + MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */ + MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */ + MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */ + MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */ + MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000); /* var[12] */ + MCD_SET_VAR(taskTable+channel, 13, (u32)0x80000000); /* var[13] */ + MCD_SET_VAR(taskTable+channel, 14, (u32)0x00000010); /* var[14] */ + MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004); /* var[15] */ + MCD_SET_VAR(taskTable+channel, 16, (u32)0x08000000); /* var[16] */ + MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */ + MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000); /* inc[4] */ + MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000001); /* inc[5] */ + MCD_SET_VAR(taskTable+channel, 30, (u32)0x40000000); /* inc[6] */ /* Set the task's Enable bit in its Task Control Register */ - MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000; + MCD_dmaBar->taskControl[channel] |= (u16)0x8000; } @@ -57,29 +56,29 @@ void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xfer * Task 1 */ -void MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel) +void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel) { - MCD_SET_VAR(taskTable+channel, 7, (uint32_t)srcAddr); /* var[7] */ - MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ - MCD_SET_VAR(taskTable+channel, 2, (uint32_t)destAddr); /* var[2] */ - MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ - MCD_SET_VAR(taskTable+channel, 3, (uint32_t)dmaSize); /* var[3] */ - MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ - MCD_SET_VAR(taskTable+channel, 5, (uint32_t)flags); /* var[5] */ - MCD_SET_VAR(taskTable+channel, 1, (uint32_t)currBD); /* var[1] */ - MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave); /* var[0] */ - MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */ - MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */ - MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */ - MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000004); /* var[9] */ - MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x08000000); /* var[10] */ - MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000); /* inc[3] */ - MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000001); /* inc[4] */ - MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x40000000); /* inc[5] */ + MCD_SET_VAR(taskTable+channel, 7, (u32)srcAddr); /* var[7] */ + MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ + MCD_SET_VAR(taskTable+channel, 2, (u32)destAddr); /* var[2] */ + MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ + MCD_SET_VAR(taskTable+channel, 3, (u32)dmaSize); /* var[3] */ + MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ + MCD_SET_VAR(taskTable+channel, 5, (u32)flags); /* var[5] */ + MCD_SET_VAR(taskTable+channel, 1, (u32)currBD); /* var[1] */ + MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */ + MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */ + MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */ + MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */ + MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000004); /* var[9] */ + MCD_SET_VAR(taskTable+channel, 10, (u32)0x08000000); /* var[10] */ + MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */ + MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000001); /* inc[4] */ + MCD_SET_VAR(taskTable+channel, 29, (u32)0x40000000); /* inc[5] */ /* Set the task's Enable bit in its Task Control Register */ - MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000; + MCD_dmaBar->taskControl[channel] |= (u16)0x8000; } @@ -90,36 +89,36 @@ void MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, s void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel) { - MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */ - MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ - MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ - MCD_SET_VAR(taskTable+channel, 12, (uint32_t)xferSize); /* var[12] */ - MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ - MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave); /* var[0] */ - MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */ - MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */ - MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */ - MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */ - MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */ - MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */ - MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */ - MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */ - MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000); /* var[10] */ - MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x00000000); /* var[11] */ - MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x00000000); /* var[13] */ - MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0x80000000); /* var[14] */ - MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000010); /* var[15] */ - MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x00000001); /* var[16] */ - MCD_SET_VAR(taskTable+channel, 17, (uint32_t)0x00000004); /* var[17] */ - MCD_SET_VAR(taskTable+channel, 18, (uint32_t)0x08000000); /* var[18] */ - MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000); /* inc[3] */ - MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0x80000000); /* inc[4] */ - MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0xc0000000); /* inc[5] */ - MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x80000001); /* inc[6] */ - MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0x40000000); /* inc[7] */ + MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */ + MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ + MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ + MCD_SET_VAR(taskTable+channel, 12, (u32)xferSize); /* var[12] */ + MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ + MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */ + MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */ + MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */ + MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */ + MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */ + MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */ + MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */ + MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */ + MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */ + MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */ + MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000000); /* var[11] */ + MCD_SET_VAR(taskTable+channel, 13, (u32)0x00000000); /* var[13] */ + MCD_SET_VAR(taskTable+channel, 14, (u32)0x80000000); /* var[14] */ + MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000010); /* var[15] */ + MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000001); /* var[16] */ + MCD_SET_VAR(taskTable+channel, 17, (u32)0x00000004); /* var[17] */ + MCD_SET_VAR(taskTable+channel, 18, (u32)0x08000000); /* var[18] */ + MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */ + MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000); /* inc[4] */ + MCD_SET_VAR(taskTable+channel, 29, (u32)0xc0000000); /* inc[5] */ + MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001); /* inc[6] */ + MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000); /* inc[7] */ /* Set the task's Enable bit in its Task Control Register */ - MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000; + MCD_dmaBar->taskControl[channel] |= (u16)0x8000; } @@ -127,33 +126,33 @@ void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSi * Task 3 */ -void MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel) +void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel) { - MCD_SET_VAR(taskTable+channel, 8, (uint32_t)srcAddr); /* var[8] */ - MCD_SET_VAR(taskTable+channel, 25, (uint32_t)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ - MCD_SET_VAR(taskTable+channel, 3, (uint32_t)destAddr); /* var[3] */ - MCD_SET_VAR(taskTable+channel, 24, (uint32_t)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ - MCD_SET_VAR(taskTable+channel, 4, (uint32_t)dmaSize); /* var[4] */ - MCD_SET_VAR(taskTable+channel, 26, (uint32_t)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ - MCD_SET_VAR(taskTable+channel, 6, (uint32_t)flags); /* var[6] */ - MCD_SET_VAR(taskTable+channel, 2, (uint32_t)currBD); /* var[2] */ - MCD_SET_VAR(taskTable+channel, 0, (uint32_t)cSave); /* var[0] */ - MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */ - MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */ - MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */ - MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */ - MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000001); /* var[10] */ - MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x00000004); /* var[11] */ - MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x08000000); /* var[12] */ - MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x00000000); /* inc[3] */ - MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0xc0000000); /* inc[4] */ - MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000000); /* inc[5] */ - MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x80000001); /* inc[6] */ - MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0x40000000); /* inc[7] */ + MCD_SET_VAR(taskTable+channel, 8, (u32)srcAddr); /* var[8] */ + MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ + MCD_SET_VAR(taskTable+channel, 3, (u32)destAddr); /* var[3] */ + MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ + MCD_SET_VAR(taskTable+channel, 4, (u32)dmaSize); /* var[4] */ + MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ + MCD_SET_VAR(taskTable+channel, 6, (u32)flags); /* var[6] */ + MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */ + MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */ + MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */ + MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */ + MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */ + MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */ + MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000001); /* var[10] */ + MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000004); /* var[11] */ + MCD_SET_VAR(taskTable+channel, 12, (u32)0x08000000); /* var[12] */ + MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */ + MCD_SET_VAR(taskTable+channel, 28, (u32)0xc0000000); /* inc[4] */ + MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000); /* inc[5] */ + MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001); /* inc[6] */ + MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000); /* inc[7] */ /* Set the task's Enable bit in its Task Control Register */ - MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000; + MCD_dmaBar->taskControl[channel] |= (u16)0x8000; } @@ -161,29 +160,29 @@ void MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, sho * Task 4 */ -void MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel) +void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel) { - MCD_SET_VAR(taskTable+channel, 0, (uint32_t)bDBase); /* var[0] */ - MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */ - MCD_SET_VAR(taskTable+channel, 6, (uint32_t)rcvFifoPtr); /* var[6] */ - MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */ - MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */ - MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */ - MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */ - MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */ - MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */ - MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x0000ffff); /* var[9] */ - MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x30000000); /* var[10] */ - MCD_SET_VAR(taskTable+channel, 11, (uint32_t)0x0fffffff); /* var[11] */ - MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000008); /* var[12] */ - MCD_SET_VAR(taskTable+channel, 24, (uint32_t)0x00000000); /* inc[0] */ - MCD_SET_VAR(taskTable+channel, 25, (uint32_t)0x60000000); /* inc[1] */ - MCD_SET_VAR(taskTable+channel, 26, (uint32_t)0x20000004); /* inc[2] */ - MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0x40000000); /* inc[3] */ + MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */ + MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */ + MCD_SET_VAR(taskTable+channel, 6, (u32)rcvFifoPtr); /* var[6] */ + MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */ + MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */ + MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */ + MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */ + MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */ + MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */ + MCD_SET_VAR(taskTable+channel, 9, (u32)0x0000ffff); /* var[9] */ + MCD_SET_VAR(taskTable+channel, 10, (u32)0x30000000); /* var[10] */ + MCD_SET_VAR(taskTable+channel, 11, (u32)0x0fffffff); /* var[11] */ + MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000008); /* var[12] */ + MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000); /* inc[0] */ + MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000); /* inc[1] */ + MCD_SET_VAR(taskTable+channel, 26, (u32)0x20000004); /* inc[2] */ + MCD_SET_VAR(taskTable+channel, 27, (u32)0x40000000); /* inc[3] */ /* Set the task's Enable bit in its Task Control Register */ - MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000; + MCD_dmaBar->taskControl[channel] |= (u16)0x8000; } @@ -191,35 +190,35 @@ void MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, vo * Task 5 */ -void MCD_startDmaENetXmit(int8_t *bDBase, int8_t *currBD, int8_t *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel) +void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel) { - MCD_SET_VAR(taskTable+channel, 0, (uint32_t)bDBase); /* var[0] */ - MCD_SET_VAR(taskTable+channel, 3, (uint32_t)currBD); /* var[3] */ - MCD_SET_VAR(taskTable+channel, 11, (uint32_t)xmitFifoPtr); /* var[11] */ - MCD_SET_VAR(taskTable+channel, 1, (uint32_t)0x00000000); /* var[1] */ - MCD_SET_VAR(taskTable+channel, 2, (uint32_t)0x00000000); /* var[2] */ - MCD_SET_VAR(taskTable+channel, 4, (uint32_t)0x00000000); /* var[4] */ - MCD_SET_VAR(taskTable+channel, 5, (uint32_t)0x00000000); /* var[5] */ - MCD_SET_VAR(taskTable+channel, 6, (uint32_t)0x00000000); /* var[6] */ - MCD_SET_VAR(taskTable+channel, 7, (uint32_t)0x00000000); /* var[7] */ - MCD_SET_VAR(taskTable+channel, 8, (uint32_t)0x00000000); /* var[8] */ - MCD_SET_VAR(taskTable+channel, 9, (uint32_t)0x00000000); /* var[9] */ - MCD_SET_VAR(taskTable+channel, 10, (uint32_t)0x00000000); /* var[10] */ - MCD_SET_VAR(taskTable+channel, 12, (uint32_t)0x00000000); /* var[12] */ - MCD_SET_VAR(taskTable+channel, 13, (uint32_t)0x0000ffff); /* var[13] */ - MCD_SET_VAR(taskTable+channel, 14, (uint32_t)0xffffffff); /* var[14] */ - MCD_SET_VAR(taskTable+channel, 15, (uint32_t)0x00000004); /* var[15] */ - MCD_SET_VAR(taskTable+channel, 16, (uint32_t)0x00000008); /* var[16] */ - MCD_SET_VAR(taskTable+channel, 24, (uint32_t)0x00000000); /* inc[0] */ - MCD_SET_VAR(taskTable+channel, 25, (uint32_t)0x60000000); /* inc[1] */ - MCD_SET_VAR(taskTable+channel, 26, (uint32_t)0x40000000); /* inc[2] */ - MCD_SET_VAR(taskTable+channel, 27, (uint32_t)0xc000fffc); /* inc[3] */ - MCD_SET_VAR(taskTable+channel, 28, (uint32_t)0xe0000004); /* inc[4] */ - MCD_SET_VAR(taskTable+channel, 29, (uint32_t)0x80000000); /* inc[5] */ - MCD_SET_VAR(taskTable+channel, 30, (uint32_t)0x4000ffff); /* inc[6] */ - MCD_SET_VAR(taskTable+channel, 31, (uint32_t)0xe0000001); /* inc[7] */ + MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */ + MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */ + MCD_SET_VAR(taskTable+channel, 11, (u32)xmitFifoPtr); /* var[11] */ + MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */ + MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */ + MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */ + MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */ + MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */ + MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */ + MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */ + MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */ + MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */ + MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000); /* var[12] */ + MCD_SET_VAR(taskTable+channel, 13, (u32)0x0000ffff); /* var[13] */ + MCD_SET_VAR(taskTable+channel, 14, (u32)0xffffffff); /* var[14] */ + MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004); /* var[15] */ + MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000008); /* var[16] */ + MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000); /* inc[0] */ + MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000); /* inc[1] */ + MCD_SET_VAR(taskTable+channel, 26, (u32)0x40000000); /* inc[2] */ + MCD_SET_VAR(taskTable+channel, 27, (u32)0xc000fffc); /* inc[3] */ + MCD_SET_VAR(taskTable+channel, 28, (u32)0xe0000004); /* inc[4] */ + MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000); /* inc[5] */ + MCD_SET_VAR(taskTable+channel, 30, (u32)0x4000ffff); /* inc[6] */ + MCD_SET_VAR(taskTable+channel, 31, (u32)0xe0000001); /* inc[7] */ /* Set the task's Enable bit in its Task Control Register */ - MCD_dmaBar->taskControl[channel] |= (uint16_t)0x8000; + MCD_dmaBar->taskControl[channel] |= (u16)0x8000; } diff --git a/BaS_gcc/dma/dma.c b/BaS_gcc/dma/dma.c index 18d19d2..58ac209 100644 --- a/BaS_gcc/dma/dma.c +++ b/BaS_gcc/dma/dma.c @@ -593,9 +593,9 @@ bool dma_interrupt_handler(void *arg1, void *arg2) } } - set_ipl(ipl); + //set_ipl(ipl); - return 1; /* handled */ + return true; /* handled */ } /********************************************************************/ diff --git a/BaS_gcc/include/MCD_dma.h b/BaS_gcc/include/MCD_dma.h index 6993387..b589cc8 100755 --- a/BaS_gcc/include/MCD_dma.h +++ b/BaS_gcc/include/MCD_dma.h @@ -7,15 +7,11 @@ #ifndef _MCD_API_H #define _MCD_API_H -#include "bas_types.h" - /* * Turn Execution Unit tasks ON (#define) or OFF (#undef) */ - -//#define MCD_INCLUDE_EU #undef MCD_INCLUDE_EU - +//#define MCD_INCLUDE_EU /* * Number of DMA channels */ @@ -50,33 +46,39 @@ /* * Portability typedefs */ +typedef int s32; +typedef unsigned int u32; +typedef short s16; +typedef unsigned short u16; +typedef char s8; +typedef unsigned char u8; /* * These structures represent the internal registers of the * multi-channel DMA */ struct dmaRegs_s { - uint32_t taskbar; /* task table base address register */ - uint32_t currPtr; - uint32_t endPtr; - uint32_t varTablePtr; - uint16_t dma_rsvd0; - uint16_t ptdControl; /* ptd control */ - uint32_t intPending; /* interrupt pending register */ - uint32_t intMask; /* interrupt mask register */ - uint16_t taskControl[16]; /* task control registers */ - uint8_t priority[32]; /* priority registers */ - uint32_t initiatorMux; /* initiator mux control */ - uint32_t taskSize0; /* task size control register 0. */ - uint32_t taskSize1; /* task size control register 1. */ - uint32_t dma_rsvd1; /* reserved */ - uint32_t dma_rsvd2; /* reserved */ - uint32_t debugComp1; /* debug comparator 1 */ - uint32_t debugComp2; /* debug comparator 2 */ - uint32_t debugControl; /* debug control */ - uint32_t debugStatus; /* debug status */ - uint32_t ptdDebug; /* priority task decode debug */ - uint32_t dma_rsvd3[31]; /* reserved */ + u32 taskbar; /* task table base address register */ + u32 currPtr; + u32 endPtr; + u32 varTablePtr; + u16 dma_rsvd0; + u16 ptdControl; /* ptd control */ + u32 intPending; /* interrupt pending register */ + u32 intMask; /* interrupt mask register */ + u16 taskControl[16]; /* task control registers */ + u8 priority[32]; /* priority registers */ + u32 initiatorMux; /* initiator mux control */ + u32 taskSize0; /* task size control register 0. */ + u32 taskSize1; /* task size control register 1. */ + u32 dma_rsvd1; /* reserved */ + u32 dma_rsvd2; /* reserved */ + u32 debugComp1; /* debug comparator 1 */ + u32 debugComp2; /* debug comparator 2 */ + u32 debugControl; /* debug control */ + u32 debugStatus; /* debug status */ + u32 ptdDebug; /* priority task decode debug */ + u32 dma_rsvd3[31]; /* reserved */ }; typedef volatile struct dmaRegs_s dmaRegs; @@ -162,7 +164,7 @@ typedef volatile struct dmaRegs_s dmaRegs; */ /* Byte swapping: */ #define MCD_NO_BYTE_SWAP 0x00045670 /* to disable byte swapping. */ -#define MCD_BYTE_REVERSE 0x00076540 /* to reverse the bytes of each uint32_t of the DMAed data. */ +#define MCD_BYTE_REVERSE 0x00076540 /* to reverse the bytes of each u32 of the DMAed data. */ #define MCD_U16_REVERSE 0x00067450 /* to reverse the 16-bit halves of each 32-bit data value being DMAed.*/ #define MCD_U16_BYTE_REVERSE 0x00054760 /* to reverse the byte halves of each @@ -229,44 +231,44 @@ typedef volatile struct dmaRegs_s dmaRegs; /* Task Table Entry struct*/ typedef struct { - uint32_t TDTstart; /* task descriptor table start */ - uint32_t TDTend; /* task descriptor table end */ - uint32_t varTab; /* variable table start */ - uint32_t FDTandFlags; /* function descriptor table start and flags */ - volatile uint32_t descAddrAndStatus; - volatile uint32_t modifiedVarTab; - uint32_t contextSaveSpace; /* context save space start */ - uint32_t literalBases; + u32 TDTstart; /* task descriptor table start */ + u32 TDTend; /* task descriptor table end */ + u32 varTab; /* variable table start */ + u32 FDTandFlags; /* function descriptor table start and flags */ + volatile u32 descAddrAndStatus; + volatile u32 modifiedVarTab; + u32 contextSaveSpace; /* context save space start */ + u32 literalBases; } TaskTableEntry; /* Chained buffer descriptor */ typedef volatile struct MCD_bufDesc_struct MCD_bufDesc; struct MCD_bufDesc_struct { - uint32_t flags; /* flags describing the DMA */ - uint32_t csumResult; /* checksum from checksumming performed since last checksum reset */ - int8_t *srcAddr; /* the address to move data from */ - int8_t *destAddr; /* the address to move data to */ - int8_t *lastDestAddr; /* the last address written to */ - uint32_t dmaSize; /* the number of bytes to transfer independent of the transfer size */ + u32 flags; /* flags describing the DMA */ + u32 csumResult; /* checksum from checksumming performed since last checksum reset */ + s8 *srcAddr; /* the address to move data from */ + s8 *destAddr; /* the address to move data to */ + s8 *lastDestAddr; /* the last address written to */ + u32 dmaSize; /* the number of bytes to transfer independent of the transfer size */ MCD_bufDesc *next; /* next buffer descriptor in chain */ - uint32_t info; /* private information about this descriptor; DMA does not affect it */ + u32 info; /* private information about this descriptor; DMA does not affect it */ }; /* Progress Query struct */ typedef volatile struct MCD_XferProg_struct { - int8_t *lastSrcAddr; /* the most-recent or last, post-increment source address */ - int8_t *lastDestAddr; /* the most-recent or last, post-increment destination address */ - uint32_t dmaSize; /* the amount of data transferred for the current buffer */ + s8 *lastSrcAddr; /* the most-recent or last, post-increment source address */ + s8 *lastDestAddr; /* the most-recent or last, post-increment destination address */ + u32 dmaSize; /* the amount of data transferred for the current buffer */ MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */ } MCD_XferProg; /* FEC buffer descriptor */ typedef volatile struct MCD_bufDescFec_struct { - uint16_t statCtrl; - uint16_t length; - uint32_t dataPointer; + u16 statCtrl; + u16 length; + u32 dataPointer; } MCD_bufDescFec; @@ -280,16 +282,16 @@ typedef volatile struct MCD_bufDescFec_struct { */ int MCD_startDma ( int channel, /* the channel on which to run the DMA */ - int8_t *srcAddr, /* the address to move data from, or buffer-descriptor address */ - int16_t srcIncr, /* the amount to increment the source address per transfer */ - int8_t *destAddr, /* the address to move data to */ - int16_t destIncr, /* the amount to increment the destination address per transfer */ - uint32_t dmaSize, /* the number of bytes to transfer independent of the transfer size */ - uint32_t xferSize, /* the number bytes in of each data movement (1, 2, or 4) */ - uint32_t initiator, /* what device initiates the DMA */ + s8 *srcAddr, /* the address to move data from, or buffer-descriptor address */ + s16 srcIncr, /* the amount to increment the source address per transfer */ + s8 *destAddr, /* the address to move data to */ + s16 destIncr, /* the amount to increment the destination address per transfer */ + u32 dmaSize, /* the number of bytes to transfer independent of the transfer size */ + u32 xferSize, /* the number bytes in of each data movement (1, 2, or 4) */ + u32 initiator, /* what device initiates the DMA */ int priority, /* priority of the DMA */ - uint32_t flags, /* flags describing the DMA */ - uint32_t funcDesc /* a description of byte swapping, bit swapping, and CRC actions */ + u32 flags, /* flags describing the DMA */ + u32 funcDesc /* a description of byte swapping, bit swapping, and CRC actions */ ); /* @@ -297,7 +299,7 @@ int MCD_startDma ( * registers, relocating and creating the appropriate task structures, and * setting up some global settings */ -int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, uint32_t flags); +int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags); /* * MCD_dmaStatus() returns the status of the DMA on the requested channel. @@ -336,7 +338,7 @@ int MCD_resumeDma (int channel); /* * MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA */ -int MCD_csumQuery (int channel, uint32_t *csum); +int MCD_csumQuery (int channel, u32 *csum); /* * MCD_getCodeSize provides the packed size required by the microcoded task @@ -351,7 +353,7 @@ int MCD_getCodeSize(void); int MCD_getVersion(char **longVersion); /* macro for setting a location in the variable table */ -#define MCD_SET_VAR(taskTab,idx,value) ((uint32_t *)(taskTab)->varTab)[idx] = value +#define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value /* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function, so I'm avoiding surrounding it with "do {} while(0)" */ diff --git a/BaS_gcc/include/MCD_tasksInit.h b/BaS_gcc/include/MCD_tasksInit.h index 4b2807e..daf871c 100755 --- a/BaS_gcc/include/MCD_tasksInit.h +++ b/BaS_gcc/include/MCD_tasksInit.h @@ -15,7 +15,7 @@ void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xfer /* * Task 1 */ -void MCD_startDmaSingleNoEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel); +void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel); /* @@ -27,18 +27,18 @@ void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSi /* * Task 3 */ -void MCD_startDmaSingleEu(int8_t *srcAddr, short srcIncr, int8_t *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel); +void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel); /* * Task 4 */ -void MCD_startDmaENetRcv(int8_t *bDBase, int8_t *currBD, int8_t *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel); +void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel); /* * Task 5 */ -void MCD_startDmaENetXmit(int8_t *bDBase, int8_t *currBD, int8_t *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel); +void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel); #endif /* MCD_TSK_INIT_H */ diff --git a/BaS_gcc/include/fec.h b/BaS_gcc/include/fec.h index 3c048fd..c439618 100644 --- a/BaS_gcc/include/fec.h +++ b/BaS_gcc/include/fec.h @@ -2,7 +2,7 @@ * File: fec.h * Purpose: Driver for the Fast Ethernet Controller (FEC) * - * Notes: + * Notes: */ #ifndef _FEC_H_ @@ -30,30 +30,30 @@ */ typedef struct { - int total; /* total count of errors */ - int hberr; /* heartbeat error */ - int babr; /* babbling receiver */ - int babt; /* babbling transmitter */ - int gra; /* graceful stop complete */ - int txf; /* transmit frame */ - int mii; /* MII */ - int lc; /* late collision */ - int rl; /* collision retry limit */ - int xfun; /* transmit FIFO underrrun */ - int xferr; /* transmit FIFO error */ - int rferr; /* receive FIFO error */ - int dtxf; /* DMA transmit frame */ - int drxf; /* DMA receive frame */ - int rfsw_inv; /* Invalid bit in RFSW */ - int rfsw_l; /* RFSW Last in Frame */ - int rfsw_m; /* RFSW Miss */ - int rfsw_bc; /* RFSW Broadcast */ - int rfsw_mc; /* RFSW Multicast */ - int rfsw_lg; /* RFSW Length Violation */ - int rfsw_no; /* RFSW Non-octet */ - int rfsw_cr; /* RFSW Bad CRC */ - int rfsw_ov; /* RFSW Overflow */ - int rfsw_tr; /* RFSW Truncated */ + int total; /* total count of errors */ + int hberr; /* heartbeat error */ + int babr; /* babbling receiver */ + int babt; /* babbling transmitter */ + int gra; /* graceful stop complete */ + int txf; /* transmit frame */ + int mii; /* MII */ + int lc; /* late collision */ + int rl; /* collision retry limit */ + int xfun; /* transmit FIFO underrrun */ + int xferr; /* transmit FIFO error */ + int rferr; /* receive FIFO error */ + int dtxf; /* DMA transmit frame */ + int drxf; /* DMA receive frame */ + int rfsw_inv; /* Invalid bit in RFSW */ + int rfsw_l; /* RFSW Last in Frame */ + int rfsw_m; /* RFSW Miss */ + int rfsw_bc; /* RFSW Broadcast */ + int rfsw_mc; /* RFSW Multicast */ + int rfsw_lg; /* RFSW Length Violation */ + int rfsw_no; /* RFSW Non-octet */ + int rfsw_cr; /* RFSW Bad CRC */ + int rfsw_ov; /* RFSW Overflow */ + int rfsw_tr; /* RFSW Truncated */ } FEC_EVENT_LOG; diff --git a/BaS_gcc/include/interrupts.h b/BaS_gcc/include/interrupts.h index feca79e..fab3a13 100644 --- a/BaS_gcc/include/interrupts.h +++ b/BaS_gcc/include/interrupts.h @@ -133,15 +133,6 @@ #define FALCON_MFP_IMRA *((volatile uint8_t *) 0xfffffa13) #define FALCON_MFP_IMRB *((volatile uint8_t *) 0xfffffa15) -#ifdef _NOT_USED_ -#define vbasehi * ((volatile uint8_t *) 0xffff8201) -#define vbasemid * ((volatile uint8_t *) 0xffff8203) -#define vbaselow * ((volatile uint8_t *) 0xffff820d) - -#define vwrap * ((volatile uint16_t *) 0xffff8210) -#define vde * ((volatile uint16_t *) 0xffff82aa) -#define vdb * ((volatile uint16_t *) 0xffff82a8) -#endif /* _NOT_USED_ */ #endif /* MACHINE_FIREBEE */ extern void isr_init(void); @@ -150,8 +141,8 @@ extern bool isr_enable_int_source(int int_source); extern bool isr_register_handler(int vector, int level, int priority, bool (*handler)(void *, void *), void *hdev, void *harg); extern void isr_remove_handler(bool (*handler)(void *, void *)); extern bool isr_execute_handler(int vector); -extern int pic_interrupt_handler(void *arg1, void *arg2); -extern int xlbpci_interrupt_handler(void *arg1, void *arg2); -extern int pciarb_interrupt_handler(void *arg1, void *arg2); -extern int irq5_handler(void *arg1, void *arg2); +extern bool pic_interrupt_handler(void *arg1, void *arg2); +extern bool xlbpci_interrupt_handler(void *arg1, void *arg2); +extern bool pciarb_interrupt_handler(void *arg1, void *arg2); +extern bool irq5_handler(void *arg1, void *arg2); #endif /* _INTERRUPTS_H_ */ diff --git a/BaS_gcc/net/fec.c b/BaS_gcc/net/fec.c index 10b9d58..4536849 100644 --- a/BaS_gcc/net/fec.c +++ b/BaS_gcc/net/fec.c @@ -571,9 +571,9 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd) * Start the Rx DMA task */ MCD_startDma(channel, - (int8_t *) rxbd, + (s8 *) rxbd, 0, - (int8_t *) MCF_FEC_FECRFDR(ch), + (s8 *) MCF_FEC_FECRFDR(ch), 0, RX_BUF_SZ, 0, @@ -887,9 +887,9 @@ void fec_tx_start(uint8_t ch, int8_t *txbd) * Start the Tx DMA task */ MCD_startDma(channel, - (int8_t *) txbd, + (s8 *) txbd, 0, - (int8_t*) MCF_FEC_FECTFDR(ch), + (s8 *) MCF_FEC_FECTFDR(ch), 0, ETH_MTU, 0, @@ -1189,7 +1189,7 @@ void fec_irq_disable(uint8_t ch) * Parameters: * ch FEC channel */ -static void fec_irq_handler(uint8_t ch) +static bool fec_irq_handler(uint8_t ch) { uint32_t event, eir; @@ -1284,6 +1284,8 @@ static void fec_irq_handler(uint8_t ch) fec_log[ch].hberr++; dbg("HBERR\r\n"); } + + return true; } /* @@ -1292,22 +1294,26 @@ static void fec_irq_handler(uint8_t ch) */ bool fec0_interrupt_handler(void* arg1, void* arg2) { + bool res; + (void) arg1; /* not used */ (void) arg2; - fec_irq_handler(0); + res = fec_irq_handler(0); - return true; /* handled */ + return res; } bool fec1_interrupt_handler(void* arg1, void* arg2) { + bool res; + (void) arg1; /* not used */ (void) arg2; - fec_irq_handler(1); + res = fec_irq_handler(1); - return true; /* handled */ + return res; } /* diff --git a/BaS_gcc/net/net_timer.c b/BaS_gcc/net/net_timer.c index d9ebdf1..747b0a0 100644 --- a/BaS_gcc/net/net_timer.c +++ b/BaS_gcc/net/net_timer.c @@ -38,7 +38,7 @@ static NET_TIMER net_timer[4] = }; -int timer_default_isr(void *not_used, NET_TIMER *t) +bool timer_default_isr(void *not_used, NET_TIMER *t) { (void) not_used; @@ -159,7 +159,7 @@ bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri) * Register the timer interrupt handler */ if (!isr_register_handler(TIMER_VECTOR(ch), 3, 0, - (int (*)(void *,void *)) timer_default_isr, + (bool (*)(void *,void *)) timer_default_isr, NULL, (void *) &net_timer[ch]) ) diff --git a/BaS_gcc/sys/BaS.c b/BaS_gcc/sys/BaS.c index 5046edb..bf42252 100644 --- a/BaS_gcc/sys/BaS.c +++ b/BaS_gcc/sys/BaS.c @@ -237,10 +237,11 @@ void enable_coldfire_interrupts() MCF_EPORT_EPIER = 0xfe; /* int 1-7 on */ MCF_EPORT_EPFR = 0xff; /* clear all pending interrupts */ MCF_INTC_IMRL = 0xffffff00; /* int 1-7 on */ - MCF_INTC_IMRH = 0xbffffffe; /* psc3 and timer 0 int on */ + //MCF_INTC_IMRH = 0xbffffffe; /* psc3 and timer 0 int on */ + MCF_INTC_IMRH = 0; FBEE_INTR_ENABLE = FBEE_INTR_INT_IRQ7 | /* enable pseudo bus error */ - FBEE_INTR_INT_MFP_IRQ6 | /* enable Firebee (PIC, PCI, ETH PHY, DVI, DSP) interrupts */ - FBEE_INTR_INT_FPGA_IRQ5 | /* enable MFP interrupts */ + FBEE_INTR_INT_MFP_IRQ6 | /* enable MFP interrupts */ + FBEE_INTR_INT_FPGA_IRQ5 | /* enable Firebee (PIC, PCI, ETH PHY, DVI, DSP) interrupts */ FBEE_INTR_INT_VSYNC_IRQ4 | /* enable vsync interrupts */ FBEE_INTR_PCI_INTA | /* enable PCI interrupts */ FBEE_INTR_PCI_INTB | diff --git a/BaS_gcc/sys/exceptions.S b/BaS_gcc/sys/exceptions.S index ac7c517..32a5133 100644 --- a/BaS_gcc/sys/exceptions.S +++ b/BaS_gcc/sys/exceptions.S @@ -228,23 +228,23 @@ init_vec_loop: move.l a1,(INT_SOURCE_GPT2 + 64) * 4(a0) move.l a1,(INT_SOURCE_GPT3 + 64) * 4(a0) -// install lowlevel_isr_handler for the FEC0 interrupt - move.l a1,(INT_SOURCE_FEC0 + 64) * 4(a0) - // install lowlevel_isr_handler for the PSC3 interrupt move.l a1,(INT_SOURCE_PSC3 + 64) * 4(a0) +// install lowlevel_isr_handler for Coldfire DMA interrupts + move.l a1,(INT_SOURCE_DMA + 64) * 4(a0) + // install lowlevel_isr_handler for the XLBPCI interrupt move.l a1,(INT_SOURCE_XLBPCI + 64) * 4(a0) +// install lowlevel_isr_handler for the FEC0 interrupt + move.l a1,(INT_SOURCE_FEC0 + 64) * 4(a0) + #ifndef MACHINE_FIREBEE // FEC1 not wired on the FireBee (used for FPGA as GPIO), but available on other machines move.l a1,(INT_SOURCE_FEC1 + 64) * 4(a0) #endif -// install lowlevel_isr_handler for Coldfire DMA interrupts - move.l a1,(INT_SOURCE_DMA + 64) * 4(a0) - move.l (sp)+,a2 // Restore registers rts @@ -337,7 +337,7 @@ access: bus_error: movem.l (sp),d0-d1/a0-a1 // restore registers unlk a6 - bra std_exc_vec + bra std_exc_vec // FIXME: this seems to be bogous... zero_divide: move.w #0x2700,sr // disable interrupt @@ -397,14 +397,14 @@ flpoow: irq1: irq 0x64, 1, 0x02 // Level 1 autovector interrupt (unused) -irq2: irq 0x68, 2, 0x04 // Level 2 autovector interrupt (horizonatl blank) +irq2: irq 0x68, 2, 0x04 // Level 2 autovector interrupt (horizontal blank) irq3: irq 0x6c, 3, 0x08 // Level 3 autovector interrupt (unused) irq4: irq 0x70, 4, 0x10 // Level 4 autovector interrupt (vertical blank) #if defined(MACHINE_FIREBEE) /* these handlers are only meaningful for the Firebee */ -irq5: move.w #0x2700,sr // disable interrupts +irq5: //move.w #0x2700,sr // disable interrupts subq.l #4,sp // extra space link a6,#-4 * 4 // save gcc scratch registers @@ -412,8 +412,8 @@ irq5: move.w #0x2700,sr // disable interrupts jsr _irq5_handler // call C handler routine - tst.l d0 // handled? - bne irq5_forward + tst.b d0 // handled? + beq irq5_forward movem.l (sp),d0-d1/a0-a1 // restore registers unlk a6 @@ -434,7 +434,7 @@ irq5_forward: move.l 0x74,a0 // fetch OS irq5 vector * irq6 needs special treatment since - because the Coldfire only supports autovector interrupts * - the exception vector is provided by the simulated MFP from the FPGA */ -irq6: move.w #0x2700,sr // disable interrupt +irq6: //move.w #0x2700,sr // disable interrupt subq.l #4,sp // extra space link a6,#-4 * 4 // save gcc scratch registers @@ -445,8 +445,8 @@ irq6: move.w #0x2700,sr // disable interrupt jsr _irq6_handler // call C handler lea 8(sp),sp // fix stack - tst.l d0 // interrupt handled? - bne irq6_forward // no, forward to TOS + tst.b d0 // interrupt handled? + beq irq6_forward // no, forward to TOS movem.l (sp),d0-d1/a0-a1 // restore registers unlk a6 @@ -506,7 +506,7 @@ irq7: handler_gpt0: .extern _gpt0_interrupt_handler - move.w #0x2700,sr // disable interrupts + //move.w #0x2700,sr // disable interrupts link a6,#-4 * 4 // make room for movem.l d0-d1/a0-a1,(sp) // gcc scratch registers and save them, // other registers will be handled by gcc itself @@ -524,7 +524,7 @@ handler_gpt0: #else // handlers for M5484LITE irq5: // irq5 is tied to PCI INTC# and PCI INTD# on the M5484LITE - move.w #0x2700,sr // disable interrupts + //move.w #0x2700,sr // disable interrupts lea -4*4(sp),sp // save gcc scratch registers movem.l d0-d1/a0-a1,(sp) @@ -545,7 +545,7 @@ irq6: irq7: // irq7 is tied to PCI INTA# and PCI INTB# on the M5484LITE - move.w #0x2700,sr // disable interrupts + //move.w #0x2700,sr // disable interrupts lea -4*4(sp),sp // save gcc scratch registers movem.l d0-d1/a0-a1,(sp) @@ -567,7 +567,7 @@ irq7text: /* * low-level interrupt service routine for routines registered with * isr_register_handler(int vector). If the higlevel routine (isr_execute_handler()) - * returns != 0, the call is forwarded to the OS (through its own vector base). + * returns != true, the call is forwarded to the OS (through its own vector base). */ .global _lowlevel_isr_handler .extern _isr_execute_handler @@ -597,8 +597,8 @@ _lowlevel_isr_handler: move.l d0,-(sp) // push it jsr _isr_execute_handler // call the C handler addq.l #4,sp // adjust stack - tst.l d0 // handled? - bne lowlevel_forward // no, we forward it to TOS + tst.b d0 // handled? + beq lowlevel_forward // no, forward it to TOS movem.l (sp),d0-d1/a0-a1 // restore registers unlk a6 diff --git a/BaS_gcc/sys/interrupts.c b/BaS_gcc/sys/interrupts.c index 768ee4f..a5e9e99 100644 --- a/BaS_gcc/sys/interrupts.c +++ b/BaS_gcc/sys/interrupts.c @@ -53,10 +53,10 @@ struct isrentry { - int vector; - bool (*handler)(void *, void *); - void *hdev; - void *harg; + int vector; + bool (*handler)(void *, void *); + void *hdev; + void *harg; }; static struct isrentry isrtab[MAX_ISR_ENTRY]; /* list of interrupt service routines */ @@ -93,7 +93,7 @@ bool isr_set_prio_and_level(int int_source, int priority, int level) } /* - * enable internal int source in DMA controller + * enable internal int source in interrupt controller */ bool isr_enable_int_source(int int_source) { @@ -196,11 +196,14 @@ void isr_remove_handler(bool (*handler)(void *, void *)) /* * This routine searches the ISR table for an entry that matches * 'vector'. If one is found, then 'handler' is executed. + * + * This routine returns either true or false where + * true = interrupt has been handled, return to caller + * false= interrupt has been handled or hasn't, but needs to be forwarded to TOS */ bool isr_execute_handler(int vector) { int index; - bool retval = false; dbg("vector = %d\r\n", vector); @@ -216,7 +219,7 @@ bool isr_execute_handler(int vector) } err("no isr handler for vector %d found. Spurious?\r\n", vector); - return retval; + return true; } /* @@ -225,7 +228,7 @@ bool isr_execute_handler(int vector) * Handles PIC requests that come in from PSC3 serial interface. Currently, that * is RTC/NVRAM requests only */ -int pic_interrupt_handler(void *arg1, void *arg2) +bool pic_interrupt_handler(void *arg1, void *arg2) { uint8_t rcv_byte; @@ -245,21 +248,21 @@ int pic_interrupt_handler(void *arg1, void *arg2) MCF_PSC3_PSCTB_8BIT = *rtc_data; } while (index++ < 64); } - return 1; + return true; } -int xlbpci_interrupt_handler(void *arg1, void *arg2) +bool xlbpci_interrupt_handler(void *arg1, void *arg2) { dbg("XLB PCI interrupt\r\n"); - return 1; + return true; } -int pciarb_interrupt_handler(void *arg1, void *arg2) +bool pciarb_interrupt_handler(void *arg1, void *arg2) { dbg("PCI ARB interrupt\r\n"); - return 1; + return true; } #if defined(MACHINE_FIREBEE) @@ -267,13 +270,12 @@ int pciarb_interrupt_handler(void *arg1, void *arg2) * This gets called from irq5 in exceptions.S * * IRQ5 are the "FBEE" (PIC, ETH PHY, PCI, DVI monitor sense and DSP) interrupts multiplexed by the FPGA interrupt handler - * - * Once we arrive here, the SR has been set to disable interrupts and the gcc scratch registers have been saved */ -int irq5_handler(void *arg1, void *arg2) +bool irq5_handler(void *arg1, void *arg2) { uint32_t pending_interrupts = FBEE_INTR_PENDING; + dbg("IRQ5!\r\n"); if (pending_interrupts & FBEE_INTR_PIC) { dbg("PIC interrupt\r\n"); @@ -312,13 +314,15 @@ int irq5_handler(void *arg1, void *arg2) if (pending_interrupts & FBEE_INTR_VSYNC || pending_interrupts & FBEE_INTR_HSYNC) { + dbg("vsync or hsync interrupt!\r\n"); + FBEE_INTR_CLEAR = FBEE_INTR_VSYNC | FBEE_INTR_HSYNC; /* hsync and vsync should go to TOS unhandled */ - return 1; + return false; } MCF_EPORT_EPFR |= (1 << 5); /* clear interrupt from edge port */ - return 0; + return true; } /* @@ -364,38 +368,41 @@ bool irq6_acsi_dma_interrupt(void) bool irq6_handler(uint32_t sf1, uint32_t sf2) { - bool handled = false; - - // err("IRQ6!\r\n"); - MCF_EPORT_EPFR |= (1 << 6); /* clear int6 from edge port */ + //err("IRQ6!\r\n"); if (FALCON_MFP_IPRA || FALCON_MFP_IPRB) { blink_led(); } - return handled; + MCF_EPORT_EPFR |= (1 << 6); /* clear int6 from edge port */ + + return false; /* always forward IRQ6 to TOS */ } #else /* MACHINE_FIREBEE */ -int irq5_handler(void *arg1, void *arg2) +bool irq5_handler(void *arg1, void *arg2) { - return 0; + MCF_EPORT_EPFR |= (1 << 5); /* clear int5 from edge port */ + + return true; } bool irq6_handler(void *arg1, void *arg2) { err("IRQ6!\r\n"); - return 0; + MCF_EPORT_EPFR |= (1 << 6); /* clear int6 from edge port */ + + return false; /* always forward IRQ6 to TOS */ } /* * This gets called from irq7 in exceptions.S * Once we arrive here, the SR has been set to disable interrupts and the gcc scratch registers have been saved */ -void irq7_handler(void) +bool irq7_handler(void) { int32_t handle; int32_t value = 0; @@ -411,6 +418,9 @@ void irq7_handler(void) dbg("interrupt not handled!\r\n"); } } + MCF_EPORT_EPFR |= (1 << 7); /* clear int7 from edge port */ + + return true; } #endif /* MACHINE_M548X */ @@ -429,12 +439,14 @@ void irq7_handler(void) * video RAM starting at 0x60000000) and copies SDRAM contents of that page to the video * RAM page. */ -void gpt0_interrupt_handler(void) +bool gpt0_interrupt_handler(void) { dbg("handler called\n\r"); MCF_GPT0_GMS &= ~1; /* rearm trigger */ NOP(); MCF_GPT0_GMS |= 1; + + return true; } #endif /* MACHINE_FIREBEE */ diff --git a/BaS_gcc/sys/mmu.c b/BaS_gcc/sys/mmu.c index acbe374..8a81214 100644 --- a/BaS_gcc/sys/mmu.c +++ b/BaS_gcc/sys/mmu.c @@ -91,7 +91,7 @@ inline uint32_t set_asid(uint32_t value) uint32_t ret = rt_asid; __asm__ __volatile__( - "movec %[value],ASID\n\t" + "movec %[value],ASID\n\t" : /* no output */ : [value] "r" (value) : @@ -113,7 +113,7 @@ inline uint32_t set_acr0(uint32_t value) uint32_t ret = rt_acr0; __asm__ __volatile__( - "movec %[value],ACR0\n\t" + "movec %[value],ACR0\n\t" : /* not output */ : [value] "r" (value) : @@ -133,7 +133,7 @@ inline uint32_t set_acr1(uint32_t value) uint32_t ret = rt_acr1; __asm__ __volatile__( - "movec %[value],ACR1\n\t" + "movec %[value],ACR1\n\t" : /* not output */ : [value] "r" (value) : @@ -154,7 +154,7 @@ inline uint32_t set_acr2(uint32_t value) uint32_t ret = rt_acr2; __asm__ __volatile__( - "movec %[value],ACR2\n\t" + "movec %[value],ACR2\n\t" : /* not output */ : [value] "r" (value) : @@ -174,7 +174,7 @@ inline uint32_t set_acr3(uint32_t value) uint32_t ret = rt_acr3; __asm__ __volatile__( - "movec %[value],ACR3\n\t" + "movec %[value],ACR3\n\t" : /* not output */ : [value] "r" (value) : @@ -190,7 +190,7 @@ inline uint32_t set_mmubar(uint32_t value) uint32_t ret = rt_mmubar; __asm__ __volatile__( - "movec %[value],MMUBAR\n\t" + "movec %[value],MMUBAR\n\t" : /* no output */ : [value] "r" (value) : /* no clobber */ @@ -311,22 +311,22 @@ int mmu_map_instruction_page(int32_t virt, uint8_t asid) MCF_MMU_MMUAR = (virt & size_mask); MCF_MMU_MMUTR = (virt & size_mask) | /* virtual address */ - MCF_MMU_MMUTR_ID(asid) | /* address space id (ASID) */ - (page->global ? MCF_MMU_MMUTR_SG : 0) | /* shared global */ - MCF_MMU_MMUTR_V; /* valid */ + MCF_MMU_MMUTR_ID(asid) | /* address space id (ASID) */ + (page->global ? MCF_MMU_MMUTR_SG : 0) | /* shared global */ + MCF_MMU_MMUTR_V; /* valid */ - MCF_MMU_MMUDR = (phys & size_mask) | /* physical address */ - MCF_MMU_MMUDR_SZ(DEFAULT_PAGE_SIZE) | /* page size */ + MCF_MMU_MMUDR = (phys & size_mask) | /* physical address */ + MCF_MMU_MMUDR_SZ(DEFAULT_PAGE_SIZE) | /* page size */ MCF_MMU_MMUDR_CM(page->cache_mode) | /* cache mode */ (page->supervisor_protect ? MCF_MMU_MMUDR_SP : 0) | /* supervisor protect */ - (page->read ? MCF_MMU_MMUDR_R : 0) | /* read access enable */ + (page->read ? MCF_MMU_MMUDR_R : 0) | /* read access enable */ (page->write ? MCF_MMU_MMUDR_W : 0) | /* write access enable */ (page->execute ? MCF_MMU_MMUDR_X : 0) | /* execute access enable */ (page->locked ? MCF_MMU_MMUDR_LK : 0); - MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | /* instruction */ - MCF_MMU_MMUOR_ACC | /* access TLB */ - MCF_MMU_MMUOR_UAA; /* update allocation address field */ + MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | /* instruction */ + MCF_MMU_MMUOR_ACC | /* access TLB */ + MCF_MMU_MMUOR_UAA; /* update allocation address field */ set_ipl(ipl); @@ -341,7 +341,7 @@ int mmu_map_data_page(int32_t virt, uint8_t asid) { uint16_t ipl; const uint32_t size_mask = ~ (DEFAULT_PAGE_SIZE - 1); /* pagesize */ - int page_index = (virt & size_mask) / DEFAULT_PAGE_SIZE; /* index into page_descriptor array */ + int page_index = (virt & size_mask) / DEFAULT_PAGE_SIZE; /* index into page_descriptor array */ struct page_descriptor *page = &pages[page_index]; /* attributes of page to map */ int32_t phys = lookup_phys(virt); /* virtual to physical translation of page */ @@ -365,21 +365,21 @@ int mmu_map_data_page(int32_t virt, uint8_t asid) ipl = set_ipl(7); /* do not disturb */ MCF_MMU_MMUTR = (virt & size_mask) | /* virtual address */ - MCF_MMU_MMUTR_ID(asid) | /* address space id (ASID) */ - (page->global ? MCF_MMU_MMUTR_SG : 0) | /* shared global */ - MCF_MMU_MMUTR_V; /* valid */ + MCF_MMU_MMUTR_ID(asid) | /* address space id (ASID) */ + (page->global ? MCF_MMU_MMUTR_SG : 0) | /* shared global */ + MCF_MMU_MMUTR_V; /* valid */ - MCF_MMU_MMUDR = (phys & size_mask) | /* physical address */ - MCF_MMU_MMUDR_SZ(DEFAULT_PAGE_SIZE) | /* page size */ + MCF_MMU_MMUDR = (phys & size_mask) | /* physical address */ + MCF_MMU_MMUDR_SZ(DEFAULT_PAGE_SIZE) | /* page size */ MCF_MMU_MMUDR_CM(page->cache_mode) | /* cache mode */ (page->supervisor_protect ? MCF_MMU_MMUDR_SP : 0) | /* supervisor protect */ - (page->read ? MCF_MMU_MMUDR_R : 0) | /* read access enable */ + (page->read ? MCF_MMU_MMUDR_R : 0) | /* read access enable */ (page->write ? MCF_MMU_MMUDR_W : 0) | /* write access enable */ (page->execute ? MCF_MMU_MMUDR_X : 0) | /* execute access enable */ (page->locked ? MCF_MMU_MMUDR_LK : 0); - MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */ - MCF_MMU_MMUOR_UAA; /* update allocation address field */ + MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */ + MCF_MMU_MMUOR_UAA; /* update allocation address field */ set_ipl(ipl); dbg("mapped virt=0x%08x to phys=0x%08x\r\n", virt & size_mask, phys & size_mask); @@ -433,26 +433,26 @@ int mmu_map_page(int32_t virt, int32_t phys, enum mmu_page_size sz, uint8_t page ipl = set_ipl(7); /* do not disturb */ - MCF_MMU_MMUTR = ((int) virt & size_mask) | /* virtual address */ + MCF_MMU_MMUTR = ((int) virt & size_mask) | /* virtual address */ MCF_MMU_MMUTR_ID(page_id) | /* address space id (ASID) */ - (flags->global ? MCF_MMU_MMUTR_SG : 0) | /* shared global */ - MCF_MMU_MMUTR_V; /* valid */ + (flags->global ? MCF_MMU_MMUTR_SG : 0) | /* shared global */ + MCF_MMU_MMUTR_V; /* valid */ - MCF_MMU_MMUDR = ((int) phys & size_mask) | /* physical address */ - MCF_MMU_MMUDR_SZ(sz) | /* page size */ + MCF_MMU_MMUDR = ((int) phys & size_mask) | /* physical address */ + MCF_MMU_MMUDR_SZ(sz) | /* page size */ MCF_MMU_MMUDR_CM(flags->cache_mode) | (flags->read ? MCF_MMU_MMUDR_R : 0) | /* read access enable */ (flags->write ? MCF_MMU_MMUDR_W : 0) | /* write access enable */ (flags->execute ? MCF_MMU_MMUDR_X : 0) | /* execute access enable */ (flags->locked ? MCF_MMU_MMUDR_LK : 0); - MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */ - MCF_MMU_MMUOR_UAA; /* update allocation address field */ + MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */ + MCF_MMU_MMUOR_UAA; /* update allocation address field */ NOP(); - MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | /* instruction */ - MCF_MMU_MMUOR_ACC | /* access TLB */ - MCF_MMU_MMUOR_UAA; /* update allocation address field */ + MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | /* instruction */ + MCF_MMU_MMUOR_ACC | /* access TLB */ + MCF_MMU_MMUOR_UAA; /* update allocation address field */ set_ipl(ipl); @@ -521,7 +521,7 @@ void mmu_init(void) pages[i].supervisor_protect = 0; pages[i].global = 1; } - pages[i].locked = 0; /* not locked */ + pages[i].locked = 0; /* not locked */ pages[0].supervisor_protect = 0; /* protect system vectors */ #elif defined(MACHINE_M5484LITE) @@ -564,7 +564,7 @@ void mmu_init(void) pages[i].supervisor_protect = 0; pages[i].global = 1; } - pages[i].locked = 0; /* not locked */ + pages[i].locked = 0; /* not locked */ pages[0].supervisor_protect = 0; /* protect system vectors */ #elif defined(MACHINE_M54455) @@ -607,33 +607,33 @@ void mmu_init(void) pages[i].supervisor_protect = 0; pages[i].global = 1; } - pages[i].locked = 0; /* not locked */ + pages[i].locked = 0; /* not locked */ pages[0].supervisor_protect = 0; /* protect system vectors */ #else #error Unknown machine! #endif /* MACHINE_FIREBEE */ } - set_asid(0); /* do not use address extension (ASID provides virtual 48 bit addresses */ + set_asid(0); /* do not use address extension (ASID provides virtual 48 bit addresses */ /* set data access attributes in ACR0 and ACR1 */ /* map PCI address space */ - set_acr0(ACR_W(0) | /* read and write accesses permitted */ - ACR_SP(1) | /* supervisor and user mode access permitted */ - ACR_CM(ACR_CM_CACHE_INH_PRECISE) | /* cache inhibit, precise */ - ACR_AMM(0) | /* control region > 16 MB */ - ACR_S(ACR_S_SUPERVISOR_MODE) | /* match addresses in supervisor mode only */ - ACR_E(1) | /* enable ACR */ + set_acr0(ACR_W(0) | /* read and write accesses permitted */ + ACR_SP(1) | /* supervisor and user mode access permitted */ + ACR_CM(ACR_CM_CACHE_INH_PRECISE) | /* cache inhibit, precise */ + ACR_AMM(0) | /* control region > 16 MB */ + ACR_S(ACR_S_SUPERVISOR_MODE) | /* match addresses in supervisor mode only */ + ACR_E(1) | /* enable ACR */ #if defined(MACHINE_FIREBEE) - ACR_ADMSK(0x7f) | /* cover 2GB area from 0x80000000 to 0xffffffff */ - ACR_BA(0x80000000)); /* (equals area from 3 to 4 GB */ + ACR_ADMSK(0x7f) | /* cover 2GB area from 0x80000000 to 0xffffffff */ + ACR_BA(0x80000000)); /* (equals area from 3 to 4 GB */ #elif defined(MACHINE_M5484LITE) - ACR_ADMSK(0x7f) | /* cover 2 GB area from 0x80000000 to 0xffffffff */ + ACR_ADMSK(0x7f) | /* cover 2 GB area from 0x80000000 to 0xffffffff */ ACR_BA(0x80000000)); #elif defined(MACHINE_M54455) ACR_ADMSK(0x7f) | - ACR_BA(0x80000000)); /* FIXME: not determined yet */ + ACR_BA(0x80000000)); /* FIXME: not determined yet */ #else #error unknown machine! #endif /* MACHINE_FIREBEE */ @@ -680,7 +680,7 @@ void mmu_init(void) set_acr3(0x0); - set_mmubar(MMUBAR + 1); /* set and enable MMUBAR */ + set_mmubar(MMUBAR + 1); /* set and enable MMUBAR */ /* create locked TLB entries */