fix a problem where nested interrupts caused networking to hang
This commit is contained in:
Markus Fröschle
@@ -140,7 +140,7 @@
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* mask an jump through the corresponging vector
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* mask an jump through the corresponging vector
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*/
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*/
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.macro irq vector,int_mask,clr_int
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.macro irq vector,int_mask,clr_int
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move.w #0x2700,sr // disable interrupt
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move.w #0x2700,sr // disable interrupts
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subq.l #8,sp
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subq.l #8,sp
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movem.l d0/a5,(sp) // save registers
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movem.l d0/a5,(sp) // save registers
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@@ -260,19 +260,19 @@ init_vec_loop:
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vector_table_start:
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vector_table_start:
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std_exc_vec:
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std_exc_vec:
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_std_exc_vec:
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_std_exc_vec:
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//move.w #0x2700,sr // disable interrupt
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move.w #0x2700,sr // disable interrupt
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subq.l #8,sp
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subq.l #8,sp
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movem.l d0/a5,(sp) // save registers
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movem.l d0/a5,(sp) // save registers
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move.w 8(sp),d0 // fetch vector
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move.w 8(sp),d0 // fetch vector
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and.l #0x3fc,d0 // mask out vector number
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and.l #0x3fc,d0 // mask out vector number
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//#define DBG_EXC
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//#define DBG_EXC
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#ifdef DBG_EXC
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#ifdef DBG_EXC
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// printout vector number of exception
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// printout vector number of exception
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lea -4 * 4(sp),sp // reserve stack space
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lea -4 * 4(sp),sp // reserve stack space
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movem.l d0-d1/a0-a1,(sp) // save gcc scratch registers
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movem.l d0-d1/a0-a1,(sp) // save gcc scratch registers
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lsr.l #2,d0 // shift vector number in place
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lsr.l #2,d0 // shift vector number in place
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cmp.l #33,d0
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cmp.l #33,d0
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beq noprint
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beq noprint
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cmp.l #34,d0
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cmp.l #34,d0
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@@ -281,30 +281,29 @@ _std_exc_vec:
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beq noprint
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beq noprint
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cmp.l #46,d0
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cmp.l #46,d0
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beq noprint
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beq noprint
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move.l 4 * 4 + 8 + 4(sp),-(sp) // pc at exception
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move.l 4 * 4 + 8 + 4(sp),-(sp) // pc at exception
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move.l d0,-(sp) // provide it to xprintf()
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move.l d0,-(sp) // provide it to xprintf()
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pea exception_text
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pea exception_text
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jsr _xprintf // call xprintf()
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jsr _xprintf // call xprintf()
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add.l #3*4,sp // adjust stack
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add.l #3*4,sp // adjust stack
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noprint:
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noprint:
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movem.l (sp),d0-d1/a0-a1 // restore registers
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movem.l (sp),d0-d1/a0-a1 // restore registers
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lea 4 * 4(sp),sp
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lea 4 * 4(sp),sp
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#endif /* DBG_EXC */
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#endif /* DBG_EXC */
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add.l _rt_vbr,d0 // + VBR
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add.l _rt_vbr,d0 // + VBR
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move.l d0,a5
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move.l d0,a5
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move.l (a5),d0 // fetch exception routine address
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move.l (a5),d0 // fetch exception routine address
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move.l 4(sp),a5 // restore a5
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move.l 4(sp),a5 // restore a5
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move.l d0,4(sp) // store exception routine address
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move.l d0,4(sp) // store exception routine address
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// FIXME: not clear why we would need the following?
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move.w 10(sp),d0 // restore original SR (irq mask)
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//move.w 10(sp),d0 // restore original SR
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bset #13,d0 // set supervisor bit
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//bset #13,d0 // set supervisor bit
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move.w d0,sr //
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//move.w d0,sr //
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move.l (sp)+,d0 // restore d0
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move.l (sp)+,d0 // restore d0
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rts // jump to exception handler
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rts // jump to exception handler
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exception_text:
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exception_text:
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.ascii "DEBUG: EXCEPTION %d caught at %p"
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.ascii "DEBUG: EXCEPTION %d caught at %p"
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@@ -312,62 +311,62 @@ exception_text:
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.align 4
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.align 4
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reset_vector:
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reset_vector:
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move.w #0x2700,sr // disable interrupts
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move.w #0x2700,sr // disable interrupts
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move.l #0x31415926,d0
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move.l #0x31415926,d0
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cmp.l 0x426,d0 // _resvalid: reset vector valid?
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cmp.l 0x426,d0 // _resvalid: reset vector valid?
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beq std_exc_vec // yes->
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beq std_exc_vec // yes->
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jmp _rom_entry // no, cold start machine
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jmp _rom_entry // no, cold start machine
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access:
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access:
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move.w #0x2700,sr // disable interrupts
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move.w #0x2700,sr // disable interrupts
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link a6,#-4 * 4 // make room for gcc scratch registers
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link a6,#-4 * 4 // make room for gcc scratch registers
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movem.l d0-d1/a0-a1,(sp) // save them
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movem.l d0-d1/a0-a1,(sp) // save them
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move.l 4(a6),-(sp) // push format_status
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move.l 4(a6),-(sp) // push format_status
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move.l 8(a6),-(sp) // pc at exception
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move.l 8(a6),-(sp) // pc at exception
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move.l MCF_MMU_MMUAR,-(sp) // MMU fault address
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move.l MCF_MMU_MMUAR,-(sp) // MMU fault address
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move.l MCF_MMU_MMUSR,-(sp) // MMU status regisrter
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move.l MCF_MMU_MMUSR,-(sp) // MMU status regisrter
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move.w #0x2300,sr // can lower interrupt mask now that MMU status is safe
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move.w #0x2300,sr // can lower interrupt mask now that MMU status is safe
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jsr _mmutr_miss // call C routine
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jsr _mmutr_miss // call C routine
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lea 4 * 4(sp),sp // adjust stack
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lea 4 * 4(sp),sp // adjust stack
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tst.l d0 // exception handler signals bus error
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tst.l d0 // exception handler signals bus error
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bne bus_error
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bne bus_error
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movem.l (sp),d0-d1/a0-a1 // restore registers
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movem.l (sp),d0-d1/a0-a1 // restore registers
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unlk a6
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unlk a6
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rte
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rte
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bus_error:
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bus_error:
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movem.l (sp),d0-d1/a0-a1 // restore registers
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movem.l (sp),d0-d1/a0-a1 // restore registers
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unlk a6
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unlk a6
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bra std_exc_vec // FIXME: this seems to be bogous...
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bra std_exc_vec // FIXME: this seems to be bogous...
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zero_divide:
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zero_divide:
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move.w #0x2700,sr // disable interrupt
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move.w #0x2700,sr // disable interrupt
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move.l a0,-(sp)
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move.l a0,-(sp)
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move.l d0,-(sp)
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move.l d0,-(sp)
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move.l 12(sp),a0 // pc
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move.l 12(sp),a0 // pc
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move.w (a0)+,d0 // command word
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move.w (a0)+,d0 // command word
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btst #7,d0 // long?
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btst #7,d0 // long?
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beq zd_word // nein->
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beq zd_word // no->
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addq.l #2,a0
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addq.l #2,a0
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zd_word:
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zd_word:
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and.l 0x3f,d0 // mask out ea field
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and.l 0x3f,d0 // mask out ea field
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cmp.w #0x08,d0 // -(ax) or less?
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cmp.w #0x08,d0 // -(ax) or less?
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ble zd_end
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ble zd_end
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addq.l #2,a0
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addq.l #2,a0
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cmp.w #0x39,d0 // xxx.L
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cmp.w #0x39,d0 // xxx.L
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bne zd_nal
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bne zd_nal
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addq.l #2,a0
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addq.l #2,a0
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bra zd_end
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bra zd_end
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zd_nal: cmp.w #0x3c,d0 // immediate?
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zd_nal: cmp.w #0x3c,d0 // immediate?
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bne zd_end // no->
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bne zd_end // no->
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btst #7,d0 // long?
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btst #7,d0 // long?
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beq zd_end // no
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beq zd_end // no
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addq.l #2,a0
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addq.l #2,a0
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zd_end:
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zd_end:
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move.l a0,12(sp)
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move.l a0,12(sp)
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@@ -377,172 +376,172 @@ zd_end:
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#ifdef _NOT_USED_
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#ifdef _NOT_USED_
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linea:
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linea:
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move.w #0x2700,sr // disable interrupt
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move.w #0x2700,sr // disable interrupt
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halt
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halt
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nop
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nop
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nop
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nop
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linef:
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linef:
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move.w #0x2700,sr // disable interrupt
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move.w #0x2700,sr // disable interrupt
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halt
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halt
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nop
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nop
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nop
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nop
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format:
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format:
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move.w #0x2700,sr // disable interrupt
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move.w #0x2700,sr // disable interrupt
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halt
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halt
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nop
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nop
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nop
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nop
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//floating point
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//floating point
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flpoow:
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flpoow:
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move.w #0x2700,sr // disable interrupt
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move.w #0x2700,sr // disable interrupt
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halt
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halt
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nop
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nop
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nop
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nop
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#endif /* _NOT_USED */
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#endif /* _NOT_USED */
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irq1: irq 0x64, 1, 0x02 // Level 1 autovector interrupt (unused)
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irq1: irq 0x64, 1, 0x02 // Level 1 autovector interrupt (unused)
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irq2: irq 0x68, 2, 0x04 // Level 2 autovector interrupt (horizontal blank)
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irq2: irq 0x68, 2, 0x04 // Level 2 autovector interrupt (horizontal blank)
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irq3: irq 0x6c, 3, 0x08 // Level 3 autovector interrupt (unused)
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irq3: irq 0x6c, 3, 0x08 // Level 3 autovector interrupt (unused)
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irq4: irq 0x70, 4, 0x10 // Level 4 autovector interrupt (vertical blank)
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irq4: irq 0x70, 4, 0x10 // Level 4 autovector interrupt (vertical blank)
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#if defined(MACHINE_FIREBEE) /* these handlers are only meaningful for the Firebee */
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#if defined(MACHINE_FIREBEE) /* these handlers are only meaningful for the Firebee */
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irq5: //move.w #0x2700,sr // disable interrupts
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irq5: //move.w #0x2700,sr // disable interrupts
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subq.l #4,sp // extra space
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subq.l #4,sp // extra space
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link a6,#-4 * 4 // save gcc scratch registers
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link a6,#-4 * 4 // save gcc scratch registers
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movem.l d0-d1/a0-a1,(sp)
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movem.l d0-d1/a0-a1,(sp)
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jsr _irq5_handler // call C handler routine
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jsr _irq5_handler // call C handler routine
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tst.b d0 // handled?
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tst.b d0 // handled?
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beq irq5_forward
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beq irq5_forward
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movem.l (sp),d0-d1/a0-a1 // restore registers
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movem.l (sp),d0-d1/a0-a1 // restore registers
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unlk a6
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unlk a6
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addq.l #4,sp
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addq.l #4,sp
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rte // return from exception
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rte // return from exception
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irq5_forward: move.l 0x74,a0 // fetch OS irq5 vector
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irq5_forward: move.l 0x74,a0 // fetch OS irq5 vector
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add.l _rt_vbr,a0 // add runtime vbr
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add.l _rt_vbr,a0 // add runtime vbr
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move.l a0,4(a6) // put on stack
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move.l a0,4(a6) // put on stack
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movem.l (sp),d0-d1/a0-a1 // restore registers
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movem.l (sp),d0-d1/a0-a1 // restore registers
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unlk a6 //
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unlk a6 //
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move.w #0x2500,sr // set interrupt level
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move.w #0x2500,sr // set interrupt level
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rts // jump through vector
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rts // jump through vector
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/*
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/*
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* irq6 needs special treatment since - because the Coldfire only supports autovector interrupts
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* irq6 needs special treatment since - because the Coldfire only supports autovector interrupts
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* - the exception vector is provided by the simulated MFP from the FPGA
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* - the exception vector is provided by the simulated MFP from the FPGA
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*/
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*/
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irq6: //move.w #0x2700,sr // disable interrupt
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irq6: move.w #0x2700,sr // disable interrupt
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subq.l #4,sp // extra space
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subq.l #4,sp // extra space
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link a6,#-4 * 4 // save gcc scratch registers
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link a6,#-4 * 4 // save gcc scratch registers
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movem.l d0-d1/a0-a1,(sp)
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movem.l d0-d1/a0-a1,(sp)
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move.l 8(a6),-(sp) // format status word
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move.l 8(a6),-(sp) // format status word
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move.l 12(a6),-(sp) // pc at exception
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move.l 12(a6),-(sp) // pc at exception
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jsr _irq6_handler // call C handler
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jsr _irq6_handler // call C handler
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lea 8(sp),sp // fix stack
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lea 8(sp),sp // fix stack
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tst.b d0 // interrupt handled?
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tst.b d0 // interrupt handled?
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beq irq6_forward // no, forward to TOS
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beq irq6_forward // no, forward to TOS
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movem.l (sp),d0-d1/a0-a1 // restore registers
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movem.l (sp),d0-d1/a0-a1 // restore registers
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unlk a6
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unlk a6
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addq.l #4,sp // "extra space" not needed in this case
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addq.l #4,sp // "extra space" not needed in this case
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rte
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rte
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irq6_forward:
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irq6_forward:
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move.l 0xf0020000,a0 // fetch "MFP interrupt vector" from FPGA
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move.l 0xf0020000,a0 // fetch "MFP interrupt vector" from FPGA
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add.l _rt_vbr,a0 // add runtime VBR
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add.l _rt_vbr,a0 // add runtime VBR
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move.l (a0),4(a6) // fetch handler address and put it on "extra space"
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move.l (a0),4(a6) // fetch handler address and put it on "extra space"
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movem.l (sp),d0-d1/a0-a1
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movem.l (sp),d0-d1/a0-a1
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unlk a6
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unlk a6
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move.w #0x2600,sr // set interrupt mask to MFP level
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move.w #0x2600,sr // set interrupt mask to MFP level
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rts // jump through vector
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rts // jump through vector
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/*
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/*
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* irq 7 = pseudo bus error
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* irq 7 = pseudo bus error
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*/
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*/
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irq7:
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irq7:
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lea -12(sp),sp
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lea -12(sp),sp
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movem.l d0/a0,(sp)
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movem.l d0/a0,(sp)
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move.l __RAMBAR0+0x008,a0 // real access error handler
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move.l __RAMBAR0+0x008,a0 // real access error handler
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move.l a0,8(sp) // this will be the return address for rts
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move.l a0,8(sp) // this will be the return address for rts
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move.w 12(sp),d0 // format/vector word
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move.w 12(sp),d0 // format/vector word
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andi.l #0xf000,d0 // keep only the format
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andi.l #0xf000,d0 // keep only the format
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ori.l #2*4,d0 // simulate vector #2, no fault
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ori.l #2*4,d0 // simulate vector #2, no fault
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move.w d0,12(sp)
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move.w d0,12(sp)
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// TODO: Inside an interrupt handler, 16(sp) is the return address.
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// TODO: Inside an interrupt handler, 16(sp) is the return address.
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// For an Access Error, it should be the address of the fault instruction instead
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// For an Access Error, it should be the address of the fault instruction instead
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lea MCF_EPORT_EPFR,a0
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lea MCF_EPORT_EPFR,a0
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bset #7,(a0) // clear int 7
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bset #7,(a0) // clear int 7
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move.l (sp)+,d0 // restore registers
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move.l (sp)+,d0 // restore registers
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move.l (sp)+,a0
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move.l (sp)+,a0
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rts // Forward to the Access Error handler
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rts // Forward to the Access Error handler
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#else // handlers for M5484LITE
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#else // handlers for M5484LITE
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irq5: //move.w #0x2700,sr // disable interrupts
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irq5: move.w #0x2700,sr // disable interrupts
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subq.l #4,sp // extra space
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subq.l #4,sp // extra space
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link a6,#-4 * 4 // save gcc scratch registers
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link a6,#-4 * 4 // save gcc scratch registers
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movem.l d0-d1/a0-a1,(sp)
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movem.l d0-d1/a0-a1,(sp)
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jsr _irq5_handler // call C handler routine
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jsr _irq5_handler // call C handler routine
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tst.b d0 // handled?
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tst.b d0 // handled?
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beq irq5_forward
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beq irq5_forward
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movem.l (sp),d0-d1/a0-a1 // restore registers
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movem.l (sp),d0-d1/a0-a1 // restore registers
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unlk a6
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unlk a6
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addq.l #4,sp
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addq.l #4,sp
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|
||||||
rte // return from exception
|
rte // return from exception
|
||||||
|
|
||||||
irq5_forward: move.l 0x74,a0 // fetch OS irq5 vector
|
irq5_forward: move.l 0x74,a0 // fetch OS irq5 vector
|
||||||
add.l _rt_vbr,a0 // add runtime vbr
|
add.l _rt_vbr,a0 // add runtime vbr
|
||||||
move.l a0,4(a6) // put on stack
|
move.l a0,4(a6) // put on stack
|
||||||
|
|
||||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||||
unlk a6 //
|
unlk a6 //
|
||||||
move.w #0x2500,sr // set interrupt level
|
move.w #0x2500,sr // set interrupt level
|
||||||
rts // jump through vector
|
rts // jump through vector
|
||||||
|
|
||||||
irq6:
|
irq6:
|
||||||
irq 0x74,5,0x20
|
irq 0x74,5,0x20
|
||||||
|
|
||||||
irq7: // irq7 is tied to PCI INTA# and PCI INTB# on the M5484LITE
|
irq7: // irq7 is tied to PCI INTA# and PCI INTB# on the M5484LITE
|
||||||
|
|
||||||
//move.w #0x2700,sr // disable interrupts
|
move.w #0x2700,sr // disable interrupts
|
||||||
|
|
||||||
lea -4*4(sp),sp // save gcc scratch registers
|
lea -4*4(sp),sp // save gcc scratch registers
|
||||||
movem.l d0-d1/a0-a1,(sp)
|
movem.l d0-d1/a0-a1,(sp)
|
||||||
|
|
||||||
jsr _irq7_handler // call C handler routine
|
jsr _irq7_handler // call C handler routine
|
||||||
|
|
||||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||||
lea 4*4(sp),sp
|
lea 4 * 4(sp),sp
|
||||||
|
|
||||||
rte // return from exception
|
rte // return from exception
|
||||||
|
|
||||||
irq7text:
|
irq7text:
|
||||||
.data
|
.data
|
||||||
.ascii "IRQ7!"
|
.ascii "IRQ7!"
|
||||||
.dc.b 13,10,0
|
.dc.b 13,10,0
|
||||||
.text
|
.text
|
||||||
#endif /* MACHINE_FIREBEE */
|
#endif /* MACHINE_FIREBEE */
|
||||||
|
|
||||||
@@ -568,33 +567,33 @@ irq7text:
|
|||||||
* (sp) -> gcc scratch registers save area
|
* (sp) -> gcc scratch registers save area
|
||||||
*/
|
*/
|
||||||
_lowlevel_isr_handler:
|
_lowlevel_isr_handler:
|
||||||
subq.l #4,sp // extra space
|
subq.l #4,sp // extra space
|
||||||
link a6,#-4 * 4 // make room for
|
link a6,#-4 * 4 // make room for
|
||||||
movem.l d0-d1/a0-a1,(sp) // gcc scratch registers and save them,
|
movem.l d0-d1/a0-a1,(sp) // gcc scratch registers and save them,
|
||||||
// other registers will be taken care of by gcc itself
|
// other registers will be taken care of by gcc itself
|
||||||
|
|
||||||
move.w 8(a6),d0 // fetch vector number from stack
|
move.w 8(a6),d0 // fetch vector number from stack
|
||||||
lsr.l #2,d0 // move it in place
|
lsr.l #2,d0 // move it in place
|
||||||
andi.l #0xff,d0 // mask it out
|
andi.l #0xff,d0 // mask it out
|
||||||
move.l d0,-(sp) // push it
|
move.l d0,-(sp) // push it
|
||||||
jsr _isr_execute_handler // call the C handler
|
jsr _isr_execute_handler // call the C handler
|
||||||
addq.l #4,sp // adjust stack
|
addq.l #4,sp // adjust stack
|
||||||
tst.b d0 // handled?
|
tst.b d0 // handled?
|
||||||
beq lowlevel_forward // no, forward it to TOS
|
beq lowlevel_forward // no, forward it to TOS
|
||||||
|
|
||||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||||
unlk a6
|
unlk a6
|
||||||
addq.l #4,sp // eliminate extra space
|
addq.l #4,sp // eliminate extra space
|
||||||
|
|
||||||
rte
|
rte
|
||||||
|
|
||||||
lowlevel_forward:
|
lowlevel_forward:
|
||||||
move.l 8(a6),d0 // fetch OS irq vector
|
move.l 8(a6),d0 // fetch OS irq vector
|
||||||
lsr.l #2,d0 // move it in place
|
lsr.l #2,d0 // move it in place
|
||||||
andi.l #0xff,d0 // mask out vector number
|
andi.l #0xff,d0 // mask out vector number
|
||||||
add.l _rt_vbr,d0 // add runtime vbr
|
add.l _rt_vbr,d0 // add runtime vbr
|
||||||
move.l d0,4(a6) // put on stack as return address
|
move.l d0,4(a6) // put on stack as return address
|
||||||
|
|
||||||
movem.l (sp),d0-d1/a0-a1 // restore registers
|
movem.l (sp),d0-d1/a0-a1 // restore registers
|
||||||
unlk a6 //
|
unlk a6 //
|
||||||
rts // jump through vector
|
rts // jump through vector
|
||||||
|
|||||||
Reference in New Issue
Block a user