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fix a problem where nested interrupts caused networking to hang

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This commit is contained in:
Markus Fröschle
2015-10-11 05:52:58 +00:00
parent a6cd8d2912
commit ea0e9c1ec0
1 changed files with 161 additions and 162 deletions
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19
BaS_gcc/sys/exceptions.S
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@@ -140,7 +140,7 @@
* mask an jump through the corresponging vector * mask an jump through the corresponging vector
*/ */
.macro irq vector,int_mask,clr_int .macro irq vector,int_mask,clr_int
move.w #0x2700,sr // disable interrupt move.w #0x2700,sr // disable interrupts
subq.l #8,sp subq.l #8,sp
movem.l d0/a5,(sp) // save registers movem.l d0/a5,(sp) // save registers
@@ -260,7 +260,7 @@ init_vec_loop:
vector_table_start: vector_table_start:
std_exc_vec: std_exc_vec:
_std_exc_vec: _std_exc_vec:
//move.w #0x2700,sr // disable interrupt move.w #0x2700,sr // disable interrupt
subq.l #8,sp subq.l #8,sp
movem.l d0/a5,(sp) // save registers movem.l d0/a5,(sp) // save registers
move.w 8(sp),d0 // fetch vector move.w 8(sp),d0 // fetch vector
@@ -299,10 +299,9 @@ noprint:
move.l 4(sp),a5 // restore a5 move.l 4(sp),a5 // restore a5
move.l d0,4(sp) // store exception routine address move.l d0,4(sp) // store exception routine address
// FIXME: not clear why we would need the following? move.w 10(sp),d0 // restore original SR (irq mask)
//move.w 10(sp),d0 // restore original SR bset #13,d0 // set supervisor bit
//bset #13,d0 // set supervisor bit move.w d0,sr //
//move.w d0,sr //
move.l (sp)+,d0 // restore d0 move.l (sp)+,d0 // restore d0
rts // jump to exception handler rts // jump to exception handler
@@ -351,7 +350,7 @@ zero_divide:
move.l 12(sp),a0 // pc move.l 12(sp),a0 // pc
move.w (a0)+,d0 // command word move.w (a0)+,d0 // command word
btst #7,d0 // long? btst #7,d0 // long?
beq zd_word // nein-> beq zd_word // no->
addq.l #2,a0 addq.l #2,a0
zd_word: zd_word:
@@ -439,7 +438,7 @@ irq5_forward: move.l 0x74,a0 // fetch OS irq5 vector
* irq6 needs special treatment since - because the Coldfire only supports autovector interrupts * irq6 needs special treatment since - because the Coldfire only supports autovector interrupts
* - the exception vector is provided by the simulated MFP from the FPGA * - the exception vector is provided by the simulated MFP from the FPGA
*/ */
irq6: //move.w #0x2700,sr // disable interrupt irq6: move.w #0x2700,sr // disable interrupt
subq.l #4,sp // extra space subq.l #4,sp // extra space
link a6,#-4 * 4 // save gcc scratch registers link a6,#-4 * 4 // save gcc scratch registers
@@ -496,7 +495,7 @@ irq7:
#else // handlers for M5484LITE #else // handlers for M5484LITE
irq5: //move.w #0x2700,sr // disable interrupts irq5: move.w #0x2700,sr // disable interrupts
subq.l #4,sp // extra space subq.l #4,sp // extra space
link a6,#-4 * 4 // save gcc scratch registers link a6,#-4 * 4 // save gcc scratch registers
@@ -527,7 +526,7 @@ irq6:
irq7: // irq7 is tied to PCI INTA# and PCI INTB# on the M5484LITE irq7: // irq7 is tied to PCI INTA# and PCI INTB# on the M5484LITE
//move.w #0x2700,sr // disable interrupts move.w #0x2700,sr // disable interrupts
lea -4*4(sp),sp // save gcc scratch registers lea -4*4(sp),sp // save gcc scratch registers
movem.l d0-d1/a0-a1,(sp) movem.l d0-d1/a0-a1,(sp)