diff --git a/BaS_gcc.config b/BaS_gcc.config deleted file mode 100644 index 8cec188..0000000 --- a/BaS_gcc.config +++ /dev/null @@ -1 +0,0 @@ -// ADD PREDEFINED MACROS HERE! diff --git a/BaS_gcc.creator b/BaS_gcc.creator deleted file mode 100644 index e94cbbd..0000000 --- a/BaS_gcc.creator +++ /dev/null @@ -1 +0,0 @@ -[General] diff --git a/BaS_gcc.files b/BaS_gcc.files deleted file mode 100644 index 4608d31..0000000 --- a/BaS_gcc.files +++ /dev/null @@ -1,200 +0,0 @@ -dma/dma.c -dma/MCD_dmaApi.c -dma/MCD_tasks.c -dma/MCD_tasksInit.c -exe/basflash.c -exe/basflash_start.c -flash/flash.c -flash/s19reader.c -fs/cc932.c -fs/cc936.c -fs/cc949.c -fs/cc950.c -fs/ccsbcs.c -fs/ff.c -fs/unicode.c -if/driver_vec.c -include/acia.h -include/am79c874.h -include/arp.h -include/ati_ids.h -include/bas_printf.h -include/bas_string.h -include/bas_types.h -include/bas_utils.h -include/bcm5222.h -include/bootp.h -include/cache.h -include/diskio.h -include/dma.h -include/driver_mem.h -include/driver_vec.h -include/edid.h -include/ehci.h -include/eth.h -include/exceptions.h -include/fb.h -include/fec.h -include/fecbd.h -include/ff.h -include/ffconf.h -include/firebee.h -include/font.h -include/i2c-algo-bit.h -include/i2c.h -include/icmp.h -include/ikbd.h -include/interrupts.h -include/ip.h -include/m54455.h -include/m5484l.h -include/MCD_dma.h -include/mcd_initiators.h -include/MCD_progCheck.h -include/MCD_tasksInit.h -include/MCF5475.h -include/MCF5475_CLOCK.h -include/MCF5475_CTM.h -include/MCF5475_DMA.h -include/MCF5475_DSPI.h -include/MCF5475_EPORT.h -include/MCF5475_FBCS.h -include/MCF5475_FEC.h -include/MCF5475_GPIO.h -include/MCF5475_GPT.h -include/MCF5475_I2C.h -include/MCF5475_INTC.h -include/MCF5475_MMU.h -include/MCF5475_PAD.h -include/MCF5475_PCI.h -include/MCF5475_PCIARB.h -include/MCF5475_PSC.h -include/MCF5475_SDRAMC.h -include/MCF5475_SEC.h -include/MCF5475_SIU.h -include/MCF5475_SLT.h -include/MCF5475_SRAM.h -include/MCF5475_USB.h -include/MCF5475_XLB.h -include/mmu.h -include/mod_devicetable.h -include/nbuf.h -include/net.h -include/net_timer.h -include/nif.h -include/ohci.h -include/part.h -include/pci.h -include/pci_ids.h -include/queue.h -include/radeon_reg.h -include/radeonfb.h -include/s19reader.h -include/screen.h -include/sd_card.h -include/startcf.h -include/sysinit.h -include/tftp.h -include/udp.h -include/usb.h -include/usb_defs.h -include/usb_hub.h -include/user_io.h -include/util.h -include/version.h -include/videl.h -include/video.h -include/wait.h -include/x86debug.h -include/x86decode.h -include/x86emu.h -include/x86emui.h -include/x86fpu.h -include/x86fpu_regs.h -include/x86ops.h -include/x86pcibios.h -include/x86prim_asm.h -include/x86prim_ops.h -include/x86regs.h -include/xhdi_sd.h -kbd/ikbd.c -net/am79c874.c -net/arp.c -net/bcm5222.c -net/bootp.c -net/fec.c -net/fecbd.c -net/ip.c -net/nbuf.c -net/net_timer.c -net/nif.c -net/queue.c -net/tftp.c -net/udp.c -nutil/s19header.c -pci/ehci-hcd.c -pci/ohci-hcd.c -pci/pci.c -radeon/radeon_accel.c -radeon/radeon_base.c -radeon/radeon_cursor.c -radeon/radeon_monitor.c -spi/dspi.c -spi/mmc.c -spi/sd_card.c -sys/BaS.c -sys/cache.c -sys/driver_mem.c -sys/fault_vectors.c -sys/init_fpga.c -sys/interrupts.c -sys/mmu.c -sys/sysinit.c -tos/bascook/sources/bascook.c -tos/jtagwait/include/bas_printf.h -tos/jtagwait/include/bas_string.h -tos/jtagwait/include/driver_vec.h -tos/jtagwait/include/MCF5475.h -tos/jtagwait/include/MCF5475_CLOCK.h -tos/jtagwait/include/MCF5475_CTM.h -tos/jtagwait/include/MCF5475_DMA.h -tos/jtagwait/include/MCF5475_DSPI.h -tos/jtagwait/include/MCF5475_EPORT.h -tos/jtagwait/include/MCF5475_FBCS.h -tos/jtagwait/include/MCF5475_FEC.h -tos/jtagwait/include/MCF5475_GPIO.h -tos/jtagwait/include/MCF5475_GPT.h -tos/jtagwait/include/MCF5475_I2C.h -tos/jtagwait/include/MCF5475_INTC.h -tos/jtagwait/include/MCF5475_MMU.h -tos/jtagwait/include/MCF5475_PAD.h -tos/jtagwait/include/MCF5475_PCI.h -tos/jtagwait/include/MCF5475_PCIARB.h -tos/jtagwait/include/MCF5475_PSC.h -tos/jtagwait/include/MCF5475_SDRAMC.h -tos/jtagwait/include/MCF5475_SEC.h -tos/jtagwait/include/MCF5475_SIU.h -tos/jtagwait/include/MCF5475_SLT.h -tos/jtagwait/include/MCF5475_SRAM.h -tos/jtagwait/include/MCF5475_USB.h -tos/jtagwait/include/MCF5475_XLB.h -tos/jtagwait/sources/jtagwait.c -usb/usb.c -usb/usb_hub.c -usb/usb_kbd.c -tos/jtagwait/sources/bas_printf.c -tos/jtagwait/sources/bas_string.c -tos/vmem_test/Makefile -tos/vmem_test/sources/bas_printf.c -tos/vmem_test/sources/bas_string.c -tos/vmem_test/sources/printf_helper.S -tos/vmem_test/sources/vmem_test.c -sys/startcf.S -sys/exceptions.S -util/bas_printf.c -util/bas_string.c -util/printf_helper.S -util/wait.c -bas.lk.in -i2c/i2c.c -Makefile diff --git a/BaS_gcc.includes b/BaS_gcc.includes deleted file mode 100644 index 18d6f74..0000000 --- a/BaS_gcc.includes +++ /dev/null @@ -1,2 +0,0 @@ -include -tos/jtagwait/include \ No newline at end of file diff --git a/COPYING b/COPYING deleted file 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If the Library as you -received it does not specify a version number of the GNU Lesser -General Public License, you may choose any version of the GNU Lesser -General Public License ever published by the Free Software Foundation. - - If the Library as you received it specifies that a proxy can decide -whether future versions of the GNU Lesser General Public License shall -apply, that proxy's public statement of acceptance of any version is -permanent authorization for you to choose that version for the -Library. diff --git a/Doxyfile b/Doxyfile deleted file mode 100644 index becdfa4..0000000 --- a/Doxyfile +++ /dev/null @@ -1,1689 +0,0 @@ -# Doxyfile 1.7.2 - -# This file describes the settings to be used by the documentation system -# doxygen (www.doxygen.org) for a project -# -# All text after a hash (#) is considered a comment and will be ignored -# The format is: -# TAG = value [value, ...] -# For lists items can also be appended using: -# TAG += value [value, ...] -# Values that contain spaces should be placed between quotes (" ") - -#--------------------------------------------------------------------------- -# Project related configuration options -#--------------------------------------------------------------------------- - -# This tag specifies the encoding used for all characters in the config file -# that follow. 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An alias has the form "name=value". -# For example adding "sideeffect=\par Side Effects:\n" will allow you to -# put the command \sideeffect (or @sideeffect) in the documentation, which -# will result in a user-defined paragraph with heading "Side Effects:". -# You can put \n's in the value part of an alias to insert newlines. - -ALIASES = - -# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C -# sources only. Doxygen will then generate output that is more tailored for C. -# For instance, some of the names that are used will be different. The list -# of all members will be omitted, etc. - -OPTIMIZE_OUTPUT_FOR_C = YES - -# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java -# sources only. Doxygen will then generate output that is more tailored for -# Java. For instance, namespaces will be presented as packages, qualified -# scopes will look different, etc. - -OPTIMIZE_OUTPUT_JAVA = NO - -# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran -# sources only. Doxygen will then generate output that is more tailored for -# Fortran. - -OPTIMIZE_FOR_FORTRAN = NO - -# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL -# sources. Doxygen will then generate output that is tailored for -# VHDL. - -OPTIMIZE_OUTPUT_VHDL = NO - -# Doxygen selects the parser to use depending on the extension of the files it -# parses. With this tag you can assign which parser to use for a given extension. -# Doxygen has a built-in mapping, but you can override or extend it using this -# tag. The format is ext=language, where ext is a file extension, and language -# is one of the parsers supported by doxygen: IDL, Java, Javascript, CSharp, C, -# C++, D, PHP, Objective-C, Python, Fortran, VHDL, C, C++. For instance to make -# doxygen treat .inc files as Fortran files (default is PHP), and .f files as C -# (default is Fortran), use: inc=Fortran f=C. Note that for custom extensions -# you also need to set FILE_PATTERNS otherwise the files are not read by doxygen. - -EXTENSION_MAPPING = - -# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want -# to include (a tag file for) the STL sources as input, then you should -# set this tag to YES in order to let doxygen match functions declarations and -# definitions whose arguments contain STL classes (e.g. func(std::string); v.s. -# func(std::string) {}). This also makes the inheritance and collaboration -# diagrams that involve STL classes more complete and accurate. - -BUILTIN_STL_SUPPORT = NO - -# If you use Microsoft's C++/CLI language, you should set this option to YES to -# enable parsing support. - -CPP_CLI_SUPPORT = NO - -# Set the SIP_SUPPORT tag to YES if your project consists of sip sources only. -# Doxygen will parse them like normal C++ but will assume all classes use public -# instead of private inheritance when no explicit protection keyword is present. - -SIP_SUPPORT = NO - -# For Microsoft's IDL there are propget and propput attributes to indicate getter -# and setter methods for a property. Setting this option to YES (the default) -# will make doxygen replace the get and set methods by a property in the -# documentation. This will only work if the methods are indeed getting or -# setting a simple type. If this is not the case, or you want to show the -# methods anyway, you should set this option to NO. - -IDL_PROPERTY_SUPPORT = YES - -# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC -# tag is set to YES, then doxygen will reuse the documentation of the first -# member in the group (if any) for the other members of the group. By default -# all members of a group must be documented explicitly. - -DISTRIBUTE_GROUP_DOC = NO - -# Set the SUBGROUPING tag to YES (the default) to allow class member groups of -# the same type (for instance a group of public functions) to be put as a -# subgroup of that type (e.g. under the Public Functions section). Set it to -# NO to prevent subgrouping. Alternatively, this can be done per class using -# the \nosubgrouping command. - -SUBGROUPING = YES - -# When TYPEDEF_HIDES_STRUCT is enabled, a typedef of a struct, union, or enum -# is documented as struct, union, or enum with the name of the typedef. So -# typedef struct TypeS {} TypeT, will appear in the documentation as a struct -# with name TypeT. When disabled the typedef will appear as a member of a file, -# namespace, or class. And the struct will be named TypeS. This can typically -# be useful for C code in case the coding convention dictates that all compound -# types are typedef'ed and only the typedef is referenced, never the tag name. - -TYPEDEF_HIDES_STRUCT = NO - -# The SYMBOL_CACHE_SIZE determines the size of the internal cache use to -# determine which symbols to keep in memory and which to flush to disk. -# When the cache is full, less often used symbols will be written to disk. -# For small to medium size projects (<1000 input files) the default value is -# probably good enough. For larger projects a too small cache size can cause -# doxygen to be busy swapping symbols to and from disk most of the time -# causing a significant performance penality. -# If the system has enough physical memory increasing the cache will improve the -# performance by keeping more symbols in memory. Note that the value works on -# a logarithmic scale so increasing the size by one will roughly double the -# memory usage. The cache size is given by this formula: -# 2^(16+SYMBOL_CACHE_SIZE). The valid range is 0..9, the default is 0, -# corresponding to a cache size of 2^16 = 65536 symbols - -SYMBOL_CACHE_SIZE = 0 - -#--------------------------------------------------------------------------- -# Build related configuration options -#--------------------------------------------------------------------------- - -# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in -# documentation are documented, even if no documentation was available. -# Private class members and static file members will be hidden unless -# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES - -EXTRACT_ALL = YES - -# If the EXTRACT_PRIVATE tag is set to YES all private members of a class -# will be included in the documentation. - -EXTRACT_PRIVATE = NO - -# If the EXTRACT_STATIC tag is set to YES all static members of a file -# will be included in the documentation. - -EXTRACT_STATIC = NO - -# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) -# defined locally in source files will be included in the documentation. -# If set to NO only classes defined in header files are included. - -EXTRACT_LOCAL_CLASSES = YES - -# This flag is only useful for Objective-C code. When set to YES local -# methods, which are defined in the implementation section but not in -# the interface are included in the documentation. -# If set to NO (the default) only methods in the interface are included. - -EXTRACT_LOCAL_METHODS = NO - -# If this flag is set to YES, the members of anonymous namespaces will be -# extracted and appear in the documentation as a namespace called -# 'anonymous_namespace{file}', where file will be replaced with the base -# name of the file that contains the anonymous namespace. By default -# anonymous namespaces are hidden. - -EXTRACT_ANON_NSPACES = NO - -# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all -# undocumented members of documented classes, files or namespaces. -# If set to NO (the default) these members will be included in the -# various overviews, but no documentation section is generated. -# This option has no effect if EXTRACT_ALL is enabled. - -HIDE_UNDOC_MEMBERS = NO - -# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all -# undocumented classes that are normally visible in the class hierarchy. -# If set to NO (the default) these classes will be included in the various -# overviews. This option has no effect if EXTRACT_ALL is enabled. - -HIDE_UNDOC_CLASSES = NO - -# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all -# friend (class|struct|union) declarations. -# If set to NO (the default) these declarations will be included in the -# documentation. - -HIDE_FRIEND_COMPOUNDS = NO - -# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any -# documentation blocks found inside the body of a function. -# If set to NO (the default) these blocks will be appended to the -# function's detailed documentation block. - -HIDE_IN_BODY_DOCS = NO - -# The INTERNAL_DOCS tag determines if documentation -# that is typed after a \internal command is included. If the tag is set -# to NO (the default) then the documentation will be excluded. -# Set it to YES to include the internal documentation. - -INTERNAL_DOCS = NO - -# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate -# file names in lower-case letters. If set to YES upper-case letters are also -# allowed. This is useful if you have classes or files whose names only differ -# in case and if your file system supports case sensitive file names. Windows -# and Mac users are advised to set this option to NO. - -CASE_SENSE_NAMES = NO - -# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen -# will show members with their full class and namespace scopes in the -# documentation. If set to YES the scope will be hidden. - -HIDE_SCOPE_NAMES = YES - -# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen -# will put a list of the files that are included by a file in the documentation -# of that file. - -SHOW_INCLUDE_FILES = YES - -# If the FORCE_LOCAL_INCLUDES tag is set to YES then Doxygen -# will list include files with double quotes in the documentation -# rather than with sharp brackets. - -FORCE_LOCAL_INCLUDES = NO - -# If the INLINE_INFO tag is set to YES (the default) then a tag [inline] -# is inserted in the documentation for inline members. - -INLINE_INFO = YES - -# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen -# will sort the (detailed) documentation of file and class members -# alphabetically by member name. If set to NO the members will appear in -# declaration order. - -SORT_MEMBER_DOCS = YES - -# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the -# brief documentation of file, namespace and class members alphabetically -# by member name. If set to NO (the default) the members will appear in -# declaration order. - -SORT_BRIEF_DOCS = NO - -# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen -# will sort the (brief and detailed) documentation of class members so that -# constructors and destructors are listed first. If set to NO (the default) -# the constructors will appear in the respective orders defined by -# SORT_MEMBER_DOCS and SORT_BRIEF_DOCS. -# This tag will be ignored for brief docs if SORT_BRIEF_DOCS is set to NO -# and ignored for detailed docs if SORT_MEMBER_DOCS is set to NO. - -SORT_MEMBERS_CTORS_1ST = NO - -# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the -# hierarchy of group names into alphabetical order. If set to NO (the default) -# the group names will appear in their defined order. - -SORT_GROUP_NAMES = NO - -# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be -# sorted by fully-qualified names, including namespaces. If set to -# NO (the default), the class list will be sorted only by class name, -# not including the namespace part. -# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. -# Note: This option applies only to the class list, not to the -# alphabetical list. - -SORT_BY_SCOPE_NAME = NO - -# The GENERATE_TODOLIST tag can be used to enable (YES) or -# disable (NO) the todo list. This list is created by putting \todo -# commands in the documentation. - -GENERATE_TODOLIST = YES - -# The GENERATE_TESTLIST tag can be used to enable (YES) or -# disable (NO) the test list. This list is created by putting \test -# commands in the documentation. - -GENERATE_TESTLIST = YES - -# The GENERATE_BUGLIST tag can be used to enable (YES) or -# disable (NO) the bug list. This list is created by putting \bug -# commands in the documentation. - -GENERATE_BUGLIST = YES - -# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or -# disable (NO) the deprecated list. This list is created by putting -# \deprecated commands in the documentation. - -GENERATE_DEPRECATEDLIST= YES - -# The ENABLED_SECTIONS tag can be used to enable conditional -# documentation sections, marked by \if sectionname ... \endif. - -ENABLED_SECTIONS = - -# The MAX_INITIALIZER_LINES tag determines the maximum number of lines -# the initial value of a variable or macro consists of for it to appear in -# the documentation. If the initializer consists of more lines than specified -# here it will be hidden. Use a value of 0 to hide initializers completely. -# The appearance of the initializer of individual variables and macros in the -# documentation can be controlled using \showinitializer or \hideinitializer -# command in the documentation regardless of this setting. - -MAX_INITIALIZER_LINES = 30 - -# Set the SHOW_USED_FILES tag to NO to disable the list of files generated -# at the bottom of the documentation of classes and structs. If set to YES the -# list will mention the files that were used to generate the documentation. - -SHOW_USED_FILES = YES - -# If the sources in your project are distributed over multiple directories -# then setting the SHOW_DIRECTORIES tag to YES will show the directory hierarchy -# in the documentation. The default is NO. - -SHOW_DIRECTORIES = NO - -# Set the SHOW_FILES tag to NO to disable the generation of the Files page. -# This will remove the Files entry from the Quick Index and from the -# Folder Tree View (if specified). The default is YES. - -SHOW_FILES = YES - -# Set the SHOW_NAMESPACES tag to NO to disable the generation of the -# Namespaces page. This will remove the Namespaces entry from the Quick Index -# and from the Folder Tree View (if specified). The default is YES. - -SHOW_NAMESPACES = YES - -# The FILE_VERSION_FILTER tag can be used to specify a program or script that -# doxygen should invoke to get the current version for each file (typically from -# the version control system). Doxygen will invoke the program by executing (via -# popen()) the command , where is the value of -# the FILE_VERSION_FILTER tag, and is the name of an input file -# provided by doxygen. Whatever the program writes to standard output -# is used as the file version. See the manual for examples. - -FILE_VERSION_FILTER = - -# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed -# by doxygen. The layout file controls the global structure of the generated -# output files in an output format independent way. The create the layout file -# that represents doxygen's defaults, run doxygen with the -l option. -# You can optionally specify a file name after the option, if omitted -# DoxygenLayout.xml will be used as the name of the layout file. - -LAYOUT_FILE = - -#--------------------------------------------------------------------------- -# configuration options related to warning and progress messages -#--------------------------------------------------------------------------- - -# The QUIET tag can be used to turn on/off the messages that are generated -# by doxygen. Possible values are YES and NO. If left blank NO is used. - -QUIET = NO - -# The WARNINGS tag can be used to turn on/off the warning messages that are -# generated by doxygen. Possible values are YES and NO. If left blank -# NO is used. - -WARNINGS = YES - -# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings -# for undocumented members. If EXTRACT_ALL is set to YES then this flag will -# automatically be disabled. - -WARN_IF_UNDOCUMENTED = YES - -# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for -# potential errors in the documentation, such as not documenting some -# parameters in a documented function, or documenting parameters that -# don't exist or using markup commands wrongly. - -WARN_IF_DOC_ERROR = YES - -# The WARN_NO_PARAMDOC option can be enabled to get warnings for -# functions that are documented, but have no documentation for their parameters -# or return value. If set to NO (the default) doxygen will only warn about -# wrong or incomplete parameter documentation, but not about the absence of -# documentation. - -WARN_NO_PARAMDOC = NO - -# The WARN_FORMAT tag determines the format of the warning messages that -# doxygen can produce. The string should contain the $file, $line, and $text -# tags, which will be replaced by the file and line number from which the -# warning originated and the warning text. Optionally the format may contain -# $version, which will be replaced by the version of the file (if it could -# be obtained via FILE_VERSION_FILTER) - -WARN_FORMAT = "$file:$line: $text" - -# The WARN_LOGFILE tag can be used to specify a file to which warning -# and error messages should be written. If left blank the output is written -# to stderr. - -WARN_LOGFILE = - -#--------------------------------------------------------------------------- -# configuration options related to the input files -#--------------------------------------------------------------------------- - -# The INPUT tag can be used to specify the files and/or directories that contain -# documented source files. You may enter file names like "myfile.cpp" or -# directories like "/usr/src/myproject". Separate the files or directories -# with spaces. - -INPUT = /Users/mfro/Documents/workspace/BaS_gcc - -# This tag can be used to specify the character encoding of the source files -# that doxygen parses. Internally doxygen uses the UTF-8 encoding, which is -# also the default input encoding. Doxygen uses libiconv (or the iconv built -# into libc) for the transcoding. See http://www.gnu.org/software/libiconv for -# the list of possible encodings. - -INPUT_ENCODING = UTF-8 - -# If the value of the INPUT tag contains directories, you can use the -# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp -# and *.h) to filter out the source-files in the directories. If left -# blank the following patterns are tested: -# *.c *.cc *.cxx *.cpp *.c++ *.d *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh -# *.hxx *.hpp *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm *.dox *.py -# *.f90 *.f *.vhd *.vhdl - -FILE_PATTERNS = *.c \ - *.cc \ - *.cxx \ - *.cpp \ - *.c++ \ - *.d \ - *.java \ - *.ii \ - *.ixx \ - *.ipp \ - *.i++ \ - *.inl \ - *.h \ - *.hh \ - *.hxx \ - *.hpp \ - *.h++ \ - *.idl \ - *.odl \ - *.cs \ - *.php \ - *.php3 \ - *.inc \ - *.m \ - *.mm \ - *.dox \ - *.py \ - *.f90 \ - *.f \ - *.vhd \ - *.vhdl - -# The RECURSIVE tag can be used to turn specify whether or not subdirectories -# should be searched for input files as well. Possible values are YES and NO. -# If left blank NO is used. - -RECURSIVE = YES - -# The EXCLUDE tag can be used to specify files and/or directories that should -# excluded from the INPUT source files. This way you can easily exclude a -# subdirectory from a directory tree whose root is specified with the INPUT tag. - -EXCLUDE = - -# The EXCLUDE_SYMLINKS tag can be used select whether or not files or -# directories that are symbolic links (a Unix filesystem feature) are excluded -# from the input. - -EXCLUDE_SYMLINKS = NO - -# If the value of the INPUT tag contains directories, you can use the -# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude -# certain files from those directories. Note that the wildcards are matched -# against the file with absolute path, so to exclude all test directories -# for example use the pattern */test/* - -EXCLUDE_PATTERNS = - -# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names -# (namespaces, classes, functions, etc.) that should be excluded from the -# output. The symbol name can be a fully qualified name, a word, or if the -# wildcard * is used, a substring. Examples: ANamespace, AClass, -# AClass::ANamespace, ANamespace::*Test - -EXCLUDE_SYMBOLS = - -# The EXAMPLE_PATH tag can be used to specify one or more files or -# directories that contain example code fragments that are included (see -# the \include command). - -EXAMPLE_PATH = - -# If the value of the EXAMPLE_PATH tag contains directories, you can use the -# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp -# and *.h) to filter out the source-files in the directories. If left -# blank all files are included. - -EXAMPLE_PATTERNS = * - -# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be -# searched for input files to be used with the \include or \dontinclude -# commands irrespective of the value of the RECURSIVE tag. -# Possible values are YES and NO. If left blank NO is used. - -EXAMPLE_RECURSIVE = NO - -# The IMAGE_PATH tag can be used to specify one or more files or -# directories that contain image that are included in the documentation (see -# the \image command). - -IMAGE_PATH = - -# The INPUT_FILTER tag can be used to specify a program that doxygen should -# invoke to filter for each input file. Doxygen will invoke the filter program -# by executing (via popen()) the command , where -# is the value of the INPUT_FILTER tag, and is the name of an -# input file. Doxygen will then use the output that the filter program writes -# to standard output. If FILTER_PATTERNS is specified, this tag will be -# ignored. - -INPUT_FILTER = - -# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern -# basis. Doxygen will compare the file name with each pattern and apply the -# filter if there is a match. The filters are a list of the form: -# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further -# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER -# is applied to all files. - -FILTER_PATTERNS = - -# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using -# INPUT_FILTER) will be used to filter the input files when producing source -# files to browse (i.e. when SOURCE_BROWSER is set to YES). - -FILTER_SOURCE_FILES = NO - -#--------------------------------------------------------------------------- -# configuration options related to source browsing -#--------------------------------------------------------------------------- - -# If the SOURCE_BROWSER tag is set to YES then a list of source files will -# be generated. Documented entities will be cross-referenced with these sources. -# Note: To get rid of all source code in the generated output, make sure also -# VERBATIM_HEADERS is set to NO. - -SOURCE_BROWSER = YES - -# Setting the INLINE_SOURCES tag to YES will include the body -# of functions and classes directly in the documentation. - -INLINE_SOURCES = NO - -# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct -# doxygen to hide any special comment blocks from generated source code -# fragments. Normal C and C++ comments will always remain visible. - -STRIP_CODE_COMMENTS = YES - -# If the REFERENCED_BY_RELATION tag is set to YES -# then for each documented function all documented -# functions referencing it will be listed. - -REFERENCED_BY_RELATION = NO - -# If the REFERENCES_RELATION tag is set to YES -# then for each documented function all documented entities -# called/used by that function will be listed. - -REFERENCES_RELATION = NO - -# If the REFERENCES_LINK_SOURCE tag is set to YES (the default) -# and SOURCE_BROWSER tag is set to YES, then the hyperlinks from -# functions in REFERENCES_RELATION and REFERENCED_BY_RELATION lists will -# link to the source code. Otherwise they will link to the documentation. - -REFERENCES_LINK_SOURCE = YES - -# If the USE_HTAGS tag is set to YES then the references to source code -# will point to the HTML generated by the htags(1) tool instead of doxygen -# built-in source browser. The htags tool is part of GNU's global source -# tagging system (see http://www.gnu.org/software/global/global.html). You -# will need version 4.8.6 or higher. - -USE_HTAGS = NO - -# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen -# will generate a verbatim copy of the header file for each class for -# which an include is specified. Set to NO to disable this. - -VERBATIM_HEADERS = YES - -#--------------------------------------------------------------------------- -# configuration options related to the alphabetical class index -#--------------------------------------------------------------------------- - -# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index -# of all compounds will be generated. Enable this if the project -# contains a lot of classes, structs, unions or interfaces. - -ALPHABETICAL_INDEX = YES - -# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then -# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns -# in which this list will be split (can be a number in the range [1..20]) - -COLS_IN_ALPHA_INDEX = 5 - -# In case all classes in a project start with a common prefix, all -# classes will be put under the same header in the alphabetical index. -# The IGNORE_PREFIX tag can be used to specify one or more prefixes that -# should be ignored while generating the index headers. - -IGNORE_PREFIX = - -#--------------------------------------------------------------------------- -# configuration options related to the HTML output -#--------------------------------------------------------------------------- - -# If the GENERATE_HTML tag is set to YES (the default) Doxygen will -# generate HTML output. - -GENERATE_HTML = YES - -# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `html' will be used as the default path. - -HTML_OUTPUT = html - -# The HTML_FILE_EXTENSION tag can be used to specify the file extension for -# each generated HTML page (for example: .htm,.php,.asp). If it is left blank -# doxygen will generate files with .html extension. - -HTML_FILE_EXTENSION = .html - -# The HTML_HEADER tag can be used to specify a personal HTML header for -# each generated HTML page. If it is left blank doxygen will generate a -# standard header. - -HTML_HEADER = - -# The HTML_FOOTER tag can be used to specify a personal HTML footer for -# each generated HTML page. If it is left blank doxygen will generate a -# standard footer. - -HTML_FOOTER = - -# The HTML_STYLESHEET tag can be used to specify a user-defined cascading -# style sheet that is used by each HTML page. It can be used to -# fine-tune the look of the HTML output. If the tag is left blank doxygen -# will generate a default style sheet. Note that doxygen will try to copy -# the style sheet file to the HTML output directory, so don't put your own -# stylesheet in the HTML output directory as well, or it will be erased! - -HTML_STYLESHEET = - -# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. -# Doxygen will adjust the colors in the stylesheet and background images -# according to this color. Hue is specified as an angle on a colorwheel, -# see http://en.wikipedia.org/wiki/Hue for more information. -# For instance the value 0 represents red, 60 is yellow, 120 is green, -# 180 is cyan, 240 is blue, 300 purple, and 360 is red again. -# The allowed range is 0 to 359. - -HTML_COLORSTYLE_HUE = 220 - -# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of -# the colors in the HTML output. For a value of 0 the output will use -# grayscales only. A value of 255 will produce the most vivid colors. - -HTML_COLORSTYLE_SAT = 100 - -# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to -# the luminance component of the colors in the HTML output. Values below -# 100 gradually make the output lighter, whereas values above 100 make -# the output darker. The value divided by 100 is the actual gamma applied, -# so 80 represents a gamma of 0.8, The value 220 represents a gamma of 2.2, -# and 100 does not change the gamma. - -HTML_COLORSTYLE_GAMMA = 80 - -# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML -# page will contain the date and time when the page was generated. Setting -# this to NO can help when comparing the output of multiple runs. - -HTML_TIMESTAMP = YES - -# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, -# files or namespaces will be aligned in HTML using tables. If set to -# NO a bullet list will be used. - -HTML_ALIGN_MEMBERS = YES - -# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML -# documentation will contain sections that can be hidden and shown after the -# page has loaded. For this to work a browser that supports -# JavaScript and DHTML is required (for instance Mozilla 1.0+, Firefox -# Netscape 6.0+, Internet explorer 5.0+, Konqueror, or Safari). - -HTML_DYNAMIC_SECTIONS = NO - -# If the GENERATE_DOCSET tag is set to YES, additional index files -# will be generated that can be used as input for Apple's Xcode 3 -# integrated development environment, introduced with OSX 10.5 (Leopard). -# To create a documentation set, doxygen will generate a Makefile in the -# HTML output directory. Running make will produce the docset in that -# directory and running "make install" will install the docset in -# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find -# it at startup. -# See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html -# for more information. - -GENERATE_DOCSET = NO - -# When GENERATE_DOCSET tag is set to YES, this tag determines the name of the -# feed. A documentation feed provides an umbrella under which multiple -# documentation sets from a single provider (such as a company or product suite) -# can be grouped. - -DOCSET_FEEDNAME = "Doxygen generated docs" - -# When GENERATE_DOCSET tag is set to YES, this tag specifies a string that -# should uniquely identify the documentation set bundle. This should be a -# reverse domain-name style string, e.g. com.mycompany.MyDocSet. Doxygen -# will append .docset to the name. - -DOCSET_BUNDLE_ID = org.doxygen.Project - -# When GENERATE_PUBLISHER_ID tag specifies a string that should uniquely identify -# the documentation publisher. This should be a reverse domain-name style -# string, e.g. com.mycompany.MyDocSet.documentation. - -DOCSET_PUBLISHER_ID = org.doxygen.Publisher - -# The GENERATE_PUBLISHER_NAME tag identifies the documentation publisher. - -DOCSET_PUBLISHER_NAME = Publisher - -# If the GENERATE_HTMLHELP tag is set to YES, additional index files -# will be generated that can be used as input for tools like the -# Microsoft HTML help workshop to generate a compiled HTML help file (.chm) -# of the generated HTML documentation. - -GENERATE_HTMLHELP = NO - -# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can -# be used to specify the file name of the resulting .chm file. You -# can add a path in front of the file if the result should not be -# written to the html output directory. - -CHM_FILE = - -# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can -# be used to specify the location (absolute path including file name) of -# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run -# the HTML help compiler on the generated index.hhp. - -HHC_LOCATION = - -# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag -# controls if a separate .chi index file is generated (YES) or that -# it should be included in the master .chm file (NO). - -GENERATE_CHI = NO - -# If the GENERATE_HTMLHELP tag is set to YES, the CHM_INDEX_ENCODING -# is used to encode HtmlHelp index (hhk), content (hhc) and project file -# content. - -CHM_INDEX_ENCODING = - -# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag -# controls whether a binary table of contents is generated (YES) or a -# normal table of contents (NO) in the .chm file. - -BINARY_TOC = NO - -# The TOC_EXPAND flag can be set to YES to add extra items for group members -# to the contents of the HTML help documentation and to the tree view. - -TOC_EXPAND = NO - -# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and -# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated -# that can be used as input for Qt's qhelpgenerator to generate a -# Qt Compressed Help (.qch) of the generated HTML documentation. - -GENERATE_QHP = NO - -# If the QHG_LOCATION tag is specified, the QCH_FILE tag can -# be used to specify the file name of the resulting .qch file. -# The path specified is relative to the HTML output folder. - -QCH_FILE = - -# The QHP_NAMESPACE tag specifies the namespace to use when generating -# Qt Help Project output. For more information please see -# http://doc.trolltech.com/qthelpproject.html#namespace - -QHP_NAMESPACE = org.doxygen.Project - -# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating -# Qt Help Project output. For more information please see -# http://doc.trolltech.com/qthelpproject.html#virtual-folders - -QHP_VIRTUAL_FOLDER = doc - -# If QHP_CUST_FILTER_NAME is set, it specifies the name of a custom filter to -# add. For more information please see -# http://doc.trolltech.com/qthelpproject.html#custom-filters - -QHP_CUST_FILTER_NAME = - -# The QHP_CUST_FILT_ATTRS tag specifies the list of the attributes of the -# custom filter to add. For more information please see -# -# Qt Help Project / Custom Filters. - -QHP_CUST_FILTER_ATTRS = - -# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this -# project's -# filter section matches. -# -# Qt Help Project / Filter Attributes. - -QHP_SECT_FILTER_ATTRS = - -# If the GENERATE_QHP tag is set to YES, the QHG_LOCATION tag can -# be used to specify the location of Qt's qhelpgenerator. -# If non-empty doxygen will try to run qhelpgenerator on the generated -# .qhp file. - -QHG_LOCATION = - -# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files -# will be generated, which together with the HTML files, form an Eclipse help -# plugin. To install this plugin and make it available under the help contents -# menu in Eclipse, the contents of the directory containing the HTML and XML -# files needs to be copied into the plugins directory of eclipse. The name of -# the directory within the plugins directory should be the same as -# the ECLIPSE_DOC_ID value. After copying Eclipse needs to be restarted before -# the help appears. - -GENERATE_ECLIPSEHELP = NO - -# A unique identifier for the eclipse help plugin. When installing the plugin -# the directory name containing the HTML and XML files should also have -# this name. - -ECLIPSE_DOC_ID = org.doxygen.Project - -# The DISABLE_INDEX tag can be used to turn on/off the condensed index at -# top of each HTML page. The value NO (the default) enables the index and -# the value YES disables it. - -DISABLE_INDEX = NO - -# This tag can be used to set the number of enum values (range [0,1..20]) -# that doxygen will group on one line in the generated HTML documentation. -# Note that a value of 0 will completely suppress the enum values from -# appearing in the overview section. - -ENUM_VALUES_PER_LINE = 4 - -# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index -# structure should be generated to display hierarchical information. -# If the tag value is set to YES, a side panel will be generated -# containing a tree-like index structure (just like the one that -# is generated for HTML Help). For this to work a browser that supports -# JavaScript, DHTML, CSS and frames is required (i.e. any modern browser). -# Windows users are probably better off using the HTML help feature. - -GENERATE_TREEVIEW = NO - -# By enabling USE_INLINE_TREES, doxygen will generate the Groups, Directories, -# and Class Hierarchy pages using a tree view instead of an ordered list. - -USE_INLINE_TREES = NO - -# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be -# used to set the initial width (in pixels) of the frame in which the tree -# is shown. - -TREEVIEW_WIDTH = 250 - -# When the EXT_LINKS_IN_WINDOW option is set to YES doxygen will open -# links to external symbols imported via tag files in a separate window. - -EXT_LINKS_IN_WINDOW = NO - -# Use this tag to change the font size of Latex formulas included -# as images in the HTML documentation. The default is 10. Note that -# when you change the font size after a successful doxygen run you need -# to manually remove any form_*.png images from the HTML output directory -# to force them to be regenerated. - -FORMULA_FONTSIZE = 10 - -# Use the FORMULA_TRANPARENT tag to determine whether or not the images -# generated for formulas are transparent PNGs. Transparent PNGs are -# not supported properly for IE 6.0, but are supported on all modern browsers. -# Note that when changing this option you need to delete any form_*.png files -# in the HTML output before the changes have effect. - -FORMULA_TRANSPARENT = YES - -# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax -# (see http://www.mathjax.org) which uses client side Javascript for the -# rendering instead of using prerendered bitmaps. Use this if you do not -# have LaTeX installed or if you want to formulas look prettier in the HTML -# output. When enabled you also need to install MathJax separately and -# configure the path to it using the MATHJAX_RELPATH option. - -USE_MATHJAX = NO - -# When MathJax is enabled you need to specify the location relative to the -# HTML output directory using the MATHJAX_RELPATH option. The destination -# directory should contain the MathJax.js script. For instance, if the mathjax -# directory is located at the same level as the HTML output directory, then -# MATHJAX_RELPATH should be ../mathjax. The default value points to the -# mathjax.org site, so you can quickly see the result without installing -# MathJax, but it is strongly recommended to install a local copy of MathJax -# before deployment. - -MATHJAX_RELPATH = http://www.mathjax.org/mathjax - -# When the SEARCHENGINE tag is enabled doxygen will generate a search box -# for the HTML output. The underlying search engine uses javascript -# and DHTML and should work on any modern browser. Note that when using -# HTML help (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets -# (GENERATE_DOCSET) there is already a search function so this one should -# typically be disabled. For large projects the javascript based search engine -# can be slow, then enabling SERVER_BASED_SEARCH may provide a better solution. - -SEARCHENGINE = YES - -# When the SERVER_BASED_SEARCH tag is enabled the search engine will be -# implemented using a PHP enabled web server instead of at the web client -# using Javascript. Doxygen will generate the search PHP script and index -# file to put on the web server. The advantage of the server -# based approach is that it scales better to large projects and allows -# full text search. The disadvantages are that it is more difficult to setup -# and does not have live searching capabilities. - -SERVER_BASED_SEARCH = NO - -#--------------------------------------------------------------------------- -# configuration options related to the LaTeX output -#--------------------------------------------------------------------------- - -# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will -# generate Latex output. - -GENERATE_LATEX = YES - -# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `latex' will be used as the default path. - -LATEX_OUTPUT = latex - -# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be -# invoked. If left blank `latex' will be used as the default command name. -# Note that when enabling USE_PDFLATEX this option is only used for -# generating bitmaps for formulas in the HTML output, but not in the -# Makefile that is written to the output directory. - -LATEX_CMD_NAME = latex - -# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to -# generate index for LaTeX. If left blank `makeindex' will be used as the -# default command name. - -MAKEINDEX_CMD_NAME = makeindex - -# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact -# LaTeX documents. This may be useful for small projects and may help to -# save some trees in general. - -COMPACT_LATEX = NO - -# The PAPER_TYPE tag can be used to set the paper type that is used -# by the printer. Possible values are: a4, letter, legal and -# executive. If left blank a4wide will be used. - -PAPER_TYPE = a4 - -# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX -# packages that should be included in the LaTeX output. - -EXTRA_PACKAGES = - -# The LATEX_HEADER tag can be used to specify a personal LaTeX header for -# the generated latex document. The header should contain everything until -# the first chapter. If it is left blank doxygen will generate a -# standard header. Notice: only use this tag if you know what you are doing! - -LATEX_HEADER = - -# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated -# is prepared for conversion to pdf (using ps2pdf). The pdf file will -# contain links (just like the HTML output) instead of page references -# This makes the output suitable for online browsing using a pdf viewer. - -PDF_HYPERLINKS = YES - -# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of -# plain latex in the generated Makefile. Set this option to YES to get a -# higher quality PDF documentation. - -USE_PDFLATEX = YES - -# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. -# command to the generated LaTeX files. This will instruct LaTeX to keep -# running if errors occur, instead of asking the user for help. -# This option is also used when generating formulas in HTML. - -LATEX_BATCHMODE = NO - -# If LATEX_HIDE_INDICES is set to YES then doxygen will not -# include the index chapters (such as File Index, Compound Index, etc.) -# in the output. - -LATEX_HIDE_INDICES = NO - -# If LATEX_SOURCE_CODE is set to YES then doxygen will include -# source code with syntax highlighting in the LaTeX output. -# Note that which sources are shown also depends on other settings -# such as SOURCE_BROWSER. - -LATEX_SOURCE_CODE = NO - -#--------------------------------------------------------------------------- -# configuration options related to the RTF output -#--------------------------------------------------------------------------- - -# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output -# The RTF output is optimized for Word 97 and may not look very pretty with -# other RTF readers or editors. - -GENERATE_RTF = NO - -# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `rtf' will be used as the default path. - -RTF_OUTPUT = rtf - -# If the COMPACT_RTF tag is set to YES Doxygen generates more compact -# RTF documents. This may be useful for small projects and may help to -# save some trees in general. - -COMPACT_RTF = NO - -# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated -# will contain hyperlink fields. The RTF file will -# contain links (just like the HTML output) instead of page references. -# This makes the output suitable for online browsing using WORD or other -# programs which support those fields. -# Note: wordpad (write) and others do not support links. - -RTF_HYPERLINKS = NO - -# Load stylesheet definitions from file. Syntax is similar to doxygen's -# config file, i.e. a series of assignments. You only have to provide -# replacements, missing definitions are set to their default value. - -RTF_STYLESHEET_FILE = - -# Set optional variables used in the generation of an rtf document. -# Syntax is similar to doxygen's config file. - -RTF_EXTENSIONS_FILE = - -#--------------------------------------------------------------------------- -# configuration options related to the man page output -#--------------------------------------------------------------------------- - -# If the GENERATE_MAN tag is set to YES (the default) Doxygen will -# generate man pages - -GENERATE_MAN = NO - -# The MAN_OUTPUT tag is used to specify where the man pages will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `man' will be used as the default path. - -MAN_OUTPUT = man - -# The MAN_EXTENSION tag determines the extension that is added to -# the generated man pages (default is the subroutine's section .3) - -MAN_EXTENSION = .3 - -# If the MAN_LINKS tag is set to YES and Doxygen generates man output, -# then it will generate one additional man file for each entity -# documented in the real man page(s). These additional files -# only source the real man page, but without them the man command -# would be unable to find the correct page. The default is NO. - -MAN_LINKS = NO - -#--------------------------------------------------------------------------- -# configuration options related to the XML output -#--------------------------------------------------------------------------- - -# If the GENERATE_XML tag is set to YES Doxygen will -# generate an XML file that captures the structure of -# the code including all documentation. - -GENERATE_XML = NO - -# The XML_OUTPUT tag is used to specify where the XML pages will be put. -# If a relative path is entered the value of OUTPUT_DIRECTORY will be -# put in front of it. If left blank `xml' will be used as the default path. - -XML_OUTPUT = xml - -# The XML_SCHEMA tag can be used to specify an XML schema, -# which can be used by a validating XML parser to check the -# syntax of the XML files. - -XML_SCHEMA = - -# The XML_DTD tag can be used to specify an XML DTD, -# which can be used by a validating XML parser to check the -# syntax of the XML files. - -XML_DTD = - -# If the XML_PROGRAMLISTING tag is set to YES Doxygen will -# dump the program listings (including syntax highlighting -# and cross-referencing information) to the XML output. Note that -# enabling this will significantly increase the size of the XML output. - -XML_PROGRAMLISTING = YES - -#--------------------------------------------------------------------------- -# configuration options for the AutoGen Definitions output -#--------------------------------------------------------------------------- - -# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will -# generate an AutoGen Definitions (see autogen.sf.net) file -# that captures the structure of the code including all -# documentation. Note that this feature is still experimental -# and incomplete at the moment. - -GENERATE_AUTOGEN_DEF = NO - -#--------------------------------------------------------------------------- -# configuration options related to the Perl module output -#--------------------------------------------------------------------------- - -# If the GENERATE_PERLMOD tag is set to YES Doxygen will -# generate a Perl module file that captures the structure of -# the code including all documentation. Note that this -# feature is still experimental and incomplete at the -# moment. - -GENERATE_PERLMOD = NO - -# If the PERLMOD_LATEX tag is set to YES Doxygen will generate -# the necessary Makefile rules, Perl scripts and LaTeX code to be able -# to generate PDF and DVI output from the Perl module output. - -PERLMOD_LATEX = NO - -# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be -# nicely formatted so it can be parsed by a human reader. This is useful -# if you want to understand what is going on. On the other hand, if this -# tag is set to NO the size of the Perl module output will be much smaller -# and Perl will parse it just the same. - -PERLMOD_PRETTY = YES - -# The names of the make variables in the generated doxyrules.make file -# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. -# This is useful so different doxyrules.make files included by the same -# Makefile don't overwrite each other's variables. - -PERLMOD_MAKEVAR_PREFIX = - -#--------------------------------------------------------------------------- -# Configuration options related to the preprocessor -#--------------------------------------------------------------------------- - -# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will -# evaluate all C-preprocessor directives found in the sources and include -# files. - -ENABLE_PREPROCESSING = YES - -# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro -# names in the source code. If set to NO (the default) only conditional -# compilation will be performed. Macro expansion can be done in a controlled -# way by setting EXPAND_ONLY_PREDEF to YES. - -MACRO_EXPANSION = NO - -# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES -# then the macro expansion is limited to the macros specified with the -# PREDEFINED and EXPAND_AS_DEFINED tags. - -EXPAND_ONLY_PREDEF = NO - -# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files -# in the INCLUDE_PATH (see below) will be search if a #include is found. - -SEARCH_INCLUDES = YES - -# The INCLUDE_PATH tag can be used to specify one or more directories that -# contain include files that are not input files but should be processed by -# the preprocessor. - -INCLUDE_PATH = - -# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard -# patterns (like *.h and *.hpp) to filter out the header-files in the -# directories. If left blank, the patterns specified with FILE_PATTERNS will -# be used. - -INCLUDE_FILE_PATTERNS = - -# The PREDEFINED tag can be used to specify one or more macro names that -# are defined before the preprocessor is started (similar to the -D option of -# gcc). The argument of the tag is a list of macros of the form: name -# or name=definition (no spaces). If the definition and the = are -# omitted =1 is assumed. To prevent a macro definition from being -# undefined via #undef or recursively expanded use the := operator -# instead of the = operator. - -PREDEFINED = - -# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then -# this tag can be used to specify a list of macro names that should be expanded. -# The macro definition that is found in the sources will be used. -# Use the PREDEFINED tag if you want to use a different macro definition. - -EXPAND_AS_DEFINED = - -# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then -# doxygen's preprocessor will remove all function-like macros that are alone -# on a line, have an all uppercase name, and do not end with a semicolon. Such -# function macros are typically used for boiler-plate code, and will confuse -# the parser if not removed. - -SKIP_FUNCTION_MACROS = YES - -#--------------------------------------------------------------------------- -# Configuration::additions related to external references -#--------------------------------------------------------------------------- - -# The TAGFILES option can be used to specify one or more tagfiles. -# Optionally an initial location of the external documentation -# can be added for each tagfile. The format of a tag file without -# this location is as follows: -# TAGFILES = file1 file2 ... -# Adding location for the tag files is done as follows: -# TAGFILES = file1=loc1 "file2 = loc2" ... -# where "loc1" and "loc2" can be relative or absolute paths or -# URLs. If a location is present for each tag, the installdox tool -# does not have to be run to correct the links. -# Note that each tag file must have a unique name -# (where the name does NOT include the path) -# If a tag file is not located in the directory in which doxygen -# is run, you must also specify the path to the tagfile here. - -TAGFILES = - -# When a file name is specified after GENERATE_TAGFILE, doxygen will create -# a tag file that is based on the input files it reads. - -GENERATE_TAGFILE = - -# If the ALLEXTERNALS tag is set to YES all external classes will be listed -# in the class index. If set to NO only the inherited external classes -# will be listed. - -ALLEXTERNALS = NO - -# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed -# in the modules index. If set to NO, only the current project's groups will -# be listed. - -EXTERNAL_GROUPS = YES - -# The PERL_PATH should be the absolute path and name of the perl script -# interpreter (i.e. the result of `which perl'). - -PERL_PATH = /usr/bin/perl - -#--------------------------------------------------------------------------- -# Configuration options related to the dot tool -#--------------------------------------------------------------------------- - -# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will -# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base -# or super classes. Setting the tag to NO turns the diagrams off. Note that -# this option also works with HAVE_DOT disabled, but it is recommended to -# install and use dot, since it yields more powerful graphs. - -CLASS_DIAGRAMS = YES - -# You can define message sequence charts within doxygen comments using the \msc -# command. Doxygen will then run the mscgen tool (see -# http://www.mcternan.me.uk/mscgen/) to produce the chart and insert it in the -# documentation. The MSCGEN_PATH tag allows you to specify the directory where -# the mscgen tool resides. If left empty the tool is assumed to be found in the -# default search path. - -MSCGEN_PATH = - -# If set to YES, the inheritance and collaboration graphs will hide -# inheritance and usage relations if the target is undocumented -# or is not a class. - -HIDE_UNDOC_RELATIONS = YES - -# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is -# available from the path. This tool is part of Graphviz, a graph visualization -# toolkit from AT&T and Lucent Bell Labs. The other options in this section -# have no effect if this option is set to NO (the default) - -HAVE_DOT = NO - -# The DOT_NUM_THREADS specifies the number of dot invocations doxygen is -# allowed to run in parallel. When set to 0 (the default) doxygen will -# base this on the number of processors available in the system. You can set it -# explicitly to a value larger than 0 to get control over the balance -# between CPU load and processing speed. - -DOT_NUM_THREADS = 0 - -# By default doxygen will write a font called FreeSans.ttf to the output -# directory and reference it in all dot files that doxygen generates. This -# font does not include all possible unicode characters however, so when you need -# these (or just want a differently looking font) you can specify the font name -# using DOT_FONTNAME. You need need to make sure dot is able to find the font, -# which can be done by putting it in a standard location or by setting the -# DOTFONTPATH environment variable or by setting DOT_FONTPATH to the directory -# containing the font. - -DOT_FONTNAME = FreeSans.ttf - -# The DOT_FONTSIZE tag can be used to set the size of the font of dot graphs. -# The default size is 10pt. - -DOT_FONTSIZE = 10 - -# By default doxygen will tell dot to use the output directory to look for the -# FreeSans.ttf font (which doxygen will put there itself). If you specify a -# different font using DOT_FONTNAME you can set the path where dot -# can find it using this tag. - -DOT_FONTPATH = - -# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen -# will generate a graph for each documented class showing the direct and -# indirect inheritance relations. Setting this tag to YES will force the -# the CLASS_DIAGRAMS tag to NO. - -CLASS_GRAPH = YES - -# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen -# will generate a graph for each documented class showing the direct and -# indirect implementation dependencies (inheritance, containment, and -# class references variables) of the class with other documented classes. - -COLLABORATION_GRAPH = YES - -# If the GROUP_GRAPHS and HAVE_DOT tags are set to YES then doxygen -# will generate a graph for groups, showing the direct groups dependencies - -GROUP_GRAPHS = YES - -# If the UML_LOOK tag is set to YES doxygen will generate inheritance and -# collaboration diagrams in a style similar to the OMG's Unified Modeling -# Language. - -UML_LOOK = NO - -# If set to YES, the inheritance and collaboration graphs will show the -# relations between templates and their instances. - -TEMPLATE_RELATIONS = NO - -# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT -# tags are set to YES then doxygen will generate a graph for each documented -# file showing the direct and indirect include dependencies of the file with -# other documented files. - -INCLUDE_GRAPH = YES - -# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and -# HAVE_DOT tags are set to YES then doxygen will generate a graph for each -# documented header file showing the documented files that directly or -# indirectly include this file. - -INCLUDED_BY_GRAPH = YES - -# If the CALL_GRAPH and HAVE_DOT options are set to YES then -# doxygen will generate a call dependency graph for every global function -# or class method. Note that enabling this option will significantly increase -# the time of a run. So in most cases it will be better to enable call graphs -# for selected functions only using the \callgraph command. - -CALL_GRAPH = NO - -# If the CALLER_GRAPH and HAVE_DOT tags are set to YES then -# doxygen will generate a caller dependency graph for every global function -# or class method. Note that enabling this option will significantly increase -# the time of a run. So in most cases it will be better to enable caller -# graphs for selected functions only using the \callergraph command. - -CALLER_GRAPH = NO - -# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen -# will generate a graphical hierarchy of all classes instead of a textual one. - -GRAPHICAL_HIERARCHY = YES - -# If the DIRECTORY_GRAPH, SHOW_DIRECTORIES and HAVE_DOT tags are set to YES -# then doxygen will show the dependencies a directory has on other directories -# in a graphical way. The dependency relations are determined by the #include -# relations between the files in the directories. - -DIRECTORY_GRAPH = YES - -# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images -# generated by dot. Possible values are png, jpg, or gif. -# If left blank png will be used. - -DOT_IMAGE_FORMAT = png - -# The tag DOT_PATH can be used to specify the path where the dot tool can be -# found. If left blank, it is assumed the dot tool can be found in the path. - -DOT_PATH = - -# The DOTFILE_DIRS tag can be used to specify one or more directories that -# contain dot files that are included in the documentation (see the -# \dotfile command). - -DOTFILE_DIRS = - -# The MSCFILE_DIRS tag can be used to specify one or more directories that -# contain msc files that are included in the documentation (see the -# \mscfile command). - -MSCFILE_DIRS = - -# The DOT_GRAPH_MAX_NODES tag can be used to set the maximum number of -# nodes that will be shown in the graph. If the number of nodes in a graph -# becomes larger than this value, doxygen will truncate the graph, which is -# visualized by representing a node as a red box. Note that doxygen if the -# number of direct children of the root node in a graph is already larger than -# DOT_GRAPH_MAX_NODES then the graph will not be shown at all. Also note -# that the size of a graph can be further restricted by MAX_DOT_GRAPH_DEPTH. - -DOT_GRAPH_MAX_NODES = 50 - -# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the -# graphs generated by dot. A depth value of 3 means that only nodes reachable -# from the root by following a path via at most 3 edges will be shown. Nodes -# that lay further from the root node will be omitted. Note that setting this -# option to 1 or 2 may greatly reduce the computation time needed for large -# code bases. Also note that the size of a graph can be further restricted by -# DOT_GRAPH_MAX_NODES. Using a depth of 0 means no depth restriction. - -MAX_DOT_GRAPH_DEPTH = 0 - -# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent -# background. This is disabled by default, because dot on Windows does not -# seem to support this out of the box. Warning: Depending on the platform used, -# enabling this option may lead to badly anti-aliased labels on the edges of -# a graph (i.e. they become hard to read). - -DOT_TRANSPARENT = NO - -# Set the DOT_MULTI_TARGETS tag to YES allow dot to generate multiple output -# files in one run (i.e. multiple -o and -T options on the command line). This -# makes dot run faster, but since only newer versions of dot (>1.8.10) -# support this, this feature is disabled by default. - -DOT_MULTI_TARGETS = NO - -# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will -# generate a legend page explaining the meaning of the various boxes and -# arrows in the dot generated graphs. - -GENERATE_LEGEND = YES - -# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will -# remove the intermediate dot files that are used to generate -# the various graphs. - -DOT_CLEANUP = YES diff --git a/Makefile b/Makefile deleted file mode 100644 index 0d9a7ec..0000000 --- a/Makefile +++ /dev/null @@ -1,317 +0,0 @@ -# Makefile for Firebee BaS -# -# This Makefile is meant for cross compiling the BaS with Vincent Riviere's cross compilers. -# If you want to compile native on an Atari (you will need at least GCC 4.6.3), set -# TCPREFIX to be empty. -# If you want to compile with the m68k-elf- toolchain, set TCPREFIX accordingly. Requires an extra -# installation, but allows source level debugging over BDM with a recent gdb (tested with 7.5), -# the m68k BDM tools from sourceforge (http://bdm.sourceforge.net) and a BDM pod (TBLCF and P&E tested). - -# can be either "Y" or "N" (without quotes). "Y" for using the m68k-elf-, "N" for using the m68k-atari-mint -# toolchain -COMPILE_ELF=Y - -ifeq (Y,$(COMPILE_ELF)) -TCPREFIX=m68k-elf- -EXE=elf -FORMAT=elf32-m68k -else -TCPREFIX=m68k-atari-mint- -EXE=s19 -FORMAT=srec -endif - -CC=$(TCPREFIX)gcc -LD=$(TCPREFIX)ld -CPP=$(TCPREFIX)cpp -OBJCOPY=$(TCPREFIX)objcopy -AR=$(TCPREFIX)ar -RANLIB=$(TCPREFIX)ranlib -NATIVECC=gcc - -INCLUDE=-Iinclude -CFLAGS=-mcpu=5474 \ - -g \ - -Wall \ - -fomit-frame-pointer \ - -ffreestanding \ - -fleading-underscore \ - -mno-strict-align \ - -Wa,--register-prefix-optional -CFLAGS_OPTIMIZED = -mcpu=5474 \ - -Wall \ - -O2 \ - -g \ - -fomit-frame-pointer \ - -ffreestanding \ - -fleading-underscore \ - -Wa,--register-prefix-optional -LDFLAGS=-g - -TRGTDIRS= ./firebee ./m5484lite ./m54455 -OBJDIRS=$(patsubst %, %/objs,$(TRGTDIRS)) -TOOLDIR=util - -VPATH=dma exe flash fs i2c if kbd pci spi sys usb net util video radeon x86emu xhdi - -# Linker control file. The final $(LDCFILE) is intermediate only (preprocessed version of $(LDCSRC) -LDCFILE=bas.lk -LDRFILE=ram.lk -LDCSRC=bas.lk.in -LDCBSRC=basflash.lk.in -LDCBFS=bashflash.lk - -# this Makefile can create the BaS to flash or an arbitrary ram address (for BDM debugging). See -# below for the definition of TARGET_ADDRESS -FLASH_EXEC=bas.$(EXE) -RAM_EXEC=ram.$(EXE) -BASFLASH_EXEC=basflash.$(EXE) - -CSRCS= \ - sysinit.c \ - init_fpga.c \ - fault_vectors.c \ - interrupts.c \ - bas_printf.c \ - bas_string.c \ - BaS.c \ - cache.c \ - mmu.c \ - mmc.c \ - unicode.c \ - ff.c \ - sd_card.c \ - wait.c \ - s19reader.c \ - flash.c \ - dma.c \ - i2c.c \ - xhdi_sd.c \ - xhdi_interface.c \ - pci.c \ - dspi.c \ - driver_vec.c \ - driver_mem.c \ - MCD_dmaApi.c \ - MCD_tasks.c \ - MCD_tasksInit.c \ - usb.c \ - ohci-hcd.c \ - ehci-hcd.c \ - usb_hub.c \ - usb_mouse.c \ - usb_kbd.c \ - ikbd.c \ - \ - nbuf.c \ - queue.c \ - net_timer.c \ - am79c874.c \ - bcm5222.c \ - nif.c \ - fecbd.c \ - fec.c \ - ip.c \ - udp.c \ - arp.c \ - bootp.c \ - tftp.c \ - \ - fbmem.c \ - fbmon.c \ - fbmodedb.c \ - offscreen.c \ - \ - videl.c \ - video.c \ - \ - radeon_base.c \ - radeon_accel.c \ - radeon_cursor.c \ - radeon_monitor.c \ - fnt_st_8x16.c \ - \ - x86decode.c \ - x86sys.c \ - x86debug.c \ - x86prim_ops.c \ - x86ops.c \ - x86ops2.c \ - x86fpu.c \ - x86biosemu.c \ - x86pcibios.c \ - \ - basflash.c \ - basflash_start.c - - -ASRCS= \ - startcf.S \ - printf_helper.S \ - exceptions.S \ - xhdi_vec.S \ - pci_wrappers.S - -SRCS=$(ASRCS) $(CSRCS) -COBJS=$(patsubst %.c,%.o,$(CSRCS)) -AOBJS=$(patsubst %.S,%.o,$(ASRCS)) - -OBJS=$(COBJS) $(AOBJS) -LIBBAS=libbas.a - -LIBS=$(patsubst %,%/$(LIBBAS),$(TRGTDIRS)) - -all: ver fls ram bfl lib tos -fls: $(patsubst %,%/$(FLASH_EXEC),$(TRGTDIRS)) -ram: $(patsubst %,%/$(RAM_EXEC),$(TRGTDIRS)) -bfl: $(patsubst %,%/$(BASFLASH_EXEC),$(TRGTDIRS)) -lib: $(LIBS) - -.PHONY: ver -ver: - touch include/version.h -.PHONY: tos -tos: - (cd tos; make) - -.PHONY: clean -clean: - for d in $(TRGTDIRS);\ - do rm -f $$d/*.map $$d/*.s19 $$d/*.elf $$d/*.lk $$d/*.a $$d/objs/* $$d/depend;\ - done - rm -f tags - - -# flags for targets -m5484lite/bas.$(EXE): MACHINE=MACHINE_M5484LITE -m54455/bas.$(EXE): MACHINE=MACHINE_M54455 -firebee/bas.$(EXE): MACHINE=MACHINE_FIREBEE -m5484lite/ram.$(EXE): MACHINE=MACHINE_M5484LITE -m54455/ram.$(EXE): MACHINE=MACHINE_M54455 -firebee/ram.$(EXE): MACHINE=MACHINE_FIREBEE -m5484lite/basflash.$(EXE): MACHINE=MACHINE_M5484LITE -m54455/basflash.$(EXE): MACHINE=MACHINE_M54455 -firebee/basflash.$(EXE): MACHINE=MACHINE_FIREBEE - -# -# generate pattern rules for different object files -# -define CC_TEMPLATE -#ifeq (firebee,$(1)) - #MACHINE=MACHINE_FIREBEE -#else - #MACHINE=MACHINE_M5484LITE -#endif - -# always optimize x86 emulator objects -#$(1)/objs/x86decode.o: CFLAGS=$(CFLAGS_OPTIMIZED) -#$(1)/objs/x86sys.o: CFLAGS=$(CFLAGS_OPTIMIZED) -#$(1)/objs/x86debug.o: CFLAGS=$(CFLAGS_OPTIMIZED) -#$(1)/objs/x86prim_ops.o:CFLAGS=$(CFLAGS_OPTIMIZED) -#$(1)/objs/x86ops.o: CFLAGS=$(CFLAGS_OPTIMIZED) -#$(1)/objs/x86ops2.o: CFLAGS=$(CFLAGS_OPTIMIZED) -#$(1)/objs/x86fpu.o: CFLAGS=$(CFLAGS_OPTIMIZED) -#$(1)/objs/x86biosemu.o: CFLAGS=$(CFLAGS_OPTIMIZED) -#$(1)/objs/x86pcibios.o: CFLAGS=$(CFLAGS_OPTIMIZED) - -$(1)/objs/%.o:%.c - $(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@ - -$(1)/objs/%.o:%.S - $(CC) $$(CFLAGS) -Wa,--bitwise-or -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@ -endef -$(foreach DIR,$(TRGTDIRS),$(eval $(call CC_TEMPLATE,$(DIR)))) - -# rules for depend -define DEP_TEMPLATE -ifneq (clean,$$(MAKECMDGOALS)) -include $(1)/depend -endif - -ifeq (firebee,$(1)) - MACHINE=MACHINE_FIREBEE -else - MACHINE=MACHINE_M5484LITE -endif -$(1)/depend:$(SRCS) - $(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -M $$^ | sed -e "s#^\(.*\).o:#"$(1)"/objs/\1.o:#" > $$@ -endef -$(foreach DIR,$(TRGTDIRS),$(eval $(call DEP_TEMPLATE,$(DIR)))) - - -# -# generate pattern rules for libraries -# -define AR_TEMPLATE -$(1)_OBJS=$(patsubst %,$(1)/objs/%,$(OBJS)) -$(1)/$(LIBBAS): $$($(1)_OBJS) - $(AR) rv $$@ $$? - $(RANLIB) $$@ -endef -$(foreach DIR,$(TRGTDIRS),$(eval $(call AR_TEMPLATE,$(DIR)))) - -ifeq ($(COMPILE_ELF),Y) - FORMAT_ELF=1 -else - FORMAT_ELF=0 -endif -# -# define pattern rules for binaries -# -define EX_TEMPLATE -# pattern rule for flash -$(1)_MAPFILE=$(1)/$$(basename $$(FLASH_EXEC)).map -$(1)/$$(FLASH_EXEC): $(1)/$(LIBBAS) $(LDCSRC) - $(CPP) $(INCLUDE) -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDCFILE) - $(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE) --cref -T $(1)/$$(LDCFILE) -o $$@ -ifeq ($(COMPILE_ELF),Y) - $(OBJCOPY) -O srec $$@ $$(basename $$@).s19 -else - objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf -endif - -# pattern rule for RAM -$(1)_MAPFILE_RAM=$(1)/$$(basename $$(RAM_EXEC)).map -$(1)/$$(RAM_EXEC): $(1)/$(LIBBAS) $(LDCSRC) - $(CPP) $(INCLUDE) -DCOMPILE_RAM -DOBJDIR=$(1)/objs -P -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCSRC) -o $(1)/$$(LDRFILE) - $(LD) $(LDFLAGS) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_RAM) --cref -T $(1)/$$(LDRFILE) -o $$@ -ifeq ($(COMPILE_ELF),Y) - $(OBJCOPY) -O srec $$@ $$(basename $$@).s19 -else - objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf -endif - -# pattern rule for basflash -$(1)_MAPFILE_BFL=$(1)/$$(basename $$(BASFLASH_EXEC)).map -$(1)/$$(BASFLASH_EXEC): $(1)/objs/basflash.o $(1)/objs/basflash_start.o $(1)/$(LIBBAS) $(LDCBFL) - $(CPP) $(INCLUDE) -P -DOBJDIR=$(1)/objs -DFORMAT_ELF=$(FORMAT_ELF) -D$$(MACHINE) $(LDCBSRC) -o $(1)/$$(LDCBFS) - $(LD) --oformat $$(FORMAT) -Map $$($(1)_MAPFILE_BFL) --cref -T $(1)/$$(LDCFILE) -L$(1) -lbas -o $$@ -ifeq ($(COMPILE_ELF),Y) - $(OBJCOPY) -O srec $$@ $$(basename $$@).s19 -else - objcopy -I srec -O elf32-big --alt-machine-code 4 $$@ $$(basename $$@).elf -endif -endef -$(foreach DIR,$(TRGTDIRS),$(eval $(call EX_TEMPLATE,$(DIR)))) - - -indent: $(CSRCS) - indent $< - -.PHONY: tags -tags: - ctags $(patsubst %,%/*,$(VPATH)) - -.PHONY: printvars -printvars: - @$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V)))) -ifeq (MACHINE_M5484LITE,$$(MACHINE)) - MNAME=m5484lite -else ifeq (MACHINE_FIREBEE,$(MACHINE)) - MNAME=firebee -endif - -tools: - $(NATIVECC) $(INCLUDE) -c $(TOOLDIR)/s19header.c -o $(TOOLDIR)/s19header.o - $(NATIVECC) -o $(TOOLDIR)/s19header $(TOOLDIR)/s19header.o - diff --git a/bas.lk.in b/bas.lk.in deleted file mode 100644 index 749104b..0000000 --- a/bas.lk.in +++ /dev/null @@ -1,265 +0,0 @@ -#if defined(MACHINE_FIREBEE) -#include "firebee.h" -#elif defined(MACHINE_M5484LITE) -#include "m5484l.h" -#elif defined(MACHINE_M54455) -#include "m54455.h" -#else -#error "unknown machine!" -#endif /* MACHINE_M5484LITE */ - -/* make bas_rom access flags rx if compiling to RAM */ -#ifdef COMPILE_RAM -#define ROMFLAGS WX -#else -#define ROMFLAGS RX -#endif /* COMPILE_RAM */ - -MEMORY -{ - bas_rom (ROMFLAGS) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000 - /* - * target to copy BaS data segment to. 1M should be enough for now - */ - bas_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00200000, LENGTH = 0x00100000 - /* - * driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory - */ - driver_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00100000, LENGTH = 0x00100000 -} - -SECTIONS -{ - /* BaS in ROM */ - .text : - { - OBJDIR/startcf.o(.text) /* this one is the entry point so it must be the first */ - - OBJDIR/sysinit.o(.text) - OBJDIR/fault_vectors.o(.text) -#ifdef MACHINE_FIREBEE - OBJDIR/init_fpga.o(.text) -#endif /* MACHINE_FIREBEE */ - OBJDIR/wait.o(.text) - OBJDIR/exceptions.o(.text) - OBJDIR/driver_vec.o(.text) - OBJDIR/interrupts.o(.text) - OBJDIR/mmu.o(.text) - - OBJDIR/BaS.o(.text) - OBJDIR/pci.o(.text) - OBJDIR/pci_wrappers.o(.text) - OBJDIR/usb.o(.text) - OBJDIR/driver_mem.o(.text) - OBJDIR/usb_hub.o(.text) - OBJDIR/usb_mouse.o(.text) - OBJDIR/usb_kbd.o(.text) - OBJDIR/ohci-hcd.o(.text) - OBJDIR/ehci-hcd.o(.text) - OBJDIR/wait.o(.text) - - OBJDIR/nbuf.o(.text) - OBJDIR/net_timer.o(.text) - OBJDIR/queue.o(.text) - OBJDIR/nif.o(.text) - OBJDIR/fecbd.o(.text) - OBJDIR/fec.o(.text) - OBJDIR/am79c874.o(.text) - OBJDIR/bcm5222.o(.text) - OBJDIR/ip.o(.text) - OBJDIR/udp.o(text) - OBJDIR/bootp.o(text) - OBJDIR/tftp.o(text) - OBJDIR/arp.o(text) - - OBJDIR/unicode.o(.text) - OBJDIR/mmc.o(.text) - OBJDIR/ff.o(.text) - OBJDIR/sd_card.o(.text) - OBJDIR/s19reader.o(.text) - OBJDIR/bas_printf.o(.text) - OBJDIR/bas_string.o(.text) - OBJDIR/printf_helper.o(.text) - OBJDIR/cache.o(.text) - OBJDIR/dma.o(.text) - OBJDIR/MCD_dmaApi.o(.text) - OBJDIR/MCD_tasks.o(.text) - OBJDIR/MCD_tasksInit.o(.text) - - OBJDIR/video.o(.text) - OBJDIR/videl.o(.text) - OBJDIR/fbmem.o(.text) - OBJDIR/fbmon.o(.text) - OBJDIR/fbmodedb.o(.text) - OBJDIR/offscreen.o(.text) - - OBJDIR/x86decode.o(.text) - OBJDIR/x86ops.o(.text) - OBJDIR/x86ops2.o(.text) - OBJDIR/x86fpu.o(.text) - OBJDIR/x86sys.o(.text) - OBJDIR/x86biosemu.o(.text) - OBJDIR/x86debug.o(.text) - OBJDIR/x86prim_ops.o(.text) - OBJDIR/x86pcibios.o(.text) - - OBJDIR/radeon_base.o(.text) - OBJDIR/radeon_accel.o(.text) - OBJDIR/radeon_cursor.o(.text) - OBJDIR/radeon_monitor.o(.text) - - OBJDIR/xhdi_sd.o(.text) - OBJDIR/xhdi_interface.o(.text) - OBJDIR/xhdi_vec.o(.text) - -#ifdef COMPILE_RAM - /* - * if we compile to RAM anyway, there is no need to copy anything - */ - . = ALIGN(4); - __BAS_DATA_START = .; - *(.data) - __BAS_DATA_END = .; - __BAS_BSS_START = .; - *(.bss) - __BAS_BSS_END = .; -#endif /* COMPILE_RAM */ - -#if (FORMAT_ELF == 1) - *(.rodata) - *(.rodata.*) -#endif - } > bas_rom - -#if (TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS) - /* - * put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran - */ - .bas : - AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4)) - { - . = ALIGN(4); /* same alignment than AT() statement! */ - __BAS_DATA_START = .; - *(.data) - __BAS_DATA_END = .; - __BAS_BSS_START = .; - *(.bss) - __BAS_BSS_END = .; - - . = ALIGN(16); - } > bas_ram -#endif - - .driver_memory : - { - . = ALIGN(4); - _driver_mem_buffer = .; - //. = . + DRIVER_MEM_BUFFER_SIZE; - } > driver_ram - - /* - * Global memory map - */ - - /* SDRAM Initialization */ - ___SDRAM = SDRAM_START; - ___SDRAM_SIZE = SDRAM_SIZE; - _SDRAM_VECTOR_TABLE = ___SDRAM; - - /* ST-RAM */ - __STRAM = ___SDRAM; - __STRAM_END = __TOS; - - /* TOS */ - __TOS = 0x00e00000; - - /* FastRAM */ - __FASTRAM = 0x10000000; - __TARGET_ADDRESS = TARGET_ADDRESS; - -#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS - __FASTRAM_END = __BAS_IN_RAM; -#else - __FASTRAM_END = TARGET_ADDRESS; -#endif - __FASTRAM_SIZE = __FASTRAM_END - __FASTRAM; - - /* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */ - ___BOOT_FLASH = BOOTFLASH_BASE_ADDRESS; - ___BOOT_FLASH_SIZE = BOOTFLASH_SIZE; - -#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS - /* BaS */ - __BAS_LMA = LOADADDR(.bas); - __BAS_IN_RAM = ADDR(.bas); - __BAS_SIZE = SIZEOF(.bas); -#else - /* BaS is already in RAM - no need to copy anything */ - __BAS_IN_RAM = __FASTRAM_END; - __BAS_SIZE = 0; - __BAS_LMA = __BAS_IN_RAM; -#endif - - /* Other flash components */ - __FIRETOS = 0xe0400000; - __EMUTOS = EMUTOS_BASE_ADDRESS; - __EMUTOS_SIZE = 0x00100000; - - /* where FPGA data lives in flash */ - __FPGA_CONFIG = 0xe0700000; - __FPGA_CONFIG_SIZE = 0x100000; - - /* VIDEO RAM BASIS */ - __VRAM = 0x60000000; - - /* Memory mapped registers */ - __MBAR = 0xFF000000; - - /* 32KB on-chip System SRAM */ - __SYS_SRAM = __MBAR + 0x10000; - __SYS_SRAM_SIZE = 0x00008000; - - /* MMU memory mapped registers */ - __MMUBAR = 0xFF040000; - - /* - * 4KB on-chip Core SRAM0: -> exception table - */ - __RAMBAR0 = 0xFF100000; - __RAMBAR0_SIZE = 0x00001000; - - /* 4KB on-chip Core SRAM1 */ - __RAMBAR1 = 0xFF101000; - __RAMBAR1_SIZE = 0x00001000; - __SUP_SP = __RAMBAR1 + __RAMBAR1_SIZE - 4; - - /* - * this flag (if 1) indicates that FPGA configuration has been loaded through JTAG - * and shouldn't be overwritten on boot - */ - __FPGA_JTAG_LOADED = __RAMBAR1; - __FPGA_JTAG_VALID = __RAMBAR1 + 4; - /* system variables */ - - /* system variables */ - - /* RAMBAR0 0 to 0x7FF -> exception vectors */ - _rt_mod = __RAMBAR0 + 0x800; - _rt_ssp = __RAMBAR0 + 0x804; - _rt_usp = __RAMBAR0 + 0x808; - _rt_vbr = __RAMBAR0 + 0x80C; /* (8)01 */ - _rt_cacr = __RAMBAR0 + 0x810; /* 002 */ - _rt_asid = __RAMBAR0 + 0x814; /* 003 */ - _rt_acr0 = __RAMBAR0 + 0x818; /* 004 */ - _rt_acr1 = __RAMBAR0 + 0x81c; /* 005 */ - _rt_acr2 = __RAMBAR0 + 0x820; /* 006 */ - _rt_acr3 = __RAMBAR0 + 0x824; /* 007 */ - _rt_mmubar = __RAMBAR0 + 0x828; /* 008 */ - _rt_sr = __RAMBAR0 + 0x82c; - _d0_save = __RAMBAR0 + 0x830; - _a7_save = __RAMBAR0 + 0x834; - _video_tlb = __RAMBAR0 + 0x838; - _video_sbt = __RAMBAR0 + 0x83C; - _rt_mbar = __RAMBAR0 + 0x844; /* (c)0f */ - -} diff --git a/bas_firebee.bdm b/bas_firebee.bdm deleted file mode 100755 index 116fb57..0000000 --- a/bas_firebee.bdm +++ /dev/null @@ -1,68 +0,0 @@ -#!/usr/local/bin/bdmctrl -D2 -v9 -d9 -# -# firebee board initialization for bdmctrl -# -open $1 -reset -sleep 10 - -# Turn on MBAR at 0xFF00_0000 -write-ctrl 0x0C0F 0xFF000000 - -# set VBR -write-ctrl 0x0801 0x00000000 - -# Turn on RAMBAR0 at address FF10_0000 -write-ctrl 0x0C04 0xFF100007 - -# Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently) -write-ctrl 0x0C05 0xFF101001 - -# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) -write 0xFF000500 0xE0000000 4 -write 0xFF000508 0x00041180 4 -write 0xFF000504 0x007F0001 4 -wait - -# Init CS1 (Atari I/O address range) -write 0xFF00050C 0xFFF00000 4 -write 0xFF000514 0x00002180 4 -write 0xFF000510 0x000F0001 4 -# Init CS2 (FireBee 32 bit I/O address range) -write 0xFF000518 0xF0000000 4 -write 0xFF000520 0x00002100 4 -write 0xFF00051C 0x07FF0001 4 -# Init CS3 (FireBee 16 bit I/O address range) -write 0xFF000524 0xF8000000 4 -write 0xFF00052C 0x00000180 4 -write 0xFF000528 0x03FF0001 4 -# Init CS4 (FireBee video address range) -write 0xFF000530 0x40000000 4 -write 0xFF000538 0x00000018 4 -write 0xFF000534 0x003F0001 4 - - -# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes -write 0xFF000004 0x000002AA 4 # SDRAMDS configuration -write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF) -write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF) -write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF) -write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF) -write 0xFF000108 0x73622830 4 # SDCFG1 -write 0xFF00010C 0x46770000 4 # SDCFG2 - -write 0xFF000104 0xE10D0002 4 # SDCR + IPALL -write 0xFF000100 0x40010000 4 # SDMR (write to LEMR) -write 0xFF000100 0x048D0000 4 # SDMR (write to LMR) -sleep 100 -write 0xFF000104 0xE10D0002 4 # SDCR + IPALL -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000100 0x008D0000 4 # SDMR (write to LMR) -write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh) -sleep 100 - -load -v firebee/ram.elf - -execute -wait diff --git a/bas_m5484.bdm b/bas_m5484.bdm deleted file mode 100755 index 59a40a8..0000000 --- a/bas_m5484.bdm +++ /dev/null @@ -1,56 +0,0 @@ -#!/usr/local/bin/bdmctrl -D2 -v9 -d9 -# -# firebee board initialization for bdmctrl -# -open $1 -reset -sleep 10 - -wait - -# set VBR -write-ctrl 0x0801 0x00000000 -dump-register VBR - -# Turn on MBAR at 0xFF00_0000 -write-ctrl 0x0C0F 0xFF000000 -dump-register MBAR - -# Turn on RAMBAR0 at address FF10_0000 -write-ctrl 0x0C04 0xFF100007 - -# Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently) -write-ctrl 0x0C05 0xFF101001 - -# Init CS0 (BootFLASH @ E000_0000 - E03F_FFFF 8Mbytes) -write 0xFF000500 0xE0000000 4 -write 0xFF000508 0x00041180 4 -write 0xFF000504 0x003F0001 4 -wait - -# SDRAM Initialization @ 0000_0000 - 0400_0000 64 MBytes -write 0xFF000004 0x000002AA 4 # SDRAMDS configuration -write 0xFF000020 0x00000019 4 # SDRAM CS0 configuration (64Mbytes 0000_0000 - 07FF_FFFF) -write 0xFF000024 0x00000000 4 # SDRAM CS1 configuration -write 0xFF000028 0x00000000 4 # SDRAM CS2 configuration -write 0xFF00002C 0x00000000 4 # SDRAM CS3 configuration - -write 0xFF000108 0x73711630 4 # SDCFG1 -write 0xFF00010C 0x46370000 4 # SDCFG2 - -write 0xFF000104 0xE10B0002 4 # SDCR + IPALL -write 0xFF000100 0x40010000 4 # SDMR (write to LEMR) -write 0xFF000100 0x058D0000 4 # SDMR (write to LMR) -sleep 100 -write 0xFF000104 0xE10D0002 4 # SDCR + IPALL -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000100 0x018D0000 4 # SDMR (write to LMR) -write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh) -sleep 100 - -load -v m5484lite/ram.elf -execute -# wait is _needed_ here if using the P&E BDM interface. Otherwise -# the Coldfire resets after some time! -wait diff --git a/basflash.lk.in b/basflash.lk.in deleted file mode 100644 index 109310c..0000000 --- a/basflash.lk.in +++ /dev/null @@ -1,113 +0,0 @@ -#ifdef MACHINE_FIREBEE -#include "firebee.h" -#endif /* MACHINE_FIREBEE */ - -#ifdef MACHINE_M5484LITE -#include "m5484l.h" -#endif /* MACHINE_M5484LITE */ - -MEMORY -{ - flasher (WX) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000 /* target to load basflash */ -} - -SECTIONS -{ - .text : - { - OBJDIR/basflash_start.o(.text) - OBJDIR/basflash.o(.text) - - *(.data) - *(.bss) - *(.rodata) - *(.rodata.*) - } > flasher - - .bas : - { - } - - #define BAS_LABEL_LMA(x) ((x)) - /* _xprintf_before_copy = BAS_LABEL_LMA(_xprintf); */ - /* _display_progress_before_copy = BAS_LABEL_LMA(_display_progress); */ - /* _flush_and_invalidate_caches_before_copy = BAS_LABEL_LMA(_flush_and_invalidate_caches); */ - - /* - * Global memory map - */ - - /* SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes */ - ___SDRAM = 0x00000000; - ___SDRAM_SIZE = 0x20000000; - - /* ST-RAM */ - __STRAM = ___SDRAM; - __STRAM_END = __TOS; - - /* TOS */ - __TOS = 0x00e00000; - - /* FastRAM */ - __FASTRAM = 0x10000000; - __FASTRAM_END = 0x1FFFFFFF; - - /* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */ - ___BOOT_FLASH = 0xe0000000; - ___BOOT_FLASH_SIZE = 0x00800000; - - /* BaS */ - __BAS_LMA = LOADADDR(.bas); - __BAS_IN_RAM = ADDR(.bas); - __BAS_SIZE = SIZEOF(.bas); - - /* Other flash components */ - __FIRETOS = 0xe0400000; - __EMUTOS = 0xe0600000; - __EMUTOS_SIZE = 0x00100000; - - /* VIDEO RAM BASIS */ - __VRAM = 0x60000000; - - /* Memory mapped registers */ - __MBAR = 0xFF000000; - - /* 32KB on-chip System SRAM */ - __SYS_SRAM = 0xFF010000; - __SYS_SRAM_SIZE = 0x00008000; - - /* MMU memory mapped registers */ - __MMUBAR = 0xFF040000; - - /* - * 4KB on-chip Core SRAM0: -> exception table and exception stack - */ - __RAMBAR0 = 0xFF100000; - __RAMBAR0_SIZE = 0x00001000; - __SUP_SP = __RAMBAR0 + __RAMBAR0_SIZE - 4; - - /* system variables */ - - /* RAMBAR0 0 to 0x7FF -> exception vectors */ - _rt_mod = __RAMBAR0 + 0x800; - _rt_ssp = __RAMBAR0 + 0x804; - _rt_usp = __RAMBAR0 + 0x808; - _rt_vbr = __RAMBAR0 + 0x80C; /* (8)01 */ - _rt_cacr = __RAMBAR0 + 0x810; /* 002 */ - _rt_asid = __RAMBAR0 + 0x814; /* 003 */ - _rt_acr0 = __RAMBAR0 + 0x818; /* 004 */ - _rt_acr1 = __RAMBAR0 + 0x81c; /* 005 */ - _rt_acr2 = __RAMBAR0 + 0x820; /* 006 */ - _rt_acr3 = __RAMBAR0 + 0x824; /* 007 */ - _rt_mmubar = __RAMBAR0 + 0x828; /* 008 */ - _rt_sr = __RAMBAR0 + 0x82c; - _d0_save = __RAMBAR0 + 0x830; - _a7_save = __RAMBAR0 + 0x834; - _video_tlb = __RAMBAR0 + 0x838; - _video_sbt = __RAMBAR0 + 0x83C; - _rt_mbar = __RAMBAR0 + 0x844; /* (c)0f */ - - /* 4KB on-chip Core SRAM1: -> modified code */ - __RAMBAR1 = 0xFF101000; - __RAMBAR1_SIZE = 0x00001000; - } diff --git a/check.bdm b/check.bdm deleted file mode 100755 index b0b3e5d..0000000 --- a/check.bdm +++ /dev/null @@ -1,76 +0,0 @@ -#!/usr/local/bin/bdmctrl -D2 -v9 -d9 -# -# firebee board initialization for bdmctrl -# -open $1 -reset - -# set VBR -write-ctrl 0x0801 0x00000000 -# Turn on MBAR at 0xFF00_0000 -write-ctrl 0x0C0F 0xFF000000 - -# Turn on RAMBAR0 at address FF10_0000 -write-ctrl 0x0C04 0xFF100007 - -# Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently) -write-ctrl 0x0C05 0xFF101001 - -# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) -write 0xFF000500 0xE0000000 4 -write 0xFF000508 0x00041180 4 -write 0xFF000504 0x007F0001 4 -wait - -# Init CS1 (Atari I/O address range) -write 0xFF00050C 0xFFF00000 4 -write 0xFF000514 0x00002180 4 -write 0xFF000510 0x000F0001 4 -# Init CS2 (FireBee 32 bit I/O address range) -write 0xFF000518 0xF0000000 4 -write 0xFF000520 0x00002100 4 -write 0xFF00051C 0x07FF0001 4 -# Init CS3 (FireBee 16 bit I/O address range) -write 0xFF000524 0xF8000000 4 -write 0xFF00052C 0x00000180 4 -write 0xFF000528 0x03FF0001 4 -# Init CS4 (FireBee video address range) -write 0xFF000530 0x40000000 4 -write 0xFF000538 0x00000018 4 -write 0xFF000534 0x003F0001 4 - - -# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes -write 0xFF000004 0x000002AA 4 # SDRAMDS configuration -write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF) -write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF) -write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF) -write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF) -write 0xFF000108 0x73622830 4 # SDCFG1 -write 0xFF00010C 0x46770000 4 # SDCFG2 - -write 0xFF000104 0xE10D0002 4 # SDCR + IPALL -write 0xFF000100 0x40010000 4 # SDMR (write to LEMR) -write 0xFF000100 0x048D0000 4 # SDMR (write to LMR) - -write 0xFF000104 0xE10D0002 4 # SDCR + IPALL -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000100 0x008D0000 4 # SDMR (write to LMR) -write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh) - -dump-register SR -write-ctrl 0x80e 0x2700 -write-ctrl 0x2 0xa50c8120 -dump-register D0 -dump-register ASID -dump-register ACR0 -dump-register ACR1 -dump-register ACR2 -dump-register ACR3 -dump-register SR -dump-register CACR -dump-register RAMBAR1 -dump-register RAMBAR2 -dump-register MBAR -dump-register 0xc05 \ No newline at end of file diff --git a/dma/MCD_dmaApi.c b/dma/MCD_dmaApi.c deleted file mode 100755 index 839fce1..0000000 --- a/dma/MCD_dmaApi.c +++ /dev/null @@ -1,933 +0,0 @@ -/* - * File: MCD_dmaApi.c - * Purpose: Main C file for multi-channel DMA API. - * - * Notes: - */ - -#include "MCD_dma.h" -#include "MCD_tasksInit.h" -#include "MCD_progCheck.h" - -/********************************************************************/ -/* - * This is an API-internal pointer to the DMA's registers - */ -dmaRegs *MCD_dmaBar; - -/* - * These are the real and model task tables as generated by the - * build process - */ -extern TaskTableEntry MCD_realTaskTableSrc[NCHANNELS]; -extern TaskTableEntry MCD_modelTaskTableSrc[NUMOFVARIANTS]; - -/* - * However, this (usually) gets relocated to on-chip SRAM, at which - * point we access them as these tables - */ -volatile TaskTableEntry *MCD_taskTable; -TaskTableEntry *MCD_modelTaskTable; - - -/* - * MCD_chStatus[] is an array of status indicators for remembering - * whether a DMA has ever been attempted on each channel, pausing - * status, etc. - */ -static int MCD_chStatus[NCHANNELS] = -{ - MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, - MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, - MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, - MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA -}; - -/* - * Prototypes for local functions - */ -static void MCD_memcpy (int *dest, int *src, u32 size); -static void MCD_resmActions (int channel); - -/* - * Buffer descriptors used for storage of progress info for single Dmas - * Also used as storage for the DMA for CRCs for single DMAs - * Otherwise, the DMA does not parse these buffer descriptors - */ -#ifdef MCD_INCLUDE_EU -extern MCD_bufDesc MCD_singleBufDescs[NCHANNELS]; -#else -MCD_bufDesc MCD_singleBufDescs[NCHANNELS]; -#endif -MCD_bufDesc *MCD_relocBuffDesc; - - -/* - * Defines for the debug control register's functions - */ -#define DBG_CTL_COMP1_TASK (0x00002000) /* have comparator 1 look for a task # */ -#define DBG_CTL_ENABLE (DBG_CTL_AUTO_ARM | \ - DBG_CTL_BREAK | \ - DBG_CTL_INT_BREAK | \ - DBG_CTL_COMP1_TASK) -#define DBG_CTL_DISABLE (DBG_CTL_AUTO_ARM | \ - DBG_CTL_INT_BREAK | \ - DBG_CTL_COMP1_TASK) -#define DBG_KILL_ALL_STAT (0xFFFFFFFF) - -/* - * Offset to context save area where progress info is stored - */ -#define CSAVE_OFFSET 10 - -/* - * Defines for Byte Swapping - */ -#define MCD_BYTE_SWAP_KILLER 0xFFF8888F -#define MCD_NO_BYTE_SWAP_ATALL 0x00040000 - -/* - * Execution Unit Identifiers - */ -#define MAC 0 /* legacy - not used */ -#define LUAC 1 /* legacy - not used */ -#define CRC 2 /* legacy - not used */ -#define LURC 3 /* Logic Unit with CRC */ - -/* - * Task Identifiers - */ -#define TASK_CHAINNOEU 0 -#define TASK_SINGLENOEU 1 -#ifdef MCD_INCLUDE_EU -#define TASK_CHAINEU 2 -#define TASK_SINGLEEU 3 -#define TASK_FECRX 4 -#define TASK_FECTX 5 -#else -#define TASK_CHAINEU 0 -#define TASK_SINGLEEU 1 -#define TASK_FECRX 2 -#define TASK_FECTX 3 -#endif - -/* - * Structure to remember which variant is on which channel - * TBD- need this? - */ -typedef struct MCD_remVariants_struct MCD_remVariant; -struct MCD_remVariants_struct -{ - int remDestRsdIncr[NCHANNELS]; /* -1,0,1 */ - int remSrcRsdIncr[NCHANNELS]; /* -1,0,1 */ - s16 remDestIncr[NCHANNELS]; /* DestIncr */ - s16 remSrcIncr[NCHANNELS]; /* srcIncr */ - u32 remXferSize[NCHANNELS]; /* xferSize */ -}; - -/* - * Structure to remember the startDma parameters for each channel - */ -MCD_remVariant MCD_remVariants; -/********************************************************************/ -/* - * Function: MCD_initDma - * Purpose: Initializes the DMA API by setting up a pointer to the DMA - * registers, relocating and creating the appropriate task - * structures, and setting up some global settings - * Arguments: - * dmaBarAddr - pointer to the multichannel DMA registers - * taskTableDest - location to move DMA task code and structs to - * flags - operational parameters - * Return Value: - * MCD_TABLE_UNALIGNED if taskTableDest is not 512-byte aligned - * MCD_OK otherwise - */ -extern u32 MCD_funcDescTab0[]; - -int MCD_initDma (dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags) -{ - int i; - TaskTableEntry *entryPtr; - - /* setup the local pointer to register set */ - MCD_dmaBar = dmaBarAddr; - - /* do we need to move/create a task table */ - if ((flags & MCD_RELOC_TASKS) != 0) - { - int fixedSize; - u32 *fixedPtr; - /*int *tablePtr = taskTableDest;TBD*/ - int varTabsOffset, funcDescTabsOffset, contextSavesOffset; - int taskDescTabsOffset; - int taskTableSize, varTabsSize, funcDescTabsSize, contextSavesSize; - int taskDescTabSize; - - int i; - - /* check if physical address is aligned on 512 byte boundary */ - if (((u32)taskTableDest & 0x000001ff) != 0) - return(MCD_TABLE_UNALIGNED); - - MCD_taskTable = taskTableDest; /* set up local pointer to task Table */ - - /* - * Create a task table: - * - compute aligned base offsets for variable tables and - * function descriptor tables, then - * - loop through the task table and setup the pointers - * - copy over model task table with the the actual task descriptor - * tables - */ - - taskTableSize = NCHANNELS * sizeof(TaskTableEntry); - /* align variable tables to size */ - varTabsOffset = taskTableSize + (u32)taskTableDest; - if ((varTabsOffset & (VAR_TAB_SIZE - 1)) != 0) - varTabsOffset = (varTabsOffset + VAR_TAB_SIZE) & (~VAR_TAB_SIZE); - /* align function descriptor tables */ - varTabsSize = NCHANNELS * VAR_TAB_SIZE; - funcDescTabsOffset = varTabsOffset + varTabsSize; - - if ((funcDescTabsOffset & (FUNCDESC_TAB_SIZE - 1)) != 0) - funcDescTabsOffset = (funcDescTabsOffset + FUNCDESC_TAB_SIZE) & - (~FUNCDESC_TAB_SIZE); - - funcDescTabsSize = FUNCDESC_TAB_NUM * FUNCDESC_TAB_SIZE; - contextSavesOffset = funcDescTabsOffset + funcDescTabsSize; - contextSavesSize = (NCHANNELS * CONTEXT_SAVE_SIZE); - fixedSize = taskTableSize + varTabsSize + funcDescTabsSize + - contextSavesSize; - - /* zero the thing out */ - fixedPtr = (u32 *)taskTableDest; - for (i = 0;i<(fixedSize/4);i++) - fixedPtr[i] = 0; - - entryPtr = (TaskTableEntry*)MCD_taskTable; - /* set up fixed pointers */ - for (i = 0; i < NCHANNELS; i++) - { - entryPtr[i].varTab = (u32)varTabsOffset; /* update ptr to local value */ - entryPtr[i].FDTandFlags = (u32)funcDescTabsOffset | MCD_TT_FLAGS_DEF; - entryPtr[i].contextSaveSpace = (u32)contextSavesOffset; - varTabsOffset += VAR_TAB_SIZE; -#ifdef MCD_INCLUDE_EU /* if not there is only one, just point to the same one */ - funcDescTabsOffset += FUNCDESC_TAB_SIZE; -#endif - contextSavesOffset += CONTEXT_SAVE_SIZE; - } - /* copy over the function descriptor table */ - for ( i = 0; i < FUNCDESC_TAB_NUM; i++) - { - MCD_memcpy((void*)(entryPtr[i].FDTandFlags & ~MCD_TT_FLAGS_MASK), - (void*)MCD_funcDescTab0, FUNCDESC_TAB_SIZE); - } - - /* copy model task table to where the context saves stuff leaves off*/ - MCD_modelTaskTable = (TaskTableEntry*)contextSavesOffset; - - MCD_memcpy ((void*)MCD_modelTaskTable, (void*)MCD_modelTaskTableSrc, - NUMOFVARIANTS * sizeof(TaskTableEntry)); - - entryPtr = MCD_modelTaskTable; /* point to local version of - model task table */ - taskDescTabsOffset = (u32)MCD_modelTaskTable + - (NUMOFVARIANTS * sizeof(TaskTableEntry)); - - /* copy actual task code and update TDT ptrs in local model task table */ - for (i = 0; i < NUMOFVARIANTS; i++) - { - taskDescTabSize = entryPtr[i].TDTend - entryPtr[i].TDTstart + 4; - MCD_memcpy ((void*)taskDescTabsOffset, (void*)entryPtr[i].TDTstart, taskDescTabSize); - entryPtr[i].TDTstart = (u32)taskDescTabsOffset; - taskDescTabsOffset += taskDescTabSize; - entryPtr[i].TDTend = (u32)taskDescTabsOffset - 4; - } -#ifdef MCD_INCLUDE_EU /* Tack single DMA BDs onto end of code so API controls - where they are since DMA might write to them */ - MCD_relocBuffDesc = (MCD_bufDesc*)(entryPtr[NUMOFVARIANTS - 1].TDTend + 4); -#else /* DMA does not touch them so they can be wherever and we don't need to - waste SRAM on them */ - MCD_relocBuffDesc = MCD_singleBufDescs; -#endif - } - else - { - /* point the would-be relocated task tables and the - buffer descriptors to the ones the linker generated */ - - if (((u32)MCD_realTaskTableSrc & 0x000001ff) != 0) - return(MCD_TABLE_UNALIGNED); - - /* need to add code to make sure that every thing else is aligned properly TBD*/ - /* this is problematic if we init more than once or after running tasks, - need to add variable to see if we have aleady init'd */ - entryPtr = MCD_realTaskTableSrc; - for (i = 0; i < NCHANNELS; i++) - { - if (((entryPtr[i].varTab & (VAR_TAB_SIZE - 1)) != 0) || - ((entryPtr[i].FDTandFlags & (FUNCDESC_TAB_SIZE - 1)) != 0)) - return(MCD_TABLE_UNALIGNED); - } - - MCD_taskTable = MCD_realTaskTableSrc; - MCD_modelTaskTable = MCD_modelTaskTableSrc; - MCD_relocBuffDesc = MCD_singleBufDescs; - } - - - /* Make all channels as totally inactive, and remember them as such: */ - - MCD_dmaBar->taskbar = (u32) MCD_taskTable; - for (i = 0; i < NCHANNELS; i++) - { - MCD_dmaBar->taskControl[i] = 0x0; - MCD_chStatus[i] = MCD_NO_DMA; - } - - /* Set up pausing mechanism to inactive state: */ - MCD_dmaBar->debugComp1 = 0; /* no particular values yet for either comparator registers */ - MCD_dmaBar->debugComp2 = 0; - MCD_dmaBar->debugControl = DBG_CTL_DISABLE; - MCD_dmaBar->debugStatus = DBG_KILL_ALL_STAT; - - /* enable or disable commbus prefetch, really need an ifdef or - something to keep from trying to set this in the 8220 */ - if ((flags & MCD_COMM_PREFETCH_EN) != 0) - MCD_dmaBar->ptdControl &= ~PTD_CTL_COMM_PREFETCH; - else - MCD_dmaBar->ptdControl |= PTD_CTL_COMM_PREFETCH; - - return(MCD_OK); -} -/*********************** End of MCD_initDma() ***********************/ - -/********************************************************************/ -/* Function: MCD_dmaStatus - * Purpose: Returns the status of the DMA on the requested channel - * Arguments: channel - channel number - * Returns: Predefined status indicators - */ -int MCD_dmaStatus (int channel) -{ - u16 tcrValue; - - if((channel < 0) || (channel >= NCHANNELS)) - return(MCD_CHANNEL_INVALID); - - tcrValue = MCD_dmaBar->taskControl[channel]; - if ((tcrValue & TASK_CTL_EN) == 0) - { /* nothing running */ - /* if last reported with task enabled */ - if ( MCD_chStatus[channel] == MCD_RUNNING - || MCD_chStatus[channel] == MCD_IDLE) - MCD_chStatus[channel] = MCD_DONE; - } - else /* something is running */ - { - /* There are three possibilities: paused, running or idle. */ - if ( MCD_chStatus[channel] == MCD_RUNNING - || MCD_chStatus[channel] == MCD_IDLE) - { - MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT; - /* This register is selected to know which initiator is - actually asserted. */ - if ((MCD_dmaBar->ptdDebug >> channel ) & 0x1 ) - MCD_chStatus[channel] = MCD_RUNNING; - else - MCD_chStatus[channel] = MCD_IDLE; - /* do not change the status if it is already paused. */ - } - } - return MCD_chStatus[channel]; -} -/******************** End of MCD_dmaStatus() ************************/ - -/********************************************************************/ -/* Function: MCD_startDma - * Ppurpose: Starts a particular kind of DMA - * Arguments: see below - * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK - */ - -int MCD_startDma ( - int channel, /* the channel on which to run the DMA */ - s8 *srcAddr, /* the address to move data from, or physical buffer-descriptor address */ - s16 srcIncr, /* the amount to increment the source address per transfer */ - s8 *destAddr, /* the address to move data to */ - s16 destIncr, /* the amount to increment the destination address per transfer */ - u32 dmaSize, /* the number of bytes to transfer independent of the transfer size */ - u32 xferSize, /* the number bytes in of each data movement (1, 2, or 4) */ - u32 initiator, /* what device initiates the DMA */ - int priority, /* priority of the DMA */ - u32 flags, /* flags describing the DMA */ - u32 funcDesc /* a description of byte swapping, bit swapping, and CRC actions */ -#ifdef MCD_NEED_ADDR_TRANS - s8 *srcAddrVirt /* virtual buffer descriptor address TBD*/ -#endif -) -{ - int srcRsdIncr, destRsdIncr; - int *cSave; - short xferSizeIncr; - int tcrCount = 0; -#ifdef MCD_INCLUDE_EU - u32 *realFuncArray; -#endif - - if((channel < 0) || (channel >= NCHANNELS)) - return(MCD_CHANNEL_INVALID); - - /* tbd - need to determine the proper response to a bad funcDesc when not - including EU functions, for now, assign a benign funcDesc, but maybe - should return an error */ -#ifndef MCD_INCLUDE_EU - funcDesc = MCD_FUNC_NOEU1; -#endif - -#ifdef MCD_DEBUG -printf("startDma:Setting up params\n"); -#endif - /* Set us up for task-wise priority. We don't technically need to do this on every start, but - since the register involved is in the same longword as other registers that users are in control - of, setting it more than once is probably preferable. That since the documentation doesn't seem - to be completely consistent about the nature of the PTD control register. */ - MCD_dmaBar->ptdControl |= (u16) 0x8000; -#if 1 /* Not sure what we need to keep here rtm TBD */ - /* Calculate additional parameters to the regular DMA calls. */ - srcRsdIncr = srcIncr < 0 ? -1 : (srcIncr > 0 ? 1 : 0); - destRsdIncr = destIncr < 0 ? -1 : (destIncr > 0 ? 1 : 0); - - xferSizeIncr = (xferSize & 0xffff) | 0x20000000; - - /* Remember for each channel which variant is running. */ - MCD_remVariants.remSrcRsdIncr[channel] = srcRsdIncr; - MCD_remVariants.remDestRsdIncr[channel] = destRsdIncr; - MCD_remVariants.remDestIncr[channel] = destIncr; - MCD_remVariants.remSrcIncr[channel] = srcIncr; - MCD_remVariants.remXferSize[channel] = xferSize; -#endif - - cSave = (int*)(MCD_taskTable[channel].contextSaveSpace) + CSAVE_OFFSET + CURRBD; - -#ifdef MCD_INCLUDE_EU /* may move this to EU specific calls */ - realFuncArray = (u32 *) (MCD_taskTable[channel].FDTandFlags & 0xffffff00); - /* Modify the LURC's normal and byte-residue-loop functions according to parameter. */ - realFuncArray[(LURC*16)] = xferSize == 4 ? - funcDesc : xferSize == 2 ? - funcDesc & 0xfffff00f : funcDesc & 0xffff000f; - realFuncArray[(LURC*16+1)] = (funcDesc & MCD_BYTE_SWAP_KILLER) | MCD_NO_BYTE_SWAP_ATALL; -#endif - /* Write the initiator field in the TCR, and also set the initiator-hold - bit. Note that,due to a hardware quirk, this could collide with an - MDE access to the initiator-register file, so we have to verify that the write - reads back correctly. */ - - MCD_dmaBar->taskControl[channel] = - (initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM; - - while(((MCD_dmaBar->taskControl[channel] & 0x1fff) != - ((initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM)) && - (tcrCount < 1000)) - { - tcrCount++; - /*MCD_dmaBar->ptd_tcr[channel] = (initiator << 8) | 0x0020;*/ - MCD_dmaBar->taskControl[channel] = - (initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM; - } - - MCD_dmaBar->priority[channel] = (u8)priority & PRIORITY_PRI_MASK; - /* should be albe to handle this stuff with only one write to ts reg - tbd */ - if (channel < 8 && channel >= 0) - { - MCD_dmaBar->taskSize0 &= ~(0xf << (7-channel)*4); - MCD_dmaBar->taskSize0 |= (xferSize & 3) << (((7 - channel)*4) + 2); - MCD_dmaBar->taskSize0 |= (xferSize & 3) << ((7 - channel)*4); - } - else - { - MCD_dmaBar->taskSize1 &= ~(0xf << (15-channel)*4); - MCD_dmaBar->taskSize1 |= (xferSize & 3) << (((15 - channel)*4) + 2); - MCD_dmaBar->taskSize1 |= (xferSize & 3) << ((15 - channel)*4); - } - - /* setup task table flags/options which mostly control the line buffers */ - MCD_taskTable[channel].FDTandFlags &= ~MCD_TT_FLAGS_MASK; - MCD_taskTable[channel].FDTandFlags |= (MCD_TT_FLAGS_MASK & flags); - - if (flags & MCD_FECTX_DMA) - { - /* TDTStart and TDTEnd */ - MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_FECTX].TDTstart; - MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_FECTX].TDTend; - MCD_startDmaENetXmit(srcAddr, srcAddr, destAddr, MCD_taskTable, channel); - } - else if (flags & MCD_FECRX_DMA) - { - /* TDTStart and TDTEnd */ - MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_FECRX].TDTstart; - MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_FECRX].TDTend; - MCD_startDmaENetRcv(srcAddr, srcAddr, destAddr, MCD_taskTable, channel); - } - else if(flags & MCD_SINGLE_DMA) - { - /* this buffer descriptor is used for storing off initial parameters for later - progress query calculation and for the DMA to write the resulting checksum - The DMA does not use this to determine how to operate, that info is passed - with the init routine*/ - MCD_relocBuffDesc[channel].srcAddr = srcAddr; - MCD_relocBuffDesc[channel].destAddr = destAddr; - MCD_relocBuffDesc[channel].lastDestAddr = destAddr; /* definitely not its final value */ - MCD_relocBuffDesc[channel].dmaSize = dmaSize; - MCD_relocBuffDesc[channel].flags = 0; /* not used */ - MCD_relocBuffDesc[channel].csumResult = 0; /* not used */ - MCD_relocBuffDesc[channel].next = 0; /* not used */ - - /* Initialize the progress-querying stuff to show no progress:*/ - ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET] = (int)srcAddr; - ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET] = (int)destAddr; - ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET] = 0; - ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET] = - (u32) &(MCD_relocBuffDesc[channel]); - /* tbd - need to keep the user from trying to call the EU routine - when MCD_INCLUDE_EU is not defined */ - if( funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2) - { - /* TDTStart and TDTEnd */ - MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_SINGLENOEU].TDTstart; - MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_SINGLENOEU].TDTend; - MCD_startDmaSingleNoEu(srcAddr, srcIncr, destAddr, destIncr, dmaSize, - xferSizeIncr, flags, (int *)&(MCD_relocBuffDesc[channel]), cSave, - MCD_taskTable, channel); - } - else - { - /* TDTStart and TDTEnd */ - MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_SINGLEEU].TDTstart; - MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_SINGLEEU].TDTend; - MCD_startDmaSingleEu(srcAddr, srcIncr, destAddr, destIncr, dmaSize, - xferSizeIncr, flags, (int *)&(MCD_relocBuffDesc[channel]), cSave, - MCD_taskTable, channel); - } - } - else - { /* chained DMAS */ - /* Initialize the progress-querying stuff to show no progress:*/ -#if 1 /* (!defined(MCD_NEED_ADDR_TRANS)) */ - ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET] - = (int)((MCD_bufDesc*) srcAddr)->srcAddr; - ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET] - = (int)((MCD_bufDesc*) srcAddr)->destAddr; -#else /* if using address translation, need the virtual addr of the first buffdesc */ - ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET] - = (int)((MCD_bufDesc*) srcAddrVirt)->srcAddr; - ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET] - = (int)((MCD_bufDesc*) srcAddrVirt)->destAddr; -#endif - ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET] = 0; - ((volatile int *)MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET] = (u32) srcAddr; - - if( funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2) - { - /*TDTStart and TDTEnd*/ - MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_CHAINNOEU].TDTstart; - MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_CHAINNOEU].TDTend; - MCD_startDmaChainNoEu((int *)srcAddr, srcIncr, destIncr, xferSize, - xferSizeIncr, cSave, MCD_taskTable, channel); - } - else - { - /*TDTStart and TDTEnd*/ - MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_CHAINEU].TDTstart; - MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_CHAINEU].TDTend; - MCD_startDmaChainEu((int *)srcAddr, srcIncr, destIncr, xferSize, - xferSizeIncr, cSave, MCD_taskTable, channel); - } - } - MCD_chStatus[channel] = MCD_IDLE; - return(MCD_OK); -} - -/************************ End of MCD_startDma() *********************/ - -/********************************************************************/ -/* Function: MCD_XferProgrQuery - * Purpose: Returns progress of DMA on requested channel - * Arguments: channel - channel to retrieve progress for - * progRep - pointer to user supplied MCD_XferProg struct - * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK - * - * Notes: - * MCD_XferProgrQuery() upon completing or after aborting a DMA, or - * while the DMA is in progress, this function returns the first - * DMA-destination address not (or not yet) used in the DMA. When - * encountering a non-ready buffer descriptor, the information for - * the last completed descriptor is returned. - * - * MCD_XferProgQuery() has to avoid the possibility of getting - * partially-updated information in the event that we should happen - * to query DMA progress just as the DMA is updating it. It does that - * by taking advantage of the fact context is not saved frequently for - * the most part. We therefore read it at least twice until we get the - * same information twice in a row. - * - * Because a small, but not insignificant, amount of time is required - * to write out the progress-query information, especially upon - * completion of the DMA, it would be wise to guarantee some time lag - * between successive readings of the progress-query information. - */ - -/* - * How many iterations of the loop below to execute to stabilize values - */ -#define STABTIME 0 - -int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep) -{ - MCD_XferProg prevRep; - int again; /* true if we are to try again to get consistent results */ - int i; /* used as a time-waste counter */ - int destDiffBytes; /* Total number of bytes that we think actually got xfered. */ - int numIterations; /* number of iterations */ - int bytesNotXfered; /* bytes that did not get xfered. */ - s8 *LWAlignedInitDestAddr, *LWAlignedCurrDestAddr; - int subModVal, addModVal; /* Mode values to added and subtracted from the - final destAddr */ - - if((channel < 0) || (channel >= NCHANNELS)) - return(MCD_CHANNEL_INVALID); - - /* Read a trial value for the progress-reporting values*/ - prevRep.lastSrcAddr = - (s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET]; - prevRep.lastDestAddr = - (s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET]; - prevRep.dmaSize = ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET]; - prevRep.currBufDesc = - (MCD_bufDesc*) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET]; - /* Repeatedly reread those values until they match previous values: */ - do { - /* Waste a little bit of time to ensure stability: */ - for (i = 0; i < STABTIME; i++) - i += i >> 2; /* make sure this loop does something so that it doesn't get optimized out */ - /* Check them again: */ - progRep->lastSrcAddr = - (s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET]; - progRep->lastDestAddr = - (s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET]; - progRep->dmaSize = ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET]; - progRep->currBufDesc = - (MCD_bufDesc*) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET]; - /* See if they match: */ - if ( prevRep.lastSrcAddr != progRep->lastSrcAddr - || prevRep.lastDestAddr != progRep->lastDestAddr - || prevRep.dmaSize != progRep->dmaSize - || prevRep.currBufDesc != progRep->currBufDesc) - { - /* If they don't match, remember previous values and try again:*/ - prevRep.lastSrcAddr = progRep->lastSrcAddr; - prevRep.lastDestAddr = progRep->lastDestAddr; - prevRep.dmaSize = progRep->dmaSize; - prevRep.currBufDesc = progRep->currBufDesc; - again = MCD_TRUE; - } - else - again = MCD_FALSE; - } while (again == MCD_TRUE); - - - /* Update the dCount, srcAddr and destAddr */ - /* To calculate dmaCount, we consider destination address. C - overs M1,P1,Z for destination */ - switch(MCD_remVariants.remDestRsdIncr[channel]) { - case MINUS1: - subModVal = ((int)progRep->lastDestAddr) & ((MCD_remVariants.remXferSize[channel]) - 1); - addModVal = ((int)progRep->currBufDesc->destAddr) & ((MCD_remVariants.remXferSize[channel]) - 1); - LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr) - addModVal; - LWAlignedCurrDestAddr = (progRep->lastDestAddr) - subModVal; - destDiffBytes = LWAlignedInitDestAddr - LWAlignedCurrDestAddr; - bytesNotXfered = (destDiffBytes/MCD_remVariants.remDestIncr[channel]) * - ( MCD_remVariants.remDestIncr[channel] - + MCD_remVariants.remXferSize[channel]); - progRep->dmaSize = destDiffBytes - bytesNotXfered + addModVal - subModVal; - break; - case ZERO: - progRep->lastDestAddr = progRep->currBufDesc->destAddr; - break; - case PLUS1: - /* This value has to be subtracted from the final calculated dCount. */ - subModVal = ((int)progRep->currBufDesc->destAddr) & ((MCD_remVariants.remXferSize[channel]) - 1); - /* These bytes are already in lastDestAddr. */ - addModVal = ((int)progRep->lastDestAddr) & ((MCD_remVariants.remXferSize[channel]) - 1); - LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr) - subModVal; - LWAlignedCurrDestAddr = (progRep->lastDestAddr) - addModVal; - destDiffBytes = (progRep->lastDestAddr - LWAlignedInitDestAddr); - numIterations = ( LWAlignedCurrDestAddr - LWAlignedInitDestAddr)/MCD_remVariants.remDestIncr[channel]; - bytesNotXfered = numIterations * - ( MCD_remVariants.remDestIncr[channel] - - MCD_remVariants.remXferSize[channel]); - progRep->dmaSize = destDiffBytes - bytesNotXfered - subModVal; - break; - default: - break; - } - - /* This covers M1,P1,Z for source */ - switch(MCD_remVariants.remSrcRsdIncr[channel]) { - case MINUS1: - progRep->lastSrcAddr = - progRep->currBufDesc->srcAddr + - ( MCD_remVariants.remSrcIncr[channel] * - (progRep->dmaSize/MCD_remVariants.remXferSize[channel])); - break; - case ZERO: - progRep->lastSrcAddr = progRep->currBufDesc->srcAddr; - break; - case PLUS1: - progRep->lastSrcAddr = - progRep->currBufDesc->srcAddr + - ( MCD_remVariants.remSrcIncr[channel] * - (progRep->dmaSize/MCD_remVariants.remXferSize[channel])); - break; - default: break; - } - - return(MCD_OK); -} -/******************* End of MCD_XferProgrQuery() ********************/ - -/********************************************************************/ -/* MCD_resmActions() does the majority of the actions of a DMA resume. - * It is called from MCD_killDma() and MCD_resumeDma(). It has to be - * a separate function because the kill function has to negate the task - * enable before resuming it, but the resume function has to do nothing - * if there is no DMA on that channel (i.e., if the enable bit is 0). - */ -static void MCD_resmActions (int channel) -{ - MCD_dmaBar->debugControl = DBG_CTL_DISABLE; - MCD_dmaBar->debugStatus = MCD_dmaBar->debugStatus; - MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT; /* This register is selected to know - which initiator is actually asserted. */ - if((MCD_dmaBar->ptdDebug >> channel ) & 0x1) - MCD_chStatus[channel] = MCD_RUNNING; - else - MCD_chStatus[channel] = MCD_IDLE; -} -/********************* End of MCD_resmActions() *********************/ - -/********************************************************************/ -/* Function: MCD_killDma - * Purpose: Halt the DMA on the requested channel, without any - * intention of resuming the DMA. - * Arguments: channel - requested channel - * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK - * - * Notes: - * A DMA may be killed from any state, including paused state, and it - * always goes to the MCD_HALTED state even if it is killed while in - * the MCD_NO_DMA or MCD_IDLE states. - */ -int MCD_killDma (int channel) -{ - /* MCD_XferProg progRep; */ - - if((channel < 0) || (channel >= NCHANNELS)) - return(MCD_CHANNEL_INVALID); - - MCD_dmaBar->taskControl[channel] = 0x0; - MCD_resumeDma (channel); - /* - * This must be after the write to the TCR so that the task doesn't - * start up again momentarily, and before the status assignment so - * as to override whatever MCD_resumeDma() may do to the channel - * status. - */ - MCD_chStatus[channel] = MCD_HALTED; - - /* - * Update the current buffer descriptor's lastDestAddr field - * - * MCD_XferProgrQuery (channel, &progRep); - * progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr; - */ - return(MCD_OK); -} -/************************ End of MCD_killDma() **********************/ - -/********************************************************************/ -/* Function: MCD_continDma - * Purpose: Continue a DMA which as stopped due to encountering an - * unready buffer descriptor. - * Arguments: channel - channel to continue the DMA on - * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK - * - * Notes: - * This routine does not check to see if there is a task which can - * be continued. Also this routine should not be used with single DMAs. - */ -int MCD_continDma (int channel) -{ - if((channel < 0) || (channel >= NCHANNELS)) - return(MCD_CHANNEL_INVALID); - - MCD_dmaBar->taskControl[channel] |= TASK_CTL_EN; - MCD_chStatus[channel] = MCD_RUNNING; - - return(MCD_OK); -} -/********************** End of MCD_continDma() **********************/ - -/********************************************************************* - * MCD_pauseDma() and MCD_resumeDma() below use the DMA's debug unit - * to freeze a task and resume it. We freeze a task by breakpointing - * on the stated task. That is, not any specific place in the task, - * but any time that task executes. In particular, when that task - * executes, we want to freeze that task and only that task. - * - * The bits of the debug control register influence interrupts vs. - * breakpoints as follows: - * - Bits 14 and 0 enable or disable debug functions. If enabled, you - * will get the interrupt but you may or may not get a breakpoint. - * - Bits 2 and 1 decide whether you also get a breakpoint in addition - * to an interrupt. - * - * The debug unit can do these actions in response to either internally - * detected breakpoint conditions from the comparators, or in response - * to the external breakpoint pin, or both. - * - Bits 14 and 1 perform the above-described functions for - * internally-generated conditions, i.e., the debug comparators. - * - Bits 0 and 2 perform the above-described functions for external - * conditions, i.e., the breakpoint external pin. - * - * Note that, although you "always" get the interrupt when you turn - * the debug functions, the interrupt can nevertheless, if desired, be - * masked by the corresponding bit in the PTD's IMR. Note also that - * this means that bits 14 and 0 must enable debug functions before - * bits 1 and 2, respectively, have any effect. - * - * NOTE: It's extremely important to not pause more than one DMA channel - * at a time. - ********************************************************************/ - -/********************************************************************/ -/* Function: MCD_pauseDma - * Purpose: Pauses the DMA on a given channel (if any DMA is running - * on that channel). - * Arguments: channel - * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK - */ -int MCD_pauseDma (int channel) -{ - /* MCD_XferProg progRep; */ - - if((channel < 0) || (channel >= NCHANNELS)) - return(MCD_CHANNEL_INVALID); - - if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN) - { - MCD_dmaBar->debugComp1 = channel; - MCD_dmaBar->debugControl = DBG_CTL_ENABLE | (1 << (channel + 16)); - MCD_chStatus[channel] = MCD_PAUSED; - - /* - * Update the current buffer descriptor's lastDestAddr field - * - * MCD_XferProgrQuery (channel, &progRep); - * progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr; - */ - } - return(MCD_OK); -} -/************************* End of MCD_pauseDma() ********************/ - -/********************************************************************/ -/* Function: MCD_resumeDma - * Purpose: Resumes the DMA on a given channel (if any DMA is - * running on that channel). - * Arguments: channel - channel on which to resume DMA - * Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK - */ -int MCD_resumeDma (int channel) -{ - if((channel < 0) || (channel >= NCHANNELS)) - return(MCD_CHANNEL_INVALID); - - if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN) - MCD_resmActions (channel); - - return(MCD_OK); -} -/************************ End of MCD_resumeDma() ********************/ - -/********************************************************************/ -/* Function: MCD_csumQuery - * Purpose: Provide the checksum after performing a non-chained DMA - * Arguments: channel - channel to report on - * csum - pointer to where to write the checksum/CRC - * Returns: MCD_ERROR if the channel is invalid, else MCD_OK - * - * Notes: - * - */ -int MCD_csumQuery (int channel, u32 *csum) -{ -#ifdef MCD_INCLUDE_EU - if((channel < 0) || (channel >= NCHANNELS)) - return(MCD_CHANNEL_INVALID); - - *csum = MCD_relocBuffDesc[channel].csumResult; - return(MCD_OK); -#else - return(MCD_ERROR); -#endif -} -/*********************** End of MCD_resumeDma() *********************/ - -/********************************************************************/ -/* Function: MCD_getCodeSize - * Purpose: Provide the size requirements of the microcoded tasks - * Returns: Size in bytes - */ -int MCD_getCodeSize(void) -{ -#ifdef MCD_INCLUDE_EU - return(0x2b5c); -#else - return(0x173c); -#endif -} -/********************** End of MCD_getCodeSize() ********************/ - -/********************************************************************/ -/* Function: MCD_getVersion - * Purpose: Provide the version string and number - * Arguments: longVersion - user supplied pointer to a pointer to a char - * which points to the version string - * Returns: Version number and version string (by reference) - */ -char MCD_versionString[] = "Multi-channel DMA API Alpha v0.3 (2004-04-26)"; -#define MCD_REV_MAJOR 0x00 -#define MCD_REV_MINOR 0x03 - -int MCD_getVersion(char **longVersion) -{ - *longVersion = MCD_versionString; - return((MCD_REV_MAJOR << 8) | MCD_REV_MINOR); -} -/********************** End of MCD_getVersion() *********************/ - -/********************************************************************/ -/* Private version of memcpy() - * Note that everything this is used for is longword-aligned. - */ -static void MCD_memcpy (int *dest, int *src, u32 size) -{ - u32 i; - - for (i = 0; i < size; i += sizeof(int), dest++, src++) - *dest = *src; -} -/********************************************************************/ diff --git a/dma/MCD_tasks.c b/dma/MCD_tasks.c deleted file mode 100755 index 76e8e37..0000000 --- a/dma/MCD_tasks.c +++ /dev/null @@ -1,2449 +0,0 @@ -/* - * File: MCD_tasks.c - * Purpose: Contains task code and structures for Multi-channel DMA - * - * Notes: - */ - -#include "MCD_dma.h" - -u32 MCD_varTab0[]; -u32 MCD_varTab1[]; -u32 MCD_varTab2[]; -u32 MCD_varTab3[]; -u32 MCD_varTab4[]; -u32 MCD_varTab5[]; -u32 MCD_varTab6[]; -u32 MCD_varTab7[]; -u32 MCD_varTab8[]; -u32 MCD_varTab9[]; -u32 MCD_varTab10[]; -u32 MCD_varTab11[]; -u32 MCD_varTab12[]; -u32 MCD_varTab13[]; -u32 MCD_varTab14[]; -u32 MCD_varTab15[]; - -u32 MCD_funcDescTab0[]; -#ifdef MCD_INCLUDE_EU -u32 MCD_funcDescTab1[]; -u32 MCD_funcDescTab2[]; -u32 MCD_funcDescTab3[]; -u32 MCD_funcDescTab4[]; -u32 MCD_funcDescTab5[]; -u32 MCD_funcDescTab6[]; -u32 MCD_funcDescTab7[]; -u32 MCD_funcDescTab8[]; -u32 MCD_funcDescTab9[]; -u32 MCD_funcDescTab10[]; -u32 MCD_funcDescTab11[]; -u32 MCD_funcDescTab12[]; -u32 MCD_funcDescTab13[]; -u32 MCD_funcDescTab14[]; -u32 MCD_funcDescTab15[]; -#endif - -u32 MCD_contextSave0[]; -u32 MCD_contextSave1[]; -u32 MCD_contextSave2[]; -u32 MCD_contextSave3[]; -u32 MCD_contextSave4[]; -u32 MCD_contextSave5[]; -u32 MCD_contextSave6[]; -u32 MCD_contextSave7[]; -u32 MCD_contextSave8[]; -u32 MCD_contextSave9[]; -u32 MCD_contextSave10[]; -u32 MCD_contextSave11[]; -u32 MCD_contextSave12[]; -u32 MCD_contextSave13[]; -u32 MCD_contextSave14[]; -u32 MCD_contextSave15[]; - -u32 MCD_realTaskTableSrc[] = -{ - 0x00000000, - 0x00000000, - (u32)MCD_varTab0, /* Task 0 Variable Table */ - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ - 0x00000000, - 0x00000000, - (u32)MCD_contextSave0, /* Task 0 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab1, /* Task 1 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab1, /* Task 1 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave1, /* Task 1 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab2, /* Task 2 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab2, /* Task 2 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave2, /* Task 2 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab3, /* Task 3 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab3, /* Task 3 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave3, /* Task 3 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab4, /* Task 4 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab4, /* Task 4 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave4, /* Task 4 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab5, /* Task 5 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab5, /* Task 5 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave5, /* Task 5 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab6, /* Task 6 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab6, /* Task 6 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave6, /* Task 6 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab7, /* Task 7 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab7, /* Task 7 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave7, /* Task 7 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab8, /* Task 8 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab8, /* Task 8 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave8, /* Task 8 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab9, /* Task 9 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab9, /* Task 9 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave9, /* Task 9 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab10, /* Task 10 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab10, /* Task 10 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave10, /* Task 10 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab11, /* Task 11 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab11, /* Task 11 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave11, /* Task 11 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab12, /* Task 12 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab12, /* Task 12 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave12, /* Task 12 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab13, /* Task 13 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab13, /* Task 13 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave13, /* Task 13 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab14, /* Task 14 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab14, /* Task 14 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave14, /* Task 14 context save space */ - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_varTab15, /* Task 15 Variable Table */ -#ifdef MCD_INCLUDE_EU - (u32)MCD_funcDescTab15, /* Task 15 Function Descriptor Table & Flags */ -#else - (u32)MCD_funcDescTab0, /* Task 0 Function Descriptor Table & Flags */ -#endif - 0x00000000, - 0x00000000, - (u32)MCD_contextSave15, /* Task 15 context save space */ - 0x00000000, -}; - - -u32 MCD_varTab0[] = -{ /* Task 0 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - - -u32 MCD_varTab1[] = -{ /* Task 1 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab2[]= -{ /* Task 2 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab3[]= -{ /* Task 3 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab4[]= -{ /* Task 4 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab5[]= -{ /* Task 5 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab6[]= -{ /* Task 6 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab7[]= -{ /* Task 7 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab8[]= -{ /* Task 8 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab9[]= -{ /* Task 9 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab10[]= -{ /* Task 10 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab11[]= -{ /* Task 11 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab12[]= -{ /* Task 12 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab13[]= -{ /* Task 13 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab14[]= -{ /* Task 14 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_varTab15[]= -{ /* Task 15 Variable Table */ - 0x00000000, /* var[0] */ - 0x00000000, /* var[1] */ - 0x00000000, /* var[2] */ - 0x00000000, /* var[3] */ - 0x00000000, /* var[4] */ - 0x00000000, /* var[5] */ - 0x00000000, /* var[6] */ - 0x00000000, /* var[7] */ - 0x00000000, /* var[8] */ - 0x00000000, /* var[9] */ - 0x00000000, /* var[10] */ - 0x00000000, /* var[11] */ - 0x00000000, /* var[12] */ - 0x00000000, /* var[13] */ - 0x00000000, /* var[14] */ - 0x00000000, /* var[15] */ - 0x00000000, /* var[16] */ - 0x00000000, /* var[17] */ - 0x00000000, /* var[18] */ - 0x00000000, /* var[19] */ - 0x00000000, /* var[20] */ - 0x00000000, /* var[21] */ - 0x00000000, /* var[22] */ - 0x00000000, /* var[23] */ - 0xe0000000, /* inc[0] */ - 0x20000000, /* inc[1] */ - 0x2000ffff, /* inc[2] */ - 0x00000000, /* inc[3] */ - 0x00000000, /* inc[4] */ - 0x00000000, /* inc[5] */ - 0x00000000, /* inc[6] */ - 0x00000000, /* inc[7] */ -}; - -u32 MCD_funcDescTab0[]= -{ /* Task 0 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -#ifdef MCD_INCLUDE_EU -u32 MCD_funcDescTab1[]= -{ /* Task 1 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab2[]= -{ /* Task 2 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab3[]= -{ /* Task 3 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab4[]= -{ /* Task 4 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab5[]= -{ /* Task 5 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab6[]= -{ /* Task 6 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab7[]= -{ /* Task 7 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab8[]= -{ /* Task 8 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab9[]= -{ /* Task 9 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab10[]= -{ /* Task 10 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab11[]= -{ /* Task 11 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab12[]= -{ /* Task 12 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab13[]= -{ /* Task 13 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab14[]= -{ /* Task 14 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; - -u32 MCD_funcDescTab15[]= -{ /* Task 15 Function Descriptor Table */ - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0xa0045670, /* mainFunc(), EU# 3 */ - 0xa0000000, /* rsduFunc(), EU# 3 */ - 0xa0000000, /* crcAccumVal(), EU# 3 */ - 0x20000000, /* setCrcAccum(), EU# 3 */ - 0x21800000, /* and(), EU# 3 */ - 0x21e00000, /* or(), EU# 3 */ - 0x20400000, /* add(), EU# 3 */ - 0x20500000, /* sub(), EU# 3 */ - 0x205a0000, /* andNot(), EU# 3 */ - 0x20a00000, /* shiftR(), EU# 3 */ - 0x202fa000, /* andReadyBit(), EU# 3 */ - 0x202f9000, /* andNotReadyBit(), EU# 3 */ - 0x202ea000, /* andWrapBit(), EU# 3 */ - 0x202da000, /* andLastBit(), EU# 3 */ - 0x202e2000, /* andInterruptBit(), EU# 3 */ - 0x202f2000, /* andCrcRestartBit(), EU# 3 */ -}; -#endif /*MCD_INCLUDE_EU*/ - -u32 MCD_contextSave0[128]; /* Task 0 context save space */ -u32 MCD_contextSave1[128]; /* Task 1 context save space */ -u32 MCD_contextSave2[128]; /* Task 2 context save space */ -u32 MCD_contextSave3[128]; /* Task 3 context save space */ -u32 MCD_contextSave4[128]; /* Task 4 context save space */ -u32 MCD_contextSave5[128]; /* Task 5 context save space */ -u32 MCD_contextSave6[128]; /* Task 6 context save space */ -u32 MCD_contextSave7[128]; /* Task 7 context save space */ -u32 MCD_contextSave8[128]; /* Task 8 context save space */ -u32 MCD_contextSave9[128]; /* Task 9 context save space */ -u32 MCD_contextSave10[128]; /* Task 10 context save space */ -u32 MCD_contextSave11[128]; /* Task 11 context save space */ -u32 MCD_contextSave12[128]; /* Task 12 context save space */ -u32 MCD_contextSave13[128]; /* Task 13 context save space */ -u32 MCD_contextSave14[128]; /* Task 14 context save space */ -u32 MCD_contextSave15[128]; /* Task 15 context save space */ - - -u32 MCD_ChainNoEu_TDT[]; -u32 MCD_SingleNoEu_TDT[]; -#ifdef MCD_INCLUDE_EU -u32 MCD_ChainEu_TDT[]; -u32 MCD_SingleEu_TDT[]; -#endif -u32 MCD_ENetRcv_TDT[]; -u32 MCD_ENetXmit_TDT[]; - -u32 MCD_modelTaskTableSrc[]= -{ - (u32)MCD_ChainNoEu_TDT, - (u32)&((u8*)MCD_ChainNoEu_TDT)[0x0000016c], - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_SingleNoEu_TDT, - (u32)&((u8*)MCD_SingleNoEu_TDT)[0x000000d4], - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, -#ifdef MCD_INCLUDE_EU - (u32)MCD_ChainEu_TDT, - (u32)&((u8*)MCD_ChainEu_TDT)[0x000001b4], - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_SingleEu_TDT, - (u32)&((u8*)MCD_SingleEu_TDT)[0x00000124], - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, -#endif - (u32)MCD_ENetRcv_TDT, - (u32)&((u8*)MCD_ENetRcv_TDT)[0x0000009c], - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - (u32)MCD_ENetXmit_TDT, - (u32)&((u8*)MCD_ENetXmit_TDT)[0x000000d0], - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, -}; -u32 MCD_ChainNoEu_TDT[]= -{ - 0x80004000, /* 0000(:370): LCDEXT: idx0 = 0x00000000; ; */ - 0x8118801b, /* 0004(:370): LCD: idx1 = var2; idx1 once var0; idx1 += inc3 */ - 0xb8c60018, /* 0008(:371): LCD: idx2 = *(idx1 + var12); idx2 once var0; idx2 += inc3 */ - 0x10002b10, /* 000C(:372): DRD1A: var10 = idx2; FN=0 MORE init=0 WS=0 RS=0 */ - 0x7000000d, /* 0010(:373): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */ - 0x018cf89f, /* 0014(:373): DRD2B1: var6 = EU3(); EU3(idx2) */ - 0x6000000a, /* 0018(:374): DRD2A: EU0=0 EU1=0 EU2=0 EU3=10 EXT init=0 WS=0 RS=0 */ - 0x080cf89f, /* 001C(:374): DRD2B1: idx0 = EU3(); EU3(idx2) */ - 0x000001f8, /* 0020(:0): NOP */ - 0x98180364, /* 0024(:378): LCD: idx0 = idx0; idx0 == var13; idx0 += inc4 */ - 0x8118801b, /* 0028(:380): LCD: idx1 = var2; idx1 once var0; idx1 += inc3 */ - 0xf8c6001a, /* 002C(:381): LCDEXT: idx2 = *(idx1 + var12 + 8); idx2 once var0; idx2 += inc3 */ - 0xb8c6601b, /* 0030(:382): LCD: idx3 = *(idx1 + var12 + 12); ; idx3 += inc3 */ - 0x10002710, /* 0034(:384): DRD1A: var9 = idx2; FN=0 MORE init=0 WS=0 RS=0 */ - 0x00000f18, /* 0038(:385): DRD1A: var3 = idx3; FN=0 init=0 WS=0 RS=0 */ - 0xb8c6001d, /* 003C(:387): LCD: idx2 = *(idx1 + var12 + 20); idx2 once var0; idx2 += inc3 */ - 0x10001310, /* 0040(:388): DRD1A: var4 = idx2; FN=0 MORE init=0 WS=0 RS=0 */ - 0x60000007, /* 0044(:389): DRD2A: EU0=0 EU1=0 EU2=0 EU3=7 EXT init=0 WS=0 RS=0 */ - 0x014cf88b, /* 0048(:389): DRD2B1: var5 = EU3(); EU3(idx2,var11) */ - 0x98c6001c, /* 004C(:391): LCD: idx2 = idx1 + var12 + 4; idx2 once var0; idx2 += inc3 */ - 0x00000710, /* 0050(:392): DRD1A: var1 = idx2; FN=0 init=0 WS=0 RS=0 */ - 0x98c70018, /* 0054(:393): LCD: idx2 = idx1 + var14; idx2 once var0; idx2 += inc3 */ - 0x10001f10, /* 0058(:394): DRD1A: var7 = idx2; FN=0 MORE init=0 WS=0 RS=0 */ - 0x0000c818, /* 005C(:395): DRD1A: *idx2 = var3; FN=0 init=0 WS=0 RS=0 */ - 0x000001f8, /* 0060(:0): NOP */ - 0xc1476018, /* 0064(:399): LCDEXT: idx1 = var2 + var14; ; idx1 += inc3 */ - 0xc003231d, /* 0068(:399): LCDEXT: idx2 = var0, idx3 = var6; idx3 == var12; idx2 += inc3, idx3 += inc5 */ - 0x811a601b, /* 006C(:400): LCD: idx4 = var2; ; idx4 += inc3 */ - 0xc1862102, /* 0070(:403): LCDEXT: idx5 = var3, idx6 = var12; idx6 < var4; idx5 += inc0, idx6 += inc2 */ - 0x849be009, /* 0074(:403): LCD: idx7 = var9; ; idx7 += inc1 */ - 0x03fed7b8, /* 0078(:406): DRD1A: *idx7; FN=0 init=31 WS=3 RS=3 */ - 0xda9b001b, /* 007C(:408): LCDEXT: idx5 = idx5, idx6 = idx6; idx5 once var0; idx5 += inc3, idx6 += inc3 */ - 0x9b9be01b, /* 0080(:408): LCD: idx7 = idx7; ; idx7 += inc3 */ - 0x1000cb20, /* 0084(:409): DRD1A: *idx2 = idx4; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 0088(:410): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf88f, /* 008C(:410): DRD2B1: idx2 = EU3(); EU3(idx2,var15) */ - 0x1000cb28, /* 0090(:411): DRD1A: *idx2 = idx5; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 0094(:412): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf88f, /* 0098(:412): DRD2B1: idx2 = EU3(); EU3(idx2,var15) */ - 0x1000cb30, /* 009C(:413): DRD1A: *idx2 = idx6; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 00A0(:414): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf88f, /* 00A4(:414): DRD2B1: idx2 = EU3(); EU3(idx2,var15) */ - 0x1000cb38, /* 00A8(:415): DRD1A: *idx2 = idx7; FN=0 MORE init=0 WS=0 RS=0 */ - 0x0000c728, /* 00AC(:416): DRD1A: *idx1 = idx5; FN=0 init=0 WS=0 RS=0 */ - 0x000001f8, /* 00B0(:0): NOP */ - 0xc1476018, /* 00B4(:420): LCDEXT: idx1 = var2 + var14; ; idx1 += inc3 */ - 0xc003241d, /* 00B8(:420): LCDEXT: idx2 = var0, idx3 = var6; idx3 == var16; idx2 += inc3, idx3 += inc5 */ - 0x811a601b, /* 00BC(:421): LCD: idx4 = var2; ; idx4 += inc3 */ - 0xda9b001b, /* 00C0(:424): LCDEXT: idx5 = idx5, idx6 = idx6; idx5 once var0; idx5 += inc3, idx6 += inc3 */ - 0x9b9be01b, /* 00C4(:424): LCD: idx7 = idx7; ; idx7 += inc3 */ - 0x0000d3a0, /* 00C8(:425): DRD1A: *idx4; FN=0 init=0 WS=0 RS=0 */ - 0xc1862102, /* 00CC(:427): LCDEXT: idx5 = var3, idx6 = var12; idx6 < var4; idx5 += inc0, idx6 += inc2 */ - 0x849be009, /* 00D0(:427): LCD: idx7 = var9; ; idx7 += inc1 */ - 0x0bfed7b8, /* 00D4(:430): DRD1A: *idx7; FN=0 TFD init=31 WS=3 RS=3 */ - 0xda9b001b, /* 00D8(:432): LCDEXT: idx5 = idx5, idx6 = idx6; idx5 once var0; idx5 += inc3, idx6 += inc3 */ - 0x9b9be01b, /* 00DC(:432): LCD: idx7 = idx7; ; idx7 += inc3 */ - 0x1000cb20, /* 00E0(:433): DRD1A: *idx2 = idx4; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 00E4(:434): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf88f, /* 00E8(:434): DRD2B1: idx2 = EU3(); EU3(idx2,var15) */ - 0x1000cb28, /* 00EC(:435): DRD1A: *idx2 = idx5; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 00F0(:436): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf88f, /* 00F4(:436): DRD2B1: idx2 = EU3(); EU3(idx2,var15) */ - 0x1000cb30, /* 00F8(:437): DRD1A: *idx2 = idx6; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 00FC(:438): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf88f, /* 0100(:438): DRD2B1: idx2 = EU3(); EU3(idx2,var15) */ - 0x1000cb38, /* 0104(:439): DRD1A: *idx2 = idx7; FN=0 MORE init=0 WS=0 RS=0 */ - 0x0000c728, /* 0108(:440): DRD1A: *idx1 = idx5; FN=0 init=0 WS=0 RS=0 */ - 0x000001f8, /* 010C(:0): NOP */ - 0x8118801b, /* 0110(:444): LCD: idx1 = var2; idx1 once var0; idx1 += inc3 */ - 0xd8c60018, /* 0114(:446): LCDEXT: idx2 = idx1 + var12; idx2 once var0; idx2 += inc3 */ - 0x98c6601c, /* 0118(:446): LCD: idx3 = idx1 + var12 + 4; ; idx3 += inc3 */ - 0x6000000b, /* 011C(:447): DRD2A: EU0=0 EU1=0 EU2=0 EU3=11 EXT init=0 WS=0 RS=0 */ - 0x0c8cfc9f, /* 0120(:447): DRD2B1: *idx2 = EU3(); EU3(*idx2) */ - 0x000001f8, /* 0124(:0): NOP */ - 0xa146001e, /* 0128(:450): LCD: idx1 = *(var2 + var12 + 24); idx1 once var0; idx1 += inc3 */ - 0x10000b08, /* 012C(:451): DRD1A: var2 = idx1; FN=0 MORE init=0 WS=0 RS=0 */ - 0x10002050, /* 0130(:452): DRD1A: var8 = var10; FN=0 MORE init=0 WS=0 RS=0 */ - 0xb8c60018, /* 0134(:453): LCD: idx2 = *(idx1 + var12); idx2 once var0; idx2 += inc3 */ - 0x10002b10, /* 0138(:454): DRD1A: var10 = idx2; FN=0 MORE init=0 WS=0 RS=0 */ - 0x7000000a, /* 013C(:455): DRD2A: EU0=0 EU1=0 EU2=0 EU3=10 EXT MORE init=0 WS=0 RS=0 */ - 0x080cf89f, /* 0140(:455): DRD2B1: idx0 = EU3(); EU3(idx2) */ - 0x6000000d, /* 0144(:456): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT init=0 WS=0 RS=0 */ - 0x018cf89f, /* 0148(:456): DRD2B1: var6 = EU3(); EU3(idx2) */ - 0x000001f8, /* 014C(:0): NOP */ - 0x8618801b, /* 0150(:462): LCD: idx1 = var12; idx1 once var0; idx1 += inc3 */ - 0x7000000e, /* 0154(:463): DRD2A: EU0=0 EU1=0 EU2=0 EU3=14 EXT MORE init=0 WS=0 RS=0 */ - 0x084cf21f, /* 0158(:463): DRD2B1: idx1 = EU3(); EU3(var8) */ - 0xd8990336, /* 015C(:464): LCDEXT: idx2 = idx1; idx2 > var12; idx2 += inc6 */ - 0x8019801b, /* 0160(:464): LCD: idx3 = var0; idx3 once var0; idx3 += inc3 */ - 0x040001f8, /* 0164(:465): DRD1A: FN=0 INT init=0 WS=0 RS=0 */ - 0x000001f8, /* 0168(:0): NOP */ - 0x000001f8, /* 016C(:0): NOP */ -}; -u32 MCD_SingleNoEu_TDT[]= -{ - 0x8198001b, /* 0000(:657): LCD: idx0 = var3; idx0 once var0; idx0 += inc3 */ - 0x7000000d, /* 0004(:658): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */ - 0x080cf81f, /* 0008(:658): DRD2B1: idx0 = EU3(); EU3(idx0) */ - 0x8198801b, /* 000C(:659): LCD: idx1 = var3; idx1 once var0; idx1 += inc3 */ - 0x6000000e, /* 0010(:660): DRD2A: EU0=0 EU1=0 EU2=0 EU3=14 EXT init=0 WS=0 RS=0 */ - 0x084cf85f, /* 0014(:660): DRD2B1: idx1 = EU3(); EU3(idx1) */ - 0x000001f8, /* 0018(:0): NOP */ - 0x8298001b, /* 001C(:664): LCD: idx0 = var5; idx0 once var0; idx0 += inc3 */ - 0x7000000d, /* 0020(:665): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */ - 0x010cf81f, /* 0024(:665): DRD2B1: var4 = EU3(); EU3(idx0) */ - 0x6000000e, /* 0028(:666): DRD2A: EU0=0 EU1=0 EU2=0 EU3=14 EXT init=0 WS=0 RS=0 */ - 0x018cf81f, /* 002C(:666): DRD2B1: var6 = EU3(); EU3(idx0) */ - 0xc202601b, /* 0030(:669): LCDEXT: idx0 = var4, idx1 = var4; ; idx0 += inc3, idx1 += inc3 */ - 0xc002221c, /* 0034(:669): LCDEXT: idx2 = var0, idx3 = var4; idx3 == var8; idx2 += inc3, idx3 += inc4 */ - 0x809a601b, /* 0038(:670): LCD: idx4 = var1; ; idx4 += inc3 */ - 0xc10420c2, /* 003C(:673): LCDEXT: idx5 = var2, idx6 = var8; idx6 < var3; idx5 += inc0, idx6 += inc2 */ - 0x839be009, /* 0040(:673): LCD: idx7 = var7; ; idx7 += inc1 */ - 0x03fed7b8, /* 0044(:676): DRD1A: *idx7; FN=0 init=31 WS=3 RS=3 */ - 0xda9b001b, /* 0048(:678): LCDEXT: idx5 = idx5, idx6 = idx6; idx5 once var0; idx5 += inc3, idx6 += inc3 */ - 0x9b9be01b, /* 004C(:678): LCD: idx7 = idx7; ; idx7 += inc3 */ - 0x70000006, /* 0050(:680): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf889, /* 0054(:680): DRD2B1: idx2 = EU3(); EU3(idx2,var9) */ - 0x1000cb28, /* 0058(:681): DRD1A: *idx2 = idx5; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 005C(:682): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf889, /* 0060(:682): DRD2B1: idx2 = EU3(); EU3(idx2,var9) */ - 0x1000cb30, /* 0064(:683): DRD1A: *idx2 = idx6; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 0068(:684): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf889, /* 006C(:684): DRD2B1: idx2 = EU3(); EU3(idx2,var9) */ - 0x0000cb38, /* 0070(:685): DRD1A: *idx2 = idx7; FN=0 init=0 WS=0 RS=0 */ - 0x000001f8, /* 0074(:0): NOP */ - 0xc202601b, /* 0078(:689): LCDEXT: idx0 = var4, idx1 = var4; ; idx0 += inc3, idx1 += inc3 */ - 0xc002229c, /* 007C(:689): LCDEXT: idx2 = var0, idx3 = var4; idx3 == var10; idx2 += inc3, idx3 += inc4 */ - 0x809a601b, /* 0080(:690): LCD: idx4 = var1; ; idx4 += inc3 */ - 0xda9b001b, /* 0084(:693): LCDEXT: idx5 = idx5, idx6 = idx6; idx5 once var0; idx5 += inc3, idx6 += inc3 */ - 0x9b9be01b, /* 0088(:693): LCD: idx7 = idx7; ; idx7 += inc3 */ - 0x0000d3a0, /* 008C(:694): DRD1A: *idx4; FN=0 init=0 WS=0 RS=0 */ - 0xc10420c2, /* 0090(:696): LCDEXT: idx5 = var2, idx6 = var8; idx6 < var3; idx5 += inc0, idx6 += inc2 */ - 0x839be009, /* 0094(:696): LCD: idx7 = var7; ; idx7 += inc1 */ - 0x0bfed7b8, /* 0098(:699): DRD1A: *idx7; FN=0 TFD init=31 WS=3 RS=3 */ - 0xda9b001b, /* 009C(:701): LCDEXT: idx5 = idx5, idx6 = idx6; idx5 once var0; idx5 += inc3, idx6 += inc3 */ - 0x9b9be01b, /* 00A0(:701): LCD: idx7 = idx7; ; idx7 += inc3 */ - 0x70000006, /* 00A4(:703): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf889, /* 00A8(:703): DRD2B1: idx2 = EU3(); EU3(idx2,var9) */ - 0x1000cb28, /* 00AC(:704): DRD1A: *idx2 = idx5; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 00B0(:705): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf889, /* 00B4(:705): DRD2B1: idx2 = EU3(); EU3(idx2,var9) */ - 0x1000cb30, /* 00B8(:706): DRD1A: *idx2 = idx6; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 00BC(:707): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf889, /* 00C0(:707): DRD2B1: idx2 = EU3(); EU3(idx2,var9) */ - 0x0000cb38, /* 00C4(:708): DRD1A: *idx2 = idx7; FN=0 init=0 WS=0 RS=0 */ - 0x000001f8, /* 00C8(:0): NOP */ - 0xc318022d, /* 00CC(:712): LCDEXT: idx0 = var6; idx0 > var8; idx0 += inc5 */ - 0x8018801b, /* 00D0(:712): LCD: idx1 = var0; idx1 once var0; idx1 += inc3 */ - 0x040001f8, /* 00D4(:713): DRD1A: FN=0 INT init=0 WS=0 RS=0 */ -}; -#ifdef MCD_INCLUDE_EU -u32 MCD_ChainEu_TDT[]= -{ - 0x80004000, /* 0000(:947): LCDEXT: idx0 = 0x00000000; ; */ - 0x8198801b, /* 0004(:947): LCD: idx1 = var3; idx1 once var0; idx1 += inc3 */ - 0xb8c68018, /* 0008(:948): LCD: idx2 = *(idx1 + var13); idx2 once var0; idx2 += inc3 */ - 0x10002f10, /* 000C(:949): DRD1A: var11 = idx2; FN=0 MORE init=0 WS=0 RS=0 */ - 0x7000000d, /* 0010(:950): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */ - 0x01ccf89f, /* 0014(:950): DRD2B1: var7 = EU3(); EU3(idx2) */ - 0x6000000a, /* 0018(:951): DRD2A: EU0=0 EU1=0 EU2=0 EU3=10 EXT init=0 WS=0 RS=0 */ - 0x080cf89f, /* 001C(:951): DRD2B1: idx0 = EU3(); EU3(idx2) */ - 0x000001f8, /* 0020(:0): NOP */ - 0x981803a4, /* 0024(:955): LCD: idx0 = idx0; idx0 == var14; idx0 += inc4 */ - 0x8198801b, /* 0028(:957): LCD: idx1 = var3; idx1 once var0; idx1 += inc3 */ - 0xf8c6801a, /* 002C(:958): LCDEXT: idx2 = *(idx1 + var13 + 8); idx2 once var0; idx2 += inc3 */ - 0xb8c6e01b, /* 0030(:959): LCD: idx3 = *(idx1 + var13 + 12); ; idx3 += inc3 */ - 0x10002b10, /* 0034(:961): DRD1A: var10 = idx2; FN=0 MORE init=0 WS=0 RS=0 */ - 0x00001318, /* 0038(:962): DRD1A: var4 = idx3; FN=0 init=0 WS=0 RS=0 */ - 0xb8c6801d, /* 003C(:964): LCD: idx2 = *(idx1 + var13 + 20); idx2 once var0; idx2 += inc3 */ - 0x10001710, /* 0040(:965): DRD1A: var5 = idx2; FN=0 MORE init=0 WS=0 RS=0 */ - 0x60000007, /* 0044(:966): DRD2A: EU0=0 EU1=0 EU2=0 EU3=7 EXT init=0 WS=0 RS=0 */ - 0x018cf88c, /* 0048(:966): DRD2B1: var6 = EU3(); EU3(idx2,var12) */ - 0x98c6801c, /* 004C(:968): LCD: idx2 = idx1 + var13 + 4; idx2 once var0; idx2 += inc3 */ - 0x00000b10, /* 0050(:969): DRD1A: var2 = idx2; FN=0 init=0 WS=0 RS=0 */ - 0x98c78018, /* 0054(:970): LCD: idx2 = idx1 + var15; idx2 once var0; idx2 += inc3 */ - 0x10002310, /* 0058(:971): DRD1A: var8 = idx2; FN=0 MORE init=0 WS=0 RS=0 */ - 0x0000c820, /* 005C(:972): DRD1A: *idx2 = var4; FN=0 init=0 WS=0 RS=0 */ - 0x000001f8, /* 0060(:0): NOP */ - 0x8698801b, /* 0064(:976): LCD: idx1 = var13; idx1 once var0; idx1 += inc3 */ - 0x7000000f, /* 0068(:977): DRD2A: EU0=0 EU1=0 EU2=0 EU3=15 EXT MORE init=0 WS=0 RS=0 */ - 0x084cf2df, /* 006C(:977): DRD2B1: idx1 = EU3(); EU3(var11) */ - 0xd899042d, /* 0070(:978): LCDEXT: idx2 = idx1; idx2 >= var16; idx2 += inc5 */ - 0x8019801b, /* 0074(:978): LCD: idx3 = var0; idx3 once var0; idx3 += inc3 */ - 0x60000003, /* 0078(:979): DRD2A: EU0=0 EU1=0 EU2=0 EU3=3 EXT init=0 WS=0 RS=0 */ - 0x2cd7c7df, /* 007C(:979): DRD2B2: EU3(var13) */ - 0xd8990364, /* 0080(:980): LCDEXT: idx2 = idx1; idx2 == var13; idx2 += inc4 */ - 0x8019801b, /* 0084(:980): LCD: idx3 = var0; idx3 once var0; idx3 += inc3 */ - 0x60000003, /* 0088(:981): DRD2A: EU0=0 EU1=0 EU2=0 EU3=3 EXT init=0 WS=0 RS=0 */ - 0x2c17c7df, /* 008C(:981): DRD2B2: EU3(var1) */ - 0x000001f8, /* 0090(:0): NOP */ - 0xc1c7e018, /* 0094(:984): LCDEXT: idx1 = var3 + var15; ; idx1 += inc3 */ - 0xc003a35e, /* 0098(:984): LCDEXT: idx2 = var0, idx3 = var7; idx3 == var13; idx2 += inc3, idx3 += inc6 */ - 0x819a601b, /* 009C(:985): LCD: idx4 = var3; ; idx4 += inc3 */ - 0xc206a142, /* 00A0(:988): LCDEXT: idx5 = var4, idx6 = var13; idx6 < var5; idx5 += inc0, idx6 += inc2 */ - 0x851be009, /* 00A4(:988): LCD: idx7 = var10; ; idx7 += inc1 */ - 0x63fe0000, /* 00A8(:991): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=31 WS=3 RS=3 */ - 0x0d4cfddf, /* 00AC(:991): DRD2B1: *idx5 = EU3(); EU3(*idx7) */ - 0xda9b001b, /* 00B0(:993): LCDEXT: idx5 = idx5, idx6 = idx6; idx5 once var0; idx5 += inc3, idx6 += inc3 */ - 0x9b9be01b, /* 00B4(:993): LCD: idx7 = idx7; ; idx7 += inc3 */ - 0x70000002, /* 00B8(:994): DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */ - 0x004cf81f, /* 00BC(:994): DRD2B1: var1 = EU3(); EU3(idx0) */ - 0x1000cb20, /* 00C0(:995): DRD1A: *idx2 = idx4; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 00C4(:996): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf891, /* 00C8(:996): DRD2B1: idx2 = EU3(); EU3(idx2,var17) */ - 0x1000cb28, /* 00CC(:997): DRD1A: *idx2 = idx5; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 00D0(:998): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf891, /* 00D4(:998): DRD2B1: idx2 = EU3(); EU3(idx2,var17) */ - 0x1000cb30, /* 00D8(:999): DRD1A: *idx2 = idx6; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 00DC(:1000): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf891, /* 00E0(:1000): DRD2B1: idx2 = EU3(); EU3(idx2,var17) */ - 0x1000cb38, /* 00E4(:1001): DRD1A: *idx2 = idx7; FN=0 MORE init=0 WS=0 RS=0 */ - 0x0000c728, /* 00E8(:1002): DRD1A: *idx1 = idx5; FN=0 init=0 WS=0 RS=0 */ - 0x000001f8, /* 00EC(:0): NOP */ - 0xc1c7e018, /* 00F0(:1006): LCDEXT: idx1 = var3 + var15; ; idx1 += inc3 */ - 0xc003a49e, /* 00F4(:1006): LCDEXT: idx2 = var0, idx3 = var7; idx3 == var18; idx2 += inc3, idx3 += inc6 */ - 0x819a601b, /* 00F8(:1007): LCD: idx4 = var3; ; idx4 += inc3 */ - 0xda9b001b, /* 00FC(:1010): LCDEXT: idx5 = idx5, idx6 = idx6; idx5 once var0; idx5 += inc3, idx6 += inc3 */ - 0x9b9be01b, /* 0100(:1010): LCD: idx7 = idx7; ; idx7 += inc3 */ - 0x0000d3a0, /* 0104(:1011): DRD1A: *idx4; FN=0 init=0 WS=0 RS=0 */ - 0xc206a142, /* 0108(:1013): LCDEXT: idx5 = var4, idx6 = var13; idx6 < var5; idx5 += inc0, idx6 += inc2 */ - 0x851be009, /* 010C(:1013): LCD: idx7 = var10; ; idx7 += inc1 */ - 0x6bfe0000, /* 0110(:1016): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 TFD EXT init=31 WS=3 RS=3 */ - 0x0d4cfddf, /* 0114(:1016): DRD2B1: *idx5 = EU3(); EU3(*idx7) */ - 0xda9b001b, /* 0118(:1018): LCDEXT: idx5 = idx5, idx6 = idx6; idx5 once var0; idx5 += inc3, idx6 += inc3 */ - 0x9b9be01b, /* 011C(:1018): LCD: idx7 = idx7; ; idx7 += inc3 */ - 0x70000002, /* 0120(:1019): DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */ - 0x004cf81f, /* 0124(:1019): DRD2B1: var1 = EU3(); EU3(idx0) */ - 0x1000cb20, /* 0128(:1020): DRD1A: *idx2 = idx4; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 012C(:1021): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf891, /* 0130(:1021): DRD2B1: idx2 = EU3(); EU3(idx2,var17) */ - 0x1000cb28, /* 0134(:1022): DRD1A: *idx2 = idx5; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 0138(:1023): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf891, /* 013C(:1023): DRD2B1: idx2 = EU3(); EU3(idx2,var17) */ - 0x1000cb30, /* 0140(:1024): DRD1A: *idx2 = idx6; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 0144(:1025): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf891, /* 0148(:1025): DRD2B1: idx2 = EU3(); EU3(idx2,var17) */ - 0x1000cb38, /* 014C(:1026): DRD1A: *idx2 = idx7; FN=0 MORE init=0 WS=0 RS=0 */ - 0x0000c728, /* 0150(:1027): DRD1A: *idx1 = idx5; FN=0 init=0 WS=0 RS=0 */ - 0x000001f8, /* 0154(:0): NOP */ - 0x8198801b, /* 0158(:1031): LCD: idx1 = var3; idx1 once var0; idx1 += inc3 */ - 0xd8c68018, /* 015C(:1033): LCDEXT: idx2 = idx1 + var13; idx2 once var0; idx2 += inc3 */ - 0x98c6e01c, /* 0160(:1033): LCD: idx3 = idx1 + var13 + 4; ; idx3 += inc3 */ - 0x6000000b, /* 0164(:1034): DRD2A: EU0=0 EU1=0 EU2=0 EU3=11 EXT init=0 WS=0 RS=0 */ - 0x0c8cfc9f, /* 0168(:1034): DRD2B1: *idx2 = EU3(); EU3(*idx2) */ - 0x0000cc08, /* 016C(:1035): DRD1A: *idx3 = var1; FN=0 init=0 WS=0 RS=0 */ - 0xa1c6801e, /* 0170(:1038): LCD: idx1 = *(var3 + var13 + 24); idx1 once var0; idx1 += inc3 */ - 0x10000f08, /* 0174(:1039): DRD1A: var3 = idx1; FN=0 MORE init=0 WS=0 RS=0 */ - 0x10002458, /* 0178(:1040): DRD1A: var9 = var11; FN=0 MORE init=0 WS=0 RS=0 */ - 0xb8c68018, /* 017C(:1041): LCD: idx2 = *(idx1 + var13); idx2 once var0; idx2 += inc3 */ - 0x10002f10, /* 0180(:1042): DRD1A: var11 = idx2; FN=0 MORE init=0 WS=0 RS=0 */ - 0x7000000a, /* 0184(:1043): DRD2A: EU0=0 EU1=0 EU2=0 EU3=10 EXT MORE init=0 WS=0 RS=0 */ - 0x080cf89f, /* 0188(:1043): DRD2B1: idx0 = EU3(); EU3(idx2) */ - 0x6000000d, /* 018C(:1044): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT init=0 WS=0 RS=0 */ - 0x01ccf89f, /* 0190(:1044): DRD2B1: var7 = EU3(); EU3(idx2) */ - 0x000001f8, /* 0194(:0): NOP */ - 0x8698801b, /* 0198(:1050): LCD: idx1 = var13; idx1 once var0; idx1 += inc3 */ - 0x7000000e, /* 019C(:1051): DRD2A: EU0=0 EU1=0 EU2=0 EU3=14 EXT MORE init=0 WS=0 RS=0 */ - 0x084cf25f, /* 01A0(:1051): DRD2B1: idx1 = EU3(); EU3(var9) */ - 0xd899037f, /* 01A4(:1052): LCDEXT: idx2 = idx1; idx2 > var13; idx2 += inc7 */ - 0x8019801b, /* 01A8(:1052): LCD: idx3 = var0; idx3 once var0; idx3 += inc3 */ - 0x040001f8, /* 01AC(:1053): DRD1A: FN=0 INT init=0 WS=0 RS=0 */ - 0x000001f8, /* 01B0(:0): NOP */ - 0x000001f8, /* 01B4(:0): NOP */ -}; -u32 MCD_SingleEu_TDT[]= -{ - 0x8218001b, /* 0000(:1248): LCD: idx0 = var4; idx0 once var0; idx0 += inc3 */ - 0x7000000d, /* 0004(:1249): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */ - 0x080cf81f, /* 0008(:1249): DRD2B1: idx0 = EU3(); EU3(idx0) */ - 0x8218801b, /* 000C(:1250): LCD: idx1 = var4; idx1 once var0; idx1 += inc3 */ - 0x6000000e, /* 0010(:1251): DRD2A: EU0=0 EU1=0 EU2=0 EU3=14 EXT init=0 WS=0 RS=0 */ - 0x084cf85f, /* 0014(:1251): DRD2B1: idx1 = EU3(); EU3(idx1) */ - 0x000001f8, /* 0018(:0): NOP */ - 0x8318001b, /* 001C(:1255): LCD: idx0 = var6; idx0 once var0; idx0 += inc3 */ - 0x7000000d, /* 0020(:1256): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */ - 0x014cf81f, /* 0024(:1256): DRD2B1: var5 = EU3(); EU3(idx0) */ - 0x6000000e, /* 0028(:1257): DRD2A: EU0=0 EU1=0 EU2=0 EU3=14 EXT init=0 WS=0 RS=0 */ - 0x01ccf81f, /* 002C(:1257): DRD2B1: var7 = EU3(); EU3(idx0) */ - 0x8498001b, /* 0030(:1260): LCD: idx0 = var9; idx0 once var0; idx0 += inc3 */ - 0x7000000f, /* 0034(:1261): DRD2A: EU0=0 EU1=0 EU2=0 EU3=15 EXT MORE init=0 WS=0 RS=0 */ - 0x080cf19f, /* 0038(:1261): DRD2B1: idx0 = EU3(); EU3(var6) */ - 0xd81882a4, /* 003C(:1262): LCDEXT: idx1 = idx0; idx1 >= var10; idx1 += inc4 */ - 0x8019001b, /* 0040(:1262): LCD: idx2 = var0; idx2 once var0; idx2 += inc3 */ - 0x60000003, /* 0044(:1263): DRD2A: EU0=0 EU1=0 EU2=0 EU3=3 EXT init=0 WS=0 RS=0 */ - 0x2c97c7df, /* 0048(:1263): DRD2B2: EU3(var9) */ - 0xd818826d, /* 004C(:1264): LCDEXT: idx1 = idx0; idx1 == var9; idx1 += inc5 */ - 0x8019001b, /* 0050(:1264): LCD: idx2 = var0; idx2 once var0; idx2 += inc3 */ - 0x60000003, /* 0054(:1265): DRD2A: EU0=0 EU1=0 EU2=0 EU3=3 EXT init=0 WS=0 RS=0 */ - 0x2c17c7df, /* 0058(:1265): DRD2B2: EU3(var1) */ - 0x000001f8, /* 005C(:0): NOP */ - 0xc282e01b, /* 0060(:1268): LCDEXT: idx0 = var5, idx1 = var5; ; idx0 += inc3, idx1 += inc3 */ - 0xc002a25e, /* 0064(:1268): LCDEXT: idx2 = var0, idx3 = var5; idx3 == var9; idx2 += inc3, idx3 += inc6 */ - 0x811a601b, /* 0068(:1269): LCD: idx4 = var2; ; idx4 += inc3 */ - 0xc184a102, /* 006C(:1272): LCDEXT: idx5 = var3, idx6 = var9; idx6 < var4; idx5 += inc0, idx6 += inc2 */ - 0x841be009, /* 0070(:1272): LCD: idx7 = var8; ; idx7 += inc1 */ - 0x63fe0000, /* 0074(:1275): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 EXT init=31 WS=3 RS=3 */ - 0x0d4cfddf, /* 0078(:1275): DRD2B1: *idx5 = EU3(); EU3(*idx7) */ - 0xda9b001b, /* 007C(:1277): LCDEXT: idx5 = idx5, idx6 = idx6; idx5 once var0; idx5 += inc3, idx6 += inc3 */ - 0x9b9be01b, /* 0080(:1277): LCD: idx7 = idx7; ; idx7 += inc3 */ - 0x70000002, /* 0084(:1279): DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */ - 0x004cf99f, /* 0088(:1279): DRD2B1: var1 = EU3(); EU3(idx6) */ - 0x70000006, /* 008C(:1280): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf88b, /* 0090(:1280): DRD2B1: idx2 = EU3(); EU3(idx2,var11) */ - 0x1000cb28, /* 0094(:1281): DRD1A: *idx2 = idx5; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 0098(:1282): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf88b, /* 009C(:1282): DRD2B1: idx2 = EU3(); EU3(idx2,var11) */ - 0x1000cb30, /* 00A0(:1283): DRD1A: *idx2 = idx6; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 00A4(:1284): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf88b, /* 00A8(:1284): DRD2B1: idx2 = EU3(); EU3(idx2,var11) */ - 0x0000cb38, /* 00AC(:1285): DRD1A: *idx2 = idx7; FN=0 init=0 WS=0 RS=0 */ - 0x000001f8, /* 00B0(:0): NOP */ - 0xc282e01b, /* 00B4(:1289): LCDEXT: idx0 = var5, idx1 = var5; ; idx0 += inc3, idx1 += inc3 */ - 0xc002a31e, /* 00B8(:1289): LCDEXT: idx2 = var0, idx3 = var5; idx3 == var12; idx2 += inc3, idx3 += inc6 */ - 0x811a601b, /* 00BC(:1290): LCD: idx4 = var2; ; idx4 += inc3 */ - 0xda9b001b, /* 00C0(:1293): LCDEXT: idx5 = idx5, idx6 = idx6; idx5 once var0; idx5 += inc3, idx6 += inc3 */ - 0x9b9be01b, /* 00C4(:1293): LCD: idx7 = idx7; ; idx7 += inc3 */ - 0x0000d3a0, /* 00C8(:1294): DRD1A: *idx4; FN=0 init=0 WS=0 RS=0 */ - 0xc184a102, /* 00CC(:1296): LCDEXT: idx5 = var3, idx6 = var9; idx6 < var4; idx5 += inc0, idx6 += inc2 */ - 0x841be009, /* 00D0(:1296): LCD: idx7 = var8; ; idx7 += inc1 */ - 0x6bfe0000, /* 00D4(:1299): DRD2A: EU0=0 EU1=0 EU2=0 EU3=0 TFD EXT init=31 WS=3 RS=3 */ - 0x0d4cfddf, /* 00D8(:1299): DRD2B1: *idx5 = EU3(); EU3(*idx7) */ - 0xda9b001b, /* 00DC(:1301): LCDEXT: idx5 = idx5, idx6 = idx6; idx5 once var0; idx5 += inc3, idx6 += inc3 */ - 0x9b9be01b, /* 00E0(:1301): LCD: idx7 = idx7; ; idx7 += inc3 */ - 0x70000002, /* 00E4(:1303): DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */ - 0x004cf99f, /* 00E8(:1303): DRD2B1: var1 = EU3(); EU3(idx6) */ - 0x70000006, /* 00EC(:1304): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf88b, /* 00F0(:1304): DRD2B1: idx2 = EU3(); EU3(idx2,var11) */ - 0x1000cb28, /* 00F4(:1305): DRD1A: *idx2 = idx5; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 00F8(:1306): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf88b, /* 00FC(:1306): DRD2B1: idx2 = EU3(); EU3(idx2,var11) */ - 0x1000cb30, /* 0100(:1307): DRD1A: *idx2 = idx6; FN=0 MORE init=0 WS=0 RS=0 */ - 0x70000006, /* 0104(:1308): DRD2A: EU0=0 EU1=0 EU2=0 EU3=6 EXT MORE init=0 WS=0 RS=0 */ - 0x088cf88b, /* 0108(:1308): DRD2B1: idx2 = EU3(); EU3(idx2,var11) */ - 0x0000cb38, /* 010C(:1309): DRD1A: *idx2 = idx7; FN=0 init=0 WS=0 RS=0 */ - 0x000001f8, /* 0110(:0): NOP */ - 0x8144801c, /* 0114(:1312): LCD: idx0 = var2 + var9 + 4; idx0 once var0; idx0 += inc3 */ - 0x0000c008, /* 0118(:1313): DRD1A: *idx0 = var1; FN=0 init=0 WS=0 RS=0 */ - 0xc398027f, /* 011C(:1315): LCDEXT: idx0 = var7; idx0 > var9; idx0 += inc7 */ - 0x8018801b, /* 0120(:1315): LCD: idx1 = var0; idx1 once var0; idx1 += inc3 */ - 0x040001f8, /* 0124(:1316): DRD1A: FN=0 INT init=0 WS=0 RS=0 */ -}; -#endif -u32 MCD_ENetRcv_TDT[]= -{ - 0x80004000, /* 0000(:1389): LCDEXT: idx0 = 0x00000000; ; */ - 0x81988000, /* 0004(:1389): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */ - 0x10000788, /* 0008(:1390): DRD1A: var1 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */ - 0x6000000a, /* 000C(:1391): DRD2A: EU0=0 EU1=0 EU2=0 EU3=10 EXT init=0 WS=0 RS=0 */ - 0x080cf05f, /* 0010(:1391): DRD2B1: idx0 = EU3(); EU3(var1) */ - 0x98180209, /* 0014(:1394): LCD: idx0 = idx0; idx0 != var8; idx0 += inc1 */ - 0x81c40004, /* 0018(:1396): LCD: idx1 = var3 + var8 + 4; idx1 once var0; idx1 += inc0 */ - 0x7000000e, /* 001C(:1397): DRD2A: EU0=0 EU1=0 EU2=0 EU3=14 EXT MORE init=0 WS=0 RS=0 */ - 0x010cf05f, /* 0020(:1397): DRD2B1: var4 = EU3(); EU3(var1) */ - 0x7000000c, /* 0024(:1398): DRD2A: EU0=0 EU1=0 EU2=0 EU3=12 EXT MORE init=0 WS=0 RS=0 */ - 0x01ccf05f, /* 0028(:1398): DRD2B1: var7 = EU3(); EU3(var1) */ - 0x70000004, /* 002C(:1399): DRD2A: EU0=0 EU1=0 EU2=0 EU3=4 EXT MORE init=0 WS=0 RS=0 */ - 0x014cf049, /* 0030(:1399): DRD2B1: var5 = EU3(); EU3(var1,var9) */ - 0x70000004, /* 0034(:1400): DRD2A: EU0=0 EU1=0 EU2=0 EU3=4 EXT MORE init=0 WS=0 RS=0 */ - 0x004cf04a, /* 0038(:1400): DRD2B1: var1 = EU3(); EU3(var1,var10) */ - 0x00000b88, /* 003C(:1403): DRD1A: var2 = *idx1; FN=0 init=0 WS=0 RS=0 */ - 0xc4030150, /* 0040(:1406): LCDEXT: idx1 = var8, idx2 = var6; idx1 < var5; idx1 += inc2, idx2 += inc0 */ - 0x8119e012, /* 0044(:1406): LCD: idx3 = var2; ; idx3 += inc2 */ - 0x03e0cf90, /* 0048(:1409): DRD1A: *idx3 = *idx2; FN=0 init=31 WS=0 RS=0 */ - 0x81188000, /* 004C(:1412): LCD: idx1 = var2; idx1 once var0; idx1 += inc0 */ - 0x000ac788, /* 0050(:1413): DRD1A: *idx1 = *idx1; FN=0 init=0 WS=1 RS=1 */ - 0xc4030000, /* 0054(:1415): LCDEXT: idx1 = var8, idx2 = var6; idx1 once var0; idx1 += inc0, idx2 += inc0 */ - 0x8199e000, /* 0058(:1415): LCD: idx3 = var3; ; idx3 += inc0 */ - 0x70000004, /* 005C(:1421): DRD2A: EU0=0 EU1=0 EU2=0 EU3=4 EXT MORE init=0 WS=0 RS=0 */ - 0x084cfc8b, /* 0060(:1421): DRD2B1: idx1 = EU3(); EU3(*idx2,var11) */ - 0x60000005, /* 0064(:1422): DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 EXT init=0 WS=0 RS=0 */ - 0x0cccf841, /* 0068(:1422): DRD2B1: *idx3 = EU3(); EU3(idx1,var1) */ - 0x81c60000, /* 006C(:1428): LCD: idx1 = var3 + var12; idx1 once var0; idx1 += inc0 */ - 0xc399021b, /* 0070(:1430): LCDEXT: idx2 = var7; idx2 > var8; idx2 += inc3 */ - 0x80198000, /* 0074(:1430): LCD: idx3 = var0; idx3 once var0; idx3 += inc0 */ - 0x00008400, /* 0078(:1431): DRD1A: idx1 = var0; FN=0 init=0 WS=0 RS=0 */ - 0x00000f08, /* 007C(:1432): DRD1A: var3 = idx1; FN=0 init=0 WS=0 RS=0 */ - 0x81988000, /* 0080(:1435): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */ - 0x10000788, /* 0084(:1436): DRD1A: var1 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */ - 0x6000000a, /* 0088(:1437): DRD2A: EU0=0 EU1=0 EU2=0 EU3=10 EXT init=0 WS=0 RS=0 */ - 0x080cf05f, /* 008C(:1437): DRD2B1: idx0 = EU3(); EU3(var1) */ - 0xc2188209, /* 0090(:1440): LCDEXT: idx1 = var4; idx1 != var8; idx1 += inc1 */ - 0x80190000, /* 0094(:1440): LCD: idx2 = var0; idx2 once var0; idx2 += inc0 */ - 0x040001f8, /* 0098(:1441): DRD1A: FN=0 INT init=0 WS=0 RS=0 */ - 0x000001f8, /* 009C(:0): NOP */ -}; -u32 MCD_ENetXmit_TDT[]= -{ - 0x80004000, /* 0000(:1516): LCDEXT: idx0 = 0x00000000; ; */ - 0x81988000, /* 0004(:1516): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */ - 0x10000788, /* 0008(:1517): DRD1A: var1 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */ - 0x6000000a, /* 000C(:1518): DRD2A: EU0=0 EU1=0 EU2=0 EU3=10 EXT init=0 WS=0 RS=0 */ - 0x080cf05f, /* 0010(:1518): DRD2B1: idx0 = EU3(); EU3(var1) */ - 0x98180309, /* 0014(:1521): LCD: idx0 = idx0; idx0 != var12; idx0 += inc1 */ - 0x80004003, /* 0018(:1523): LCDEXT: idx1 = 0x00000003; ; */ - 0x81c60004, /* 001C(:1523): LCD: idx2 = var3 + var12 + 4; idx2 once var0; idx2 += inc0 */ - 0x7000000e, /* 0020(:1524): DRD2A: EU0=0 EU1=0 EU2=0 EU3=14 EXT MORE init=0 WS=0 RS=0 */ - 0x014cf05f, /* 0024(:1524): DRD2B1: var5 = EU3(); EU3(var1) */ - 0x7000000c, /* 0028(:1525): DRD2A: EU0=0 EU1=0 EU2=0 EU3=12 EXT MORE init=0 WS=0 RS=0 */ - 0x028cf05f, /* 002C(:1525): DRD2B1: var10 = EU3(); EU3(var1) */ - 0x7000000d, /* 0030(:1526): DRD2A: EU0=0 EU1=0 EU2=0 EU3=13 EXT MORE init=0 WS=0 RS=0 */ - 0x018cf05f, /* 0034(:1526): DRD2B1: var6 = EU3(); EU3(var1) */ - 0x70000004, /* 0038(:1527): DRD2A: EU0=0 EU1=0 EU2=0 EU3=4 EXT MORE init=0 WS=0 RS=0 */ - 0x01ccf04d, /* 003C(:1527): DRD2B1: var7 = EU3(); EU3(var1,var13) */ - 0x10000b90, /* 0040(:1528): DRD1A: var2 = *idx2; FN=0 MORE init=0 WS=0 RS=0 */ - 0x60000004, /* 0044(:1529): DRD2A: EU0=0 EU1=0 EU2=0 EU3=4 EXT init=0 WS=0 RS=0 */ - 0x020cf0a1, /* 0048(:1529): DRD2B1: var8 = EU3(); EU3(var2,idx1) */ - 0xc3188312, /* 004C(:1532): LCDEXT: idx1 = var6; idx1 > var12; idx1 += inc2 */ - 0x83c70000, /* 0050(:1532): LCD: idx2 = var7 + var14; idx2 once var0; idx2 += inc0 */ - 0x00001f10, /* 0054(:1533): DRD1A: var7 = idx2; FN=0 init=0 WS=0 RS=0 */ - 0xc583a3c3, /* 0058(:1535): LCDEXT: idx1 = var11, idx2 = var7; idx2 >= var15; idx1 += inc0, idx2 += inc3 */ - 0x81042325, /* 005C(:1535): LCD: idx3 = var2, idx4 = var8; idx4 == var12; idx3 += inc4, idx4 += inc5 */ - 0x03e0c798, /* 0060(:1540): DRD1A: *idx1 = *idx3; FN=0 init=31 WS=0 RS=0 */ - 0xd8990000, /* 0064(:1543): LCDEXT: idx1 = idx1, idx2 = idx2; idx1 once var0; idx1 += inc0, idx2 += inc0 */ - 0x9999e000, /* 0068(:1543): LCD: idx3 = idx3; ; idx3 += inc0 */ - 0x000acf98, /* 006C(:1544): DRD1A: *idx3 = *idx3; FN=0 init=0 WS=1 RS=1 */ - 0xd8992306, /* 0070(:1546): LCDEXT: idx1 = idx1, idx2 = idx2; idx2 > var12; idx1 += inc0, idx2 += inc6 */ - 0x9999e03f, /* 0074(:1546): LCD: idx3 = idx3; ; idx3 += inc7 */ - 0x03eac798, /* 0078(:1549): DRD1A: *idx1 = *idx3; FN=0 init=31 WS=1 RS=1 */ - 0xd8990000, /* 007C(:1552): LCDEXT: idx1 = idx1, idx2 = idx2; idx1 once var0; idx1 += inc0, idx2 += inc0 */ - 0x9999e000, /* 0080(:1552): LCD: idx3 = idx3; ; idx3 += inc0 */ - 0x000acf98, /* 0084(:1553): DRD1A: *idx3 = *idx3; FN=0 init=0 WS=1 RS=1 */ - 0xd8990000, /* 0088(:1555): LCDEXT: idx1 = idx1, idx2 = idx2; idx1 once var0; idx1 += inc0, idx2 += inc0 */ - 0x99832302, /* 008C(:1555): LCD: idx3 = idx3, idx4 = var6; idx4 > var12; idx3 += inc0, idx4 += inc2 */ - 0x0beac798, /* 0090(:1558): DRD1A: *idx1 = *idx3; FN=0 TFD init=31 WS=1 RS=1 */ - 0x81988000, /* 0094(:1560): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */ - 0x6000000b, /* 0098(:1561): DRD2A: EU0=0 EU1=0 EU2=0 EU3=11 EXT init=0 WS=0 RS=0 */ - 0x0c4cfc5f, /* 009C(:1561): DRD2B1: *idx1 = EU3(); EU3(*idx1) */ - 0x81c80000, /* 00A0(:1563): LCD: idx1 = var3 + var16; idx1 once var0; idx1 += inc0 */ - 0xc5190312, /* 00A4(:1565): LCDEXT: idx2 = var10; idx2 > var12; idx2 += inc2 */ - 0x80198000, /* 00A8(:1565): LCD: idx3 = var0; idx3 once var0; idx3 += inc0 */ - 0x00008400, /* 00AC(:1566): DRD1A: idx1 = var0; FN=0 init=0 WS=0 RS=0 */ - 0x00000f08, /* 00B0(:1567): DRD1A: var3 = idx1; FN=0 init=0 WS=0 RS=0 */ - 0x81988000, /* 00B4(:1570): LCD: idx1 = var3; idx1 once var0; idx1 += inc0 */ - 0x10000788, /* 00B8(:1571): DRD1A: var1 = *idx1; FN=0 MORE init=0 WS=0 RS=0 */ - 0x6000000a, /* 00BC(:1572): DRD2A: EU0=0 EU1=0 EU2=0 EU3=10 EXT init=0 WS=0 RS=0 */ - 0x080cf05f, /* 00C0(:1572): DRD2B1: idx0 = EU3(); EU3(var1) */ - 0xc2988309, /* 00C4(:1575): LCDEXT: idx1 = var5; idx1 != var12; idx1 += inc1 */ - 0x80190000, /* 00C8(:1575): LCD: idx2 = var0; idx2 once var0; idx2 += inc0 */ - 0x040001f8, /* 00CC(:1576): DRD1A: FN=0 INT init=0 WS=0 RS=0 */ - 0x000001f8, /* 00D0(:0): NOP */ -}; - -#ifdef MCD_INCLUDE_EU -MCD_bufDesc MCD_singleBufDescs[NCHANNELS]; -#endif diff --git a/dma/MCD_tasksInit.c b/dma/MCD_tasksInit.c deleted file mode 100755 index fd651b2..0000000 --- a/dma/MCD_tasksInit.c +++ /dev/null @@ -1,224 +0,0 @@ -/* - * File: MCD_tasksInit.c - * Purpose: Functions for initializing variable tables of different - * types of tasks. - * - * Notes: - */ - -/* - * Do not edit! - */ - -#include "MCD_dma.h" - -extern dmaRegs *MCD_dmaBar; - - -/* - * Task 0 - */ - -void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel) -{ - - MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */ - MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ - MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ - MCD_SET_VAR(taskTable+channel, 11, (u32)xferSize); /* var[11] */ - MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ - MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */ - MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */ - MCD_SET_VAR(taskTable+channel, 3, (u32)0x00000000); /* var[3] */ - MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */ - MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */ - MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */ - MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */ - MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */ - MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */ - MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */ - MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000); /* var[12] */ - MCD_SET_VAR(taskTable+channel, 13, (u32)0x80000000); /* var[13] */ - MCD_SET_VAR(taskTable+channel, 14, (u32)0x00000010); /* var[14] */ - MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004); /* var[15] */ - MCD_SET_VAR(taskTable+channel, 16, (u32)0x08000000); /* var[16] */ - MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */ - MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000); /* inc[4] */ - MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000001); /* inc[5] */ - MCD_SET_VAR(taskTable+channel, 30, (u32)0x40000000); /* inc[6] */ - - /* Set the task's Enable bit in its Task Control Register */ - MCD_dmaBar->taskControl[channel] |= (u16)0x8000; -} - - -/* - * Task 1 - */ - -void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel) -{ - - MCD_SET_VAR(taskTable+channel, 7, (u32)srcAddr); /* var[7] */ - MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ - MCD_SET_VAR(taskTable+channel, 2, (u32)destAddr); /* var[2] */ - MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ - MCD_SET_VAR(taskTable+channel, 3, (u32)dmaSize); /* var[3] */ - MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ - MCD_SET_VAR(taskTable+channel, 5, (u32)flags); /* var[5] */ - MCD_SET_VAR(taskTable+channel, 1, (u32)currBD); /* var[1] */ - MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */ - MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */ - MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */ - MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */ - MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000004); /* var[9] */ - MCD_SET_VAR(taskTable+channel, 10, (u32)0x08000000); /* var[10] */ - MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */ - MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000001); /* inc[4] */ - MCD_SET_VAR(taskTable+channel, 29, (u32)0x40000000); /* inc[5] */ - - /* Set the task's Enable bit in its Task Control Register */ - MCD_dmaBar->taskControl[channel] |= (u16)0x8000; -} - - -/* - * Task 2 - */ - -void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel) -{ - - MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */ - MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ - MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ - MCD_SET_VAR(taskTable+channel, 12, (u32)xferSize); /* var[12] */ - MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ - MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */ - MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */ - MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */ - MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */ - MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */ - MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */ - MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */ - MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */ - MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */ - MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */ - MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000000); /* var[11] */ - MCD_SET_VAR(taskTable+channel, 13, (u32)0x00000000); /* var[13] */ - MCD_SET_VAR(taskTable+channel, 14, (u32)0x80000000); /* var[14] */ - MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000010); /* var[15] */ - MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000001); /* var[16] */ - MCD_SET_VAR(taskTable+channel, 17, (u32)0x00000004); /* var[17] */ - MCD_SET_VAR(taskTable+channel, 18, (u32)0x08000000); /* var[18] */ - MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */ - MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000); /* inc[4] */ - MCD_SET_VAR(taskTable+channel, 29, (u32)0xc0000000); /* inc[5] */ - MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001); /* inc[6] */ - MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000); /* inc[7] */ - - /* Set the task's Enable bit in its Task Control Register */ - MCD_dmaBar->taskControl[channel] |= (u16)0x8000; -} - - -/* - * Task 3 - */ - -void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel) -{ - - MCD_SET_VAR(taskTable+channel, 8, (u32)srcAddr); /* var[8] */ - MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */ - MCD_SET_VAR(taskTable+channel, 3, (u32)destAddr); /* var[3] */ - MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */ - MCD_SET_VAR(taskTable+channel, 4, (u32)dmaSize); /* var[4] */ - MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */ - MCD_SET_VAR(taskTable+channel, 6, (u32)flags); /* var[6] */ - MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */ - MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */ - MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */ - MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */ - MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */ - MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */ - MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000001); /* var[10] */ - MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000004); /* var[11] */ - MCD_SET_VAR(taskTable+channel, 12, (u32)0x08000000); /* var[12] */ - MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */ - MCD_SET_VAR(taskTable+channel, 28, (u32)0xc0000000); /* inc[4] */ - MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000); /* inc[5] */ - MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001); /* inc[6] */ - MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000); /* inc[7] */ - - /* Set the task's Enable bit in its Task Control Register */ - MCD_dmaBar->taskControl[channel] |= (u16)0x8000; -} - - -/* - * Task 4 - */ - -void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel) -{ - - MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */ - MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */ - MCD_SET_VAR(taskTable+channel, 6, (u32)rcvFifoPtr); /* var[6] */ - MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */ - MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */ - MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */ - MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */ - MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */ - MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */ - MCD_SET_VAR(taskTable+channel, 9, (u32)0x0000ffff); /* var[9] */ - MCD_SET_VAR(taskTable+channel, 10, (u32)0x30000000); /* var[10] */ - MCD_SET_VAR(taskTable+channel, 11, (u32)0x0fffffff); /* var[11] */ - MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000008); /* var[12] */ - MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000); /* inc[0] */ - MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000); /* inc[1] */ - MCD_SET_VAR(taskTable+channel, 26, (u32)0x20000004); /* inc[2] */ - MCD_SET_VAR(taskTable+channel, 27, (u32)0x40000000); /* inc[3] */ - - /* Set the task's Enable bit in its Task Control Register */ - MCD_dmaBar->taskControl[channel] |= (u16)0x8000; -} - - -/* - * Task 5 - */ - -void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel) -{ - - MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */ - MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */ - MCD_SET_VAR(taskTable+channel, 11, (u32)xmitFifoPtr); /* var[11] */ - MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */ - MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */ - MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */ - MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */ - MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */ - MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */ - MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */ - MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */ - MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */ - MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000); /* var[12] */ - MCD_SET_VAR(taskTable+channel, 13, (u32)0x0000ffff); /* var[13] */ - MCD_SET_VAR(taskTable+channel, 14, (u32)0xffffffff); /* var[14] */ - MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004); /* var[15] */ - MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000008); /* var[16] */ - MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000); /* inc[0] */ - MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000); /* inc[1] */ - MCD_SET_VAR(taskTable+channel, 26, (u32)0x40000000); /* inc[2] */ - MCD_SET_VAR(taskTable+channel, 27, (u32)0xc000fffc); /* inc[3] */ - MCD_SET_VAR(taskTable+channel, 28, (u32)0xe0000004); /* inc[4] */ - MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000); /* inc[5] */ - MCD_SET_VAR(taskTable+channel, 30, (u32)0x4000ffff); /* inc[6] */ - MCD_SET_VAR(taskTable+channel, 31, (u32)0xe0000001); /* inc[7] */ - - /* Set the task's Enable bit in its Task Control Register */ - MCD_dmaBar->taskControl[channel] |= (u16)0x8000; -} diff --git a/dma/dma.c b/dma/dma.c deleted file mode 100644 index 381142d..0000000 --- a/dma/dma.c +++ /dev/null @@ -1,682 +0,0 @@ -/* - * dma.c - * - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#include "dma.h" -#include -#include "mcd_initiators.h" -#include "bas_printf.h" -#include "bas_string.h" -#include "cache.h" -#include "exceptions.h" - -#if defined(MACHINE_FIREBEE) -#include "firebee.h" -#elif defined(MACHINE_M5484LITE) -#include "m5484l.h" -#elif defined(MACHINE_M54455) -#include "m54455.h" -#else -#error "unknown machine!" -#endif /* MACHINE_FIREBEE */ - -//#define DBG_DMA -#ifdef DBG_DMA -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_DMA */ -#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0) - -extern char _SYS_SRAM[]; -#define SYS_SRAM &_SYS_SRAM[0] - -struct dma_channel -{ - int req; - void (*handler)(void); -}; - -static char used_reqs[32] = -{ - DMA_ALWAYS, DMA_DSPI_RXFIFO, DMA_DSPI_TXFIFO, DMA_DREQ0, - DMA_PSC0_RX, DMA_PSC0_TX, DMA_USB_EP0, DMA_USB_EP1, - DMA_USB_EP2, DMA_USB_EP3, DMA_PCI_TX, DMA_PCI_RX, - DMA_PSC1_RX, DMA_PSC1_TX, DMA_I2C_RX, DMA_I2C_TX, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0 -}; - -static struct dma_channel dma_channel[NCHANNELS] = -{ - {-1, NULL}, {-1, NULL}, {-1, NULL}, {-1, NULL}, - {-1, NULL}, {-1, NULL}, {-1, NULL}, {-1, NULL}, - {-1, NULL}, {-1, NULL}, {-1, NULL}, {-1, NULL}, - {-1, NULL}, {-1, NULL}, {-1, NULL}, {-1, NULL}, -}; - -/* - * Enable all DMA interrupts - * - */ -void dma_irq_enable(void) -{ - /* Unmask all task interrupts */ - MCF_DMA_DIMR = 0; - - /* Clear the interrupt pending register */ - MCF_DMA_DIPR = 0; - - dbg("DMA task interrupts unmasked.\r\n"); -} - -/* - * Disable all DMA interrupts - */ -void dma_irq_disable(void) -{ - /* Mask all task interrupts */ - MCF_DMA_DIMR = (uint32_t) ~0; - - /* Clear any pending task interrupts */ - MCF_DMA_DIPR = (uint32_t) ~0; - - /* Mask the DMA interrupt in the interrupt controller */ - MCF_INTC_IMRH |= MCF_INTC_IMRH_INT_MASK48; - - dbg("DMA interrupts masked and disabled\r\n"); -} - -int dma_set_initiator(int initiator) -{ - switch (initiator) - { - /* these initiators are always active */ - case DMA_ALWAYS: - case DMA_DSPI_RXFIFO: - case DMA_DSPI_TXFIFO: - case DMA_DREQ0: - case DMA_PSC0_RX: - case DMA_PSC0_TX: - case DMA_USB_EP0: - case DMA_USB_EP1: - case DMA_USB_EP2: - case DMA_USB_EP3: - case DMA_PCI_TX: - case DMA_PCI_RX: - case DMA_PSC1_RX: - case DMA_I2C_RX: - case DMA_I2C_TX: - break; - - case DMA_FEC0_RX: - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC16(3)) | MCF_DMA_IMCR_IMC16_FEC0RX; - used_reqs[16] = DMA_FEC0_RX; - break; - - case DMA_FEC0_TX: - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC17(3)) | MCF_DMA_IMCR_IMC17_FEC0TX; - used_reqs[17] = DMA_FEC0_TX; - break; - - case DMA_FEC1_RX: - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC20(3)) | MCF_DMA_IMCR_IMC20_FEC1RX; - used_reqs[20] = DMA_FEC1_RX; - break; - - case DMA_FEC1_TX: - if (used_reqs[21] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC21(3)) | MCF_DMA_IMCR_IMC21_FEC1TX; - used_reqs[21] = DMA_FEC1_TX; - } - else if (used_reqs[25] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC25(3)) | MCF_DMA_IMCR_IMC25_FEC1TX; - used_reqs[25] = DMA_FEC1_TX; - } - else if (used_reqs[31] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC31(3)) | MCF_DMA_IMCR_IMC31_FEC1TX; - used_reqs[31] = DMA_FEC1_TX; - } - else /* No empty slots */ - { - err("no free slot found\r\n"); - - return 1; - } - break; - - case DMA_DREQ1: - if (used_reqs[29] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC29(3)) | MCF_DMA_IMCR_IMC29_DREQ1; - used_reqs[29] = DMA_DREQ1; - } - else if (used_reqs[21] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC21(3)) | MCF_DMA_IMCR_IMC21_DREQ1; - used_reqs[21] = DMA_DREQ1; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_CTM0: - if (used_reqs[24] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC24(3)) | MCF_DMA_IMCR_IMC24_CTM0; - used_reqs[24] = DMA_CTM0; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_CTM1: - if (used_reqs[25] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC25(3)) | MCF_DMA_IMCR_IMC25_CTM1; - used_reqs[25] = DMA_CTM1; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_CTM2: - if (used_reqs[26] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC26(3)) | MCF_DMA_IMCR_IMC26_CTM2; - used_reqs[26] = DMA_CTM2; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_CTM3: - if (used_reqs[27] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC27(3)) | MCF_DMA_IMCR_IMC27_CTM3; - used_reqs[27] = DMA_CTM3; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_CTM4: - if (used_reqs[28] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC28(3)) | MCF_DMA_IMCR_IMC28_CTM4; - used_reqs[28] = DMA_CTM4; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_CTM5: - if (used_reqs[29] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC29(3)) | MCF_DMA_IMCR_IMC29_CTM5; - used_reqs[29] = DMA_CTM5; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_CTM6: - if (used_reqs[30] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC30(3)) | MCF_DMA_IMCR_IMC30_CTM6; - used_reqs[30] = DMA_CTM6; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_CTM7: - if (used_reqs[31] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC31(3)) | MCF_DMA_IMCR_IMC31_CTM7; - used_reqs[31] = DMA_CTM7; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_USBEP4: - if (used_reqs[26] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC26(3)) | MCF_DMA_IMCR_IMC26_USBEP4; - used_reqs[26] = DMA_USBEP4; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_USBEP5: - if (used_reqs[27] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC27(3)) | MCF_DMA_IMCR_IMC27_USBEP5; - used_reqs[27] = DMA_USBEP5; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_USBEP6: - if (used_reqs[28] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC28(3)) | MCF_DMA_IMCR_IMC28_USBEP6; - used_reqs[28] = DMA_USBEP6; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - return 1; - } - break; - - case DMA_PSC2_RX: - if (used_reqs[28] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC28(3)) | MCF_DMA_IMCR_IMC28_PSC2RX; - used_reqs[28] = DMA_PSC2_RX; } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_PSC2_TX: - if (used_reqs[29] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC29(3)) | MCF_DMA_IMCR_IMC29_PSC2TX; - used_reqs[29] = DMA_PSC2_TX; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_PSC3_RX: - if (used_reqs[30] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC30(3)) | MCF_DMA_IMCR_IMC30_PSC3RX; - used_reqs[30] = DMA_PSC3_RX; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - case DMA_PSC3_TX: - if (used_reqs[31] == 0) - { - MCF_DMA_IMCR = (MCF_DMA_IMCR & ~MCF_DMA_IMCR_IMC31(3)) | MCF_DMA_IMCR_IMC31_PSC3TX; - used_reqs[31] = DMA_PSC3_TX; - } - else /* No empty slots */ - { - err("no free slot\r\n"); - - return 1; - } - break; - - default: - { - err("don't know what to do\r\n"); - - return 1; - } - } - return 0; -} - -/* - * Return the initiator number for the given requestor - * - * Parameters: - * requestor Initiator/Requestor identifier - * - * Return Value: - * The initiator number (0-31) if initiator has been assigned - * 0 (always initiator) otherwise - */ -uint32_t dma_get_initiator(int requestor) -{ - uint32_t i; - - for (i = 0; i < sizeof(used_reqs); ++i) - { - if (used_reqs[i] == requestor) - return i; - } - err("no initiator found for requestor %d\r\n", requestor); - - return 0; -} - -/* - * Remove the given initiator from the active list - * - * Parameters: - * requestor Initiator/Requestor identifier - */ -void dma_free_initiator(int requestor) -{ - uint32_t i; - - for (i = 16; i < sizeof(used_reqs); ++i) - { - if (used_reqs[i] == requestor) - { - used_reqs[i] = 0; - break; - } - } - dbg("DMA requestor %d freed\r\n", requestor); -} - -/* - * Attempt to find an available channel and mark it as used - * - * Parameters: - * requestor Initiator/Requestor identifier - * - * Return Value: - * First available channel or -1 if they are all occupied - */ -int dma_set_channel(int requestor, void (*handler)(void)) -{ - int i; - - /* Check to see if this requestor is already assigned to a channel */ - dbg("check if requestor %d is already assigned to a channel\r\n", requestor); - if ((i = dma_get_channel(requestor)) != -1) - { - return i; - } - - for (i = 0; i < NCHANNELS; ++i) - { - if (dma_channel[i].req == -1) - { - dma_channel[i].req = requestor; - dma_channel[i].handler = handler; - dbg("assigned channel %d to requestor %d\r\n", i, requestor); - return i; - } - } - err("no free DMA channel found for requestor %d\r\n", requestor); - - /* All channels taken */ - return -1; -} - -void dma_clear_channel(int channel) -{ - if(channel >= 0 && channel < NCHANNELS) - { - dma_channel[channel].req = -1; - dma_channel[channel].handler = NULL; - dbg("cleared DMA channel %d\r\n", channel); - } -} - -/* - * Return the channel being initiated by the given requestor - * - * Parameters: - * requestor Initiator/Requestor identifier - * - * Return Value: - * Channel that the requestor is controlling or -1 if hasn't been - * activated - */ -int dma_get_channel(int requestor) -{ - uint32_t i; - - for (i = 0; i < NCHANNELS; ++i) - { - if (dma_channel[i].req == requestor) - return i; - } - dbg("no channel occupied by requestor %d\r\n", requestor); - return -1; -} - -/* - * Remove the channel being initiated by the given requestor from - * the active list - * - * Parameters: - * requestor Initiator/Requestor identifier - */ -void dma_free_channel(int requestor) -{ - uint32_t i; - - for (i = 0; i < NCHANNELS; ++i) - { - if (dma_channel[i].req == requestor) - { - dma_channel[i].req = -1; - dma_channel[i].handler = NULL; - break; - } - } -} - -/* - * This is the catch-all interrupt handler for the mult-channel DMA - */ -bool dma_interrupt_handler(void *arg1, void *arg2) -{ - int i, interrupts; - uint32_t ipl; - - ipl = set_ipl(7); /* do not disturb */ - - /* - * Determine which interrupt(s) triggered by AND'ing the - * pending interrupts with those that aren't masked. - */ - interrupts = MCF_DMA_DIPR & ~MCF_DMA_DIMR; - - /* Make sure we are here for a reason */ - if (interrupts == 0) - { - err("not DMA interrupt!\r\n"); - return 0; - } - - dbg(""); - /* Clear the interrupt in the pending register */ - MCF_DMA_DIPR = interrupts; - - for (i = 0; i < 16; ++i, interrupts >>= 1) - { - if (interrupts & 0x1) - { - /* If there is a handler, call it */ - if (dma_channel[i].handler != NULL) - { - dbg("call handler for DMA channel %d (%p)\r\n", i, dma_channel[i].handler); - dma_channel[i].handler(); - } - } - } - - set_ipl(ipl); - - return true; /* handled */ -} -/********************************************************************/ - -void *dma_memcpy(void *dst, void *src, size_t n) -{ - int ret; - -#ifdef DBG_DMA - int32_t time; - int32_t start; - int32_t end; - - start = MCF_SLT0_SCNT; -#endif /* DBG_DMA */ - - ret = MCD_startDma(1, src, 4, dst, 4, n, 4, DMA_ALWAYS, 0, MCD_SINGLE_DMA, 0); - if (ret == MCD_OK) - { - dbg("DMA on channel 1 successfully started\r\n"); - } - - do - { - ret = MCD_dmaStatus(1); -#ifdef _NOT_USED_ /* suppress annoying printout for now */ - switch (ret) - { - case MCD_NO_DMA: - xprintf("MCD_NO_DMA: no DMA active on this channel\r\n"); - return NULL; - break; - case MCD_IDLE: - xprintf("MCD_IDLE: DMA defined but not active (initiator not ready)\r\n"); - break; - case MCD_RUNNING: - xprintf("MCD_RUNNING: DMA active and working on this channel\r\n"); - break; - case MCD_PAUSED: - xprintf("MCD_PAUSED: DMA defined and enabled, but currently paused\r\n"); - break; - case MCD_HALTED: - xprintf("MCD_HALTED: DMA killed\r\n"); - return NULL; - break; - case MCD_DONE: - xprintf("MCD_DONE: DMA finished\r\n"); - break; - case MCD_CHANNEL_INVALID: - xprintf("MCD_CHANNEL_INVALID: invalid DMA channel\r\n"); - return NULL; - break; - default: - xprintf("unknown DMA status %d\r\n", ret); - break; - } -#endif - } while (ret != MCD_DONE); - -#ifdef DBG_DMA - end = MCF_SLT0_SCNT; - time = (start - end) / (SYSCLK / 1000) / 1000; -#endif /* DBG_DMA */ - dbg("took %d ms (%f Mbytes/second)\r\n", time, n / (float) time / 1000.0); - - return dst; -} - -int dma_init(void) -{ - int i; - int res; - - dbg("MCD DMA API initialization: "); - res = MCD_initDma((dmaRegs *) &_MBAR[0x8000], SYS_SRAM, MCD_RELOC_TASKS | MCD_COMM_PREFETCH_EN); - if (res != MCD_OK) - { - err("DMA API initialization failed (0x%x)\r\n", res); - return 0; - } - - /* - * make sure dma_channel array is properly initialized - */ - for (i = 0; i < NCHANNELS; i++) - { - dma_channel[i].req = -1; - dma_channel[i].handler = NULL; - } - - // test - dma_memcpy((void *) 0x10000, (void *) 0x03e00000, 0x00100000); /* copy one megabyte of flash to RAM */ - - return 0; -} - diff --git a/dump.bdm b/dump.bdm deleted file mode 100755 index 9400201..0000000 --- a/dump.bdm +++ /dev/null @@ -1,17 +0,0 @@ -#!/usr/local/bin/bdmctrl -D2 -v9 -d9 -# -# firebee board initialization for bdmctrl -# -open $1 - -dump-register D0 -#dump-register ASID -dump-register ACR0 -dump-register ACR1 -#dump-register ACR2 -#dump-register ACR3 -dump-register SR -dump-register CACR -# dump-register RAMBAR1 -# dump-register RAMBAR2 -dump-register MBAR diff --git a/exe/basflash.c b/exe/basflash.c deleted file mode 100644 index 98c97a1..0000000 --- a/exe/basflash.c +++ /dev/null @@ -1,675 +0,0 @@ -/* - * basflash.c - * - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#include -#include "bas_printf.h" -#include "bas_string.h" -#include "diskio.h" -#include "ff.h" -#include "s19reader.h" - -#ifdef MACHINE_FIREBEE -#include "firebee.h" -#endif /* MACHINE_FIREBEE */ - -#ifdef MACHINE_M5484LITE -#include "m5484l.h" -#endif /* MACHINE_M5484LITE */ - -#define AMD_FLASH_BUS_SHIFT 1 -#define AMD_FLASH_CELL volatile uint16_t -#define AMD_FLASH_CELL_BYTES 2 -#define AMD_FLASH_CELL_MASK 0x1 -#define AMD_FLASH_CMD_DATA(x) ((uint16_t) x) - -struct amd_flash_sector_info -{ - uint32_t size; /* sector size in bytes */ - uint32_t offset; /* offset from base of device */ -}; - -/* - * AM29LV640D flash layout (bottom boot as used in the Firebee ) - */ -static struct amd_flash_sector_info sector[] = -{ - { 8 * 1024, 0x00000000 }, /* SA0 */ - { 8 * 1024, 0x00008000 }, /* SA1 */ - { 8 * 1024, 0x00010000 }, /* SA2 */ - { 8 * 1024, 0x00018000 }, /* SA3 */ - { 8 * 1024, 0x00020000 }, /* SA4 */ - { 8 * 1024, 0x00028000 }, /* SA5 */ - { 8 * 1024, 0x00030000 }, /* SA6 */ - { 8 * 1024, 0x00038000 }, /* SA7 */ - { 8 * 1024, 0x00040000 }, /* SA8 */ - { 64 * 1024, 0x00048000 }, /* SA9 */ - { 64 * 1024, 0x00050000 }, /* SA10 */ - { 64 * 1024, 0x00058000 }, /* SA11 */ - { 64 * 1024, 0x00060000 }, /* SA12 */ - { 64 * 1024, 0x00068000 }, /* SA13 */ - { 64 * 1024, 0x00070000 }, /* SA14 */ - { 64 * 1024, 0x00078000 }, /* SA15 */ - { 64 * 1024, 0x00080000 }, /* SA16 */ - { 64 * 1024, 0x00088000 }, /* SA17 */ - { 64 * 1024, 0x00090000 }, /* SA18 */ - { 64 * 1024, 0x00098000 }, /* SA19 */ - { 64 * 1024, 0x000a0000 }, /* SA20 */ - { 64 * 1024, 0x000a8000 }, /* SA21 */ - { 64 * 1024, 0x000b0000 }, /* SA22 */ - { 64 * 1024, 0x000b8000 }, /* SA23 */ - { 64 * 1024, 0x000c0000 }, /* SA24 */ - { 64 * 1024, 0x000c8000 }, /* SA25 */ - { 64 * 1024, 0x000d0000 }, /* SA26 */ - { 64 * 1024, 0x000d8000 }, /* SA27 */ - { 64 * 1024, 0x000e0000 }, /* SA28 */ - { 64 * 1024, 0x000e8000 }, /* SA29 */ - { 64 * 1024, 0x000f0000 }, /* SA30 */ - { 64 * 1024, 0x000f8000 }, /* SA31 */ - { 64 * 1024, 0x00100000 }, /* SA32 */ - { 64 * 1024, 0x00108000 }, /* SA32 */ - { 64 * 1024, 0x00110000 }, /* SA34 */ - { 64 * 1024, 0x00118000 }, /* SA35 */ - { 64 * 1024, 0x00120000 }, /* SA36 */ - { 64 * 1024, 0x00128000 }, /* SA37 */ - { 64 * 1024, 0x00130000 }, /* SA38 */ - { 64 * 1024, 0x00138000 }, /* SA39 */ - { 64 * 1024, 0x00140000 }, /* SA40 */ - { 64 * 1024, 0x00148000 }, /* SA41 */ - { 64 * 1024, 0x00150000 }, /* SA42 */ - { 64 * 1024, 0x00158000 }, /* SA43 */ - { 64 * 1024, 0x00160000 }, /* SA44 */ - { 64 * 1024, 0x00168000 }, /* SA45 */ - { 64 * 1024, 0x00170000 }, /* SA46 */ - { 64 * 1024, 0x00178000 }, /* SA47 */ - { 64 * 1024, 0x00180000 }, /* SA48 */ - { 64 * 1024, 0x00188000 }, /* SA49 */ - { 64 * 1024, 0x00190000 }, /* SA50 */ - { 64 * 1024, 0x00198000 }, /* SA51 */ - { 64 * 1024, 0x001a0000 }, /* SA52 */ - { 64 * 1024, 0x001a8000 }, /* SA53 */ - { 64 * 1024, 0x001b0000 }, /* SA54 */ - { 64 * 1024, 0x001b8000 }, /* SA55 */ - { 64 * 1024, 0x001c0000 }, /* SA56 */ - { 64 * 1024, 0x001c8000 }, /* SA57 */ - { 64 * 1024, 0x001d0000 }, /* SA58 */ - { 64 * 1024, 0x001d8000 }, /* SA59 */ - { 64 * 1024, 0x001e0000 }, /* SA60 */ - { 64 * 1024, 0x001e8000 }, /* SA61 */ - { 64 * 1024, 0x001f0000 }, /* SA62 */ - { 64 * 1024, 0x001f8000 }, /* SA63 */ - { 64 * 1024, 0x00200000 }, /* SA64 */ - { 64 * 1024, 0x00208000 }, /* SA65 */ - { 64 * 1024, 0x00210000 }, /* SA66 */ - { 64 * 1024, 0x00218000 }, /* SA67 */ - { 64 * 1024, 0x00220000 }, /* SA68 */ - { 64 * 1024, 0x00228000 }, /* SA69 */ - { 64 * 1024, 0x00230000 }, /* SA70 */ - { 64 * 1024, 0x00238000 }, /* SA71 */ - { 64 * 1024, 0x00240000 }, /* SA72 */ - { 64 * 1024, 0x00248000 }, /* SA73 */ - { 64 * 1024, 0x00250000 }, /* SA74 */ - { 64 * 1024, 0x00258000 }, /* SA75 */ - { 64 * 1024, 0x00260000 }, /* SA76 */ - { 64 * 1024, 0x00268000 }, /* SA77 */ - { 64 * 1024, 0x00270000 }, /* SA78 */ - { 64 * 1024, 0x00278000 }, /* SA79 */ - { 64 * 1024, 0x00280000 }, /* SA80 */ - { 64 * 1024, 0x00288000 }, /* SA81 */ - { 64 * 1024, 0x00290000 }, /* SA82 */ - { 64 * 1024, 0x00298000 }, /* SA83 */ - { 64 * 1024, 0x002a0000 }, /* SA84 */ - { 64 * 1024, 0x002a8000 }, /* SA85 */ - { 64 * 1024, 0x002b0000 }, /* SA86 */ - { 64 * 1024, 0x002b8000 }, /* SA87 */ - { 64 * 1024, 0x002c0000 }, /* SA88 */ - { 64 * 1024, 0x002c8000 }, /* SA89 */ - { 64 * 1024, 0x002d0000 }, /* SA90 */ - { 64 * 1024, 0x002d8000 }, /* SA91 */ - { 64 * 1024, 0x002e0000 }, /* SA92 */ - { 64 * 1024, 0x002e8000 }, /* SA93 */ - { 64 * 1024, 0x002f0000 }, /* SA94 */ - { 64 * 1024, 0x002f8000 }, /* SA95 */ - { 64 * 1024, 0x00300000 }, /* SA96 */ - { 64 * 1024, 0x00308000 }, /* SA97 */ - { 64 * 1024, 0x00310000 }, /* SA98 */ - { 64 * 1024, 0x00318000 }, /* SA99 */ - { 64 * 1024, 0x00320000 }, /* SA100 */ - { 64 * 1024, 0x00328000 }, /* SA101 */ - { 64 * 1024, 0x00330000 }, /* SA102 */ - { 64 * 1024, 0x00338000 }, /* SA103 */ - { 64 * 1024, 0x00340000 }, /* SA104 */ - { 64 * 1024, 0x00348000 }, /* SA105 */ - { 64 * 1024, 0x00350000 }, /* SA106 */ - { 64 * 1024, 0x00358000 }, /* SA107 */ - { 64 * 1024, 0x00360000 }, /* SA108 */ - { 64 * 1024, 0x00368000 }, /* SA109 */ - { 64 * 1024, 0x00370000 }, /* SA110 */ - { 64 * 1024, 0x00378000 }, /* SA111 */ - { 64 * 1024, 0x00380000 }, /* SA112 */ - { 64 * 1024, 0x00388000 }, /* SA113 */ - { 64 * 1024, 0x00390000 }, /* SA114 */ - { 64 * 1024, 0x00398000 }, /* SA115 */ - { 64 * 1024, 0x003a0000 }, /* SA116 */ - { 64 * 1024, 0x003a8000 }, /* SA117 */ - { 64 * 1024, 0x003b0000 }, /* SA118 */ - { 64 * 1024, 0x003b8000 }, /* SA119 */ - { 64 * 1024, 0x003c0000 }, /* SA120 */ - { 64 * 1024, 0x003c8000 }, /* SA121 */ - { 64 * 1024, 0x003d0000 }, /* SA122 */ - { 64 * 1024, 0x003d8000 }, /* SA123 */ - { 64 * 1024, 0x003e0000 }, /* SA124 */ - { 64 * 1024, 0x003e8000 }, /* SA125 */ - { 64 * 1024, 0x003f0000 }, /* SA126 */ - { 64 * 1024, 0x003f8000 }, /* SA127 */ -}; - -static const int AMD_FLASH_SECTORS = sizeof(sector) / sizeof(struct amd_flash_sector_info); - -#define SOFFSET(n) (sector[n].offset) -#define SADDR(n) (SOFFSET(n) >> AMD_FLASH_BUS_SHIFT) -#define SSIZE(n) (sector[n].size) - -#define AMD_FLASH_DEVICES 1 - -static AMD_FLASH_CELL *pFlash; - -typedef struct romram -{ - uint32_t flash_address; - uint32_t ram_address; - char *name; -} ROMRAM; - -static const struct romram flash_areas[] = -{ - { 0xe0600000, 0x00e00000, "EmuTOS" }, /* EmuTOS */ - { 0xe0400000, 0x00e00000, "FireTOS" }, /* FireTOS */ - { 0xe0700000, 0x00e00000, "FPGA" }, /* FPGA config */ -}; -static const int num_flash_areas = sizeof(flash_areas) / sizeof(struct romram); - -#define FLASH_ADDRESS 0xe0000000 - -/* - * erase a flash sector - * - * sector_num is the index into the sector table above. - * - * FIXME: need to disable data cache to ensure proper operation - */ -void amd_flash_sector_erase(int n) -{ - volatile AMD_FLASH_CELL status; - - pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA); - pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55); - pFlash[0x555] = AMD_FLASH_CMD_DATA(0x80); - pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA); - pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55); - pFlash[SADDR(n)] = AMD_FLASH_CMD_DATA(0x30); - - do - status = pFlash[SADDR(n)]; - while ((status & AMD_FLASH_CMD_DATA(0x80)) != AMD_FLASH_CMD_DATA(0x80)); - - /* - * Place device in read mode - */ - pFlash[0] = AMD_FLASH_CMD_DATA(0xAA); - pFlash[0] = AMD_FLASH_CMD_DATA(0x55); - pFlash[0] = AMD_FLASH_CMD_DATA(0xF0); -} - -int amd_flash_erase(void *start, int bytes, void (*putchar)(int)) -{ - int i, ebytes = 0; - - if (bytes == 0) - return 0; - - for (i = 0; i < AMD_FLASH_SECTORS; i++) - { - if (start >= (void *)((void *) pFlash + SOFFSET(i)) && - start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1))) - { - break; - } - } - - while (ebytes < bytes) - { - if (putchar != NULL) - { - putchar('.'); - } - amd_flash_sector_erase(i); - ebytes += SSIZE(i); - i++; - } - - if (putchar != NULL) - { - putchar(10); /* LF */ - putchar(13); /* CR */ - } - - return ebytes; -} - -void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data) -{ - volatile AMD_FLASH_CELL status; - int retry; - - pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA); - pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55); - pFlash[0x555] = AMD_FLASH_CMD_DATA(0xA0); - *dst = data; - - /* - * Wait for program operation to finish - * (Data# Polling Algorithm) - */ - retry = 0; - while (1) - { - status = *dst; - if ((status & AMD_FLASH_CMD_DATA(0x80)) == - (data & AMD_FLASH_CMD_DATA(0x80))) - { - break; - } - if (status & AMD_FLASH_CMD_DATA(0x20)) - { - status = *dst; - if ((status & AMD_FLASH_CMD_DATA(0x80)) == - (data & AMD_FLASH_CMD_DATA(0x80))) - { - break; - } - if (++retry > 1024) - { - break; - } - } - } -} - - -int amd_flash_program(void *dest, void *source, int bytes, int erase, void (*func)(void), void (*putchar)(int)) -{ - AMD_FLASH_CELL *src, *dst; - int hashi=1,hashj=0; - char hash[5]; - - hash[0]=8; /* Backspace */ - hash[1]=124;/* "|" */ - hash[2]=47; /* "/" */ - hash[3]=45; /* "-" */ - hash[4]=92; /* "\" */ - - src = (AMD_FLASH_CELL *)source; - dst = (AMD_FLASH_CELL *)dest; - - /* - * Place device in read mode - */ - pFlash[0] = AMD_FLASH_CMD_DATA(0xAA); - pFlash[0] = AMD_FLASH_CMD_DATA(0x55); - pFlash[0] = AMD_FLASH_CMD_DATA(0xF0); - - /* - * Erase device if necessary - */ - if (erase) - { - amd_flash_erase(dest, bytes, putchar); - } - - /* - * Program device - */ - while (bytes > 0) - { - amd_flash_program_cell(dst,*src); - - /* Verify Write */ - if (*dst == *src) - { - bytes -= AMD_FLASH_CELL_BYTES; - *dst++, *src++; - - if ((putchar != NULL)) - { - /* Hash marks to indicate progress */ - if (hashj == 0x1000) - { - hashj = -1; - putchar(hash[0]); - putchar(hash[hashi]); - - hashi++; - if (hashi == 5) - { - hashi=1; - } - - } - hashj++; - } - } - else - break; - } - - /* - * Place device in read mode - */ - pFlash[0] = AMD_FLASH_CMD_DATA(0xAA); - pFlash[0] = AMD_FLASH_CMD_DATA(0x55); - pFlash[0] = AMD_FLASH_CMD_DATA(0xF0); - - if (putchar != NULL) - { - putchar(hash[0]); - } - - /* - * If a function was passed in, call it now - */ - if ((func != NULL)) - { - func(); - } - - return ((int)src - (int)source); -} - -/* - * this callback just does nothing besides returning OK. Meant to do a dry run over the file to check its integrity - */ -static err_t simulate() -{ - err_t ret = OK; - - return ret; -} - -static err_t flash(uint8_t *dst, uint8_t *src, uint32_t length) -{ - err_t ret = OK; - - /* TODO: do the actual flash */ - amd_flash_program(dst, src, length, 1, NULL, xputchar); - return ret; -} - -/* - * this callback verifies the data against the S-record file contents after a write to destination - */ -static err_t verify(uint8_t *dst, uint8_t *src, size_t length) -{ - uint8_t *end = src + length; - - do - { - if (*src++ != *dst++) - return FAIL; - } while (src < end); - - return OK; -} - -void srec_flash(char *flash_filename) -{ - DRESULT res; - FRESULT fres; - FATFS fs; - FIL file; - err_t err; - void *start_address; - uint32_t length; - - res = disk_status(0); - if (res == RES_OK) - { - fres = f_mount(0, &fs); - if (fres == FR_OK) - { - if ((fres = f_open(&file, flash_filename, FA_READ) != FR_OK)) - { - xprintf("flasher file %s not present on disk\r\n", - flash_filename); - } - else - { - f_close(&file); - - /* first pass: parse and check for inconsistencies */ - xprintf("check file integrity: "); - err = read_srecords(flash_filename, &start_address, &length, - simulate); - if (err == OK) - { - xprintf("OK.\r\nerase flash area (from %p, length 0x%lx): ", - start_address, length); - err = amd_flash_erase(start_address, length, xputchar); - - /* next pass: copy data to destination */ - xprintf("OK.\r\flash data: "); - err = read_srecords(flash_filename, &start_address, &length, flash); - if (err == OK) - { - /* next pass: verify data */ - xprintf("OK.\r\nverify data: "); - err = read_srecords(flash_filename, &start_address, - &length, verify); - if (err == OK) - { - typedef void void_func(void); - void_func *func; - - xprintf("OK.\r\n"); - - xprintf( - "target successfully written and verified. Start address: %p\r\n", - start_address); - - func = (void_func *) start_address; - (*func)(); - } - else - { - xprintf("failed\r\n"); - } - } - else - { - xprintf("failed\r\n"); - } - } - else - { - xprintf("failed\r\n"); - } - } - } - else - { - // xprintf("could not mount FAT FS\r\n"); - } - f_mount(0, 0L); - } - else - { - // xprintf("could not initialize SD card\r\n"); - } -} - -err_t srec_load(char *flash_filename) -{ - FRESULT fres; - FIL file; - err_t err; - void *start_address; - uint32_t length; - - if ((fres = f_open(&file, flash_filename, FA_READ) != FR_OK)) - { - xprintf("flasher file %s not present on disk\r\n", flash_filename); - } - else - { - f_close(&file); - - /* first pass: parse and check for inconsistencies */ - xprintf("check file integrity: "); - err = read_srecords(flash_filename, &start_address, &length, simulate); - if (err == OK) - { - /* next pass: copy data to destination */ - xprintf("OK.\r\ncopy/flash data: "); - err = read_srecords(flash_filename, &start_address, &length, flash); - if (err == OK) - { - /* next pass: verify data */ - xprintf("OK.\r\nverify data: "); - err = read_srecords(flash_filename, &start_address, &length, verify); - if (err == OK) - { - typedef void void_func(void); - void_func *func; - - xprintf("OK.\r\n"); - xprintf( - "target successfully written and verified. Start address: %p\r\n", - start_address); - - func = (void_func *) start_address; - (*func)(); - } - else - { - xprintf("failed\r\n"); - } - } - else - { - xprintf("failed\r\n"); - } - } - else - { - xprintf("failed\r\n"); - } - } - return OK; -} - -void basflash(void) -{ - // const char *basflash_str = "\\BASFLASH"; - const char *bastest_str = "\\BASTEST"; - DRESULT res; - FRESULT fres; - FATFS fs; - - xprintf("\r\nHello from BASFLASH.S19!\r\n\r\n"); - - /* - * read \BASTEST\ folder contents (search for .S19-files). If found load them to their final destination - * (after BaS has copied them, not their flash location) and return. - * - * Files located in the BASTEST-folder thus override those in flash. Useful for testing before flashing - */ - res = disk_status(0); - xprintf("disk_status(0) = %d\r\n", res); - if (res == RES_OK) - { - fres = f_mount(0, &fs); - xprintf("f_mount() = %d\r\n", fres); - if (fres == FR_OK) - { - DIR directory; - - fres = f_opendir(&directory, bastest_str); - xprintf("f_opendir() = %d\r\n", fres); - if (fres == FR_OK) - { - FILINFO fileinfo; - - fres = f_readdir(&directory, &fileinfo); - xprintf("f_readdir() = %d\r\n", fres); - while (fres == FR_OK) - { - const char *srec_ext = ".S19"; - char path[30]; - - if (fileinfo.fname[0] != '\0') /* found a file */ - { - xprintf("check file %s (%s == %s ?)\r\n", - fileinfo.fname, - &fileinfo.fname[strlen(fileinfo.fname) - 4], - srec_ext); - if (strlen(fileinfo.fname) >= 4 - && strncmp( - &fileinfo.fname[strlen(fileinfo.fname) - - 4], srec_ext, 4) == 0) /* we have a .S19 file */ - { - /* - * build path + filename - */ - strcpy(path, bastest_str); - strcat(path, "\\"); - strncat(path, fileinfo.fname, 13); - - xprintf("loading file %s\r\n", path); - /* - * load file - */ - if (srec_load(path) != OK) - { - xprintf("failed to load file %s\r\n", path); - // error handling - } - } - } - else - break; /* exit if no file found */ - fres = f_readdir(&directory, &fileinfo); - xprintf("f_readdir() = %d\r\n", fres); - } - } - else - { - xprintf("f_opendir %s failed with error code %d\r\n", - bastest_str, fres); - } - } - else - { - // xprintf("could not mount FAT FS\r\n"); - } - f_mount(0, 0L); /* unmount SD card */ - } -} diff --git a/exe/basflash_start.c b/exe/basflash_start.c deleted file mode 100644 index 621370b..0000000 --- a/exe/basflash_start.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * basflash_start.c - * - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#include - -static uint32_t ownstack[4096]; -static uint32_t *stackptr = &ownstack[4095]; - -/* - * setup our own stack in SDRAM to prevent clashing BaS's in SRAM (size limited). - */ -void startup(void) -{ - static uint32_t oldstack; - - void basflash(void); - __asm__ __volatile__("move.l sp,%0\n\t" : "=g"(oldstack) : :); - __asm__ __volatile__("move.l %0,sp\n\t" : : "g"(stackptr) : ); - basflash(); - __asm__ __volatile__("move.l %0,sp\n\t" : : "g"(oldstack) : "sp"); - (void) stackptr; /* make compiler happy about unused variables */ -} diff --git a/flash/flash.c b/flash/flash.c deleted file mode 100644 index 7efe859..0000000 --- a/flash/flash.c +++ /dev/null @@ -1,381 +0,0 @@ -#include -#include "bas_types.h" - -#if MACHINE_FIREBEE -#include "firebee.h" -#elif MACHINE_M5484LITE -#include "m5484l.h" -#endif /* MACHINE_FIREBEE */ - -#define AMD_FLASH_BUS_SHIFT 1 -#define AMD_FLASH_CELL volatile uint16_t -#define AMD_FLASH_CELL_BYTES 2 -#define AMD_FLASH_CELL_MASK 0x1 -#define AMD_FLASH_CMD_DATA(x) ((uint16_t) x) - -struct amd_flash_sector_info -{ - uint32_t size; /* sector size in bytes */ - uint32_t offset; /* offset from base of device */ -}; - -/* - * AM29LV640D flash layout (bottom boot as used in the Firebee ) - */ -static struct amd_flash_sector_info sector[] = -{ - { 8 * 1024, 0x00000000 }, /* SA0 */ - { 8 * 1024, 0x00008000 }, /* SA1 */ - { 8 * 1024, 0x00010000 }, /* SA2 */ - { 8 * 1024, 0x00018000 }, /* SA3 */ - { 8 * 1024, 0x00020000 }, /* SA4 */ - { 8 * 1024, 0x00028000 }, /* SA5 */ - { 8 * 1024, 0x00030000 }, /* SA6 */ - { 8 * 1024, 0x00038000 }, /* SA7 */ - { 8 * 1024, 0x00040000 }, /* SA8 */ - { 64 * 1024, 0x00048000 }, /* SA9 */ - { 64 * 1024, 0x00050000 }, /* SA10 */ - { 64 * 1024, 0x00058000 }, /* SA11 */ - { 64 * 1024, 0x00060000 }, /* SA12 */ - { 64 * 1024, 0x00068000 }, /* SA13 */ - { 64 * 1024, 0x00070000 }, /* SA14 */ - { 64 * 1024, 0x00078000 }, /* SA15 */ - { 64 * 1024, 0x00080000 }, /* SA16 */ - { 64 * 1024, 0x00088000 }, /* SA17 */ - { 64 * 1024, 0x00090000 }, /* SA18 */ - { 64 * 1024, 0x00098000 }, /* SA19 */ - { 64 * 1024, 0x000a0000 }, /* SA20 */ - { 64 * 1024, 0x000a8000 }, /* SA21 */ - { 64 * 1024, 0x000b0000 }, /* SA22 */ - { 64 * 1024, 0x000b8000 }, /* SA23 */ - { 64 * 1024, 0x000c0000 }, /* SA24 */ - { 64 * 1024, 0x000c8000 }, /* SA25 */ - { 64 * 1024, 0x000d0000 }, /* SA26 */ - { 64 * 1024, 0x000d8000 }, /* SA27 */ - { 64 * 1024, 0x000e0000 }, /* SA28 */ - { 64 * 1024, 0x000e8000 }, /* SA29 */ - { 64 * 1024, 0x000f0000 }, /* SA30 */ - { 64 * 1024, 0x000f8000 }, /* SA31 */ - { 64 * 1024, 0x00100000 }, /* SA32 */ - { 64 * 1024, 0x00108000 }, /* SA32 */ - { 64 * 1024, 0x00110000 }, /* SA34 */ - { 64 * 1024, 0x00118000 }, /* SA35 */ - { 64 * 1024, 0x00120000 }, /* SA36 */ - { 64 * 1024, 0x00128000 }, /* SA37 */ - { 64 * 1024, 0x00130000 }, /* SA38 */ - { 64 * 1024, 0x00138000 }, /* SA39 */ - { 64 * 1024, 0x00140000 }, /* SA40 */ - { 64 * 1024, 0x00148000 }, /* SA41 */ - { 64 * 1024, 0x00150000 }, /* SA42 */ - { 64 * 1024, 0x00158000 }, /* SA43 */ - { 64 * 1024, 0x00160000 }, /* SA44 */ - { 64 * 1024, 0x00168000 }, /* SA45 */ - { 64 * 1024, 0x00170000 }, /* SA46 */ - { 64 * 1024, 0x00178000 }, /* SA47 */ - { 64 * 1024, 0x00180000 }, /* SA48 */ - { 64 * 1024, 0x00188000 }, /* SA49 */ - { 64 * 1024, 0x00190000 }, /* SA50 */ - { 64 * 1024, 0x00198000 }, /* SA51 */ - { 64 * 1024, 0x001a0000 }, /* SA52 */ - { 64 * 1024, 0x001a8000 }, /* SA53 */ - { 64 * 1024, 0x001b0000 }, /* SA54 */ - { 64 * 1024, 0x001b8000 }, /* SA55 */ - { 64 * 1024, 0x001c0000 }, /* SA56 */ - { 64 * 1024, 0x001c8000 }, /* SA57 */ - { 64 * 1024, 0x001d0000 }, /* SA58 */ - { 64 * 1024, 0x001d8000 }, /* SA59 */ - { 64 * 1024, 0x001e0000 }, /* SA60 */ - { 64 * 1024, 0x001e8000 }, /* SA61 */ - { 64 * 1024, 0x001f0000 }, /* SA62 */ - { 64 * 1024, 0x001f8000 }, /* SA63 */ - { 64 * 1024, 0x00200000 }, /* SA64 */ - { 64 * 1024, 0x00208000 }, /* SA65 */ - { 64 * 1024, 0x00210000 }, /* SA66 */ - { 64 * 1024, 0x00218000 }, /* SA67 */ - { 64 * 1024, 0x00220000 }, /* SA68 */ - { 64 * 1024, 0x00228000 }, /* SA69 */ - { 64 * 1024, 0x00230000 }, /* SA70 */ - { 64 * 1024, 0x00238000 }, /* SA71 */ - { 64 * 1024, 0x00240000 }, /* SA72 */ - { 64 * 1024, 0x00248000 }, /* SA73 */ - { 64 * 1024, 0x00250000 }, /* SA74 */ - { 64 * 1024, 0x00258000 }, /* SA75 */ - { 64 * 1024, 0x00260000 }, /* SA76 */ - { 64 * 1024, 0x00268000 }, /* SA77 */ - { 64 * 1024, 0x00270000 }, /* SA78 */ - { 64 * 1024, 0x00278000 }, /* SA79 */ - { 64 * 1024, 0x00280000 }, /* SA80 */ - { 64 * 1024, 0x00288000 }, /* SA81 */ - { 64 * 1024, 0x00290000 }, /* SA82 */ - { 64 * 1024, 0x00298000 }, /* SA83 */ - { 64 * 1024, 0x002a0000 }, /* SA84 */ - { 64 * 1024, 0x002a8000 }, /* SA85 */ - { 64 * 1024, 0x002b0000 }, /* SA86 */ - { 64 * 1024, 0x002b8000 }, /* SA87 */ - { 64 * 1024, 0x002c0000 }, /* SA88 */ - { 64 * 1024, 0x002c8000 }, /* SA89 */ - { 64 * 1024, 0x002d0000 }, /* SA90 */ - { 64 * 1024, 0x002d8000 }, /* SA91 */ - { 64 * 1024, 0x002e0000 }, /* SA92 */ - { 64 * 1024, 0x002e8000 }, /* SA93 */ - { 64 * 1024, 0x002f0000 }, /* SA94 */ - { 64 * 1024, 0x002f8000 }, /* SA95 */ - { 64 * 1024, 0x00300000 }, /* SA96 */ - { 64 * 1024, 0x00308000 }, /* SA97 */ - { 64 * 1024, 0x00310000 }, /* SA98 */ - { 64 * 1024, 0x00318000 }, /* SA99 */ - { 64 * 1024, 0x00320000 }, /* SA100 */ - { 64 * 1024, 0x00328000 }, /* SA101 */ - { 64 * 1024, 0x00330000 }, /* SA102 */ - { 64 * 1024, 0x00338000 }, /* SA103 */ - { 64 * 1024, 0x00340000 }, /* SA104 */ - { 64 * 1024, 0x00348000 }, /* SA105 */ - { 64 * 1024, 0x00350000 }, /* SA106 */ - { 64 * 1024, 0x00358000 }, /* SA107 */ - { 64 * 1024, 0x00360000 }, /* SA108 */ - { 64 * 1024, 0x00368000 }, /* SA109 */ - { 64 * 1024, 0x00370000 }, /* SA110 */ - { 64 * 1024, 0x00378000 }, /* SA111 */ - { 64 * 1024, 0x00380000 }, /* SA112 */ - { 64 * 1024, 0x00388000 }, /* SA113 */ - { 64 * 1024, 0x00390000 }, /* SA114 */ - { 64 * 1024, 0x00398000 }, /* SA115 */ - { 64 * 1024, 0x003a0000 }, /* SA116 */ - { 64 * 1024, 0x003a8000 }, /* SA117 */ - { 64 * 1024, 0x003b0000 }, /* SA118 */ - { 64 * 1024, 0x003b8000 }, /* SA119 */ - { 64 * 1024, 0x003c0000 }, /* SA120 */ - { 64 * 1024, 0x003c8000 }, /* SA121 */ - { 64 * 1024, 0x003d0000 }, /* SA122 */ - { 64 * 1024, 0x003d8000 }, /* SA123 */ - { 64 * 1024, 0x003e0000 }, /* SA124 */ - { 64 * 1024, 0x003e8000 }, /* SA125 */ - { 64 * 1024, 0x003f0000 }, /* SA126 */ - { 64 * 1024, 0x003f8000 }, /* SA127 */ -}; - -static const int AMD_FLASH_SECTORS = sizeof(sector) / sizeof(struct amd_flash_sector_info); - -#define SOFFSET(n) (sector[n].offset) -#define SADDR(n) (SOFFSET(n) >> AMD_FLASH_BUS_SHIFT) -#define SSIZE(n) (sector[n].size) - -#define AMD_FLASH_DEVICES 1 - -static AMD_FLASH_CELL *pFlash; - -typedef struct romram -{ - uint32_t flash_address; - uint32_t ram_address; - char *name; -} ROMRAM; - -static const struct romram flash_areas[] = -{ - { 0xe0000000, 0x00e00000, "BaS" }, /* BaS */ - { 0xe0600000, 0x00e00000, "EmuTOS" }, /* EmuTOS */ - { 0xe0400000, 0x00e00000, "FireTOS" }, /* FireTOS */ - { 0xe0700000, 0x00e00000, "FPGA" }, /* FPGA config */ -}; -static const int num_flash_areas = sizeof(flash_areas) / sizeof(struct romram); - -#define FLASH_ADDRESS BOOTFLASH_BASE_ADDRESS - -/* - * erase a flash sector - * - * sector_num is the index into the sector table above. - * - * FIXME: need to disable data cache to ensure proper operation - */ -void amd_flash_sector_erase(int n) -{ - volatile AMD_FLASH_CELL status; - - pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA); - pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55); - pFlash[0x555] = AMD_FLASH_CMD_DATA(0x80); - pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA); - pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55); - pFlash[SADDR(n)] = AMD_FLASH_CMD_DATA(0x30); - - do - status = pFlash[SADDR(n)]; - while ((status & AMD_FLASH_CMD_DATA(0x80)) != AMD_FLASH_CMD_DATA(0x80)); - - /* - * Place device in read mode - */ - pFlash[0] = AMD_FLASH_CMD_DATA(0xAA); - pFlash[0] = AMD_FLASH_CMD_DATA(0x55); - pFlash[0] = AMD_FLASH_CMD_DATA(0xF0); -} - -int amd_flash_erase(void *start, int bytes, void (*putchar)(int)) -{ - int i, ebytes = 0; - - if (bytes == 0) - return 0; - - for (i = 0; i < AMD_FLASH_SECTORS; i++) - { - if (start >= (void *)((void *) pFlash + SOFFSET(i)) && - start <= (void *)((void *) pFlash + SOFFSET(i) + (SSIZE(i) - 1))) - { - break; - } - } - - while (ebytes < bytes) - { - if (putchar != NULL) - { - putchar('.'); - } - amd_flash_sector_erase(i); - ebytes += SSIZE(i); - i++; - } - - if (putchar != NULL) - { - putchar(10); /* LF */ - putchar(13); /* CR */ - } - - return ebytes; -} - -void amd_flash_program_cell(AMD_FLASH_CELL *dst, AMD_FLASH_CELL data) -{ - volatile AMD_FLASH_CELL status; - int retry; - - pFlash[0x555] = AMD_FLASH_CMD_DATA(0xAA); - pFlash[0x2AA] = AMD_FLASH_CMD_DATA(0x55); - pFlash[0x555] = AMD_FLASH_CMD_DATA(0xA0); - *dst = data; - - /* - * Wait for program operation to finish - * (Data# Polling Algorithm) - */ - retry = 0; - while (1) - { - status = *dst; - if ((status & AMD_FLASH_CMD_DATA(0x80)) == - (data & AMD_FLASH_CMD_DATA(0x80))) - { - break; - } - if (status & AMD_FLASH_CMD_DATA(0x20)) - { - status = *dst; - if ((status & AMD_FLASH_CMD_DATA(0x80)) == - (data & AMD_FLASH_CMD_DATA(0x80))) - { - break; - } - if (++retry > 1024) - { - break; - } - } - } -} - - -int amd_flash_program(void *dest, void *source, int bytes, int erase, void (*func)(void), void (*putchar)(int)) -{ - AMD_FLASH_CELL *src; - AMD_FLASH_CELL *dst; - int hashi = 1; - int hashj = 0; - char hash[5]; - - hash[0] = 8; /* Backspace */ - hash[1] = 124;/* "|" */ - hash[2] = 47; /* "/" */ - hash[3] = 45; /* "-" */ - hash[4] = 92; /* "\" */ - - src = (AMD_FLASH_CELL *)source; - dst = (AMD_FLASH_CELL *)dest; - - /* - * Place device in read mode - */ - pFlash[0] = AMD_FLASH_CMD_DATA(0xAA); - pFlash[0] = AMD_FLASH_CMD_DATA(0x55); - pFlash[0] = AMD_FLASH_CMD_DATA(0xF0); - - /* - * Erase device if necessary - */ - if (erase) - { - amd_flash_erase(dest, bytes, putchar); - } - - /* - * Program device - */ - while (bytes > 0) - { - amd_flash_program_cell(dst, *src); - - /* Verify Write */ - if (*dst == *src) - { - bytes -= AMD_FLASH_CELL_BYTES; - *dst++, *src++; - - if ((putchar != NULL)) - { - /* Hash marks to indicate progress */ - if (hashj == 0x1000) - { - hashj = -1; - putchar(hash[0]); - putchar(hash[hashi]); - - hashi++; - if (hashi == 5) - { - hashi = 1; - } - - } - hashj++; - } - } - else - break; - } - - /* - * Place device in read mode - */ - pFlash[0] = AMD_FLASH_CMD_DATA(0xAA); - pFlash[0] = AMD_FLASH_CMD_DATA(0x55); - pFlash[0] = AMD_FLASH_CMD_DATA(0xF0); - - if (putchar != NULL) - { - putchar(hash[0]); - } - - /* - * If a function was passed in, call it now - */ - if ((func != NULL)) - { - func(); - } - - return ((int)src - (int)source); -} - diff --git a/flash/s19reader.c b/flash/s19reader.c deleted file mode 100644 index bfea3d2..0000000 --- a/flash/s19reader.c +++ /dev/null @@ -1,429 +0,0 @@ -/* - * s19reader.c - * - * Created on: 17.12.2012 - * Author: mfro - * The ACP Firebee project - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2012 M. Froeschle - */ - -#include - -#include "bas_printf.h" -#include "bas_string.h" -#include "sd_card.h" -#include "diskio.h" -#include "ff.h" -#include "s19reader.h" -#include "cache.h" - -/* - * Yes, I know. The following doesn't really look like code should look like... - * - * I did try to map structures over the S-records with (packed) which didn't work reliably due to gcc _not_ packing them appropiate - * and finally ended up with this. Not nice, put paid (and working). - * - */ -#define SREC_TYPE(a) (a)[0] /* type of record */ -#define SREC_COUNT(a) (a)[1] /* length of valid bytes to follow */ -#define SREC_ADDR16(a) (256 * (a)[2] + (a)[3]) /* 2 byte address field */ -#define SREC_ADDR24(a) (0x10000 * (a)[2] + 0x100 * \ - (a)[3] + (a)[4]) /* 3 byte address field */ -#define SREC_ADDR32(a) (0x1000000 * a[2] + 0x10000 * \ - a[3] + 0x100 * (a)[4] + (a)[5]) /* 4 byte address field */ -#define SREC_DATA16(a) ((uint8_t *)&((a)[4])) /* address of first byte of data in a record */ -#define SREC_DATA24(a) ((uint8_t *)&((a)[5])) /* address of first data byte in 24 bit record */ -#define SREC_DATA32(a) ((uint8_t *)&((a)[6])) /* adress of first byte of a record with 32 bit address field */ -#define SREC_DATA16_SIZE(a) (SREC_COUNT((a)) - 3) /* length of the data[] array without the checksum field */ -#define SREC_DATA24_SIZE(a) (SREC_COUNT((a)) - 4) /* length of the data[] array without the checksum field */ -#define SREC_DATA32_SIZE(a) (SREC_COUNT((a)) - 5) /* length of the data[] array without the checksum field */ -#define SREC_CHECKSUM(a) (a)[SREC_COUNT(a) + 2 - 1] /* record's checksum (two's complement of the sum of all bytes) */ - -/* - * convert a single hex character into byte - */ -static uint8_t nibble_to_byte(uint8_t nibble) -{ - if ((nibble >= '0') && (nibble <= '9')) - return nibble - '0'; - else if ((nibble >= 'A' && nibble <= 'F')) - return 10 + nibble - 'A'; - else if ((nibble >= 'a' && nibble <= 'f')) - return 10 + nibble - 'a'; - return 0; -} - -/* - * convert two hex characters into byte - */ -static uint8_t hex_to_byte(uint8_t hex[2]) -{ - return 16 * (nibble_to_byte(hex[0])) + (nibble_to_byte(hex[1])); -} - -#ifdef _NOT_USED_ -/* - * convert four hex characters into a 16 bit word - */ -static uint16_t hex_to_word(uint8_t hex[4]) -{ - return 256 * hex_to_byte(&hex[0]) + hex_to_byte(&hex[2]); -} - -/* - * convert eight hex characters into a 32 bit word - */ -static uint32_t hex_to_long(uint8_t hex[8]) -{ - return 65536 * hex_to_word(&hex[0]) + hex_to_word(&hex[4]); -} -#endif /* _NOT_USED_ */ - -/* - * compute the record checksum - * - * it consists of the one's complement of the byte sum of the data from the count field until the end - */ -static uint8_t checksum(uint8_t arr[]) -{ - int i; - uint8_t checksum = SREC_COUNT(arr); - - for (i = 0; i < SREC_COUNT(arr) - 1; i++) - { - checksum += arr[i + 2]; - } - return ~checksum; -} - -#ifdef _NOT_USED_ -void print_record(uint8_t *arr) -{ - switch (SREC_TYPE(arr)) - { - case 0: - { - xprintf("type 0x%x ", SREC_TYPE(arr)); - xprintf("count 0x%x ", SREC_COUNT(arr)); - xprintf("addr 0x%x ", SREC_ADDR16(arr)); - xprintf("module %11.11s ", SREC_DATA16(arr)); - xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr)); - } - break; - - case 3: - case 7: - { - xprintf("type 0x%x ", SREC_TYPE(arr)); - xprintf("count 0x%x ", SREC_COUNT(arr)); - xprintf("addr 0x%x ", SREC_ADDR32(arr)); - xprintf("data %02x,%02x,%02x,%02x,... ", - SREC_DATA32(arr)[0], SREC_DATA32(arr)[1], SREC_DATA32(arr)[3], SREC_DATA32(arr)[4]); - xprintf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr)); - } - break; - - default: - xprintf("unsupported report type %d in print_record\r\n", arr[0]); - break; - } -} -#endif /* _NOT_USED_ */ - -/* - * convert an S-record line into its corresponding byte vector (ASCII->binary) - */ -static void line_to_vector(uint8_t *buff, uint8_t *vector) -{ - int i; - int length; - uint8_t *vp = vector; - - length = hex_to_byte(buff + 2); - - buff++; - *vp++ = nibble_to_byte(*buff); /* record type. Only one single nibble */ - buff++; - - for (i = 0; i <= length; i++) - { - *vp++ = hex_to_byte(buff); - buff += 2; - } -} - -/* - * read and parse a Motorola S-record file and copy contents to dst. The theory of operation is to read and parse the S-record file - * and to use the supplied callback routine to copy the buffer to the destination once the S-record line is converted. - * The memcpy callback can be anything (as long as it conforms parameter-wise) - a basically empty function to just let - * read_srecords validate the file, a standard memcpy() to copy file contents to destination RAM or a more sophisticated - * routine that does write/erase flash - * - * FIXME: Currently only records that the gcc toolchain emits are supported. - * - * Parameters: - * IN - * filename - the filename that contains the S-records - * callback - the memcpy() routine discussed above - * OUT - * start_address - the execution address of the code as read from the file. Can be used to jump into and execute it - * actual_length - the overall length of the binary code read from the file - * returns - * OK or an err_t error code if anything failed - */ -err_t read_srecords(char *filename, void **start_address, uint32_t *actual_length, memcpy_callback_t callback) -{ - FRESULT fres; - FIL file; - err_t ret = OK; - - if ((fres = f_open(&file, filename, FA_READ) == FR_OK)) - { - uint8_t line[80]; - int lineno = 0; - int data_records = 0; - bool found_block_header = false; - bool found_block_end = false; - bool found_block_data = false; - - while (ret == OK && (uint8_t *) f_gets((char *) line, sizeof(line), &file) != NULL) - { - lineno++; - uint8_t vector[80]; - - line_to_vector(line, vector); /* vector now contains the decoded contents of line, from line[1] on */ - - if (line[0] == 'S') - { - if (SREC_CHECKSUM(vector) != checksum(vector)) - { - xprintf("invalid checksum 0x%x (should be 0x%x) in line %d\r\n", - SREC_CHECKSUM(vector), checksum(vector), lineno); - ret = FAIL; - } - - switch (vector[0]) - { - case 0: /* block header */ - found_block_header = true; - if (found_block_data || found_block_end) - { - xprintf("S7 or S3 record found before S0: S-records corrupt?\r\n"); - ret = FAIL; - } - - break; - - case 2: /* three byte address field data record */ - if (!found_block_header || found_block_end) - { - xprintf("S3 record found before S0 or after S7: S-records corrupt?\r\n"); - ret = FAIL; - } - ret = callback((uint8_t *) SREC_ADDR24(vector), SREC_DATA24(vector), SREC_DATA24_SIZE(vector)); - data_records++; - break; - - case 3: /* four byte address field data record */ - if (!found_block_header || found_block_end) - { - xprintf("S3 record found before S0 or after S7: S-records corrupt?\r\n"); - ret = FAIL; - } - ret = callback((uint8_t *) SREC_ADDR32(vector), SREC_DATA32(vector), SREC_DATA32_SIZE(vector)); - data_records++; - break; - - case 7: /* four byte address field end record */ - if (!found_block_header || found_block_end) - { - xprintf("S7 record found before S0 or after S7: S-records corrupt?\r\n"); - } - else - { - // xprintf("S7 record (end) found after %d valid data blocks\r\n", data_records); - *start_address = (void *) SREC_ADDR32(vector); - } - break; - - case 8: /* three byte address field end record */ - if (!found_block_header || found_block_end) - { - xprintf("S8 record found before S0 or after S8: S-records corrupt?\r\n"); - } - else - { - // xprintf("S7 record (end) found after %d valid data blocks\r\n", data_records); - *start_address = (void *) SREC_ADDR24(vector); - } - break; - - default: - xprintf("unsupported record type (%d) found in line %d\r\n", vector[0], lineno); - xprintf("offending line: \r\n"); - xprintf("%s\r\n", line); - ret = FAIL; - break; - } - } - else - { - xprintf("illegal character ('%c') found on line %d: S-records corrupt?\r\n", line[0], lineno); - ret = FAIL; - break; - } - } - f_close(&file); - } - else - { - xprintf("could not open file %s\r\n", filename); - ret = FILE_OPEN; - } - return ret; -} - -/* - * this callback just does nothing besides returning OK. Meant to do a dry run over the file to check its integrity - */ -static err_t simulate() -{ - err_t ret = OK; - - return ret; -} - - -#ifdef _NOT_USED_ -static err_t flash(uint8_t *dst, uint8_t *src, uint32_t length) -{ - err_t ret = OK; - - /* TODO: do the actual flash */ - amd_flash_program(dst, src, length, false, NULL, xputchar); - - return ret; -} -#endif /* _NOT_USED_ */ - - -/* - * this callback verifies the data against the S-record file contents after a write to destination - */ -static err_t verify(uint8_t *dst, uint8_t *src, uint32_t length) -{ - uint8_t *end = src + length; - - do - { - if (*src++ != *dst++) - return FAIL; - } while (src < end); - - return OK; -} - -/* - * needed to avoid missing type cast warning below - */ -static inline err_t srec_memcpy(uint8_t *dst, uint8_t *src, size_t n) -{ - err_t e = OK; - - memcpy((void *) dst, (void *) src, n); - return e; -} - -void srec_execute(char *flasher_filename) -{ - DRESULT res; - FRESULT fres; - FATFS fs; - FIL file; - err_t err; - void *start_address; - uint32_t length; - - disk_initialize(0); - res = disk_status(0); - if (res == RES_OK) - { - fres = f_mount(0, &fs); - if (fres == FR_OK) - { - if ((fres = f_open(&file, flasher_filename, FA_READ) != FR_OK)) - { - xprintf("flasher file %s not present on disk\r\n", flasher_filename); - } - else - { - f_close(&file); - - /* first pass: parse and check for inconsistencies */ - xprintf("check file integrity: "); - err = read_srecords(flasher_filename, &start_address, &length, simulate); - if (err == OK) - { - /* next pass: copy data to destination */ - xprintf("OK.\r\ncopy/flash data: "); - err = read_srecords(flasher_filename, &start_address, &length, srec_memcpy); - if (err == OK) - { - /* next pass: verify data */ - xprintf("OK.\r\nverify data: "); - err = read_srecords(flasher_filename, &start_address, &length, verify); - if (err == OK) - { - xprintf("OK.\r\n"); - typedef void void_func(void); - void_func *func; - xprintf("target successfully written and verified. Start address: %p\r\n", start_address); - - func = start_address; - flush_and_invalidate_caches(); - (*func)(); - } - else - { - xprintf("failed\r\n"); - } - } - else - { - xprintf("failed\r\n"); - } - } - else - { - xprintf("failed\r\n"); - } - } - } - else - { - // xprintf("could not mount FAT FS\r\n"); - } - f_mount(0, NULL); - } - else - { - // xprintf("could not initialize SD card\r\n"); - } -} - diff --git a/flash_scripts/flash_firebee_bas.bdm b/flash_scripts/flash_firebee_bas.bdm deleted file mode 100755 index 0cd530e..0000000 --- a/flash_scripts/flash_firebee_bas.bdm +++ /dev/null @@ -1,53 +0,0 @@ -#!/usr/local/bin/bdmctrl -D2 -# -# firebee board initialization for bdmctrl -# -open $1 -reset -sleep 1 - -wait - -# use system sdram as flashlib scratch area. -# TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet. -# This seems to be related to large flash buffers and PC-relative adressing of the plugin -#flash-plugin 0x1000 0xf000 flash29-5475.plugin -# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29 -flash 0xe0000000 - -# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for BaS) -# -# Caution: sector offset numbers need to be the ones from the x16 address range -# column and they vary in size - needs to be exactly as in the data sheet (p. 9) -# - -erase 0xe0000000 0 -erase 0xe0000000 0x1000 -erase 0xe0000000 0x2000 -erase 0xe0000000 0x3000 -erase 0xe0000000 0x4000 -erase 0xe0000000 0x5000 -erase 0xe0000000 0x6000 -erase 0xe0000000 0x7000 -erase 0xe0000000 0x8000 -erase 0xe0000000 0x10000 -erase 0xe0000000 0x18000 -erase 0xe0000000 0x20000 -erase 0xe0000000 0x28000 -erase 0xe0000000 0x30000 -erase 0xe0000000 0x38000 -erase 0xe0000000 0x40000 -erase 0xe0000000 0x48000 -erase 0xe0000000 0x50000 -erase 0xe0000000 0x58000 -erase 0xe0000000 0x60000 -erase 0xe0000000 0x70000 -erase 0xe0000000 0x78000 - -erase-wait 0xe0000000 -# should now have erased from 0xe0000000 to 0xe00fffff - -dump-mem 0xe0010000 0x20 b - -load -v ../firebee/bas.elf -wait diff --git a/flash_scripts/flash_firebee_etos.bdm b/flash_scripts/flash_firebee_etos.bdm deleted file mode 100755 index df3d892..0000000 --- a/flash_scripts/flash_firebee_etos.bdm +++ /dev/null @@ -1,81 +0,0 @@ -#!/usr/local/bin/bdmctrl -D2 -# -# flash EmuTOS using bdmctrl -# -open $1 -reset - -# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) -write 0xFF000500 0xE0000000 4 -write 0xFF000508 0x00001180 4 -write 0xFF000504 0x007F0001 4 - -# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes -write 0xFF000004 0x000002AA 4 # SDRAMDS configuration -write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF) -write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF) -write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF) -write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF) -write 0xFF000108 0x73622830 4 # SDCFG1 -write 0xFF00010C 0x46770000 4 # SDCFG2 - -write 0xFF000104 0xE10D0002 4 # SDCR + IPALL -write 0xFF000100 0x40010000 4 # SDMR (write to LEMR) -write 0xFF000100 0x048D0000 4 # SDMR (write to LMR) -sleep 100 -write 0xFF000104 0xE10D0002 4 # SDCR + IPALL -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000100 0x008D0000 4 # SDMR (write to LMR) -write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh) -sleep 10 - - -# use system sdram as flashlib scratch area -# flashing EmuTOS with plugin does not work yet (at least not for 64bit hosts) -#flash-plugin 0x1000 0xf000 flash29.plugin - -# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29 -flash 0xe0000000 - -# Erase flash from 0xE0600000 to 0xE06FFFFF (reserved space for EmuTOS) -# -# Caution: sector offset numbers need to be the ones from the x16 address range -# column and they vary in size - needs to be exactly as in the data sheet (p. 9) -# -# contrary to documentation, it seems we need to erase-wait after each sector - -erase 0xe0000000 0x300000 -erase-wait 0xe0000000 -erase 0xe0000000 0x308000 -erase-wait 0xe0000000 -erase 0xe0000000 0x310000 -erase-wait 0xe0000000 -erase 0xe0000000 0x318000 -erase-wait 0xe0000000 -erase 0xe0000000 0x320000 -erase-wait 0xe0000000 -erase 0xe0000000 0x328000 -erase-wait 0xe0000000 -erase 0xe0000000 0x330000 -erase-wait 0xe0000000 -erase 0xe0000000 0x338000 -erase-wait 0xe0000000 -erase 0xe0000000 0x340000 -erase-wait 0xe0000000 -erase 0xe0000000 0x348000 -erase-wait 0xe0000000 -erase 0xe0000000 0x350000 -erase-wait 0xe0000000 -erase 0xe0000000 0x358000 -erase-wait 0xe0000000 -erase 0xe0000000 0x360000 -erase-wait 0xe0000000 -erase 0xe0000000 0x368000 -erase-wait 0xe0000000 -erase 0xe0000000 0x370000 -erase-wait 0xe0000000 -erase 0xe0000000 0x378000 -erase-wait 0xe0000000 - -load -v emutos-firebee.elf diff --git a/flash_scripts/flash_firebee_firetos.bdm b/flash_scripts/flash_firebee_firetos.bdm deleted file mode 100755 index 41a137c..0000000 --- a/flash_scripts/flash_firebee_firetos.bdm +++ /dev/null @@ -1,59 +0,0 @@ -#!/usr/local/bin/bdmctrl -D2 -# -# firebee board initialization for bdmctrl -# -open $1 -reset - -# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) -write 0xFF000500 0xE0000000 4 -write 0xFF000508 0x00001180 4 -write 0xFF000504 0x007F0001 4 - -# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29 -flash 0xe0000000 - -# flash-plugin (target-based flashing) does not work yet -# flash-plugin 0x10000000 0x4000 flash29.plugin - -# Erase flash from 0xE0400000 to 0xE04FFFFF (reserved space for FireTOS) -# -# Caution: sector offset numbers need to be the ones from the x16 address range -# column and they vary in size - needs to be exactly as in the data sheet (p. 9) -# -# contrary to documentation, it seems we need to erase-wait after each sector - -erase 0xe0000000 0x200000 -erase-wait 0xe0000000 -erase 0xe0000000 0x208000 -erase-wait 0xe0000000 -erase 0xe0000000 0x210000 -erase-wait 0xe0000000 -erase 0xe0000000 0x218000 -erase-wait 0xe0000000 -erase 0xe0000000 0x220000 -erase-wait 0xe0000000 -erase 0xe0000000 0x228000 -erase-wait 0xe0000000 -erase 0xe0000000 0x230000 -erase-wait 0xe0000000 -erase 0xe0000000 0x238000 -erase-wait 0xe0000000 -erase 0xe0000000 0x240000 -erase-wait 0xe0000000 -erase 0xe0000000 0x248000 -erase-wait 0xe0000000 -erase 0xe0000000 0x250000 -erase-wait 0xe0000000 -erase 0xe0000000 0x258000 -erase-wait 0xe0000000 -erase 0xe0000000 0x260000 -erase-wait 0xe0000000 -erase 0xe0000000 0x268000 -erase-wait 0xe0000000 -erase 0xe0000000 0x270000 -erase-wait 0xe0000000 -erase 0xe0000000 0x278000 -erase-wait 0xe0000000 - -load -v firetos.elf diff --git a/flash_scripts/flash_firebee_fpga.bdm b/flash_scripts/flash_firebee_fpga.bdm deleted file mode 100755 index ea40e17..0000000 --- a/flash_scripts/flash_firebee_fpga.bdm +++ /dev/null @@ -1,77 +0,0 @@ -#!/usr/local/bin/bdmctrl -D2 -# -# firebee board initialization for bdmctrl -# -open $1 -#reset - -# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) -write 0xFF000500 0xE0000000 4 -write 0xFF000508 0x00001180 4 -write 0xFF000504 0x007F0001 4 - -# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29 -flash 0xe0000000 - -# flash-plugin (target-based flashing) does not work yet -#flash-plugin 0x10000000 0x4000 flash29.plugin - -# Erase flash from 0xE0700000 to 0xE07FFFFF (reserved space for FPGA) -# -# Caution: sector offset numbers need to be the ones from the x16 address range -# column and they vary in size - needs to be exactly as in the data sheet (p. 9) -# -# contrary to documentation, it seems we need to erase-wait after each sector - -erase 0xe0000000 0x380000 -erase-wait 0xe0000000 -erase 0xe0000000 0x388000 -erase-wait 0xe0000000 -erase 0xe0000000 0x390000 -erase-wait 0xe0000000 -erase 0xe0000000 0x398000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3A0000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3A0000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3A8000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3B0000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3B8000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3C0000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3C8000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3D0000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3D8000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3E0000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3E8000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3F0000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3F8000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3F9000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3FA000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3FB000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3FC000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3FD000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3FE000 -erase-wait 0xe0000000 -erase 0xe0000000 0x3FF000 -erase-wait 0xe0000000 - -wait - -load -v FPGA.elf diff --git a/flash_scripts/flash_m548x_bas.bdm b/flash_scripts/flash_m548x_bas.bdm deleted file mode 100755 index 98f0516..0000000 --- a/flash_scripts/flash_m548x_bas.bdm +++ /dev/null @@ -1,92 +0,0 @@ -#!/usr/local/bin/bdmctrl -# -# m548x board initialization for bdmctrl -# -open $1 -reset -wait - -# set VBR -write-ctrl 0x0801 0x00000000 -dump-register VBR - -# Turn on MBAR at 0xFF00_0000 -write-ctrl 0x0C0F 0xFF000000 -dump-register MBAR - -# Turn on RAMBAR0 at address FF10_0000 -write-ctrl 0x0C04 0xFF100007 - -# Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently) -write-ctrl 0x0C05 0xFF101001 - -# -# Init CS0 (BootFLASH @ E000_0000 - E03F_FFFF 4Mbytes) -write 0xFF000500 0xE0000000 4 -#write 0xFF000508 0x00041180 4 -write 0xFF000508 0x00100D80 4 -write 0xFF000504 0x003F0001 4 - -# SDRAM Initialization @ 0000_0000 - 03FF_FFFF 64 Mbytes -write 0xFF000004 0x000002AA 4 # SDRAMDS configuration -write 0xFF000020 0x00000019 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF) -write 0xFF000024 0x08000000 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF) -write 0xFF000028 0x10000000 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF) -write 0xFF00002C 0x18000000 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF) -write 0xFF000108 0x73711630 4 # SDCFG1 -write 0xFF00010C 0x46370000 4 # SDCFG2 - -write 0xFF000104 0xE10B0002 4 # SDCR + IPALL -write 0xFF000100 0x40010000 4 # SDMR (write to LEMR) -write 0xFF000100 0x058D0000 4 # SDMR (write to LMR) -sleep 100 -write 0xFF000104 0xE10D0002 4 # SDCR + IPALL -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000100 0x018D0000 4 # SDMR (write to LMR) -write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh) -sleep 10 - - -# use system sdram as flashlib scratch area. -# TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet. -# This seems to be related to large flash buffers and PC-relative adressing of the plugin -#flash-plugin 0x1000 0xf000 flash29.plugin -# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29 -flash 0xE0000000 -flash-plugin 0x1000 0xf000 flashintelc3.plugin - -# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for bas) -# -# Caution: sector offset numbers need to be the ones from the x16 address range -# column and they vary in size - needs to be exactly as in the data sheet (p. 9) -# -# contrary to documentation, it seems we need to erase-wait after each sector - -erase 0xE0000000 0 -erase 0xE0000000 1 -erase 0xE0000000 2 -erase 0xE0000000 3 -erase 0xE0000000 4 -erase 0xE0000000 5 -erase 0xE0000000 6 -erase 0xE0000000 7 -erase 0xE0000000 8 -erase 0xE0000000 9 -erase 0xE0000000 10 -erase 0xE0000000 11 -erase 0xE0000000 12 -erase 0xE0000000 13 -#erase 0xE0000000 0x2000 -#erase 0xE0000000 0x3000 -#erase 0xE0000000 0x4000 -#erase 0xE0000000 0x5000 -#erase 0xE0000000 0x00006000 -#erase 0xE0000000 0x00007000 -#erase 0xE0000000 0x00008000 -#erase 0xE0000000 0x00009000 -#erase 0xE0000000 0x0000a000 -#erase 0xE0000000 0x0000b000 -#erase-wait 0xe0000000 -load -v ../m5484lite/bas.elf -wait diff --git a/flash_scripts/flash_m548x_dbug.bdm b/flash_scripts/flash_m548x_dbug.bdm deleted file mode 100755 index 5970061..0000000 --- a/flash_scripts/flash_m548x_dbug.bdm +++ /dev/null @@ -1,78 +0,0 @@ -#!/usr/local/bin/bdmctrl -# -# m548x board initialization for bdmctrl -# -open $1 -reset -wait - -# set VBR -write-ctrl 0x0801 0x00000000 -dump-register VBR - -# Turn on MBAR at 0xFF00_0000 -write-ctrl 0x0C0F 0xFF000000 -dump-register MBAR - -# Turn on RAMBAR0 at address FF10_0000 -write-ctrl 0x0C04 0xFF100007 - -# Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently) -write-ctrl 0x0C05 0xFF101001 - -# -# Init CS0 (BootFLASH @ E000_0000 - E03F_FFFF 4Mbytes) -write 0xFF000500 0xE0000000 4 -write 0xFF000508 0x00041180 4 -write 0xFF000504 0x003F0001 4 - -# SDRAM Initialization @ 0000_0000 - 03FF_FFFF 64 Mbytes -write 0xFF000004 0x000002AA 4 # SDRAMDS configuration -write 0xFF000020 0x00000019 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF) -write 0xFF000024 0x08000000 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF) -write 0xFF000028 0x10000000 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF) -write 0xFF00002C 0x18000000 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF) -write 0xFF000108 0x73711630 4 # SDCFG1 -write 0xFF00010C 0x46370000 4 # SDCFG2 - -write 0xFF000104 0xE10B0002 4 # SDCR + IPALL -write 0xFF000100 0x40010000 4 # SDMR (write to LEMR) -write 0xFF000100 0x058D0000 4 # SDMR (write to LMR) -sleep 100 -write 0xFF000104 0xE10D0002 4 # SDCR + IPALL -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000100 0x018D0000 4 # SDMR (write to LMR) -write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh) -sleep 10 - - -# use system sdram as flashlib scratch area. -# TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet. -# This seems to be related to large flash buffers and PC-relative adressing of the plugin -#flash-plugin 0x1000 0xf000 flash29.plugin -# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29 -flash 0xE0000000 -flash-plugin 0x1000 0xf000 flashintelc3.plugin - -# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for bas) -# -# Caution: sector offset numbers need to be the ones from the x16 address range -# column and they vary in size - needs to be exactly as in the data sheet (p. 9) -# -# contrary to documentation, it seems we need to erase-wait after each sector - -#erase 0xE0000000 0x0 -#erase 0xE0002000 0x0 -#erase 0xE0000000 0x00004000 -#erase 0xE0000000 0x00005000 -#erase 0xE0000000 0x00006000 -#erase 0xE0000000 0x00007000 -#erase 0xE0000000 0x00008000 -#erase 0xE0000000 0x00009000 -#erase 0xE0000000 0x0000a000 -#erase 0xE0000000 0x0000b000 -#erase-wait 0xe0000000 -#blank-chk 0xE0000000 0x0 -load -v m5484lite_dbug_flash.elf -wait diff --git a/flash_scripts/flash_m548x_etos.bdm b/flash_scripts/flash_m548x_etos.bdm deleted file mode 100755 index 6f1cbb3..0000000 --- a/flash_scripts/flash_m548x_etos.bdm +++ /dev/null @@ -1,66 +0,0 @@ -#!/usr/local/bin/bdmctrl -D2 -# -# flash EmuTOS using bdmctrl -# -open $1 -reset - -# Turn on RAMBAR0 at address FF10_0000 -write-ctrl 0x0C04 0xFF100007 - -# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) -write 0xFF000500 0xE0000000 4 -write 0xFF000508 0x00001180 4 -write 0xFF000504 0x007F0001 4 - -# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes -write 0xFF000004 0x000002AA 4 # SDRAMDS configuration -write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF) -write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF) -write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF) -write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF) -write 0xFF000108 0x73622830 4 # SDCFG1 -write 0xFF00010C 0x46770000 4 # SDCFG2 - -write 0xFF000104 0xE10D0002 4 # SDCR + IPALL -write 0xFF000100 0x40010000 4 # SDMR (write to LEMR) -write 0xFF000100 0x048D0000 4 # SDMR (write to LMR) -sleep 100 -write 0xFF000104 0xE10D0002 4 # SDCR + IPALL -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh) -write 0xFF000100 0x008D0000 4 # SDMR (write to LMR) -write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh) -sleep 10 - - -# use sram as flashlib scratch area -# flashing EmuTOS with plugin does not work yet (at least not for 64bit hosts) -#flash-plugin 0xFF101000 0xffff flashintelc3.plugin - -# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29 -flash 0xe0000000 - -# Erase flash from 0xE0100000 to 0xE01FFFFF (reserved space for EmuTOS on the m5484lite) - -erase 0xe0000000 21 -erase 0xe0000000 22 -erase 0xe0000000 23 -erase 0xe0000000 24 -erase 0xe0000000 25 -erase 0xe0000000 26 -erase 0xe0000000 27 -erase 0xe0000000 28 -erase 0xe0000000 29 -erase 0xe0000000 30 -erase 0xe0000000 31 -erase 0xe0000000 32 -erase 0xe0000000 33 -erase 0xe0000000 34 -erase 0xe0000000 35 -erase 0xe0000000 36 -erase 0xe0000000 37 -erase 0xe0000000 38 -erase 0xe0000000 39 - -load ../../emutos/emutos-m548x-bas_gcc.elf diff --git a/fs/cc932.c b/fs/cc932.c deleted file mode 100644 index 09107e3..0000000 --- a/fs/cc932.c +++ /dev/null @@ -1,3798 +0,0 @@ -/*------------------------------------------------------------------------*/ -/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ -/* */ -/* CP932 (Japanese Shift-JIS) */ -/*------------------------------------------------------------------------*/ - -#include "ff.h" - -#define _TINY_TABLE 0 - -#if !_USE_LFN || _CODE_PAGE != 932 -#error This file is not needed in current configuration. Remove from the project. -#endif - - -static -const WCHAR uni2sjis[] = { -/* Unicode - Sjis, Unicode - Sjis, Unicode - Sjis, Unicode - Sjis, */ - 0x00A7, 0x8198, 0x00A8, 0x814E, 0x00B0, 0x818B, 0x00B1, 0x817D, - 0x00B4, 0x814C, 0x00B6, 0x81F7, 0x00D7, 0x817E, 0x00F7, 0x8180, - 0x0391, 0x839F, 0x0392, 0x83A0, 0x0393, 0x83A1, 0x0394, 0x83A2, - 0x0395, 0x83A3, 0x0396, 0x83A4, 0x0397, 0x83A5, 0x0398, 0x83A6, - 0x0399, 0x83A7, 0x039A, 0x83A8, 0x039B, 0x83A9, 0x039C, 0x83AA, - 0x039D, 0x83AB, 0x039E, 0x83AC, 0x039F, 0x83AD, 0x03A0, 0x83AE, - 0x03A1, 0x83AF, 0x03A3, 0x83B0, 0x03A4, 0x83B1, 0x03A5, 0x83B2, - 0x03A6, 0x83B3, 0x03A7, 0x83B4, 0x03A8, 0x83B5, 0x03A9, 0x83B6, - 0x03B1, 0x83BF, 0x03B2, 0x83C0, 0x03B3, 0x83C1, 0x03B4, 0x83C2, - 0x03B5, 0x83C3, 0x03B6, 0x83C4, 0x03B7, 0x83C5, 0x03B8, 0x83C6, - 0x03B9, 0x83C7, 0x03BA, 0x83C8, 0x03BB, 0x83C9, 0x03BC, 0x83CA, - 0x03BD, 0x83CB, 0x03BE, 0x83CC, 0x03BF, 0x83CD, 0x03C0, 0x83CE, - 0x03C1, 0x83CF, 0x03C3, 0x83D0, 0x03C4, 0x83D1, 0x03C5, 0x83D2, - 0x03C6, 0x83D3, 0x03C7, 0x83D4, 0x03C8, 0x83D5, 0x03C9, 0x83D6, - 0x0401, 0x8446, 0x0410, 0x8440, 0x0411, 0x8441, 0x0412, 0x8442, - 0x0413, 0x8443, 0x0414, 0x8444, 0x0415, 0x8445, 0x0416, 0x8447, - 0x0417, 0x8448, 0x0418, 0x8449, 0x0419, 0x844A, 0x041A, 0x844B, - 0x041B, 0x844C, 0x041C, 0x844D, 0x041D, 0x844E, 0x041E, 0x844F, - 0x041F, 0x8450, 0x0420, 0x8451, 0x0421, 0x8452, 0x0422, 0x8453, - 0x0423, 0x8454, 0x0424, 0x8455, 0x0425, 0x8456, 0x0426, 0x8457, - 0x0427, 0x8458, 0x0428, 0x8459, 0x0429, 0x845A, 0x042A, 0x845B, - 0x042B, 0x845C, 0x042C, 0x845D, 0x042D, 0x845E, 0x042E, 0x845F, - 0x042F, 0x8460, 0x0430, 0x8470, 0x0431, 0x8471, 0x0432, 0x8472, - 0x0433, 0x8473, 0x0434, 0x8474, 0x0435, 0x8475, 0x0436, 0x8477, - 0x0437, 0x8478, 0x0438, 0x8479, 0x0439, 0x847A, 0x043A, 0x847B, - 0x043B, 0x847C, 0x043C, 0x847D, 0x043D, 0x847E, 0x043E, 0x8480, - 0x043F, 0x8481, 0x0440, 0x8482, 0x0441, 0x8483, 0x0442, 0x8484, - 0x0443, 0x8485, 0x0444, 0x8486, 0x0445, 0x8487, 0x0446, 0x8488, - 0x0447, 0x8489, 0x0448, 0x848A, 0x0449, 0x848B, 0x044A, 0x848C, - 0x044B, 0x848D, 0x044C, 0x848E, 0x044D, 0x848F, 0x044E, 0x8490, - 0x044F, 0x8491, 0x0451, 0x8476, 0x2010, 0x815D, 0x2015, 0x815C, - 0x2018, 0x8165, 0x2019, 0x8166, 0x201C, 0x8167, 0x201D, 0x8168, - 0x2020, 0x81F5, 0x2021, 0x81F6, 0x2025, 0x8164, 0x2026, 0x8163, - 0x2030, 0x81F1, 0x2032, 0x818C, 0x2033, 0x818D, 0x203B, 0x81A6, - 0x2103, 0x818E, 0x2116, 0x8782, 0x2121, 0x8784, 0x212B, 0x81F0, - 0x2160, 0x8754, 0x2161, 0x8755, 0x2162, 0x8756, 0x2163, 0x8757, - 0x2164, 0x8758, 0x2165, 0x8759, 0x2166, 0x875A, 0x2167, 0x875B, - 0x2168, 0x875C, 0x2169, 0x875D, 0x2170, 0xFA40, 0x2171, 0xFA41, - 0x2172, 0xFA42, 0x2173, 0xFA43, 0x2174, 0xFA44, 0x2175, 0xFA45, - 0x2176, 0xFA46, 0x2177, 0xFA47, 0x2178, 0xFA48, 0x2179, 0xFA49, - 0x2190, 0x81A9, 0x2191, 0x81AA, 0x2192, 0x81A8, 0x2193, 0x81AB, - 0x21D2, 0x81CB, 0x21D4, 0x81CC, 0x2200, 0x81CD, 0x2202, 0x81DD, - 0x2203, 0x81CE, 0x2207, 0x81DE, 0x2208, 0x81B8, 0x220B, 0x81B9, - 0x2211, 0x8794, 0x221A, 0x81E3, 0x221D, 0x81E5, 0x221E, 0x8187, - 0x221F, 0x8798, 0x2220, 0x81DA, 0x2225, 0x8161, 0x2227, 0x81C8, - 0x2228, 0x81C9, 0x2229, 0x81BF, 0x222A, 0x81BE, 0x222B, 0x81E7, - 0x222C, 0x81E8, 0x222E, 0x8793, 0x2234, 0x8188, 0x2235, 0x81E6, - 0x223D, 0x81E4, 0x2252, 0x81E0, 0x2260, 0x8182, 0x2261, 0x81DF, - 0x2266, 0x8185, 0x2267, 0x8186, 0x226A, 0x81E1, 0x226B, 0x81E2, - 0x2282, 0x81BC, 0x2283, 0x81BD, 0x2286, 0x81BA, 0x2287, 0x81BB, - 0x22A5, 0x81DB, 0x22BF, 0x8799, 0x2312, 0x81DC, 0x2460, 0x8740, - 0x2461, 0x8741, 0x2462, 0x8742, 0x2463, 0x8743, 0x2464, 0x8744, - 0x2465, 0x8745, 0x2466, 0x8746, 0x2467, 0x8747, 0x2468, 0x8748, - 0x2469, 0x8749, 0x246A, 0x874A, 0x246B, 0x874B, 0x246C, 0x874C, - 0x246D, 0x874D, 0x246E, 0x874E, 0x246F, 0x874F, 0x2470, 0x8750, - 0x2471, 0x8751, 0x2472, 0x8752, 0x2473, 0x8753, 0x2500, 0x849F, - 0x2501, 0x84AA, 0x2502, 0x84A0, 0x2503, 0x84AB, 0x250C, 0x84A1, - 0x250F, 0x84AC, 0x2510, 0x84A2, 0x2513, 0x84AD, 0x2514, 0x84A4, - 0x2517, 0x84AF, 0x2518, 0x84A3, 0x251B, 0x84AE, 0x251C, 0x84A5, - 0x251D, 0x84BA, 0x2520, 0x84B5, 0x2523, 0x84B0, 0x2524, 0x84A7, - 0x2525, 0x84BC, 0x2528, 0x84B7, 0x252B, 0x84B2, 0x252C, 0x84A6, - 0x252F, 0x84B6, 0x2530, 0x84BB, 0x2533, 0x84B1, 0x2534, 0x84A8, - 0x2537, 0x84B8, 0x2538, 0x84BD, 0x253B, 0x84B3, 0x253C, 0x84A9, - 0x253F, 0x84B9, 0x2542, 0x84BE, 0x254B, 0x84B4, 0x25A0, 0x81A1, - 0x25A1, 0x81A0, 0x25B2, 0x81A3, 0x25B3, 0x81A2, 0x25BC, 0x81A5, - 0x25BD, 0x81A4, 0x25C6, 0x819F, 0x25C7, 0x819E, 0x25CB, 0x819B, - 0x25CE, 0x819D, 0x25CF, 0x819C, 0x25EF, 0x81FC, 0x2605, 0x819A, - 0x2606, 0x8199, 0x2640, 0x818A, 0x2642, 0x8189, 0x266A, 0x81F4, - 0x266D, 0x81F3, 0x266F, 0x81F2, 0x3000, 0x8140, 0x3001, 0x8141, - 0x3002, 0x8142, 0x3003, 0x8156, 0x3005, 0x8158, 0x3006, 0x8159, - 0x3007, 0x815A, 0x3008, 0x8171, 0x3009, 0x8172, 0x300A, 0x8173, - 0x300B, 0x8174, 0x300C, 0x8175, 0x300D, 0x8176, 0x300E, 0x8177, - 0x300F, 0x8178, 0x3010, 0x8179, 0x3011, 0x817A, 0x3012, 0x81A7, - 0x3013, 0x81AC, 0x3014, 0x816B, 0x3015, 0x816C, 0x301D, 0x8780, - 0x301F, 0x8781, 0x3041, 0x829F, 0x3042, 0x82A0, 0x3043, 0x82A1, - 0x3044, 0x82A2, 0x3045, 0x82A3, 0x3046, 0x82A4, 0x3047, 0x82A5, - 0x3048, 0x82A6, 0x3049, 0x82A7, 0x304A, 0x82A8, 0x304B, 0x82A9, - 0x304C, 0x82AA, 0x304D, 0x82AB, 0x304E, 0x82AC, 0x304F, 0x82AD, - 0x3050, 0x82AE, 0x3051, 0x82AF, 0x3052, 0x82B0, 0x3053, 0x82B1, - 0x3054, 0x82B2, 0x3055, 0x82B3, 0x3056, 0x82B4, 0x3057, 0x82B5, - 0x3058, 0x82B6, 0x3059, 0x82B7, 0x305A, 0x82B8, 0x305B, 0x82B9, - 0x305C, 0x82BA, 0x305D, 0x82BB, 0x305E, 0x82BC, 0x305F, 0x82BD, - 0x3060, 0x82BE, 0x3061, 0x82BF, 0x3062, 0x82C0, 0x3063, 0x82C1, - 0x3064, 0x82C2, 0x3065, 0x82C3, 0x3066, 0x82C4, 0x3067, 0x82C5, - 0x3068, 0x82C6, 0x3069, 0x82C7, 0x306A, 0x82C8, 0x306B, 0x82C9, - 0x306C, 0x82CA, 0x306D, 0x82CB, 0x306E, 0x82CC, 0x306F, 0x82CD, - 0x3070, 0x82CE, 0x3071, 0x82CF, 0x3072, 0x82D0, 0x3073, 0x82D1, - 0x3074, 0x82D2, 0x3075, 0x82D3, 0x3076, 0x82D4, 0x3077, 0x82D5, - 0x3078, 0x82D6, 0x3079, 0x82D7, 0x307A, 0x82D8, 0x307B, 0x82D9, - 0x307C, 0x82DA, 0x307D, 0x82DB, 0x307E, 0x82DC, 0x307F, 0x82DD, - 0x3080, 0x82DE, 0x3081, 0x82DF, 0x3082, 0x82E0, 0x3083, 0x82E1, - 0x3084, 0x82E2, 0x3085, 0x82E3, 0x3086, 0x82E4, 0x3087, 0x82E5, - 0x3088, 0x82E6, 0x3089, 0x82E7, 0x308A, 0x82E8, 0x308B, 0x82E9, - 0x308C, 0x82EA, 0x308D, 0x82EB, 0x308E, 0x82EC, 0x308F, 0x82ED, - 0x3090, 0x82EE, 0x3091, 0x82EF, 0x3092, 0x82F0, 0x3093, 0x82F1, - 0x309B, 0x814A, 0x309C, 0x814B, 0x309D, 0x8154, - 0x309E, 0x8155, 0x30A1, 0x8340, 0x30A2, 0x8341, 0x30A3, 0x8342, - 0x30A4, 0x8343, 0x30A5, 0x8344, 0x30A6, 0x8345, 0x30A7, 0x8346, - 0x30A8, 0x8347, 0x30A9, 0x8348, 0x30AA, 0x8349, 0x30AB, 0x834A, - 0x30AC, 0x834B, 0x30AD, 0x834C, 0x30AE, 0x834D, 0x30AF, 0x834E, - 0x30B0, 0x834F, 0x30B1, 0x8350, 0x30B2, 0x8351, 0x30B3, 0x8352, - 0x30B4, 0x8353, 0x30B5, 0x8354, 0x30B6, 0x8355, 0x30B7, 0x8356, - 0x30B8, 0x8357, 0x30B9, 0x8358, 0x30BA, 0x8359, 0x30BB, 0x835A, - 0x30BC, 0x835B, 0x30BD, 0x835C, 0x30BE, 0x835D, 0x30BF, 0x835E, - 0x30C0, 0x835F, 0x30C1, 0x8360, 0x30C2, 0x8361, 0x30C3, 0x8362, - 0x30C4, 0x8363, 0x30C5, 0x8364, 0x30C6, 0x8365, 0x30C7, 0x8366, - 0x30C8, 0x8367, 0x30C9, 0x8368, 0x30CA, 0x8369, 0x30CB, 0x836A, - 0x30CC, 0x836B, 0x30CD, 0x836C, 0x30CE, 0x836D, 0x30CF, 0x836E, - 0x30D0, 0x836F, 0x30D1, 0x8370, 0x30D2, 0x8371, 0x30D3, 0x8372, - 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0xFF3A, 0x8279, 0xFF3B, 0x816D, 0xFF3C, 0x815F, 0xFF3D, 0x816E, - 0xFF3E, 0x814F, 0xFF3F, 0x8151, 0xFF40, 0x814D, 0xFF41, 0x8281, - 0xFF42, 0x8282, 0xFF43, 0x8283, 0xFF44, 0x8284, 0xFF45, 0x8285, - 0xFF46, 0x8286, 0xFF47, 0x8287, 0xFF48, 0x8288, 0xFF49, 0x8289, - 0xFF4A, 0x828A, 0xFF4B, 0x828B, 0xFF4C, 0x828C, 0xFF4D, 0x828D, - 0xFF4E, 0x828E, 0xFF4F, 0x828F, 0xFF50, 0x8290, 0xFF51, 0x8291, - 0xFF52, 0x8292, 0xFF53, 0x8293, 0xFF54, 0x8294, 0xFF55, 0x8295, - 0xFF56, 0x8296, 0xFF57, 0x8297, 0xFF58, 0x8298, 0xFF59, 0x8299, - 0xFF5A, 0x829A, 0xFF5B, 0x816F, 0xFF5C, 0x8162, 0xFF5D, 0x8170, - 0xFF5E, 0x8160, 0xFF61, 0x00A1, 0xFF62, 0x00A2, 0xFF63, 0x00A3, - 0xFF64, 0x00A4, 0xFF65, 0x00A5, 0xFF66, 0x00A6, 0xFF67, 0x00A7, - 0xFF68, 0x00A8, 0xFF69, 0x00A9, 0xFF6A, 0x00AA, 0xFF6B, 0x00AB, - 0xFF6C, 0x00AC, 0xFF6D, 0x00AD, 0xFF6E, 0x00AE, 0xFF6F, 0x00AF, - 0xFF70, 0x00B0, 0xFF71, 0x00B1, 0xFF72, 0x00B2, 0xFF73, 0x00B3, - 0xFF74, 0x00B4, 0xFF75, 0x00B5, 0xFF76, 0x00B6, 0xFF77, 0x00B7, - 0xFF78, 0x00B8, 0xFF79, 0x00B9, 0xFF7A, 0x00BA, 0xFF7B, 0x00BB, - 0xFF7C, 0x00BC, 0xFF7D, 0x00BD, 0xFF7E, 0x00BE, 0xFF7F, 0x00BF, - 0xFF80, 0x00C0, 0xFF81, 0x00C1, 0xFF82, 0x00C2, 0xFF83, 0x00C3, - 0xFF84, 0x00C4, 0xFF85, 0x00C5, 0xFF86, 0x00C6, 0xFF87, 0x00C7, - 0xFF88, 0x00C8, 0xFF89, 0x00C9, 0xFF8A, 0x00CA, 0xFF8B, 0x00CB, - 0xFF8C, 0x00CC, 0xFF8D, 0x00CD, 0xFF8E, 0x00CE, 0xFF8F, 0x00CF, - 0xFF90, 0x00D0, 0xFF91, 0x00D1, 0xFF92, 0x00D2, 0xFF93, 0x00D3, - 0xFF94, 0x00D4, 0xFF95, 0x00D5, 0xFF96, 0x00D6, 0xFF97, 0x00D7, - 0xFF98, 0x00D8, 0xFF99, 0x00D9, 0xFF9A, 0x00DA, 0xFF9B, 0x00DB, - 0xFF9C, 0x00DC, 0xFF9D, 0x00DD, 0xFF9E, 0x00DE, 0xFF9F, 0x00DF, - 0xFFE0, 0x8191, 0xFFE1, 0x8192, 0xFFE2, 0x81CA, 0xFFE3, 0x8150, - 0xFFE4, 0xFA55, 0xFFE5, 0x818F, 0, 0 -}; - -#if !_TINY_TABLE -static -const WCHAR sjis2uni[] = { -/* SJIS - Unicode, SJIS - Unicode, SJIS - Unicode, SJIS - Unicode, */ - 0x00A1, 0xFF61, 0x00A2, 0xFF62, 0x00A3, 0xFF63, 0x00A4, 0xFF64, - 0x00A5, 0xFF65, 0x00A6, 0xFF66, 0x00A7, 0xFF67, 0x00A8, 0xFF68, - 0x00A9, 0xFF69, 0x00AA, 0xFF6A, 0x00AB, 0xFF6B, 0x00AC, 0xFF6C, - 0x00AD, 0xFF6D, 0x00AE, 0xFF6E, 0x00AF, 0xFF6F, 0x00B0, 0xFF70, - 0x00B1, 0xFF71, 0x00B2, 0xFF72, 0x00B3, 0xFF73, 0x00B4, 0xFF74, - 0x00B5, 0xFF75, 0x00B6, 0xFF76, 0x00B7, 0xFF77, 0x00B8, 0xFF78, - 0x00B9, 0xFF79, 0x00BA, 0xFF7A, 0x00BB, 0xFF7B, 0x00BC, 0xFF7C, - 0x00BD, 0xFF7D, 0x00BE, 0xFF7E, 0x00BF, 0xFF7F, 0x00C0, 0xFF80, - 0x00C1, 0xFF81, 0x00C2, 0xFF82, 0x00C3, 0xFF83, 0x00C4, 0xFF84, - 0x00C5, 0xFF85, 0x00C6, 0xFF86, 0x00C7, 0xFF87, 0x00C8, 0xFF88, - 0x00C9, 0xFF89, 0x00CA, 0xFF8A, 0x00CB, 0xFF8B, 0x00CC, 0xFF8C, - 0x00CD, 0xFF8D, 0x00CE, 0xFF8E, 0x00CF, 0xFF8F, 0x00D0, 0xFF90, - 0x00D1, 0xFF91, 0x00D2, 0xFF92, 0x00D3, 0xFF93, 0x00D4, 0xFF94, - 0x00D5, 0xFF95, 0x00D6, 0xFF96, 0x00D7, 0xFF97, 0x00D8, 0xFF98, - 0x00D9, 0xFF99, 0x00DA, 0xFF9A, 0x00DB, 0xFF9B, 0x00DC, 0xFF9C, - 0x00DD, 0xFF9D, 0x00DE, 0xFF9E, 0x00DF, 0xFF9F, 0x8140, 0x3000, - 0x8141, 0x3001, 0x8142, 0x3002, 0x8143, 0xFF0C, 0x8144, 0xFF0E, - 0x8145, 0x30FB, 0x8146, 0xFF1A, 0x8147, 0xFF1B, 0x8148, 0xFF1F, - 0x8149, 0xFF01, 0x814A, 0x309B, 0x814B, 0x309C, 0x814C, 0x00B4, - 0x814D, 0xFF40, 0x814E, 0x00A8, 0x814F, 0xFF3E, 0x8150, 0xFFE3, - 0x8151, 0xFF3F, 0x8152, 0x30FD, 0x8153, 0x30FE, 0x8154, 0x309D, - 0x8155, 0x309E, 0x8156, 0x3003, 0x8157, 0x4EDD, 0x8158, 0x3005, - 0x8159, 0x3006, 0x815A, 0x3007, 0x815B, 0x30FC, 0x815C, 0x2015, - 0x815D, 0x2010, 0x815E, 0xFF0F, 0x815F, 0xFF3C, 0x8160, 0xFF5E, - 0x8161, 0x2225, 0x8162, 0xFF5C, 0x8163, 0x2026, 0x8164, 0x2025, - 0x8165, 0x2018, 0x8166, 0x2019, 0x8167, 0x201C, 0x8168, 0x201D, - 0x8169, 0xFF08, 0x816A, 0xFF09, 0x816B, 0x3014, 0x816C, 0x3015, - 0x816D, 0xFF3B, 0x816E, 0xFF3D, 0x816F, 0xFF5B, 0x8170, 0xFF5D, - 0x8171, 0x3008, 0x8172, 0x3009, 0x8173, 0x300A, 0x8174, 0x300B, - 0x8175, 0x300C, 0x8176, 0x300D, 0x8177, 0x300E, 0x8178, 0x300F, - 0x8179, 0x3010, 0x817A, 0x3011, 0x817B, 0xFF0B, 0x817C, 0xFF0D, - 0x817D, 0x00B1, 0x817E, 0x00D7, 0x8180, 0x00F7, 0x8181, 0xFF1D, - 0x8182, 0x2260, 0x8183, 0xFF1C, 0x8184, 0xFF1E, 0x8185, 0x2266, - 0x8186, 0x2267, 0x8187, 0x221E, 0x8188, 0x2234, 0x8189, 0x2642, - 0x818A, 0x2640, 0x818B, 0x00B0, 0x818C, 0x2032, 0x818D, 0x2033, - 0x818E, 0x2103, 0x818F, 0xFFE5, 0x8190, 0xFF04, 0x8191, 0xFFE0, - 0x8192, 0xFFE1, 0x8193, 0xFF05, 0x8194, 0xFF03, 0x8195, 0xFF06, - 0x8196, 0xFF0A, 0x8197, 0xFF20, 0x8198, 0x00A7, 0x8199, 0x2606, - 0x819A, 0x2605, 0x819B, 0x25CB, 0x819C, 0x25CF, 0x819D, 0x25CE, - 0x819E, 0x25C7, 0x819F, 0x25C6, 0x81A0, 0x25A1, 0x81A1, 0x25A0, - 0x81A2, 0x25B3, 0x81A3, 0x25B2, 0x81A4, 0x25BD, 0x81A5, 0x25BC, - 0x81A6, 0x203B, 0x81A7, 0x3012, 0x81A8, 0x2192, 0x81A9, 0x2190, - 0x81AA, 0x2191, 0x81AB, 0x2193, 0x81AC, 0x3013, 0x81B8, 0x2208, - 0x81B9, 0x220B, 0x81BA, 0x2286, 0x81BB, 0x2287, 0x81BC, 0x2282, - 0x81BD, 0x2283, 0x81BE, 0x222A, 0x81BF, 0x2229, 0x81C8, 0x2227, - 0x81C9, 0x2228, 0x81CA, 0xFFE2, 0x81CB, 0x21D2, 0x81CC, 0x21D4, - 0x81CD, 0x2200, 0x81CE, 0x2203, 0x81DA, 0x2220, 0x81DB, 0x22A5, - 0x81DC, 0x2312, 0x81DD, 0x2202, 0x81DE, 0x2207, 0x81DF, 0x2261, - 0x81E0, 0x2252, 0x81E1, 0x226A, 0x81E2, 0x226B, 0x81E3, 0x221A, - 0x81E4, 0x223D, 0x81E5, 0x221D, 0x81E6, 0x2235, 0x81E7, 0x222B, - 0x81E8, 0x222C, 0x81F0, 0x212B, 0x81F1, 0x2030, 0x81F2, 0x266F, - 0x81F3, 0x266D, 0x81F4, 0x266A, 0x81F5, 0x2020, 0x81F6, 0x2021, - 0x81F7, 0x00B6, 0x81FC, 0x25EF, 0x824F, 0xFF10, 0x8250, 0xFF11, - 0x8251, 0xFF12, 0x8252, 0xFF13, 0x8253, 0xFF14, 0x8254, 0xFF15, - 0x8255, 0xFF16, 0x8256, 0xFF17, 0x8257, 0xFF18, 0x8258, 0xFF19, - 0x8260, 0xFF21, 0x8261, 0xFF22, 0x8262, 0xFF23, 0x8263, 0xFF24, - 0x8264, 0xFF25, 0x8265, 0xFF26, 0x8266, 0xFF27, 0x8267, 0xFF28, - 0x8268, 0xFF29, 0x8269, 0xFF2A, 0x826A, 0xFF2B, 0x826B, 0xFF2C, - 0x826C, 0xFF2D, 0x826D, 0xFF2E, 0x826E, 0xFF2F, 0x826F, 0xFF30, - 0x8270, 0xFF31, 0x8271, 0xFF32, 0x8272, 0xFF33, 0x8273, 0xFF34, - 0x8274, 0xFF35, 0x8275, 0xFF36, 0x8276, 0xFF37, 0x8277, 0xFF38, - 0x8278, 0xFF39, 0x8279, 0xFF3A, 0x8281, 0xFF41, 0x8282, 0xFF42, - 0x8283, 0xFF43, 0x8284, 0xFF44, 0x8285, 0xFF45, 0x8286, 0xFF46, - 0x8287, 0xFF47, 0x8288, 0xFF48, 0x8289, 0xFF49, 0x828A, 0xFF4A, - 0x828B, 0xFF4B, 0x828C, 0xFF4C, 0x828D, 0xFF4D, 0x828E, 0xFF4E, - 0x828F, 0xFF4F, 0x8290, 0xFF50, 0x8291, 0xFF51, 0x8292, 0xFF52, - 0x8293, 0xFF53, 0x8294, 0xFF54, 0x8295, 0xFF55, 0x8296, 0xFF56, - 0x8297, 0xFF57, 0x8298, 0xFF58, 0x8299, 0xFF59, 0x829A, 0xFF5A, - 0x829F, 0x3041, 0x82A0, 0x3042, 0x82A1, 0x3043, 0x82A2, 0x3044, - 0x82A3, 0x3045, 0x82A4, 0x3046, 0x82A5, 0x3047, 0x82A6, 0x3048, - 0x82A7, 0x3049, 0x82A8, 0x304A, 0x82A9, 0x304B, 0x82AA, 0x304C, - 0x82AB, 0x304D, 0x82AC, 0x304E, 0x82AD, 0x304F, 0x82AE, 0x3050, - 0x82AF, 0x3051, 0x82B0, 0x3052, 0x82B1, 0x3053, 0x82B2, 0x3054, - 0x82B3, 0x3055, 0x82B4, 0x3056, 0x82B5, 0x3057, 0x82B6, 0x3058, - 0x82B7, 0x3059, 0x82B8, 0x305A, 0x82B9, 0x305B, 0x82BA, 0x305C, - 0x82BB, 0x305D, 0x82BC, 0x305E, 0x82BD, 0x305F, 0x82BE, 0x3060, - 0x82BF, 0x3061, 0x82C0, 0x3062, 0x82C1, 0x3063, 0x82C2, 0x3064, - 0x82C3, 0x3065, 0x82C4, 0x3066, 0x82C5, 0x3067, 0x82C6, 0x3068, - 0x82C7, 0x3069, 0x82C8, 0x306A, 0x82C9, 0x306B, 0x82CA, 0x306C, - 0x82CB, 0x306D, 0x82CC, 0x306E, 0x82CD, 0x306F, 0x82CE, 0x3070, - 0x82CF, 0x3071, 0x82D0, 0x3072, 0x82D1, 0x3073, 0x82D2, 0x3074, - 0x82D3, 0x3075, 0x82D4, 0x3076, 0x82D5, 0x3077, 0x82D6, 0x3078, - 0x82D7, 0x3079, 0x82D8, 0x307A, 0x82D9, 0x307B, 0x82DA, 0x307C, - 0x82DB, 0x307D, 0x82DC, 0x307E, 0x82DD, 0x307F, 0x82DE, 0x3080, - 0x82DF, 0x3081, 0x82E0, 0x3082, 0x82E1, 0x3083, 0x82E2, 0x3084, - 0x82E3, 0x3085, 0x82E4, 0x3086, 0x82E5, 0x3087, 0x82E6, 0x3088, - 0x82E7, 0x3089, 0x82E8, 0x308A, 0x82E9, 0x308B, 0x82EA, 0x308C, - 0x82EB, 0x308D, 0x82EC, 0x308E, 0x82ED, 0x308F, 0x82EE, 0x3090, - 0x82EF, 0x3091, 0x82F0, 0x3092, 0x82F1, 0x3093, 0x8340, 0x30A1, - 0x8341, 0x30A2, 0x8342, 0x30A3, 0x8343, 0x30A4, 0x8344, 0x30A5, - 0x8345, 0x30A6, 0x8346, 0x30A7, 0x8347, 0x30A8, 0x8348, 0x30A9, - 0x8349, 0x30AA, 0x834A, 0x30AB, 0x834B, 0x30AC, 0x834C, 0x30AD, - 0x834D, 0x30AE, 0x834E, 0x30AF, 0x834F, 0x30B0, 0x8350, 0x30B1, - 0x8351, 0x30B2, 0x8352, 0x30B3, 0x8353, 0x30B4, 0x8354, 0x30B5, - 0x8355, 0x30B6, 0x8356, 0x30B7, 0x8357, 0x30B8, 0x8358, 0x30B9, - 0x8359, 0x30BA, 0x835A, 0x30BB, 0x835B, 0x30BC, 0x835C, 0x30BD, - 0x835D, 0x30BE, 0x835E, 0x30BF, 0x835F, 0x30C0, 0x8360, 0x30C1, - 0x8361, 0x30C2, 0x8362, 0x30C3, 0x8363, 0x30C4, 0x8364, 0x30C5, - 0x8365, 0x30C6, 0x8366, 0x30C7, 0x8367, 0x30C8, 0x8368, 0x30C9, - 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0xFAF3, 0x6AE4, 0xFAF4, 0x6BD6, 0xFAF5, 0x6C3F, 0xFAF6, 0x6C5C, - 0xFAF7, 0x6C86, 0xFAF8, 0x6C6F, 0xFAF9, 0x6CDA, 0xFAFA, 0x6D04, - 0xFAFB, 0x6D87, 0xFAFC, 0x6D6F, 0xFB40, 0x6D96, 0xFB41, 0x6DAC, - 0xFB42, 0x6DCF, 0xFB43, 0x6DF8, 0xFB44, 0x6DF2, 0xFB45, 0x6DFC, - 0xFB46, 0x6E39, 0xFB47, 0x6E5C, 0xFB48, 0x6E27, 0xFB49, 0x6E3C, - 0xFB4A, 0x6EBF, 0xFB4B, 0x6F88, 0xFB4C, 0x6FB5, 0xFB4D, 0x6FF5, - 0xFB4E, 0x7005, 0xFB4F, 0x7007, 0xFB50, 0x7028, 0xFB51, 0x7085, - 0xFB52, 0x70AB, 0xFB53, 0x710F, 0xFB54, 0x7104, 0xFB55, 0x715C, - 0xFB56, 0x7146, 0xFB57, 0x7147, 0xFB58, 0xFA15, 0xFB59, 0x71C1, - 0xFB5A, 0x71FE, 0xFB5B, 0x72B1, 0xFB5C, 0x72BE, 0xFB5D, 0x7324, - 0xFB5E, 0xFA16, 0xFB5F, 0x7377, 0xFB60, 0x73BD, 0xFB61, 0x73C9, - 0xFB62, 0x73D6, 0xFB63, 0x73E3, 0xFB64, 0x73D2, 0xFB65, 0x7407, - 0xFB66, 0x73F5, 0xFB67, 0x7426, 0xFB68, 0x742A, 0xFB69, 0x7429, - 0xFB6A, 0x742E, 0xFB6B, 0x7462, 0xFB6C, 0x7489, 0xFB6D, 0x749F, - 0xFB6E, 0x7501, 0xFB6F, 0x756F, 0xFB70, 0x7682, 0xFB71, 0x769C, - 0xFB72, 0x769E, 0xFB73, 0x769B, 0xFB74, 0x76A6, 0xFB75, 0xFA17, - 0xFB76, 0x7746, 0xFB77, 0x52AF, 0xFB78, 0x7821, 0xFB79, 0x784E, - 0xFB7A, 0x7864, 0xFB7B, 0x787A, 0xFB7C, 0x7930, 0xFB7D, 0xFA18, - 0xFB7E, 0xFA19, 0xFB80, 0xFA1A, 0xFB81, 0x7994, 0xFB82, 0xFA1B, - 0xFB83, 0x799B, 0xFB84, 0x7AD1, 0xFB85, 0x7AE7, 0xFB86, 0xFA1C, - 0xFB87, 0x7AEB, 0xFB88, 0x7B9E, 0xFB89, 0xFA1D, 0xFB8A, 0x7D48, - 0xFB8B, 0x7D5C, 0xFB8C, 0x7DB7, 0xFB8D, 0x7DA0, 0xFB8E, 0x7DD6, - 0xFB8F, 0x7E52, 0xFB90, 0x7F47, 0xFB91, 0x7FA1, 0xFB92, 0xFA1E, - 0xFB93, 0x8301, 0xFB94, 0x8362, 0xFB95, 0x837F, 0xFB96, 0x83C7, - 0xFB97, 0x83F6, 0xFB98, 0x8448, 0xFB99, 0x84B4, 0xFB9A, 0x8553, - 0xFB9B, 0x8559, 0xFB9C, 0x856B, 0xFB9D, 0xFA1F, 0xFB9E, 0x85B0, - 0xFB9F, 0xFA20, 0xFBA0, 0xFA21, 0xFBA1, 0x8807, 0xFBA2, 0x88F5, - 0xFBA3, 0x8A12, 0xFBA4, 0x8A37, 0xFBA5, 0x8A79, 0xFBA6, 0x8AA7, - 0xFBA7, 0x8ABE, 0xFBA8, 0x8ADF, 0xFBA9, 0xFA22, 0xFBAA, 0x8AF6, - 0xFBAB, 0x8B53, 0xFBAC, 0x8B7F, 0xFBAD, 0x8CF0, 0xFBAE, 0x8CF4, - 0xFBAF, 0x8D12, 0xFBB0, 0x8D76, 0xFBB1, 0xFA23, 0xFBB2, 0x8ECF, - 0xFBB3, 0xFA24, 0xFBB4, 0xFA25, 0xFBB5, 0x9067, 0xFBB6, 0x90DE, - 0xFBB7, 0xFA26, 0xFBB8, 0x9115, 0xFBB9, 0x9127, 0xFBBA, 0x91DA, - 0xFBBB, 0x91D7, 0xFBBC, 0x91DE, 0xFBBD, 0x91ED, 0xFBBE, 0x91EE, - 0xFBBF, 0x91E4, 0xFBC0, 0x91E5, 0xFBC1, 0x9206, 0xFBC2, 0x9210, - 0xFBC3, 0x920A, 0xFBC4, 0x923A, 0xFBC5, 0x9240, 0xFBC6, 0x923C, - 0xFBC7, 0x924E, 0xFBC8, 0x9259, 0xFBC9, 0x9251, 0xFBCA, 0x9239, - 0xFBCB, 0x9267, 0xFBCC, 0x92A7, 0xFBCD, 0x9277, 0xFBCE, 0x9278, - 0xFBCF, 0x92E7, 0xFBD0, 0x92D7, 0xFBD1, 0x92D9, 0xFBD2, 0x92D0, - 0xFBD3, 0xFA27, 0xFBD4, 0x92D5, 0xFBD5, 0x92E0, 0xFBD6, 0x92D3, - 0xFBD7, 0x9325, 0xFBD8, 0x9321, 0xFBD9, 0x92FB, 0xFBDA, 0xFA28, - 0xFBDB, 0x931E, 0xFBDC, 0x92FF, 0xFBDD, 0x931D, 0xFBDE, 0x9302, - 0xFBDF, 0x9370, 0xFBE0, 0x9357, 0xFBE1, 0x93A4, 0xFBE2, 0x93C6, - 0xFBE3, 0x93DE, 0xFBE4, 0x93F8, 0xFBE5, 0x9431, 0xFBE6, 0x9445, - 0xFBE7, 0x9448, 0xFBE8, 0x9592, 0xFBE9, 0xF9DC, 0xFBEA, 0xFA29, - 0xFBEB, 0x969D, 0xFBEC, 0x96AF, 0xFBED, 0x9733, 0xFBEE, 0x973B, - 0xFBEF, 0x9743, 0xFBF0, 0x974D, 0xFBF1, 0x974F, 0xFBF2, 0x9751, - 0xFBF3, 0x9755, 0xFBF4, 0x9857, 0xFBF5, 0x9865, 0xFBF6, 0xFA2A, - 0xFBF7, 0xFA2B, 0xFBF8, 0x9927, 0xFBF9, 0xFA2C, 0xFBFA, 0x999E, - 0xFBFB, 0x9A4E, 0xFBFC, 0x9AD9, 0xFC40, 0x9ADC, 0xFC41, 0x9B75, - 0xFC42, 0x9B72, 0xFC43, 0x9B8F, 0xFC44, 0x9BB1, 0xFC45, 0x9BBB, - 0xFC46, 0x9C00, 0xFC47, 0x9D70, 0xFC48, 0x9D6B, 0xFC49, 0xFA2D, - 0xFC4A, 0x9E19, 0xFC4B, 0x9ED1, 0, 0 -}; -#endif - - - -WCHAR ff_convert ( /* Converted code, 0 means conversion error */ - WCHAR src, /* Character code to be converted */ - UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ -) -{ - const WCHAR *p; - WCHAR c; - int i, n, li, hi; - - - if (src <= 0x80) { /* ASCII */ - c = src; - } else { -#if !_TINY_TABLE - if (dir) { /* OEMCP to unicode */ - p = sjis2uni; - hi = sizeof(sjis2uni) / 4 - 1; - } else { /* Unicode to OEMCP */ - p = uni2sjis; - hi = sizeof(uni2sjis) / 4 - 1; - } - li = 0; - for (n = 16; n; n--) { - i = li + (hi - li) / 2; - if (src == p[i * 2]) break; - if (src > p[i * 2]) - li = i; - else - hi = i; - } - c = n ? p[i * 2 + 1] : 0; -#else - if (dir) { /* OEMCP to unicode (Incremental search)*/ - p = &uni2sjis[1]; - do { - c = *p; - p += 2; - } while (c && c != src); - p -= 3; - c = *p; - } else { /* Unicode to OEMCP */ - li = 0; hi = sizeof(uni2sjis) / 4 - 1; - for (n = 16; n; n--) { - i = li + (hi - li) / 2; - if (src == uni2sjis[i * 2]) break; - if (src > uni2sjis[i * 2]) - li = i; - else - hi = i; - } - c = n ? uni2sjis[i * 2 + 1] : 0; - } -#endif - } - - return c; -} - - - -WCHAR ff_wtoupper ( /* Upper converted character */ - WCHAR chr /* Input character */ -) -{ - static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 }; - static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 }; - int i; - - - for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ; - - return tbl_lower[i] ? tbl_upper[i] : chr; -} diff --git a/fs/cc936.c b/fs/cc936.c deleted file mode 100644 index 2bd40c6..0000000 --- a/fs/cc936.c +++ /dev/null @@ -1,10973 +0,0 @@ -/*------------------------------------------------------------------------*/ -/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ -/* */ -/* CP936 (Simplified Chinese GBK) */ -/*------------------------------------------------------------------------*/ - -#include - - -#if !_USE_LFN || _CODE_PAGE != 936 -#error This file is not needed in current configuration. Remove from the project. -#endif - -static -const WCHAR uni2oem[] = { -/* Unicode - OEM, Unicode - OEM, Unicode - OEM, Unicode - OEM */ - 0x00A4, 0xA1E8, 0x00A7, 0xA1EC, 0x00A8, 0xA1A7, 0x00B0, 0xA1E3, - 0x00B1, 0xA1C0, 0x00B7, 0xA1A4, 0x00D7, 0xA1C1, 0x00E0, 0xA8A4, - 0x00E1, 0xA8A2, 0x00E8, 0xA8A8, 0x00E9, 0xA8A6, 0x00EA, 0xA8BA, - 0x00EC, 0xA8AC, 0x00ED, 0xA8AA, 0x00F2, 0xA8B0, 0x00F3, 0xA8AE, - 0x00F7, 0xA1C2, 0x00F9, 0xA8B4, 0x00FA, 0xA8B2, 0x00FC, 0xA8B9, - 0x0101, 0xA8A1, 0x0113, 0xA8A5, 0x011B, 0xA8A7, 0x012B, 0xA8A9, - 0x0144, 0xA8BD, 0x0148, 0xA8BE, 0x014D, 0xA8AD, 0x016B, 0xA8B1, - 0x01CE, 0xA8A3, 0x01D0, 0xA8AB, 0x01D2, 0xA8AF, 0x01D4, 0xA8B3, - 0x01D6, 0xA8B5, 0x01D8, 0xA8B6, 0x01DA, 0xA8B7, 0x01DC, 0xA8B8, - 0x0251, 0xA8BB, 0x0261, 0xA8C0, 0x02C7, 0xA1A6, 0x02C9, 0xA1A5, - 0x02CA, 0xA840, 0x02CB, 0xA841, 0x02D9, 0xA842, 0x0391, 0xA6A1, - 0x0392, 0xA6A2, 0x0393, 0xA6A3, 0x0394, 0xA6A4, 0x0395, 0xA6A5, - 0x0396, 0xA6A6, 0x0397, 0xA6A7, 0x0398, 0xA6A8, 0x0399, 0xA6A9, - 0x039A, 0xA6AA, 0x039B, 0xA6AB, 0x039C, 0xA6AC, 0x039D, 0xA6AD, - 0x039E, 0xA6AE, 0x039F, 0xA6AF, 0x03A0, 0xA6B0, 0x03A1, 0xA6B1, - 0x03A3, 0xA6B2, 0x03A4, 0xA6B3, 0x03A5, 0xA6B4, 0x03A6, 0xA6B5, - 0x03A7, 0xA6B6, 0x03A8, 0xA6B7, 0x03A9, 0xA6B8, 0x03B1, 0xA6C1, - 0x03B2, 0xA6C2, 0x03B3, 0xA6C3, 0x03B4, 0xA6C4, 0x03B5, 0xA6C5, - 0x03B6, 0xA6C6, 0x03B7, 0xA6C7, 0x03B8, 0xA6C8, 0x03B9, 0xA6C9, - 0x03BA, 0xA6CA, 0x03BB, 0xA6CB, 0x03BC, 0xA6CC, 0x03BD, 0xA6CD, - 0x03BE, 0xA6CE, 0x03BF, 0xA6CF, 0x03C0, 0xA6D0, 0x03C1, 0xA6D1, - 0x03C3, 0xA6D2, 0x03C4, 0xA6D3, 0x03C5, 0xA6D4, 0x03C6, 0xA6D5, - 0x03C7, 0xA6D6, 0x03C8, 0xA6D7, 0x03C9, 0xA6D8, 0x0401, 0xA7A7, - 0x0410, 0xA7A1, 0x0411, 0xA7A2, 0x0412, 0xA7A3, 0x0413, 0xA7A4, - 0x0414, 0xA7A5, 0x0415, 0xA7A6, 0x0416, 0xA7A8, 0x0417, 0xA7A9, - 0x0418, 0xA7AA, 0x0419, 0xA7AB, 0x041A, 0xA7AC, 0x041B, 0xA7AD, - 0x041C, 0xA7AE, 0x041D, 0xA7AF, 0x041E, 0xA7B0, 0x041F, 0xA7B1, - 0x0420, 0xA7B2, 0x0421, 0xA7B3, 0x0422, 0xA7B4, 0x0423, 0xA7B5, - 0x0424, 0xA7B6, 0x0425, 0xA7B7, 0x0426, 0xA7B8, 0x0427, 0xA7B9, - 0x0428, 0xA7BA, 0x0429, 0xA7BB, 0x042A, 0xA7BC, 0x042B, 0xA7BD, - 0x042C, 0xA7BE, 0x042D, 0xA7BF, 0x042E, 0xA7C0, 0x042F, 0xA7C1, - 0x0430, 0xA7D1, 0x0431, 0xA7D2, 0x0432, 0xA7D3, 0x0433, 0xA7D4, - 0x0434, 0xA7D5, 0x0435, 0xA7D6, 0x0436, 0xA7D8, 0x0437, 0xA7D9, - 0x0438, 0xA7DA, 0x0439, 0xA7DB, 0x043A, 0xA7DC, 0x043B, 0xA7DD, - 0x043C, 0xA7DE, 0x043D, 0xA7DF, 0x043E, 0xA7E0, 0x043F, 0xA7E1, - 0x0440, 0xA7E2, 0x0441, 0xA7E3, 0x0442, 0xA7E4, 0x0443, 0xA7E5, - 0x0444, 0xA7E6, 0x0445, 0xA7E7, 0x0446, 0xA7E8, 0x0447, 0xA7E9, - 0x0448, 0xA7EA, 0x0449, 0xA7EB, 0x044A, 0xA7EC, 0x044B, 0xA7ED, - 0x044C, 0xA7EE, 0x044D, 0xA7EF, 0x044E, 0xA7F0, 0x044F, 0xA7F1, - 0x0451, 0xA7D7, 0x2010, 0xA95C, 0x2013, 0xA843, 0x2014, 0xA1AA, - 0x2015, 0xA844, 0x2016, 0xA1AC, 0x2018, 0xA1AE, 0x2019, 0xA1AF, - 0x201C, 0xA1B0, 0x201D, 0xA1B1, 0x2025, 0xA845, 0x2026, 0xA1AD, - 0x2030, 0xA1EB, 0x2032, 0xA1E4, 0x2033, 0xA1E5, 0x2035, 0xA846, - 0x203B, 0xA1F9, 0x20AC, 0x0080, 0x2103, 0xA1E6, 0x2105, 0xA847, - 0x2109, 0xA848, 0x2116, 0xA1ED, 0x2121, 0xA959, 0x2160, 0xA2F1, - 0x2161, 0xA2F2, 0x2162, 0xA2F3, 0x2163, 0xA2F4, 0x2164, 0xA2F5, - 0x2165, 0xA2F6, 0x2166, 0xA2F7, 0x2167, 0xA2F8, 0x2168, 0xA2F9, - 0x2169, 0xA2FA, 0x216A, 0xA2FB, 0x216B, 0xA2FC, 0x2170, 0xA2A1, - 0x2171, 0xA2A2, 0x2172, 0xA2A3, 0x2173, 0xA2A4, 0x2174, 0xA2A5, - 0x2175, 0xA2A6, 0x2176, 0xA2A7, 0x2177, 0xA2A8, 0x2178, 0xA2A9, - 0x2179, 0xA2AA, 0x2190, 0xA1FB, 0x2191, 0xA1FC, 0x2192, 0xA1FA, - 0x2193, 0xA1FD, 0x2196, 0xA849, 0x2197, 0xA84A, 0x2198, 0xA84B, - 0x2199, 0xA84C, 0x2208, 0xA1CA, 0x220F, 0xA1C7, 0x2211, 0xA1C6, - 0x2215, 0xA84D, 0x221A, 0xA1CC, 0x221D, 0xA1D8, 0x221E, 0xA1DE, - 0x221F, 0xA84E, 0x2220, 0xA1CF, 0x2223, 0xA84F, 0x2225, 0xA1CE, - 0x2227, 0xA1C4, 0x2228, 0xA1C5, 0x2229, 0xA1C9, 0x222A, 0xA1C8, - 0x222B, 0xA1D2, 0x222E, 0xA1D3, 0x2234, 0xA1E0, 0x2235, 0xA1DF, - 0x2236, 0xA1C3, 0x2237, 0xA1CB, 0x223D, 0xA1D7, 0x2248, 0xA1D6, - 0x224C, 0xA1D5, 0x2252, 0xA850, 0x2260, 0xA1D9, 0x2261, 0xA1D4, - 0x2264, 0xA1DC, 0x2265, 0xA1DD, 0x2266, 0xA851, 0x2267, 0xA852, - 0x226E, 0xA1DA, 0x226F, 0xA1DB, 0x2295, 0xA892, 0x2299, 0xA1D1, - 0x22A5, 0xA1CD, 0x22BF, 0xA853, 0x2312, 0xA1D0, 0x2460, 0xA2D9, - 0x2461, 0xA2DA, 0x2462, 0xA2DB, 0x2463, 0xA2DC, 0x2464, 0xA2DD, - 0x2465, 0xA2DE, 0x2466, 0xA2DF, 0x2467, 0xA2E0, 0x2468, 0xA2E1, - 0x2469, 0xA2E2, 0x2474, 0xA2C5, 0x2475, 0xA2C6, 0x2476, 0xA2C7, - 0x2477, 0xA2C8, 0x2478, 0xA2C9, 0x2479, 0xA2CA, 0x247A, 0xA2CB, - 0x247B, 0xA2CC, 0x247C, 0xA2CD, 0x247D, 0xA2CE, 0x247E, 0xA2CF, - 0x247F, 0xA2D0, 0x2480, 0xA2D1, 0x2481, 0xA2D2, 0x2482, 0xA2D3, - 0x2483, 0xA2D4, 0x2484, 0xA2D5, 0x2485, 0xA2D6, 0x2486, 0xA2D7, - 0x2487, 0xA2D8, 0x2488, 0xA2B1, 0x2489, 0xA2B2, 0x248A, 0xA2B3, - 0x248B, 0xA2B4, 0x248C, 0xA2B5, 0x248D, 0xA2B6, 0x248E, 0xA2B7, - 0x248F, 0xA2B8, 0x2490, 0xA2B9, 0x2491, 0xA2BA, 0x2492, 0xA2BB, - 0x2493, 0xA2BC, 0x2494, 0xA2BD, 0x2495, 0xA2BE, 0x2496, 0xA2BF, - 0x2497, 0xA2C0, 0x2498, 0xA2C1, 0x2499, 0xA2C2, 0x249A, 0xA2C3, - 0x249B, 0xA2C4, 0x2500, 0xA9A4, 0x2501, 0xA9A5, 0x2502, 0xA9A6, - 0x2503, 0xA9A7, 0x2504, 0xA9A8, 0x2505, 0xA9A9, 0x2506, 0xA9AA, - 0x2507, 0xA9AB, 0x2508, 0xA9AC, 0x2509, 0xA9AD, 0x250A, 0xA9AE, - 0x250B, 0xA9AF, 0x250C, 0xA9B0, 0x250D, 0xA9B1, 0x250E, 0xA9B2, - 0x250F, 0xA9B3, 0x2510, 0xA9B4, 0x2511, 0xA9B5, 0x2512, 0xA9B6, - 0x2513, 0xA9B7, 0x2514, 0xA9B8, 0x2515, 0xA9B9, 0x2516, 0xA9BA, - 0x2517, 0xA9BB, 0x2518, 0xA9BC, 0x2519, 0xA9BD, 0x251A, 0xA9BE, - 0x251B, 0xA9BF, 0x251C, 0xA9C0, 0x251D, 0xA9C1, 0x251E, 0xA9C2, - 0x251F, 0xA9C3, 0x2520, 0xA9C4, 0x2521, 0xA9C5, 0x2522, 0xA9C6, - 0x2523, 0xA9C7, 0x2524, 0xA9C8, 0x2525, 0xA9C9, 0x2526, 0xA9CA, - 0x2527, 0xA9CB, 0x2528, 0xA9CC, 0x2529, 0xA9CD, 0x252A, 0xA9CE, - 0x252B, 0xA9CF, 0x252C, 0xA9D0, 0x252D, 0xA9D1, 0x252E, 0xA9D2, - 0x252F, 0xA9D3, 0x2530, 0xA9D4, 0x2531, 0xA9D5, 0x2532, 0xA9D6, - 0x2533, 0xA9D7, 0x2534, 0xA9D8, 0x2535, 0xA9D9, 0x2536, 0xA9DA, - 0x2537, 0xA9DB, 0x2538, 0xA9DC, 0x2539, 0xA9DD, 0x253A, 0xA9DE, - 0x253B, 0xA9DF, 0x253C, 0xA9E0, 0x253D, 0xA9E1, 0x253E, 0xA9E2, - 0x253F, 0xA9E3, 0x2540, 0xA9E4, 0x2541, 0xA9E5, 0x2542, 0xA9E6, - 0x2543, 0xA9E7, 0x2544, 0xA9E8, 0x2545, 0xA9E9, 0x2546, 0xA9EA, - 0x2547, 0xA9EB, 0x2548, 0xA9EC, 0x2549, 0xA9ED, 0x254A, 0xA9EE, - 0x254B, 0xA9EF, 0x2550, 0xA854, 0x2551, 0xA855, 0x2552, 0xA856, - 0x2553, 0xA857, 0x2554, 0xA858, 0x2555, 0xA859, 0x2556, 0xA85A, - 0x2557, 0xA85B, 0x2558, 0xA85C, 0x2559, 0xA85D, 0x255A, 0xA85E, - 0x255B, 0xA85F, 0x255C, 0xA860, 0x255D, 0xA861, 0x255E, 0xA862, - 0x255F, 0xA863, 0x2560, 0xA864, 0x2561, 0xA865, 0x2562, 0xA866, - 0x2563, 0xA867, 0x2564, 0xA868, 0x2565, 0xA869, 0x2566, 0xA86A, - 0x2567, 0xA86B, 0x2568, 0xA86C, 0x2569, 0xA86D, 0x256A, 0xA86E, - 0x256B, 0xA86F, 0x256C, 0xA870, 0x256D, 0xA871, 0x256E, 0xA872, - 0x256F, 0xA873, 0x2570, 0xA874, 0x2571, 0xA875, 0x2572, 0xA876, - 0x2573, 0xA877, 0x2581, 0xA878, 0x2582, 0xA879, 0x2583, 0xA87A, - 0x2584, 0xA87B, 0x2585, 0xA87C, 0x2586, 0xA87D, 0x2587, 0xA87E, - 0x2588, 0xA880, 0x2589, 0xA881, 0x258A, 0xA882, 0x258B, 0xA883, - 0x258C, 0xA884, 0x258D, 0xA885, 0x258E, 0xA886, 0x258F, 0xA887, - 0x2593, 0xA888, 0x2594, 0xA889, 0x2595, 0xA88A, 0x25A0, 0xA1F6, - 0x25A1, 0xA1F5, 0x25B2, 0xA1F8, 0x25B3, 0xA1F7, 0x25BC, 0xA88B, - 0x25BD, 0xA88C, 0x25C6, 0xA1F4, 0x25C7, 0xA1F3, 0x25CB, 0xA1F0, - 0x25CE, 0xA1F2, 0x25CF, 0xA1F1, 0x25E2, 0xA88D, 0x25E3, 0xA88E, - 0x25E4, 0xA88F, 0x25E5, 0xA890, 0x2605, 0xA1EF, 0x2606, 0xA1EE, - 0x2609, 0xA891, 0x2640, 0xA1E2, 0x2642, 0xA1E1, 0x3000, 0xA1A1, - 0x3001, 0xA1A2, 0x3002, 0xA1A3, 0x3003, 0xA1A8, 0x3005, 0xA1A9, - 0x3006, 0xA965, 0x3007, 0xA996, 0x3008, 0xA1B4, 0x3009, 0xA1B5, - 0x300A, 0xA1B6, 0x300B, 0xA1B7, 0x300C, 0xA1B8, 0x300D, 0xA1B9, - 0x300E, 0xA1BA, 0x300F, 0xA1BB, 0x3010, 0xA1BE, 0x3011, 0xA1BF, - 0x3012, 0xA893, 0x3013, 0xA1FE, 0x3014, 0xA1B2, 0x3015, 0xA1B3, - 0x3016, 0xA1BC, 0x3017, 0xA1BD, 0x301D, 0xA894, 0x301E, 0xA895, - 0x3021, 0xA940, 0x3022, 0xA941, 0x3023, 0xA942, 0x3024, 0xA943, - 0x3025, 0xA944, 0x3026, 0xA945, 0x3027, 0xA946, 0x3028, 0xA947, - 0x3029, 0xA948, 0x3041, 0xA4A1, 0x3042, 0xA4A2, 0x3043, 0xA4A3, - 0x3044, 0xA4A4, 0x3045, 0xA4A5, 0x3046, 0xA4A6, 0x3047, 0xA4A7, - 0x3048, 0xA4A8, 0x3049, 0xA4A9, 0x304A, 0xA4AA, 0x304B, 0xA4AB, - 0x304C, 0xA4AC, 0x304D, 0xA4AD, 0x304E, 0xA4AE, 0x304F, 0xA4AF, - 0x3050, 0xA4B0, 0x3051, 0xA4B1, 0x3052, 0xA4B2, 0x3053, 0xA4B3, - 0x3054, 0xA4B4, 0x3055, 0xA4B5, 0x3056, 0xA4B6, 0x3057, 0xA4B7, - 0x3058, 0xA4B8, 0x3059, 0xA4B9, 0x305A, 0xA4BA, 0x305B, 0xA4BB, - 0x305C, 0xA4BC, 0x305D, 0xA4BD, 0x305E, 0xA4BE, 0x305F, 0xA4BF, - 0x3060, 0xA4C0, 0x3061, 0xA4C1, 0x3062, 0xA4C2, 0x3063, 0xA4C3, - 0x3064, 0xA4C4, 0x3065, 0xA4C5, 0x3066, 0xA4C6, 0x3067, 0xA4C7, - 0x3068, 0xA4C8, 0x3069, 0xA4C9, 0x306A, 0xA4CA, 0x306B, 0xA4CB, - 0x306C, 0xA4CC, 0x306D, 0xA4CD, 0x306E, 0xA4CE, 0x306F, 0xA4CF, - 0x3070, 0xA4D0, 0x3071, 0xA4D1, 0x3072, 0xA4D2, 0x3073, 0xA4D3, - 0x3074, 0xA4D4, 0x3075, 0xA4D5, 0x3076, 0xA4D6, 0x3077, 0xA4D7, - 0x3078, 0xA4D8, 0x3079, 0xA4D9, 0x307A, 0xA4DA, 0x307B, 0xA4DB, - 0x307C, 0xA4DC, 0x307D, 0xA4DD, 0x307E, 0xA4DE, 0x307F, 0xA4DF, - 0x3080, 0xA4E0, 0x3081, 0xA4E1, 0x3082, 0xA4E2, 0x3083, 0xA4E3, - 0x3084, 0xA4E4, 0x3085, 0xA4E5, 0x3086, 0xA4E6, 0x3087, 0xA4E7, - 0x3088, 0xA4E8, 0x3089, 0xA4E9, 0x308A, 0xA4EA, 0x308B, 0xA4EB, - 0x308C, 0xA4EC, 0x308D, 0xA4ED, 0x308E, 0xA4EE, 0x308F, 0xA4EF, - 0x3090, 0xA4F0, 0x3091, 0xA4F1, 0x3092, 0xA4F2, 0x3093, 0xA4F3, - 0x309B, 0xA961, 0x309C, 0xA962, 0x309D, 0xA966, 0x309E, 0xA967, - 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0x9F2B, 0xFC9C, 0x9F2C, 0xF7F8, 0x9F2D, 0xFC9D, 0x9F2E, 0xFC9E, - 0x9F2F, 0xF7F9, 0x9F30, 0xFC9F, 0x9F31, 0xFCA0, 0x9F32, 0xFD40, - 0x9F33, 0xFD41, 0x9F34, 0xFD42, 0x9F35, 0xFD43, 0x9F36, 0xFD44, - 0x9F37, 0xF7FB, 0x9F38, 0xFD45, 0x9F39, 0xF7FA, 0x9F3A, 0xFD46, - 0x9F3B, 0xB1C7, 0x9F3C, 0xFD47, 0x9F3D, 0xF7FC, 0x9F3E, 0xF7FD, - 0x9F3F, 0xFD48, 0x9F40, 0xFD49, 0x9F41, 0xFD4A, 0x9F42, 0xFD4B, - 0x9F43, 0xFD4C, 0x9F44, 0xF7FE, 0x9F45, 0xFD4D, 0x9F46, 0xFD4E, - 0x9F47, 0xFD4F, 0x9F48, 0xFD50, 0x9F49, 0xFD51, 0x9F4A, 0xFD52, - 0x9F4B, 0xFD53, 0x9F4C, 0xFD54, 0x9F4D, 0xFD55, 0x9F4E, 0xFD56, - 0x9F4F, 0xFD57, 0x9F50, 0xC6EB, 0x9F51, 0xECB4, 0x9F52, 0xFD58, - 0x9F53, 0xFD59, 0x9F54, 0xFD5A, 0x9F55, 0xFD5B, 0x9F56, 0xFD5C, - 0x9F57, 0xFD5D, 0x9F58, 0xFD5E, 0x9F59, 0xFD5F, 0x9F5A, 0xFD60, - 0x9F5B, 0xFD61, 0x9F5C, 0xFD62, 0x9F5D, 0xFD63, 0x9F5E, 0xFD64, - 0x9F5F, 0xFD65, 0x9F60, 0xFD66, 0x9F61, 0xFD67, 0x9F62, 0xFD68, - 0x9F63, 0xFD69, 0x9F64, 0xFD6A, 0x9F65, 0xFD6B, 0x9F66, 0xFD6C, - 0x9F67, 0xFD6D, 0x9F68, 0xFD6E, 0x9F69, 0xFD6F, 0x9F6A, 0xFD70, - 0x9F6B, 0xFD71, 0x9F6C, 0xFD72, 0x9F6D, 0xFD73, 0x9F6E, 0xFD74, - 0x9F6F, 0xFD75, 0x9F70, 0xFD76, 0x9F71, 0xFD77, 0x9F72, 0xFD78, - 0x9F73, 0xFD79, 0x9F74, 0xFD7A, 0x9F75, 0xFD7B, 0x9F76, 0xFD7C, - 0x9F77, 0xFD7D, 0x9F78, 0xFD7E, 0x9F79, 0xFD80, 0x9F7A, 0xFD81, - 0x9F7B, 0xFD82, 0x9F7C, 0xFD83, 0x9F7D, 0xFD84, 0x9F7E, 0xFD85, - 0x9F7F, 0xB3DD, 0x9F80, 0xF6B3, 0x9F81, 0xFD86, 0x9F82, 0xFD87, - 0x9F83, 0xF6B4, 0x9F84, 0xC1E4, 0x9F85, 0xF6B5, 0x9F86, 0xF6B6, - 0x9F87, 0xF6B7, 0x9F88, 0xF6B8, 0x9F89, 0xF6B9, 0x9F8A, 0xF6BA, - 0x9F8B, 0xC8A3, 0x9F8C, 0xF6BB, 0x9F8D, 0xFD88, 0x9F8E, 0xFD89, - 0x9F8F, 0xFD8A, 0x9F90, 0xFD8B, 0x9F91, 0xFD8C, 0x9F92, 0xFD8D, - 0x9F93, 0xFD8E, 0x9F94, 0xFD8F, 0x9F95, 0xFD90, 0x9F96, 0xFD91, - 0x9F97, 0xFD92, 0x9F98, 0xFD93, 0x9F99, 0xC1FA, 0x9F9A, 0xB9A8, - 0x9F9B, 0xEDE8, 0x9F9C, 0xFD94, 0x9F9D, 0xFD95, 0x9F9E, 0xFD96, - 0x9F9F, 0xB9EA, 0x9FA0, 0xD9DF, 0x9FA1, 0xFD97, 0x9FA2, 0xFD98, - 0x9FA3, 0xFD99, 0x9FA4, 0xFD9A, 0x9FA5, 0xFD9B, 0xF92C, 0xFD9C, - 0xF979, 0xFD9D, 0xF995, 0xFD9E, 0xF9E7, 0xFD9F, 0xF9F1, 0xFDA0, - 0xFA0C, 0xFE40, 0xFA0D, 0xFE41, 0xFA0E, 0xFE42, 0xFA0F, 0xFE43, - 0xFA11, 0xFE44, 0xFA13, 0xFE45, 0xFA14, 0xFE46, 0xFA18, 0xFE47, - 0xFA1F, 0xFE48, 0xFA20, 0xFE49, 0xFA21, 0xFE4A, 0xFA23, 0xFE4B, - 0xFA24, 0xFE4C, 0xFA27, 0xFE4D, 0xFA28, 0xFE4E, 0xFA29, 0xFE4F, - 0xFE30, 0xA955, 0xFE31, 0xA6F2, 0xFE33, 0xA6F4, 0xFE34, 0xA6F5, - 0xFE35, 0xA6E0, 0xFE36, 0xA6E1, 0xFE37, 0xA6F0, 0xFE38, 0xA6F1, - 0xFE39, 0xA6E2, 0xFE3A, 0xA6E3, 0xFE3B, 0xA6EE, 0xFE3C, 0xA6EF, - 0xFE3D, 0xA6E6, 0xFE3E, 0xA6E7, 0xFE3F, 0xA6E4, 0xFE40, 0xA6E5, - 0xFE41, 0xA6E8, 0xFE42, 0xA6E9, 0xFE43, 0xA6EA, 0xFE44, 0xA6EB, - 0xFE49, 0xA968, 0xFE4A, 0xA969, 0xFE4B, 0xA96A, 0xFE4C, 0xA96B, - 0xFE4D, 0xA96C, 0xFE4E, 0xA96D, 0xFE4F, 0xA96E, 0xFE50, 0xA96F, - 0xFE51, 0xA970, 0xFE52, 0xA971, 0xFE54, 0xA972, 0xFE55, 0xA973, - 0xFE56, 0xA974, 0xFE57, 0xA975, 0xFE59, 0xA976, 0xFE5A, 0xA977, - 0xFE5B, 0xA978, 0xFE5C, 0xA979, 0xFE5D, 0xA97A, 0xFE5E, 0xA97B, - 0xFE5F, 0xA97C, 0xFE60, 0xA97D, 0xFE61, 0xA97E, 0xFE62, 0xA980, - 0xFE63, 0xA981, 0xFE64, 0xA982, 0xFE65, 0xA983, 0xFE66, 0xA984, - 0xFE68, 0xA985, 0xFE69, 0xA986, 0xFE6A, 0xA987, 0xFE6B, 0xA988, - 0xFF01, 0xA3A1, 0xFF02, 0xA3A2, 0xFF03, 0xA3A3, 0xFF04, 0xA1E7, - 0xFF05, 0xA3A5, 0xFF06, 0xA3A6, 0xFF07, 0xA3A7, 0xFF08, 0xA3A8, - 0xFF09, 0xA3A9, 0xFF0A, 0xA3AA, 0xFF0B, 0xA3AB, 0xFF0C, 0xA3AC, - 0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0, - 0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4, - 0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8, - 0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC, - 0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0, - 0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4, - 0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8, - 0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC, - 0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0, - 0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4, - 0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8, - 0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA3DC, - 0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0, - 0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4, - 0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8, - 0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC, - 0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0, - 0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4, - 0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8, - 0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC, - 0xFF5D, 0xA3FD, 0xFF5E, 0xA1AB, 0xFFE0, 0xA1E9, 0xFFE1, 0xA1EA, - 0xFFE2, 0xA956, 0xFFE3, 0xA3FE, 0xFFE4, 0xA957, 0xFFE5, 0xA3A4, - 0, 0 -}; - -static -const WCHAR oem2uni[] = { -/* OEM - Unicode, OEM - Unicode, OEM - Unicode, OEM - Unicode */ - 0x0080, 0x20AC, 0x8140, 0x4E02, 0x8141, 0x4E04, 0x8142, 0x4E05, - 0x8143, 0x4E06, 0x8144, 0x4E0F, 0x8145, 0x4E12, 0x8146, 0x4E17, - 0x8147, 0x4E1F, 0x8148, 0x4E20, 0x8149, 0x4E21, 0x814A, 0x4E23, - 0x814B, 0x4E26, 0x814C, 0x4E29, 0x814D, 0x4E2E, 0x814E, 0x4E2F, - 0x814F, 0x4E31, 0x8150, 0x4E33, 0x8151, 0x4E35, 0x8152, 0x4E37, - 0x8153, 0x4E3C, 0x8154, 0x4E40, 0x8155, 0x4E41, 0x8156, 0x4E42, - 0x8157, 0x4E44, 0x8158, 0x4E46, 0x8159, 0x4E4A, 0x815A, 0x4E51, - 0x815B, 0x4E55, 0x815C, 0x4E57, 0x815D, 0x4E5A, 0x815E, 0x4E5B, - 0x815F, 0x4E62, 0x8160, 0x4E63, 0x8161, 0x4E64, 0x8162, 0x4E65, - 0x8163, 0x4E67, 0x8164, 0x4E68, 0x8165, 0x4E6A, 0x8166, 0x4E6B, - 0x8167, 0x4E6C, 0x8168, 0x4E6D, 0x8169, 0x4E6E, 0x816A, 0x4E6F, - 0x816B, 0x4E72, 0x816C, 0x4E74, 0x816D, 0x4E75, 0x816E, 0x4E76, - 0x816F, 0x4E77, 0x8170, 0x4E78, 0x8171, 0x4E79, 0x8172, 0x4E7A, - 0x8173, 0x4E7B, 0x8174, 0x4E7C, 0x8175, 0x4E7D, 0x8176, 0x4E7F, - 0x8177, 0x4E80, 0x8178, 0x4E81, 0x8179, 0x4E82, 0x817A, 0x4E83, - 0x817B, 0x4E84, 0x817C, 0x4E85, 0x817D, 0x4E87, 0x817E, 0x4E8A, - 0x8180, 0x4E90, 0x8181, 0x4E96, 0x8182, 0x4E97, 0x8183, 0x4E99, - 0x8184, 0x4E9C, 0x8185, 0x4E9D, 0x8186, 0x4E9E, 0x8187, 0x4EA3, - 0x8188, 0x4EAA, 0x8189, 0x4EAF, 0x818A, 0x4EB0, 0x818B, 0x4EB1, - 0x818C, 0x4EB4, 0x818D, 0x4EB6, 0x818E, 0x4EB7, 0x818F, 0x4EB8, - 0x8190, 0x4EB9, 0x8191, 0x4EBC, 0x8192, 0x4EBD, 0x8193, 0x4EBE, - 0x8194, 0x4EC8, 0x8195, 0x4ECC, 0x8196, 0x4ECF, 0x8197, 0x4ED0, - 0x8198, 0x4ED2, 0x8199, 0x4EDA, 0x819A, 0x4EDB, 0x819B, 0x4EDC, - 0x819C, 0x4EE0, 0x819D, 0x4EE2, 0x819E, 0x4EE6, 0x819F, 0x4EE7, - 0x81A0, 0x4EE9, 0x81A1, 0x4EED, 0x81A2, 0x4EEE, 0x81A3, 0x4EEF, - 0x81A4, 0x4EF1, 0x81A5, 0x4EF4, 0x81A6, 0x4EF8, 0x81A7, 0x4EF9, - 0x81A8, 0x4EFA, 0x81A9, 0x4EFC, 0x81AA, 0x4EFE, 0x81AB, 0x4F00, - 0x81AC, 0x4F02, 0x81AD, 0x4F03, 0x81AE, 0x4F04, 0x81AF, 0x4F05, - 0x81B0, 0x4F06, 0x81B1, 0x4F07, 0x81B2, 0x4F08, 0x81B3, 0x4F0B, - 0x81B4, 0x4F0C, 0x81B5, 0x4F12, 0x81B6, 0x4F13, 0x81B7, 0x4F14, - 0x81B8, 0x4F15, 0x81B9, 0x4F16, 0x81BA, 0x4F1C, 0x81BB, 0x4F1D, - 0x81BC, 0x4F21, 0x81BD, 0x4F23, 0x81BE, 0x4F28, 0x81BF, 0x4F29, - 0x81C0, 0x4F2C, 0x81C1, 0x4F2D, 0x81C2, 0x4F2E, 0x81C3, 0x4F31, - 0x81C4, 0x4F33, 0x81C5, 0x4F35, 0x81C6, 0x4F37, 0x81C7, 0x4F39, - 0x81C8, 0x4F3B, 0x81C9, 0x4F3E, 0x81CA, 0x4F3F, 0x81CB, 0x4F40, - 0x81CC, 0x4F41, 0x81CD, 0x4F42, 0x81CE, 0x4F44, 0x81CF, 0x4F45, - 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0xFD60, 0x9F5A, 0xFD61, 0x9F5B, 0xFD62, 0x9F5C, 0xFD63, 0x9F5D, - 0xFD64, 0x9F5E, 0xFD65, 0x9F5F, 0xFD66, 0x9F60, 0xFD67, 0x9F61, - 0xFD68, 0x9F62, 0xFD69, 0x9F63, 0xFD6A, 0x9F64, 0xFD6B, 0x9F65, - 0xFD6C, 0x9F66, 0xFD6D, 0x9F67, 0xFD6E, 0x9F68, 0xFD6F, 0x9F69, - 0xFD70, 0x9F6A, 0xFD71, 0x9F6B, 0xFD72, 0x9F6C, 0xFD73, 0x9F6D, - 0xFD74, 0x9F6E, 0xFD75, 0x9F6F, 0xFD76, 0x9F70, 0xFD77, 0x9F71, - 0xFD78, 0x9F72, 0xFD79, 0x9F73, 0xFD7A, 0x9F74, 0xFD7B, 0x9F75, - 0xFD7C, 0x9F76, 0xFD7D, 0x9F77, 0xFD7E, 0x9F78, 0xFD80, 0x9F79, - 0xFD81, 0x9F7A, 0xFD82, 0x9F7B, 0xFD83, 0x9F7C, 0xFD84, 0x9F7D, - 0xFD85, 0x9F7E, 0xFD86, 0x9F81, 0xFD87, 0x9F82, 0xFD88, 0x9F8D, - 0xFD89, 0x9F8E, 0xFD8A, 0x9F8F, 0xFD8B, 0x9F90, 0xFD8C, 0x9F91, - 0xFD8D, 0x9F92, 0xFD8E, 0x9F93, 0xFD8F, 0x9F94, 0xFD90, 0x9F95, - 0xFD91, 0x9F96, 0xFD92, 0x9F97, 0xFD93, 0x9F98, 0xFD94, 0x9F9C, - 0xFD95, 0x9F9D, 0xFD96, 0x9F9E, 0xFD97, 0x9FA1, 0xFD98, 0x9FA2, - 0xFD99, 0x9FA3, 0xFD9A, 0x9FA4, 0xFD9B, 0x9FA5, 0xFD9C, 0xF92C, - 0xFD9D, 0xF979, 0xFD9E, 0xF995, 0xFD9F, 0xF9E7, 0xFDA0, 0xF9F1, - 0xFE40, 0xFA0C, 0xFE41, 0xFA0D, 0xFE42, 0xFA0E, 0xFE43, 0xFA0F, - 0xFE44, 0xFA11, 0xFE45, 0xFA13, 0xFE46, 0xFA14, 0xFE47, 0xFA18, - 0xFE48, 0xFA1F, 0xFE49, 0xFA20, 0xFE4A, 0xFA21, 0xFE4B, 0xFA23, - 0xFE4C, 0xFA24, 0xFE4D, 0xFA27, 0xFE4E, 0xFA28, 0xFE4F, 0xFA29, - 0, 0 -}; - - - -WCHAR ff_convert ( /* Converted code, 0 means conversion error */ - WCHAR src, /* Character code to be converted */ - UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ -) -{ - const WCHAR *p; - WCHAR c; - int i, n, li, hi; - - - if (src < 0x80) { /* ASCII */ - c = src; - } else { - if (dir) { /* OEMCP to unicode */ - p = oem2uni; - hi = sizeof(oem2uni) / 4 - 1; - } else { /* Unicode to OEMCP */ - p = uni2oem; - hi = sizeof(uni2oem) / 4 - 1; - } - li = 0; - for (n = 16; n; n--) { - i = li + (hi - li) / 2; - if (src == p[i * 2]) break; - if (src > p[i * 2]) - li = i; - else - hi = i; - } - c = n ? p[i * 2 + 1] : 0; - } - - return c; -} - - - -WCHAR ff_wtoupper ( /* Upper converted character */ - WCHAR chr /* Input character */ -) -{ - static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 }; - static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 }; - int i; - - - for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ; - - return tbl_lower[i] ? tbl_upper[i] : chr; -} diff --git a/fs/cc949.c b/fs/cc949.c deleted file mode 100644 index edaca5f..0000000 --- a/fs/cc949.c +++ /dev/null @@ -1,8603 +0,0 @@ -/*------------------------------------------------------------------------*/ -/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ -/* */ -/* CP949 (Korean EUC-KR) */ -/*------------------------------------------------------------------------*/ - -#include - - -#if !_USE_LFN || _CODE_PAGE != 949 -#error This file is not needed in current configuration. Remove from the project. -#endif - - -static -const WCHAR uni2oem[] = { -/* Unicode - OEM, Unicode - OEM, Unicode - OEM, Unicode - OEM */ - 0x00A1, 0xA2AE, 0x00A4, 0xA2B4, 0x00A7, 0xA1D7, 0x00A8, 0xA1A7, - 0x00AA, 0xA8A3, 0x00AD, 0xA1A9, 0x00AE, 0xA2E7, 0x00B0, 0xA1C6, - 0x00B1, 0xA1BE, 0x00B2, 0xA9F7, 0x00B3, 0xA9F8, 0x00B4, 0xA2A5, - 0x00B6, 0xA2D2, 0x00B7, 0xA1A4, 0x00B8, 0xA2AC, 0x00B9, 0xA9F6, - 0x00BA, 0xA8AC, 0x00BC, 0xA8F9, 0x00BD, 0xA8F6, 0x00BE, 0xA8FA, - 0x00BF, 0xA2AF, 0x00C6, 0xA8A1, 0x00D0, 0xA8A2, 0x00D7, 0xA1BF, - 0x00D8, 0xA8AA, 0x00DE, 0xA8AD, 0x00DF, 0xA9AC, 0x00E6, 0xA9A1, - 0x00F0, 0xA9A3, 0x00F7, 0xA1C0, 0x00F8, 0xA9AA, 0x00FE, 0xA9AD, - 0x0111, 0xA9A2, 0x0126, 0xA8A4, 0x0127, 0xA9A4, 0x0131, 0xA9A5, - 0x0132, 0xA8A6, 0x0133, 0xA9A6, 0x0138, 0xA9A7, 0x013F, 0xA8A8, - 0x0140, 0xA9A8, 0x0141, 0xA8A9, 0x0142, 0xA9A9, 0x0149, 0xA9B0, - 0x014A, 0xA8AF, 0x014B, 0xA9AF, 0x0152, 0xA8AB, 0x0153, 0xA9AB, - 0x0166, 0xA8AE, 0x0167, 0xA9AE, 0x02C7, 0xA2A7, 0x02D0, 0xA2B0, - 0x02D8, 0xA2A8, 0x02D9, 0xA2AB, 0x02DA, 0xA2AA, 0x02DB, 0xA2AD, - 0x02DD, 0xA2A9, 0x0391, 0xA5C1, 0x0392, 0xA5C2, 0x0393, 0xA5C3, - 0x0394, 0xA5C4, 0x0395, 0xA5C5, 0x0396, 0xA5C6, 0x0397, 0xA5C7, - 0x0398, 0xA5C8, 0x0399, 0xA5C9, 0x039A, 0xA5CA, 0x039B, 0xA5CB, - 0x039C, 0xA5CC, 0x039D, 0xA5CD, 0x039E, 0xA5CE, 0x039F, 0xA5CF, - 0x03A0, 0xA5D0, 0x03A1, 0xA5D1, 0x03A3, 0xA5D2, 0x03A4, 0xA5D3, - 0x03A5, 0xA5D4, 0x03A6, 0xA5D5, 0x03A7, 0xA5D6, 0x03A8, 0xA5D7, - 0x03A9, 0xA5D8, 0x03B1, 0xA5E1, 0x03B2, 0xA5E2, 0x03B3, 0xA5E3, - 0x03B4, 0xA5E4, 0x03B5, 0xA5E5, 0x03B6, 0xA5E6, 0x03B7, 0xA5E7, - 0x03B8, 0xA5E8, 0x03B9, 0xA5E9, 0x03BA, 0xA5EA, 0x03BB, 0xA5EB, - 0x03BC, 0xA5EC, 0x03BD, 0xA5ED, 0x03BE, 0xA5EE, 0x03BF, 0xA5EF, - 0x03C0, 0xA5F0, 0x03C1, 0xA5F1, 0x03C3, 0xA5F2, 0x03C4, 0xA5F3, - 0x03C5, 0xA5F4, 0x03C6, 0xA5F5, 0x03C7, 0xA5F6, 0x03C8, 0xA5F7, - 0x03C9, 0xA5F8, 0x0401, 0xACA7, 0x0410, 0xACA1, 0x0411, 0xACA2, - 0x0412, 0xACA3, 0x0413, 0xACA4, 0x0414, 0xACA5, 0x0415, 0xACA6, - 0x0416, 0xACA8, 0x0417, 0xACA9, 0x0418, 0xACAA, 0x0419, 0xACAB, - 0x041A, 0xACAC, 0x041B, 0xACAD, 0x041C, 0xACAE, 0x041D, 0xACAF, - 0x041E, 0xACB0, 0x041F, 0xACB1, 0x0420, 0xACB2, 0x0421, 0xACB3, - 0x0422, 0xACB4, 0x0423, 0xACB5, 0x0424, 0xACB6, 0x0425, 0xACB7, - 0x0426, 0xACB8, 0x0427, 0xACB9, 0x0428, 0xACBA, 0x0429, 0xACBB, - 0x042A, 0xACBC, 0x042B, 0xACBD, 0x042C, 0xACBE, 0x042D, 0xACBF, - 0x042E, 0xACC0, 0x042F, 0xACC1, 0x0430, 0xACD1, 0x0431, 0xACD2, - 0x0432, 0xACD3, 0x0433, 0xACD4, 0x0434, 0xACD5, 0x0435, 0xACD6, - 0x0436, 0xACD8, 0x0437, 0xACD9, 0x0438, 0xACDA, 0x0439, 0xACDB, - 0x043A, 0xACDC, 0x043B, 0xACDD, 0x043C, 0xACDE, 0x043D, 0xACDF, - 0x043E, 0xACE0, 0x043F, 0xACE1, 0x0440, 0xACE2, 0x0441, 0xACE3, - 0x0442, 0xACE4, 0x0443, 0xACE5, 0x0444, 0xACE6, 0x0445, 0xACE7, - 0x0446, 0xACE8, 0x0447, 0xACE9, 0x0448, 0xACEA, 0x0449, 0xACEB, - 0x044A, 0xACEC, 0x044B, 0xACED, 0x044C, 0xACEE, 0x044D, 0xACEF, - 0x044E, 0xACF0, 0x044F, 0xACF1, 0x0451, 0xACD7, 0x2015, 0xA1AA, - 0x2018, 0xA1AE, 0x2019, 0xA1AF, 0x201C, 0xA1B0, 0x201D, 0xA1B1, - 0x2020, 0xA2D3, 0x2021, 0xA2D4, 0x2025, 0xA1A5, 0x2026, 0xA1A6, - 0x2030, 0xA2B6, 0x2032, 0xA1C7, 0x2033, 0xA1C8, 0x203B, 0xA1D8, - 0x2074, 0xA9F9, 0x207F, 0xA9FA, 0x2081, 0xA9FB, 0x2082, 0xA9FC, - 0x2083, 0xA9FD, 0x2084, 0xA9FE, 0x20AC, 0xA2E6, 0x2103, 0xA1C9, - 0x2109, 0xA2B5, 0x2113, 0xA7A4, 0x2116, 0xA2E0, 0x2121, 0xA2E5, - 0x2122, 0xA2E2, 0x2126, 0xA7D9, 0x212B, 0xA1CA, 0x2153, 0xA8F7, - 0x2154, 0xA8F8, 0x215B, 0xA8FB, 0x215C, 0xA8FC, 0x215D, 0xA8FD, - 0x215E, 0xA8FE, 0x2160, 0xA5B0, 0x2161, 0xA5B1, 0x2162, 0xA5B2, - 0x2163, 0xA5B3, 0x2164, 0xA5B4, 0x2165, 0xA5B5, 0x2166, 0xA5B6, - 0x2167, 0xA5B7, 0x2168, 0xA5B8, 0x2169, 0xA5B9, 0x2170, 0xA5A1, - 0x2171, 0xA5A2, 0x2172, 0xA5A3, 0x2173, 0xA5A4, 0x2174, 0xA5A5, - 0x2175, 0xA5A6, 0x2176, 0xA5A7, 0x2177, 0xA5A8, 0x2178, 0xA5A9, - 0x2179, 0xA5AA, 0x2190, 0xA1E7, 0x2191, 0xA1E8, 0x2192, 0xA1E6, - 0x2193, 0xA1E9, 0x2194, 0xA1EA, 0x2195, 0xA2D5, 0x2196, 0xA2D8, - 0x2197, 0xA2D6, 0x2198, 0xA2D9, 0x2199, 0xA2D7, 0x21D2, 0xA2A1, - 0x21D4, 0xA2A2, 0x2200, 0xA2A3, 0x2202, 0xA1D3, 0x2203, 0xA2A4, - 0x2207, 0xA1D4, 0x2208, 0xA1F4, 0x220B, 0xA1F5, 0x220F, 0xA2B3, - 0x2211, 0xA2B2, 0x221A, 0xA1EE, 0x221D, 0xA1F0, 0x221E, 0xA1C4, - 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0xFF05, 0xA3A5, 0xFF06, 0xA3A6, 0xFF07, 0xA3A7, 0xFF08, 0xA3A8, - 0xFF09, 0xA3A9, 0xFF0A, 0xA3AA, 0xFF0B, 0xA3AB, 0xFF0C, 0xA3AC, - 0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0, - 0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4, - 0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8, - 0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC, - 0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0, - 0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4, - 0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8, - 0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC, - 0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0, - 0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4, - 0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8, - 0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA1AC, - 0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0, - 0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4, - 0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8, - 0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC, - 0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0, - 0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4, - 0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8, - 0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC, - 0xFF5D, 0xA3FD, 0xFF5E, 0xA2A6, 0xFFE0, 0xA1CB, 0xFFE1, 0xA1CC, - 0xFFE2, 0xA1FE, 0xFFE3, 0xA3FE, 0xFFE5, 0xA1CD, 0xFFE6, 0xA3DC, - 0, 0 -}; - -static -const WCHAR oem2uni[] = { -/* OEM - Unicode, OEM - Unicode, OEM - Unicode, OEM - Unicode */ - 0x8141, 0xAC02, 0x8142, 0xAC03, 0x8143, 0xAC05, 0x8144, 0xAC06, - 0x8145, 0xAC0B, 0x8146, 0xAC0C, 0x8147, 0xAC0D, 0x8148, 0xAC0E, - 0x8149, 0xAC0F, 0x814A, 0xAC18, 0x814B, 0xAC1E, 0x814C, 0xAC1F, - 0x814D, 0xAC21, 0x814E, 0xAC22, 0x814F, 0xAC23, 0x8150, 0xAC25, - 0x8151, 0xAC26, 0x8152, 0xAC27, 0x8153, 0xAC28, 0x8154, 0xAC29, - 0x8155, 0xAC2A, 0x8156, 0xAC2B, 0x8157, 0xAC2E, 0x8158, 0xAC32, - 0x8159, 0xAC33, 0x815A, 0xAC34, 0x8161, 0xAC35, 0x8162, 0xAC36, - 0x8163, 0xAC37, 0x8164, 0xAC3A, 0x8165, 0xAC3B, 0x8166, 0xAC3D, - 0x8167, 0xAC3E, 0x8168, 0xAC3F, 0x8169, 0xAC41, 0x816A, 0xAC42, - 0x816B, 0xAC43, 0x816C, 0xAC44, 0x816D, 0xAC45, 0x816E, 0xAC46, - 0x816F, 0xAC47, 0x8170, 0xAC48, 0x8171, 0xAC49, 0x8172, 0xAC4A, - 0x8173, 0xAC4C, 0x8174, 0xAC4E, 0x8175, 0xAC4F, 0x8176, 0xAC50, - 0x8177, 0xAC51, 0x8178, 0xAC52, 0x8179, 0xAC53, 0x817A, 0xAC55, - 0x8181, 0xAC56, 0x8182, 0xAC57, 0x8183, 0xAC59, 0x8184, 0xAC5A, - 0x8185, 0xAC5B, 0x8186, 0xAC5D, 0x8187, 0xAC5E, 0x8188, 0xAC5F, - 0x8189, 0xAC60, 0x818A, 0xAC61, 0x818B, 0xAC62, 0x818C, 0xAC63, - 0x818D, 0xAC64, 0x818E, 0xAC65, 0x818F, 0xAC66, 0x8190, 0xAC67, - 0x8191, 0xAC68, 0x8192, 0xAC69, 0x8193, 0xAC6A, 0x8194, 0xAC6B, - 0x8195, 0xAC6C, 0x8196, 0xAC6D, 0x8197, 0xAC6E, 0x8198, 0xAC6F, - 0x8199, 0xAC72, 0x819A, 0xAC73, 0x819B, 0xAC75, 0x819C, 0xAC76, - 0x819D, 0xAC79, 0x819E, 0xAC7B, 0x819F, 0xAC7C, 0x81A0, 0xAC7D, - 0x81A1, 0xAC7E, 0x81A2, 0xAC7F, 0x81A3, 0xAC82, 0x81A4, 0xAC87, - 0x81A5, 0xAC88, 0x81A6, 0xAC8D, 0x81A7, 0xAC8E, 0x81A8, 0xAC8F, - 0x81A9, 0xAC91, 0x81AA, 0xAC92, 0x81AB, 0xAC93, 0x81AC, 0xAC95, - 0x81AD, 0xAC96, 0x81AE, 0xAC97, 0x81AF, 0xAC98, 0x81B0, 0xAC99, - 0x81B1, 0xAC9A, 0x81B2, 0xAC9B, 0x81B3, 0xAC9E, 0x81B4, 0xACA2, - 0x81B5, 0xACA3, 0x81B6, 0xACA4, 0x81B7, 0xACA5, 0x81B8, 0xACA6, - 0x81B9, 0xACA7, 0x81BA, 0xACAB, 0x81BB, 0xACAD, 0x81BC, 0xACAE, - 0x81BD, 0xACB1, 0x81BE, 0xACB2, 0x81BF, 0xACB3, 0x81C0, 0xACB4, - 0x81C1, 0xACB5, 0x81C2, 0xACB6, 0x81C3, 0xACB7, 0x81C4, 0xACBA, - 0x81C5, 0xACBE, 0x81C6, 0xACBF, 0x81C7, 0xACC0, 0x81C8, 0xACC2, - 0x81C9, 0xACC3, 0x81CA, 0xACC5, 0x81CB, 0xACC6, 0x81CC, 0xACC7, - 0x81CD, 0xACC9, 0x81CE, 0xACCA, 0x81CF, 0xACCB, 0x81D0, 0xACCD, - 0x81D1, 0xACCE, 0x81D2, 0xACCF, 0x81D3, 0xACD0, 0x81D4, 0xACD1, - 0x81D5, 0xACD2, 0x81D6, 0xACD3, 0x81D7, 0xACD4, 0x81D8, 0xACD6, - 0x81D9, 0xACD8, 0x81DA, 0xACD9, 0x81DB, 0xACDA, 0x81DC, 0xACDB, - 0x81DD, 0xACDC, 0x81DE, 0xACDD, 0x81DF, 0xACDE, 0x81E0, 0xACDF, - 0x81E1, 0xACE2, 0x81E2, 0xACE3, 0x81E3, 0xACE5, 0x81E4, 0xACE6, - 0x81E5, 0xACE9, 0x81E6, 0xACEB, 0x81E7, 0xACED, 0x81E8, 0xACEE, - 0x81E9, 0xACF2, 0x81EA, 0xACF4, 0x81EB, 0xACF7, 0x81EC, 0xACF8, - 0x81ED, 0xACF9, 0x81EE, 0xACFA, 0x81EF, 0xACFB, 0x81F0, 0xACFE, - 0x81F1, 0xACFF, 0x81F2, 0xAD01, 0x81F3, 0xAD02, 0x81F4, 0xAD03, - 0x81F5, 0xAD05, 0x81F6, 0xAD07, 0x81F7, 0xAD08, 0x81F8, 0xAD09, - 0x81F9, 0xAD0A, 0x81FA, 0xAD0B, 0x81FB, 0xAD0E, 0x81FC, 0xAD10, - 0x81FD, 0xAD12, 0x81FE, 0xAD13, 0x8241, 0xAD14, 0x8242, 0xAD15, - 0x8243, 0xAD16, 0x8244, 0xAD17, 0x8245, 0xAD19, 0x8246, 0xAD1A, - 0x8247, 0xAD1B, 0x8248, 0xAD1D, 0x8249, 0xAD1E, 0x824A, 0xAD1F, - 0x824B, 0xAD21, 0x824C, 0xAD22, 0x824D, 0xAD23, 0x824E, 0xAD24, - 0x824F, 0xAD25, 0x8250, 0xAD26, 0x8251, 0xAD27, 0x8252, 0xAD28, - 0x8253, 0xAD2A, 0x8254, 0xAD2B, 0x8255, 0xAD2E, 0x8256, 0xAD2F, - 0x8257, 0xAD30, 0x8258, 0xAD31, 0x8259, 0xAD32, 0x825A, 0xAD33, - 0x8261, 0xAD36, 0x8262, 0xAD37, 0x8263, 0xAD39, 0x8264, 0xAD3A, - 0x8265, 0xAD3B, 0x8266, 0xAD3D, 0x8267, 0xAD3E, 0x8268, 0xAD3F, - 0x8269, 0xAD40, 0x826A, 0xAD41, 0x826B, 0xAD42, 0x826C, 0xAD43, - 0x826D, 0xAD46, 0x826E, 0xAD48, 0x826F, 0xAD4A, 0x8270, 0xAD4B, - 0x8271, 0xAD4C, 0x8272, 0xAD4D, 0x8273, 0xAD4E, 0x8274, 0xAD4F, - 0x8275, 0xAD51, 0x8276, 0xAD52, 0x8277, 0xAD53, 0x8278, 0xAD55, - 0x8279, 0xAD56, 0x827A, 0xAD57, 0x8281, 0xAD59, 0x8282, 0xAD5A, - 0x8283, 0xAD5B, 0x8284, 0xAD5C, 0x8285, 0xAD5D, 0x8286, 0xAD5E, - 0x8287, 0xAD5F, 0x8288, 0xAD60, 0x8289, 0xAD62, 0x828A, 0xAD64, - 0x828B, 0xAD65, 0x828C, 0xAD66, 0x828D, 0xAD67, 0x828E, 0xAD68, - 0x828F, 0xAD69, 0x8290, 0xAD6A, 0x8291, 0xAD6B, 0x8292, 0xAD6E, - 0x8293, 0xAD6F, 0x8294, 0xAD71, 0x8295, 0xAD72, 0x8296, 0xAD77, - 0x8297, 0xAD78, 0x8298, 0xAD79, 0x8299, 0xAD7A, 0x829A, 0xAD7E, - 0x829B, 0xAD80, 0x829C, 0xAD83, 0x829D, 0xAD84, 0x829E, 0xAD85, - 0x829F, 0xAD86, 0x82A0, 0xAD87, 0x82A1, 0xAD8A, 0x82A2, 0xAD8B, - 0x82A3, 0xAD8D, 0x82A4, 0xAD8E, 0x82A5, 0xAD8F, 0x82A6, 0xAD91, - 0x82A7, 0xAD92, 0x82A8, 0xAD93, 0x82A9, 0xAD94, 0x82AA, 0xAD95, - 0x82AB, 0xAD96, 0x82AC, 0xAD97, 0x82AD, 0xAD98, 0x82AE, 0xAD99, - 0x82AF, 0xAD9A, 0x82B0, 0xAD9B, 0x82B1, 0xAD9E, 0x82B2, 0xAD9F, - 0x82B3, 0xADA0, 0x82B4, 0xADA1, 0x82B5, 0xADA2, 0x82B6, 0xADA3, - 0x82B7, 0xADA5, 0x82B8, 0xADA6, 0x82B9, 0xADA7, 0x82BA, 0xADA8, - 0x82BB, 0xADA9, 0x82BC, 0xADAA, 0x82BD, 0xADAB, 0x82BE, 0xADAC, - 0x82BF, 0xADAD, 0x82C0, 0xADAE, 0x82C1, 0xADAF, 0x82C2, 0xADB0, - 0x82C3, 0xADB1, 0x82C4, 0xADB2, 0x82C5, 0xADB3, 0x82C6, 0xADB4, - 0x82C7, 0xADB5, 0x82C8, 0xADB6, 0x82C9, 0xADB8, 0x82CA, 0xADB9, - 0x82CB, 0xADBA, 0x82CC, 0xADBB, 0x82CD, 0xADBC, 0x82CE, 0xADBD, - 0x82CF, 0xADBE, 0x82D0, 0xADBF, 0x82D1, 0xADC2, 0x82D2, 0xADC3, - 0x82D3, 0xADC5, 0x82D4, 0xADC6, 0x82D5, 0xADC7, 0x82D6, 0xADC9, - 0x82D7, 0xADCA, 0x82D8, 0xADCB, 0x82D9, 0xADCC, 0x82DA, 0xADCD, - 0x82DB, 0xADCE, 0x82DC, 0xADCF, 0x82DD, 0xADD2, 0x82DE, 0xADD4, - 0x82DF, 0xADD5, 0x82E0, 0xADD6, 0x82E1, 0xADD7, 0x82E2, 0xADD8, - 0x82E3, 0xADD9, 0x82E4, 0xADDA, 0x82E5, 0xADDB, 0x82E6, 0xADDD, - 0x82E7, 0xADDE, 0x82E8, 0xADDF, 0x82E9, 0xADE1, 0x82EA, 0xADE2, - 0x82EB, 0xADE3, 0x82EC, 0xADE5, 0x82ED, 0xADE6, 0x82EE, 0xADE7, - 0x82EF, 0xADE8, 0x82F0, 0xADE9, 0x82F1, 0xADEA, 0x82F2, 0xADEB, - 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0xF8D5, 0x5703, 0xF8D6, 0x5E03, 0xF8D7, 0x6016, 0xF8D8, 0x629B, - 0xF8D9, 0x62B1, 0xF8DA, 0x6355, 0xF8DB, 0xFA06, 0xF8DC, 0x6CE1, - 0xF8DD, 0x6D66, 0xF8DE, 0x75B1, 0xF8DF, 0x7832, 0xF8E0, 0x80DE, - 0xF8E1, 0x812F, 0xF8E2, 0x82DE, 0xF8E3, 0x8461, 0xF8E4, 0x84B2, - 0xF8E5, 0x888D, 0xF8E6, 0x8912, 0xF8E7, 0x900B, 0xF8E8, 0x92EA, - 0xF8E9, 0x98FD, 0xF8EA, 0x9B91, 0xF8EB, 0x5E45, 0xF8EC, 0x66B4, - 0xF8ED, 0x66DD, 0xF8EE, 0x7011, 0xF8EF, 0x7206, 0xF8F0, 0xFA07, - 0xF8F1, 0x4FF5, 0xF8F2, 0x527D, 0xF8F3, 0x5F6A, 0xF8F4, 0x6153, - 0xF8F5, 0x6753, 0xF8F6, 0x6A19, 0xF8F7, 0x6F02, 0xF8F8, 0x74E2, - 0xF8F9, 0x7968, 0xF8FA, 0x8868, 0xF8FB, 0x8C79, 0xF8FC, 0x98C7, - 0xF8FD, 0x98C4, 0xF8FE, 0x9A43, 0xF9A1, 0x54C1, 0xF9A2, 0x7A1F, - 0xF9A3, 0x6953, 0xF9A4, 0x8AF7, 0xF9A5, 0x8C4A, 0xF9A6, 0x98A8, - 0xF9A7, 0x99AE, 0xF9A8, 0x5F7C, 0xF9A9, 0x62AB, 0xF9AA, 0x75B2, - 0xF9AB, 0x76AE, 0xF9AC, 0x88AB, 0xF9AD, 0x907F, 0xF9AE, 0x9642, - 0xF9AF, 0x5339, 0xF9B0, 0x5F3C, 0xF9B1, 0x5FC5, 0xF9B2, 0x6CCC, - 0xF9B3, 0x73CC, 0xF9B4, 0x7562, 0xF9B5, 0x758B, 0xF9B6, 0x7B46, - 0xF9B7, 0x82FE, 0xF9B8, 0x999D, 0xF9B9, 0x4E4F, 0xF9BA, 0x903C, - 0xF9BB, 0x4E0B, 0xF9BC, 0x4F55, 0xF9BD, 0x53A6, 0xF9BE, 0x590F, - 0xF9BF, 0x5EC8, 0xF9C0, 0x6630, 0xF9C1, 0x6CB3, 0xF9C2, 0x7455, - 0xF9C3, 0x8377, 0xF9C4, 0x8766, 0xF9C5, 0x8CC0, 0xF9C6, 0x9050, - 0xF9C7, 0x971E, 0xF9C8, 0x9C15, 0xF9C9, 0x58D1, 0xF9CA, 0x5B78, - 0xF9CB, 0x8650, 0xF9CC, 0x8B14, 0xF9CD, 0x9DB4, 0xF9CE, 0x5BD2, - 0xF9CF, 0x6068, 0xF9D0, 0x608D, 0xF9D1, 0x65F1, 0xF9D2, 0x6C57, - 0xF9D3, 0x6F22, 0xF9D4, 0x6FA3, 0xF9D5, 0x701A, 0xF9D6, 0x7F55, - 0xF9D7, 0x7FF0, 0xF9D8, 0x9591, 0xF9D9, 0x9592, 0xF9DA, 0x9650, - 0xF9DB, 0x97D3, 0xF9DC, 0x5272, 0xF9DD, 0x8F44, 0xF9DE, 0x51FD, - 0xF9DF, 0x542B, 0xF9E0, 0x54B8, 0xF9E1, 0x5563, 0xF9E2, 0x558A, - 0xF9E3, 0x6ABB, 0xF9E4, 0x6DB5, 0xF9E5, 0x7DD8, 0xF9E6, 0x8266, - 0xF9E7, 0x929C, 0xF9E8, 0x9677, 0xF9E9, 0x9E79, 0xF9EA, 0x5408, - 0xF9EB, 0x54C8, 0xF9EC, 0x76D2, 0xF9ED, 0x86E4, 0xF9EE, 0x95A4, - 0xF9EF, 0x95D4, 0xF9F0, 0x965C, 0xF9F1, 0x4EA2, 0xF9F2, 0x4F09, - 0xF9F3, 0x59EE, 0xF9F4, 0x5AE6, 0xF9F5, 0x5DF7, 0xF9F6, 0x6052, - 0xF9F7, 0x6297, 0xF9F8, 0x676D, 0xF9F9, 0x6841, 0xF9FA, 0x6C86, - 0xF9FB, 0x6E2F, 0xF9FC, 0x7F38, 0xF9FD, 0x809B, 0xF9FE, 0x822A, - 0xFAA1, 0xFA08, 0xFAA2, 0xFA09, 0xFAA3, 0x9805, 0xFAA4, 0x4EA5, - 0xFAA5, 0x5055, 0xFAA6, 0x54B3, 0xFAA7, 0x5793, 0xFAA8, 0x595A, - 0xFAA9, 0x5B69, 0xFAAA, 0x5BB3, 0xFAAB, 0x61C8, 0xFAAC, 0x6977, - 0xFAAD, 0x6D77, 0xFAAE, 0x7023, 0xFAAF, 0x87F9, 0xFAB0, 0x89E3, - 0xFAB1, 0x8A72, 0xFAB2, 0x8AE7, 0xFAB3, 0x9082, 0xFAB4, 0x99ED, - 0xFAB5, 0x9AB8, 0xFAB6, 0x52BE, 0xFAB7, 0x6838, 0xFAB8, 0x5016, - 0xFAB9, 0x5E78, 0xFABA, 0x674F, 0xFABB, 0x8347, 0xFABC, 0x884C, - 0xFABD, 0x4EAB, 0xFABE, 0x5411, 0xFABF, 0x56AE, 0xFAC0, 0x73E6, - 0xFAC1, 0x9115, 0xFAC2, 0x97FF, 0xFAC3, 0x9909, 0xFAC4, 0x9957, - 0xFAC5, 0x9999, 0xFAC6, 0x5653, 0xFAC7, 0x589F, 0xFAC8, 0x865B, - 0xFAC9, 0x8A31, 0xFACA, 0x61B2, 0xFACB, 0x6AF6, 0xFACC, 0x737B, - 0xFACD, 0x8ED2, 0xFACE, 0x6B47, 0xFACF, 0x96AA, 0xFAD0, 0x9A57, - 0xFAD1, 0x5955, 0xFAD2, 0x7200, 0xFAD3, 0x8D6B, 0xFAD4, 0x9769, - 0xFAD5, 0x4FD4, 0xFAD6, 0x5CF4, 0xFAD7, 0x5F26, 0xFAD8, 0x61F8, - 0xFAD9, 0x665B, 0xFADA, 0x6CEB, 0xFADB, 0x70AB, 0xFADC, 0x7384, - 0xFADD, 0x73B9, 0xFADE, 0x73FE, 0xFADF, 0x7729, 0xFAE0, 0x774D, - 0xFAE1, 0x7D43, 0xFAE2, 0x7D62, 0xFAE3, 0x7E23, 0xFAE4, 0x8237, - 0xFAE5, 0x8852, 0xFAE6, 0xFA0A, 0xFAE7, 0x8CE2, 0xFAE8, 0x9249, - 0xFAE9, 0x986F, 0xFAEA, 0x5B51, 0xFAEB, 0x7A74, 0xFAEC, 0x8840, - 0xFAED, 0x9801, 0xFAEE, 0x5ACC, 0xFAEF, 0x4FE0, 0xFAF0, 0x5354, - 0xFAF1, 0x593E, 0xFAF2, 0x5CFD, 0xFAF3, 0x633E, 0xFAF4, 0x6D79, - 0xFAF5, 0x72F9, 0xFAF6, 0x8105, 0xFAF7, 0x8107, 0xFAF8, 0x83A2, - 0xFAF9, 0x92CF, 0xFAFA, 0x9830, 0xFAFB, 0x4EA8, 0xFAFC, 0x5144, - 0xFAFD, 0x5211, 0xFAFE, 0x578B, 0xFBA1, 0x5F62, 0xFBA2, 0x6CC2, - 0xFBA3, 0x6ECE, 0xFBA4, 0x7005, 0xFBA5, 0x7050, 0xFBA6, 0x70AF, - 0xFBA7, 0x7192, 0xFBA8, 0x73E9, 0xFBA9, 0x7469, 0xFBAA, 0x834A, - 0xFBAB, 0x87A2, 0xFBAC, 0x8861, 0xFBAD, 0x9008, 0xFBAE, 0x90A2, - 0xFBAF, 0x93A3, 0xFBB0, 0x99A8, 0xFBB1, 0x516E, 0xFBB2, 0x5F57, - 0xFBB3, 0x60E0, 0xFBB4, 0x6167, 0xFBB5, 0x66B3, 0xFBB6, 0x8559, - 0xFBB7, 0x8E4A, 0xFBB8, 0x91AF, 0xFBB9, 0x978B, 0xFBBA, 0x4E4E, - 0xFBBB, 0x4E92, 0xFBBC, 0x547C, 0xFBBD, 0x58D5, 0xFBBE, 0x58FA, - 0xFBBF, 0x597D, 0xFBC0, 0x5CB5, 0xFBC1, 0x5F27, 0xFBC2, 0x6236, - 0xFBC3, 0x6248, 0xFBC4, 0x660A, 0xFBC5, 0x6667, 0xFBC6, 0x6BEB, - 0xFBC7, 0x6D69, 0xFBC8, 0x6DCF, 0xFBC9, 0x6E56, 0xFBCA, 0x6EF8, - 0xFBCB, 0x6F94, 0xFBCC, 0x6FE0, 0xFBCD, 0x6FE9, 0xFBCE, 0x705D, - 0xFBCF, 0x72D0, 0xFBD0, 0x7425, 0xFBD1, 0x745A, 0xFBD2, 0x74E0, - 0xFBD3, 0x7693, 0xFBD4, 0x795C, 0xFBD5, 0x7CCA, 0xFBD6, 0x7E1E, - 0xFBD7, 0x80E1, 0xFBD8, 0x82A6, 0xFBD9, 0x846B, 0xFBDA, 0x84BF, - 0xFBDB, 0x864E, 0xFBDC, 0x865F, 0xFBDD, 0x8774, 0xFBDE, 0x8B77, - 0xFBDF, 0x8C6A, 0xFBE0, 0x93AC, 0xFBE1, 0x9800, 0xFBE2, 0x9865, - 0xFBE3, 0x60D1, 0xFBE4, 0x6216, 0xFBE5, 0x9177, 0xFBE6, 0x5A5A, - 0xFBE7, 0x660F, 0xFBE8, 0x6DF7, 0xFBE9, 0x6E3E, 0xFBEA, 0x743F, - 0xFBEB, 0x9B42, 0xFBEC, 0x5FFD, 0xFBED, 0x60DA, 0xFBEE, 0x7B0F, - 0xFBEF, 0x54C4, 0xFBF0, 0x5F18, 0xFBF1, 0x6C5E, 0xFBF2, 0x6CD3, - 0xFBF3, 0x6D2A, 0xFBF4, 0x70D8, 0xFBF5, 0x7D05, 0xFBF6, 0x8679, - 0xFBF7, 0x8A0C, 0xFBF8, 0x9D3B, 0xFBF9, 0x5316, 0xFBFA, 0x548C, - 0xFBFB, 0x5B05, 0xFBFC, 0x6A3A, 0xFBFD, 0x706B, 0xFBFE, 0x7575, - 0xFCA1, 0x798D, 0xFCA2, 0x79BE, 0xFCA3, 0x82B1, 0xFCA4, 0x83EF, - 0xFCA5, 0x8A71, 0xFCA6, 0x8B41, 0xFCA7, 0x8CA8, 0xFCA8, 0x9774, - 0xFCA9, 0xFA0B, 0xFCAA, 0x64F4, 0xFCAB, 0x652B, 0xFCAC, 0x78BA, - 0xFCAD, 0x78BB, 0xFCAE, 0x7A6B, 0xFCAF, 0x4E38, 0xFCB0, 0x559A, - 0xFCB1, 0x5950, 0xFCB2, 0x5BA6, 0xFCB3, 0x5E7B, 0xFCB4, 0x60A3, - 0xFCB5, 0x63DB, 0xFCB6, 0x6B61, 0xFCB7, 0x6665, 0xFCB8, 0x6853, - 0xFCB9, 0x6E19, 0xFCBA, 0x7165, 0xFCBB, 0x74B0, 0xFCBC, 0x7D08, - 0xFCBD, 0x9084, 0xFCBE, 0x9A69, 0xFCBF, 0x9C25, 0xFCC0, 0x6D3B, - 0xFCC1, 0x6ED1, 0xFCC2, 0x733E, 0xFCC3, 0x8C41, 0xFCC4, 0x95CA, - 0xFCC5, 0x51F0, 0xFCC6, 0x5E4C, 0xFCC7, 0x5FA8, 0xFCC8, 0x604D, - 0xFCC9, 0x60F6, 0xFCCA, 0x6130, 0xFCCB, 0x614C, 0xFCCC, 0x6643, - 0xFCCD, 0x6644, 0xFCCE, 0x69A5, 0xFCCF, 0x6CC1, 0xFCD0, 0x6E5F, - 0xFCD1, 0x6EC9, 0xFCD2, 0x6F62, 0xFCD3, 0x714C, 0xFCD4, 0x749C, - 0xFCD5, 0x7687, 0xFCD6, 0x7BC1, 0xFCD7, 0x7C27, 0xFCD8, 0x8352, - 0xFCD9, 0x8757, 0xFCDA, 0x9051, 0xFCDB, 0x968D, 0xFCDC, 0x9EC3, - 0xFCDD, 0x532F, 0xFCDE, 0x56DE, 0xFCDF, 0x5EFB, 0xFCE0, 0x5F8A, - 0xFCE1, 0x6062, 0xFCE2, 0x6094, 0xFCE3, 0x61F7, 0xFCE4, 0x6666, - 0xFCE5, 0x6703, 0xFCE6, 0x6A9C, 0xFCE7, 0x6DEE, 0xFCE8, 0x6FAE, - 0xFCE9, 0x7070, 0xFCEA, 0x736A, 0xFCEB, 0x7E6A, 0xFCEC, 0x81BE, - 0xFCED, 0x8334, 0xFCEE, 0x86D4, 0xFCEF, 0x8AA8, 0xFCF0, 0x8CC4, - 0xFCF1, 0x5283, 0xFCF2, 0x7372, 0xFCF3, 0x5B96, 0xFCF4, 0x6A6B, - 0xFCF5, 0x9404, 0xFCF6, 0x54EE, 0xFCF7, 0x5686, 0xFCF8, 0x5B5D, - 0xFCF9, 0x6548, 0xFCFA, 0x6585, 0xFCFB, 0x66C9, 0xFCFC, 0x689F, - 0xFCFD, 0x6D8D, 0xFCFE, 0x6DC6, 0xFDA1, 0x723B, 0xFDA2, 0x80B4, - 0xFDA3, 0x9175, 0xFDA4, 0x9A4D, 0xFDA5, 0x4FAF, 0xFDA6, 0x5019, - 0xFDA7, 0x539A, 0xFDA8, 0x540E, 0xFDA9, 0x543C, 0xFDAA, 0x5589, - 0xFDAB, 0x55C5, 0xFDAC, 0x5E3F, 0xFDAD, 0x5F8C, 0xFDAE, 0x673D, - 0xFDAF, 0x7166, 0xFDB0, 0x73DD, 0xFDB1, 0x9005, 0xFDB2, 0x52DB, - 0xFDB3, 0x52F3, 0xFDB4, 0x5864, 0xFDB5, 0x58CE, 0xFDB6, 0x7104, - 0xFDB7, 0x718F, 0xFDB8, 0x71FB, 0xFDB9, 0x85B0, 0xFDBA, 0x8A13, - 0xFDBB, 0x6688, 0xFDBC, 0x85A8, 0xFDBD, 0x55A7, 0xFDBE, 0x6684, - 0xFDBF, 0x714A, 0xFDC0, 0x8431, 0xFDC1, 0x5349, 0xFDC2, 0x5599, - 0xFDC3, 0x6BC1, 0xFDC4, 0x5F59, 0xFDC5, 0x5FBD, 0xFDC6, 0x63EE, - 0xFDC7, 0x6689, 0xFDC8, 0x7147, 0xFDC9, 0x8AF1, 0xFDCA, 0x8F1D, - 0xFDCB, 0x9EBE, 0xFDCC, 0x4F11, 0xFDCD, 0x643A, 0xFDCE, 0x70CB, - 0xFDCF, 0x7566, 0xFDD0, 0x8667, 0xFDD1, 0x6064, 0xFDD2, 0x8B4E, - 0xFDD3, 0x9DF8, 0xFDD4, 0x5147, 0xFDD5, 0x51F6, 0xFDD6, 0x5308, - 0xFDD7, 0x6D36, 0xFDD8, 0x80F8, 0xFDD9, 0x9ED1, 0xFDDA, 0x6615, - 0xFDDB, 0x6B23, 0xFDDC, 0x7098, 0xFDDD, 0x75D5, 0xFDDE, 0x5403, - 0xFDDF, 0x5C79, 0xFDE0, 0x7D07, 0xFDE1, 0x8A16, 0xFDE2, 0x6B20, - 0xFDE3, 0x6B3D, 0xFDE4, 0x6B46, 0xFDE5, 0x5438, 0xFDE6, 0x6070, - 0xFDE7, 0x6D3D, 0xFDE8, 0x7FD5, 0xFDE9, 0x8208, 0xFDEA, 0x50D6, - 0xFDEB, 0x51DE, 0xFDEC, 0x559C, 0xFDED, 0x566B, 0xFDEE, 0x56CD, - 0xFDEF, 0x59EC, 0xFDF0, 0x5B09, 0xFDF1, 0x5E0C, 0xFDF2, 0x6199, - 0xFDF3, 0x6198, 0xFDF4, 0x6231, 0xFDF5, 0x665E, 0xFDF6, 0x66E6, - 0xFDF7, 0x7199, 0xFDF8, 0x71B9, 0xFDF9, 0x71BA, 0xFDFA, 0x72A7, - 0xFDFB, 0x79A7, 0xFDFC, 0x7A00, 0xFDFD, 0x7FB2, 0xFDFE, 0x8A70, - 0, 0 -}; - - - -WCHAR ff_convert ( /* Converted code, 0 means conversion error */ - WCHAR src, /* Character code to be converted */ - UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ -) -{ - const WCHAR *p; - WCHAR c; - int i, n, li, hi; - - - if (src < 0x80) { /* ASCII */ - c = src; - } else { - if (dir) { /* OEMCP to unicode */ - p = oem2uni; - hi = sizeof(oem2uni) / 4 - 1; - } else { /* Unicode to OEMCP */ - p = uni2oem; - hi = sizeof(uni2oem) / 4 - 1; - } - li = 0; - for (n = 16; n; n--) { - i = li + (hi - li) / 2; - if (src == p[i * 2]) break; - if (src > p[i * 2]) - li = i; - else - hi = i; - } - c = n ? p[i * 2 + 1] : 0; - } - - return c; -} - - - - -WCHAR ff_wtoupper ( /* Upper converted character */ - WCHAR chr /* Input character */ -) -{ - static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 }; - static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 }; - int i; - - - for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ; - - return tbl_lower[i] ? tbl_upper[i] : chr; -} diff --git a/fs/cc950.c b/fs/cc950.c deleted file mode 100644 index f004129..0000000 --- a/fs/cc950.c +++ /dev/null @@ -1,6829 +0,0 @@ -/*------------------------------------------------------------------------*/ -/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ -/* */ -/* CP950 (Traditional Chinese Big5) */ -/*------------------------------------------------------------------------*/ - -#include - - -#if !_USE_LFN || _CODE_PAGE != 950 -#error This file is not needed in current configuration. Remove from the project. -#endif - - -static -const WCHAR uni2oem[] = { -/* Unicode - OEM, Unicode - OEM, Unicode - OEM, Unicode - OEM */ - 0x00A7, 0xA1B1, 0x00AF, 0xA1C2, 0x00B0, 0xA258, 0x00B1, 0xA1D3, - 0x00B7, 0xA150, 0x00D7, 0xA1D1, 0x00F7, 0xA1D2, 0x02C7, 0xA3BE, - 0x02C9, 0xA3BC, 0x02CA, 0xA3BD, 0x02CB, 0xA3BF, 0x02CD, 0xA1C5, - 0x02D9, 0xA3BB, 0x0391, 0xA344, 0x0392, 0xA345, 0x0393, 0xA346, - 0x0394, 0xA347, 0x0395, 0xA348, 0x0396, 0xA349, 0x0397, 0xA34A, - 0x0398, 0xA34B, 0x0399, 0xA34C, 0x039A, 0xA34D, 0x039B, 0xA34E, - 0x039C, 0xA34F, 0x039D, 0xA350, 0x039E, 0xA351, 0x039F, 0xA352, - 0x03A0, 0xA353, 0x03A1, 0xA354, 0x03A3, 0xA355, 0x03A4, 0xA356, - 0x03A5, 0xA357, 0x03A6, 0xA358, 0x03A7, 0xA359, 0x03A8, 0xA35A, - 0x03A9, 0xA35B, 0x03B1, 0xA35C, 0x03B2, 0xA35D, 0x03B3, 0xA35E, - 0x03B4, 0xA35F, 0x03B5, 0xA360, 0x03B6, 0xA361, 0x03B7, 0xA362, - 0x03B8, 0xA363, 0x03B9, 0xA364, 0x03BA, 0xA365, 0x03BB, 0xA366, - 0x03BC, 0xA367, 0x03BD, 0xA368, 0x03BE, 0xA369, 0x03BF, 0xA36A, - 0x03C0, 0xA36B, 0x03C1, 0xA36C, 0x03C3, 0xA36D, 0x03C4, 0xA36E, - 0x03C5, 0xA36F, 0x03C6, 0xA370, 0x03C7, 0xA371, 0x03C8, 0xA372, - 0x03C9, 0xA373, 0x2013, 0xA156, 0x2014, 0xA158, 0x2018, 0xA1A5, - 0x2019, 0xA1A6, 0x201C, 0xA1A7, 0x201D, 0xA1A8, 0x2025, 0xA14C, - 0x2026, 0xA14B, 0x2027, 0xA145, 0x2032, 0xA1AC, 0x2035, 0xA1AB, - 0x203B, 0xA1B0, 0x20AC, 0xA3E1, 0x2103, 0xA24A, 0x2105, 0xA1C1, - 0x2109, 0xA24B, 0x2160, 0xA2B9, 0x2161, 0xA2BA, 0x2162, 0xA2BB, - 0x2163, 0xA2BC, 0x2164, 0xA2BD, 0x2165, 0xA2BE, 0x2166, 0xA2BF, - 0x2167, 0xA2C0, 0x2168, 0xA2C1, 0x2169, 0xA2C2, 0x2190, 0xA1F6, - 0x2191, 0xA1F4, 0x2192, 0xA1F7, 0x2193, 0xA1F5, 0x2196, 0xA1F8, - 0x2197, 0xA1F9, 0x2198, 0xA1FB, 0x2199, 0xA1FA, 0x2215, 0xA241, - 0x221A, 0xA1D4, 0x221E, 0xA1DB, 0x221F, 0xA1E8, 0x2220, 0xA1E7, - 0x2223, 0xA1FD, 0x2225, 0xA1FC, 0x2229, 0xA1E4, 0x222A, 0xA1E5, - 0x222B, 0xA1EC, 0x222E, 0xA1ED, 0x2234, 0xA1EF, 0x2235, 0xA1EE, - 0x2252, 0xA1DC, 0x2260, 0xA1DA, 0x2261, 0xA1DD, 0x2266, 0xA1D8, - 0x2267, 0xA1D9, 0x2295, 0xA1F2, 0x2299, 0xA1F3, 0x22A5, 0xA1E6, - 0x22BF, 0xA1E9, 0x2500, 0xA277, 0x2502, 0xA278, 0x250C, 0xA27A, - 0x2510, 0xA27B, 0x2514, 0xA27C, 0x2518, 0xA27D, 0x251C, 0xA275, - 0x2524, 0xA274, 0x252C, 0xA273, 0x2534, 0xA272, 0x253C, 0xA271, - 0x2550, 0xA2A4, 0x2550, 0xF9F9, 0x2551, 0xF9F8, 0x2552, 0xF9E6, - 0x2553, 0xF9EF, 0x2554, 0xF9DD, 0x2555, 0xF9E8, 0x2556, 0xF9F1, - 0x2557, 0xF9DF, 0x2558, 0xF9EC, 0x2559, 0xF9F5, 0x255A, 0xF9E3, - 0x255B, 0xF9EE, 0x255C, 0xF9F7, 0x255D, 0xF9E5, 0x255E, 0xA2A5, - 0x255E, 0xF9E9, 0x255F, 0xF9F2, 0x2560, 0xF9E0, 0x2561, 0xA2A7, - 0x2561, 0xF9EB, 0x2562, 0xF9F4, 0x2563, 0xF9E2, 0x2564, 0xF9E7, - 0x2565, 0xF9F0, 0x2566, 0xF9DE, 0x2567, 0xF9ED, 0x2568, 0xF9F6, - 0x2569, 0xF9E4, 0x256A, 0xA2A6, 0x256A, 0xF9EA, 0x256B, 0xF9F3, - 0x256C, 0xF9E1, 0x256D, 0xA27E, 0x256D, 0xF9FA, 0x256E, 0xA2A1, - 0x256E, 0xF9FB, 0x256F, 0xA2A3, 0x256F, 0xF9FD, 0x2570, 0xA2A2, - 0x2570, 0xF9FC, 0x2571, 0xA2AC, 0x2572, 0xA2AD, 0x2573, 0xA2AE, - 0x2574, 0xA15A, 0x2581, 0xA262, 0x2582, 0xA263, 0x2583, 0xA264, - 0x2584, 0xA265, 0x2585, 0xA266, 0x2586, 0xA267, 0x2587, 0xA268, - 0x2588, 0xA269, 0x2589, 0xA270, 0x258A, 0xA26F, 0x258B, 0xA26E, - 0x258C, 0xA26D, 0x258D, 0xA26C, 0x258E, 0xA26B, 0x258F, 0xA26A, - 0x2593, 0xF9FE, 0x2594, 0xA276, 0x2595, 0xA279, 0x25A0, 0xA1BD, - 0x25A1, 0xA1BC, 0x25B2, 0xA1B6, 0x25B3, 0xA1B5, 0x25BC, 0xA1BF, - 0x25BD, 0xA1BE, 0x25C6, 0xA1BB, 0x25C7, 0xA1BA, 0x25CB, 0xA1B3, - 0x25CE, 0xA1B7, 0x25CF, 0xA1B4, 0x25E2, 0xA2A8, 0x25E3, 0xA2A9, - 0x25E4, 0xA2AB, 0x25E5, 0xA2AA, 0x2605, 0xA1B9, 0x2606, 0xA1B8, - 0x2640, 0xA1F0, 0x2642, 0xA1F1, 0x3000, 0xA140, 0x3001, 0xA142, - 0x3002, 0xA143, 0x3003, 0xA1B2, 0x3008, 0xA171, 0x3009, 0xA172, - 0x300A, 0xA16D, 0x300B, 0xA16E, 0x300C, 0xA175, 0x300D, 0xA176, - 0x300E, 0xA179, 0x300F, 0xA17A, 0x3010, 0xA169, 0x3011, 0xA16A, - 0x3012, 0xA245, 0x3014, 0xA165, 0x3015, 0xA166, 0x301D, 0xA1A9, - 0x301E, 0xA1AA, 0x3021, 0xA2C3, 0x3022, 0xA2C4, 0x3023, 0xA2C5, - 0x3024, 0xA2C6, 0x3025, 0xA2C7, 0x3026, 0xA2C8, 0x3027, 0xA2C9, - 0x3028, 0xA2CA, 0x3029, 0xA2CB, 0x3105, 0xA374, 0x3106, 0xA375, - 0x3107, 0xA376, 0x3108, 0xA377, 0x3109, 0xA378, 0x310A, 0xA379, - 0x310B, 0xA37A, 0x310C, 0xA37B, 0x310D, 0xA37C, 0x310E, 0xA37D, - 0x310F, 0xA37E, 0x3110, 0xA3A1, 0x3111, 0xA3A2, 0x3112, 0xA3A3, - 0x3113, 0xA3A4, 0x3114, 0xA3A5, 0x3115, 0xA3A6, 0x3116, 0xA3A7, - 0x3117, 0xA3A8, 0x3118, 0xA3A9, 0x3119, 0xA3AA, 0x311A, 0xA3AB, - 0x311B, 0xA3AC, 0x311C, 0xA3AD, 0x311D, 0xA3AE, 0x311E, 0xA3AF, - 0x311F, 0xA3B0, 0x3120, 0xA3B1, 0x3121, 0xA3B2, 0x3122, 0xA3B3, - 0x3123, 0xA3B4, 0x3124, 0xA3B5, 0x3125, 0xA3B6, 0x3126, 0xA3B7, - 0x3127, 0xA3B8, 0x3128, 0xA3B9, 0x3129, 0xA3BA, 0x32A3, 0xA1C0, - 0x338E, 0xA255, 0x338F, 0xA256, 0x339C, 0xA250, 0x339D, 0xA251, - 0x339E, 0xA252, 0x33A1, 0xA254, 0x33C4, 0xA257, 0x33CE, 0xA253, - 0x33D1, 0xA1EB, 0x33D2, 0xA1EA, 0x33D5, 0xA24F, 0x4E00, 0xA440, - 0x4E01, 0xA442, 0x4E03, 0xA443, 0x4E07, 0xC945, 0x4E08, 0xA456, - 0x4E09, 0xA454, 0x4E0A, 0xA457, 0x4E0B, 0xA455, 0x4E0C, 0xC946, - 0x4E0D, 0xA4A3, 0x4E0E, 0xC94F, 0x4E0F, 0xC94D, 0x4E10, 0xA4A2, - 0x4E11, 0xA4A1, 0x4E14, 0xA542, 0x4E15, 0xA541, 0x4E16, 0xA540, - 0x4E18, 0xA543, 0x4E19, 0xA4FE, 0x4E1E, 0xA5E0, 0x4E1F, 0xA5E1, - 0x4E26, 0xA8C3, 0x4E2B, 0xA458, 0x4E2D, 0xA4A4, 0x4E2E, 0xC950, - 0x4E30, 0xA4A5, 0x4E31, 0xC963, 0x4E32, 0xA6EA, 0x4E33, 0xCBB1, - 0x4E38, 0xA459, 0x4E39, 0xA4A6, 0x4E3B, 0xA544, 0x4E3C, 0xC964, - 0x4E42, 0xC940, 0x4E43, 0xA444, 0x4E45, 0xA45B, 0x4E47, 0xC947, - 0x4E48, 0xA45C, 0x4E4B, 0xA4A7, 0x4E4D, 0xA545, 0x4E4E, 0xA547, - 0x4E4F, 0xA546, 0x4E52, 0xA5E2, 0x4E53, 0xA5E3, 0x4E56, 0xA8C4, - 0x4E58, 0xADBC, 0x4E59, 0xA441, 0x4E5C, 0xC941, 0x4E5D, 0xA445, - 0x4E5E, 0xA45E, 0x4E5F, 0xA45D, 0x4E69, 0xA5E4, 0x4E73, 0xA8C5, - 0x4E7E, 0xB0AE, 0x4E7F, 0xD44B, 0x4E82, 0xB6C3, 0x4E83, 0xDCB1, - 0x4E84, 0xDCB2, 0x4E86, 0xA446, 0x4E88, 0xA4A9, 0x4E8B, 0xA8C6, - 0x4E8C, 0xA447, 0x4E8D, 0xC948, 0x4E8E, 0xA45F, 0x4E91, 0xA4AA, - 0x4E92, 0xA4AC, 0x4E93, 0xC951, 0x4E94, 0xA4AD, 0x4E95, 0xA4AB, - 0x4E99, 0xA5E5, 0x4E9B, 0xA8C7, 0x4E9E, 0xA8C8, 0x4E9F, 0xAB45, - 0x4EA1, 0xA460, 0x4EA2, 0xA4AE, 0x4EA4, 0xA5E6, 0x4EA5, 0xA5E8, - 0x4EA6, 0xA5E7, 0x4EA8, 0xA6EB, 0x4EAB, 0xA8C9, 0x4EAC, 0xA8CA, - 0x4EAD, 0xAB46, 0x4EAE, 0xAB47, 0x4EB3, 0xADBD, 0x4EB6, 0xDCB3, - 0x4EB9, 0xF6D6, 0x4EBA, 0xA448, 0x4EC0, 0xA4B0, 0x4EC1, 0xA4AF, - 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0x9D37, 0xEFA5, 0x9D38, 0xEF7D, 0x9D3B, 0xC245, 0x9D3D, 0xEFA7, - 0x9D3E, 0xEFA4, 0x9D3F, 0xC246, 0x9D40, 0xEFA6, 0x9D41, 0xEF77, - 0x9D42, 0xEFA2, 0x9D43, 0xEFA3, 0x9D45, 0xEFA1, 0x9D4A, 0xF1D2, - 0x9D4B, 0xF1D4, 0x9D4C, 0xF1D7, 0x9D4F, 0xF1D1, 0x9D51, 0xC359, - 0x9D52, 0xF1D9, 0x9D53, 0xF1D0, 0x9D54, 0xF1DA, 0x9D56, 0xF1D6, - 0x9D57, 0xF1D8, 0x9D58, 0xF1DC, 0x9D59, 0xF1D5, 0x9D5A, 0xF1DD, - 0x9D5B, 0xF1D3, 0x9D5C, 0xF1CF, 0x9D5D, 0xC35A, 0x9D5F, 0xF1DB, - 0x9D60, 0xC35B, 0x9D61, 0xC44D, 0x9D67, 0xEF78, 0x9D68, 0xF3F1, - 0x9D69, 0xF3E8, 0x9D6A, 0xC44F, 0x9D6B, 0xF3E4, 0x9D6C, 0xC450, - 0x9D6F, 0xF3ED, 0x9D70, 0xF3E7, 0x9D71, 0xF3DD, 0x9D72, 0xC44E, - 0x9D73, 0xF3EA, 0x9D74, 0xF3E5, 0x9D75, 0xF3E6, 0x9D77, 0xF3D8, - 0x9D78, 0xF3DF, 0x9D79, 0xF3EE, 0x9D7B, 0xF3EB, 0x9D7D, 0xF3E3, - 0x9D7F, 0xF3EF, 0x9D80, 0xF3DE, 0x9D81, 0xF3D9, 0x9D82, 0xF3EC, - 0x9D84, 0xF3DB, 0x9D85, 0xF3E9, 0x9D86, 0xF3E0, 0x9D87, 0xF3F0, - 0x9D88, 0xF3DC, 0x9D89, 0xC44C, 0x9D8A, 0xF3DA, 0x9D8B, 0xF3E1, - 0x9D8C, 0xF3E2, 0x9D90, 0xF57D, 0x9D92, 0xF57B, 0x9D94, 0xF5A2, - 0x9D96, 0xF5AE, 0x9D97, 0xF5A5, 0x9D98, 0xF57C, 0x9D99, 0xF578, - 0x9D9A, 0xF5A7, 0x9D9B, 0xF57E, 0x9D9C, 0xF5A3, 0x9D9D, 0xF57A, - 0x9D9E, 0xF5AA, 0x9D9F, 0xF577, 0x9DA0, 0xF5A1, 0x9DA1, 0xF5A6, - 0x9DA2, 0xF5A8, 0x9DA3, 0xF5AB, 0x9DA4, 0xF579, 0x9DA6, 0xF5AF, - 0x9DA7, 0xF5B0, 0x9DA8, 0xF5A9, 0x9DA9, 0xF5AD, 0x9DAA, 0xF5A4, - 0x9DAC, 0xF6C1, 0x9DAD, 0xF6C4, 0x9DAF, 0xC561, 0x9DB1, 0xF6C3, - 0x9DB2, 0xF6C8, 0x9DB3, 0xF6C6, 0x9DB4, 0xC562, 0x9DB5, 0xF6BD, - 0x9DB6, 0xF6B3, 0x9DB7, 0xF6B2, 0x9DB8, 0xC564, 0x9DB9, 0xF6BF, - 0x9DBA, 0xF6C0, 0x9DBB, 0xF6BC, 0x9DBC, 0xF6B4, 0x9DBE, 0xF6B9, - 0x9DBF, 0xF5AC, 0x9DC1, 0xF6B5, 0x9DC2, 0xC563, 0x9DC3, 0xF6BB, - 0x9DC5, 0xF6BA, 0x9DC7, 0xF6B6, 0x9DC8, 0xF6C2, 0x9DCA, 0xF6B7, - 0x9DCB, 0xF7BB, 0x9DCC, 0xF6C5, 0x9DCD, 0xF6C7, 0x9DCE, 0xF6BE, - 0x9DCF, 0xF6B8, 0x9DD0, 0xF7BC, 0x9DD1, 0xF7BE, 0x9DD2, 0xF7B8, - 0x9DD3, 0xC5C2, 0x9DD5, 0xF7C5, 0x9DD6, 0xF7C3, 0x9DD7, 0xC5C3, - 0x9DD8, 0xF7C2, 0x9DD9, 0xF7C1, 0x9DDA, 0xF7BA, 0x9DDB, 0xF7B7, - 0x9DDC, 0xF7BD, 0x9DDD, 0xF7C6, 0x9DDE, 0xF7B9, 0x9DDF, 0xF7BF, - 0x9DE1, 0xF869, 0x9DE2, 0xF86E, 0x9DE3, 0xF864, 0x9DE4, 0xF867, - 0x9DE5, 0xC5EE, 0x9DE6, 0xF86B, 0x9DE8, 0xF872, 0x9DE9, 0xF7C0, - 0x9DEB, 0xF865, 0x9DEC, 0xF86F, 0x9DED, 0xF873, 0x9DEE, 0xF86A, - 0x9DEF, 0xF863, 0x9DF0, 0xF86D, 0x9DF2, 0xF86C, 0x9DF3, 0xF871, - 0x9DF4, 0xF870, 0x9DF5, 0xF7C4, 0x9DF6, 0xF868, 0x9DF7, 0xF862, - 0x9DF8, 0xF866, 0x9DF9, 0xC64E, 0x9DFA, 0xC64F, 0x9DFB, 0xF861, - 0x9DFD, 0xF8E6, 0x9DFE, 0xF8DD, 0x9DFF, 0xF8E5, 0x9E00, 0xF8E2, - 0x9E01, 0xF8E3, 0x9E02, 0xF8DC, 0x9E03, 0xF8DF, 0x9E04, 0xF8E7, - 0x9E05, 0xF8E1, 0x9E06, 0xF8E0, 0x9E07, 0xF8DE, 0x9E09, 0xF8E4, - 0x9E0B, 0xF95D, 0x9E0D, 0xF95E, 0x9E0F, 0xF960, 0x9E10, 0xF95F, - 0x9E11, 0xF962, 0x9E12, 0xF961, 0x9E13, 0xF97C, 0x9E14, 0xF97B, - 0x9E15, 0xF9B7, 0x9E17, 0xF9B8, 0x9E19, 0xF9C5, 0x9E1A, 0xC678, - 0x9E1B, 0xC67C, 0x9E1D, 0xF9CF, 0x9E1E, 0xC67D, 0x9E75, 0xB3BF, - 0x9E79, 0xC4D0, 0x9E7A, 0xF6C9, 0x9E7C, 0xC650, 0x9E7D, 0xC651, - 0x9E7F, 0xB3C0, 0x9E80, 0xE0EE, 0x9E82, 0xB9A8, 0x9E83, 0xE8F0, - 0x9E86, 0xECB0, 0x9E87, 0xECB1, 0x9E88, 0xECAF, 0x9E89, 0xEFAB, - 0x9E8A, 0xEFAA, 0x9E8B, 0xC247, 0x9E8C, 0xF1DF, 0x9E8D, 0xEFAC, - 0x9E8E, 0xF1DE, 0x9E91, 0xF3F3, 0x9E92, 0xC451, 0x9E93, 0xC453, - 0x9E94, 0xF3F2, 0x9E97, 0xC452, 0x9E99, 0xF5B1, 0x9E9A, 0xF5B3, - 0x9E9B, 0xF5B2, 0x9E9C, 0xF6CA, 0x9E9D, 0xC565, 0x9E9F, 0xC5EF, - 0x9EA0, 0xF8E8, 0x9EA1, 0xF963, 0x9EA4, 0xF9D2, 0x9EA5, 0xB3C1, - 0x9EA7, 0xE4E5, 0x9EA9, 0xBEA2, 0x9EAD, 0xECB3, 0x9EAE, 0xECB2, - 0x9EB0, 0xEFAD, 0x9EB4, 0xC454, 0x9EB5, 0xC4D1, 0x9EB6, 0xF7C7, - 0x9EB7, 0xF9CB, 0x9EBB, 0xB3C2, 0x9EBC, 0xBBF2, 0x9EBE, 0xBEA3, - 0x9EC0, 0xF3F4, 0x9EC2, 0xF874, 0x9EC3, 0xB6C0, 0x9EC8, 0xEFAE, - 0x9ECC, 0xC664, 0x9ECD, 0xB6C1, 0x9ECE, 0xBEA4, 0x9ECF, 0xC248, - 0x9ED0, 0xF875, 0x9ED1, 0xB6C2, 0x9ED3, 0xE8F1, 0x9ED4, 0xC072, - 0x9ED5, 0xECB4, 0x9ED6, 0xECB5, 0x9ED8, 0xC071, 0x9EDA, 0xEFAF, - 0x9EDB, 0xC24C, 0x9EDC, 0xC24A, 0x9EDD, 0xC24B, 0x9EDE, 0xC249, - 0x9EDF, 0xF1E0, 0x9EE0, 0xC35C, 0x9EE4, 0xF5B5, 0x9EE5, 0xF5B4, - 0x9EE6, 0xF5B7, 0x9EE7, 0xF5B6, 0x9EE8, 0xC4D2, 0x9EEB, 0xF6CB, - 0x9EED, 0xF6CD, 0x9EEE, 0xF6CC, 0x9EEF, 0xC566, 0x9EF0, 0xF7C8, - 0x9EF2, 0xF876, 0x9EF3, 0xF877, 0x9EF4, 0xC5F0, 0x9EF5, 0xF964, - 0x9EF6, 0xF97D, 0x9EF7, 0xC675, 0x9EF9, 0xDCB0, 0x9EFA, 0xECB6, - 0x9EFB, 0xEFB0, 0x9EFC, 0xF3F5, 0x9EFD, 0xE0EF, 0x9EFF, 0xEFB1, - 0x9F00, 0xF1E2, 0x9F01, 0xF1E1, 0x9F06, 0xF878, 0x9F07, 0xC652, - 0x9F09, 0xF965, 0x9F0A, 0xF97E, 0x9F0E, 0xB9A9, 0x9F0F, 0xE8F2, - 0x9F10, 0xE8F3, 0x9F12, 0xECB7, 0x9F13, 0xB9AA, 0x9F15, 0xC35D, - 0x9F16, 0xF1E3, 0x9F18, 0xF6CF, 0x9F19, 0xC567, 0x9F1A, 0xF6D0, - 0x9F1B, 0xF6CE, 0x9F1C, 0xF879, 0x9F1E, 0xF8E9, 0x9F20, 0xB9AB, - 0x9F22, 0xEFB4, 0x9F23, 0xEFB3, 0x9F24, 0xEFB2, 0x9F25, 0xF1E4, - 0x9F28, 0xF1E8, 0x9F29, 0xF1E7, 0x9F2A, 0xF1E6, 0x9F2B, 0xF1E5, - 0x9F2C, 0xC35E, 0x9F2D, 0xF3F6, 0x9F2E, 0xF5B9, 0x9F2F, 0xC4D3, - 0x9F30, 0xF5B8, 0x9F31, 0xF6D1, 0x9F32, 0xF7CB, 0x9F33, 0xF7CA, - 0x9F34, 0xC5C4, 0x9F35, 0xF7C9, 0x9F36, 0xF87C, 0x9F37, 0xF87B, - 0x9F38, 0xF87A, 0x9F3B, 0xBBF3, 0x9F3D, 0xECB8, 0x9F3E, 0xC24D, - 0x9F40, 0xF3F7, 0x9F41, 0xF3F8, 0x9F42, 0xF7CC, 0x9F43, 0xF87D, - 0x9F46, 0xF8EA, 0x9F47, 0xF966, 0x9F48, 0xF9B9, 0x9F49, 0xF9D4, - 0x9F4A, 0xBBF4, 0x9F4B, 0xC24E, 0x9F4C, 0xF1E9, 0x9F4D, 0xF3F9, - 0x9F4E, 0xF6D2, 0x9F4F, 0xF87E, 0x9F52, 0xBEA6, 0x9F54, 0xEFB5, - 0x9F55, 0xF1EA, 0x9F56, 0xF3FA, 0x9F57, 0xF3FB, 0x9F58, 0xF3FC, - 0x9F59, 0xF5BE, 0x9F5B, 0xF5BA, 0x9F5C, 0xC568, 0x9F5D, 0xF5BD, - 0x9F5E, 0xF5BC, 0x9F5F, 0xC4D4, 0x9F60, 0xF5BB, 0x9F61, 0xC4D6, - 0x9F63, 0xC4D5, 0x9F64, 0xF6D4, 0x9F65, 0xF6D3, 0x9F66, 0xC569, - 0x9F67, 0xC56A, 0x9F6A, 0xC5C6, 0x9F6B, 0xF7CD, 0x9F6C, 0xC5C5, - 0x9F6E, 0xF8A3, 0x9F6F, 0xF8A4, 0x9F70, 0xF8A2, 0x9F71, 0xF8A1, - 0x9F72, 0xC654, 0x9F74, 0xF8EB, 0x9F75, 0xF8EC, 0x9F76, 0xF8ED, - 0x9F77, 0xC653, 0x9F78, 0xF967, 0x9F79, 0xF96A, 0x9F7A, 0xF969, - 0x9F7B, 0xF968, 0x9F7E, 0xF9D3, 0x9F8D, 0xC073, 0x9F90, 0xC365, - 0x9F91, 0xF5BF, 0x9F92, 0xF6D5, 0x9F94, 0xC5C7, 0x9F95, 0xF7CE, - 0x9F98, 0xF9D5, 0x9F9C, 0xC074, 0x9FA0, 0xEFB6, 0x9FA2, 0xF7CF, - 0x9FA4, 0xF9A1, 0xFA0C, 0xC94A, 0xFA0D, 0xDDFC, 0xFE30, 0xA14A, - 0xFE31, 0xA157, 0xFE33, 0xA159, 0xFE34, 0xA15B, 0xFE35, 0xA15F, - 0xFE36, 0xA160, 0xFE37, 0xA163, 0xFE38, 0xA164, 0xFE39, 0xA167, - 0xFE3A, 0xA168, 0xFE3B, 0xA16B, 0xFE3C, 0xA16C, 0xFE3D, 0xA16F, - 0xFE3E, 0xA170, 0xFE3F, 0xA173, 0xFE40, 0xA174, 0xFE41, 0xA177, - 0xFE42, 0xA178, 0xFE43, 0xA17B, 0xFE44, 0xA17C, 0xFE49, 0xA1C6, - 0xFE4A, 0xA1C7, 0xFE4B, 0xA1CA, 0xFE4C, 0xA1CB, 0xFE4D, 0xA1C8, - 0xFE4E, 0xA1C9, 0xFE4F, 0xA15C, 0xFE50, 0xA14D, 0xFE51, 0xA14E, - 0xFE52, 0xA14F, 0xFE54, 0xA151, 0xFE55, 0xA152, 0xFE56, 0xA153, - 0xFE57, 0xA154, 0xFE59, 0xA17D, 0xFE5A, 0xA17E, 0xFE5B, 0xA1A1, - 0xFE5C, 0xA1A2, 0xFE5D, 0xA1A3, 0xFE5E, 0xA1A4, 0xFE5F, 0xA1CC, - 0xFE60, 0xA1CD, 0xFE61, 0xA1CE, 0xFE62, 0xA1DE, 0xFE63, 0xA1DF, - 0xFE64, 0xA1E0, 0xFE65, 0xA1E1, 0xFE66, 0xA1E2, 0xFE68, 0xA242, - 0xFE69, 0xA24C, 0xFE6A, 0xA24D, 0xFE6B, 0xA24E, 0xFF01, 0xA149, - 0xFF03, 0xA1AD, 0xFF04, 0xA243, 0xFF05, 0xA248, 0xFF06, 0xA1AE, - 0xFF08, 0xA15D, 0xFF09, 0xA15E, 0xFF0A, 0xA1AF, 0xFF0B, 0xA1CF, - 0xFF0C, 0xA141, 0xFF0D, 0xA1D0, 0xFF0E, 0xA144, 0xFF0F, 0xA1FE, - 0xFF10, 0xA2AF, 0xFF11, 0xA2B0, 0xFF12, 0xA2B1, 0xFF13, 0xA2B2, - 0xFF14, 0xA2B3, 0xFF15, 0xA2B4, 0xFF16, 0xA2B5, 0xFF17, 0xA2B6, - 0xFF18, 0xA2B7, 0xFF19, 0xA2B8, 0xFF1A, 0xA147, 0xFF1B, 0xA146, - 0xFF1C, 0xA1D5, 0xFF1D, 0xA1D7, 0xFF1E, 0xA1D6, 0xFF1F, 0xA148, - 0xFF20, 0xA249, 0xFF21, 0xA2CF, 0xFF22, 0xA2D0, 0xFF23, 0xA2D1, - 0xFF24, 0xA2D2, 0xFF25, 0xA2D3, 0xFF26, 0xA2D4, 0xFF27, 0xA2D5, - 0xFF28, 0xA2D6, 0xFF29, 0xA2D7, 0xFF2A, 0xA2D8, 0xFF2B, 0xA2D9, - 0xFF2C, 0xA2DA, 0xFF2D, 0xA2DB, 0xFF2E, 0xA2DC, 0xFF2F, 0xA2DD, - 0xFF30, 0xA2DE, 0xFF31, 0xA2DF, 0xFF32, 0xA2E0, 0xFF33, 0xA2E1, - 0xFF34, 0xA2E2, 0xFF35, 0xA2E3, 0xFF36, 0xA2E4, 0xFF37, 0xA2E5, - 0xFF38, 0xA2E6, 0xFF39, 0xA2E7, 0xFF3A, 0xA2E8, 0xFF3C, 0xA240, - 0xFF3F, 0xA1C4, 0xFF41, 0xA2E9, 0xFF42, 0xA2EA, 0xFF43, 0xA2EB, - 0xFF44, 0xA2EC, 0xFF45, 0xA2ED, 0xFF46, 0xA2EE, 0xFF47, 0xA2EF, - 0xFF48, 0xA2F0, 0xFF49, 0xA2F1, 0xFF4A, 0xA2F2, 0xFF4B, 0xA2F3, - 0xFF4C, 0xA2F4, 0xFF4D, 0xA2F5, 0xFF4E, 0xA2F6, 0xFF4F, 0xA2F7, - 0xFF50, 0xA2F8, 0xFF51, 0xA2F9, 0xFF52, 0xA2FA, 0xFF53, 0xA2FB, - 0xFF54, 0xA2FC, 0xFF55, 0xA2FD, 0xFF56, 0xA2FE, 0xFF57, 0xA340, - 0xFF58, 0xA341, 0xFF59, 0xA342, 0xFF5A, 0xA343, 0xFF5B, 0xA161, - 0xFF5C, 0xA155, 0xFF5D, 0xA162, 0xFF5E, 0xA1E3, 0xFFE0, 0xA246, - 0xFFE1, 0xA247, 0xFFE3, 0xA1C3, 0xFFE5, 0xA244, 0, 0 -}; - -static -const WCHAR oem2uni[] = { -/* OEM - Unicode, OEM - Unicode, OEM - Unicode, OEM - Unicode */ - 0xA140, 0x3000, 0xA141, 0xFF0C, 0xA142, 0x3001, 0xA143, 0x3002, - 0xA144, 0xFF0E, 0xA145, 0x2027, 0xA146, 0xFF1B, 0xA147, 0xFF1A, - 0xA148, 0xFF1F, 0xA149, 0xFF01, 0xA14A, 0xFE30, 0xA14B, 0x2026, - 0xA14C, 0x2025, 0xA14D, 0xFE50, 0xA14E, 0xFE51, 0xA14F, 0xFE52, - 0xA150, 0x00B7, 0xA151, 0xFE54, 0xA152, 0xFE55, 0xA153, 0xFE56, - 0xA154, 0xFE57, 0xA155, 0xFF5C, 0xA156, 0x2013, 0xA157, 0xFE31, - 0xA158, 0x2014, 0xA159, 0xFE33, 0xA15A, 0x2574, 0xA15B, 0xFE34, - 0xA15C, 0xFE4F, 0xA15D, 0xFF08, 0xA15E, 0xFF09, 0xA15F, 0xFE35, - 0xA160, 0xFE36, 0xA161, 0xFF5B, 0xA162, 0xFF5D, 0xA163, 0xFE37, - 0xA164, 0xFE38, 0xA165, 0x3014, 0xA166, 0x3015, 0xA167, 0xFE39, - 0xA168, 0xFE3A, 0xA169, 0x3010, 0xA16A, 0x3011, 0xA16B, 0xFE3B, - 0xA16C, 0xFE3C, 0xA16D, 0x300A, 0xA16E, 0x300B, 0xA16F, 0xFE3D, - 0xA170, 0xFE3E, 0xA171, 0x3008, 0xA172, 0x3009, 0xA173, 0xFE3F, - 0xA174, 0xFE40, 0xA175, 0x300C, 0xA176, 0x300D, 0xA177, 0xFE41, - 0xA178, 0xFE42, 0xA179, 0x300E, 0xA17A, 0x300F, 0xA17B, 0xFE43, - 0xA17C, 0xFE44, 0xA17D, 0xFE59, 0xA17E, 0xFE5A, 0xA1A1, 0xFE5B, - 0xA1A2, 0xFE5C, 0xA1A3, 0xFE5D, 0xA1A4, 0xFE5E, 0xA1A5, 0x2018, - 0xA1A6, 0x2019, 0xA1A7, 0x201C, 0xA1A8, 0x201D, 0xA1A9, 0x301D, - 0xA1AA, 0x301E, 0xA1AB, 0x2035, 0xA1AC, 0x2032, 0xA1AD, 0xFF03, - 0xA1AE, 0xFF06, 0xA1AF, 0xFF0A, 0xA1B0, 0x203B, 0xA1B1, 0x00A7, - 0xA1B2, 0x3003, 0xA1B3, 0x25CB, 0xA1B4, 0x25CF, 0xA1B5, 0x25B3, - 0xA1B6, 0x25B2, 0xA1B7, 0x25CE, 0xA1B8, 0x2606, 0xA1B9, 0x2605, - 0xA1BA, 0x25C7, 0xA1BB, 0x25C6, 0xA1BC, 0x25A1, 0xA1BD, 0x25A0, - 0xA1BE, 0x25BD, 0xA1BF, 0x25BC, 0xA1C0, 0x32A3, 0xA1C1, 0x2105, - 0xA1C2, 0x00AF, 0xA1C3, 0xFFE3, 0xA1C4, 0xFF3F, 0xA1C5, 0x02CD, - 0xA1C6, 0xFE49, 0xA1C7, 0xFE4A, 0xA1C8, 0xFE4D, 0xA1C9, 0xFE4E, - 0xA1CA, 0xFE4B, 0xA1CB, 0xFE4C, 0xA1CC, 0xFE5F, 0xA1CD, 0xFE60, - 0xA1CE, 0xFE61, 0xA1CF, 0xFF0B, 0xA1D0, 0xFF0D, 0xA1D1, 0x00D7, - 0xA1D2, 0x00F7, 0xA1D3, 0x00B1, 0xA1D4, 0x221A, 0xA1D5, 0xFF1C, - 0xA1D6, 0xFF1E, 0xA1D7, 0xFF1D, 0xA1D8, 0x2266, 0xA1D9, 0x2267, - 0xA1DA, 0x2260, 0xA1DB, 0x221E, 0xA1DC, 0x2252, 0xA1DD, 0x2261, - 0xA1DE, 0xFE62, 0xA1DF, 0xFE63, 0xA1E0, 0xFE64, 0xA1E1, 0xFE65, - 0xA1E2, 0xFE66, 0xA1E3, 0xFF5E, 0xA1E4, 0x2229, 0xA1E5, 0x222A, - 0xA1E6, 0x22A5, 0xA1E7, 0x2220, 0xA1E8, 0x221F, 0xA1E9, 0x22BF, - 0xA1EA, 0x33D2, 0xA1EB, 0x33D1, 0xA1EC, 0x222B, 0xA1ED, 0x222E, - 0xA1EE, 0x2235, 0xA1EF, 0x2234, 0xA1F0, 0x2640, 0xA1F1, 0x2642, - 0xA1F2, 0x2295, 0xA1F3, 0x2299, 0xA1F4, 0x2191, 0xA1F5, 0x2193, - 0xA1F6, 0x2190, 0xA1F7, 0x2192, 0xA1F8, 0x2196, 0xA1F9, 0x2197, - 0xA1FA, 0x2199, 0xA1FB, 0x2198, 0xA1FC, 0x2225, 0xA1FD, 0x2223, - 0xA1FE, 0xFF0F, 0xA240, 0xFF3C, 0xA241, 0x2215, 0xA242, 0xFE68, - 0xA243, 0xFF04, 0xA244, 0xFFE5, 0xA245, 0x3012, 0xA246, 0xFFE0, - 0xA247, 0xFFE1, 0xA248, 0xFF05, 0xA249, 0xFF20, 0xA24A, 0x2103, - 0xA24B, 0x2109, 0xA24C, 0xFE69, 0xA24D, 0xFE6A, 0xA24E, 0xFE6B, - 0xA24F, 0x33D5, 0xA250, 0x339C, 0xA251, 0x339D, 0xA252, 0x339E, - 0xA253, 0x33CE, 0xA254, 0x33A1, 0xA255, 0x338E, 0xA256, 0x338F, - 0xA257, 0x33C4, 0xA258, 0x00B0, 0xA259, 0x5159, 0xA25A, 0x515B, - 0xA25B, 0x515E, 0xA25C, 0x515D, 0xA25D, 0x5161, 0xA25E, 0x5163, - 0xA25F, 0x55E7, 0xA260, 0x74E9, 0xA261, 0x7CCE, 0xA262, 0x2581, - 0xA263, 0x2582, 0xA264, 0x2583, 0xA265, 0x2584, 0xA266, 0x2585, - 0xA267, 0x2586, 0xA268, 0x2587, 0xA269, 0x2588, 0xA26A, 0x258F, - 0xA26B, 0x258E, 0xA26C, 0x258D, 0xA26D, 0x258C, 0xA26E, 0x258B, - 0xA26F, 0x258A, 0xA270, 0x2589, 0xA271, 0x253C, 0xA272, 0x2534, - 0xA273, 0x252C, 0xA274, 0x2524, 0xA275, 0x251C, 0xA276, 0x2594, - 0xA277, 0x2500, 0xA278, 0x2502, 0xA279, 0x2595, 0xA27A, 0x250C, - 0xA27B, 0x2510, 0xA27C, 0x2514, 0xA27D, 0x2518, 0xA27E, 0x256D, - 0xA2A1, 0x256E, 0xA2A2, 0x2570, 0xA2A3, 0x256F, 0xA2A4, 0x2550, - 0xA2A5, 0x255E, 0xA2A6, 0x256A, 0xA2A7, 0x2561, 0xA2A8, 0x25E2, - 0xA2A9, 0x25E3, 0xA2AA, 0x25E5, 0xA2AB, 0x25E4, 0xA2AC, 0x2571, - 0xA2AD, 0x2572, 0xA2AE, 0x2573, 0xA2AF, 0xFF10, 0xA2B0, 0xFF11, - 0xA2B1, 0xFF12, 0xA2B2, 0xFF13, 0xA2B3, 0xFF14, 0xA2B4, 0xFF15, - 0xA2B5, 0xFF16, 0xA2B6, 0xFF17, 0xA2B7, 0xFF18, 0xA2B8, 0xFF19, - 0xA2B9, 0x2160, 0xA2BA, 0x2161, 0xA2BB, 0x2162, 0xA2BC, 0x2163, - 0xA2BD, 0x2164, 0xA2BE, 0x2165, 0xA2BF, 0x2166, 0xA2C0, 0x2167, - 0xA2C1, 0x2168, 0xA2C2, 0x2169, 0xA2C3, 0x3021, 0xA2C4, 0x3022, - 0xA2C5, 0x3023, 0xA2C6, 0x3024, 0xA2C7, 0x3025, 0xA2C8, 0x3026, - 0xA2C9, 0x3027, 0xA2CA, 0x3028, 0xA2CB, 0x3029, 0xA2CC, 0x5341, - 0xA2CD, 0x5344, 0xA2CE, 0x5345, 0xA2CF, 0xFF21, 0xA2D0, 0xFF22, - 0xA2D1, 0xFF23, 0xA2D2, 0xFF24, 0xA2D3, 0xFF25, 0xA2D4, 0xFF26, - 0xA2D5, 0xFF27, 0xA2D6, 0xFF28, 0xA2D7, 0xFF29, 0xA2D8, 0xFF2A, - 0xA2D9, 0xFF2B, 0xA2DA, 0xFF2C, 0xA2DB, 0xFF2D, 0xA2DC, 0xFF2E, - 0xA2DD, 0xFF2F, 0xA2DE, 0xFF30, 0xA2DF, 0xFF31, 0xA2E0, 0xFF32, - 0xA2E1, 0xFF33, 0xA2E2, 0xFF34, 0xA2E3, 0xFF35, 0xA2E4, 0xFF36, - 0xA2E5, 0xFF37, 0xA2E6, 0xFF38, 0xA2E7, 0xFF39, 0xA2E8, 0xFF3A, - 0xA2E9, 0xFF41, 0xA2EA, 0xFF42, 0xA2EB, 0xFF43, 0xA2EC, 0xFF44, - 0xA2ED, 0xFF45, 0xA2EE, 0xFF46, 0xA2EF, 0xFF47, 0xA2F0, 0xFF48, - 0xA2F1, 0xFF49, 0xA2F2, 0xFF4A, 0xA2F3, 0xFF4B, 0xA2F4, 0xFF4C, - 0xA2F5, 0xFF4D, 0xA2F6, 0xFF4E, 0xA2F7, 0xFF4F, 0xA2F8, 0xFF50, - 0xA2F9, 0xFF51, 0xA2FA, 0xFF52, 0xA2FB, 0xFF53, 0xA2FC, 0xFF54, - 0xA2FD, 0xFF55, 0xA2FE, 0xFF56, 0xA340, 0xFF57, 0xA341, 0xFF58, - 0xA342, 0xFF59, 0xA343, 0xFF5A, 0xA344, 0x0391, 0xA345, 0x0392, - 0xA346, 0x0393, 0xA347, 0x0394, 0xA348, 0x0395, 0xA349, 0x0396, - 0xA34A, 0x0397, 0xA34B, 0x0398, 0xA34C, 0x0399, 0xA34D, 0x039A, - 0xA34E, 0x039B, 0xA34F, 0x039C, 0xA350, 0x039D, 0xA351, 0x039E, - 0xA352, 0x039F, 0xA353, 0x03A0, 0xA354, 0x03A1, 0xA355, 0x03A3, - 0xA356, 0x03A4, 0xA357, 0x03A5, 0xA358, 0x03A6, 0xA359, 0x03A7, - 0xA35A, 0x03A8, 0xA35B, 0x03A9, 0xA35C, 0x03B1, 0xA35D, 0x03B2, - 0xA35E, 0x03B3, 0xA35F, 0x03B4, 0xA360, 0x03B5, 0xA361, 0x03B6, - 0xA362, 0x03B7, 0xA363, 0x03B8, 0xA364, 0x03B9, 0xA365, 0x03BA, - 0xA366, 0x03BB, 0xA367, 0x03BC, 0xA368, 0x03BD, 0xA369, 0x03BE, - 0xA36A, 0x03BF, 0xA36B, 0x03C0, 0xA36C, 0x03C1, 0xA36D, 0x03C3, - 0xA36E, 0x03C4, 0xA36F, 0x03C5, 0xA370, 0x03C6, 0xA371, 0x03C7, - 0xA372, 0x03C8, 0xA373, 0x03C9, 0xA374, 0x3105, 0xA375, 0x3106, - 0xA376, 0x3107, 0xA377, 0x3108, 0xA378, 0x3109, 0xA379, 0x310A, - 0xA37A, 0x310B, 0xA37B, 0x310C, 0xA37C, 0x310D, 0xA37D, 0x310E, - 0xA37E, 0x310F, 0xA3A1, 0x3110, 0xA3A2, 0x3111, 0xA3A3, 0x3112, - 0xA3A4, 0x3113, 0xA3A5, 0x3114, 0xA3A6, 0x3115, 0xA3A7, 0x3116, - 0xA3A8, 0x3117, 0xA3A9, 0x3118, 0xA3AA, 0x3119, 0xA3AB, 0x311A, - 0xA3AC, 0x311B, 0xA3AD, 0x311C, 0xA3AE, 0x311D, 0xA3AF, 0x311E, - 0xA3B0, 0x311F, 0xA3B1, 0x3120, 0xA3B2, 0x3121, 0xA3B3, 0x3122, - 0xA3B4, 0x3123, 0xA3B5, 0x3124, 0xA3B6, 0x3125, 0xA3B7, 0x3126, - 0xA3B8, 0x3127, 0xA3B9, 0x3128, 0xA3BA, 0x3129, 0xA3BB, 0x02D9, - 0xA3BC, 0x02C9, 0xA3BD, 0x02CA, 0xA3BE, 0x02C7, 0xA3BF, 0x02CB, - 0xA3E1, 0x20AC, 0xA440, 0x4E00, 0xA441, 0x4E59, 0xA442, 0x4E01, - 0xA443, 0x4E03, 0xA444, 0x4E43, 0xA445, 0x4E5D, 0xA446, 0x4E86, - 0xA447, 0x4E8C, 0xA448, 0x4EBA, 0xA449, 0x513F, 0xA44A, 0x5165, - 0xA44B, 0x516B, 0xA44C, 0x51E0, 0xA44D, 0x5200, 0xA44E, 0x5201, - 0xA44F, 0x529B, 0xA450, 0x5315, 0xA451, 0x5341, 0xA452, 0x535C, - 0xA453, 0x53C8, 0xA454, 0x4E09, 0xA455, 0x4E0B, 0xA456, 0x4E08, - 0xA457, 0x4E0A, 0xA458, 0x4E2B, 0xA459, 0x4E38, 0xA45A, 0x51E1, - 0xA45B, 0x4E45, 0xA45C, 0x4E48, 0xA45D, 0x4E5F, 0xA45E, 0x4E5E, - 0xA45F, 0x4E8E, 0xA460, 0x4EA1, 0xA461, 0x5140, 0xA462, 0x5203, - 0xA463, 0x52FA, 0xA464, 0x5343, 0xA465, 0x53C9, 0xA466, 0x53E3, - 0xA467, 0x571F, 0xA468, 0x58EB, 0xA469, 0x5915, 0xA46A, 0x5927, - 0xA46B, 0x5973, 0xA46C, 0x5B50, 0xA46D, 0x5B51, 0xA46E, 0x5B53, - 0xA46F, 0x5BF8, 0xA470, 0x5C0F, 0xA471, 0x5C22, 0xA472, 0x5C38, - 0xA473, 0x5C71, 0xA474, 0x5DDD, 0xA475, 0x5DE5, 0xA476, 0x5DF1, - 0xA477, 0x5DF2, 0xA478, 0x5DF3, 0xA479, 0x5DFE, 0xA47A, 0x5E72, - 0xA47B, 0x5EFE, 0xA47C, 0x5F0B, 0xA47D, 0x5F13, 0xA47E, 0x624D, - 0xA4A1, 0x4E11, 0xA4A2, 0x4E10, 0xA4A3, 0x4E0D, 0xA4A4, 0x4E2D, - 0xA4A5, 0x4E30, 0xA4A6, 0x4E39, 0xA4A7, 0x4E4B, 0xA4A8, 0x5C39, - 0xA4A9, 0x4E88, 0xA4AA, 0x4E91, 0xA4AB, 0x4E95, 0xA4AC, 0x4E92, - 0xA4AD, 0x4E94, 0xA4AE, 0x4EA2, 0xA4AF, 0x4EC1, 0xA4B0, 0x4EC0, - 0xA4B1, 0x4EC3, 0xA4B2, 0x4EC6, 0xA4B3, 0x4EC7, 0xA4B4, 0x4ECD, - 0xA4B5, 0x4ECA, 0xA4B6, 0x4ECB, 0xA4B7, 0x4EC4, 0xA4B8, 0x5143, - 0xA4B9, 0x5141, 0xA4BA, 0x5167, 0xA4BB, 0x516D, 0xA4BC, 0x516E, - 0xA4BD, 0x516C, 0xA4BE, 0x5197, 0xA4BF, 0x51F6, 0xA4C0, 0x5206, - 0xA4C1, 0x5207, 0xA4C2, 0x5208, 0xA4C3, 0x52FB, 0xA4C4, 0x52FE, - 0xA4C5, 0x52FF, 0xA4C6, 0x5316, 0xA4C7, 0x5339, 0xA4C8, 0x5348, - 0xA4C9, 0x5347, 0xA4CA, 0x5345, 0xA4CB, 0x535E, 0xA4CC, 0x5384, - 0xA4CD, 0x53CB, 0xA4CE, 0x53CA, 0xA4CF, 0x53CD, 0xA4D0, 0x58EC, - 0xA4D1, 0x5929, 0xA4D2, 0x592B, 0xA4D3, 0x592A, 0xA4D4, 0x592D, - 0xA4D5, 0x5B54, 0xA4D6, 0x5C11, 0xA4D7, 0x5C24, 0xA4D8, 0x5C3A, - 0xA4D9, 0x5C6F, 0xA4DA, 0x5DF4, 0xA4DB, 0x5E7B, 0xA4DC, 0x5EFF, - 0xA4DD, 0x5F14, 0xA4DE, 0x5F15, 0xA4DF, 0x5FC3, 0xA4E0, 0x6208, - 0xA4E1, 0x6236, 0xA4E2, 0x624B, 0xA4E3, 0x624E, 0xA4E4, 0x652F, - 0xA4E5, 0x6587, 0xA4E6, 0x6597, 0xA4E7, 0x65A4, 0xA4E8, 0x65B9, - 0xA4E9, 0x65E5, 0xA4EA, 0x66F0, 0xA4EB, 0x6708, 0xA4EC, 0x6728, - 0xA4ED, 0x6B20, 0xA4EE, 0x6B62, 0xA4EF, 0x6B79, 0xA4F0, 0x6BCB, - 0xA4F1, 0x6BD4, 0xA4F2, 0x6BDB, 0xA4F3, 0x6C0F, 0xA4F4, 0x6C34, - 0xA4F5, 0x706B, 0xA4F6, 0x722A, 0xA4F7, 0x7236, 0xA4F8, 0x723B, - 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0xF86B, 0x9DE6, 0xF86C, 0x9DF2, 0xF86D, 0x9DF0, 0xF86E, 0x9DE2, - 0xF86F, 0x9DEC, 0xF870, 0x9DF4, 0xF871, 0x9DF3, 0xF872, 0x9DE8, - 0xF873, 0x9DED, 0xF874, 0x9EC2, 0xF875, 0x9ED0, 0xF876, 0x9EF2, - 0xF877, 0x9EF3, 0xF878, 0x9F06, 0xF879, 0x9F1C, 0xF87A, 0x9F38, - 0xF87B, 0x9F37, 0xF87C, 0x9F36, 0xF87D, 0x9F43, 0xF87E, 0x9F4F, - 0xF8A1, 0x9F71, 0xF8A2, 0x9F70, 0xF8A3, 0x9F6E, 0xF8A4, 0x9F6F, - 0xF8A5, 0x56D3, 0xF8A6, 0x56CD, 0xF8A7, 0x5B4E, 0xF8A8, 0x5C6D, - 0xF8A9, 0x652D, 0xF8AA, 0x66ED, 0xF8AB, 0x66EE, 0xF8AC, 0x6B13, - 0xF8AD, 0x705F, 0xF8AE, 0x7061, 0xF8AF, 0x705D, 0xF8B0, 0x7060, - 0xF8B1, 0x7223, 0xF8B2, 0x74DB, 0xF8B3, 0x74E5, 0xF8B4, 0x77D5, - 0xF8B5, 0x7938, 0xF8B6, 0x79B7, 0xF8B7, 0x79B6, 0xF8B8, 0x7C6A, - 0xF8B9, 0x7E97, 0xF8BA, 0x7F89, 0xF8BB, 0x826D, 0xF8BC, 0x8643, - 0xF8BD, 0x8838, 0xF8BE, 0x8837, 0xF8BF, 0x8835, 0xF8C0, 0x884B, - 0xF8C1, 0x8B94, 0xF8C2, 0x8B95, 0xF8C3, 0x8E9E, 0xF8C4, 0x8E9F, - 0xF8C5, 0x8EA0, 0xF8C6, 0x8E9D, 0xF8C7, 0x91BE, 0xF8C8, 0x91BD, - 0xF8C9, 0x91C2, 0xF8CA, 0x946B, 0xF8CB, 0x9468, 0xF8CC, 0x9469, - 0xF8CD, 0x96E5, 0xF8CE, 0x9746, 0xF8CF, 0x9743, 0xF8D0, 0x9747, - 0xF8D1, 0x97C7, 0xF8D2, 0x97E5, 0xF8D3, 0x9A5E, 0xF8D4, 0x9AD5, - 0xF8D5, 0x9B59, 0xF8D6, 0x9C63, 0xF8D7, 0x9C67, 0xF8D8, 0x9C66, - 0xF8D9, 0x9C62, 0xF8DA, 0x9C5E, 0xF8DB, 0x9C60, 0xF8DC, 0x9E02, - 0xF8DD, 0x9DFE, 0xF8DE, 0x9E07, 0xF8DF, 0x9E03, 0xF8E0, 0x9E06, - 0xF8E1, 0x9E05, 0xF8E2, 0x9E00, 0xF8E3, 0x9E01, 0xF8E4, 0x9E09, - 0xF8E5, 0x9DFF, 0xF8E6, 0x9DFD, 0xF8E7, 0x9E04, 0xF8E8, 0x9EA0, - 0xF8E9, 0x9F1E, 0xF8EA, 0x9F46, 0xF8EB, 0x9F74, 0xF8EC, 0x9F75, - 0xF8ED, 0x9F76, 0xF8EE, 0x56D4, 0xF8EF, 0x652E, 0xF8F0, 0x65B8, - 0xF8F1, 0x6B18, 0xF8F2, 0x6B19, 0xF8F3, 0x6B17, 0xF8F4, 0x6B1A, - 0xF8F5, 0x7062, 0xF8F6, 0x7226, 0xF8F7, 0x72AA, 0xF8F8, 0x77D8, - 0xF8F9, 0x77D9, 0xF8FA, 0x7939, 0xF8FB, 0x7C69, 0xF8FC, 0x7C6B, - 0xF8FD, 0x7CF6, 0xF8FE, 0x7E9A, 0xF940, 0x7E98, 0xF941, 0x7E9B, - 0xF942, 0x7E99, 0xF943, 0x81E0, 0xF944, 0x81E1, 0xF945, 0x8646, - 0xF946, 0x8647, 0xF947, 0x8648, 0xF948, 0x8979, 0xF949, 0x897A, - 0xF94A, 0x897C, 0xF94B, 0x897B, 0xF94C, 0x89FF, 0xF94D, 0x8B98, - 0xF94E, 0x8B99, 0xF94F, 0x8EA5, 0xF950, 0x8EA4, 0xF951, 0x8EA3, - 0xF952, 0x946E, 0xF953, 0x946D, 0xF954, 0x946F, 0xF955, 0x9471, - 0xF956, 0x9473, 0xF957, 0x9749, 0xF958, 0x9872, 0xF959, 0x995F, - 0xF95A, 0x9C68, 0xF95B, 0x9C6E, 0xF95C, 0x9C6D, 0xF95D, 0x9E0B, - 0xF95E, 0x9E0D, 0xF95F, 0x9E10, 0xF960, 0x9E0F, 0xF961, 0x9E12, - 0xF962, 0x9E11, 0xF963, 0x9EA1, 0xF964, 0x9EF5, 0xF965, 0x9F09, - 0xF966, 0x9F47, 0xF967, 0x9F78, 0xF968, 0x9F7B, 0xF969, 0x9F7A, - 0xF96A, 0x9F79, 0xF96B, 0x571E, 0xF96C, 0x7066, 0xF96D, 0x7C6F, - 0xF96E, 0x883C, 0xF96F, 0x8DB2, 0xF970, 0x8EA6, 0xF971, 0x91C3, - 0xF972, 0x9474, 0xF973, 0x9478, 0xF974, 0x9476, 0xF975, 0x9475, - 0xF976, 0x9A60, 0xF977, 0x9C74, 0xF978, 0x9C73, 0xF979, 0x9C71, - 0xF97A, 0x9C75, 0xF97B, 0x9E14, 0xF97C, 0x9E13, 0xF97D, 0x9EF6, - 0xF97E, 0x9F0A, 0xF9A1, 0x9FA4, 0xF9A2, 0x7068, 0xF9A3, 0x7065, - 0xF9A4, 0x7CF7, 0xF9A5, 0x866A, 0xF9A6, 0x883E, 0xF9A7, 0x883D, - 0xF9A8, 0x883F, 0xF9A9, 0x8B9E, 0xF9AA, 0x8C9C, 0xF9AB, 0x8EA9, - 0xF9AC, 0x8EC9, 0xF9AD, 0x974B, 0xF9AE, 0x9873, 0xF9AF, 0x9874, - 0xF9B0, 0x98CC, 0xF9B1, 0x9961, 0xF9B2, 0x99AB, 0xF9B3, 0x9A64, - 0xF9B4, 0x9A66, 0xF9B5, 0x9A67, 0xF9B6, 0x9B24, 0xF9B7, 0x9E15, - 0xF9B8, 0x9E17, 0xF9B9, 0x9F48, 0xF9BA, 0x6207, 0xF9BB, 0x6B1E, - 0xF9BC, 0x7227, 0xF9BD, 0x864C, 0xF9BE, 0x8EA8, 0xF9BF, 0x9482, - 0xF9C0, 0x9480, 0xF9C1, 0x9481, 0xF9C2, 0x9A69, 0xF9C3, 0x9A68, - 0xF9C4, 0x9B2E, 0xF9C5, 0x9E19, 0xF9C6, 0x7229, 0xF9C7, 0x864B, - 0xF9C8, 0x8B9F, 0xF9C9, 0x9483, 0xF9CA, 0x9C79, 0xF9CB, 0x9EB7, - 0xF9CC, 0x7675, 0xF9CD, 0x9A6B, 0xF9CE, 0x9C7A, 0xF9CF, 0x9E1D, - 0xF9D0, 0x7069, 0xF9D1, 0x706A, 0xF9D2, 0x9EA4, 0xF9D3, 0x9F7E, - 0xF9D4, 0x9F49, 0xF9D5, 0x9F98, 0xF9D6, 0x7881, 0xF9D7, 0x92B9, - 0xF9D8, 0x88CF, 0xF9D9, 0x58BB, 0xF9DA, 0x6052, 0xF9DB, 0x7CA7, - 0xF9DC, 0x5AFA, 0xF9DD, 0x2554, 0xF9DE, 0x2566, 0xF9DF, 0x2557, - 0xF9E0, 0x2560, 0xF9E1, 0x256C, 0xF9E2, 0x2563, 0xF9E3, 0x255A, - 0xF9E4, 0x2569, 0xF9E5, 0x255D, 0xF9E6, 0x2552, 0xF9E7, 0x2564, - 0xF9E8, 0x2555, 0xF9E9, 0x255E, 0xF9EA, 0x256A, 0xF9EB, 0x2561, - 0xF9EC, 0x2558, 0xF9ED, 0x2567, 0xF9EE, 0x255B, 0xF9EF, 0x2553, - 0xF9F0, 0x2565, 0xF9F1, 0x2556, 0xF9F2, 0x255F, 0xF9F3, 0x256B, - 0xF9F4, 0x2562, 0xF9F5, 0x2559, 0xF9F6, 0x2568, 0xF9F7, 0x255C, - 0xF9F8, 0x2551, 0xF9F9, 0x2550, 0xF9FA, 0x256D, 0xF9FB, 0x256E, - 0xF9FC, 0x2570, 0xF9FD, 0x256F, 0xF9FE, 0x2593, 0, 0 -}; - - - -WCHAR ff_convert ( /* Converted code, 0 means conversion error */ - WCHAR src, /* Character code to be converted */ - UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ -) -{ - const WCHAR *p; - WCHAR c; - int i, n, li, hi; - - - if (src < 0x80) { /* ASCII */ - c = src; - } else { - if (dir) { /* OEMCP to unicode */ - p = oem2uni; - hi = sizeof(oem2uni) / 4 - 1; - } else { /* Unicode to OEMCP */ - p = uni2oem; - hi = sizeof(uni2oem) / 4 - 1; - } - li = 0; - for (n = 16; n; n--) { - i = li + (hi - li) / 2; - if (src == p[i * 2]) break; - if (src > p[i * 2]) - li = i; - else - hi = i; - } - c = n ? p[i * 2 + 1] : 0; - } - - return c; -} - - - - -WCHAR ff_wtoupper ( /* Upper converted character */ - WCHAR chr /* Input character */ -) -{ - static const WCHAR tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 }; - static const WCHAR tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 }; - int i; - - - for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ; - - return tbl_lower[i] ? tbl_upper[i] : chr; -} diff --git a/fs/ccsbcs.c b/fs/ccsbcs.c deleted file mode 100644 index f7ee379..0000000 --- a/fs/ccsbcs.c +++ /dev/null @@ -1,540 +0,0 @@ -/*------------------------------------------------------------------------*/ -/* Unicode - Local code bidirectional converter (C)ChaN, 2009 */ -/* (SBCS code pages) */ -/*------------------------------------------------------------------------*/ -/* 437 U.S. (OEM) -/ 720 Arabic (OEM) -/ 1256 Arabic (Windows) -/ 737 Greek (OEM) -/ 1253 Greek (Windows) -/ 1250 Central Europe (Windows) -/ 775 Baltic (OEM) -/ 1257 Baltic (Windows) -/ 850 Multilingual Latin 1 (OEM) -/ 852 Latin 2 (OEM) -/ 1252 Latin 1 (Windows) -/ 855 Cyrillic (OEM) -/ 1251 Cyrillic (Windows) -/ 866 Russian (OEM) -/ 857 Turkish (OEM) -/ 1254 Turkish (Windows) -/ 858 Multilingual Latin 1 + Euro (OEM) -/ 862 Hebrew (OEM) -/ 1255 Hebrew (Windows) -/ 874 Thai (OEM, Windows) -/ 1258 Vietnam (OEM, Windows) -*/ - -#include -#include - -#if _CODE_PAGE == 437 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, - 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, - 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, - 0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, - 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, - 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, - 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, - 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, - 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, - 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, - 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 -}; - -#elif _CODE_PAGE == 720 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */ - 0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7, - 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9, - 0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627, - 0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F, - 0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, - 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, - 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, - 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642, - 0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A, - 0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248, - 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 -}; - -#elif _CODE_PAGE == 737 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */ - 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398, - 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0, - 0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9, - 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8, - 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0, - 0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, - 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, - 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, - 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD, - 0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E, - 0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248, - 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 -}; - -#elif _CODE_PAGE == 775 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */ - 0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107, - 0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5, - 0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A, - 0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4, - 0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6, - 0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118, - 0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A, - 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D, - 0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B, - 0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144, - 0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019, - 0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E, - 0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 -}; - -#elif _CODE_PAGE == 850 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, - 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, - 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, - 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, - 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, - 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, - 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, - 0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE, - 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580, - 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE, - 0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4, - 0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, - 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 -}; - -#elif _CODE_PAGE == 852 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7, - 0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106, - 0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A, - 0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E, - 0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A, - 0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103, - 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, - 0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE, - 0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580, - 0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161, - 0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4, - 0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8, - 0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0 -}; - -#elif _CODE_PAGE == 855 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */ - 0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404, - 0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408, - 0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C, - 0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A, - 0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414, - 0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438, - 0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A, - 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, - 0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E, - 0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580, - 0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443, - 0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116, - 0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D, - 0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0 -}; - -#elif _CODE_PAGE == 857 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, - 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5, - 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, - 0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F, - 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, - 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, - 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, - 0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE, - 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580, - 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000, - 0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4, - 0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, - 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 -}; - -#elif _CODE_PAGE == 858 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP858(0x80-0xFF) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, - 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, - 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, - 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, - 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, - 0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, - 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, - 0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE, - 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580, - 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE, - 0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4, - 0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, - 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 -}; - -#elif _CODE_PAGE == 862 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */ - 0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7, - 0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF, - 0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7, - 0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, - 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, - 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, - 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, - 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, - 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, - 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, - 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 -}; - -#elif _CODE_PAGE == 866 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */ - 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, - 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F, - 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, - 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F, - 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, - 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, - 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, - 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, - 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, - 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F, - 0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E, - 0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0 -}; - -#elif _CODE_PAGE == 874 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP874(0x80-0xFF) to Unicode conversion table */ - 0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07, - 0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F, - 0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17, - 0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F, - 0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27, - 0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F, - 0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37, - 0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F, - 0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47, - 0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F, - 0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57, - 0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000 -}; - -#elif _CODE_PAGE == 1250 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP1250(0x80-0xFF) to Unicode conversion table */ - 0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021, - 0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179, - 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, - 0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A, - 0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7, - 0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B, - 0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7, - 0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C, - 0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7, - 0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E, - 0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7, - 0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF, - 0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7, - 0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F, - 0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7, - 0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9 -}; - -#elif _CODE_PAGE == 1251 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP1251(0x80-0xFF) to Unicode conversion table */ - 0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021, - 0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F, - 0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, - 0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F, - 0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7, - 0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407, - 0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7, - 0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457, - 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, - 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F, - 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, - 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F, - 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, - 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F, - 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, - 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F -}; - -#elif _CODE_PAGE == 1252 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP1252(0x80-0xFF) to Unicode conversion table */ - 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, - 0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000, - 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, - 0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178, - 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, - 0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, - 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, - 0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, - 0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7, - 0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF, - 0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7, - 0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x00DD, 0x00DE, 0x00DF, - 0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7, - 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF, - 0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7, - 0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF -}; - -#elif _CODE_PAGE == 1253 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP1253(0x80-0xFF) to Unicode conversion table */ - 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, - 0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000, - 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, - 0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000, - 0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, - 0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015, - 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7, - 0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F, - 0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, - 0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, - 0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, - 0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF, - 0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, - 0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, - 0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7, - 0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000 -}; - -#elif _CODE_PAGE == 1254 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP1254(0x80-0xFF) to Unicode conversion table */ - 0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, - 0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000, - 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, - 0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178, - 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, - 0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, - 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, - 0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, - 0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7, - 0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF, - 0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7, - 0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF, - 0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7, - 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF, - 0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7, - 0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF -}; - -#elif _CODE_PAGE == 1255 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP1255(0x80-0xFF) to Unicode conversion table */ - 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, - 0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, - 0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000, - 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, - 0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, - 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, - 0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, - 0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7, - 0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF, - 0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3, - 0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7, - 0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF, - 0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7, - 0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000 -}; - -#elif _CODE_PAGE == 1256 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP1256(0x80-0xFF) to Unicode conversion table */ - 0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, - 0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688, - 0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, - 0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA, - 0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, - 0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, - 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, - 0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F, - 0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627, - 0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F, - 0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7, - 0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643, - 0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7, - 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF, - 0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7, - 0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2 -} - -#elif _CODE_PAGE == 1257 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP1257(0x80-0xFF) to Unicode conversion table */ - 0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021, - 0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8, - 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, - 0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000, - 0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7, - 0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, - 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, - 0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6, - 0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112, - 0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B, - 0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7, - 0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF, - 0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113, - 0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C, - 0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7, - 0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9 -}; - -#elif _CODE_PAGE == 1258 -#define _TBLDEF 1 -static -const uint16_t Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */ - 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, - 0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000, - 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, - 0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178, - 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, - 0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, - 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, - 0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, - 0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7, - 0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF, - 0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7, - 0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF, - 0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7, - 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF, - 0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7, - 0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF -}; - -#endif - - -#if !_TBLDEF || !_USE_LFN -#error This file is not needed in current configuration. Remove from the project. -#endif - - -uint16_t ff_convert ( /* Converted character, Returns zero on error */ - uint16_t src, /* Character code to be converted */ - uint32_t dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ -) -{ - uint16_t c; - - - if (src < 0x80) { /* ASCII */ - c = src; - - } else { - if (dir) { /* OEMCP to Unicode */ - c = (src >= 0x100) ? 0 : Tbl[src - 0x80]; - - } else { /* Unicode to OEMCP */ - for (c = 0; c < 0x80; c++) { - if (src == Tbl[c]) break; - } - c = (c + 0x80) & 0xFF; - } - } - - return c; -} - - -uint16_t ff_wtoupper ( /* Upper converted character */ - uint16_t chr /* Input character */ -) -{ - static const uint16_t tbl_lower[] = { 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0xA1, 0x00A2, 0x00A3, 0x00A5, 0x00AC, 0x00AF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0x0FF, 0x101, 0x103, 0x105, 0x107, 0x109, 0x10B, 0x10D, 0x10F, 0x111, 0x113, 0x115, 0x117, 0x119, 0x11B, 0x11D, 0x11F, 0x121, 0x123, 0x125, 0x127, 0x129, 0x12B, 0x12D, 0x12F, 0x131, 0x133, 0x135, 0x137, 0x13A, 0x13C, 0x13E, 0x140, 0x142, 0x144, 0x146, 0x148, 0x14B, 0x14D, 0x14F, 0x151, 0x153, 0x155, 0x157, 0x159, 0x15B, 0x15D, 0x15F, 0x161, 0x163, 0x165, 0x167, 0x169, 0x16B, 0x16D, 0x16F, 0x171, 0x173, 0x175, 0x177, 0x17A, 0x17C, 0x17E, 0x192, 0x3B1, 0x3B2, 0x3B3, 0x3B4, 0x3B5, 0x3B6, 0x3B7, 0x3B8, 0x3B9, 0x3BA, 0x3BB, 0x3BC, 0x3BD, 0x3BE, 0x3BF, 0x3C0, 0x3C1, 0x3C3, 0x3C4, 0x3C5, 0x3C6, 0x3C7, 0x3C8, 0x3C9, 0x3CA, 0x430, 0x431, 0x432, 0x433, 0x434, 0x435, 0x436, 0x437, 0x438, 0x439, 0x43A, 0x43B, 0x43C, 0x43D, 0x43E, 0x43F, 0x440, 0x441, 0x442, 0x443, 0x444, 0x445, 0x446, 0x447, 0x448, 0x449, 0x44A, 0x44B, 0x44C, 0x44D, 0x44E, 0x44F, 0x451, 0x452, 0x453, 0x454, 0x455, 0x456, 0x457, 0x458, 0x459, 0x45A, 0x45B, 0x45C, 0x45E, 0x45F, 0x2170, 0x2171, 0x2172, 0x2173, 0x2174, 0x2175, 0x2176, 0x2177, 0x2178, 0x2179, 0x217A, 0x217B, 0x217C, 0x217D, 0x217E, 0x217F, 0xFF41, 0xFF42, 0xFF43, 0xFF44, 0xFF45, 0xFF46, 0xFF47, 0xFF48, 0xFF49, 0xFF4A, 0xFF4B, 0xFF4C, 0xFF4D, 0xFF4E, 0xFF4F, 0xFF50, 0xFF51, 0xFF52, 0xFF53, 0xFF54, 0xFF55, 0xFF56, 0xFF57, 0xFF58, 0xFF59, 0xFF5A, 0 }; - static const uint16_t tbl_upper[] = { 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x21, 0xFFE0, 0xFFE1, 0xFFE5, 0xFFE2, 0xFFE3, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0x178, 0x100, 0x102, 0x104, 0x106, 0x108, 0x10A, 0x10C, 0x10E, 0x110, 0x112, 0x114, 0x116, 0x118, 0x11A, 0x11C, 0x11E, 0x120, 0x122, 0x124, 0x126, 0x128, 0x12A, 0x12C, 0x12E, 0x130, 0x132, 0x134, 0x136, 0x139, 0x13B, 0x13D, 0x13F, 0x141, 0x143, 0x145, 0x147, 0x14A, 0x14C, 0x14E, 0x150, 0x152, 0x154, 0x156, 0x158, 0x15A, 0x15C, 0x15E, 0x160, 0x162, 0x164, 0x166, 0x168, 0x16A, 0x16C, 0x16E, 0x170, 0x172, 0x174, 0x176, 0x179, 0x17B, 0x17D, 0x191, 0x391, 0x392, 0x393, 0x394, 0x395, 0x396, 0x397, 0x398, 0x399, 0x39A, 0x39B, 0x39C, 0x39D, 0x39E, 0x39F, 0x3A0, 0x3A1, 0x3A3, 0x3A4, 0x3A5, 0x3A6, 0x3A7, 0x3A8, 0x3A9, 0x3AA, 0x410, 0x411, 0x412, 0x413, 0x414, 0x415, 0x416, 0x417, 0x418, 0x419, 0x41A, 0x41B, 0x41C, 0x41D, 0x41E, 0x41F, 0x420, 0x421, 0x422, 0x423, 0x424, 0x425, 0x426, 0x427, 0x428, 0x429, 0x42A, 0x42B, 0x42C, 0x42D, 0x42E, 0x42F, 0x401, 0x402, 0x403, 0x404, 0x405, 0x406, 0x407, 0x408, 0x409, 0x40A, 0x40B, 0x40C, 0x40E, 0x40F, 0x2160, 0x2161, 0x2162, 0x2163, 0x2164, 0x2165, 0x2166, 0x2167, 0x2168, 0x2169, 0x216A, 0x216B, 0x216C, 0x216D, 0x216E, 0x216F, 0xFF21, 0xFF22, 0xFF23, 0xFF24, 0xFF25, 0xFF26, 0xFF27, 0xFF28, 0xFF29, 0xFF2A, 0xFF2B, 0xFF2C, 0xFF2D, 0xFF2E, 0xFF2F, 0xFF30, 0xFF31, 0xFF32, 0xFF33, 0xFF34, 0xFF35, 0xFF36, 0xFF37, 0xFF38, 0xFF39, 0xFF3A, 0 }; - int i; - - - for (i = 0; tbl_lower[i] && chr != tbl_lower[i]; i++) ; - - return tbl_lower[i] ? tbl_upper[i] : chr; -} diff --git a/fs/ff.c b/fs/ff.c deleted file mode 100644 index 2699aae..0000000 --- a/fs/ff.c +++ /dev/null @@ -1,4158 +0,0 @@ -/*----------------------------------------------------------------------------/ -/ FatFs - FAT file system module R0.09a (C)ChaN, 2012 -/-----------------------------------------------------------------------------/ -/ FatFs module is a generic FAT file system module for small embedded systems. -/ This is a free software that opened for education, research and commercial -/ developments under license policy of following terms. -/ -/ Copyright (C) 2012, ChaN, all right reserved. -/ -/ * The FatFs module is a free software and there is NO WARRANTY. -/ * No restriction on use. You can use, modify and redistribute it for -/ personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY. -/ * Redistributions of source code must retain the above copyright notice. -/ -/-----------------------------------------------------------------------------/ -/ Feb 26,'06 R0.00 Prototype. -/ -/ Apr 29,'06 R0.01 First stable version. -/ -/ Jun 01,'06 R0.02 Added FAT12 support. -/ Removed unbuffered mode. -/ Fixed a problem on small (<32M) partition. -/ Jun 10,'06 R0.02a Added a configuration option (_FS_MINIMUM). -/ -/ Sep 22,'06 R0.03 Added f_rename(). -/ Changed option _FS_MINIMUM to _FS_MINIMIZE. -/ Dec 11,'06 R0.03a Improved cluster scan algorithm to write files fast. -/ Fixed f_mkdir() creates incorrect directory on FAT32. -/ -/ Feb 04,'07 R0.04 Supported multiple drive system. -/ Changed some interfaces for multiple drive system. -/ Changed f_mountdrv() to f_mount(). -/ Added f_mkfs(). -/ Apr 01,'07 R0.04a Supported multiple partitions on a physical drive. -/ Added a capability of extending file size to f_lseek(). -/ Added minimization level 3. -/ Fixed an endian sensitive code in f_mkfs(). -/ May 05,'07 R0.04b Added a configuration option _USE_NTFLAG. -/ Added FSInfo support. -/ Fixed DBCS name can result FR_INVALID_NAME. -/ Fixed short seek (<= csize) collapses the file object. -/ -/ Aug 25,'07 R0.05 Changed arguments of f_read(), f_write() and f_mkfs(). -/ Fixed f_mkfs() on FAT32 creates incorrect FSInfo. -/ Fixed f_mkdir() on FAT32 creates incorrect directory. -/ Feb 03,'08 R0.05a Added f_truncate() and f_utime(). -/ Fixed off by one error at FAT sub-type determination. -/ Fixed btr in f_read() can be mistruncated. -/ Fixed cached sector is not flushed when create and close without write. -/ -/ Apr 01,'08 R0.06 Added fputc(), fputs(), fprintf() and fgets(). -/ Improved performance of f_lseek() on moving to the same or following cluster. -/ -/ Apr 01,'09 R0.07 Merged Tiny-FatFs as a configuration option. (_FS_TINY) -/ Added long file name feature. -/ Added multiple code page feature. -/ Added re-entrancy for multitask operation. -/ Added auto cluster size selection to f_mkfs(). -/ Added rewind option to f_readdir(). -/ Changed result code of critical errors. -/ Renamed string functions to avoid name collision. -/ Apr 14,'09 R0.07a Separated out OS dependent code on reentrant cfg. -/ Added multiple sector size feature. -/ Jun 21,'09 R0.07c Fixed f_unlink() can return FR_OK on error. -/ Fixed wrong cache control in f_lseek(). -/ Added relative path feature. -/ Added f_chdir() and f_chdrive(). -/ Added proper case conversion to extended char. -/ Nov 03,'09 R0.07e Separated out configuration options from ff.h to ffconf.h. -/ Fixed f_unlink() fails to remove a sub-dir on _FS_RPATH. -/ Fixed name matching error on the 13 char boundary. -/ Added a configuration option, _LFN_UNICODE. -/ Changed f_readdir() to return the SFN with always upper case on non-LFN cfg. -/ -/ May 15,'10 R0.08 Added a memory configuration option. (_USE_LFN = 3) -/ Added file lock feature. (_FS_SHARE) -/ Added fast seek feature. (_USE_FASTSEEK) -/ Changed some types on the API, XCHAR->TCHAR. -/ Changed fname member in the FILINFO structure on Unicode cfg. -/ String functions support UTF-8 encoding files on Unicode cfg. -/ Aug 16,'10 R0.08a Added f_getcwd(). (_FS_RPATH = 2) -/ Added sector erase feature. (_USE_ERASE) -/ Moved file lock semaphore table from fs object to the bss. -/ Fixed a wrong directory entry is created on non-LFN cfg when the given name contains ';'. -/ Fixed f_mkfs() creates wrong FAT32 volume. -/ Jan 15,'11 R0.08b Fast seek feature is also applied to f_read() and f_write(). -/ f_lseek() reports required table size on creating CLMP. -/ Extended format syntax of f_printf function. -/ Ignores duplicated directory separators in given path name. -/ -/ Sep 06,'11 R0.09 f_mkfs() supports multiple partition to finish the multiple partition feature. -/ Added f_fdisk(). (_MULTI_PARTITION = 2) -/ Aug 27,'12 R0.09a Fixed assertion failure due to OS/2 EA on FAT12/16 volume. -/ Changed f_open() and f_opendir reject null object pointer to avoid crash. -/ Changed option name _FS_SHARE to _FS_LOCK. -/---------------------------------------------------------------------------*/ - -#include -#include /* FatFs configurations and declarations */ -#include /* Declarations of low level disk I/O functions */ - - -/*-------------------------------------------------------------------------- - - Module Private Definitions - ----------------------------------------------------------------------------*/ - -#if _FATFS != 4004 /* Revision ID */ -#error Wrong include file (ff.h). -#endif - - -/* Definitions on sector size */ -#if _MAX_SS != 512 && _MAX_SS != 1024 && _MAX_SS != 2048 && _MAX_SS != 4096 -#error Wrong sector size. -#endif -#if _MAX_SS != 512 -#define SS(fs) ((fs)->ssize) /* Variable sector size */ -#else -#define SS(fs) 512U /* Fixed sector size */ -#endif - - -/* Reentrancy related */ -#if _FS_REENTRANT -#if _USE_LFN == 1 -#error Static LFN work area must not be used in re-entrant configuration. -#endif -#define ENTER_FF(fs) { if (!lock_fs(fs)) return FR_TIMEOUT; } -#define LEAVE_FF(fs, res) { unlock_fs(fs, res); return res; } -#else -#define ENTER_FF(fs) -#define LEAVE_FF(fs, res) return res -#endif - -#define ABORT(fs, res) { fp->flag |= FA__ERROR; LEAVE_FF(fs, res); } - - -/* File access control feature */ -#if _FS_LOCK -#if _FS_READONLY -#error _FS_LOCK must be 0 on read-only cfg. -#endif -typedef struct { - FATFS *fs; /* File ID 1, volume (NULL:blank entry) */ - uint32_t clu; /* File ID 2, directory */ - uint16_t idx; /* File ID 3, directory index */ - uint16_t ctr; /* File open counter, 0:none, 0x01..0xFF:read open count, 0x100:write mode */ -} FILESEM; -#endif - - - -/* DBCS code ranges and SBCS extend char conversion table */ - -#if _CODE_PAGE == 932 /* Japanese Shift-JIS */ -#define _DF1S 0x81 /* DBC 1st byte range 1 start */ -#define _DF1E 0x9F /* DBC 1st byte range 1 end */ -#define _DF2S 0xE0 /* DBC 1st byte range 2 start */ -#define _DF2E 0xFC /* DBC 1st byte range 2 end */ -#define _DS1S 0x40 /* DBC 2nd byte range 1 start */ -#define _DS1E 0x7E /* DBC 2nd byte range 1 end */ -#define _DS2S 0x80 /* DBC 2nd byte range 2 start */ -#define _DS2E 0xFC /* DBC 2nd byte range 2 end */ - -#elif _CODE_PAGE == 936 /* Simplified Chinese GBK */ -#define _DF1S 0x81 -#define _DF1E 0xFE -#define _DS1S 0x40 -#define _DS1E 0x7E -#define _DS2S 0x80 -#define _DS2E 0xFE - -#elif _CODE_PAGE == 949 /* Korean */ -#define _DF1S 0x81 -#define _DF1E 0xFE -#define _DS1S 0x41 -#define _DS1E 0x5A -#define _DS2S 0x61 -#define _DS2E 0x7A -#define _DS3S 0x81 -#define _DS3E 0xFE - -#elif _CODE_PAGE == 950 /* Traditional Chinese Big5 */ -#define _DF1S 0x81 -#define _DF1E 0xFE -#define _DS1S 0x40 -#define _DS1E 0x7E -#define _DS2S 0xA1 -#define _DS2E 0xFE - -#elif _CODE_PAGE == 437 /* U.S. (OEM) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F,0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 720 /* Arabic (OEM) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x45,0x41,0x84,0x41,0x86,0x43,0x45,0x45,0x45,0x49,0x49,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x49,0x49,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 737 /* Greek (OEM) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x92,0x92,0x93,0x94,0x95,0x96,0x97,0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87, \ - 0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0xAA,0x92,0x93,0x94,0x95,0x96,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0x97,0xEA,0xEB,0xEC,0xE4,0xED,0xEE,0xE7,0xE8,0xF1,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 775 /* Baltic (OEM) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x9A,0x91,0xA0,0x8E,0x95,0x8F,0x80,0xAD,0xED,0x8A,0x8A,0xA1,0x8D,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0x95,0x96,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \ - 0xA0,0xA1,0xE0,0xA3,0xA3,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xA5,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE3,0xE8,0xE8,0xEA,0xEA,0xEE,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 850 /* Multilingual Latin 1 (OEM) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \ - 0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 852 /* Latin 2 (OEM) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xDE,0x8F,0x80,0x9D,0xD3,0x8A,0x8A,0xD7,0x8D,0x8E,0x8F,0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0x9F, \ - 0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD2,0xD5,0xD6,0xD7,0xB7,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE3,0xD5,0xE6,0xE6,0xE8,0xE9,0xE8,0xEB,0xED,0xED,0xDD,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xEB,0xFC,0xFC,0xFE,0xFF} - -#elif _CODE_PAGE == 855 /* Cyrillic (OEM) */ -#define _DF1S 0 -#define _EXCVT {0x81,0x81,0x83,0x83,0x85,0x85,0x87,0x87,0x89,0x89,0x8B,0x8B,0x8D,0x8D,0x8F,0x8F,0x91,0x91,0x93,0x93,0x95,0x95,0x97,0x97,0x99,0x99,0x9B,0x9B,0x9D,0x9D,0x9F,0x9F, \ - 0xA1,0xA1,0xA3,0xA3,0xA5,0xA5,0xA7,0xA7,0xA9,0xA9,0xAB,0xAB,0xAD,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB6,0xB6,0xB8,0xB8,0xB9,0xBA,0xBB,0xBC,0xBE,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD3,0xD3,0xD5,0xD5,0xD7,0xD7,0xDD,0xD9,0xDA,0xDB,0xDC,0xDD,0xE0,0xDF, \ - 0xE0,0xE2,0xE2,0xE4,0xE4,0xE6,0xE6,0xE8,0xE8,0xEA,0xEA,0xEC,0xEC,0xEE,0xEE,0xEF,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 857 /* Turkish (OEM) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0x98,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x98,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9E, \ - 0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA6,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xDE,0x59,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 858 /* Multilingual Latin 1 + Euro (OEM) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0xDE,0x8E,0x8F,0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x59,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \ - 0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD1,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE7,0xE9,0xEA,0xEB,0xED,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 862 /* Hebrew (OEM) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0x21,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 866 /* Russian (OEM) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0x90,0x91,0x92,0x93,0x9d,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F,0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 874 /* Thai (OEM, Windows) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 1250 /* Central Europe (Windows) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \ - 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xA3,0xB4,0xB5,0xB6,0xB7,0xB8,0xA5,0xAA,0xBB,0xBC,0xBD,0xBC,0xAF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF} - -#elif _CODE_PAGE == 1251 /* Cyrillic (Windows) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x82,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x80,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x8D,0x8E,0x8F, \ - 0xA0,0xA2,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB2,0xA5,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xA3,0xBD,0xBD,0xAF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF} - -#elif _CODE_PAGE == 1252 /* Latin 1 (Windows) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0xAd,0x9B,0x8C,0x9D,0xAE,0x9F, \ - 0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F} - -#elif _CODE_PAGE == 1253 /* Greek (Windows) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xA2,0xB8,0xB9,0xBA, \ - 0xE0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xFB,0xBC,0xFD,0xBF,0xFF} - -#elif _CODE_PAGE == 1254 /* Turkish (Windows) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x8A,0x9B,0x8C,0x9D,0x9E,0x9F, \ - 0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0x9F} - -#elif _CODE_PAGE == 1255 /* Hebrew (Windows) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 1256 /* Arabic (Windows) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x8C,0x9D,0x9E,0x9F, \ - 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0x41,0xE1,0x41,0xE3,0xE4,0xE5,0xE6,0x43,0x45,0x45,0x45,0x45,0xEC,0xED,0x49,0x49,0xF0,0xF1,0xF2,0xF3,0x4F,0xF5,0xF6,0xF7,0xF8,0x55,0xFA,0x55,0x55,0xFD,0xFE,0xFF} - -#elif _CODE_PAGE == 1257 /* Baltic (Windows) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xA8,0xB9,0xAA,0xBB,0xBC,0xBD,0xBE,0xAF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xFF} - -#elif _CODE_PAGE == 1258 /* Vietnam (OEM, Windows) */ -#define _DF1S 0 -#define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0xAC,0x9D,0x9E,0x9F, \ - 0xA0,0x21,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xEC,0xCD,0xCE,0xCF,0xD0,0xD1,0xF2,0xD3,0xD4,0xD5,0xD6,0xF7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xFE,0x9F} - -#elif _CODE_PAGE == 1 /* ASCII (for only non-LFN cfg) */ -#if _USE_LFN -#error Cannot use LFN feature without valid code page. -#endif -#define _DF1S 0 - -#else -#error Unknown code page - -#endif - - -/*---------------------------------------------------------*/ -/* User Provided Timer Function for FatFs module */ -/*---------------------------------------------------------*/ - -uint32_t get_fattime (void) -{ - return ((uint32_t)(2012 - 1980) << 25) /* Year = 2012 */ - | ((uint32_t)1 << 21) /* Month = 1 */ - | ((uint32_t)1 << 16) /* Day_m = 1*/ - | ((uint32_t)0 << 11) /* Hour = 0 */ - | ((uint32_t)0 << 5) /* Min = 0 */ - | ((uint32_t)0 >> 1); /* Sec = 0 */ -} - -/* Character code support macros */ -#define IsUpper(c) (((c)>='A')&&((c)<='Z')) -#define IsLower(c) (((c)>='a')&&((c)<='z')) -#define IsDigit(c) (((c)>='0')&&((c)<='9')) - -#if _DF1S /* Code page is DBCS */ - -#ifdef _DF2S /* Two 1st byte areas */ -#define IsDBCS1(c) (((uint8_t)(c) >= _DF1S && (uint8_t)(c) <= _DF1E) || ((uint8_t)(c) >= _DF2S && (uint8_t)(c) <= _DF2E)) -#else /* One 1st byte area */ -#define IsDBCS1(c) ((uint8_t)(c) >= _DF1S && (uint8_t)(c) <= _DF1E) -#endif - -#ifdef _DS3S /* Three 2nd byte areas */ -#define IsDBCS2(c) (((uint8_t)(c) >= _DS1S && (uint8_t)(c) <= _DS1E) || ((uint8_t)(c) >= _DS2S && (uint8_t)(c) <= _DS2E) || ((uint8_t)(c) >= _DS3S && (uint8_t)(c) <= _DS3E)) -#else /* Two 2nd byte areas */ -#define IsDBCS2(c) (((uint8_t)(c) >= _DS1S && (uint8_t)(c) <= _DS1E) || ((uint8_t)(c) >= _DS2S && (uint8_t)(c) <= _DS2E)) -#endif - -#else /* Code page is SBCS */ - -#define IsDBCS1(c) 0 -#define IsDBCS2(c) 0 - -#endif /* _DF1S */ - - -/* Name status flags */ -#define NS 11 /* Index of name status byte in fn[] */ -#define NS_LOSS 0x01 /* Out of 8.3 format */ -#define NS_LFN 0x02 /* Force to create LFN entry */ -#define NS_LAST 0x04 /* Last segment */ -#define NS_BODY 0x08 /* Lower case flag (body) */ -#define NS_EXT 0x10 /* Lower case flag (ext) */ -#define NS_DOT 0x20 /* Dot entry */ - - -/* FAT sub-type boundaries */ -/* Note that the FAT spec by Microsoft says 4085 but Windows works with 4087! */ -#define MIN_FAT16 4086 /* Minimum number of clusters for FAT16 */ -#define MIN_FAT32 65526 /* Minimum number of clusters for FAT32 */ - - -/* FatFs refers the members in the FAT structures as byte array instead of -/ structure member because the structure is not binary compatible between -/ different platforms */ - -#define BS_jmpBoot 0 /* Jump instruction (3) */ -#define BS_OEMName 3 /* OEM name (8) */ -#define BPB_BytsPerSec 11 /* Sector size [byte] (2) */ -#define BPB_SecPerClus 13 /* Cluster size [sector] (1) */ -#define BPB_RsvdSecCnt 14 /* Size of reserved area [sector] (2) */ -#define BPB_NumFATs 16 /* Number of FAT copies (1) */ -#define BPB_RootEntCnt 17 /* Number of root dir entries for FAT12/16 (2) */ -#define BPB_TotSec16 19 /* Volume size [sector] (2) */ -#define BPB_Media 21 /* Media descriptor (1) */ -#define BPB_FATSz16 22 /* FAT size [sector] (2) */ -#define BPB_SecPerTrk 24 /* Track size [sector] (2) */ -#define BPB_NumHeads 26 /* Number of heads (2) */ -#define BPB_HiddSec 28 /* Number of special hidden sectors (4) */ -#define BPB_TotSec32 32 /* Volume size [sector] (4) */ -#define BS_DrvNum 36 /* Physical drive number (2) */ -#define BS_BootSig 38 /* Extended boot signature (1) */ -#define BS_VolID 39 /* Volume serial number (4) */ -#define BS_VolLab 43 /* Volume label (8) */ -#define BS_FilSysType 54 /* File system type (1) */ -#define BPB_FATSz32 36 /* FAT size [sector] (4) */ -#define BPB_ExtFlags 40 /* Extended flags (2) */ -#define BPB_FSVer 42 /* File system version (2) */ -#define BPB_RootClus 44 /* Root dir first cluster (4) */ -#define BPB_FSInfo 48 /* Offset of FSInfo sector (2) */ -#define BPB_BkBootSec 50 /* Offset of backup boot sector (2) */ -#define BS_DrvNum32 64 /* Physical drive number (2) */ -#define BS_BootSig32 66 /* Extended boot signature (1) */ -#define BS_VolID32 67 /* Volume serial number (4) */ -#define BS_VolLab32 71 /* Volume label (8) */ -#define BS_FilSysType32 82 /* File system type (1) */ -#define FSI_LeadSig 0 /* FSI: Leading signature (4) */ -#define FSI_StrucSig 484 /* FSI: Structure signature (4) */ -#define FSI_Free_Count 488 /* FSI: Number of free clusters (4) */ -#define FSI_Nxt_Free 492 /* FSI: Last allocated cluster (4) */ -#define MBR_Table 446 /* MBR: Partition table offset (2) */ -#define SZ_PTE 16 /* MBR: Size of a partition table entry */ -#define BS_55AA 510 /* Boot sector signature (2) */ - -#define DIR_Name 0 /* Short file name (11) */ -#define DIR_Attr 11 /* Attribute (1) */ -#define DIR_NTres 12 /* NT flag (1) */ -#define DIR_CrtTimeTenth 13 /* Created time sub-second (1) */ -#define DIR_CrtTime 14 /* Created time (2) */ -#define DIR_CrtDate 16 /* Created date (2) */ -#define DIR_LstAccDate 18 /* Last accessed date (2) */ -#define DIR_FstClusHI 20 /* Higher 16-bit of first cluster (2) */ -#define DIR_WrtTime 22 /* Modified time (2) */ -#define DIR_WrtDate 24 /* Modified date (2) */ -#define DIR_FstClusLO 26 /* Lower 16-bit of first cluster (2) */ -#define DIR_FileSize 28 /* File size (4) */ -#define LDIR_Ord 0 /* LFN entry order and LLE flag (1) */ -#define LDIR_Attr 11 /* LFN attribute (1) */ -#define LDIR_Type 12 /* LFN type (1) */ -#define LDIR_Chksum 13 /* Sum of corresponding SFN entry */ -#define LDIR_FstClusLO 26 /* Filled by zero (0) */ -#define SZ_DIR 32 /* Size of a directory entry */ -#define LLE 0x40 /* Last long entry flag in LDIR_Ord */ -#define DDE 0xE5 /* Deleted directory entry mark in DIR_Name[0] */ -#define NDDE 0x05 /* Replacement of the character collides with DDE */ - - -/*------------------------------------------------------------*/ -/* Module private work area */ -/*------------------------------------------------------------*/ -/* Note that uninitialized variables with static duration are -/ zeroed/nulled at start-up. If not, the compiler or start-up -/ routine is out of ANSI-C standard. -*/ - -#if _VOLUMES -static -FATFS *FatFs[_VOLUMES]; /* Pointer to the file system objects (logical drives) */ -#else -#error Number of volumes must not be 0. -#endif - -static -uint16_t Fsid; /* File system mount ID */ - -#if _FS_RPATH -static -uint8_t CurrVol; /* Current drive */ -#endif - -#if _FS_LOCK -static -FILESEM Files[_FS_LOCK]; /* File lock semaphores */ -#endif - -#if _USE_LFN == 0 /* No LFN feature */ -#define DEF_NAMEBUF uint8_t sfn[12] -#define INIT_BUF(dobj) (dobj).fn = sfn -#define FREE_BUF() - -#elif _USE_LFN == 1 /* LFN feature with static working buffer */ -static uint16_t LfnBuf[_MAX_LFN+1]; -#define DEF_NAMEBUF uint8_t sfn[12] -#define INIT_BUF(dobj) { (dobj).fn = sfn; (dobj).lfn = LfnBuf; } -#define FREE_BUF() - -#elif _USE_LFN == 2 /* LFN feature with dynamic working buffer on the stack */ -#define DEF_NAMEBUF uint8_t sfn[12]; uint16_t lbuf[_MAX_LFN+1] -#define INIT_BUF(dobj) { (dobj).fn = sfn; (dobj).lfn = lbuf; } -#define FREE_BUF() - -#elif _USE_LFN == 3 /* LFN feature with dynamic working buffer on the heap */ -#define DEF_NAMEBUF uint8_t sfn[12]; WCHAR *lfn -#define INIT_BUF(dobj) { lfn = ff_memalloc((_MAX_LFN + 1) * 2); \ - if (!lfn) LEAVE_FF((dobj).fs, FR_NOT_ENOUGH_CORE); \ - (dobj).lfn = lfn; (dobj).fn = sfn; } -#define FREE_BUF() ff_memfree(lfn) - -#else -#error Wrong LFN configuration. -#endif - - - - -/*-------------------------------------------------------------------------- - - Module Private Functions - ----------------------------------------------------------------------------*/ - - -/*-----------------------------------------------------------------------*/ -/* String functions */ -/*-----------------------------------------------------------------------*/ - -/* Copy memory to memory */ -static -void mem_cpy (void* dst, const void* src, uint32_t cnt) { - uint8_t *d = (uint8_t*)dst; - const uint8_t *s = (const uint8_t*)src; - -#if _WORD_ACCESS == 1 - while (cnt >= sizeof (int)) { - *(int*)d = *(int*)s; - d += sizeof (int); s += sizeof (int); - cnt -= sizeof (int); - } -#endif - while (cnt--) - *d++ = *s++; -} - -/* Fill memory */ -static -void mem_set (void* dst, int val, uint32_t cnt) { - uint8_t *d = (uint8_t*)dst; - - while (cnt--) - *d++ = (uint8_t)val; -} - -/* Compare memory to memory */ -static -int mem_cmp (const void* dst, const void* src, uint32_t cnt) { - const uint8_t *d = (const uint8_t *)dst, *s = (const uint8_t *)src; - int r = 0; - - while (cnt-- && (r = *d++ - *s++) == 0) ; - return r; -} - -/* Check if chr is contained in the string */ -static -int chk_chr (const char* str, int chr) { - while (*str && *str != chr) str++; - return *str; -} - - - -/*-----------------------------------------------------------------------*/ -/* Request/Release grant to access the volume */ -/*-----------------------------------------------------------------------*/ -#if _FS_REENTRANT - -static -int lock_fs ( - FATFS *fs /* File system object */ -) -{ - return ff_req_grant(fs->sobj); -} - - -static -void unlock_fs ( - FATFS *fs, /* File system object */ - FRESULT res /* Result code to be returned */ -) -{ - if (fs && - res != FR_NOT_ENABLED && - res != FR_INVALID_DRIVE && - res != FR_INVALID_OBJECT && - res != FR_TIMEOUT) { - ff_rel_grant(fs->sobj); - } -} -#endif - - - -/*-----------------------------------------------------------------------*/ -/* File lock control functions */ -/*-----------------------------------------------------------------------*/ -#if _FS_LOCK - -static -FRESULT chk_lock ( /* Check if the file can be accessed */ - DIR* dj, /* Directory object pointing the file to be checked */ - int acc /* Desired access (0:Read, 1:Write, 2:Delete/Rename) */ -) -{ - uint32_t i, be; - - /* Search file semaphore table */ - for (i = be = 0; i < _FS_LOCK; i++) { - if (Files[i].fs) { /* Existing entry */ - if (Files[i].fs == dj->fs && /* Check if the file matched with an open file */ - Files[i].clu == dj->sclust && - Files[i].idx == dj->index) break; - } else { /* Blank entry */ - be++; - } - } - if (i == _FS_LOCK) /* The file is not opened */ - return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new file? */ - - /* The file has been opened. Reject any open against writing file and all write mode open */ - return (acc || Files[i].ctr == 0x100) ? FR_LOCKED : FR_OK; -} - - -static -int enq_lock (void) /* Check if an entry is available for a new file */ -{ - uint32_t i; - - for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ; - return (i == _FS_LOCK) ? 0 : 1; -} - - -static -uint32_t inc_lock ( /* Increment file open counter and returns its index (0:int error) */ - DIR* dj, /* Directory object pointing the file to register or increment */ - int acc /* Desired access mode (0:Read, !0:Write) */ -) -{ - uint32_t i; - - - for (i = 0; i < _FS_LOCK; i++) { /* Find the file */ - if (Files[i].fs == dj->fs && - Files[i].clu == dj->sclust && - Files[i].idx == dj->index) break; - } - - if (i == _FS_LOCK) { /* Not opened. Register it as new. */ - for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ; - if (i == _FS_LOCK) return 0; /* No space to register (int err) */ - Files[i].fs = dj->fs; - Files[i].clu = dj->sclust; - Files[i].idx = dj->index; - Files[i].ctr = 0; - } - - if (acc && Files[i].ctr) return 0; /* Access violation (int err) */ - - Files[i].ctr = acc ? 0x100 : Files[i].ctr + 1; /* Set semaphore value */ - - return i + 1; -} - - -static -FRESULT dec_lock ( /* Decrement file open counter */ - uint32_t i /* Semaphore index */ -) -{ - uint16_t n; - FRESULT res; - - - if (--i < _FS_LOCK) { - n = Files[i].ctr; - if (n == 0x100) n = 0; - if (n) n--; - Files[i].ctr = n; - if (!n) Files[i].fs = 0; - res = FR_OK; - } else { - res = FR_INT_ERR; - } - return res; -} - - -static -void clear_lock ( /* Clear lock entries of the volume */ - FATFS *fs -) -{ - uint32_t i; - - for (i = 0; i < _FS_LOCK; i++) { - if (Files[i].fs == fs) Files[i].fs = 0; - } -} -#endif - - - -/*-----------------------------------------------------------------------*/ -/* Change window offset */ -/*-----------------------------------------------------------------------*/ - -static -FRESULT move_window ( - FATFS *fs, /* File system object */ - uint32_t sector /* Sector number to make appearance in the fs->win[] */ -) /* Move to zero only writes back dirty window */ -{ - uint32_t wsect; - - - wsect = fs->winsect; - if (wsect != sector) { /* Changed current window */ -#if !_FS_READONLY - if (fs->wflag) { /* Write back dirty window if needed */ - if (disk_write(fs->drv, fs->win, wsect, 1) != RES_OK) - return FR_DISK_ERR; - fs->wflag = 0; - if (wsect < (fs->fatbase + fs->fsize)) { /* In FAT area */ - uint8_t nf; - for (nf = fs->n_fats; nf > 1; nf--) { /* Reflect the change to all FAT copies */ - wsect += fs->fsize; - disk_write(fs->drv, fs->win, wsect, 1); - } - } - } -#endif - if (sector) { - if (disk_read(fs->drv, fs->win, sector, 1) != RES_OK) - return FR_DISK_ERR; - fs->winsect = sector; - } - } - - return FR_OK; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Clean-up cached data */ -/*-----------------------------------------------------------------------*/ -#if !_FS_READONLY -static -FRESULT sync ( /* FR_OK: successful, FR_DISK_ERR: failed */ - FATFS *fs /* File system object */ -) -{ - FRESULT res; - - - res = move_window(fs, 0); - if (res == FR_OK) { - /* Update FSInfo sector if needed */ - if (fs->fs_type == FS_FAT32 && fs->fsi_flag) { - fs->winsect = 0; - /* Create FSInfo structure */ - mem_set(fs->win, 0, 512); - ST_WORD(fs->win+BS_55AA, 0xAA55); - ST_DWORD(fs->win+FSI_LeadSig, 0x41615252); - ST_DWORD(fs->win+FSI_StrucSig, 0x61417272); - ST_DWORD(fs->win+FSI_Free_Count, fs->free_clust); - ST_DWORD(fs->win+FSI_Nxt_Free, fs->last_clust); - /* Write it into the FSInfo sector */ - disk_write(fs->drv, fs->win, fs->fsi_sector, 1); - fs->fsi_flag = 0; - } - /* Make sure that no pending write process in the physical drive */ - if (disk_ioctl(fs->drv, CTRL_SYNC, 0) != RES_OK) - res = FR_DISK_ERR; - } - - return res; -} -#endif - - - - -/*-----------------------------------------------------------------------*/ -/* Get sector# from cluster# */ -/*-----------------------------------------------------------------------*/ - - -uint32_t clust2sect ( /* !=0: Sector number, 0: Failed - invalid cluster# */ - FATFS *fs, /* File system object */ - uint32_t clst /* Cluster# to be converted */ -) -{ - clst -= 2; - if (clst >= (fs->n_fatent - 2)) return 0; /* Invalid cluster# */ - return clst * fs->csize + fs->database; -} - - - - -/*-----------------------------------------------------------------------*/ -/* FAT access - Read value of a FAT entry */ -/*-----------------------------------------------------------------------*/ - - -uint32_t get_fat ( /* 0xFFFFFFFF:Disk error, 1:Internal error, Else:Cluster status */ - FATFS *fs, /* File system object */ - uint32_t clst /* Cluster# to get the link information */ -) -{ - uint32_t wc, bc; - uint8_t *p; - - - if (clst < 2 || clst >= fs->n_fatent) /* Check range */ - return 1; - - switch (fs->fs_type) { - case FS_FAT12 : - bc = (uint32_t)clst; bc += bc / 2; - if (move_window(fs, fs->fatbase + (bc / SS(fs)))) break; - wc = fs->win[bc % SS(fs)]; bc++; - if (move_window(fs, fs->fatbase + (bc / SS(fs)))) break; - wc |= fs->win[bc % SS(fs)] << 8; - return (clst & 1) ? (wc >> 4) : (wc & 0xFFF); - - case FS_FAT16 : - if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2)))) break; - p = &fs->win[clst * 2 % SS(fs)]; - return LD_WORD(p); - - case FS_FAT32 : - if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4)))) break; - p = &fs->win[clst * 4 % SS(fs)]; - return LD_DWORD(p) & 0x0FFFFFFF; - } - - return 0xFFFFFFFF; /* An error occurred at the disk I/O layer */ -} - - - - -/*-----------------------------------------------------------------------*/ -/* FAT access - Change value of a FAT entry */ -/*-----------------------------------------------------------------------*/ -#if !_FS_READONLY - -FRESULT put_fat ( - FATFS *fs, /* File system object */ - uint32_t clst, /* Cluster# to be changed in range of 2 to fs->n_fatent - 1 */ - uint32_t val /* New value to mark the cluster */ -) -{ - uint32_t bc; - uint8_t *p; - FRESULT res; - - - if (clst < 2 || clst >= fs->n_fatent) { /* Check range */ - res = FR_INT_ERR; - - } else { - switch (fs->fs_type) { - case FS_FAT12 : - bc = (uint32_t)clst; bc += bc / 2; - res = move_window(fs, fs->fatbase + (bc / SS(fs))); - if (res != FR_OK) break; - p = &fs->win[bc % SS(fs)]; - *p = (clst & 1) ? ((*p & 0x0F) | ((uint8_t)val << 4)) : (uint8_t)val; - bc++; - fs->wflag = 1; - res = move_window(fs, fs->fatbase + (bc / SS(fs))); - if (res != FR_OK) break; - p = &fs->win[bc % SS(fs)]; - *p = (clst & 1) ? (uint8_t)(val >> 4) : ((*p & 0xF0) | ((uint8_t)(val >> 8) & 0x0F)); - break; - - case FS_FAT16 : - res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))); - if (res != FR_OK) break; - p = &fs->win[clst * 2 % SS(fs)]; - ST_WORD(p, (uint16_t)val); - break; - - case FS_FAT32 : - res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))); - if (res != FR_OK) break; - p = &fs->win[clst * 4 % SS(fs)]; - val |= LD_DWORD(p) & 0xF0000000; - ST_DWORD(p, val); - break; - - default : - res = FR_INT_ERR; - break; - } - fs->wflag = 1; - } - - return res; -} -#endif /* !_FS_READONLY */ - - - - -/*-----------------------------------------------------------------------*/ -/* FAT handling - Remove a cluster chain */ -/*-----------------------------------------------------------------------*/ -#if !_FS_READONLY -static -FRESULT remove_chain ( - FATFS *fs, /* File system object */ - uint32_t clst /* Cluster# to remove a chain from */ -) -{ - FRESULT res; - uint32_t nxt; -#if _USE_ERASE - uint32_t scl = clst, ecl = clst, rt[2]; -#endif - - if (clst < 2 || clst >= fs->n_fatent) { /* Check range */ - res = FR_INT_ERR; - - } else { - res = FR_OK; - while (clst < fs->n_fatent) { /* Not a last link? */ - nxt = get_fat(fs, clst); /* Get cluster status */ - if (nxt == 0) break; /* Empty cluster? */ - if (nxt == 1) { res = FR_INT_ERR; break; } /* Internal error? */ - if (nxt == 0xFFFFFFFF) { res = FR_DISK_ERR; break; } /* Disk error? */ - res = put_fat(fs, clst, 0); /* Mark the cluster "empty" */ - if (res != FR_OK) break; - if (fs->free_clust != 0xFFFFFFFF) { /* Update FSInfo */ - fs->free_clust++; - fs->fsi_flag = 1; - } -#if _USE_ERASE - if (ecl + 1 == nxt) { /* Is next cluster contiguous? */ - ecl = nxt; - } else { /* End of contiguous clusters */ - rt[0] = clust2sect(fs, scl); /* Start sector */ - rt[1] = clust2sect(fs, ecl) + fs->csize - 1; /* End sector */ - disk_ioctl(fs->drv, CTRL_ERASE_SECTOR, rt); /* Erase the block */ - scl = ecl = nxt; - } -#endif - clst = nxt; /* Next cluster */ - } - } - - return res; -} -#endif - - - - -/*-----------------------------------------------------------------------*/ -/* FAT handling - Stretch or Create a cluster chain */ -/*-----------------------------------------------------------------------*/ -#if !_FS_READONLY -static -uint32_t create_chain ( /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */ - FATFS *fs, /* File system object */ - uint32_t clst /* Cluster# to stretch. 0 means create a new chain. */ -) -{ - uint32_t cs, ncl, scl; - FRESULT res; - - - if (clst == 0) { /* Create a new chain */ - scl = fs->last_clust; /* Get suggested start point */ - if (!scl || scl >= fs->n_fatent) scl = 1; - } - else { /* Stretch the current chain */ - cs = get_fat(fs, clst); /* Check the cluster status */ - if (cs < 2) return 1; /* It is an invalid cluster */ - if (cs < fs->n_fatent) return cs; /* It is already followed by next cluster */ - scl = clst; - } - - ncl = scl; /* Start cluster */ - for (;;) { - ncl++; /* Next cluster */ - if (ncl >= fs->n_fatent) { /* Wrap around */ - ncl = 2; - if (ncl > scl) return 0; /* No free cluster */ - } - cs = get_fat(fs, ncl); /* Get the cluster status */ - if (cs == 0) break; /* Found a free cluster */ - if (cs == 0xFFFFFFFF || cs == 1)/* An error occurred */ - return cs; - if (ncl == scl) return 0; /* No free cluster */ - } - - res = put_fat(fs, ncl, 0x0FFFFFFF); /* Mark the new cluster "last link" */ - if (res == FR_OK && clst != 0) { - res = put_fat(fs, clst, ncl); /* Link it to the previous one if needed */ - } - if (res == FR_OK) { - fs->last_clust = ncl; /* Update FSINFO */ - if (fs->free_clust != 0xFFFFFFFF) { - fs->free_clust--; - fs->fsi_flag = 1; - } - } else { - ncl = (res == FR_DISK_ERR) ? 0xFFFFFFFF : 1; - } - - return ncl; /* Return new cluster number or error code */ -} -#endif /* !_FS_READONLY */ - - - -/*-----------------------------------------------------------------------*/ -/* FAT handling - Convert offset into cluster with link map table */ -/*-----------------------------------------------------------------------*/ - -#if _USE_FASTSEEK -static -uint32_t clmt_clust ( /* <2:Error, >=2:Cluster number */ - FIL* fp, /* Pointer to the file object */ - uint32_t ofs /* File offset to be converted to cluster# */ -) -{ - uint32_t cl, ncl, *tbl; - - - tbl = fp->cltbl + 1; /* Top of CLMT */ - cl = ofs / SS(fp->fs) / fp->fs->csize; /* Cluster order from top of the file */ - for (;;) { - ncl = *tbl++; /* Number of cluters in the fragment */ - if (!ncl) return 0; /* End of table? (error) */ - if (cl < ncl) break; /* In this fragment? */ - cl -= ncl; tbl++; /* Next fragment */ - } - return cl + *tbl; /* Return the cluster number */ -} -#endif /* _USE_FASTSEEK */ - - - -/*-----------------------------------------------------------------------*/ -/* Directory handling - Set directory index */ -/*-----------------------------------------------------------------------*/ - -static -FRESULT dir_sdi ( - DIR *dj, /* Pointer to directory object */ - uint16_t idx /* Index of directory table */ -) -{ - uint32_t clst; - uint16_t ic; - - - dj->index = idx; - clst = dj->sclust; - if (clst == 1 || clst >= dj->fs->n_fatent) /* Check start cluster range */ - return FR_INT_ERR; - if (!clst && dj->fs->fs_type == FS_FAT32) /* Replace cluster# 0 with root cluster# if in FAT32 */ - clst = dj->fs->dirbase; - - if (clst == 0) { /* Static table (root-dir in FAT12/16) */ - dj->clust = clst; - if (idx >= dj->fs->n_rootdir) /* Index is out of range */ - return FR_INT_ERR; - dj->sect = dj->fs->dirbase + idx / (SS(dj->fs) / SZ_DIR); /* Sector# */ - } - else { /* Dynamic table (sub-dirs or root-dir in FAT32) */ - ic = SS(dj->fs) / SZ_DIR * dj->fs->csize; /* Entries per cluster */ - while (idx >= ic) { /* Follow cluster chain */ - clst = get_fat(dj->fs, clst); /* Get next cluster */ - if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */ - if (clst < 2 || clst >= dj->fs->n_fatent) /* Reached to end of table or int error */ - return FR_INT_ERR; - idx -= ic; - } - dj->clust = clst; - dj->sect = clust2sect(dj->fs, clst) + idx / (SS(dj->fs) / SZ_DIR); /* Sector# */ - } - - dj->dir = dj->fs->win + (idx % (SS(dj->fs) / SZ_DIR)) * SZ_DIR; /* Ptr to the entry in the sector */ - - return FR_OK; /* Seek succeeded */ -} - - - - -/*-----------------------------------------------------------------------*/ -/* Directory handling - Move directory table index next */ -/*-----------------------------------------------------------------------*/ - -static -FRESULT dir_next ( /* FR_OK:Succeeded, FR_NO_FILE:End of table, FR_DENIED:EOT and could not stretch */ - DIR *dj, /* Pointer to directory object */ - int stretch /* 0: Do not stretch table, 1: Stretch table if needed */ -) -{ - uint32_t clst; - uint16_t i; - - - //stretch = stretch; /* To suppress warning on read-only cfg. */ - i = dj->index + 1; - if (!i || !dj->sect) /* Report EOT when index has reached 65535 */ - return FR_NO_FILE; - - if (!(i % (SS(dj->fs) / SZ_DIR))) { /* Sector changed? */ - dj->sect++; /* Next sector */ - - if (dj->clust == 0) { /* Static table */ - if (i >= dj->fs->n_rootdir) /* Report EOT when end of table */ - return FR_NO_FILE; - } - else { /* Dynamic table */ - if (((i / (SS(dj->fs) / SZ_DIR)) & (dj->fs->csize - 1)) == 0) { /* Cluster changed? */ - clst = get_fat(dj->fs, dj->clust); /* Get next cluster */ - if (clst <= 1) return FR_INT_ERR; - if (clst == 0xFFFFFFFF) return FR_DISK_ERR; - if (clst >= dj->fs->n_fatent) { /* When it reached end of dynamic table */ -#if !_FS_READONLY - uint8_t c; - if (!stretch) return FR_NO_FILE; /* When do not stretch, report EOT */ - clst = create_chain(dj->fs, dj->clust); /* Stretch cluster chain */ - if (clst == 0) return FR_DENIED; /* No free cluster */ - if (clst == 1) return FR_INT_ERR; - if (clst == 0xFFFFFFFF) return FR_DISK_ERR; - /* Clean-up stretched table */ - if (move_window(dj->fs, 0)) return FR_DISK_ERR; /* Flush active window */ - mem_set(dj->fs->win, 0, SS(dj->fs)); /* Clear window buffer */ - dj->fs->winsect = clust2sect(dj->fs, clst); /* Cluster start sector */ - for (c = 0; c < dj->fs->csize; c++) { /* Fill the new cluster with 0 */ - dj->fs->wflag = 1; - if (move_window(dj->fs, 0)) return FR_DISK_ERR; - dj->fs->winsect++; - } - dj->fs->winsect -= c; /* Rewind window address */ -#else - return FR_NO_FILE; /* Report EOT */ -#endif - } - dj->clust = clst; /* Initialize data for new cluster */ - dj->sect = clust2sect(dj->fs, clst); - } - } - } - - dj->index = i; - dj->dir = dj->fs->win + (i % (SS(dj->fs) / SZ_DIR)) * SZ_DIR; - - return FR_OK; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Directory handling - Load/Store start cluster number */ -/*-----------------------------------------------------------------------*/ - -static -uint32_t ld_clust ( - FATFS *fs, /* Pointer to the fs object */ - uint8_t *dir /* Pointer to the directory entry */ -) -{ - uint32_t cl; - - cl = LD_WORD(dir+DIR_FstClusLO); - if (fs->fs_type == FS_FAT32) - cl |= (uint32_t)LD_WORD(dir+DIR_FstClusHI) << 16; - - return cl; -} - - -#if !_FS_READONLY -static -void st_clust ( - uint8_t *dir, /* Pointer to the directory entry */ - uint32_t cl /* Value to be set */ -) -{ - ST_WORD(dir+DIR_FstClusLO, cl); - ST_WORD(dir+DIR_FstClusHI, cl >> 16); -} -#endif - - - -/*-----------------------------------------------------------------------*/ -/* LFN handling - Test/Pick/Fit an LFN segment from/to directory entry */ -/*-----------------------------------------------------------------------*/ -#if _USE_LFN -static -const uint8_t LfnOfs[] = {1,3,5,7,9,14,16,18,20,22,24,28,30}; /* Offset of LFN chars in the directory entry */ - - -static -int cmp_lfn ( /* 1:Matched, 0:Not matched */ - uint16_t *lfnbuf, /* Pointer to the LFN to be compared */ - uint8_t *dir /* Pointer to the directory entry containing a part of LFN */ -) -{ - uint32_t i, s; - uint16_t wc, uc; - - - i = ((dir[LDIR_Ord] & ~LLE) - 1) * 13; /* Get offset in the LFN buffer */ - s = 0; wc = 1; - do { - uc = LD_WORD(dir+LfnOfs[s]); /* Pick an LFN character from the entry */ - if (wc) { /* Last char has not been processed */ - wc = ff_wtoupper(uc); /* Convert it to upper case */ - if (i >= _MAX_LFN || wc != ff_wtoupper(lfnbuf[i++])) /* Compare it */ - return 0; /* Not matched */ - } else { - if (uc != 0xFFFF) return 0; /* Check filler */ - } - } while (++s < 13); /* Repeat until all chars in the entry are checked */ - - if ((dir[LDIR_Ord] & LLE) && wc && lfnbuf[i]) /* Last segment matched but different length */ - return 0; - - return 1; /* The part of LFN matched */ -} - - - -static -int pick_lfn ( /* 1:Succeeded, 0:Buffer overflow */ - uint16_t *lfnbuf, /* Pointer to the Unicode-LFN buffer */ - uint8_t *dir /* Pointer to the directory entry */ -) -{ - uint32_t i, s; - uint16_t wc, uc; - - - i = ((dir[LDIR_Ord] & 0x3F) - 1) * 13; /* Offset in the LFN buffer */ - - s = 0; wc = 1; - do { - uc = LD_WORD(dir+LfnOfs[s]); /* Pick an LFN character from the entry */ - if (wc) { /* Last char has not been processed */ - if (i >= _MAX_LFN) return 0; /* Buffer overflow? */ - lfnbuf[i++] = wc = uc; /* Store it */ - } else { - if (uc != 0xFFFF) return 0; /* Check filler */ - } - } while (++s < 13); /* Read all character in the entry */ - - if (dir[LDIR_Ord] & LLE) { /* Put terminator if it is the last LFN part */ - if (i >= _MAX_LFN) return 0; /* Buffer overflow? */ - lfnbuf[i] = 0; - } - - return 1; -} - - -#if !_FS_READONLY -static -void fit_lfn ( - const uint16_t *lfnbuf, /* Pointer to the LFN buffer */ - uint8_t *dir, /* Pointer to the directory entry */ - uint8_t ord, /* LFN order (1-20) */ - uint8_t sum /* SFN sum */ -) -{ - uint32_t i, s; - uint16_t wc; - - - dir[LDIR_Chksum] = sum; /* Set check sum */ - dir[LDIR_Attr] = AM_LFN; /* Set attribute. LFN entry */ - dir[LDIR_Type] = 0; - ST_WORD(dir+LDIR_FstClusLO, 0); - - i = (ord - 1) * 13; /* Get offset in the LFN buffer */ - s = wc = 0; - do { - if (wc != 0xFFFF) wc = lfnbuf[i++]; /* Get an effective char */ - ST_WORD(dir+LfnOfs[s], wc); /* Put it */ - if (!wc) wc = 0xFFFF; /* Padding chars following last char */ - } while (++s < 13); - if (wc == 0xFFFF || !lfnbuf[i]) ord |= LLE; /* Bottom LFN part is the start of LFN sequence */ - dir[LDIR_Ord] = ord; /* Set the LFN order */ -} - -#endif -#endif - - - -/*-----------------------------------------------------------------------*/ -/* Create numbered name */ -/*-----------------------------------------------------------------------*/ -#if _USE_LFN -void gen_numname ( - uint8_t *dst, /* Pointer to generated SFN */ - const uint8_t *src, /* Pointer to source SFN to be modified */ - const uint16_t *lfn, /* Pointer to LFN */ - uint16_t seq /* Sequence number */ -) -{ - uint8_t ns[8], c; - uint32_t i, j; - - - mem_cpy(dst, src, 11); - - if (seq > 5) { /* On many collisions, generate a hash number instead of sequential number */ - do seq = (seq >> 1) + (seq << 15) + (uint16_t)*lfn++; while (*lfn); - } - - /* itoa (hexdecimal) */ - i = 7; - do { - c = (seq % 16) + '0'; - if (c > '9') c += 7; - ns[i--] = c; - seq /= 16; - } while (seq); - ns[i] = '~'; - - /* Append the number */ - for (j = 0; j < i && dst[j] != ' '; j++) { - if (IsDBCS1(dst[j])) { - if (j == i - 1) break; - j++; - } - } - do { - dst[j++] = (i < 8) ? ns[i++] : ' '; - } while (j < 8); -} -#endif - - - - -/*-----------------------------------------------------------------------*/ -/* Calculate sum of an SFN */ -/*-----------------------------------------------------------------------*/ -#if _USE_LFN -static -uint8_t sum_sfn ( - const uint8_t *dir /* Ptr to directory entry */ -) -{ - uint8_t sum = 0; - uint32_t n = 11; - - do sum = (sum >> 1) + (sum << 7) + *dir++; while (--n); - return sum; -} -#endif - - - - -/*-----------------------------------------------------------------------*/ -/* Directory handling - Find an object in the directory */ -/*-----------------------------------------------------------------------*/ - -static -FRESULT dir_find ( - DIR *dj /* Pointer to the directory object linked to the file name */ -) -{ - FRESULT res; - uint8_t c, *dir; -#if _USE_LFN - uint8_t a, ord, sum; -#endif - - res = dir_sdi(dj, 0); /* Rewind directory object */ - if (res != FR_OK) return res; - -#if _USE_LFN - ord = sum = 0xFF; -#endif - do { - res = move_window(dj->fs, dj->sect); - if (res != FR_OK) break; - dir = dj->dir; /* Ptr to the directory entry of current index */ - c = dir[DIR_Name]; - if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */ -#if _USE_LFN /* LFN configuration */ - a = dir[DIR_Attr] & AM_MASK; - if (c == DDE || ((a & AM_VOL) && a != AM_LFN)) { /* An entry without valid data */ - ord = 0xFF; - } else { - if (a == AM_LFN) { /* An LFN entry is found */ - if (dj->lfn) { - if (c & LLE) { /* Is it start of LFN sequence? */ - sum = dir[LDIR_Chksum]; - c &= ~LLE; ord = c; /* LFN start order */ - dj->lfn_idx = dj->index; - } - /* Check validity of the LFN entry and compare it with given name */ - ord = (c == ord && sum == dir[LDIR_Chksum] && cmp_lfn(dj->lfn, dir)) ? ord - 1 : 0xFF; - } - } else { /* An SFN entry is found */ - if (!ord && sum == sum_sfn(dir)) break; /* LFN matched? */ - ord = 0xFF; dj->lfn_idx = 0xFFFF; /* Reset LFN sequence */ - if (!(dj->fn[NS] & NS_LOSS) && !mem_cmp(dir, dj->fn, 11)) break; /* SFN matched? */ - } - } -#else /* Non LFN configuration */ - if (!(dir[DIR_Attr] & AM_VOL) && !mem_cmp(dir, dj->fn, 11)) /* Is it a valid entry? */ - break; -#endif - res = dir_next(dj, 0); /* Next entry */ - } while (res == FR_OK); - - return res; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Read an object from the directory */ -/*-----------------------------------------------------------------------*/ -#if _FS_MINIMIZE <= 1 -static -FRESULT dir_read ( - DIR *dj /* Pointer to the directory object that pointing the entry to be read */ -) -{ - FRESULT res; - uint8_t c, *dir; -#if _USE_LFN - uint8_t a, ord = 0xFF, sum = 0xFF; -#endif - - res = FR_NO_FILE; - while (dj->sect) { - res = move_window(dj->fs, dj->sect); - if (res != FR_OK) break; - dir = dj->dir; /* Ptr to the directory entry of current index */ - c = dir[DIR_Name]; - if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */ -#if _USE_LFN /* LFN configuration */ - a = dir[DIR_Attr] & AM_MASK; - if (c == DDE || (!_FS_RPATH && c == '.') || ((a & AM_VOL) && a != AM_LFN)) { /* An entry without valid data */ - ord = 0xFF; - } else { - if (a == AM_LFN) { /* An LFN entry is found */ - if (c & LLE) { /* Is it start of LFN sequence? */ - sum = dir[LDIR_Chksum]; - c &= ~LLE; ord = c; - dj->lfn_idx = dj->index; - } - /* Check LFN validity and capture it */ - ord = (c == ord && sum == dir[LDIR_Chksum] && pick_lfn(dj->lfn, dir)) ? ord - 1 : 0xFF; - } else { /* An SFN entry is found */ - if (ord || sum != sum_sfn(dir)) /* Is there a valid LFN? */ - dj->lfn_idx = 0xFFFF; /* It has no LFN. */ - break; - } - } -#else /* Non LFN configuration */ - if (c != DDE && (_FS_RPATH || c != '.') && !(dir[DIR_Attr] & AM_VOL)) /* Is it a valid entry? */ - break; -#endif - res = dir_next(dj, 0); /* Next entry */ - if (res != FR_OK) break; - } - - if (res != FR_OK) dj->sect = 0; - - return res; -} -#endif - - - -/*-----------------------------------------------------------------------*/ -/* Register an object to the directory */ -/*-----------------------------------------------------------------------*/ -#if !_FS_READONLY -static -FRESULT dir_register ( /* FR_OK:Successful, FR_DENIED:No free entry or too many SFN collision, FR_DISK_ERR:Disk error */ - DIR *dj /* Target directory with object name to be created */ -) -{ - FRESULT res; - uint8_t c, *dir; -#if _USE_LFN /* LFN configuration */ - uint16_t n, ne, is; - uint8_t sn[12], *fn, sum; - uint16_t *lfn; - - - fn = dj->fn; lfn = dj->lfn; - mem_cpy(sn, fn, 12); - - if (_FS_RPATH && (sn[NS] & NS_DOT)) /* Cannot create dot entry */ - return FR_INVALID_NAME; - - if (sn[NS] & NS_LOSS) { /* When LFN is out of 8.3 format, generate a numbered name */ - fn[NS] = 0; dj->lfn = 0; /* Find only SFN */ - for (n = 1; n < 100; n++) { - gen_numname(fn, sn, lfn, n); /* Generate a numbered name */ - res = dir_find(dj); /* Check if the name collides with existing SFN */ - if (res != FR_OK) break; - } - if (n == 100) return FR_DENIED; /* Abort if too many collisions */ - if (res != FR_NO_FILE) return res; /* Abort if the result is other than 'not collided' */ - fn[NS] = sn[NS]; dj->lfn = lfn; - } - - if (sn[NS] & NS_LFN) { /* When LFN is to be created, reserve an SFN + LFN entries. */ - for (ne = 0; lfn[ne]; ne++) ; - ne = (ne + 25) / 13; - } else { /* Otherwise reserve only an SFN entry. */ - ne = 1; - } - - /* Reserve contiguous entries */ - res = dir_sdi(dj, 0); - if (res != FR_OK) return res; - n = is = 0; - do { - res = move_window(dj->fs, dj->sect); - if (res != FR_OK) break; - c = *dj->dir; /* Check the entry status */ - if (c == DDE || c == 0) { /* Is it a blank entry? */ - if (n == 0) is = dj->index; /* First index of the contiguous entry */ - if (++n == ne) break; /* A contiguous entry that required count is found */ - } else { - n = 0; /* Not a blank entry. Restart to search */ - } - res = dir_next(dj, 1); /* Next entry with table stretch */ - } while (res == FR_OK); - - if (res == FR_OK && ne > 1) { /* Initialize LFN entry if needed */ - res = dir_sdi(dj, is); - if (res == FR_OK) { - sum = sum_sfn(dj->fn); /* Sum of the SFN tied to the LFN */ - ne--; - do { /* Store LFN entries in bottom first */ - res = move_window(dj->fs, dj->sect); - if (res != FR_OK) break; - fit_lfn(dj->lfn, dj->dir, (uint8_t)ne, sum); - dj->fs->wflag = 1; - res = dir_next(dj, 0); /* Next entry */ - } while (res == FR_OK && --ne); - } - } - -#else /* Non LFN configuration */ - res = dir_sdi(dj, 0); - if (res == FR_OK) { - do { /* Find a blank entry for the SFN */ - res = move_window(dj->fs, dj->sect); - if (res != FR_OK) break; - c = *dj->dir; - if (c == DDE || c == 0) break; /* Is it a blank entry? */ - res = dir_next(dj, 1); /* Next entry with table stretch */ - } while (res == FR_OK); - } -#endif - - if (res == FR_OK) { /* Initialize the SFN entry */ - res = move_window(dj->fs, dj->sect); - if (res == FR_OK) { - dir = dj->dir; - mem_set(dir, 0, SZ_DIR); /* Clean the entry */ - mem_cpy(dir, dj->fn, 11); /* Put SFN */ -#if _USE_LFN - dir[DIR_NTres] = *(dj->fn+NS) & (NS_BODY | NS_EXT); /* Put NT flag */ -#endif - dj->fs->wflag = 1; - } - } - - return res; -} -#endif /* !_FS_READONLY */ - - - - -/*-----------------------------------------------------------------------*/ -/* Remove an object from the directory */ -/*-----------------------------------------------------------------------*/ -#if !_FS_READONLY && !_FS_MINIMIZE -static -FRESULT dir_remove ( /* FR_OK: Successful, FR_DISK_ERR: A disk error */ - DIR *dj /* Directory object pointing the entry to be removed */ -) -{ - FRESULT res; -#if _USE_LFN /* LFN configuration */ - uint16_t i; - - i = dj->index; /* SFN index */ - res = dir_sdi(dj, (uint16_t)((dj->lfn_idx == 0xFFFF) ? i : dj->lfn_idx)); /* Goto the SFN or top of the LFN entries */ - if (res == FR_OK) { - do { - res = move_window(dj->fs, dj->sect); - if (res != FR_OK) break; - *dj->dir = DDE; /* Mark the entry "deleted" */ - dj->fs->wflag = 1; - if (dj->index >= i) break; /* When reached SFN, all entries of the object has been deleted. */ - res = dir_next(dj, 0); /* Next entry */ - } while (res == FR_OK); - if (res == FR_NO_FILE) res = FR_INT_ERR; - } - -#else /* Non LFN configuration */ - res = dir_sdi(dj, dj->index); - if (res == FR_OK) { - res = move_window(dj->fs, dj->sect); - if (res == FR_OK) { - *dj->dir = DDE; /* Mark the entry "deleted" */ - dj->fs->wflag = 1; - } - } -#endif - - return res; -} -#endif /* !_FS_READONLY */ - - - - -/*-----------------------------------------------------------------------*/ -/* Pick a segment and create the object name in directory form */ -/*-----------------------------------------------------------------------*/ - -static -FRESULT create_name ( - DIR *dj, /* Pointer to the directory object */ - const TCHAR **path /* Pointer to pointer to the segment in the path string */ -) -{ -#ifdef _EXCVT - static const uint8_t excvt[] = _EXCVT; /* Upper conversion table for extended chars */ -#endif - -#if _USE_LFN /* LFN configuration */ - uint8_t b, cf; - uint16_t w, *lfn; - uint32_t i, ni, si, di; - const TCHAR *p; - - /* Create LFN in Unicode */ - for (p = *path; *p == '/' || *p == '\\'; p++) ; /* Strip duplicated separator */ - lfn = dj->lfn; - si = di = 0; - for (;;) { - w = p[si++]; /* Get a character */ - if (w < ' ' || w == '/' || w == '\\') break; /* Break on end of segment */ - if (di >= _MAX_LFN) /* Reject too long name */ - return FR_INVALID_NAME; -#if !_LFN_UNICODE - w &= 0xFF; - if (IsDBCS1(w)) { /* Check if it is a DBC 1st byte (always false on SBCS cfg) */ - b = (uint8_t)p[si++]; /* Get 2nd byte */ - if (!IsDBCS2(b)) - return FR_INVALID_NAME; /* Reject invalid sequence */ - w = (w << 8) + b; /* Create a DBC */ - } - w = ff_convert(w, 1); /* Convert ANSI/OEM to Unicode */ - if (!w) return FR_INVALID_NAME; /* Reject invalid code */ -#endif - if (w < 0x80 && chk_chr("\"*:<>\?|\x7F", w)) /* Reject illegal chars for LFN */ - return FR_INVALID_NAME; - lfn[di++] = w; /* Store the Unicode char */ - } - *path = &p[si]; /* Return pointer to the next segment */ - cf = (w < ' ') ? NS_LAST : 0; /* Set last segment flag if end of path */ -#if _FS_RPATH - if ((di == 1 && lfn[di-1] == '.') || /* Is this a dot entry? */ - (di == 2 && lfn[di-1] == '.' && lfn[di-2] == '.')) { - lfn[di] = 0; - for (i = 0; i < 11; i++) - dj->fn[i] = (i < di) ? '.' : ' '; - dj->fn[i] = cf | NS_DOT; /* This is a dot entry */ - return FR_OK; - } -#endif - while (di) { /* Strip trailing spaces and dots */ - w = lfn[di-1]; - if (w != ' ' && w != '.') break; - di--; - } - if (!di) return FR_INVALID_NAME; /* Reject nul string */ - - lfn[di] = 0; /* LFN is created */ - - /* Create SFN in directory form */ - mem_set(dj->fn, ' ', 11); - for (si = 0; lfn[si] == ' ' || lfn[si] == '.'; si++) ; /* Strip leading spaces and dots */ - if (si) cf |= NS_LOSS | NS_LFN; - while (di && lfn[di - 1] != '.') di--; /* Find extension (di<=si: no extension) */ - - b = i = 0; ni = 8; - for (;;) { - w = lfn[si++]; /* Get an LFN char */ - if (!w) break; /* Break on end of the LFN */ - if (w == ' ' || (w == '.' && si != di)) { /* Remove spaces and dots */ - cf |= NS_LOSS | NS_LFN; continue; - } - - if (i >= ni || si == di) { /* Extension or end of SFN */ - if (ni == 11) { /* Long extension */ - cf |= NS_LOSS | NS_LFN; break; - } - if (si != di) cf |= NS_LOSS | NS_LFN; /* Out of 8.3 format */ - if (si > di) break; /* No extension */ - si = di; i = 8; ni = 11; /* Enter extension section */ - b <<= 2; continue; - } - - if (w >= 0x80) { /* Non ASCII char */ -#ifdef _EXCVT - w = ff_convert(w, 0); /* Unicode -> OEM code */ - if (w) w = excvt[w - 0x80]; /* Convert extended char to upper (SBCS) */ -#else - w = ff_convert(ff_wtoupper(w), 0); /* Upper converted Unicode -> OEM code */ -#endif - cf |= NS_LFN; /* Force create LFN entry */ - } - - if (_DF1S && w >= 0x100) { /* Double byte char (always false on SBCS cfg) */ - if (i >= ni - 1) { - cf |= NS_LOSS | NS_LFN; i = ni; continue; - } - dj->fn[i++] = (uint8_t)(w >> 8); - } else { /* Single byte char */ - if (!w || chk_chr("+,;=[]", w)) { /* Replace illegal chars for SFN */ - w = '_'; cf |= NS_LOSS | NS_LFN;/* Lossy conversion */ - } else { - if (IsUpper(w)) { /* ASCII large capital */ - b |= 2; - } else { - if (IsLower(w)) { /* ASCII small capital */ - b |= 1; w -= 0x20; - } - } - } - } - dj->fn[i++] = (uint8_t)w; - } - - if (dj->fn[0] == DDE) dj->fn[0] = NDDE; /* If the first char collides with deleted mark, replace it with 0x05 */ - - if (ni == 8) b <<= 2; - if ((b & 0x0C) == 0x0C || (b & 0x03) == 0x03) /* Create LFN entry when there are composite capitals */ - cf |= NS_LFN; - if (!(cf & NS_LFN)) { /* When LFN is in 8.3 format without extended char, NT flags are created */ - if ((b & 0x03) == 0x01) cf |= NS_EXT; /* NT flag (Extension has only small capital) */ - if ((b & 0x0C) == 0x04) cf |= NS_BODY; /* NT flag (Filename has only small capital) */ - } - - dj->fn[NS] = cf; /* SFN is created */ - - return FR_OK; - - -#else /* Non-LFN configuration */ - uint8_t b, c, d, *sfn; - uint32_t ni, si, i; - const char *p; - - /* Create file name in directory form */ - for (p = *path; *p == '/' || *p == '\\'; p++) ; /* Strip duplicated separator */ - sfn = dj->fn; - mem_set(sfn, ' ', 11); - si = i = b = 0; ni = 8; -#if _FS_RPATH - if (p[si] == '.') { /* Is this a dot entry? */ - for (;;) { - c = (uint8_t)p[si++]; - if (c != '.' || si >= 3) break; - sfn[i++] = c; - } - if (c != '/' && c != '\\' && c > ' ') return FR_INVALID_NAME; - *path = &p[si]; /* Return pointer to the next segment */ - sfn[NS] = (c <= ' ') ? NS_LAST | NS_DOT : NS_DOT; /* Set last segment flag if end of path */ - return FR_OK; - } -#endif - for (;;) { - c = (uint8_t)p[si++]; - if (c <= ' ' || c == '/' || c == '\\') break; /* Break on end of segment */ - if (c == '.' || i >= ni) { - if (ni != 8 || c != '.') return FR_INVALID_NAME; - i = 8; ni = 11; - b <<= 2; continue; - } - if (c >= 0x80) { /* Extended char? */ - b |= 3; /* Eliminate NT flag */ -#ifdef _EXCVT - c = excvt[c - 0x80]; /* Upper conversion (SBCS) */ -#else -#if !_DF1S /* ASCII only cfg */ - return FR_INVALID_NAME; -#endif -#endif - } - if (IsDBCS1(c)) { /* Check if it is a DBC 1st byte (always false on SBCS cfg) */ - d = (uint8_t)p[si++]; /* Get 2nd byte */ - if (!IsDBCS2(d) || i >= ni - 1) /* Reject invalid DBC */ - return FR_INVALID_NAME; - sfn[i++] = c; - sfn[i++] = d; - } else { /* Single byte code */ - if (chk_chr("\"*+,:;<=>\?[]|\x7F", c)) /* Reject illegal chrs for SFN */ - return FR_INVALID_NAME; - if (IsUpper(c)) { /* ASCII large capital? */ - b |= 2; - } else { - if (IsLower(c)) { /* ASCII small capital? */ - b |= 1; c -= 0x20; - } - } - sfn[i++] = c; - } - } - *path = &p[si]; /* Return pointer to the next segment */ - c = (c <= ' ') ? NS_LAST : 0; /* Set last segment flag if end of path */ - - if (!i) return FR_INVALID_NAME; /* Reject nul string */ - if (sfn[0] == DDE) sfn[0] = NDDE; /* When first char collides with DDE, replace it with 0x05 */ - - if (ni == 8) b <<= 2; - if ((b & 0x03) == 0x01) c |= NS_EXT; /* NT flag (Name extension has only small capital) */ - if ((b & 0x0C) == 0x04) c |= NS_BODY; /* NT flag (Name body has only small capital) */ - - sfn[NS] = c; /* Store NT flag, File name is created */ - - return FR_OK; -#endif -} - - - - -/*-----------------------------------------------------------------------*/ -/* Get file information from directory entry */ -/*-----------------------------------------------------------------------*/ -#if _FS_MINIMIZE <= 1 -static -void get_fileinfo ( /* No return code */ - DIR *dj, /* Pointer to the directory object */ - FILINFO *fno /* Pointer to the file information to be filled */ -) -{ - uint32_t i; - uint8_t nt, *dir; - TCHAR *p, c; - - - p = fno->fname; - if (dj->sect) { - dir = dj->dir; - nt = dir[DIR_NTres]; /* NT flag */ - for (i = 0; i < 8; i++) { /* Copy name body */ - c = dir[i]; - if (c == ' ') break; - if (c == NDDE) c = (TCHAR)DDE; - if (_USE_LFN && (nt & NS_BODY) && IsUpper(c)) c += 0x20; -#if _LFN_UNICODE - if (IsDBCS1(c) && i < 7 && IsDBCS2(dir[i+1])) - c = (c << 8) | dir[++i]; - c = ff_convert(c, 1); - if (!c) c = '?'; -#endif - *p++ = c; - } - if (dir[8] != ' ') { /* Copy name extension */ - *p++ = '.'; - for (i = 8; i < 11; i++) { - c = dir[i]; - if (c == ' ') break; - if (_USE_LFN && (nt & NS_EXT) && IsUpper(c)) c += 0x20; -#if _LFN_UNICODE - if (IsDBCS1(c) && i < 10 && IsDBCS2(dir[i+1])) - c = (c << 8) | dir[++i]; - c = ff_convert(c, 1); - if (!c) c = '?'; -#endif - *p++ = c; - } - } - fno->fattrib = dir[DIR_Attr]; /* Attribute */ - fno->fsize = LD_DWORD(dir+DIR_FileSize); /* Size */ - fno->fdate = LD_WORD(dir+DIR_WrtDate); /* Date */ - fno->ftime = LD_WORD(dir+DIR_WrtTime); /* Time */ - } - *p = 0; /* Terminate SFN str by a \0 */ - -#if _USE_LFN - if (fno->lfname && fno->lfsize) { - TCHAR *tp = fno->lfname; - uint16_t w, *lfn; - - i = 0; - if (dj->sect && dj->lfn_idx != 0xFFFF) {/* Get LFN if available */ - lfn = dj->lfn; - while ((w = *lfn++) != 0) { /* Get an LFN char */ -#if !_LFN_UNICODE - w = ff_convert(w, 0); /* Unicode -> OEM conversion */ - if (!w) { i = 0; break; } /* Could not convert, no LFN */ - if (_DF1S && w >= 0x100) /* Put 1st byte if it is a DBC (always false on SBCS cfg) */ - tp[i++] = (TCHAR)(w >> 8); -#endif - if (i >= fno->lfsize - 1) { i = 0; break; } /* Buffer overflow, no LFN */ - tp[i++] = (TCHAR)w; - } - } - tp[i] = 0; /* Terminate the LFN str by a \0 */ - } -#endif -} -#endif /* _FS_MINIMIZE <= 1 */ - - - - -/*-----------------------------------------------------------------------*/ -/* Follow a file path */ -/*-----------------------------------------------------------------------*/ - -static -FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */ - DIR *dj, /* Directory object to return last directory and found object */ - const TCHAR *path /* Full-path string to find a file or directory */ -) -{ - FRESULT res; - uint8_t *dir, ns; - - -#if _FS_RPATH - if (*path == '/' || *path == '\\') { /* There is a heading separator */ - path++; dj->sclust = 0; /* Strip it and start from the root dir */ - } else { /* No heading separator */ - dj->sclust = dj->fs->cdir; /* Start from the current dir */ - } -#else - if (*path == '/' || *path == '\\') /* Strip heading separator if exist */ - path++; - dj->sclust = 0; /* Start from the root dir */ -#endif - - if ((uint32_t)*path < ' ') { /* Nul path means the start directory itself */ - res = dir_sdi(dj, 0); - dj->dir = 0; - } else { /* Follow path */ - for (;;) { - res = create_name(dj, &path); /* Get a segment */ - if (res != FR_OK) break; - res = dir_find(dj); /* Find it */ - ns = *(dj->fn+NS); - if (res != FR_OK) { /* Failed to find the object */ - if (res != FR_NO_FILE) break; /* Abort if any hard error occurred */ - /* Object not found */ - if (_FS_RPATH && (ns & NS_DOT)) { /* If dot entry is not exit */ - dj->sclust = 0; dj->dir = 0; /* It is the root dir */ - res = FR_OK; - if (!(ns & NS_LAST)) continue; - } else { /* Could not find the object */ - if (!(ns & NS_LAST)) res = FR_NO_PATH; - } - break; - } - if (ns & NS_LAST) break; /* Last segment match. Function completed. */ - dir = dj->dir; /* There is next segment. Follow the sub directory */ - if (!(dir[DIR_Attr] & AM_DIR)) { /* Cannot follow because it is a file */ - res = FR_NO_PATH; break; - } - dj->sclust = ld_clust(dj->fs, dir); - } - } - - return res; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Load a sector and check if it is an FAT Volume Boot Record */ -/*-----------------------------------------------------------------------*/ - -static -uint8_t check_fs ( /* 0:FAT-VBR, 1:Any BR but not FAT, 2:Not a BR, 3:Disk error */ - FATFS *fs, /* File system object */ - uint32_t sect /* Sector# (lba) to check if it is an FAT boot record or not */ -) -{ - if (disk_read(fs->drv, fs->win, sect, 1) != RES_OK) /* Load boot record */ - return 3; - if (LD_WORD(&fs->win[BS_55AA]) != 0xAA55) /* Check record signature (always placed at offset 510 even if the sector size is >512) */ - return 2; - - if ((LD_DWORD(&fs->win[BS_FilSysType]) & 0xFFFFFF) == 0x544146) /* Check "FAT" string */ - return 0; - if ((LD_DWORD(&fs->win[BS_FilSysType32]) & 0xFFFFFF) == 0x544146) - return 0; - - return 1; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Check if the file system object is valid or not */ -/*-----------------------------------------------------------------------*/ - -static -FRESULT chk_mounted ( /* FR_OK(0): successful, !=0: any error occurred */ - const TCHAR **path, /* Pointer to pointer to the path name (drive number) */ - FATFS **rfs, /* Pointer to pointer to the found file system object */ - uint8_t wmode /* !=0: Check write protection for write access */ -) -{ - uint8_t fmt, b, pi, *tbl; - uint32_t vol; - DSTATUS stat; - uint32_t bsect, fasize, tsect, sysect, nclst, szbfat; - uint16_t nrsv; - const TCHAR *p = *path; - FATFS *fs; - - - /* Get logical drive number from the path name */ - vol = p[0] - '0'; /* Is there a drive number? */ - if (vol <= 9 && p[1] == ':') { /* Found a drive number, get and strip it */ - p += 2; *path = p; /* Return pointer to the path name */ - } else { /* No drive number is given */ -#if _FS_RPATH - vol = CurrVol; /* Use current drive */ -#else - vol = 0; /* Use drive 0 */ -#endif - } - - /* Check if the file system object is valid or not */ - *rfs = 0; - if (vol >= _VOLUMES) /* Is the drive number valid? */ - return FR_INVALID_DRIVE; - fs = FatFs[vol]; /* Get corresponding file system object */ - if (!fs) return FR_NOT_ENABLED; /* Is the file system object available? */ - - ENTER_FF(fs); /* Lock file system */ - - *rfs = fs; /* Return pointer to the corresponding file system object */ - if (fs->fs_type) { /* If the volume has been mounted */ - stat = disk_status(fs->drv); - if (!(stat & STA_NOINIT)) { /* and the physical drive is kept initialized (has not been changed), */ - if (!_FS_READONLY && wmode && (stat & STA_PROTECT)) /* Check write protection if needed */ - return FR_WRITE_PROTECTED; - return FR_OK; /* The file system object is valid */ - } - } - - /* The file system object is not valid. */ - /* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */ - - fs->fs_type = 0; /* Clear the file system object */ - fs->drv = LD2PD(vol); /* Bind the logical drive and a physical drive */ - stat = disk_initialize(fs->drv); /* Initialize the physical drive */ - if (stat & STA_NOINIT) /* Check if the initialization succeeded */ - return FR_NOT_READY; /* Failed to initialize due to no medium or hard error */ - if (!_FS_READONLY && wmode && (stat & STA_PROTECT)) /* Check disk write protection if needed */ - return FR_WRITE_PROTECTED; -#if _MAX_SS != 512 /* Get disk sector size (variable sector size cfg only) */ - if (disk_ioctl(fs->drv, GET_SECTOR_SIZE, &fs->ssize) != RES_OK) - return FR_DISK_ERR; -#endif - /* Search FAT partition on the drive. Supports only generic partitions, FDISK and SFD. */ - fmt = check_fs(fs, bsect = 0); /* Load sector 0 and check if it is an FAT-VBR (in SFD) */ - if (LD2PT(vol) && !fmt) fmt = 1; /* Force non-SFD if the volume is forced partition */ - if (fmt == 1) { /* Not an FAT-VBR, the physical drive can be partitioned */ - /* Check the partition listed in the partition table */ - pi = LD2PT(vol); - if (pi) pi--; - tbl = &fs->win[MBR_Table + pi * SZ_PTE];/* Partition table */ - if (tbl[4]) { /* Is the partition existing? */ - bsect = LD_DWORD(&tbl[8]); /* Partition offset in LBA */ - fmt = check_fs(fs, bsect); /* Check the partition */ - } - } - if (fmt == 3) return FR_DISK_ERR; - if (fmt) return FR_NO_FILESYSTEM; /* No FAT volume is found */ - - /* An FAT volume is found. Following code initializes the file system object */ - - if (LD_WORD(fs->win+BPB_BytsPerSec) != SS(fs)) /* (BPB_BytsPerSec must be equal to the physical sector size) */ - return FR_NO_FILESYSTEM; - - fasize = LD_WORD(fs->win+BPB_FATSz16); /* Number of sectors per FAT */ - if (!fasize) fasize = LD_DWORD(fs->win+BPB_FATSz32); - fs->fsize = fasize; - - fs->n_fats = b = fs->win[BPB_NumFATs]; /* Number of FAT copies */ - if (b != 1 && b != 2) return FR_NO_FILESYSTEM; /* (Must be 1 or 2) */ - fasize *= b; /* Number of sectors for FAT area */ - - fs->csize = b = fs->win[BPB_SecPerClus]; /* Number of sectors per cluster */ - if (!b || (b & (b - 1))) return FR_NO_FILESYSTEM; /* (Must be power of 2) */ - - fs->n_rootdir = LD_WORD(fs->win+BPB_RootEntCnt); /* Number of root directory entries */ - if (fs->n_rootdir % (SS(fs) / SZ_DIR)) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must be sector aligned) */ - - tsect = LD_WORD(fs->win+BPB_TotSec16); /* Number of sectors on the volume */ - if (!tsect) tsect = LD_DWORD(fs->win+BPB_TotSec32); - - nrsv = LD_WORD(fs->win+BPB_RsvdSecCnt); /* Number of reserved sectors */ - if (!nrsv) return FR_NO_FILESYSTEM; /* (BPB_RsvdSecCnt must not be 0) */ - - /* Determine the FAT sub type */ - sysect = nrsv + fasize + fs->n_rootdir / (SS(fs) / SZ_DIR); /* RSV+FAT+DIR */ - if (tsect < sysect) return FR_NO_FILESYSTEM; /* (Invalid volume size) */ - nclst = (tsect - sysect) / fs->csize; /* Number of clusters */ - if (!nclst) return FR_NO_FILESYSTEM; /* (Invalid volume size) */ - fmt = FS_FAT12; - if (nclst >= MIN_FAT16) fmt = FS_FAT16; - if (nclst >= MIN_FAT32) fmt = FS_FAT32; - - /* Boundaries and Limits */ - fs->n_fatent = nclst + 2; /* Number of FAT entries */ - fs->database = bsect + sysect; /* Data start sector */ - fs->fatbase = bsect + nrsv; /* FAT start sector */ - if (fmt == FS_FAT32) { - if (fs->n_rootdir) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must be 0) */ - fs->dirbase = LD_DWORD(fs->win+BPB_RootClus); /* Root directory start cluster */ - szbfat = fs->n_fatent * 4; /* (Required FAT size) */ - } else { - if (!fs->n_rootdir) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must not be 0) */ - fs->dirbase = fs->fatbase + fasize; /* Root directory start sector */ - szbfat = (fmt == FS_FAT16) ? /* (Required FAT size) */ - fs->n_fatent * 2 : fs->n_fatent * 3 / 2 + (fs->n_fatent & 1); - } - if (fs->fsize < (szbfat + (SS(fs) - 1)) / SS(fs)) /* (BPB_FATSz must not be less than required) */ - return FR_NO_FILESYSTEM; - -#if !_FS_READONLY - /* Initialize cluster allocation information */ - fs->free_clust = 0xFFFFFFFF; - fs->last_clust = 0; - - /* Get fsinfo if available */ - if (fmt == FS_FAT32) { - fs->fsi_flag = 0; - fs->fsi_sector = bsect + LD_WORD(fs->win+BPB_FSInfo); - if (disk_read(fs->drv, fs->win, fs->fsi_sector, 1) == RES_OK && - LD_WORD(fs->win+BS_55AA) == 0xAA55 && - LD_DWORD(fs->win+FSI_LeadSig) == 0x41615252 && - LD_DWORD(fs->win+FSI_StrucSig) == 0x61417272) { - fs->last_clust = LD_DWORD(fs->win+FSI_Nxt_Free); - fs->free_clust = LD_DWORD(fs->win+FSI_Free_Count); - } - } -#endif - fs->fs_type = fmt; /* FAT sub-type */ - fs->id = ++Fsid; /* File system mount ID */ - fs->winsect = 0; /* Invalidate sector cache */ - fs->wflag = 0; -#if _FS_RPATH - fs->cdir = 0; /* Current directory (root dir) */ -#endif -#if _FS_LOCK /* Clear file lock semaphores */ - clear_lock(fs); -#endif - - return FR_OK; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Check if the file/dir object is valid or not */ -/*-----------------------------------------------------------------------*/ - -static -FRESULT validate ( /* FR_OK(0): The object is valid, !=0: Invalid */ - void* obj /* Pointer to the object FIL/DIR to check validity */ -) -{ - FIL *fil; - - - fil = (FIL*)obj; /* Assuming offset of fs and id in the FIL/DIR is identical */ - if (!fil->fs || !fil->fs->fs_type || fil->fs->id != fil->id) - return FR_INVALID_OBJECT; - - ENTER_FF(fil->fs); /* Lock file system */ - - if (disk_status(fil->fs->drv) & STA_NOINIT) - return FR_NOT_READY; - - return FR_OK; -} - - - - -/*-------------------------------------------------------------------------- - - Public Functions - ---------------------------------------------------------------------------*/ - - - -/*-----------------------------------------------------------------------*/ -/* Mount/Unmount a Logical Drive */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_mount ( - uint8_t vol, /* Logical drive number to be mounted/unmounted */ - FATFS *fs /* Pointer to new file system object (NULL for unmount)*/ -) -{ - FATFS *rfs; - - - if (vol >= _VOLUMES) /* Check if the drive number is valid */ - return FR_INVALID_DRIVE; - rfs = FatFs[vol]; /* Get current fs object */ - - if (rfs) { -#if _FS_LOCK - clear_lock(rfs); -#endif -#if _FS_REENTRANT /* Discard sync object of the current volume */ - if (!ff_del_syncobj(rfs->sobj)) return FR_INT_ERR; -#endif - rfs->fs_type = 0; /* Clear old fs object */ - } - - if (fs) { - fs->fs_type = 0; /* Clear new fs object */ -#if _FS_REENTRANT /* Create sync object for the new volume */ - if (!ff_cre_syncobj(vol, &fs->sobj)) return FR_INT_ERR; -#endif - } - FatFs[vol] = fs; /* Register new fs object */ - - return FR_OK; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Open or Create a File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_open ( - FIL *fp, /* Pointer to the blank file object */ - const TCHAR *path, /* Pointer to the file name */ - uint8_t mode /* Access mode and file open mode flags */ -) -{ - FRESULT res; - DIR dj; - uint8_t *dir; - DEF_NAMEBUF; - - - if (!fp) return FR_INVALID_OBJECT; - fp->fs = 0; /* Clear file object */ - -#if !_FS_READONLY - mode &= FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW; - res = chk_mounted(&path, &dj.fs, (uint8_t)(mode & ~FA_READ)); -#else - mode &= FA_READ; - res = chk_mounted(&path, &dj.fs, 0); -#endif - if (res == FR_OK) { - INIT_BUF(dj); - res = follow_path(&dj, path); /* Follow the file path */ - dir = dj.dir; -#if !_FS_READONLY /* R/W configuration */ - if (res == FR_OK) { - if (!dir) /* Current dir itself */ - res = FR_INVALID_NAME; -#if _FS_LOCK - else - res = chk_lock(&dj, (mode & ~FA_READ) ? 1 : 0); -#endif - } - /* Create or Open a file */ - if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) { - uint32_t dw, cl; - - if (res != FR_OK) { /* No file, create new */ - if (res == FR_NO_FILE) /* There is no file to open, create a new entry */ -#if _FS_LOCK - res = enq_lock() ? dir_register(&dj) : FR_TOO_MANY_OPEN_FILES; -#else - res = dir_register(&dj); -#endif - mode |= FA_CREATE_ALWAYS; /* File is created */ - dir = dj.dir; /* New entry */ - } - else { /* Any object is already existing */ - if (dir[DIR_Attr] & (AM_RDO | AM_DIR)) { /* Cannot overwrite it (R/O or DIR) */ - res = FR_DENIED; - } else { - if (mode & FA_CREATE_NEW) /* Cannot create as new file */ - res = FR_EXIST; - } - } - if (res == FR_OK && (mode & FA_CREATE_ALWAYS)) { /* Truncate it if overwrite mode */ - dw = get_fattime(); /* Created time */ - ST_DWORD(dir+DIR_CrtTime, dw); - dir[DIR_Attr] = 0; /* Reset attribute */ - ST_DWORD(dir+DIR_FileSize, 0); /* size = 0 */ - cl = ld_clust(dj.fs, dir); /* Get start cluster */ - st_clust(dir, 0); /* cluster = 0 */ - dj.fs->wflag = 1; - if (cl) { /* Remove the cluster chain if exist */ - dw = dj.fs->winsect; - res = remove_chain(dj.fs, cl); - if (res == FR_OK) { - dj.fs->last_clust = cl - 1; /* Reuse the cluster hole */ - res = move_window(dj.fs, dw); - } - } - } - } - else { /* Open an existing file */ - if (res == FR_OK) { /* Follow succeeded */ - if (dir[DIR_Attr] & AM_DIR) { /* It is a directory */ - res = FR_NO_FILE; - } else { - if ((mode & FA_WRITE) && (dir[DIR_Attr] & AM_RDO)) /* R/O violation */ - res = FR_DENIED; - } - } - } - if (res == FR_OK) { - if (mode & FA_CREATE_ALWAYS) /* Set file change flag if created or overwritten */ - mode |= FA__WRITTEN; - fp->dir_sect = dj.fs->winsect; /* Pointer to the directory entry */ - fp->dir_ptr = dir; -#if _FS_LOCK - fp->lockid = inc_lock(&dj, (mode & ~FA_READ) ? 1 : 0); - if (!fp->lockid) res = FR_INT_ERR; -#endif - } - -#else /* R/O configuration */ - if (res == FR_OK) { /* Follow succeeded */ - dir = dj.dir; - if (!dir) { /* Current dir itself */ - res = FR_INVALID_NAME; - } else { - if (dir[DIR_Attr] & AM_DIR) /* It is a directory */ - res = FR_NO_FILE; - } - } -#endif - FREE_BUF(); - - if (res == FR_OK) { - fp->flag = mode; /* File access mode */ - fp->sclust = ld_clust(dj.fs, dir); /* File start cluster */ - fp->fsize = LD_DWORD(dir+DIR_FileSize); /* File size */ - fp->fptr = 0; /* File pointer */ - fp->dsect = 0; -#if _USE_FASTSEEK - fp->cltbl = 0; /* Normal seek mode */ -#endif - fp->fs = dj.fs; fp->id = dj.fs->id; /* Validate file object */ - } - } - - LEAVE_FF(dj.fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Read File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_read ( - FIL *fp, /* Pointer to the file object */ - void *buff, /* Pointer to data buffer */ - uint32_t btr, /* Number of bytes to read */ - uint32_t *br /* Pointer to number of bytes read */ -) -{ - FRESULT res; - uint32_t clst, sect, remain; - uint32_t rcnt, cc; - uint8_t csect, *rbuff = buff; - - - *br = 0; /* Clear read byte counter */ - - res = validate(fp); /* Check validity */ - if (res != FR_OK) LEAVE_FF(fp->fs, res); - if (fp->flag & FA__ERROR) /* Aborted file? */ - LEAVE_FF(fp->fs, FR_INT_ERR); - if (!(fp->flag & FA_READ)) /* Check access mode */ - LEAVE_FF(fp->fs, FR_DENIED); - remain = fp->fsize - fp->fptr; - if (btr > remain) btr = (uint32_t)remain; /* Truncate btr by remaining bytes */ - - for ( ; btr; /* Repeat until all data read */ - rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) { - if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */ - csect = (uint8_t)(fp->fptr / SS(fp->fs) & (fp->fs->csize - 1)); /* Sector offset in the cluster */ - if (!csect) { /* On the cluster boundary? */ - if (fp->fptr == 0) { /* On the top of the file? */ - clst = fp->sclust; /* Follow from the origin */ - } else { /* Middle or end of the file */ -#if _USE_FASTSEEK - if (fp->cltbl) - clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */ - else -#endif - clst = get_fat(fp->fs, fp->clust); /* Follow cluster chain on the FAT */ - } - if (clst < 2) ABORT(fp->fs, FR_INT_ERR); - if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); - fp->clust = clst; /* Update current cluster */ - } - sect = clust2sect(fp->fs, fp->clust); /* Get current sector */ - if (!sect) ABORT(fp->fs, FR_INT_ERR); - sect += csect; - cc = btr / SS(fp->fs); /* When remaining bytes >= sector size, */ - if (cc) { /* Read maximum contiguous sectors directly */ - if (csect + cc > fp->fs->csize) /* Clip at cluster boundary */ - cc = fp->fs->csize - csect; - if (disk_read(fp->fs->drv, rbuff, sect, (uint8_t)cc) != RES_OK) - ABORT(fp->fs, FR_DISK_ERR); -#if !_FS_READONLY && _FS_MINIMIZE <= 2 /* Replace one of the read sectors with cached data if it contains a dirty sector */ -#if _FS_TINY - if (fp->fs->wflag && fp->fs->winsect - sect < cc) - mem_cpy(rbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), fp->fs->win, SS(fp->fs)); -#else - if ((fp->flag & FA__DIRTY) && fp->dsect - sect < cc) - mem_cpy(rbuff + ((fp->dsect - sect) * SS(fp->fs)), fp->buf, SS(fp->fs)); -#endif -#endif - rcnt = SS(fp->fs) * cc; /* Number of bytes transferred */ - continue; - } -#if !_FS_TINY - if (fp->dsect != sect) { /* Load data sector if not in cache */ -#if !_FS_READONLY - if (fp->flag & FA__DIRTY) { /* Write-back dirty sector cache */ - if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK) - ABORT(fp->fs, FR_DISK_ERR); - fp->flag &= ~FA__DIRTY; - } -#endif - if (disk_read(fp->fs->drv, fp->buf, sect, 1) != RES_OK) /* Fill sector cache */ - ABORT(fp->fs, FR_DISK_ERR); - } -#endif - fp->dsect = sect; - } - rcnt = SS(fp->fs) - ((uint32_t)fp->fptr % SS(fp->fs)); /* Get partial sector data from sector buffer */ - if (rcnt > btr) rcnt = btr; -#if _FS_TINY - if (move_window(fp->fs, fp->dsect)) /* Move sector window */ - ABORT(fp->fs, FR_DISK_ERR); - mem_cpy(rbuff, &fp->fs->win[fp->fptr % SS(fp->fs)], rcnt); /* Pick partial sector */ -#else - mem_cpy(rbuff, &fp->buf[fp->fptr % SS(fp->fs)], rcnt); /* Pick partial sector */ -#endif - } - - LEAVE_FF(fp->fs, FR_OK); -} - - - - -#if !_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* Write File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_write ( - FIL *fp, /* Pointer to the file object */ - const void *buff, /* Pointer to the data to be written */ - uint32_t btw, /* Number of bytes to write */ - uint32_t *bw /* Pointer to number of bytes written */ -) -{ - FRESULT res; - uint32_t clst, sect; - uint32_t wcnt, cc; - const uint8_t *wbuff = buff; - uint8_t csect; - - - *bw = 0; /* Clear write byte counter */ - - res = validate(fp); /* Check validity */ - if (res != FR_OK) LEAVE_FF(fp->fs, res); - if (fp->flag & FA__ERROR) /* Aborted file? */ - LEAVE_FF(fp->fs, FR_INT_ERR); - if (!(fp->flag & FA_WRITE)) /* Check access mode */ - LEAVE_FF(fp->fs, FR_DENIED); - if ((uint32_t)(fp->fsize + btw) < fp->fsize) btw = 0; /* File size cannot reach 4GB */ - - for ( ; btw; /* Repeat until all data written */ - wbuff += wcnt, fp->fptr += wcnt, *bw += wcnt, btw -= wcnt) { - if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */ - csect = (uint8_t)(fp->fptr / SS(fp->fs) & (fp->fs->csize - 1)); /* Sector offset in the cluster */ - if (!csect) { /* On the cluster boundary? */ - if (fp->fptr == 0) { /* On the top of the file? */ - clst = fp->sclust; /* Follow from the origin */ - if (clst == 0) /* When no cluster is allocated, */ - fp->sclust = clst = create_chain(fp->fs, 0); /* Create a new cluster chain */ - } else { /* Middle or end of the file */ -#if _USE_FASTSEEK - if (fp->cltbl) - clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */ - else -#endif - clst = create_chain(fp->fs, fp->clust); /* Follow or stretch cluster chain on the FAT */ - } - if (clst == 0) break; /* Could not allocate a new cluster (disk full) */ - if (clst == 1) ABORT(fp->fs, FR_INT_ERR); - if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); - fp->clust = clst; /* Update current cluster */ - } -#if _FS_TINY - if (fp->fs->winsect == fp->dsect && move_window(fp->fs, 0)) /* Write-back sector cache */ - ABORT(fp->fs, FR_DISK_ERR); -#else - if (fp->flag & FA__DIRTY) { /* Write-back sector cache */ - if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK) - ABORT(fp->fs, FR_DISK_ERR); - fp->flag &= ~FA__DIRTY; - } -#endif - sect = clust2sect(fp->fs, fp->clust); /* Get current sector */ - if (!sect) ABORT(fp->fs, FR_INT_ERR); - sect += csect; - cc = btw / SS(fp->fs); /* When remaining bytes >= sector size, */ - if (cc) { /* Write maximum contiguous sectors directly */ - if (csect + cc > fp->fs->csize) /* Clip at cluster boundary */ - cc = fp->fs->csize - csect; - if (disk_write(fp->fs->drv, wbuff, sect, (uint8_t)cc) != RES_OK) - ABORT(fp->fs, FR_DISK_ERR); -#if _FS_TINY - if (fp->fs->winsect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */ - mem_cpy(fp->fs->win, wbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), SS(fp->fs)); - fp->fs->wflag = 0; - } -#else - if (fp->dsect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */ - mem_cpy(fp->buf, wbuff + ((fp->dsect - sect) * SS(fp->fs)), SS(fp->fs)); - fp->flag &= ~FA__DIRTY; - } -#endif - wcnt = SS(fp->fs) * cc; /* Number of bytes transferred */ - continue; - } -#if _FS_TINY - if (fp->fptr >= fp->fsize) { /* Avoid silly cache filling at growing edge */ - if (move_window(fp->fs, 0)) ABORT(fp->fs, FR_DISK_ERR); - fp->fs->winsect = sect; - } -#else - if (fp->dsect != sect) { /* Fill sector cache with file data */ - if (fp->fptr < fp->fsize && - disk_read(fp->fs->drv, fp->buf, sect, 1) != RES_OK) - ABORT(fp->fs, FR_DISK_ERR); - } -#endif - fp->dsect = sect; - } - wcnt = SS(fp->fs) - ((uint32_t)fp->fptr % SS(fp->fs));/* Put partial sector into file I/O buffer */ - if (wcnt > btw) wcnt = btw; -#if _FS_TINY - if (move_window(fp->fs, fp->dsect)) /* Move sector window */ - ABORT(fp->fs, FR_DISK_ERR); - mem_cpy(&fp->fs->win[fp->fptr % SS(fp->fs)], wbuff, wcnt); /* Fit partial sector */ - fp->fs->wflag = 1; -#else - mem_cpy(&fp->buf[fp->fptr % SS(fp->fs)], wbuff, wcnt); /* Fit partial sector */ - fp->flag |= FA__DIRTY; -#endif - } - - if (fp->fptr > fp->fsize) fp->fsize = fp->fptr; /* Update file size if needed */ - fp->flag |= FA__WRITTEN; /* Set file change flag */ - - LEAVE_FF(fp->fs, FR_OK); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Synchronize the File Object */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_sync ( - FIL *fp /* Pointer to the file object */ -) -{ - FRESULT res; - uint32_t tim; - uint8_t *dir; - - - res = validate(fp); /* Check validity of the object */ - if (res == FR_OK) { - if (fp->flag & FA__WRITTEN) { /* Has the file been written? */ -#if !_FS_TINY /* Write-back dirty buffer */ - if (fp->flag & FA__DIRTY) { - if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK) - LEAVE_FF(fp->fs, FR_DISK_ERR); - fp->flag &= ~FA__DIRTY; - } -#endif - /* Update the directory entry */ - res = move_window(fp->fs, fp->dir_sect); - if (res == FR_OK) { - dir = fp->dir_ptr; - dir[DIR_Attr] |= AM_ARC; /* Set archive bit */ - ST_DWORD(dir+DIR_FileSize, fp->fsize); /* Update file size */ - st_clust(dir, fp->sclust); /* Update start cluster */ - tim = get_fattime(); /* Update updated time */ - ST_DWORD(dir+DIR_WrtTime, tim); - ST_WORD(dir+DIR_LstAccDate, 0); - fp->flag &= ~FA__WRITTEN; - fp->fs->wflag = 1; - res = sync(fp->fs); - } - } - } - - LEAVE_FF(fp->fs, res); -} - -#endif /* !_FS_READONLY */ - - - - -/*-----------------------------------------------------------------------*/ -/* Close File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_close ( - FIL *fp /* Pointer to the file object to be closed */ -) -{ - FRESULT res; - - -#if _FS_READONLY - res = validate(fp); - { -#if _FS_REENTRANT - FATFS *fs = fp->fs; -#endif - if (res == FR_OK) fp->fs = 0; /* Discard file object */ - LEAVE_FF(fs, res); - } -#else - res = f_sync(fp); /* Flush cached data */ -#if _FS_LOCK - if (res == FR_OK) { /* Decrement open counter */ -#if _FS_REENTRANT - FATFS *fs = fp->fs;; - res = validate(fp); - if (res == FR_OK) { - res = dec_lock(fp->lockid); - unlock_fs(fs, FR_OK); - } -#else - res = dec_lock(fp->lockid); -#endif - } -#endif - if (res == FR_OK) fp->fs = 0; /* Discard file object */ - return res; -#endif -} - - - - -/*-----------------------------------------------------------------------*/ -/* Current Drive/Directory Handlings */ -/*-----------------------------------------------------------------------*/ - -#if _FS_RPATH >= 1 - -FRESULT f_chdrive ( - uint8_t drv /* Drive number */ -) -{ - if (drv >= _VOLUMES) return FR_INVALID_DRIVE; - - CurrVol = drv; - - return FR_OK; -} - - - -FRESULT f_chdir ( - const TCHAR *path /* Pointer to the directory path */ -) -{ - FRESULT res; - DIR dj; - DEF_NAMEBUF; - - - res = chk_mounted(&path, &dj.fs, 0); - if (res == FR_OK) { - INIT_BUF(dj); - res = follow_path(&dj, path); /* Follow the path */ - FREE_BUF(); - if (res == FR_OK) { /* Follow completed */ - if (!dj.dir) { - dj.fs->cdir = dj.sclust; /* Start directory itself */ - } else { - if (dj.dir[DIR_Attr] & AM_DIR) /* Reached to the directory */ - dj.fs->cdir = ld_clust(dj.fs, dj.dir); - else - res = FR_NO_PATH; /* Reached but a file */ - } - } - if (res == FR_NO_FILE) res = FR_NO_PATH; - } - - LEAVE_FF(dj.fs, res); -} - - -#if _FS_RPATH >= 2 -FRESULT f_getcwd ( - TCHAR *path, /* Pointer to the directory path */ - uint32_t sz_path /* Size of path */ -) -{ - FRESULT res; - DIR dj; - uint32_t i, n; - uint32_t ccl; - TCHAR *tp; - FILINFO fno; - DEF_NAMEBUF; - - - *path = 0; - res = chk_mounted((const TCHAR**)&path, &dj.fs, 0); /* Get current volume */ - if (res == FR_OK) { - INIT_BUF(dj); - i = sz_path; /* Bottom of buffer (dir stack base) */ - dj.sclust = dj.fs->cdir; /* Start to follow upper dir from current dir */ - while ((ccl = dj.sclust) != 0) { /* Repeat while current dir is a sub-dir */ - res = dir_sdi(&dj, 1); /* Get parent dir */ - if (res != FR_OK) break; - res = dir_read(&dj); - if (res != FR_OK) break; - dj.sclust = ld_clust(dj.fs, dj.dir); /* Goto parent dir */ - res = dir_sdi(&dj, 0); - if (res != FR_OK) break; - do { /* Find the entry links to the child dir */ - res = dir_read(&dj); - if (res != FR_OK) break; - if (ccl == ld_clust(dj.fs, dj.dir)) break; /* Found the entry */ - res = dir_next(&dj, 0); - } while (res == FR_OK); - if (res == FR_NO_FILE) res = FR_INT_ERR;/* It cannot be 'not found'. */ - if (res != FR_OK) break; -#if _USE_LFN - fno.lfname = path; - fno.lfsize = i; -#endif - get_fileinfo(&dj, &fno); /* Get the dir name and push it to the buffer */ - tp = fno.fname; - if (_USE_LFN && *path) tp = path; - for (n = 0; tp[n]; n++) ; - if (i < n + 3) { - res = FR_NOT_ENOUGH_CORE; break; - } - while (n) path[--i] = tp[--n]; - path[--i] = '/'; - } - tp = path; - if (res == FR_OK) { - *tp++ = '0' + CurrVol; /* Put drive number */ - *tp++ = ':'; - if (i == sz_path) { /* Root-dir */ - *tp++ = '/'; - } else { /* Sub-dir */ - do /* Add stacked path str */ - *tp++ = path[i++]; - while (i < sz_path); - } - } - *tp = 0; - FREE_BUF(); - } - - LEAVE_FF(dj.fs, res); -} -#endif /* _FS_RPATH >= 2 */ -#endif /* _FS_RPATH >= 1 */ - - - -#if _FS_MINIMIZE <= 2 -/*-----------------------------------------------------------------------*/ -/* Seek File R/W Pointer */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_lseek ( - FIL *fp, /* Pointer to the file object */ - uint32_t ofs /* File pointer from top of file */ -) -{ - FRESULT res; - - - res = validate(fp); /* Check validity of the object */ - if (res != FR_OK) LEAVE_FF(fp->fs, res); - if (fp->flag & FA__ERROR) /* Check abort flag */ - LEAVE_FF(fp->fs, FR_INT_ERR); - -#if _USE_FASTSEEK - if (fp->cltbl) { /* Fast seek */ - uint32_t cl, pcl, ncl, tcl, dsc, tlen, ulen, *tbl; - - if (ofs == CREATE_LINKMAP) { /* Create CLMT */ - tbl = fp->cltbl; - tlen = *tbl++; ulen = 2; /* Given table size and required table size */ - cl = fp->sclust; /* Top of the chain */ - if (cl) { - do { - /* Get a fragment */ - tcl = cl; ncl = 0; ulen += 2; /* Top, length and used items */ - do { - pcl = cl; ncl++; - cl = get_fat(fp->fs, cl); - if (cl <= 1) ABORT(fp->fs, FR_INT_ERR); - if (cl == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); - } while (cl == pcl + 1); - if (ulen <= tlen) { /* Store the length and top of the fragment */ - *tbl++ = ncl; *tbl++ = tcl; - } - } while (cl < fp->fs->n_fatent); /* Repeat until end of chain */ - } - *fp->cltbl = ulen; /* Number of items used */ - if (ulen <= tlen) - *tbl = 0; /* Terminate table */ - else - res = FR_NOT_ENOUGH_CORE; /* Given table size is smaller than required */ - - } else { /* Fast seek */ - if (ofs > fp->fsize) /* Clip offset at the file size */ - ofs = fp->fsize; - fp->fptr = ofs; /* Set file pointer */ - if (ofs) { - fp->clust = clmt_clust(fp, ofs - 1); - dsc = clust2sect(fp->fs, fp->clust); - if (!dsc) ABORT(fp->fs, FR_INT_ERR); - dsc += (ofs - 1) / SS(fp->fs) & (fp->fs->csize - 1); - if (fp->fptr % SS(fp->fs) && dsc != fp->dsect) { /* Refill sector cache if needed */ -#if !_FS_TINY -#if !_FS_READONLY - if (fp->flag & FA__DIRTY) { /* Write-back dirty sector cache */ - if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK) - ABORT(fp->fs, FR_DISK_ERR); - fp->flag &= ~FA__DIRTY; - } -#endif - if (disk_read(fp->fs->drv, fp->buf, dsc, 1) != RES_OK) /* Load current sector */ - ABORT(fp->fs, FR_DISK_ERR); -#endif - fp->dsect = dsc; - } - } - } - } else -#endif - - /* Normal Seek */ - { - uint32_t clst, bcs, nsect, ifptr; - - if (ofs > fp->fsize /* In read-only mode, clip offset with the file size */ -#if !_FS_READONLY - && !(fp->flag & FA_WRITE) -#endif - ) ofs = fp->fsize; - - ifptr = fp->fptr; - fp->fptr = nsect = 0; - if (ofs) { - bcs = (uint32_t)fp->fs->csize * SS(fp->fs); /* Cluster size (byte) */ - if (ifptr > 0 && - (ofs - 1) / bcs >= (ifptr - 1) / bcs) { /* When seek to same or following cluster, */ - fp->fptr = (ifptr - 1) & ~(bcs - 1); /* start from the current cluster */ - ofs -= fp->fptr; - clst = fp->clust; - } else { /* When seek to back cluster, */ - clst = fp->sclust; /* start from the first cluster */ -#if !_FS_READONLY - if (clst == 0) { /* If no cluster chain, create a new chain */ - clst = create_chain(fp->fs, 0); - if (clst == 1) ABORT(fp->fs, FR_INT_ERR); - if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); - fp->sclust = clst; - } -#endif - fp->clust = clst; - } - if (clst != 0) { - while (ofs > bcs) { /* Cluster following loop */ -#if !_FS_READONLY - if (fp->flag & FA_WRITE) { /* Check if in write mode or not */ - clst = create_chain(fp->fs, clst); /* Force stretch if in write mode */ - if (clst == 0) { /* When disk gets full, clip file size */ - ofs = bcs; break; - } - } else -#endif - clst = get_fat(fp->fs, clst); /* Follow cluster chain if not in write mode */ - if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); - if (clst <= 1 || clst >= fp->fs->n_fatent) ABORT(fp->fs, FR_INT_ERR); - fp->clust = clst; - fp->fptr += bcs; - ofs -= bcs; - } - fp->fptr += ofs; - if (ofs % SS(fp->fs)) { - nsect = clust2sect(fp->fs, clst); /* Current sector */ - if (!nsect) ABORT(fp->fs, FR_INT_ERR); - nsect += ofs / SS(fp->fs); - } - } - } - if (fp->fptr % SS(fp->fs) && nsect != fp->dsect) { /* Fill sector cache if needed */ -#if !_FS_TINY -#if !_FS_READONLY - if (fp->flag & FA__DIRTY) { /* Write-back dirty sector cache */ - if (disk_write(fp->fs->drv, fp->buf, fp->dsect, 1) != RES_OK) - ABORT(fp->fs, FR_DISK_ERR); - fp->flag &= ~FA__DIRTY; - } -#endif - if (disk_read(fp->fs->drv, fp->buf, nsect, 1) != RES_OK) /* Fill sector cache */ - ABORT(fp->fs, FR_DISK_ERR); -#endif - fp->dsect = nsect; - } -#if !_FS_READONLY - if (fp->fptr > fp->fsize) { /* Set file change flag if the file size is extended */ - fp->fsize = fp->fptr; - fp->flag |= FA__WRITTEN; - } -#endif - } - - LEAVE_FF(fp->fs, res); -} - - - -#if _FS_MINIMIZE <= 1 -/*-----------------------------------------------------------------------*/ -/* Create a Directory Object */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_opendir ( - DIR *dj, /* Pointer to directory object to create */ - const char *path /* Pointer to the directory path */ -) -{ - FRESULT res; - FATFS *fs; - DEF_NAMEBUF; - - - if (!dj) return FR_INVALID_OBJECT; - - res = chk_mounted(&path, &dj->fs, 0); - fs = dj->fs; - if (res == FR_OK) { - INIT_BUF(*dj); - res = follow_path(dj, path); /* Follow the path to the directory */ - FREE_BUF(); - if (res == FR_OK) { /* Follow completed */ - if (dj->dir) { /* It is not the root dir */ - if (dj->dir[DIR_Attr] & AM_DIR) { /* The object is a directory */ - dj->sclust = ld_clust(fs, dj->dir); - } else { /* The object is not a directory */ - res = FR_NO_PATH; - } - } - if (res == FR_OK) { - dj->id = fs->id; - res = dir_sdi(dj, 0); /* Rewind dir */ - } - } - if (res == FR_NO_FILE) res = FR_NO_PATH; - if (res != FR_OK) dj->fs = 0; /* Invalidate the dir object if function faild */ - } else { - dj->fs = 0; - } - - LEAVE_FF(fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Read Directory Entry in Sequence */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_readdir ( - DIR *dj, /* Pointer to the open directory object */ - FILINFO *fno /* Pointer to file information to return */ -) -{ - FRESULT res; - DEF_NAMEBUF; - - - res = validate(dj); /* Check validity of the object */ - if (res == FR_OK) { - if (!fno) { - res = dir_sdi(dj, 0); /* Rewind the directory object */ - } else { - INIT_BUF(*dj); - res = dir_read(dj); /* Read an directory item */ - if (res == FR_NO_FILE) { /* Reached end of dir */ - dj->sect = 0; - res = FR_OK; - } - if (res == FR_OK) { /* A valid entry is found */ - get_fileinfo(dj, fno); /* Get the object information */ - res = dir_next(dj, 0); /* Increment index for next */ - if (res == FR_NO_FILE) { - dj->sect = 0; - res = FR_OK; - } - } - FREE_BUF(); - } - } - - LEAVE_FF(dj->fs, res); -} - - - -#if _FS_MINIMIZE == 0 -/*-----------------------------------------------------------------------*/ -/* Get File Status */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_stat ( - const TCHAR *path, /* Pointer to the file path */ - FILINFO *fno /* Pointer to file information to return */ -) -{ - FRESULT res; - DIR dj; - DEF_NAMEBUF; - - - res = chk_mounted(&path, &dj.fs, 0); - if (res == FR_OK) { - INIT_BUF(dj); - res = follow_path(&dj, path); /* Follow the file path */ - if (res == FR_OK) { /* Follow completed */ - if (dj.dir) /* Found an object */ - get_fileinfo(&dj, fno); - else /* It is root dir */ - res = FR_INVALID_NAME; - } - FREE_BUF(); - } - - LEAVE_FF(dj.fs, res); -} - - - -#if !_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* Get Number of Free Clusters */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_getfree ( - const TCHAR *path, /* Pointer to the logical drive number (root dir) */ - uint32_t *nclst, /* Pointer to the variable to return number of free clusters */ - FATFS **fatfs /* Pointer to pointer to corresponding file system object to return */ -) -{ - FRESULT res; - FATFS *fs; - uint32_t n, clst, sect, stat; - uint32_t i; - uint8_t fat, *p; - - - /* Get drive number */ - res = chk_mounted(&path, fatfs, 0); - fs = *fatfs; - if (res == FR_OK) { - /* If free_clust is valid, return it without full cluster scan */ - if (fs->free_clust <= fs->n_fatent - 2) { - *nclst = fs->free_clust; - } else { - /* Get number of free clusters */ - fat = fs->fs_type; - n = 0; - if (fat == FS_FAT12) { - clst = 2; - do { - stat = get_fat(fs, clst); - if (stat == 0xFFFFFFFF) { res = FR_DISK_ERR; break; } - if (stat == 1) { res = FR_INT_ERR; break; } - if (stat == 0) n++; - } while (++clst < fs->n_fatent); - } else { - clst = fs->n_fatent; - sect = fs->fatbase; - i = 0; p = 0; - do { - if (!i) { - res = move_window(fs, sect++); - if (res != FR_OK) break; - p = fs->win; - i = SS(fs); - } - if (fat == FS_FAT16) { - if (LD_WORD(p) == 0) n++; - p += 2; i -= 2; - } else { - if ((LD_DWORD(p) & 0x0FFFFFFF) == 0) n++; - p += 4; i -= 4; - } - } while (--clst); - } - fs->free_clust = n; - if (fat == FS_FAT32) fs->fsi_flag = 1; - *nclst = n; - } - } - LEAVE_FF(fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Truncate File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_truncate ( - FIL *fp /* Pointer to the file object */ -) -{ - FRESULT res; - uint32_t ncl; - - - if (!fp) return FR_INVALID_OBJECT; - - res = validate(fp); /* Check validity of the object */ - if (res == FR_OK) { - if (fp->flag & FA__ERROR) { /* Check abort flag */ - res = FR_INT_ERR; - } else { - if (!(fp->flag & FA_WRITE)) /* Check access mode */ - res = FR_DENIED; - } - } - if (res == FR_OK) { - if (fp->fsize > fp->fptr) { - fp->fsize = fp->fptr; /* Set file size to current R/W point */ - fp->flag |= FA__WRITTEN; - if (fp->fptr == 0) { /* When set file size to zero, remove entire cluster chain */ - res = remove_chain(fp->fs, fp->sclust); - fp->sclust = 0; - } else { /* When truncate a part of the file, remove remaining clusters */ - ncl = get_fat(fp->fs, fp->clust); - res = FR_OK; - if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR; - if (ncl == 1) res = FR_INT_ERR; - if (res == FR_OK && ncl < fp->fs->n_fatent) { - res = put_fat(fp->fs, fp->clust, 0x0FFFFFFF); - if (res == FR_OK) res = remove_chain(fp->fs, ncl); - } - } - } - if (res != FR_OK) fp->flag |= FA__ERROR; - } - - LEAVE_FF(fp->fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Delete a File or Directory */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_unlink ( - const TCHAR *path /* Pointer to the file or directory path */ -) -{ - FRESULT res; - DIR dj, sdj; - uint8_t *dir; - uint32_t dclst; - DEF_NAMEBUF; - - - res = chk_mounted(&path, &dj.fs, 1); - if (res == FR_OK) { - INIT_BUF(dj); - res = follow_path(&dj, path); /* Follow the file path */ - if (_FS_RPATH && res == FR_OK && (dj.fn[NS] & NS_DOT)) - res = FR_INVALID_NAME; /* Cannot remove dot entry */ -#if _FS_LOCK - if (res == FR_OK) res = chk_lock(&dj, 2); /* Cannot remove open file */ -#endif - if (res == FR_OK) { /* The object is accessible */ - dir = dj.dir; - if (!dir) { - res = FR_INVALID_NAME; /* Cannot remove the start directory */ - } else { - if (dir[DIR_Attr] & AM_RDO) - res = FR_DENIED; /* Cannot remove R/O object */ - } - dclst = ld_clust(dj.fs, dir); - if (res == FR_OK && (dir[DIR_Attr] & AM_DIR)) { /* Is it a sub-dir? */ - if (dclst < 2) { - res = FR_INT_ERR; - } else { - mem_cpy(&sdj, &dj, sizeof (DIR)); /* Check if the sub-dir is empty or not */ - sdj.sclust = dclst; - res = dir_sdi(&sdj, 2); /* Exclude dot entries */ - if (res == FR_OK) { - res = dir_read(&sdj); - if (res == FR_OK /* Not empty dir */ -#if _FS_RPATH - || dclst == dj.fs->cdir /* Current dir */ -#endif - ) res = FR_DENIED; - if (res == FR_NO_FILE) res = FR_OK; /* Empty */ - } - } - } - if (res == FR_OK) { - res = dir_remove(&dj); /* Remove the directory entry */ - if (res == FR_OK) { - if (dclst) /* Remove the cluster chain if exist */ - res = remove_chain(dj.fs, dclst); - if (res == FR_OK) res = sync(dj.fs); - } - } - } - FREE_BUF(); - } - LEAVE_FF(dj.fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Create a Directory */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_mkdir ( - const TCHAR *path /* Pointer to the directory path */ -) -{ - FRESULT res; - DIR dj; - uint8_t *dir, n; - uint32_t dsc, dcl, pcl, tim = get_fattime(); - DEF_NAMEBUF; - - - res = chk_mounted(&path, &dj.fs, 1); - if (res == FR_OK) { - INIT_BUF(dj); - res = follow_path(&dj, path); /* Follow the file path */ - if (res == FR_OK) res = FR_EXIST; /* Any object with same name is already existing */ - if (_FS_RPATH && res == FR_NO_FILE && (dj.fn[NS] & NS_DOT)) - res = FR_INVALID_NAME; - if (res == FR_NO_FILE) { /* Can create a new directory */ - dcl = create_chain(dj.fs, 0); /* Allocate a cluster for the new directory table */ - res = FR_OK; - if (dcl == 0) res = FR_DENIED; /* No space to allocate a new cluster */ - if (dcl == 1) res = FR_INT_ERR; - if (dcl == 0xFFFFFFFF) res = FR_DISK_ERR; - if (res == FR_OK) /* Flush FAT */ - res = move_window(dj.fs, 0); - if (res == FR_OK) { /* Initialize the new directory table */ - dsc = clust2sect(dj.fs, dcl); - dir = dj.fs->win; - mem_set(dir, 0, SS(dj.fs)); - mem_set(dir+DIR_Name, ' ', 8+3); /* Create "." entry */ - dir[DIR_Name] = '.'; - dir[DIR_Attr] = AM_DIR; - ST_DWORD(dir+DIR_WrtTime, tim); - st_clust(dir, dcl); - mem_cpy(dir+SZ_DIR, dir, SZ_DIR); /* Create ".." entry */ - dir[33] = '.'; pcl = dj.sclust; - if (dj.fs->fs_type == FS_FAT32 && pcl == dj.fs->dirbase) - pcl = 0; - st_clust(dir+SZ_DIR, pcl); - for (n = dj.fs->csize; n; n--) { /* Write dot entries and clear following sectors */ - dj.fs->winsect = dsc++; - dj.fs->wflag = 1; - res = move_window(dj.fs, 0); - if (res != FR_OK) break; - mem_set(dir, 0, SS(dj.fs)); - } - } - if (res == FR_OK) res = dir_register(&dj); /* Register the object to the directoy */ - if (res != FR_OK) { - remove_chain(dj.fs, dcl); /* Could not register, remove cluster chain */ - } else { - dir = dj.dir; - dir[DIR_Attr] = AM_DIR; /* Attribute */ - ST_DWORD(dir+DIR_WrtTime, tim); /* Created time */ - st_clust(dir, dcl); /* Table start cluster */ - dj.fs->wflag = 1; - res = sync(dj.fs); - } - } - FREE_BUF(); - } - - LEAVE_FF(dj.fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Change Attribute */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_chmod ( - const TCHAR *path, /* Pointer to the file path */ - uint8_t value, /* Attribute bits */ - uint8_t mask /* Attribute mask to change */ -) -{ - FRESULT res; - DIR dj; - uint8_t *dir; - DEF_NAMEBUF; - - - res = chk_mounted(&path, &dj.fs, 1); - if (res == FR_OK) { - INIT_BUF(dj); - res = follow_path(&dj, path); /* Follow the file path */ - FREE_BUF(); - if (_FS_RPATH && res == FR_OK && (dj.fn[NS] & NS_DOT)) - res = FR_INVALID_NAME; - if (res == FR_OK) { - dir = dj.dir; - if (!dir) { /* Is it a root directory? */ - res = FR_INVALID_NAME; - } else { /* File or sub directory */ - mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC; /* Valid attribute mask */ - dir[DIR_Attr] = (value & mask) | (dir[DIR_Attr] & (uint8_t)~mask); /* Apply attribute change */ - dj.fs->wflag = 1; - res = sync(dj.fs); - } - } - } - - LEAVE_FF(dj.fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Change Timestamp */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_utime ( - const TCHAR *path, /* Pointer to the file/directory name */ - const FILINFO *fno /* Pointer to the time stamp to be set */ -) -{ - FRESULT res; - DIR dj; - uint8_t *dir; - DEF_NAMEBUF; - - - res = chk_mounted(&path, &dj.fs, 1); - if (res == FR_OK) { - INIT_BUF(dj); - res = follow_path(&dj, path); /* Follow the file path */ - FREE_BUF(); - if (_FS_RPATH && res == FR_OK && (dj.fn[NS] & NS_DOT)) - res = FR_INVALID_NAME; - if (res == FR_OK) { - dir = dj.dir; - if (!dir) { /* Root directory */ - res = FR_INVALID_NAME; - } else { /* File or sub-directory */ - ST_WORD(dir+DIR_WrtTime, fno->ftime); - ST_WORD(dir+DIR_WrtDate, fno->fdate); - dj.fs->wflag = 1; - res = sync(dj.fs); - } - } - } - - LEAVE_FF(dj.fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Rename File/Directory */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_rename ( - const TCHAR *path_old, /* Pointer to the old name */ - const TCHAR *path_new /* Pointer to the new name */ -) -{ - FRESULT res; - DIR djo, djn; - uint8_t buf[21], *dir; - uint32_t dw; - DEF_NAMEBUF; - - - res = chk_mounted(&path_old, &djo.fs, 1); - if (res == FR_OK) { - djn.fs = djo.fs; - INIT_BUF(djo); - res = follow_path(&djo, path_old); /* Check old object */ - if (_FS_RPATH && res == FR_OK && (djo.fn[NS] & NS_DOT)) - res = FR_INVALID_NAME; -#if _FS_LOCK - if (res == FR_OK) res = chk_lock(&djo, 2); -#endif - if (res == FR_OK) { /* Old object is found */ - if (!djo.dir) { /* Is root dir? */ - res = FR_NO_FILE; - } else { - mem_cpy(buf, djo.dir+DIR_Attr, 21); /* Save the object information except for name */ - mem_cpy(&djn, &djo, sizeof (DIR)); /* Check new object */ - res = follow_path(&djn, path_new); - if (res == FR_OK) res = FR_EXIST; /* The new object name is already existing */ - if (res == FR_NO_FILE) { /* Is it a valid path and no name collision? */ -/* Start critical section that an interruption or error can cause cross-link */ - res = dir_register(&djn); /* Register the new entry */ - if (res == FR_OK) { - dir = djn.dir; /* Copy object information except for name */ - mem_cpy(dir+13, buf+2, 19); - dir[DIR_Attr] = buf[0] | AM_ARC; - djo.fs->wflag = 1; - if (djo.sclust != djn.sclust && (dir[DIR_Attr] & AM_DIR)) { /* Update .. entry in the directory if needed */ - dw = clust2sect(djo.fs, ld_clust(djo.fs, dir)); - if (!dw) { - res = FR_INT_ERR; - } else { - res = move_window(djo.fs, dw); - dir = djo.fs->win+SZ_DIR; /* .. entry */ - if (res == FR_OK && dir[1] == '.') { - dw = (djo.fs->fs_type == FS_FAT32 && djn.sclust == djo.fs->dirbase) ? 0 : djn.sclust; - st_clust(dir, dw); - djo.fs->wflag = 1; - } - } - } - if (res == FR_OK) { - res = dir_remove(&djo); /* Remove old entry */ - if (res == FR_OK) - res = sync(djo.fs); - } - } -/* End critical section */ - } - } - } - FREE_BUF(); - } - LEAVE_FF(djo.fs, res); -} - -#endif /* !_FS_READONLY */ -#endif /* _FS_MINIMIZE == 0 */ -#endif /* _FS_MINIMIZE <= 1 */ -#endif /* _FS_MINIMIZE <= 2 */ - - - -/*-----------------------------------------------------------------------*/ -/* Forward data to the stream directly (available on only tiny cfg) */ -/*-----------------------------------------------------------------------*/ -#if _USE_FORWARD && _FS_TINY - -FRESULT f_forward ( - FIL *fp, /* Pointer to the file object */ - uint32_t (*func)(const uint8_t*,uint32_t), /* Pointer to the streaming function */ - uint32_t btr, /* Number of bytes to forward */ - uint32_t *bf /* Pointer to number of bytes forwarded */ -) -{ - FRESULT res; - uint32_t remain, clst, sect; - uint32_t rcnt; - uint8_t csect; - - - *bf = 0; /* Clear transfer byte counter */ - - if (!fp) return FR_INVALID_OBJECT; - - res = validate(fp); /* Check validity of the object */ - if (res != FR_OK) LEAVE_FF(fp->fs, res); - if (fp->flag & FA__ERROR) /* Check error flag */ - LEAVE_FF(fp->fs, FR_INT_ERR); - if (!(fp->flag & FA_READ)) /* Check access mode */ - LEAVE_FF(fp->fs, FR_DENIED); - - remain = fp->fsize - fp->fptr; - if (btr > remain) btr = (uint32_t)remain; /* Truncate btr by remaining bytes */ - - for ( ; btr && (*func)(0, 0); /* Repeat until all data transferred or stream becomes busy */ - fp->fptr += rcnt, *bf += rcnt, btr -= rcnt) { - csect = (uint8_t)(fp->fptr / SS(fp->fs) & (fp->fs->csize - 1)); /* Sector offset in the cluster */ - if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */ - if (!csect) { /* On the cluster boundary? */ - clst = (fp->fptr == 0) ? /* On the top of the file? */ - fp->sclust : get_fat(fp->fs, fp->clust); - if (clst <= 1) ABORT(fp->fs, FR_INT_ERR); - if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); - fp->clust = clst; /* Update current cluster */ - } - } - sect = clust2sect(fp->fs, fp->clust); /* Get current data sector */ - if (!sect) ABORT(fp->fs, FR_INT_ERR); - sect += csect; - if (move_window(fp->fs, sect)) /* Move sector window */ - ABORT(fp->fs, FR_DISK_ERR); - fp->dsect = sect; - rcnt = SS(fp->fs) - (uint16_t)(fp->fptr % SS(fp->fs)); /* Forward data from sector window */ - if (rcnt > btr) rcnt = btr; - rcnt = (*func)(&fp->fs->win[(uint16_t)fp->fptr % SS(fp->fs)], rcnt); - if (!rcnt) ABORT(fp->fs, FR_INT_ERR); - } - - LEAVE_FF(fp->fs, FR_OK); -} -#endif /* _USE_FORWARD */ - - - -#if _USE_MKFS && !_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* Create File System on the Drive */ -/*-----------------------------------------------------------------------*/ -#define N_ROOTDIR 512 /* Number of root dir entries for FAT12/16 */ -#define N_FATS 1 /* Number of FAT copies (1 or 2) */ - - -FRESULT f_mkfs ( - uint8_t drv, /* Logical drive number */ - uint8_t sfd, /* Partitioning rule 0:FDISK, 1:SFD */ - uint32_t au /* Allocation unit size [bytes] */ -) -{ - static const uint16_t vst[] = { 1024, 512, 256, 128, 64, 32, 16, 8, 4, 2, 0}; - static const uint16_t cst[] = {32768, 16384, 8192, 4096, 2048, 16384, 8192, 4096, 2048, 1024, 512}; - uint8_t fmt, md, sys, *tbl, pdrv, part; - uint32_t n_clst, vs, n, wsect; - uint32_t i; - uint32_t b_vol, b_fat, b_dir, b_data; /* LBA */ - uint32_t n_vol, n_rsv, n_fat, n_dir; /* Size */ - FATFS *fs; - DSTATUS stat; - - - /* Check mounted drive and clear work area */ - if (drv >= _VOLUMES) return FR_INVALID_DRIVE; - if (sfd > 1) return FR_INVALID_PARAMETER; - if (au & (au - 1)) return FR_INVALID_PARAMETER; - fs = FatFs[drv]; - if (!fs) return FR_NOT_ENABLED; - fs->fs_type = 0; - pdrv = LD2PD(drv); /* Physical drive */ - part = LD2PT(drv); /* Partition (0:auto detect, 1-4:get from partition table)*/ - - /* Get disk statics */ - stat = disk_initialize(pdrv); - if (stat & STA_NOINIT) return FR_NOT_READY; - if (stat & STA_PROTECT) return FR_WRITE_PROTECTED; -#if _MAX_SS != 512 /* Get disk sector size */ - if (disk_ioctl(pdrv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK || SS(fs) > _MAX_SS) - return FR_DISK_ERR; -#endif - if (_MULTI_PARTITION && part) { - /* Get partition information from partition table in the MBR */ - if (disk_read(pdrv, fs->win, 0, 1) != RES_OK) return FR_DISK_ERR; - if (LD_WORD(fs->win+BS_55AA) != 0xAA55) return FR_MKFS_ABORTED; - tbl = &fs->win[MBR_Table + (part - 1) * SZ_PTE]; - if (!tbl[4]) return FR_MKFS_ABORTED; /* No partition? */ - b_vol = LD_DWORD(tbl+8); /* Volume start sector */ - n_vol = LD_DWORD(tbl+12); /* Volume size */ - } else { - /* Create a partition in this function */ - if (disk_ioctl(pdrv, GET_SECTOR_COUNT, &n_vol) != RES_OK || n_vol < 128) - return FR_DISK_ERR; - b_vol = (sfd) ? 0 : 63; /* Volume start sector */ - n_vol -= b_vol; /* Volume size */ - } - - if (!au) { /* AU auto selection */ - vs = n_vol / (2000 / (SS(fs) / 512)); - for (i = 0; vs < vst[i]; i++) ; - au = cst[i]; - } - au /= SS(fs); /* Number of sectors per cluster */ - if (au == 0) au = 1; - if (au > 128) au = 128; - - /* Pre-compute number of clusters and FAT sub-type */ - n_clst = n_vol / au; - fmt = FS_FAT12; - if (n_clst >= MIN_FAT16) fmt = FS_FAT16; - if (n_clst >= MIN_FAT32) fmt = FS_FAT32; - - /* Determine offset and size of FAT structure */ - if (fmt == FS_FAT32) { - n_fat = ((n_clst * 4) + 8 + SS(fs) - 1) / SS(fs); - n_rsv = 32; - n_dir = 0; - } else { - n_fat = (fmt == FS_FAT12) ? (n_clst * 3 + 1) / 2 + 3 : (n_clst * 2) + 4; - n_fat = (n_fat + SS(fs) - 1) / SS(fs); - n_rsv = 1; - n_dir = (uint32_t)N_ROOTDIR * SZ_DIR / SS(fs); - } - b_fat = b_vol + n_rsv; /* FAT area start sector */ - b_dir = b_fat + n_fat * N_FATS; /* Directory area start sector */ - b_data = b_dir + n_dir; /* Data area start sector */ - if (n_vol < b_data + au - b_vol) return FR_MKFS_ABORTED; /* Too small volume */ - - /* Align data start sector to erase block boundary (for flash memory media) */ - if (disk_ioctl(pdrv, GET_BLOCK_SIZE, &n) != RES_OK || !n || n > 32768) n = 1; - n = (b_data + n - 1) & ~(n - 1); /* Next nearest erase block from current data start */ - n = (n - b_data) / N_FATS; - if (fmt == FS_FAT32) { /* FAT32: Move FAT offset */ - n_rsv += n; - b_fat += n; - } else { /* FAT12/16: Expand FAT size */ - n_fat += n; - } - - /* Determine number of clusters and final check of validity of the FAT sub-type */ - n_clst = (n_vol - n_rsv - n_fat * N_FATS - n_dir) / au; - if ( (fmt == FS_FAT16 && n_clst < MIN_FAT16) - || (fmt == FS_FAT32 && n_clst < MIN_FAT32)) - return FR_MKFS_ABORTED; - - switch (fmt) { /* Determine system ID for partition table */ - case FS_FAT12: sys = 0x01; break; - case FS_FAT16: sys = (n_vol < 0x10000) ? 0x04 : 0x06; break; - default: sys = 0x0C; - } - - if (_MULTI_PARTITION && part) { - /* Update system ID in the partition table */ - tbl = &fs->win[MBR_Table + (part - 1) * SZ_PTE]; - tbl[4] = sys; - if (disk_write(pdrv, fs->win, 0, 1) != RES_OK) return FR_DISK_ERR; - md = 0xF8; - } else { - if (sfd) { /* No partition table (SFD) */ - md = 0xF0; - } else { /* Create partition table (FDISK) */ - mem_set(fs->win, 0, SS(fs)); - tbl = fs->win+MBR_Table; /* Create partition table for single partition in the drive */ - tbl[1] = 1; /* Partition start head */ - tbl[2] = 1; /* Partition start sector */ - tbl[3] = 0; /* Partition start cylinder */ - tbl[4] = sys; /* System type */ - tbl[5] = 254; /* Partition end head */ - n = (b_vol + n_vol) / 63 / 255; - tbl[6] = (uint8_t)((n >> 2) | 63); /* Partition end sector */ - tbl[7] = (uint8_t)n; /* End cylinder */ - ST_DWORD(tbl+8, 63); /* Partition start in LBA */ - ST_DWORD(tbl+12, n_vol); /* Partition size in LBA */ - ST_WORD(fs->win+BS_55AA, 0xAA55); /* MBR signature */ - if (disk_write(pdrv, fs->win, 0, 1) != RES_OK) /* Write it to the MBR sector */ - return FR_DISK_ERR; - md = 0xF8; - } - } - - /* Create BPB in the VBR */ - tbl = fs->win; /* Clear sector */ - mem_set(tbl, 0, SS(fs)); - mem_cpy(tbl, "\xEB\xFE\x90" "MSDOS5.0", 11);/* Boot jump code, OEM name */ - i = SS(fs); /* Sector size */ - ST_WORD(tbl+BPB_BytsPerSec, i); - tbl[BPB_SecPerClus] = (uint8_t)au; /* Sectors per cluster */ - ST_WORD(tbl+BPB_RsvdSecCnt, n_rsv); /* Reserved sectors */ - tbl[BPB_NumFATs] = N_FATS; /* Number of FATs */ - i = (fmt == FS_FAT32) ? 0 : N_ROOTDIR; /* Number of rootdir entries */ - ST_WORD(tbl+BPB_RootEntCnt, i); - if (n_vol < 0x10000) { /* Number of total sectors */ - ST_WORD(tbl+BPB_TotSec16, n_vol); - } else { - ST_DWORD(tbl+BPB_TotSec32, n_vol); - } - tbl[BPB_Media] = md; /* Media descriptor */ - ST_WORD(tbl+BPB_SecPerTrk, 63); /* Number of sectors per track */ - ST_WORD(tbl+BPB_NumHeads, 255); /* Number of heads */ - ST_DWORD(tbl+BPB_HiddSec, b_vol); /* Hidden sectors */ - n = get_fattime(); /* Use current time as VSN */ - if (fmt == FS_FAT32) { - ST_DWORD(tbl+BS_VolID32, n); /* VSN */ - ST_DWORD(tbl+BPB_FATSz32, n_fat); /* Number of sectors per FAT */ - ST_DWORD(tbl+BPB_RootClus, 2); /* Root directory start cluster (2) */ - ST_WORD(tbl+BPB_FSInfo, 1); /* FSInfo record offset (VBR+1) */ - ST_WORD(tbl+BPB_BkBootSec, 6); /* Backup boot record offset (VBR+6) */ - tbl[BS_DrvNum32] = 0x80; /* Drive number */ - tbl[BS_BootSig32] = 0x29; /* Extended boot signature */ - mem_cpy(tbl+BS_VolLab32, "NO NAME " "FAT32 ", 19); /* Volume label, FAT signature */ - } else { - ST_DWORD(tbl+BS_VolID, n); /* VSN */ - ST_WORD(tbl+BPB_FATSz16, n_fat); /* Number of sectors per FAT */ - tbl[BS_DrvNum] = 0x80; /* Drive number */ - tbl[BS_BootSig] = 0x29; /* Extended boot signature */ - mem_cpy(tbl+BS_VolLab, "NO NAME " "FAT ", 19); /* Volume label, FAT signature */ - } - ST_WORD(tbl+BS_55AA, 0xAA55); /* Signature (Offset is fixed here regardless of sector size) */ - if (disk_write(pdrv, tbl, b_vol, 1) != RES_OK) /* Write it to the VBR sector */ - return FR_DISK_ERR; - if (fmt == FS_FAT32) /* Write backup VBR if needed (VBR+6) */ - disk_write(pdrv, tbl, b_vol + 6, 1); - - /* Initialize FAT area */ - wsect = b_fat; - for (i = 0; i < N_FATS; i++) { /* Initialize each FAT copy */ - mem_set(tbl, 0, SS(fs)); /* 1st sector of the FAT */ - n = md; /* Media descriptor byte */ - if (fmt != FS_FAT32) { - n |= (fmt == FS_FAT12) ? 0x00FFFF00 : 0xFFFFFF00; - ST_DWORD(tbl+0, n); /* Reserve cluster #0-1 (FAT12/16) */ - } else { - n |= 0xFFFFFF00; - ST_DWORD(tbl+0, n); /* Reserve cluster #0-1 (FAT32) */ - ST_DWORD(tbl+4, 0xFFFFFFFF); - ST_DWORD(tbl+8, 0x0FFFFFFF); /* Reserve cluster #2 for root dir */ - } - if (disk_write(pdrv, tbl, wsect++, 1) != RES_OK) - return FR_DISK_ERR; - mem_set(tbl, 0, SS(fs)); /* Fill following FAT entries with zero */ - for (n = 1; n < n_fat; n++) { /* This loop may take a time on FAT32 volume due to many single sector writes */ - if (disk_write(pdrv, tbl, wsect++, 1) != RES_OK) - return FR_DISK_ERR; - } - } - - /* Initialize root directory */ - i = (fmt == FS_FAT32) ? au : n_dir; - do { - if (disk_write(pdrv, tbl, wsect++, 1) != RES_OK) - return FR_DISK_ERR; - } while (--i); - -#if _USE_ERASE /* Erase data area if needed */ - { - uint32_t eb[2]; - - eb[0] = wsect; eb[1] = wsect + (n_clst - ((fmt == FS_FAT32) ? 1 : 0)) * au - 1; - disk_ioctl(pdrv, CTRL_ERASE_SECTOR, eb); - } -#endif - - /* Create FSInfo if needed */ - if (fmt == FS_FAT32) { - ST_DWORD(tbl+FSI_LeadSig, 0x41615252); - ST_DWORD(tbl+FSI_StrucSig, 0x61417272); - ST_DWORD(tbl+FSI_Free_Count, n_clst - 1); /* Number of free clusters */ - ST_DWORD(tbl+FSI_Nxt_Free, 2); /* Last allocated cluster# */ - ST_WORD(tbl+BS_55AA, 0xAA55); - disk_write(pdrv, tbl, b_vol + 1, 1); /* Write original (VBR+1) */ - disk_write(pdrv, tbl, b_vol + 7, 1); /* Write backup (VBR+7) */ - } - - return (disk_ioctl(pdrv, CTRL_SYNC, 0) == RES_OK) ? FR_OK : FR_DISK_ERR; -} - - -#if _MULTI_PARTITION == 2 -/*-----------------------------------------------------------------------*/ -/* Divide Physical Drive */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_fdisk ( - uint8_t pdrv, /* Physical drive number */ - const uint32_t szt[], /* Pointer to the size table for each partitions */ - void* work /* Pointer to the working buffer */ -) -{ - uint32_t i, n, sz_cyl, tot_cyl, b_cyl, e_cyl, p_cyl; - uint8_t s_hd, e_hd, *p, *buf = (uint8_t*)work; - DSTATUS stat; - uint32_t sz_disk, sz_part, s_part; - - - stat = disk_initialize(pdrv); - if (stat & STA_NOINIT) return FR_NOT_READY; - if (stat & STA_PROTECT) return FR_WRITE_PROTECTED; - if (disk_ioctl(pdrv, GET_SECTOR_COUNT, &sz_disk)) return FR_DISK_ERR; - - /* Determine CHS in the table regardless of the drive geometry */ - for (n = 16; n < 256 && sz_disk / n / 63 > 1024; n *= 2) ; - if (n == 256) n--; - e_hd = n - 1; - sz_cyl = 63 * n; - tot_cyl = sz_disk / sz_cyl; - - /* Create partition table */ - mem_set(buf, 0, _MAX_SS); - p = buf + MBR_Table; b_cyl = 0; - for (i = 0; i < 4; i++, p += SZ_PTE) { - p_cyl = (szt[i] <= 100) ? (uint32_t)tot_cyl * szt[i] / 100 : szt[i] / sz_cyl; - if (!p_cyl) continue; - s_part = (uint32_t)sz_cyl * b_cyl; - sz_part = (uint32_t)sz_cyl * p_cyl; - if (i == 0) { /* Exclude first track of cylinder 0 */ - s_hd = 1; - s_part += 63; sz_part -= 63; - } else { - s_hd = 0; - } - e_cyl = b_cyl + p_cyl - 1; - if (e_cyl >= tot_cyl) return FR_INVALID_PARAMETER; - - /* Set partition table */ - p[1] = s_hd; /* Start head */ - p[2] = (uint8_t)((b_cyl >> 2) + 1); /* Start sector */ - p[3] = (uint8_t)b_cyl; /* Start cylinder */ - p[4] = 0x06; /* System type (temporary setting) */ - p[5] = e_hd; /* End head */ - p[6] = (uint8_t)((e_cyl >> 2) + 63); /* End sector */ - p[7] = (uint8_t)e_cyl; /* End cylinder */ - ST_DWORD(p + 8, s_part); /* Start sector in LBA */ - ST_DWORD(p + 12, sz_part); /* Partition size */ - - /* Next partition */ - b_cyl += p_cyl; - } - ST_WORD(p, 0xAA55); - - /* Write it to the MBR */ - return (disk_write(pdrv, buf, 0, 1) || disk_ioctl(pdrv, CTRL_SYNC, 0)) ? FR_DISK_ERR : FR_OK; -} - - -#endif /* _MULTI_PARTITION == 2 */ -#endif /* _USE_MKFS && !_FS_READONLY */ - - - - -#if _USE_STRFUNC -/*-----------------------------------------------------------------------*/ -/* Get a string from the file */ -/*-----------------------------------------------------------------------*/ -TCHAR* f_gets ( - TCHAR* buff, /* Pointer to the string buffer to read */ - int len, /* Size of string buffer (characters) */ - FIL* fil /* Pointer to the file object */ -) -{ - int n = 0; - TCHAR c, *p = buff; - uint8_t s[2]; - uint32_t rc; - - - while (n < len - 1) { /* Read bytes until buffer gets filled */ - f_read(fil, s, 1, &rc); - if (rc != 1) break; /* Break on EOF or error */ - c = s[0]; -#if _LFN_UNICODE /* Read a character in UTF-8 encoding */ - if (c >= 0x80) { - if (c < 0xC0) continue; /* Skip stray trailer */ - if (c < 0xE0) { /* Two-byte sequence */ - f_read(fil, s, 1, &rc); - if (rc != 1) break; - c = ((c & 0x1F) << 6) | (s[0] & 0x3F); - if (c < 0x80) c = '?'; - } else { - if (c < 0xF0) { /* Three-byte sequence */ - f_read(fil, s, 2, &rc); - if (rc != 2) break; - c = (c << 12) | ((s[0] & 0x3F) << 6) | (s[1] & 0x3F); - if (c < 0x800) c = '?'; - } else { /* Reject four-byte sequence */ - c = '?'; - } - } - } -#endif -#if _USE_STRFUNC >= 2 - if (c == '\r') continue; /* Strip '\r' */ -#endif - *p++ = c; - n++; - if (c == '\n') break; /* Break on EOL */ - } - *p = 0; - return n ? buff : 0; /* When no data read (eof or error), return with error. */ -} - - - -#if !_FS_READONLY -#include -/*-----------------------------------------------------------------------*/ -/* Put a character to the file */ -/*-----------------------------------------------------------------------*/ -int f_putc ( - TCHAR c, /* A character to be output */ - FIL* fil /* Pointer to the file object */ -) -{ - uint32_t bw, btw; - uint8_t s[3]; - - -#if _USE_STRFUNC >= 2 - if (c == '\n') f_putc ('\r', fil); /* LF -> CRLF conversion */ -#endif - -#if _LFN_UNICODE /* Write the character in UTF-8 encoding */ - if (c < 0x80) { /* 7-bit */ - s[0] = (uint8_t)c; - btw = 1; - } else { - if (c < 0x800) { /* 11-bit */ - s[0] = (uint8_t)(0xC0 | (c >> 6)); - s[1] = (uint8_t)(0x80 | (c & 0x3F)); - btw = 2; - } else { /* 16-bit */ - s[0] = (uint8_t)(0xE0 | (c >> 12)); - s[1] = (uint8_t)(0x80 | ((c >> 6) & 0x3F)); - s[2] = (uint8_t)(0x80 | (c & 0x3F)); - btw = 3; - } - } -#else /* Write the character without conversion */ - s[0] = (uint8_t)c; - btw = 1; -#endif - f_write(fil, s, btw, &bw); /* Write the char to the file */ - return (bw == btw) ? 1 : EOF; /* Return the result */ -} - - - - -/*-----------------------------------------------------------------------*/ -/* Put a string to the file */ -/*-----------------------------------------------------------------------*/ -int f_puts ( - const TCHAR* str, /* Pointer to the string to be output */ - FIL* fil /* Pointer to the file object */ -) -{ - int n; - - - for (n = 0; *str; str++, n++) { - if (f_putc(*str, fil) == EOF) return EOF; - } - return n; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Put a formatted string to the file */ -/*-----------------------------------------------------------------------*/ -int f_printf ( - FIL* fil, /* Pointer to the file object */ - const TCHAR* str, /* Pointer to the format string */ - ... /* Optional arguments... */ -) -{ - va_list arp; - uint8_t f, r; - uint32_t i, j, w; - uint32_t v; - TCHAR c, d, s[16], *p; - int res, chc, cc; - - - va_start(arp, str); - - for (cc = res = 0; cc != EOF; res += cc) { - c = *str++; - if (c == 0) break; /* End of string */ - if (c != '%') { /* Non escape character */ - cc = f_putc(c, fil); - if (cc != EOF) cc = 1; - continue; - } - w = f = 0; - c = *str++; - if (c == '0') { /* Flag: '0' padding */ - f = 1; c = *str++; - } else { - if (c == '-') { /* Flag: left justified */ - f = 2; c = *str++; - } - } - while (IsDigit(c)) { /* Precision */ - w = w * 10 + c - '0'; - c = *str++; - } - if (c == 'l' || c == 'L') { /* Prefix: Size is long int */ - f |= 4; c = *str++; - } - if (!c) break; - d = c; - if (IsLower(d)) d -= 0x20; - switch (d) { /* Type is... */ - case 'S' : /* String */ - p = va_arg(arp, TCHAR*); - for (j = 0; p[j]; j++) ; - chc = 0; - if (!(f & 2)) { - while (j++ < w) chc += (cc = f_putc(' ', fil)); - } - chc += (cc = f_puts(p, fil)); - while (j++ < w) chc += (cc = f_putc(' ', fil)); - if (cc != EOF) cc = chc; - continue; - case 'C' : /* Character */ - cc = f_putc((TCHAR)va_arg(arp, int), fil); continue; - case 'B' : /* Binary */ - r = 2; break; - case 'O' : /* Octal */ - r = 8; break; - case 'D' : /* Signed decimal */ - case 'U' : /* Unsigned decimal */ - r = 10; break; - case 'X' : /* Hexdecimal */ - r = 16; break; - default: /* Unknown type (pass-through) */ - cc = f_putc(c, fil); continue; - } - - /* Get an argument and put it in numeral */ - v = (f & 4) ? (uint32_t)va_arg(arp, long) : ((d == 'D') ? (uint32_t)(long)va_arg(arp, int) : (uint32_t)va_arg(arp, unsigned int)); - if (d == 'D' && (v & 0x80000000)) { - v = 0 - v; - f |= 8; - } - i = 0; - do { - d = (TCHAR)(v % r); v /= r; - if (d > 9) d += (c == 'x') ? 0x27 : 0x07; - s[i++] = d + '0'; - } while (v && i < sizeof s / sizeof s[0]); - if (f & 8) s[i++] = '-'; - j = i; d = (f & 1) ? '0' : ' '; - res = 0; - while (!(f & 2) && j++ < w) res += (cc = f_putc(d, fil)); - do res += (cc = f_putc(s[--i], fil)); while(i); - while (j++ < w) res += (cc = f_putc(' ', fil)); - if (cc != EOF) cc = res; - } - - va_end(arp); - return (cc == EOF) ? cc : res; -} - - - - -#endif /* !_FS_READONLY */ -#endif /* _USE_STRFUNC */ diff --git a/fs/unicode.c b/fs/unicode.c deleted file mode 100644 index 76e10d2..0000000 --- a/fs/unicode.c +++ /dev/null @@ -1,17 +0,0 @@ -#include - -#if _USE_LFN != 0 - -#if _CODE_PAGE == 932 -#include "cc932.c" -#elif _CODE_PAGE == 936 -#include "cc936.c" -#elif _CODE_PAGE == 949 -#include "cc949.c" -#elif _CODE_PAGE == 950 -#include "cc950.c" -#else -#include "ccsbcs.c" -#endif - -#endif diff --git a/i2c/i2c.c b/i2c/i2c.c deleted file mode 100644 index ce0e3a2..0000000 --- a/i2c/i2c.c +++ /dev/null @@ -1,41 +0,0 @@ - -#include - -void i2c_init(void) -{ - -} - -void i2c_set_frequency(int hz) -{ -} - -int i2c_read(int address, char *data, int length, bool repeated) -{ - return 0; -} - -int i2c_read_byte(int ack) -{ - return 0; -} - -int i2c_write(int address, const char *data, int length, bool repeated) -{ - return 0; -} - -int i2c_write_byte(int data) -{ - return 0; -} - -void i2c_start(void) -{ - -} - -void i2c_stop(void) -{ - -} diff --git a/if/driver_vec.c b/if/driver_vec.c deleted file mode 100644 index e036d47..0000000 --- a/if/driver_vec.c +++ /dev/null @@ -1,250 +0,0 @@ -/* - * driver_vec.c - * - * Expose BaS drivers to OS - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * - * Created on: 24.10.2013 - * Author: Markus Fröschle - */ - -#include -#include "version.h" -#include "xhdi_sd.h" -#include "dma.h" -#include "driver_vec.h" -#include "driver_mem.h" -#include "pci.h" -#include "mmu.h" - -/* - * driver interface struct for the SD card BaS driver - */ -static struct xhdi_driver_interface xhdi_call_interface = -{ - xhdi_call -}; - -/* - * driver interface struct for the BaS multichannel DMA driver - * This is exactly the same thing FireTOS provides and the MiNT FEC drivers expect. - * It can be directly used in TOS to register the corresponding cookie ("DMAC"). - */ -static struct dma_driver_interface dma_interface = -{ - .version = 0x0101, - .magic = 0x444d4143, /* 'DMAC' */ - .dma_set_initiator = dma_set_initiator, - .dma_get_initiator = dma_get_initiator, - .dma_free_initiator = dma_free_initiator, - .dma_set_channel = dma_set_channel, - .dma_get_channel = dma_get_channel, - .dma_free_channel = dma_free_channel, - .dma_clear_channel = dma_clear_channel, - .MCD_startDma = (int (*)(long, int8_t *, unsigned int, int8_t *, unsigned int, - unsigned int, unsigned int, unsigned int, int, - unsigned int, unsigned int)) MCD_startDma, - .MCD_dmaStatus = (int32_t (*)(int32_t)) MCD_dmaStatus, - .MCD_XferProgrQuery = (int32_t (*)(int32_t, MCD_XferProg *)) MCD_XferProgrQuery, - .MCD_killDma = (int32_t (*)(int32_t)) MCD_killDma, - .MCD_continDma = (int32_t (*)(int32_t)) MCD_continDma, - .MCD_pauseDma = (int32_t (*)(int32_t)) MCD_pauseDma, - .MCD_resumeDma = (int32_t (*)(int32_t)) MCD_resumeDma, - .MCD_csumQuery = (int32_t (*)(int32_t, uint32_t *)) MCD_csumQuery, - .dma_malloc = driver_mem_alloc, - .dma_free = driver_mem_free -}; - -extern struct fb_info *info_fb; - -/* - * driver interface struct for the PCI_BIOS BaS driver - */ -static struct pci_bios_interface pci_interface = -{ - .subjar = 0, - .version = 0x00010000, - .find_pci_device = wrapper_find_pci_device, - .find_pci_classcode = wrapper_find_pci_classcode, - .read_config_byte = wrapper_read_config_byte, - .read_config_word = wrapper_read_config_word, - .read_config_longword = wrapper_read_config_longword, - .fast_read_config_byte = wrapper_fast_read_config_byte, - .fast_read_config_word = wrapper_fast_read_config_word, - .fast_read_config_longword = wrapper_fast_read_config_longword, - .write_config_byte = wrapper_write_config_byte, - .write_config_word = wrapper_write_config_word, - .write_config_longword = wrapper_write_config_longword, - .hook_interrupt = wrapper_hook_interrupt, - .unhook_interrupt = wrapper_unhook_interrupt, - .special_cycle = wrapper_special_cycle, - .get_routing = wrapper_get_routing, - .set_interrupt = wrapper_set_interrupt, - .get_resource = wrapper_get_resource, - .get_card_used = wrapper_get_card_used, - .set_card_used = wrapper_set_card_used, - .read_mem_byte = wrapper_read_mem_byte, - .read_mem_word = wrapper_read_mem_word, - .read_mem_longword = wrapper_read_mem_longword, - .fast_read_mem_byte = wrapper_fast_read_mem_byte, - .fast_read_mem_word = wrapper_fast_read_mem_word, - .fast_read_mem_longword = wrapper_fast_read_mem_longword, - .write_mem_byte = wrapper_write_mem_byte, - .write_mem_word = wrapper_write_mem_word, - .write_mem_longword = wrapper_write_mem_longword, - .read_io_byte = wrapper_read_io_byte, - .read_io_word = wrapper_read_io_word, - .read_io_longword = wrapper_read_io_longword, - .fast_read_io_byte = wrapper_fast_read_io_byte, - .fast_read_io_word = wrapper_fast_read_io_word, - .fast_read_io_longword = wrapper_fast_read_io_longword, - .write_io_byte = wrapper_write_io_byte, - .write_io_word = wrapper_write_io_word, - .write_io_longword = wrapper_write_io_longword, - .get_machine_id = wrapper_get_machine_id, - .get_pagesize = wrapper_get_pagesize, - .virt_to_bus = wrapper_virt_to_bus, - .bus_to_virt = wrapper_bus_to_virt, - .virt_to_phys = wrapper_virt_to_phys, - .phys_to_virt = wrapper_phys_to_virt, -}; - -/* - * driver interface struct for the BaS framebuffer video driver - */ -static struct framebuffer_driver_interface framebuffer_interface = -{ - .framebuffer_info = &info_fb -}; - -/* - * driver interface struct for the BaS MMU driver - */ -static struct mmu_driver_interface mmu_interface = -{ - .map_page_locked = &mmu_map_data_page_locked, - .unlock_page = &mmu_unlock_data_page, - .report_locked_pages = &mmu_report_locked_pages, - .report_pagesize = &mmu_report_pagesize -}; - -static struct generic_interface interfaces[] = -{ - { - /* BaS SD-card driver interface */ - - .type = XHDI_DRIVER, - .name = "SDCARD", - .description = "BaS SD Card driver", - .version = 0, - .revision = 1, - .interface.xhdi = &xhdi_call_interface - }, - { - .type = MCD_DRIVER, - .name = "MCDDMA", - .description = "BaS Multichannel DMA driver", - .version = 0, - .revision = 1, - .interface.dma = &dma_interface, - }, - { - .type = VIDEO_DRIVER, - .name = "RADEON", - .description = "BaS RADEON framebuffer driver", - .version = 0, - .revision = 1, - .interface.fb = &framebuffer_interface, - }, - { - .type = PCI_DRIVER, - .name = "PCI", - .description = "BaS PCI_BIOS driver", - .version = 0, - .revision = 1, - .interface.pci = &pci_interface, - }, - { - .type = MMU_DRIVER, - .name = "MMU", - .description = "BaS MMU driver", - .version = 0, - .revision = 1, - .interface.mmu = &mmu_interface, - }, - /* insert new drivers here */ - - { - .type = END_OF_DRIVERS - } -}; - -extern void remove_handler(void); /* forward declaration */ - -/* - * this is the driver table we expose to the OS - */ -static struct driver_table bas_drivers = -{ - .bas_version = MAJOR_VERSION, - .bas_revision = MINOR_VERSION, - .remove_handler = remove_handler, - .interfaces = interfaces -}; - -void remove_handler(void) -{ - extern void std_exc_vec(void); - uint32_t *trap_0_vector = (uint32_t *) 0x80; - - *trap_0_vector = (uint32_t) std_exc_vec; -} - -void __attribute__((interrupt)) get_bas_drivers(void) -{ - __asm__ __volatile( - /* - * sp should now point to the next instruction after the trap - * The trap itself is 2 bytes, the four bytes before that must - * read '_BAS' or we are not meant by this call - */ - " move.l a0,-(sp) \n\t" // save registers - " move.l d0,-(sp) \n\t" - " move.l 12(sp),a0 \n\t" // get return address - " move.l -6(a0),d0 \n\t" // - " cmp.l #0x5f424153,d0 \n\t" // is it '_BAS'? - " beq fetch_drivers \n\t" // yes - /* - * This seems indeed a "normal" trap #0. Better pass control to "normal" trap #0 processing - * If trap #0 isn't set to something sensible, we'll probably crash here, but this must be - * prevented on the caller side. - */ - " move.l (sp)+,d0 \n\t" // restore registers - " move.l (sp)+,a0 \n\t" - " move.l 0x80,-(sp) \n\t" // fetch vector - " rts \n\t" // and jump through it - - "fetch_drivers: \n\t" - " move.l #%[drivers],d0 \n\t" // return driver struct in d0 - " addq.l #4,sp \n\t" // adjust stack - " move.l (sp)+,a0 \n\t" // restore register - : /* no output */ - : [drivers] "o" (bas_drivers) /* input */ - : /* clobber */ - ); -} diff --git a/include/MCD_dma.h b/include/MCD_dma.h deleted file mode 100755 index b589cc8..0000000 --- a/include/MCD_dma.h +++ /dev/null @@ -1,362 +0,0 @@ -/* - * File: MCD_dma.h - * Purpose: Main header file for multi-channel DMA API. - * - * Notes: - */ -#ifndef _MCD_API_H -#define _MCD_API_H - -/* - * Turn Execution Unit tasks ON (#define) or OFF (#undef) - */ -#undef MCD_INCLUDE_EU -//#define MCD_INCLUDE_EU -/* - * Number of DMA channels - */ -#define NCHANNELS 16 - -/* - * Total number of variants - */ -#ifdef MCD_INCLUDE_EU -#define NUMOFVARIANTS 6 -#else -#define NUMOFVARIANTS 4 -#endif - -/* - * Define sizes of the various tables - */ -#define TASK_TABLE_SIZE (NCHANNELS*32) -#define VAR_TAB_SIZE (128) -#define CONTEXT_SAVE_SIZE (128) -#define FUNCDESC_TAB_SIZE (256) - -#ifdef MCD_INCLUDE_EU -#define FUNCDESC_TAB_NUM 16 -#else -#define FUNCDESC_TAB_NUM 1 -#endif - - -#ifndef DEFINESONLY - -/* - * Portability typedefs - */ -typedef int s32; -typedef unsigned int u32; -typedef short s16; -typedef unsigned short u16; -typedef char s8; -typedef unsigned char u8; - -/* - * These structures represent the internal registers of the - * multi-channel DMA - */ -struct dmaRegs_s { - u32 taskbar; /* task table base address register */ - u32 currPtr; - u32 endPtr; - u32 varTablePtr; - u16 dma_rsvd0; - u16 ptdControl; /* ptd control */ - u32 intPending; /* interrupt pending register */ - u32 intMask; /* interrupt mask register */ - u16 taskControl[16]; /* task control registers */ - u8 priority[32]; /* priority registers */ - u32 initiatorMux; /* initiator mux control */ - u32 taskSize0; /* task size control register 0. */ - u32 taskSize1; /* task size control register 1. */ - u32 dma_rsvd1; /* reserved */ - u32 dma_rsvd2; /* reserved */ - u32 debugComp1; /* debug comparator 1 */ - u32 debugComp2; /* debug comparator 2 */ - u32 debugControl; /* debug control */ - u32 debugStatus; /* debug status */ - u32 ptdDebug; /* priority task decode debug */ - u32 dma_rsvd3[31]; /* reserved */ -}; -typedef volatile struct dmaRegs_s dmaRegs; - -#endif - -/* - * PTD contrl reg bits - */ -#define PTD_CTL_TSK_PRI 0x8000 -#define PTD_CTL_COMM_PREFETCH 0x0001 - -/* - * Task Control reg bits and field masks - */ -#define TASK_CTL_EN 0x8000 -#define TASK_CTL_VALID 0x4000 -#define TASK_CTL_ALWAYS 0x2000 -#define TASK_CTL_INIT_MASK 0x1f00 -#define TASK_CTL_ASTRT 0x0080 -#define TASK_CTL_HIPRITSKEN 0x0040 -#define TASK_CTL_HLDINITNUM 0x0020 -#define TASK_CTL_ASTSKNUM_MASK 0x000f - -/* - * Priority reg bits and field masks - */ -#define PRIORITY_HLD 0x80 -#define PRIORITY_PRI_MASK 0x07 - -/* - * Debug Control reg bits and field masks - */ -#define DBG_CTL_BLOCK_TASKS_MASK 0xffff0000 -#define DBG_CTL_AUTO_ARM 0x00008000 -#define DBG_CTL_BREAK 0x00004000 -#define DBG_CTL_COMP1_TYP_MASK 0x00003800 -#define DBG_CTL_COMP2_TYP_MASK 0x00000070 -#define DBG_CTL_EXT_BREAK 0x00000004 -#define DBG_CTL_INT_BREAK 0x00000002 - -/* - * PTD Debug reg selector addresses - * This reg must be written with a value to show the contents of - * one of the desired internal register. - */ -#define PTD_DBG_REQ 0x00 /* shows the state of 31 initiators */ -#define PTD_DBG_TSK_VLD_INIT 0x01 /* shows which 16 tasks are valid and - have initiators asserted */ - - -/* - * General return values - */ -#define MCD_OK 0 -#define MCD_ERROR -1 -#define MCD_TABLE_UNALIGNED -2 -#define MCD_CHANNEL_INVALID -3 - -/* - * MCD_initDma input flags - */ -#define MCD_RELOC_TASKS 0x00000001 -#define MCD_NO_RELOC_TASKS 0x00000000 -#define MCD_COMM_PREFETCH_EN 0x00000002 /* Commbus Prefetching - MCF547x/548x ONLY */ - -/* - * MCD_dmaStatus Status Values for each channel - */ -#define MCD_NO_DMA 1 /* No DMA has been requested since reset */ -#define MCD_IDLE 2 /* DMA active, but the initiator is currently inactive */ -#define MCD_RUNNING 3 /* DMA active, and the initiator is currently active */ -#define MCD_PAUSED 4 /* DMA active but it is currently paused */ -#define MCD_HALTED 5 /* the most recent DMA has been killed with MCD_killTask() */ -#define MCD_DONE 6 /* the most recent DMA has completed. */ - - -/* - * MCD_startDma parameter defines - */ - -/* - * Constants for the funcDesc parameter - */ -/* Byte swapping: */ -#define MCD_NO_BYTE_SWAP 0x00045670 /* to disable byte swapping. */ -#define MCD_BYTE_REVERSE 0x00076540 /* to reverse the bytes of each u32 of the DMAed data. */ -#define MCD_U16_REVERSE 0x00067450 /* to reverse the 16-bit halves of - each 32-bit data value being DMAed.*/ -#define MCD_U16_BYTE_REVERSE 0x00054760 /* to reverse the byte halves of each - 16-bit half of each 32-bit data value DMAed */ -#define MCD_NO_BIT_REV 0x00000000 /* do not reverse the bits of each byte DMAed. */ -#define MCD_BIT_REV 0x00088880 /* reverse the bits of each byte DMAed */ -/* CRCing: */ -#define MCD_CRC16 0xc0100000 /* to perform CRC-16 on DMAed data. */ -#define MCD_CRCCCITT 0xc0200000 /* to perform CRC-CCITT on DMAed data. */ -#define MCD_CRC32 0xc0300000 /* to perform CRC-32 on DMAed data. */ -#define MCD_CSUMINET 0xc0400000 /* to perform internet checksums on DMAed data.*/ -#define MCD_NO_CSUM 0xa0000000 /* to perform no checksumming. */ - -#define MCD_FUNC_NOEU1 (MCD_NO_BYTE_SWAP | MCD_NO_BIT_REV | MCD_NO_CSUM) -#define MCD_FUNC_NOEU2 (MCD_NO_BYTE_SWAP | MCD_NO_CSUM) - -/* - * Constants for the flags parameter - */ -#define MCD_TT_FLAGS_RL 0x00000001 /* Read line */ -#define MCD_TT_FLAGS_CW 0x00000002 /* Combine Writes */ -#define MCD_TT_FLAGS_SP 0x00000004 /* Speculative prefetch(XLB) MCF547x/548x ONLY */ -#define MCD_TT_FLAGS_MASK 0x000000ff -#define MCD_TT_FLAGS_DEF (MCD_TT_FLAGS_RL | MCD_TT_FLAGS_CW) - -#define MCD_SINGLE_DMA 0x00000100 /* Unchained DMA */ -#define MCD_CHAIN_DMA /* TBD */ -#define MCD_EU_DMA /* TBD */ -#define MCD_FECTX_DMA 0x00001000 /* FEC TX ring DMA */ -#define MCD_FECRX_DMA 0x00002000 /* FEC RX ring DMA */ - - -/* these flags are valid for MCD_startDma and the chained buffer descriptors */ -#define MCD_BUF_READY 0x80000000 /* indicates that this buffer is now under the DMA's control */ -#define MCD_WRAP 0x20000000 /* to tell the FEC Dmas to wrap to the first BD */ -#define MCD_INTERRUPT 0x10000000 /* to generate an interrupt after completion of the DMA. */ -#define MCD_END_FRAME 0x08000000 /* tell the DMA to end the frame when transferring - last byte of data in buffer */ -#define MCD_CRC_RESTART 0x40000000 /* to empty out the accumulated checksum - prior to performing the DMA. */ - -/* Defines for the FEC buffer descriptor control/status word*/ -#define MCD_FEC_BUF_READY 0x8000 -#define MCD_FEC_WRAP 0x2000 -#define MCD_FEC_INTERRUPT 0x1000 -#define MCD_FEC_END_FRAME 0x0800 - - -/* - * Defines for general intuitiveness - */ - -#define MCD_TRUE 1 -#define MCD_FALSE 0 - -/* - * Three different cases for destination and source. - */ -#define MINUS1 -1 -#define ZERO 0 -#define PLUS1 1 - -#ifndef DEFINESONLY - -/* Task Table Entry struct*/ -typedef struct { - u32 TDTstart; /* task descriptor table start */ - u32 TDTend; /* task descriptor table end */ - u32 varTab; /* variable table start */ - u32 FDTandFlags; /* function descriptor table start and flags */ - volatile u32 descAddrAndStatus; - volatile u32 modifiedVarTab; - u32 contextSaveSpace; /* context save space start */ - u32 literalBases; -} TaskTableEntry; - - -/* Chained buffer descriptor */ -typedef volatile struct MCD_bufDesc_struct MCD_bufDesc; -struct MCD_bufDesc_struct { - u32 flags; /* flags describing the DMA */ - u32 csumResult; /* checksum from checksumming performed since last checksum reset */ - s8 *srcAddr; /* the address to move data from */ - s8 *destAddr; /* the address to move data to */ - s8 *lastDestAddr; /* the last address written to */ - u32 dmaSize; /* the number of bytes to transfer independent of the transfer size */ - MCD_bufDesc *next; /* next buffer descriptor in chain */ - u32 info; /* private information about this descriptor; DMA does not affect it */ -}; - -/* Progress Query struct */ -typedef volatile struct MCD_XferProg_struct { - s8 *lastSrcAddr; /* the most-recent or last, post-increment source address */ - s8 *lastDestAddr; /* the most-recent or last, post-increment destination address */ - u32 dmaSize; /* the amount of data transferred for the current buffer */ - MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */ -} MCD_XferProg; - - -/* FEC buffer descriptor */ -typedef volatile struct MCD_bufDescFec_struct { - u16 statCtrl; - u16 length; - u32 dataPointer; -} MCD_bufDescFec; - - -/*************************************************************************/ -/* - * API function Prototypes - see MCD_dmaApi.c for further notes - */ - -/* - * MCD_startDma starts a particular kind of DMA . - */ -int MCD_startDma ( - int channel, /* the channel on which to run the DMA */ - s8 *srcAddr, /* the address to move data from, or buffer-descriptor address */ - s16 srcIncr, /* the amount to increment the source address per transfer */ - s8 *destAddr, /* the address to move data to */ - s16 destIncr, /* the amount to increment the destination address per transfer */ - u32 dmaSize, /* the number of bytes to transfer independent of the transfer size */ - u32 xferSize, /* the number bytes in of each data movement (1, 2, or 4) */ - u32 initiator, /* what device initiates the DMA */ - int priority, /* priority of the DMA */ - u32 flags, /* flags describing the DMA */ - u32 funcDesc /* a description of byte swapping, bit swapping, and CRC actions */ -); - -/* - * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA - * registers, relocating and creating the appropriate task structures, and - * setting up some global settings - */ -int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags); - -/* - * MCD_dmaStatus() returns the status of the DMA on the requested channel. - */ -int MCD_dmaStatus (int channel); - -/* - * MCD_XferProgrQuery() returns progress of DMA on requested channel - */ -int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep); - -/* - * MCD_killDma() halts the DMA on the requested channel, without any - * intention of resuming the DMA. - */ -int MCD_killDma (int channel); - -/* - * MCD_continDma() continues a DMA which as stopped due to encountering an - * unready buffer descriptor. - */ -int MCD_continDma (int channel); - -/* - * MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is - * running on that channel). - */ -int MCD_pauseDma (int channel); - -/* - * MCD_resumeDma() resumes the DMA on a given channel (if any DMA is - * running on that channel). - */ -int MCD_resumeDma (int channel); - -/* - * MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA - */ -int MCD_csumQuery (int channel, u32 *csum); - -/* - * MCD_getCodeSize provides the packed size required by the microcoded task - * and structures. - */ -int MCD_getCodeSize(void); - -/* - * MCD_getVersion provides a pointer to a version string and returns a - * version number. - */ -int MCD_getVersion(char **longVersion); - -/* macro for setting a location in the variable table */ -#define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value - /* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function, - so I'm avoiding surrounding it with "do {} while(0)" */ - -#endif /* DEFINESONLY */ - -#endif /* _MCD_API_H */ diff --git a/include/MCD_progCheck.h b/include/MCD_progCheck.h deleted file mode 100755 index e0f578f..0000000 --- a/include/MCD_progCheck.h +++ /dev/null @@ -1,5 +0,0 @@ - /* This file is autogenerated. Do not change */ -#define CURRBD 4 -#define DCOUNT 6 -#define DESTPTR 5 -#define SRCPTR 7 diff --git a/include/MCD_tasksInit.h b/include/MCD_tasksInit.h deleted file mode 100755 index daf871c..0000000 --- a/include/MCD_tasksInit.h +++ /dev/null @@ -1,44 +0,0 @@ -#ifndef MCD_TSK_INIT_H -#define MCD_TSK_INIT_H 1 - -/* - * Do not edit! - */ - - -/* - * Task 0 - */ -void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel); - - -/* - * Task 1 - */ -void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel); - - -/* - * Task 2 - */ -void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel); - - -/* - * Task 3 - */ -void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel); - - -/* - * Task 4 - */ -void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel); - - -/* - * Task 5 - */ -void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel); - -#endif /* MCD_TSK_INIT_H */ diff --git a/include/MCF5475.h b/include/MCF5475.h deleted file mode 100644 index 332d343..0000000 --- a/include/MCF5475.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_H__ -#define __MCF5475_H__ - -#include -/*** - * MCF5475 Derivative Memory map definitions from linker command files: - * __MBAR, __MMUBAR, __RAMBAR0, __RAMBAR0_SIZE, __RAMBAR1, __RAMBAR1_SIZE - * linker symbols must be defined in the linker command file. - */ - -typedef uint32_t __attribute__((__may_alias__)) uint32_t_a; /* a type to avoid gcc's complaints about pointer aliasing */ - -extern uint8_t _MBAR[]; -extern uint8_t _MMUBAR[]; -extern uint8_t _RAMBAR0[]; -extern uint8_t _RAMBAR0_SIZE[]; -extern uint8_t _RAMBAR1[]; -extern uint8_t _RAMBAR1_SIZE[]; - -#define MBAR_ADDRESS (uint32_t)_MBAR -#define MMUBAR_ADDRESS (uint32_t)_MMUBAR -#define RAMBAR0_ADDRESS (uint32_t)_RAMBAR0 -#define RAMBAR0_SIZE (uint32_t)_RAMBAR0_SIZE -#define RAMBAR1_ADDRESS (uint32_t)_RAMBAR1 -#define RAMBAR1_SIZE (uint32_t)_RAMBAR1_SIZE - - -#include "MCF5475_SIU.h" -#include "MCF5475_MMU.h" -#include "MCF5475_SDRAMC.h" -#include "MCF5475_XLB.h" -#include "MCF5475_CLOCK.h" -#include "MCF5475_FBCS.h" -#include "MCF5475_INTC.h" -#include "MCF5475_GPT.h" -#include "MCF5475_SLT.h" -#include "MCF5475_GPIO.h" -#include "MCF5475_PAD.h" -#include "MCF5475_PCI.h" -#include "MCF5475_PCIARB.h" -#include "MCF5475_EPORT.h" -#include "MCF5475_CTM.h" -#include "MCF5475_DMA.h" -#include "MCF5475_PSC.h" -#include "MCF5475_DSPI.h" -#include "MCF5475_I2C.h" -#include "MCF5475_FEC.h" -#include "MCF5475_USB.h" -#include "MCF5475_SRAM.h" -#include "MCF5475_SEC.h" - -#endif /* __MCF5475_H__ */ diff --git a/include/MCF5475_CLOCK.h b/include/MCF5475_CLOCK.h deleted file mode 100644 index 4603098..0000000 --- a/include/MCF5475_CLOCK.h +++ /dev/null @@ -1,47 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_CLOCK_H__ -#define __MCF5475_CLOCK_H__ - - -/********************************************************************* -* -* Clock Module (CLOCK) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CLOCK_SPCR (*(volatile uint32_t*)(&_MBAR[0x300])) - - -/* Bit definitions and macros for MCF_CLOCK_SPCR */ -#define MCF_CLOCK_SPCR_MEMEN (0x1) -#define MCF_CLOCK_SPCR_PCIEN (0x2) -#define MCF_CLOCK_SPCR_FBEN (0x4) -#define MCF_CLOCK_SPCR_CAN0EN (0x8) -#define MCF_CLOCK_SPCR_DMAEN (0x10) -#define MCF_CLOCK_SPCR_FEC0EN (0x20) -#define MCF_CLOCK_SPCR_FEC1EN (0x40) -#define MCF_CLOCK_SPCR_USBEN (0x80) -#define MCF_CLOCK_SPCR_PSCEN (0x200) -#define MCF_CLOCK_SPCR_CAN1EN (0x800) -#define MCF_CLOCK_SPCR_CRYENA (0x1000) -#define MCF_CLOCK_SPCR_CRYENB (0x2000) -#define MCF_CLOCK_SPCR_COREN (0x4000) -#define MCF_CLOCK_SPCR_PLLK (0x80000000) - - -#endif /* __MCF5475_CLOCK_H__ */ diff --git a/include/MCF5475_CTM.h b/include/MCF5475_CTM.h deleted file mode 100644 index 5ba86e4..0000000 --- a/include/MCF5475_CTM.h +++ /dev/null @@ -1,76 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_CTM_H__ -#define __MCF5475_CTM_H__ - - -/********************************************************************* -* -* Comm Timer Module (CTM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CTM_CTCR0 (*(volatile uint32_t*)(&_MBAR[0x7F00])) -#define MCF_CTM_CTCR1 (*(volatile uint32_t*)(&_MBAR[0x7F04])) -#define MCF_CTM_CTCR2 (*(volatile uint32_t*)(&_MBAR[0x7F08])) -#define MCF_CTM_CTCR3 (*(volatile uint32_t*)(&_MBAR[0x7F0C])) -#define MCF_CTM_CTCR4 (*(volatile uint32_t*)(&_MBAR[0x7F10])) -#define MCF_CTM_CTCR5 (*(volatile uint32_t*)(&_MBAR[0x7F14])) -#define MCF_CTM_CTCR6 (*(volatile uint32_t*)(&_MBAR[0x7F18])) -#define MCF_CTM_CTCR7 (*(volatile uint32_t*)(&_MBAR[0x7F1C])) -#define MCF_CTM_CTCRF(x) (*(volatile uint32_t*)(&_MBAR[0x7F00 + ((x)*0x4)])) -#define MCF_CTM_CTCRV(x) (*(volatile uint32_t*)(&_MBAR[0x7F10 + ((x-4)*0x4)])) - - -/* Bit definitions and macros for MCF_CTM_CTCRF */ -#define MCF_CTM_CTCRF_CRV(x) (((x)&0xFFFF)<<0) -#define MCF_CTM_CTCRF_S(x) (((x)&0xF)<<0x10) -#define MCF_CTM_CTCRF_S_CLK_1 (0) -#define MCF_CTM_CTCRF_S_CLK_2 (0x10000) -#define MCF_CTM_CTCRF_S_CLK_4 (0x20000) -#define MCF_CTM_CTCRF_S_CLK_8 (0x30000) -#define MCF_CTM_CTCRF_S_CLK_16 (0x40000) -#define MCF_CTM_CTCRF_S_CLK_32 (0x50000) -#define MCF_CTM_CTCRF_S_CLK_64 (0x60000) -#define MCF_CTM_CTCRF_S_CLK_128 (0x70000) -#define MCF_CTM_CTCRF_S_CLK_256 (0x80000) -#define MCF_CTM_CTCRF_S_CLK_EXT (0x90000) -#define MCF_CTM_CTCRF_PCT(x) (((x)&0x7)<<0x14) -#define MCF_CTM_CTCRF_PCT_100 (0) -#define MCF_CTM_CTCRF_PCT_50 (0x100000) -#define MCF_CTM_CTCRF_PCT_25 (0x200000) -#define MCF_CTM_CTCRF_PCT_12p5 (0x300000) -#define MCF_CTM_CTCRF_PCT_6p25 (0x400000) -#define MCF_CTM_CTCRF_PCT_OFF (0x500000) -#define MCF_CTM_CTCRF_M (0x800000) -#define MCF_CTM_CTCRF_IM (0x1000000) -#define MCF_CTM_CTCRF_I (0x80000000) - -/* Bit definitions and macros for MCF_CTM_CTCRV */ -#define MCF_CTM_CTCRV_CRV(x) (((x)&0xFFFFFF)<<0) -#define MCF_CTM_CTCRV_PCT(x) (((x)&0x7)<<0x18) -#define MCF_CTM_CTCRV_PCT_100 (0) -#define MCF_CTM_CTCRV_PCT_50 (0x1000000) -#define MCF_CTM_CTCRV_PCT_25 (0x2000000) -#define MCF_CTM_CTCRV_PCT_12p5 (0x3000000) -#define MCF_CTM_CTCRV_PCT_6p25 (0x4000000) -#define MCF_CTM_CTCRV_PCT_OFF (0x5000000) -#define MCF_CTM_CTCRV_M (0x8000000) -#define MCF_CTM_CTCRV_S (0x10000000) - - -#endif /* __MCF5475_CTM_H__ */ diff --git a/include/MCF5475_DMA.h b/include/MCF5475_DMA.h deleted file mode 100644 index 4e6f916..0000000 --- a/include/MCF5475_DMA.h +++ /dev/null @@ -1,234 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_DMA_H__ -#define __MCF5475_DMA_H__ - - -/********************************************************************* -* -* Multichannel DMA (DMA) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_DMA_TASKBAR (*(volatile uint32_t*)(&_MBAR[0x8000])) -#define MCF_DMA_CP (*(volatile uint32_t*)(&_MBAR[0x8004])) -#define MCF_DMA_EP (*(volatile uint32_t*)(&_MBAR[0x8008])) -#define MCF_DMA_VP (*(volatile uint32_t*)(&_MBAR[0x800C])) -#define MCF_DMA_PTD (*(volatile uint32_t*)(&_MBAR[0x8010])) -#define MCF_DMA_DIPR (*(volatile uint32_t*)(&_MBAR[0x8014])) -#define MCF_DMA_DIMR (*(volatile uint32_t*)(&_MBAR[0x8018])) -#define MCF_DMA_TCR0 (*(volatile uint16_t*)(&_MBAR[0x801C])) -#define MCF_DMA_TCR1 (*(volatile uint16_t*)(&_MBAR[0x801E])) -#define MCF_DMA_TCR2 (*(volatile uint16_t*)(&_MBAR[0x8020])) -#define MCF_DMA_TCR3 (*(volatile uint16_t*)(&_MBAR[0x8022])) -#define MCF_DMA_TCR4 (*(volatile uint16_t*)(&_MBAR[0x8024])) -#define MCF_DMA_TCR5 (*(volatile uint16_t*)(&_MBAR[0x8026])) -#define MCF_DMA_TCR6 (*(volatile uint16_t*)(&_MBAR[0x8028])) -#define MCF_DMA_TCR7 (*(volatile uint16_t*)(&_MBAR[0x802A])) -#define MCF_DMA_TCR8 (*(volatile uint16_t*)(&_MBAR[0x802C])) -#define MCF_DMA_TCR9 (*(volatile uint16_t*)(&_MBAR[0x802E])) -#define MCF_DMA_TCR10 (*(volatile uint16_t*)(&_MBAR[0x8030])) -#define MCF_DMA_TCR11 (*(volatile uint16_t*)(&_MBAR[0x8032])) -#define MCF_DMA_TCR12 (*(volatile uint16_t*)(&_MBAR[0x8034])) -#define MCF_DMA_TCR13 (*(volatile uint16_t*)(&_MBAR[0x8036])) -#define MCF_DMA_TCR14 (*(volatile uint16_t*)(&_MBAR[0x8038])) -#define MCF_DMA_TCR15 (*(volatile uint16_t*)(&_MBAR[0x803A])) -#define MCF_DMA_PRIOR0 (*(volatile uint8_t *)(&_MBAR[0x803C])) -#define MCF_DMA_PRIOR1 (*(volatile uint8_t *)(&_MBAR[0x803D])) -#define MCF_DMA_PRIOR2 (*(volatile uint8_t *)(&_MBAR[0x803E])) -#define MCF_DMA_PRIOR3 (*(volatile uint8_t *)(&_MBAR[0x803F])) -#define MCF_DMA_PRIOR4 (*(volatile uint8_t *)(&_MBAR[0x8040])) -#define MCF_DMA_PRIOR5 (*(volatile uint8_t *)(&_MBAR[0x8041])) -#define MCF_DMA_PRIOR6 (*(volatile uint8_t *)(&_MBAR[0x8042])) -#define MCF_DMA_PRIOR7 (*(volatile uint8_t *)(&_MBAR[0x8043])) -#define MCF_DMA_PRIOR8 (*(volatile uint8_t *)(&_MBAR[0x8044])) -#define MCF_DMA_PRIOR9 (*(volatile uint8_t *)(&_MBAR[0x8045])) -#define MCF_DMA_PRIOR10 (*(volatile uint8_t *)(&_MBAR[0x8046])) -#define MCF_DMA_PRIOR11 (*(volatile uint8_t *)(&_MBAR[0x8047])) -#define MCF_DMA_PRIOR12 (*(volatile uint8_t *)(&_MBAR[0x8048])) -#define MCF_DMA_PRIOR13 (*(volatile uint8_t *)(&_MBAR[0x8049])) -#define MCF_DMA_PRIOR14 (*(volatile uint8_t *)(&_MBAR[0x804A])) -#define MCF_DMA_PRIOR15 (*(volatile uint8_t *)(&_MBAR[0x804B])) -#define MCF_DMA_PRIOR16 (*(volatile uint8_t *)(&_MBAR[0x804C])) -#define MCF_DMA_PRIOR17 (*(volatile uint8_t *)(&_MBAR[0x804D])) -#define MCF_DMA_PRIOR18 (*(volatile uint8_t *)(&_MBAR[0x804E])) -#define MCF_DMA_PRIOR19 (*(volatile uint8_t *)(&_MBAR[0x804F])) -#define MCF_DMA_PRIOR20 (*(volatile uint8_t *)(&_MBAR[0x8050])) -#define MCF_DMA_PRIOR21 (*(volatile uint8_t *)(&_MBAR[0x8051])) -#define MCF_DMA_PRIOR22 (*(volatile uint8_t *)(&_MBAR[0x8052])) -#define MCF_DMA_PRIOR23 (*(volatile uint8_t *)(&_MBAR[0x8053])) -#define MCF_DMA_PRIOR24 (*(volatile uint8_t *)(&_MBAR[0x8054])) -#define MCF_DMA_PRIOR25 (*(volatile uint8_t *)(&_MBAR[0x8055])) -#define MCF_DMA_PRIOR26 (*(volatile uint8_t *)(&_MBAR[0x8056])) -#define MCF_DMA_PRIOR27 (*(volatile uint8_t *)(&_MBAR[0x8057])) -#define MCF_DMA_PRIOR28 (*(volatile uint8_t *)(&_MBAR[0x8058])) -#define MCF_DMA_PRIOR29 (*(volatile uint8_t *)(&_MBAR[0x8059])) -#define MCF_DMA_PRIOR30 (*(volatile uint8_t *)(&_MBAR[0x805A])) -#define MCF_DMA_PRIOR31 (*(volatile uint8_t *)(&_MBAR[0x805B])) -#define MCF_DMA_IMCR (*(volatile uint32_t*)(&_MBAR[0x805C])) -#define MCF_DMA_TSKSZ0 (*(volatile uint32_t*)(&_MBAR[0x8060])) -#define MCF_DMA_TSKSZ1 (*(volatile uint32_t*)(&_MBAR[0x8064])) -#define MCF_DMA_DBGCOMP0 (*(volatile uint32_t*)(&_MBAR[0x8070])) -#define MCF_DMA_DBGCOMP2 (*(volatile uint32_t*)(&_MBAR[0x8074])) -#define MCF_DMA_DBGCTL (*(volatile uint32_t*)(&_MBAR[0x8078])) -#define MCF_DMA_TCR(x) (*(volatile uint16_t*)(&_MBAR[0x801C + ((x)*0x2)])) -#define MCF_DMA_PRIOR(x) (*(volatile uint8_t *)(&_MBAR[0x803C + ((x)*0x1)])) - - -/* Bit definitions and macros for MCF_DMA_TASKBAR */ -#define MCF_DMA_TASKBAR_TASK_BASE_ADDRESS(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_CP */ -#define MCF_DMA_CP_DESCRIPTOR_POINTER(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_EP */ -#define MCF_DMA_EP_DESCRIPTOR_POINTER(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_VP */ -#define MCF_DMA_VP_VARIABLE_POINTER(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_PTD */ -#define MCF_DMA_PTD_PCTL0 (0x1) -#define MCF_DMA_PTD_PCTL1 (0x2) -#define MCF_DMA_PTD_PCTL13 (0x2000) -#define MCF_DMA_PTD_PCTL14 (0x4000) -#define MCF_DMA_PTD_PCTL15 (0x8000) - -/* Bit definitions and macros for MCF_DMA_DIPR */ -#define MCF_DMA_DIPR_TASK(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_DIMR */ -#define MCF_DMA_DIMR_TASK(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_TCR */ -#define MCF_DMA_TCR_ASTSKNUM(x) (((x)&0xF)<<0) -#define MCF_DMA_TCR_HLDINITNUM (0x20) -#define MCF_DMA_TCR_HIPRITSKEN (0x40) -#define MCF_DMA_TCR_ASTRT (0x80) -#define MCF_DMA_TCR_INITNUM(x) (((x)&0x1F)<<0x8) -#define MCF_DMA_TCR_ALWINIT (0x2000) -#define MCF_DMA_TCR_V (0x4000) -#define MCF_DMA_TCR_EN (0x8000) - -/* Bit definitions and macros for MCF_DMA_PRIOR */ -#define MCF_DMA_PRIOR_PRI(x) (((x)&0x7)<<0) -#define MCF_DMA_PRIOR_HLD (0x80) - -/* Bit definitions and macros for MCF_DMA_IMCR */ -#define MCF_DMA_IMCR_IMC16(x) (((x)&0x3)<<0) -#define MCF_DMA_IMCR_IMC17(x) (((x)&0x3)<<0x2) -#define MCF_DMA_IMCR_IMC18(x) (((x)&0x3)<<0x4) -#define MCF_DMA_IMCR_IMC19(x) (((x)&0x3)<<0x6) -#define MCF_DMA_IMCR_IMC20(x) (((x)&0x3)<<0x8) -#define MCF_DMA_IMCR_IMC21(x) (((x)&0x3)<<0xA) -#define MCF_DMA_IMCR_IMC22(x) (((x)&0x3)<<0xC) -#define MCF_DMA_IMCR_IMC23(x) (((x)&0x3)<<0xE) -#define MCF_DMA_IMCR_IMC24(x) (((x)&0x3)<<0x10) -#define MCF_DMA_IMCR_IMC25(x) (((x)&0x3)<<0x12) -#define MCF_DMA_IMCR_IMC26(x) (((x)&0x3)<<0x14) -#define MCF_DMA_IMCR_IMC27(x) (((x)&0x3)<<0x16) -#define MCF_DMA_IMCR_IMC28(x) (((x)&0x3)<<0x18) -#define MCF_DMA_IMCR_IMC29(x) (((x)&0x3)<<0x1A) -#define MCF_DMA_IMCR_IMC30(x) (((x)&0x3)<<0x1C) -#define MCF_DMA_IMCR_IMC31(x) (((x)&0x3)<<0x1E) - - -#define MCF_DMA_IMCR_IMC16_FEC0RX (0x00000000) -#define MCF_DMA_IMCR_IMC17_FEC0TX (0x00000000) -#define MCF_DMA_IMCR_IMC18_FEC0RX (0x00000020) -#define MCF_DMA_IMCR_IMC19_FEC0TX (0x00000080) -#define MCF_DMA_IMCR_IMC20_FEC1RX (0x00000100) -#define MCF_DMA_IMCR_IMC21_DREQ1 (0x00000000) -#define MCF_DMA_IMCR_IMC21_FEC1TX (0x00000400) -#define MCF_DMA_IMCR_IMC22_FEC0RX (0x00001000) -#define MCF_DMA_IMCR_IMC23_FEC0TX (0x00004000) -#define MCF_DMA_IMCR_IMC24_CTM0 (0x00010000) -#define MCF_DMA_IMCR_IMC24_FEC1RX (0x00020000) -#define MCF_DMA_IMCR_IMC25_CTM1 (0x00040000) -#define MCF_DMA_IMCR_IMC25_FEC1TX (0x00080000) -#define MCF_DMA_IMCR_IMC26_USBEP4 (0x00000000) -#define MCF_DMA_IMCR_IMC26_CTM2 (0x00200000) -#define MCF_DMA_IMCR_IMC27_USBEP5 (0x00000000) -#define MCF_DMA_IMCR_IMC27_CTM3 (0x00800000) -#define MCF_DMA_IMCR_IMC28_USBEP6 (0x00000000) -#define MCF_DMA_IMCR_IMC28_CTM4 (0x01000000) -#define MCF_DMA_IMCR_IMC28_DREQ1 (0x02000000) -#define MCF_DMA_IMCR_IMC28_PSC2RX (0x03000000) -#define MCF_DMA_IMCR_IMC29_DREQ1 (0x04000000) -#define MCF_DMA_IMCR_IMC29_CTM5 (0x08000000) -#define MCF_DMA_IMCR_IMC29_PSC2TX (0x0C000000) -#define MCF_DMA_IMCR_IMC30_FEC1RX (0x00000000) -#define MCF_DMA_IMCR_IMC30_CTM6 (0x10000000) -#define MCF_DMA_IMCR_IMC30_PSC3RX (0x30000000) -#define MCF_DMA_IMCR_IMC31_FEC1TX (0x00000000) -#define MCF_DMA_IMCR_IMC31_CTM7 (0x80000000) -#define MCF_DMA_IMCR_IMC31_PSC3TX (0xC0000000) - -/* Bit definitions and macros for MCF_DMA_TSKSZ0 */ -#define MCF_DMA_TSKSZ0_DSTSZ7(x) (((x)&0x3)<<0) -#define MCF_DMA_TSKSZ0_SRCSZ7(x) (((x)&0x3)<<0x2) -#define MCF_DMA_TSKSZ0_DSTSZ6(x) (((x)&0x3)<<0x4) -#define MCF_DMA_TSKSZ0_SRCSZ6(x) (((x)&0x3)<<0x6) -#define MCF_DMA_TSKSZ0_DSTSZ5(x) (((x)&0x3)<<0x8) -#define MCF_DMA_TSKSZ0_SRCSZ5(x) (((x)&0x3)<<0xA) -#define MCF_DMA_TSKSZ0_DSTSZ4(x) (((x)&0x3)<<0xC) -#define MCF_DMA_TSKSZ0_SRCSZ4(x) (((x)&0x3)<<0xE) -#define MCF_DMA_TSKSZ0_DSTSZ3(x) (((x)&0x3)<<0x10) -#define MCF_DMA_TSKSZ0_SRCSZ3(x) (((x)&0x3)<<0x12) -#define MCF_DMA_TSKSZ0_DSTSZ2(x) (((x)&0x3)<<0x14) -#define MCF_DMA_TSKSZ0_SRCSZ2(x) (((x)&0x3)<<0x16) -#define MCF_DMA_TSKSZ0_DSTSZ1(x) (((x)&0x3)<<0x18) -#define MCF_DMA_TSKSZ0_SRCSZ1(x) (((x)&0x3)<<0x1A) -#define MCF_DMA_TSKSZ0_DSTSZ0(x) (((x)&0x3)<<0x1C) -#define MCF_DMA_TSKSZ0_SRCSZ0(x) (((x)&0x3)<<0x1E) - -/* Bit definitions and macros for MCF_DMA_TSKSZ1 */ -#define MCF_DMA_TSKSZ1_DSTSZ15(x) (((x)&0x3)<<0) -#define MCF_DMA_TSKSZ1_SRCSZ15(x) (((x)&0x3)<<0x2) -#define MCF_DMA_TSKSZ1_DSTSZ14(x) (((x)&0x3)<<0x4) -#define MCF_DMA_TSKSZ1_SRCSZ14(x) (((x)&0x3)<<0x6) -#define MCF_DMA_TSKSZ1_DSTSZ13(x) (((x)&0x3)<<0x8) -#define MCF_DMA_TSKSZ1_SRCSZ13(x) (((x)&0x3)<<0xA) -#define MCF_DMA_TSKSZ1_DSTSZ12(x) (((x)&0x3)<<0xC) -#define MCF_DMA_TSKSZ1_SRCSZ12(x) (((x)&0x3)<<0xE) -#define MCF_DMA_TSKSZ1_DSTSZ11(x) (((x)&0x3)<<0x10) -#define MCF_DMA_TSKSZ1_SRCSZ11(x) (((x)&0x3)<<0x12) -#define MCF_DMA_TSKSZ1_DSTSZ10(x) (((x)&0x3)<<0x14) -#define MCF_DMA_TSKSZ1_SRCSZ10(x) (((x)&0x3)<<0x16) -#define MCF_DMA_TSKSZ1_DSTSZ9(x) (((x)&0x3)<<0x18) -#define MCF_DMA_TSKSZ1_SRCSZ9(x) (((x)&0x3)<<0x1A) -#define MCF_DMA_TSKSZ1_DSTSZ8(x) (((x)&0x3)<<0x1C) -#define MCF_DMA_TSKSZ1_SRCSZ8(x) (((x)&0x3)<<0x1E) - -/* Bit definitions and macros for MCF_DMA_DBGCOMP0 */ -#define MCF_DMA_DBGCOMP0_COMPARATOR_VALUE(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_DBGCOMP2 */ -#define MCF_DMA_DBGCOMP2_COMPARATOR_VALUE(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_DBGCTL */ -#define MCF_DMA_DBGCTL_I (0x2) -#define MCF_DMA_DBGCTL_E (0x4) -#define MCF_DMA_DBGCTL_AND_OR (0x80) -#define MCF_DMA_DBGCTL_COMPARATOR_TYPE_2(x) (((x)&0x7)<<0x8) -#define MCF_DMA_DBGCTL_COMPARATOR_TYPE_1(x) (((x)&0x7)<<0xB) -#define MCF_DMA_DBGCTL_B (0x4000) -#define MCF_DMA_DBGCTL_AA (0x8000) -#define MCF_DMA_DBGCTL_BLOCK_TASKS(x) (((x)&0xFFFF)<<0x10) - - -#endif /* __MCF5475_DMA_H__ */ diff --git a/include/MCF5475_DSPI.h b/include/MCF5475_DSPI.h deleted file mode 100644 index 76cac28..0000000 --- a/include/MCF5475_DSPI.h +++ /dev/null @@ -1,150 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_DSPI_H__ -#define __MCF5475_DSPI_H__ - - -/********************************************************************* -* -* DMA Serial Peripheral Interface (DSPI) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_DSPI_DMCR (*(volatile uint32_t*)(&_MBAR[0x8A00])) -#define MCF_DSPI_DTCR (*(volatile uint32_t*)(&_MBAR[0x8A08])) -#define MCF_DSPI_DCTAR0 (*(volatile uint32_t*)(&_MBAR[0x8A0C])) -#define MCF_DSPI_DCTAR1 (*(volatile uint32_t*)(&_MBAR[0x8A10])) -#define MCF_DSPI_DCTAR2 (*(volatile uint32_t*)(&_MBAR[0x8A14])) -#define MCF_DSPI_DCTAR3 (*(volatile uint32_t*)(&_MBAR[0x8A18])) -#define MCF_DSPI_DCTAR4 (*(volatile uint32_t*)(&_MBAR[0x8A1C])) -#define MCF_DSPI_DCTAR5 (*(volatile uint32_t*)(&_MBAR[0x8A20])) -#define MCF_DSPI_DCTAR6 (*(volatile uint32_t*)(&_MBAR[0x8A24])) -#define MCF_DSPI_DCTAR7 (*(volatile uint32_t*)(&_MBAR[0x8A28])) -#define MCF_DSPI_DSR (*(volatile uint32_t*)(&_MBAR[0x8A2C])) -#define MCF_DSPI_DIRSR (*(volatile uint32_t*)(&_MBAR[0x8A30])) -#define MCF_DSPI_DTFR (*(volatile uint32_t*)(&_MBAR[0x8A34])) -#define MCF_DSPI_DRFR (*(volatile uint32_t*)(&_MBAR[0x8A38])) -#define MCF_DSPI_DTFDR0 (*(volatile uint32_t*)(&_MBAR[0x8A3C])) -#define MCF_DSPI_DTFDR1 (*(volatile uint32_t*)(&_MBAR[0x8A40])) -#define MCF_DSPI_DTFDR2 (*(volatile uint32_t*)(&_MBAR[0x8A44])) -#define MCF_DSPI_DTFDR3 (*(volatile uint32_t*)(&_MBAR[0x8A48])) -#define MCF_DSPI_DRFDR0 (*(volatile uint32_t*)(&_MBAR[0x8A7C])) -#define MCF_DSPI_DRFDR1 (*(volatile uint32_t*)(&_MBAR[0x8A80])) -#define MCF_DSPI_DRFDR2 (*(volatile uint32_t*)(&_MBAR[0x8A84])) -#define MCF_DSPI_DRFDR3 (*(volatile uint32_t*)(&_MBAR[0x8A88])) -#define MCF_DSPI_DCTAR(x) (*(volatile uint32_t*)(&_MBAR[0x8A0C + ((x)*0x4)])) -#define MCF_DSPI_DTFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8A3C + ((x)*0x4)])) -#define MCF_DSPI_DRFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8A7C + ((x)*0x4)])) - - -/* Bit definitions and macros for MCF_DSPI_DMCR */ -#define MCF_DSPI_DMCR_HALT (0x1) -#define MCF_DSPI_DMCR_SMPL_PT(x) (((x)&0x3)<<0x8) -#define MCF_DSPI_DMCR_SMPL_PT_0CLK (0) -#define MCF_DSPI_DMCR_SMPL_PT_1CLK (0x100) -#define MCF_DSPI_DMCR_SMPL_PT_2CLK (0x200) -#define MCF_DSPI_DMCR_CRXF (0x400) -#define MCF_DSPI_DMCR_CTXF (0x800) -#define MCF_DSPI_DMCR_DRXF (0x1000) -#define MCF_DSPI_DMCR_DTXF (0x2000) -#define MCF_DSPI_DMCR_CSIS0 (0x10000) -#define MCF_DSPI_DMCR_CSIS2 (0x40000) -#define MCF_DSPI_DMCR_CSIS3 (0x80000) -#define MCF_DSPI_DMCR_CSIS5 (0x200000) -#define MCF_DSPI_DMCR_ROOE (0x1000000) -#define MCF_DSPI_DMCR_PCSSE (0x2000000) -#define MCF_DSPI_DMCR_MTFE (0x4000000) -#define MCF_DSPI_DMCR_FRZ (0x8000000) -#define MCF_DSPI_DMCR_DCONF(x) (((x)&0x3)<<0x1C) -#define MCF_DSPI_DMCR_CSCK (0x40000000) -#define MCF_DSPI_DMCR_MSTR (0x80000000) - -/* Bit definitions and macros for MCF_DSPI_DTCR */ -#define MCF_DSPI_DTCR_SPI_TCNT(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_DSPI_DCTAR */ -#define MCF_DSPI_DCTAR_BR(x) (((x)&0xF)<<0) -#define MCF_DSPI_DCTAR_DT(x) (((x)&0xF)<<0x4) -#define MCF_DSPI_DCTAR_ASC(x) (((x)&0xF)<<0x8) -#define MCF_DSPI_DCTAR_CSSCK(x) (((x)&0xF)<<0xC) -#define MCF_DSPI_DCTAR_PBR(x) (((x)&0x3)<<0x10) -#define MCF_DSPI_DCTAR_PBR_1CLK (0) -#define MCF_DSPI_DCTAR_PBR_3CLK (0x10000) -#define MCF_DSPI_DCTAR_PBR_5CLK (0x20000) -#define MCF_DSPI_DCTAR_PBR_7CLK (0x30000) -#define MCF_DSPI_DCTAR_PDT(x) (((x)&0x3)<<0x12) -#define MCF_DSPI_DCTAR_PDT_1CLK (0) -#define MCF_DSPI_DCTAR_PDT_3CLK (0x40000) -#define MCF_DSPI_DCTAR_PDT_5CLK (0x80000) -#define MCF_DSPI_DCTAR_PDT_7CLK (0xC0000) -#define MCF_DSPI_DCTAR_PASC(x) (((x)&0x3)<<0x14) -#define MCF_DSPI_DCTAR_PASC_1CLK (0) -#define MCF_DSPI_DCTAR_PASC_3CLK (0x100000) -#define MCF_DSPI_DCTAR_PASC_5CLK (0x200000) -#define MCF_DSPI_DCTAR_PASC_7CLK (0x300000) -#define MCF_DSPI_DCTAR_PCSSCK(x) (((x)&0x3)<<0x16) -#define MCF_DSPI_DCTAR_LSBFE (0x1000000) -#define MCF_DSPI_DCTAR_CPHA (0x2000000) -#define MCF_DSPI_DCTAR_CPOL (0x4000000) -#define MCF_DSPI_DCTAR_TRSZ(x) (((x)&0xF)<<0x1B) - -/* Bit definitions and macros for MCF_DSPI_DSR */ -#define MCF_DSPI_DSR_RXPTR(x) (((x)&0xF)<<0) -#define MCF_DSPI_DSR_RXCTR(x) (((x)&0xF)<<0x4) -#define MCF_DSPI_DSR_TXPTR(x) (((x)&0xF)<<0x8) -#define MCF_DSPI_DSR_TXCTR(x) (((x)&0xF)<<0xC) -#define MCF_DSPI_DSR_RFDF (0x20000) -#define MCF_DSPI_DSR_RFOF (0x80000) -#define MCF_DSPI_DSR_TFFF (0x2000000) -#define MCF_DSPI_DSR_TFUF (0x8000000) -#define MCF_DSPI_DSR_EOQF (0x10000000) -#define MCF_DSPI_DSR_TXRXS (0x40000000) -#define MCF_DSPI_DSR_TCF (0x80000000) - -/* Bit definitions and macros for MCF_DSPI_DIRSR */ -#define MCF_DSPI_DIRSR_RFDFS (0x10000) -#define MCF_DSPI_DIRSR_RFDFE (0x20000) -#define MCF_DSPI_DIRSR_RFOFE (0x80000) -#define MCF_DSPI_DIRSR_TFFFS (0x1000000) -#define MCF_DSPI_DIRSR_TFFFE (0x2000000) -#define MCF_DSPI_DIRSR_TFUFE (0x8000000) -#define MCF_DSPI_DIRSR_EOQFE (0x10000000) -#define MCF_DSPI_DIRSR_TCFE (0x80000000) - -/* Bit definitions and macros for MCF_DSPI_DTFR */ -#define MCF_DSPI_DTFR_TXDATA(x) (((x)&0xFFFF)<<0) -#define MCF_DSPI_DTFR_CS0 (0x10000) -#define MCF_DSPI_DTFR_CS2 (0x40000) -#define MCF_DSPI_DTFR_CS3 (0x80000) -#define MCF_DSPI_DTFR_CS5 (0x200000) -#define MCF_DSPI_DTFR_CTCNT (0x4000000) -#define MCF_DSPI_DTFR_EOQ (0x8000000) -#define MCF_DSPI_DTFR_CTAS(x) (((x)&0x7)<<0x1C) -#define MCF_DSPI_DTFR_CONT (0x80000000) - -/* Bit definitions and macros for MCF_DSPI_DRFR */ -#define MCF_DSPI_DRFR_RXDATA(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_DSPI_DTFDR */ -#define MCF_DSPI_DTFDR_TXDATA(x) (((x)&0xFFFF)<<0) -#define MCF_DSPI_DTFDR_TXCMD(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_DSPI_DRFDR */ -#define MCF_DSPI_DRFDR_RXDATA(x) (((x)&0xFFFF)<<0) - - -#endif /* __MCF5475_DSPI_H__ */ diff --git a/include/MCF5475_EPORT.h b/include/MCF5475_EPORT.h deleted file mode 100644 index 6506196..0000000 --- a/include/MCF5475_EPORT.h +++ /dev/null @@ -1,123 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_EPORT_H__ -#define __MCF5475_EPORT_H__ - - -/********************************************************************* -* -* Edge Port Module (EPORT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_EPORT_EPPAR (*(volatile uint16_t*)(&_MBAR[0xF00])) -#define MCF_EPORT_EPDDR (*(volatile uint8_t *)(&_MBAR[0xF04])) -#define MCF_EPORT_EPIER (*(volatile uint8_t *)(&_MBAR[0xF05])) -#define MCF_EPORT_EPDR (*(volatile uint8_t *)(&_MBAR[0xF08])) -#define MCF_EPORT_EPPDR (*(volatile uint8_t *)(&_MBAR[0xF09])) -#define MCF_EPORT_EPFR (*(volatile uint8_t *)(&_MBAR[0xF0C])) - - - -/* Bit definitions and macros for MCF_EPORT_EPPAR */ -#define MCF_EPORT_EPPAR_EPPA1(x) (((x)&0x3)<<0x2) -#define MCF_EPORT_EPPAR_EPPA1_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA1_RISING (0x4) -#define MCF_EPORT_EPPAR_EPPA1_FALLING (0x8) -#define MCF_EPORT_EPPAR_EPPA1_BOTH (0xC) -#define MCF_EPORT_EPPAR_EPPA2(x) (((x)&0x3)<<0x4) -#define MCF_EPORT_EPPAR_EPPA2_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA2_RISING (0x10) -#define MCF_EPORT_EPPAR_EPPA2_FALLING (0x20) -#define MCF_EPORT_EPPAR_EPPA2_BOTH (0x30) -#define MCF_EPORT_EPPAR_EPPA3(x) (((x)&0x3)<<0x6) -#define MCF_EPORT_EPPAR_EPPA3_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA3_RISING (0x40) -#define MCF_EPORT_EPPAR_EPPA3_FALLING (0x80) -#define MCF_EPORT_EPPAR_EPPA3_BOTH (0xC0) -#define MCF_EPORT_EPPAR_EPPA4(x) (((x)&0x3)<<0x8) -#define MCF_EPORT_EPPAR_EPPA4_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA4_RISING (0x100) -#define MCF_EPORT_EPPAR_EPPA4_FALLING (0x200) -#define MCF_EPORT_EPPAR_EPPA4_BOTH (0x300) -#define MCF_EPORT_EPPAR_EPPA5(x) (((x)&0x3)<<0xA) -#define MCF_EPORT_EPPAR_EPPA5_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA5_RISING (0x400) -#define MCF_EPORT_EPPAR_EPPA5_FALLING (0x800) -#define MCF_EPORT_EPPAR_EPPA5_BOTH (0xC00) -#define MCF_EPORT_EPPAR_EPPA6(x) (((x)&0x3)<<0xC) -#define MCF_EPORT_EPPAR_EPPA6_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA6_RISING (0x1000) -#define MCF_EPORT_EPPAR_EPPA6_FALLING (0x2000) -#define MCF_EPORT_EPPAR_EPPA6_BOTH (0x3000) -#define MCF_EPORT_EPPAR_EPPA7(x) (((x)&0x3)<<0xE) -#define MCF_EPORT_EPPAR_EPPA7_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA7_RISING (0x4000) -#define MCF_EPORT_EPPAR_EPPA7_FALLING (0x8000) -#define MCF_EPORT_EPPAR_EPPA7_BOTH (0xC000) -#define MCF_EPORT_EPPAR_LEVEL (0) -#define MCF_EPORT_EPPAR_RISING (0x1) -#define MCF_EPORT_EPPAR_FALLING (0x2) -#define MCF_EPORT_EPPAR_BOTH (0x3) - -/* Bit definitions and macros for MCF_EPORT_EPDDR */ -#define MCF_EPORT_EPDDR_EPDD1 (0x2) -#define MCF_EPORT_EPDDR_EPDD2 (0x4) -#define MCF_EPORT_EPDDR_EPDD3 (0x8) -#define MCF_EPORT_EPDDR_EPDD4 (0x10) -#define MCF_EPORT_EPDDR_EPDD5 (0x20) -#define MCF_EPORT_EPDDR_EPDD6 (0x40) -#define MCF_EPORT_EPDDR_EPDD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPIER */ -#define MCF_EPORT_EPIER_EPIE1 (0x2) -#define MCF_EPORT_EPIER_EPIE2 (0x4) -#define MCF_EPORT_EPIER_EPIE3 (0x8) -#define MCF_EPORT_EPIER_EPIE4 (0x10) -#define MCF_EPORT_EPIER_EPIE5 (0x20) -#define MCF_EPORT_EPIER_EPIE6 (0x40) -#define MCF_EPORT_EPIER_EPIE7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPDR */ -#define MCF_EPORT_EPDR_EPD1 (0x2) -#define MCF_EPORT_EPDR_EPD2 (0x4) -#define MCF_EPORT_EPDR_EPD3 (0x8) -#define MCF_EPORT_EPDR_EPD4 (0x10) -#define MCF_EPORT_EPDR_EPD5 (0x20) -#define MCF_EPORT_EPDR_EPD6 (0x40) -#define MCF_EPORT_EPDR_EPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPPDR */ -#define MCF_EPORT_EPPDR_EPPD1 (0x2) -#define MCF_EPORT_EPPDR_EPPD2 (0x4) -#define MCF_EPORT_EPPDR_EPPD3 (0x8) -#define MCF_EPORT_EPPDR_EPPD4 (0x10) -#define MCF_EPORT_EPPDR_EPPD5 (0x20) -#define MCF_EPORT_EPPDR_EPPD6 (0x40) -#define MCF_EPORT_EPPDR_EPPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPFR */ -#define MCF_EPORT_EPFR_EPF1 (0x2) -#define MCF_EPORT_EPFR_EPF2 (0x4) -#define MCF_EPORT_EPFR_EPF3 (0x8) -#define MCF_EPORT_EPFR_EPF4 (0x10) -#define MCF_EPORT_EPFR_EPF5 (0x20) -#define MCF_EPORT_EPFR_EPF6 (0x40) -#define MCF_EPORT_EPFR_EPF7 (0x80) - - -#endif /* __MCF5475_EPORT_H__ */ diff --git a/include/MCF5475_FBCS.h b/include/MCF5475_FBCS.h deleted file mode 100644 index 37daf00..0000000 --- a/include/MCF5475_FBCS.h +++ /dev/null @@ -1,100 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_FBCS_H__ -#define __MCF5475_FBCS_H__ - - -/********************************************************************* -* -* FlexBus Chip Select Module (FBCS) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FBCS0_CSAR (*(volatile uint32_t*)(&_MBAR[0x500])) -#define MCF_FBCS0_CSMR (*(volatile uint32_t*)(&_MBAR[0x504])) -#define MCF_FBCS0_CSCR (*(volatile uint32_t*)(&_MBAR[0x508])) - -#define MCF_FBCS1_CSAR (*(volatile uint32_t*)(&_MBAR[0x50C])) -#define MCF_FBCS1_CSMR (*(volatile uint32_t*)(&_MBAR[0x510])) -#define MCF_FBCS1_CSCR (*(volatile uint32_t*)(&_MBAR[0x514])) - -#define MCF_FBCS2_CSAR (*(volatile uint32_t*)(&_MBAR[0x518])) -#define MCF_FBCS2_CSMR (*(volatile uint32_t*)(&_MBAR[0x51C])) -#define MCF_FBCS2_CSCR (*(volatile uint32_t*)(&_MBAR[0x520])) - -#define MCF_FBCS3_CSAR (*(volatile uint32_t*)(&_MBAR[0x524])) -#define MCF_FBCS3_CSMR (*(volatile uint32_t*)(&_MBAR[0x528])) -#define MCF_FBCS3_CSCR (*(volatile uint32_t*)(&_MBAR[0x52C])) - -#define MCF_FBCS4_CSAR (*(volatile uint32_t*)(&_MBAR[0x530])) -#define MCF_FBCS4_CSMR (*(volatile uint32_t*)(&_MBAR[0x534])) -#define MCF_FBCS4_CSCR (*(volatile uint32_t*)(&_MBAR[0x538])) - -#define MCF_FBCS5_CSAR (*(volatile uint32_t*)(&_MBAR[0x53C])) -#define MCF_FBCS5_CSMR (*(volatile uint32_t*)(&_MBAR[0x540])) -#define MCF_FBCS5_CSCR (*(volatile uint32_t*)(&_MBAR[0x544])) - -#define MCF_FBCS_CSAR(x) (*(volatile uint32_t*)(&_MBAR[0x500 + ((x)*0xC)])) -#define MCF_FBCS_CSMR(x) (*(volatile uint32_t*)(&_MBAR[0x504 + ((x)*0xC)])) -#define MCF_FBCS_CSCR(x) (*(volatile uint32_t*)(&_MBAR[0x508 + ((x)*0xC)])) - - -/* Bit definitions and macros for MCF_FBCS_CSAR */ -#define MCF_FBCS_CSAR_BA(x) ((x)&0xFFFF0000) - -/* Bit definitions and macros for MCF_FBCS_CSMR */ -#define MCF_FBCS_CSMR_V (0x1) -#define MCF_FBCS_CSMR_WP (0x100) -#define MCF_FBCS_CSMR_BAM(x) (((x)&0xFFFF)<<0x10) -#define MCF_FBCS_CSMR_BAM_4G (0xFFFF0000) -#define MCF_FBCS_CSMR_BAM_2G (0x7FFF0000) -#define MCF_FBCS_CSMR_BAM_1G (0x3FFF0000) -#define MCF_FBCS_CSMR_BAM_1024M (0x3FFF0000) -#define MCF_FBCS_CSMR_BAM_512M (0x1FFF0000) -#define MCF_FBCS_CSMR_BAM_256M (0xFFF0000) -#define MCF_FBCS_CSMR_BAM_128M (0x7FF0000) -#define MCF_FBCS_CSMR_BAM_64M (0x3FF0000) -#define MCF_FBCS_CSMR_BAM_32M (0x1FF0000) -#define MCF_FBCS_CSMR_BAM_16M (0xFF0000) -#define MCF_FBCS_CSMR_BAM_8M (0x7F0000) -#define MCF_FBCS_CSMR_BAM_4M (0x3F0000) -#define MCF_FBCS_CSMR_BAM_2M (0x1F0000) -#define MCF_FBCS_CSMR_BAM_1M (0xF0000) -#define MCF_FBCS_CSMR_BAM_1024K (0xF0000) -#define MCF_FBCS_CSMR_BAM_512K (0x70000) -#define MCF_FBCS_CSMR_BAM_256K (0x30000) -#define MCF_FBCS_CSMR_BAM_128K (0x10000) -#define MCF_FBCS_CSMR_BAM_64K (0) - -/* Bit definitions and macros for MCF_FBCS_CSCR */ -#define MCF_FBCS_CSCR_BSTW (0x8) -#define MCF_FBCS_CSCR_BSTR (0x10) -#define MCF_FBCS_CSCR_BEM (0x20) -#define MCF_FBCS_CSCR_PS(x) (((x)&0x3)<<0x6) -#define MCF_FBCS_CSCR_PS_32 (0) -#define MCF_FBCS_CSCR_PS_8 (0x40) -#define MCF_FBCS_CSCR_PS_16 (0x80) -#define MCF_FBCS_CSCR_AA (0x100) -#define MCF_FBCS_CSCR_WS(x) (((x)&0x3F)<<0xA) -#define MCF_FBCS_CSCR_WRAH(x) (((x)&0x3)<<0x10) -#define MCF_FBCS_CSCR_RDAH(x) (((x)&0x3)<<0x12) -#define MCF_FBCS_CSCR_ASET(x) (((x)&0x3)<<0x14) -#define MCF_FBCS_CSCR_SWSEN (0x800000) -#define MCF_FBCS_CSCR_SWS(x) (((x)&0x3F)<<0x1A) - - -#endif /* __MCF5475_FBCS_H__ */ diff --git a/include/MCF5475_FEC.h b/include/MCF5475_FEC.h deleted file mode 100644 index fdd9403..0000000 --- a/include/MCF5475_FEC.h +++ /dev/null @@ -1,680 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_FEC_H__ -#define __MCF5475_FEC_H__ - - -/********************************************************************* -* -* Fast Ethernet Controller(FEC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FEC0_EIR (*(volatile uint32_t*)(&_MBAR[0x9004])) -#define MCF_FEC0_EIMR (*(volatile uint32_t*)(&_MBAR[0x9008])) -#define MCF_FEC0_ECR (*(volatile uint32_t*)(&_MBAR[0x9024])) -#define MCF_FEC0_MMFR (*(volatile uint32_t*)(&_MBAR[0x9040])) -#define MCF_FEC0_MSCR (*(volatile uint32_t*)(&_MBAR[0x9044])) -#define MCF_FEC0_MIBC (*(volatile uint32_t*)(&_MBAR[0x9064])) -#define MCF_FEC0_RCR (*(volatile uint32_t*)(&_MBAR[0x9084])) -#define MCF_FEC0_RHR (*(volatile uint32_t*)(&_MBAR[0x9088])) -#define MCF_FEC0_TCR (*(volatile uint32_t*)(&_MBAR[0x90C4])) -#define MCF_FEC0_PALR (*(volatile uint32_t*)(&_MBAR[0x90E4])) -#define MCF_FEC0_PAHR (*(volatile uint32_t*)(&_MBAR[0x90E8])) -#define MCF_FEC0_OPD (*(volatile uint32_t*)(&_MBAR[0x90EC])) -#define MCF_FEC0_IAUR (*(volatile uint32_t*)(&_MBAR[0x9118])) -#define MCF_FEC0_IALR (*(volatile uint32_t*)(&_MBAR[0x911C])) -#define MCF_FEC0_GAUR (*(volatile uint32_t*)(&_MBAR[0x9120])) -#define MCF_FEC0_GALR (*(volatile uint32_t*)(&_MBAR[0x9124])) -#define MCF_FEC0_FECTFWR (*(volatile uint32_t*)(&_MBAR[0x9144])) -#define MCF_FEC0_FECRFDR (*(volatile uint32_t*)(&_MBAR[0x9184])) -#define MCF_FEC0_FECRFSR (*(volatile uint32_t*)(&_MBAR[0x9188])) -#define MCF_FEC0_FECRFCR (*(volatile uint32_t*)(&_MBAR[0x918C])) -#define MCF_FEC0_FECRLRFP (*(volatile uint32_t*)(&_MBAR[0x9190])) -#define MCF_FEC0_FECRLWFP (*(volatile uint32_t*)(&_MBAR[0x9194])) -#define MCF_FEC0_FECRFAR (*(volatile uint32_t*)(&_MBAR[0x9198])) -#define MCF_FEC0_FECRFRP (*(volatile uint32_t*)(&_MBAR[0x919C])) -#define MCF_FEC0_FECRFWP (*(volatile uint32_t*)(&_MBAR[0x91A0])) -#define MCF_FEC0_FECTFDR (*(volatile uint32_t*)(&_MBAR[0x91A4])) -#define MCF_FEC0_FECTFSR (*(volatile uint32_t*)(&_MBAR[0x91A8])) -#define MCF_FEC0_FECTFCR (*(volatile uint32_t*)(&_MBAR[0x91AC])) -#define MCF_FEC0_FECTLRFP (*(volatile uint32_t*)(&_MBAR[0x91B0])) -#define MCF_FEC0_FECTLWFP (*(volatile uint32_t*)(&_MBAR[0x91B4])) -#define MCF_FEC0_FECTFAR (*(volatile uint32_t*)(&_MBAR[0x91B8])) -#define MCF_FEC0_FECTFRP (*(volatile uint32_t*)(&_MBAR[0x91BC])) -#define MCF_FEC0_FECTFWP (*(volatile uint32_t*)(&_MBAR[0x91C0])) -#define MCF_FEC0_FECFRST (*(volatile uint32_t*)(&_MBAR[0x91C4])) -#define MCF_FEC0_FECCTCWR (*(volatile uint32_t*)(&_MBAR[0x91C8])) -#define MCF_FEC0_RMON_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9200])) -#define MCF_FEC0_RMON_T_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9204])) -#define MCF_FEC0_RMON_T_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9208])) -#define MCF_FEC0_RMON_T_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x920C])) -#define MCF_FEC0_RMON_T_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9210])) -#define MCF_FEC0_RMON_T_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9214])) -#define MCF_FEC0_RMON_T_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9218])) -#define MCF_FEC0_RMON_T_FRAG (*(volatile uint32_t*)(&_MBAR[0x921C])) -#define MCF_FEC0_RMON_T_JAB (*(volatile uint32_t*)(&_MBAR[0x9220])) -#define MCF_FEC0_RMON_T_COL (*(volatile uint32_t*)(&_MBAR[0x9224])) -#define MCF_FEC0_RMON_T_P64 (*(volatile uint32_t*)(&_MBAR[0x9228])) -#define MCF_FEC0_RMON_T_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x922C])) -#define MCF_FEC0_RMON_T_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x9230])) -#define MCF_FEC0_RMON_T_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x9234])) -#define MCF_FEC0_RMON_T_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x9238])) -#define MCF_FEC0_RMON_T_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x923C])) -#define MCF_FEC0_RMON_T_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x9240])) -#define MCF_FEC0_RMON_T_OCTETS (*(volatile uint32_t*)(&_MBAR[0x9244])) -#define MCF_FEC0_IEEE_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9248])) -#define MCF_FEC0_IEEE_T_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x924C])) -#define MCF_FEC0_IEEE_T_1COL (*(volatile uint32_t*)(&_MBAR[0x9250])) -#define MCF_FEC0_IEEE_T_MCOL (*(volatile uint32_t*)(&_MBAR[0x9254])) -#define MCF_FEC0_IEEE_T_DEF (*(volatile uint32_t*)(&_MBAR[0x9258])) -#define MCF_FEC0_IEEE_T_LCOL (*(volatile uint32_t*)(&_MBAR[0x925C])) -#define MCF_FEC0_IEEE_T_EXCOL (*(volatile uint32_t*)(&_MBAR[0x9260])) -#define MCF_FEC0_IEEE_T_MACERR (*(volatile uint32_t*)(&_MBAR[0x9264])) -#define MCF_FEC0_IEEE_T_CSERR (*(volatile uint32_t*)(&_MBAR[0x9268])) -#define MCF_FEC0_IEEE_T_SQE (*(volatile uint32_t*)(&_MBAR[0x926C])) -#define MCF_FEC0_IEEE_T_FDXFC (*(volatile uint32_t*)(&_MBAR[0x9270])) -#define MCF_FEC0_IEEE_T_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x9274])) -#define MCF_FEC0_RMON_R_DROP (*(volatile uint32_t*)(&_MBAR[0x9280])) -#define MCF_FEC0_RMON_R_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9284])) -#define MCF_FEC0_RMON_R_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9288])) -#define MCF_FEC0_RMON_R_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x928C])) -#define MCF_FEC0_RMON_R_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9290])) -#define MCF_FEC0_RMON_R_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9294])) -#define MCF_FEC0_RMON_R_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9298])) -#define MCF_FEC0_RMON_R_FRAG (*(volatile uint32_t*)(&_MBAR[0x929C])) -#define MCF_FEC0_RMON_R_JAB (*(volatile uint32_t*)(&_MBAR[0x92A0])) -#define MCF_FEC0_RMON_R_RESVD_0 (*(volatile uint32_t*)(&_MBAR[0x92A4])) -#define MCF_FEC0_RMON_R_P64 (*(volatile uint32_t*)(&_MBAR[0x92A8])) -#define MCF_FEC0_RMON_R_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x92AC])) -#define MCF_FEC0_RMON_R_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x92B0])) -#define MCF_FEC0_RMON_R_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x92B4])) -#define MCF_FEC0_RMON_R_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x92B8])) -#define MCF_FEC0_RMON_R_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x92BC])) -#define MCF_FEC0_RMON_R_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x92C0])) -#define MCF_FEC0_RMON_R_OCTETS (*(volatile uint32_t*)(&_MBAR[0x92C4])) -#define MCF_FEC0_IEEE_R_DROP (*(volatile uint32_t*)(&_MBAR[0x92C8])) -#define MCF_FEC0_IEEE_R_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x92CC])) -#define MCF_FEC0_IEEE_R_CRC (*(volatile uint32_t*)(&_MBAR[0x92D0])) -#define MCF_FEC0_IEEE_R_ALIGN (*(volatile uint32_t*)(&_MBAR[0x92D4])) -#define MCF_FEC0_IEEE_R_MACERR (*(volatile uint32_t*)(&_MBAR[0x92D8])) -#define MCF_FEC0_IEEE_R_FDXFC (*(volatile uint32_t*)(&_MBAR[0x92DC])) -#define MCF_FEC0_IEEE_R_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x92E0])) - -#define MCF_FEC1_EIR (*(volatile uint32_t*)(&_MBAR[0x9804])) -#define MCF_FEC1_EIMR (*(volatile uint32_t*)(&_MBAR[0x9808])) -#define MCF_FEC1_ECR (*(volatile uint32_t*)(&_MBAR[0x9824])) -#define MCF_FEC1_MMFR (*(volatile uint32_t*)(&_MBAR[0x9840])) -#define MCF_FEC1_MSCR (*(volatile uint32_t*)(&_MBAR[0x9844])) -#define MCF_FEC1_MIBC (*(volatile uint32_t*)(&_MBAR[0x9864])) -#define MCF_FEC1_RCR (*(volatile uint32_t*)(&_MBAR[0x9884])) -#define MCF_FEC1_RHR (*(volatile uint32_t*)(&_MBAR[0x9888])) -#define MCF_FEC1_TCR (*(volatile uint32_t*)(&_MBAR[0x98C4])) -#define MCF_FEC1_PALR (*(volatile uint32_t*)(&_MBAR[0x98E4])) -#define MCF_FEC1_PAHR (*(volatile uint32_t*)(&_MBAR[0x98E8])) -#define MCF_FEC1_OPD (*(volatile uint32_t*)(&_MBAR[0x98EC])) -#define MCF_FEC1_IAUR (*(volatile uint32_t*)(&_MBAR[0x9918])) -#define MCF_FEC1_IALR (*(volatile uint32_t*)(&_MBAR[0x991C])) -#define MCF_FEC1_GAUR (*(volatile uint32_t*)(&_MBAR[0x9920])) -#define MCF_FEC1_GALR (*(volatile uint32_t*)(&_MBAR[0x9924])) -#define MCF_FEC1_FECTFWR (*(volatile uint32_t*)(&_MBAR[0x9944])) -#define MCF_FEC1_FECRFDR (*(volatile uint32_t*)(&_MBAR[0x9984])) -#define MCF_FEC1_FECRFSR (*(volatile uint32_t*)(&_MBAR[0x9988])) -#define MCF_FEC1_FECRFCR (*(volatile uint32_t*)(&_MBAR[0x998C])) -#define MCF_FEC1_FECRLRFP (*(volatile uint32_t*)(&_MBAR[0x9990])) -#define MCF_FEC1_FECRLWFP (*(volatile uint32_t*)(&_MBAR[0x9994])) -#define MCF_FEC1_FECRFAR (*(volatile uint32_t*)(&_MBAR[0x9998])) -#define MCF_FEC1_FECRFRP (*(volatile uint32_t*)(&_MBAR[0x999C])) -#define MCF_FEC1_FECRFWP (*(volatile uint32_t*)(&_MBAR[0x99A0])) -#define MCF_FEC1_FECTFDR (*(volatile uint32_t*)(&_MBAR[0x99A4])) -#define MCF_FEC1_FECTFSR (*(volatile uint32_t*)(&_MBAR[0x99A8])) -#define MCF_FEC1_FECTFCR (*(volatile uint32_t*)(&_MBAR[0x99AC])) -#define MCF_FEC1_FECTLRFP (*(volatile uint32_t*)(&_MBAR[0x99B0])) -#define MCF_FEC1_FECTLWFP (*(volatile uint32_t*)(&_MBAR[0x99B4])) -#define MCF_FEC1_FECTFAR (*(volatile uint32_t*)(&_MBAR[0x99B8])) -#define MCF_FEC1_FECTFRP (*(volatile uint32_t*)(&_MBAR[0x99BC])) -#define MCF_FEC1_FECTFWP (*(volatile uint32_t*)(&_MBAR[0x99C0])) -#define MCF_FEC1_FECFRST (*(volatile uint32_t*)(&_MBAR[0x99C4])) -#define MCF_FEC1_FECCTCWR (*(volatile uint32_t*)(&_MBAR[0x99C8])) -#define MCF_FEC1_RMON_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9A00])) -#define MCF_FEC1_RMON_T_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9A04])) -#define MCF_FEC1_RMON_T_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A08])) -#define MCF_FEC1_RMON_T_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A0C])) -#define MCF_FEC1_RMON_T_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9A10])) -#define MCF_FEC1_RMON_T_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A14])) -#define MCF_FEC1_RMON_T_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A18])) -#define MCF_FEC1_RMON_T_FRAG (*(volatile uint32_t*)(&_MBAR[0x9A1C])) -#define MCF_FEC1_RMON_T_JAB (*(volatile uint32_t*)(&_MBAR[0x9A20])) -#define MCF_FEC1_RMON_T_COL (*(volatile uint32_t*)(&_MBAR[0x9A24])) -#define MCF_FEC1_RMON_T_P64 (*(volatile uint32_t*)(&_MBAR[0x9A28])) -#define MCF_FEC1_RMON_T_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x9A2C])) -#define MCF_FEC1_RMON_T_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x9A30])) -#define MCF_FEC1_RMON_T_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x9A34])) -#define MCF_FEC1_RMON_T_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x9A38])) -#define MCF_FEC1_RMON_T_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x9A3C])) -#define MCF_FEC1_RMON_T_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x9A40])) -#define MCF_FEC1_RMON_T_OCTETS (*(volatile uint32_t*)(&_MBAR[0x9A44])) -#define MCF_FEC1_IEEE_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9A48])) -#define MCF_FEC1_IEEE_T_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x9A4C])) -#define MCF_FEC1_IEEE_T_1COL (*(volatile uint32_t*)(&_MBAR[0x9A50])) -#define MCF_FEC1_IEEE_T_MCOL (*(volatile uint32_t*)(&_MBAR[0x9A54])) -#define MCF_FEC1_IEEE_T_DEF (*(volatile uint32_t*)(&_MBAR[0x9A58])) -#define MCF_FEC1_IEEE_T_LCOL (*(volatile uint32_t*)(&_MBAR[0x9A5C])) -#define MCF_FEC1_IEEE_T_EXCOL (*(volatile uint32_t*)(&_MBAR[0x9A60])) -#define MCF_FEC1_IEEE_T_MACERR (*(volatile uint32_t*)(&_MBAR[0x9A64])) -#define MCF_FEC1_IEEE_T_CSERR (*(volatile uint32_t*)(&_MBAR[0x9A68])) -#define MCF_FEC1_IEEE_T_SQE (*(volatile uint32_t*)(&_MBAR[0x9A6C])) -#define MCF_FEC1_IEEE_T_FDXFC (*(volatile uint32_t*)(&_MBAR[0x9A70])) -#define MCF_FEC1_IEEE_T_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x9A74])) -#define MCF_FEC1_RMON_R_DROP (*(volatile uint32_t*)(&_MBAR[0x9A80])) -#define MCF_FEC1_RMON_R_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9A84])) -#define MCF_FEC1_RMON_R_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A88])) -#define MCF_FEC1_RMON_R_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A8C])) -#define MCF_FEC1_RMON_R_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9A90])) -#define MCF_FEC1_RMON_R_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A94])) -#define MCF_FEC1_RMON_R_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A98])) -#define MCF_FEC1_RMON_R_FRAG (*(volatile uint32_t*)(&_MBAR[0x9A9C])) -#define MCF_FEC1_RMON_R_JAB (*(volatile uint32_t*)(&_MBAR[0x9AA0])) -#define MCF_FEC1_RMON_R_RESVD_0 (*(volatile uint32_t*)(&_MBAR[0x9AA4])) -#define MCF_FEC1_RMON_R_P64 (*(volatile uint32_t*)(&_MBAR[0x9AA8])) -#define MCF_FEC1_RMON_R_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x9AAC])) -#define MCF_FEC1_RMON_R_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x9AB0])) -#define MCF_FEC1_RMON_R_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x9AB4])) -#define MCF_FEC1_RMON_R_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x9AB8])) -#define MCF_FEC1_RMON_R_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x9ABC])) -#define MCF_FEC1_RMON_R_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x9AC0])) -#define MCF_FEC1_RMON_R_OCTETS (*(volatile uint32_t*)(&_MBAR[0x9AC4])) -#define MCF_FEC1_IEEE_R_DROP (*(volatile uint32_t*)(&_MBAR[0x9AC8])) -#define MCF_FEC1_IEEE_R_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x9ACC])) -#define MCF_FEC1_IEEE_R_CRC (*(volatile uint32_t*)(&_MBAR[0x9AD0])) -#define MCF_FEC1_IEEE_R_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9AD4])) -#define MCF_FEC1_IEEE_R_MACERR (*(volatile uint32_t*)(&_MBAR[0x9AD8])) -#define MCF_FEC1_IEEE_R_FDXFC (*(volatile uint32_t*)(&_MBAR[0x9ADC])) -#define MCF_FEC1_IEEE_R_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x9AE0])) - -#define MCF_FEC_EIR(x) (*(volatile uint32_t*)(&_MBAR[0x9004 + ((x)*0x800)])) -#define MCF_FEC_EIMR(x) (*(volatile uint32_t*)(&_MBAR[0x9008 + ((x)*0x800)])) -#define MCF_FEC_ECR(x) (*(volatile uint32_t*)(&_MBAR[0x9024 + ((x)*0x800)])) -#define MCF_FEC_MMFR(x) (*(volatile uint32_t*)(&_MBAR[0x9040 + ((x)*0x800)])) -#define MCF_FEC_MSCR(x) (*(volatile uint32_t*)(&_MBAR[0x9044 + ((x)*0x800)])) -#define MCF_FEC_MIBC(x) (*(volatile uint32_t*)(&_MBAR[0x9064 + ((x)*0x800)])) -#define MCF_FEC_RCR(x) (*(volatile uint32_t*)(&_MBAR[0x9084 + ((x)*0x800)])) -#define MCF_FEC_RHR(x) (*(volatile uint32_t*)(&_MBAR[0x9088 + ((x)*0x800)])) -#define MCF_FEC_TCR(x) (*(volatile uint32_t*)(&_MBAR[0x90C4 + ((x)*0x800)])) -#define MCF_FEC_PALR(x) (*(volatile uint32_t*)(&_MBAR[0x90E4 + ((x)*0x800)])) -#define MCF_FEC_PAHR(x) (*(volatile uint32_t*)(&_MBAR[0x90E8 + ((x)*0x800)])) -#define MCF_FEC_OPD(x) (*(volatile uint32_t*)(&_MBAR[0x90EC + ((x)*0x800)])) -#define MCF_FEC_IAUR(x) (*(volatile uint32_t*)(&_MBAR[0x9118 + ((x)*0x800)])) -#define MCF_FEC_IALR(x) (*(volatile uint32_t*)(&_MBAR[0x911C + ((x)*0x800)])) -#define MCF_FEC_GAUR(x) (*(volatile uint32_t*)(&_MBAR[0x9120 + ((x)*0x800)])) -#define MCF_FEC_GALR(x) (*(volatile uint32_t*)(&_MBAR[0x9124 + ((x)*0x800)])) -#define MCF_FEC_FECTFWR(x) (*(volatile uint32_t*)(&_MBAR[0x9144 + ((x)*0x800)])) -#define MCF_FEC_FECRFDR(x) (*(volatile uint32_t*)(&_MBAR[0x9184 + ((x)*0x800)])) -#define MCF_FEC_FECRFSR(x) (*(volatile uint32_t*)(&_MBAR[0x9188 + ((x)*0x800)])) -#define MCF_FEC_FECRFCR(x) (*(volatile uint32_t*)(&_MBAR[0x918C + ((x)*0x800)])) -#define MCF_FEC_FECRLRFP(x) (*(volatile uint32_t*)(&_MBAR[0x9190 + ((x)*0x800)])) -#define MCF_FEC_FECRLWFP(x) (*(volatile uint32_t*)(&_MBAR[0x9194 + ((x)*0x800)])) -#define MCF_FEC_FECRFAR(x) (*(volatile uint32_t*)(&_MBAR[0x9198 + ((x)*0x800)])) -#define MCF_FEC_FECRFRP(x) (*(volatile uint32_t*)(&_MBAR[0x919C + ((x)*0x800)])) -#define MCF_FEC_FECRFWP(x) (*(volatile uint32_t*)(&_MBAR[0x91A0 + ((x)*0x800)])) -#define MCF_FEC_FECTFDR(x) (*(volatile uint32_t*)(&_MBAR[0x91A4 + ((x)*0x800)])) -#define MCF_FEC_FECTFSR(x) (*(volatile uint32_t*)(&_MBAR[0x91A8 + ((x)*0x800)])) -#define MCF_FEC_FECTFCR(x) (*(volatile uint32_t*)(&_MBAR[0x91AC + ((x)*0x800)])) -#define MCF_FEC_FECTLRFP(x) (*(volatile uint32_t*)(&_MBAR[0x91B0 + ((x)*0x800)])) -#define MCF_FEC_FECTLWFP(x) (*(volatile uint32_t*)(&_MBAR[0x91B4 + ((x)*0x800)])) -#define MCF_FEC_FECTFAR(x) (*(volatile uint32_t*)(&_MBAR[0x91B8 + ((x)*0x800)])) -#define MCF_FEC_FECTFRP(x) (*(volatile uint32_t*)(&_MBAR[0x91BC + ((x)*0x800)])) -#define MCF_FEC_FECTFWP(x) (*(volatile uint32_t*)(&_MBAR[0x91C0 + ((x)*0x800)])) -#define MCF_FEC_FECFRST(x) (*(volatile uint32_t*)(&_MBAR[0x91C4 + ((x)*0x800)])) -#define MCF_FEC_FECCTCWR(x) (*(volatile uint32_t*)(&_MBAR[0x91C8 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x9200 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_PACKETS(x) (*(volatile uint32_t*)(&_MBAR[0x9204 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_BC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x9208 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_MC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x920C + ((x)*0x800)])) -#define MCF_FEC_RMON_T_CRC_ALIGN(x) (*(volatile uint32_t*)(&_MBAR[0x9210 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_UNDERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9214 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_OVERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9218 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_FRAG(x) (*(volatile uint32_t*)(&_MBAR[0x921C + ((x)*0x800)])) -#define MCF_FEC_RMON_T_JAB(x) (*(volatile uint32_t*)(&_MBAR[0x9220 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_COL(x) (*(volatile uint32_t*)(&_MBAR[0x9224 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P64(x) (*(volatile uint32_t*)(&_MBAR[0x9228 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P65TO127(x) (*(volatile uint32_t*)(&_MBAR[0x922C + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P128TO255(x) (*(volatile uint32_t*)(&_MBAR[0x9230 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P256TO511(x) (*(volatile uint32_t*)(&_MBAR[0x9234 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P512TO1023(x) (*(volatile uint32_t*)(&_MBAR[0x9238 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P1024TO2047(x) (*(volatile uint32_t*)(&_MBAR[0x923C + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P_GTE2048(x) (*(volatile uint32_t*)(&_MBAR[0x9240 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_OCTETS(x) (*(volatile uint32_t*)(&_MBAR[0x9244 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x9248 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_FRAME_OK(x) (*(volatile uint32_t*)(&_MBAR[0x924C + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_1COL(x) (*(volatile uint32_t*)(&_MBAR[0x9250 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_MCOL(x) (*(volatile uint32_t*)(&_MBAR[0x9254 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_DEF(x) (*(volatile uint32_t*)(&_MBAR[0x9258 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_LCOL(x) (*(volatile uint32_t*)(&_MBAR[0x925C + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_EXCOL(x) (*(volatile uint32_t*)(&_MBAR[0x9260 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_MACERR(x) (*(volatile uint32_t*)(&_MBAR[0x9264 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_CSERR(x) (*(volatile uint32_t*)(&_MBAR[0x9268 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_SQE(x) (*(volatile uint32_t*)(&_MBAR[0x926C + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_FDXFC(x) (*(volatile uint32_t*)(&_MBAR[0x9270 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_OCTETS_OK(x) (*(volatile uint32_t*)(&_MBAR[0x9274 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x9280 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_PACKETS(x) (*(volatile uint32_t*)(&_MBAR[0x9284 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_BC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x9288 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_MC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x928C + ((x)*0x800)])) -#define MCF_FEC_RMON_R_CRC_ALIGN(x) (*(volatile uint32_t*)(&_MBAR[0x9290 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_UNDERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9294 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_OVERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9298 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_FRAG(x) (*(volatile uint32_t*)(&_MBAR[0x929C + ((x)*0x800)])) -#define MCF_FEC_RMON_R_JAB(x) (*(volatile uint32_t*)(&_MBAR[0x92A0 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_RESVD_0(x) (*(volatile uint32_t*)(&_MBAR[0x92A4 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P64(x) (*(volatile uint32_t*)(&_MBAR[0x92A8 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P65TO127(x) (*(volatile uint32_t*)(&_MBAR[0x92AC + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P128TO255(x) (*(volatile uint32_t*)(&_MBAR[0x92B0 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P256TO511(x) (*(volatile uint32_t*)(&_MBAR[0x92B4 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P512TO1023(x) (*(volatile uint32_t*)(&_MBAR[0x92B8 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P1024TO2047(x) (*(volatile uint32_t*)(&_MBAR[0x92BC + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P_GTE2048(x) (*(volatile uint32_t*)(&_MBAR[0x92C0 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_OCTETS(x) (*(volatile uint32_t*)(&_MBAR[0x92C4 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x92C8 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_FRAME_OK(x) (*(volatile uint32_t*)(&_MBAR[0x92CC + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_CRC(x) (*(volatile uint32_t*)(&_MBAR[0x92D0 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_ALIGN(x) (*(volatile uint32_t*)(&_MBAR[0x92D4 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_MACERR(x) (*(volatile uint32_t*)(&_MBAR[0x92D8 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_FDXFC(x) (*(volatile uint32_t*)(&_MBAR[0x92DC + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_OCTETS_OK(x) (*(volatile uint32_t*)(&_MBAR[0x92E0 + ((x)*0x800)])) - - -/* Bit definitions and macros for MCF_FEC_EIR */ -#define MCF_FEC_EIR_RFERR (0x20000) -#define MCF_FEC_EIR_XFERR (0x40000) -#define MCF_FEC_EIR_XFUN (0x80000) -#define MCF_FEC_EIR_RL (0x100000) -#define MCF_FEC_EIR_LC (0x200000) -#define MCF_FEC_EIR_MII (0x800000) -#define MCF_FEC_EIR_TXF (0x8000000) -#define MCF_FEC_EIR_GRA (0x10000000) -#define MCF_FEC_EIR_BABT (0x20000000) -#define MCF_FEC_EIR_BABR (0x40000000) -#define MCF_FEC_EIR_HBERR (0x80000000) -#define MCF_FEC_EIR_CLEAR_ALL (0xFFFFFFFF) - -/* Bit definitions and macros for MCF_FEC_EIMR */ -#define MCF_FEC_EIMR_RFERR (0x20000) -#define MCF_FEC_EIMR_XFERR (0x40000) -#define MCF_FEC_EIMR_XFUN (0x80000) -#define MCF_FEC_EIMR_RL (0x100000) -#define MCF_FEC_EIMR_LC (0x200000) -#define MCF_FEC_EIMR_MII (0x800000) -#define MCF_FEC_EIMR_TXF (0x8000000) -#define MCF_FEC_EIMR_GRA (0x10000000) -#define MCF_FEC_EIMR_BABT (0x20000000) -#define MCF_FEC_EIMR_BABR (0x40000000) -#define MCF_FEC_EIMR_HBERR (0x80000000) -#define MCF_FEC_EIMR_MASK_ALL (0) -#define MCF_FEC_EIMR_UNMASK_ALL (0xFFFFFFFF) - -/* Bit definitions and macros for MCF_FEC_ECR */ -#define MCF_FEC_ECR_RESET (0x1) -#define MCF_FEC_ECR_ETHER_EN (0x2) - -/* Bit definitions and macros for MCF_FEC_MMFR */ -#define MCF_FEC_MMFR_DATA(x) (((x)&0xFFFF)<<0) -#define MCF_FEC_MMFR_TA(x) (((x)&0x3)<<0x10) -#define MCF_FEC_MMFR_TA_10 (0x20000) -#define MCF_FEC_MMFR_RA(x) (((x)&0x1F)<<0x12) -#define MCF_FEC_MMFR_PA(x) (((x)&0x1F)<<0x17) -#define MCF_FEC_MMFR_OP(x) (((x)&0x3)<<0x1C) -#define MCF_FEC_MMFR_OP_READ (0x20000000) -#define MCF_FEC_MMFR_OP_WRITE (0x10000000) -#define MCF_FEC_MMFR_ST(x) (((x)&0x3)<<0x1E) -#define MCF_FEC_MMFR_ST_01 (0x40000000) - -/* Bit definitions and macros for MCF_FEC_MSCR */ -#define MCF_FEC_MSCR_MII_SPEED(x) (((x)&0x3F)<<0x1) -#define MCF_FEC_MSCR_DIS_PREAMBLE (0x80) -#define MCF_FEC_MSCR_MII_SPEED_133 (0x1B<<0x1) -#define MCF_FEC_MSCR_MII_SPEED_120 (0x18<<0x1) -#define MCF_FEC_MSCR_MII_SPEED_66 (0xE<<0x1) -#define MCF_FEC_MSCR_MII_SPEED_60 (0xC<<0x1) - -/* Bit definitions and macros for MCF_FEC_MIBC */ -#define MCF_FEC_MIBC_MIB_IDLE (0x40000000) -#define MCF_FEC_MIBC_MIB_DISABLE (0x80000000) - -/* Bit definitions and macros for MCF_FEC_RCR */ -#define MCF_FEC_RCR_LOOP (0x1) -#define MCF_FEC_RCR_DRT (0x2) -#define MCF_FEC_RCR_MII_MODE (0x4) -#define MCF_FEC_RCR_PROM (0x8) -#define MCF_FEC_RCR_BC_REJ (0x10) -#define MCF_FEC_RCR_FCE (0x20) -#define MCF_FEC_RCR_MAX_FL(x) (((x)&0x7FF)<<0x10) - -/* Bit definitions and macros for MCF_FEC_RHR */ -#define MCF_FEC_RHR_HASH(x) (((x)&0x3F)<<0x18) -#define MCF_FEC_RHR_MULTCAST (0x40000000) -#define MCF_FEC_RHR_FCE (0x80000000) - -/* Bit definitions and macros for MCF_FEC_TCR */ -#define MCF_FEC_TCR_GTS (0x1) -#define MCF_FEC_TCR_HBC (0x2) -#define MCF_FEC_TCR_FDEN (0x4) -#define MCF_FEC_TCR_TFC_PAUSE (0x8) -#define MCF_FEC_TCR_RFC_PAUSE (0x10) - -/* Bit definitions and macros for MCF_FEC_PALR */ -#define MCF_FEC_PALR_PADDR1(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_PAHR */ -#define MCF_FEC_PAHR_TYPE(x) (((x)&0xFFFF)<<0) -#define MCF_FEC_PAHR_PADDR2(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_FEC_OPD */ -#define MCF_FEC_OPD_PAUSE_DUR(x) (((x)&0xFFFF)<<0) -#define MCF_FEC_OPD_OPCODE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_FEC_IAUR */ -#define MCF_FEC_IAUR_IADDR1(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IALR */ -#define MCF_FEC_IALR_IADDR2(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_GAUR */ -#define MCF_FEC_GAUR_GADDR1(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_GALR */ -#define MCF_FEC_GALR_GADDR2(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFWR */ -#define MCF_FEC_FECTFWR_X_WMRK(x) (((x)&0xF)<<0) -#define MCF_FEC_FECTFWR_X_WMRK_64 (0) -#define MCF_FEC_FECTFWR_X_WMRK_128 (0x1) -#define MCF_FEC_FECTFWR_X_WMRK_192 (0x2) -#define MCF_FEC_FECTFWR_X_WMRK_256 (0x3) -#define MCF_FEC_FECTFWR_X_WMRK_320 (0x4) -#define MCF_FEC_FECTFWR_X_WMRK_384 (0x5) -#define MCF_FEC_FECTFWR_X_WMRK_448 (0x6) -#define MCF_FEC_FECTFWR_X_WMRK_512 (0x7) -#define MCF_FEC_FECTFWR_X_WMRK_576 (0x8) -#define MCF_FEC_FECTFWR_X_WMRK_640 (0x9) -#define MCF_FEC_FECTFWR_X_WMRK_704 (0xA) -#define MCF_FEC_FECTFWR_X_WMRK_768 (0xB) -#define MCF_FEC_FECTFWR_X_WMRK_832 (0xC) -#define MCF_FEC_FECTFWR_X_WMRK_896 (0xD) -#define MCF_FEC_FECTFWR_X_WMRK_960 (0xE) -#define MCF_FEC_FECTFWR_X_WMRK_1024 (0xF) - -/* Bit definitions and macros for MCF_FEC_FECRFDR */ -#define MCF_FEC_FECRFDR_FIFO_DATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRFSR */ -#define MCF_FEC_FECRFSR_EMT (0x10000) -#define MCF_FEC_FECRFSR_ALARM (0x20000) -#define MCF_FEC_FECRFSR_FU (0x40000) -#define MCF_FEC_FECRFSR_FRMRDY (0x80000) -#define MCF_FEC_FECRFSR_OF (0x100000) -#define MCF_FEC_FECRFSR_UF (0x200000) -#define MCF_FEC_FECRFSR_RXW (0x400000) -#define MCF_FEC_FECRFSR_FAE (0x800000) -#define MCF_FEC_FECRFSR_FRM(x) (((x)&0xF)<<0x18) -#define MCF_FEC_FECRFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_FEC_FECRFCR */ -#define MCF_FEC_FECRFCR_COUNTER(x) (((x)&0xFFFF)<<0) -#define MCF_FEC_FECRFCR_OF_MSK (0x80000) -#define MCF_FEC_FECRFCR_UF_MSK (0x100000) -#define MCF_FEC_FECRFCR_RXW_MSK (0x200000) -#define MCF_FEC_FECRFCR_FAE_MSK (0x400000) -#define MCF_FEC_FECRFCR_IP_MSK (0x800000) -#define MCF_FEC_FECRFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_FEC_FECRFCR_FRMEN (0x8000000) -#define MCF_FEC_FECRFCR_TIMER (0x10000000) - -/* Bit definitions and macros for MCF_FEC_FECRLRFP */ -#define MCF_FEC_FECRLRFP_LRFP(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRLWFP */ -#define MCF_FEC_FECRLWFP_LWFP(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRFAR */ -#define MCF_FEC_FECRFAR_ALARM(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRFRP */ -#define MCF_FEC_FECRFRP_READ(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRFWP */ -#define MCF_FEC_FECRFWP_WRITE(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFDR */ -#define MCF_FEC_FECTFDR_FIFO_DATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFSR */ -#define MCF_FEC_FECTFSR_EMT (0x10000) -#define MCF_FEC_FECTFSR_ALARM (0x20000) -#define MCF_FEC_FECTFSR_FU (0x40000) -#define MCF_FEC_FECTFSR_FRMRDY (0x80000) -#define MCF_FEC_FECTFSR_OF (0x100000) -#define MCF_FEC_FECTFSR_UF (0x200000) -#define MCF_FEC_FECTFSR_FAE (0x800000) -#define MCF_FEC_FECTFSR_FRM(x) (((x)&0xF)<<0x18) -#define MCF_FEC_FECTFSR_TXW (0x40000000) -#define MCF_FEC_FECTFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_FEC_FECTFCR */ -#define MCF_FEC_FECTFCR_RESERVED (0x200000) -#define MCF_FEC_FECTFCR_COUNTER(x) (((x)&0xFFFF)<<0|0x200000) -#define MCF_FEC_FECTFCR_TXW_MASK (0x240000) -#define MCF_FEC_FECTFCR_OF_MSK (0x280000) -#define MCF_FEC_FECTFCR_UF_MSK (0x300000) -#define MCF_FEC_FECTFCR_FAE_MSK (0x600000) -#define MCF_FEC_FECTFCR_IP_MSK (0xA00000) -#define MCF_FEC_FECTFCR_GR(x) (((x)&0x7)<<0x18|0x200000) -#define MCF_FEC_FECTFCR_FRMEN (0x8200000) -#define MCF_FEC_FECTFCR_TIMER (0x10200000) -#define MCF_FEC_FECTFCR_WFR (0x20200000) -#define MCF_FEC_FECTFCR_WCTL (0x40200000) - -/* Bit definitions and macros for MCF_FEC_FECTLRFP */ -#define MCF_FEC_FECTLRFP_LRFP(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTLWFP */ -#define MCF_FEC_FECTLWFP_LWFP(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFAR */ -#define MCF_FEC_FECTFAR_ALARM(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFRP */ -#define MCF_FEC_FECTFRP_READ(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFWP */ -#define MCF_FEC_FECTFWP_WRITE(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECFRST */ -#define MCF_FEC_FECFRST_RST_CTL (0x1000000) -#define MCF_FEC_FECFRST_SW_RST (0x2000000) - -/* Bit definitions and macros for MCF_FEC_FECCTCWR */ -#define MCF_FEC_FECCTCWR_TFCW (0x1000000) -#define MCF_FEC_FECCTCWR_CRC (0x2000000) - -/* Bit definitions and macros for MCF_FEC_RMON_T_DROP */ -#define MCF_FEC_RMON_T_DROP_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_PACKETS */ -#define MCF_FEC_RMON_T_PACKETS_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_BC_PKT */ -#define MCF_FEC_RMON_T_BC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_MC_PKT */ -#define MCF_FEC_RMON_T_MC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_CRC_ALIGN */ -#define MCF_FEC_RMON_T_CRC_ALIGN_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_UNDERSIZE */ -#define MCF_FEC_RMON_T_UNDERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_OVERSIZE */ -#define MCF_FEC_RMON_T_OVERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_FRAG */ -#define MCF_FEC_RMON_T_FRAG_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_JAB */ -#define MCF_FEC_RMON_T_JAB_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_COL */ -#define MCF_FEC_RMON_T_COL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P64 */ -#define MCF_FEC_RMON_T_P64_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P65TO127 */ -#define MCF_FEC_RMON_T_P65TO127_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P128TO255 */ -#define MCF_FEC_RMON_T_P128TO255_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P256TO511 */ -#define MCF_FEC_RMON_T_P256TO511_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P512TO1023 */ -#define MCF_FEC_RMON_T_P512TO1023_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P1024TO2047 */ -#define MCF_FEC_RMON_T_P1024TO2047_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P_GTE2048 */ -#define MCF_FEC_RMON_T_P_GTE2048_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_OCTETS */ -#define MCF_FEC_RMON_T_OCTETS_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_DROP */ -#define MCF_FEC_IEEE_T_DROP_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_FRAME_OK */ -#define MCF_FEC_IEEE_T_FRAME_OK_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_1COL */ -#define MCF_FEC_IEEE_T_1COL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_MCOL */ -#define MCF_FEC_IEEE_T_MCOL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_DEF */ -#define MCF_FEC_IEEE_T_DEF_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_LCOL */ -#define MCF_FEC_IEEE_T_LCOL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_EXCOL */ -#define MCF_FEC_IEEE_T_EXCOL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_MACERR */ -#define MCF_FEC_IEEE_T_MACERR_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_CSERR */ -#define MCF_FEC_IEEE_T_CSERR_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_SQE */ -#define MCF_FEC_IEEE_T_SQE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_FDXFC */ -#define MCF_FEC_IEEE_T_FDXFC_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_OCTETS_OK */ -#define MCF_FEC_IEEE_T_OCTETS_OK_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_DROP */ -#define MCF_FEC_RMON_R_DROP_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_PACKETS */ -#define MCF_FEC_RMON_R_PACKETS_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_BC_PKT */ -#define MCF_FEC_RMON_R_BC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_MC_PKT */ -#define MCF_FEC_RMON_R_MC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_CRC_ALIGN */ -#define MCF_FEC_RMON_R_CRC_ALIGN_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_UNDERSIZE */ -#define MCF_FEC_RMON_R_UNDERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_OVERSIZE */ -#define MCF_FEC_RMON_R_OVERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_FRAG */ -#define MCF_FEC_RMON_R_FRAG_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_JAB */ -#define MCF_FEC_RMON_R_JAB_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_RESVD_0 */ -#define MCF_FEC_RMON_R_RESVD_0_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P64 */ -#define MCF_FEC_RMON_R_P64_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P65TO127 */ -#define MCF_FEC_RMON_R_P65TO127_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P128TO255 */ -#define MCF_FEC_RMON_R_P128TO255_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P256TO511 */ -#define MCF_FEC_RMON_R_P256TO511_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P512TO1023 */ -#define MCF_FEC_RMON_R_P512TO1023_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P1024TO2047 */ -#define MCF_FEC_RMON_R_P1024TO2047_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P_GTE2048 */ -#define MCF_FEC_RMON_R_P_GTE2048_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_OCTETS */ -#define MCF_FEC_RMON_R_OCTETS_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_DROP */ -#define MCF_FEC_IEEE_R_DROP_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_FRAME_OK */ -#define MCF_FEC_IEEE_R_FRAME_OK_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_CRC */ -#define MCF_FEC_IEEE_R_CRC_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_ALIGN */ -#define MCF_FEC_IEEE_R_ALIGN_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_MACERR */ -#define MCF_FEC_IEEE_R_MACERR_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_FDXFC */ -#define MCF_FEC_IEEE_R_FDXFC_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_OCTETS_OK */ -#define MCF_FEC_IEEE_R_OCTETS_OK_Value(x) (((x)&0xFFFFFFFF)<<0) - - -#endif /* __MCF5475_FEC_H__ */ diff --git a/include/MCF5475_GPIO.h b/include/MCF5475_GPIO.h deleted file mode 100644 index 5dd2583..0000000 --- a/include/MCF5475_GPIO.h +++ /dev/null @@ -1,543 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_GPIO_H__ -#define __MCF5475_GPIO_H__ - - -/********************************************************************* -* -* General Purpose I/O (GPIO) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_GPIO_PODR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA00])) -#define MCF_GPIO_PDDR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA10])) -#define MCF_GPIO_PPDSDR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA20])) -#define MCF_GPIO_PCLRR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA30])) - -#define MCF_GPIO_PODR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA01])) -#define MCF_GPIO_PDDR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA11])) -#define MCF_GPIO_PPDSDR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA21])) -#define MCF_GPIO_PCLRR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA31])) - -#define MCF_GPIO_PODR_DMA (*(volatile uint8_t *)(&_MBAR[0xA02])) -#define MCF_GPIO_PDDR_DMA (*(volatile uint8_t *)(&_MBAR[0xA12])) -#define MCF_GPIO_PPDSDR_DMA (*(volatile uint8_t *)(&_MBAR[0xA22])) -#define MCF_GPIO_PCLRR_DMA (*(volatile uint8_t *)(&_MBAR[0xA32])) - -#define MCF_GPIO_PODR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA04])) -#define MCF_GPIO_PDDR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA14])) -#define MCF_GPIO_PPDSDR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA24])) -#define MCF_GPIO_PCLRR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA34])) - -#define MCF_GPIO_PODR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA05])) -#define MCF_GPIO_PDDR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA15])) -#define MCF_GPIO_PPDSDR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA25])) -#define MCF_GPIO_PCLRR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA35])) - -#define MCF_GPIO_PODR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA06])) -#define MCF_GPIO_PDDR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA16])) -#define MCF_GPIO_PPDSDR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA26])) -#define MCF_GPIO_PCLRR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA36])) - -#define MCF_GPIO_PODR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA07])) -#define MCF_GPIO_PDDR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA17])) -#define MCF_GPIO_PPDSDR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA27])) -#define MCF_GPIO_PCLRR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA37])) - -#define MCF_GPIO_PODR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA08])) -#define MCF_GPIO_PDDR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA18])) -#define MCF_GPIO_PPDSDR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA28])) -#define MCF_GPIO_PCLRR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA38])) - -#define MCF_GPIO_PODR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA09])) -#define MCF_GPIO_PDDR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA19])) -#define MCF_GPIO_PPDSDR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA29])) -#define MCF_GPIO_PCLRR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA39])) - -#define MCF_GPIO_PODR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA0A])) -#define MCF_GPIO_PDDR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA1A])) -#define MCF_GPIO_PPDSDR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA2A])) -#define MCF_GPIO_PCLRR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA3A])) - -#define MCF_GPIO2_PODR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA0C])) -#define MCF_GPIO2_PDDR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA1C])) -#define MCF_GPIO2_PPDSDR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA2C])) -#define MCF_GPIO2_PCLRR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA3C])) - -#define MCF_GPIO0_PODR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA0D])) -#define MCF_GPIO0_PDDR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA1D])) -#define MCF_GPIO0_PPDSDR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA2D])) -#define MCF_GPIO0_PCLRR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA3D])) - -#define MCF_GPIO_PODR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA0E])) -#define MCF_GPIO_PDDR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA1E])) -#define MCF_GPIO_PPDSDR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA2E])) -#define MCF_GPIO_PCLRR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA3E])) - - - -/* Bit definitions and macros for MCF_GPIO_PODR_FBCTL */ -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL0 (0x1) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL1 (0x2) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL2 (0x4) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL3 (0x8) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL4 (0x10) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL5 (0x20) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL6 (0x40) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FBCTL */ -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL0 (0x1) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL1 (0x2) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL2 (0x4) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL3 (0x8) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL4 (0x10) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL5 (0x20) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL6 (0x40) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FBCTL */ -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL0 (0x1) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL1 (0x2) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL2 (0x4) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL3 (0x8) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL4 (0x10) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL5 (0x20) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL6 (0x40) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FBCTL */ -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL0 (0x1) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL1 (0x2) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL2 (0x4) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL3 (0x8) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL4 (0x10) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL5 (0x20) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL6 (0x40) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FBCS */ -#define MCF_GPIO_PODR_FBCS_PODR_FBCS1 (0x2) -#define MCF_GPIO_PODR_FBCS_PODR_FBCS2 (0x4) -#define MCF_GPIO_PODR_FBCS_PODR_FBCS3 (0x8) -#define MCF_GPIO_PODR_FBCS_PODR_FBCS4 (0x10) -#define MCF_GPIO_PODR_FBCS_PODR_FBCS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FBCS */ -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS1 (0x2) -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS2 (0x4) -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS3 (0x8) -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS4 (0x10) -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FBCS */ -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS1 (0x2) -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS2 (0x4) -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS3 (0x8) -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS4 (0x10) -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FBCS */ -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS1 (0x2) -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS2 (0x4) -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS3 (0x8) -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS4 (0x10) -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PODR_DMA */ -#define MCF_GPIO_PODR_DMA_PODR_DMA0 (0x1) -#define MCF_GPIO_PODR_DMA_PODR_DMA1 (0x2) -#define MCF_GPIO_PODR_DMA_PODR_DMA2 (0x4) -#define MCF_GPIO_PODR_DMA_PODR_DMA3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DMA */ -#define MCF_GPIO_PDDR_DMA_PDDR_DMA0 (0x1) -#define MCF_GPIO_PDDR_DMA_PDDR_DMA1 (0x2) -#define MCF_GPIO_PDDR_DMA_PDDR_DMA2 (0x4) -#define MCF_GPIO_PDDR_DMA_PDDR_DMA3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DMA */ -#define MCF_GPIO_PPDSDR_DMA_PPDSDR_DMA0 (0x1) -#define MCF_GPIO_PPDSDR_DMA_PPDSDR_DMA1 (0x2) -#define MCF_GPIO_PPDSDR_DMA_PPDSDR_DMA2 (0x4) -#define MCF_GPIO_PPDSDR_DMA_PPDSDR_DMA3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DMA */ -#define MCF_GPIO_PCLRR_DMA_PCLRR_DMA0 (0x1) -#define MCF_GPIO_PCLRR_DMA_PCLRR_DMA1 (0x2) -#define MCF_GPIO_PCLRR_DMA_PCLRR_DMA2 (0x4) -#define MCF_GPIO_PCLRR_DMA_PCLRR_DMA3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PODR_FEC0H */ -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H0 (0x1) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H1 (0x2) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H2 (0x4) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H3 (0x8) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H4 (0x10) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H5 (0x20) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H6 (0x40) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FEC0H */ -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H0 (0x1) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H1 (0x2) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H2 (0x4) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H3 (0x8) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H4 (0x10) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H5 (0x20) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H6 (0x40) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FEC0H */ -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H0 (0x1) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H1 (0x2) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H2 (0x4) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H3 (0x8) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H4 (0x10) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H5 (0x20) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H6 (0x40) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FEC0H */ -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H0 (0x1) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H1 (0x2) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H2 (0x4) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H3 (0x8) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H4 (0x10) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H5 (0x20) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H6 (0x40) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FEC0L */ -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L0 (0x1) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L1 (0x2) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L2 (0x4) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L3 (0x8) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L4 (0x10) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L5 (0x20) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L6 (0x40) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FEC0L */ -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L0 (0x1) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L1 (0x2) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L2 (0x4) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L3 (0x8) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L4 (0x10) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L5 (0x20) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L6 (0x40) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FEC0L */ -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L0 (0x1) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L1 (0x2) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L2 (0x4) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L3 (0x8) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L4 (0x10) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L5 (0x20) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L6 (0x40) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FEC0L */ -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L0 (0x1) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L1 (0x2) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L2 (0x4) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L3 (0x8) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L4 (0x10) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L5 (0x20) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L6 (0x40) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FEC1H */ -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H0 (0x1) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H1 (0x2) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H2 (0x4) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H3 (0x8) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H4 (0x10) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H5 (0x20) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H6 (0x40) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FEC1H */ -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H0 (0x1) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H1 (0x2) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H2 (0x4) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H3 (0x8) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H4 (0x10) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H5 (0x20) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H6 (0x40) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FEC1H */ -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H0 (0x1) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H1 (0x2) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H2 (0x4) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H3 (0x8) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H4 (0x10) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H5 (0x20) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H6 (0x40) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FEC1H */ -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H0 (0x1) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H1 (0x2) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H2 (0x4) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H3 (0x8) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H4 (0x10) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H5 (0x20) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H6 (0x40) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FEC1L */ -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L0 (0x1) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L1 (0x2) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L2 (0x4) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L3 (0x8) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L4 (0x10) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L5 (0x20) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L6 (0x40) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FEC1L */ -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L0 (0x1) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L1 (0x2) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L2 (0x4) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L3 (0x8) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4 (0x10) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L5 (0x20) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L6 (0x40) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FEC1L */ -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L0 (0x1) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L1 (0x2) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L2 (0x4) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L3 (0x8) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L4 (0x10) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L5 (0x20) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L6 (0x40) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FEC1L */ -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L0 (0x1) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L1 (0x2) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L2 (0x4) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L3 (0x8) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L4 (0x10) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L5 (0x20) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L6 (0x40) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FECI2C */ -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C0 (0x1) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C1 (0x2) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C2 (0x4) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FECI2C */ -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0 (0x1) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1 (0x2) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C2 (0x4) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECI2C */ -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C0 (0x1) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C1 (0x2) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C2 (0x4) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FECI2C */ -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C0 (0x1) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C1 (0x2) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C2 (0x4) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PODR_PCIBG */ -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG0 (0x1) -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG1 (0x2) -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG2 (0x4) -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG3 (0x8) -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PCIBG */ -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG0 (0x1) -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG1 (0x2) -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG2 (0x4) -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG3 (0x8) -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PCIBG */ -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG0 (0x1) -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG1 (0x2) -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG2 (0x4) -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG3 (0x8) -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PCIBG */ -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG0 (0x1) -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG1 (0x2) -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG2 (0x4) -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG3 (0x8) -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PODR_PCIBR */ -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR0 (0x1) -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR1 (0x2) -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR2 (0x4) -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR3 (0x8) -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PCIBR */ -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR0 (0x1) -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR1 (0x2) -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR2 (0x4) -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR3 (0x8) -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PCIBR */ -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR0 (0x1) -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR1 (0x2) -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR2 (0x4) -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR3 (0x8) -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PCIBR */ -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR0 (0x1) -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR1 (0x2) -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR2 (0x4) -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR3 (0x8) -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PODR_PSC3PSC */ -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC20 (0x1) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC21 (0x2) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC22 (0x4) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC23 (0x8) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC24 (0x10) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC25 (0x20) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC26 (0x40) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC27 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PSC3PSC */ -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC20 (0x1) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC21 (0x2) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC22 (0x4) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC23 (0x8) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC24 (0x10) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC25 (0x20) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC26 (0x40) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC27 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PSC3PSC */ -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC20 (0x1) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC21 (0x2) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC22 (0x4) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC23 (0x8) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC24 (0x10) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC25 (0x20) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC26 (0x40) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC27 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PSC3PSC */ -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC20 (0x1) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC21 (0x2) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC22 (0x4) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC23 (0x8) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC24 (0x10) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC25 (0x20) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC26 (0x40) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC27 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_PSC1PSC */ -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC00 (0x1) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC01 (0x2) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC02 (0x4) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC03 (0x8) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC04 (0x10) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC05 (0x20) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC06 (0x40) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC07 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PSC1PSC */ -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC00 (0x1) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC01 (0x2) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC02 (0x4) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC03 (0x8) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC04 (0x10) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC05 (0x20) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC06 (0x40) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC07 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PSC1PSC */ -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC00 (0x1) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC01 (0x2) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC02 (0x4) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC03 (0x8) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC04 (0x10) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC05 (0x20) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC06 (0x40) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC07 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PSC1PSC */ -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC00 (0x1) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC01 (0x2) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC02 (0x4) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC03 (0x8) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC04 (0x10) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC05 (0x20) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC06 (0x40) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC07 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_DSPI */ -#define MCF_GPIO_PODR_DSPI_PODR_DSPI0 (0x1) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI1 (0x2) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI2 (0x4) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI3 (0x8) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI4 (0x10) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI5 (0x20) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI6 (0x40) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DSPI */ -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI0 (0x1) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI1 (0x2) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI2 (0x4) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI3 (0x8) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI4 (0x10) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI5 (0x20) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI6 (0x40) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DSPI */ -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI0 (0x1) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI1 (0x2) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI2 (0x4) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI3 (0x8) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI4 (0x10) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI5 (0x20) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI6 (0x40) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DSPI */ -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI0 (0x1) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI1 (0x2) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI2 (0x4) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI3 (0x8) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI4 (0x10) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI5 (0x20) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI6 (0x40) - - -#endif /* __MCF5475_GPIO_H__ */ diff --git a/include/MCF5475_GPT.h b/include/MCF5475_GPT.h deleted file mode 100644 index f9fbc98..0000000 --- a/include/MCF5475_GPT.h +++ /dev/null @@ -1,100 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_GPT_H__ -#define __MCF5475_GPT_H__ - - -/********************************************************************* -* -* General Purpose Timers (GPT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_GPT0_GMS (*(volatile uint32_t*)(&_MBAR[0x800])) -#define MCF_GPT0_GCIR (*(volatile uint32_t*)(&_MBAR[0x804])) -#define MCF_GPT0_GPWM (*(volatile uint32_t*)(&_MBAR[0x808])) -#define MCF_GPT0_GSR (*(volatile uint32_t*)(&_MBAR[0x80C])) - -#define MCF_GPT1_GMS (*(volatile uint32_t*)(&_MBAR[0x810])) -#define MCF_GPT1_GCIR (*(volatile uint32_t*)(&_MBAR[0x814])) -#define MCF_GPT1_GPWM (*(volatile uint32_t*)(&_MBAR[0x818])) -#define MCF_GPT1_GSR (*(volatile uint32_t*)(&_MBAR[0x81C])) - -#define MCF_GPT2_GMS (*(volatile uint32_t*)(&_MBAR[0x820])) -#define MCF_GPT2_GCIR (*(volatile uint32_t*)(&_MBAR[0x824])) -#define MCF_GPT2_GPWM (*(volatile uint32_t*)(&_MBAR[0x828])) -#define MCF_GPT2_GSR (*(volatile uint32_t*)(&_MBAR[0x82C])) - -#define MCF_GPT3_GMS (*(volatile uint32_t*)(&_MBAR[0x830])) -#define MCF_GPT3_GCIR (*(volatile uint32_t*)(&_MBAR[0x834])) -#define MCF_GPT3_GPWM (*(volatile uint32_t*)(&_MBAR[0x838])) -#define MCF_GPT3_GSR (*(volatile uint32_t*)(&_MBAR[0x83C])) - -#define MCF_GPT_GMS(x) (*(volatile uint32_t*)(&_MBAR[0x800 + ((x)*0x10)])) -#define MCF_GPT_GCIR(x) (*(volatile uint32_t*)(&_MBAR[0x804 + ((x)*0x10)])) -#define MCF_GPT_GPWM(x) (*(volatile uint32_t*)(&_MBAR[0x808 + ((x)*0x10)])) -#define MCF_GPT_GSR(x) (*(volatile uint32_t*)(&_MBAR[0x80C + ((x)*0x10)])) - - -/* Bit definitions and macros for MCF_GPT_GMS */ -#define MCF_GPT_GMS_TMS(x) (((x)&0x7)<<0) -#define MCF_GPT_GMS_TMS_DISABLE (0) -#define MCF_GPT_GMS_TMS_INCAPT (0x1) -#define MCF_GPT_GMS_TMS_OUTCAPT (0x2) -#define MCF_GPT_GMS_TMS_PWM (0x3) -#define MCF_GPT_GMS_TMS_GPIO (0x4) -#define MCF_GPT_GMS_GPIO(x) (((x)&0x3)<<0x4) -#define MCF_GPT_GMS_GPIO_INPUT (0) -#define MCF_GPT_GMS_GPIO_OUTLO (0x20) -#define MCF_GPT_GMS_GPIO_OUTHI (0x30) -#define MCF_GPT_GMS_IEN (0x100) -#define MCF_GPT_GMS_OD (0x200) -#define MCF_GPT_GMS_SC (0x400) -#define MCF_GPT_GMS_CE (0x1000) -#define MCF_GPT_GMS_WDEN (0x8000) -#define MCF_GPT_GMS_ICT(x) (((x)&0x3)<<0x10) -#define MCF_GPT_GMS_ICT_ANY (0) -#define MCF_GPT_GMS_ICT_RISE (0x10000) -#define MCF_GPT_GMS_ICT_FALL (0x20000) -#define MCF_GPT_GMS_ICT_PULSE (0x30000) -#define MCF_GPT_GMS_OCT(x) (((x)&0x3)<<0x14) -#define MCF_GPT_GMS_OCT_FRCLOW (0) -#define MCF_GPT_GMS_OCT_PULSEHI (0x100000) -#define MCF_GPT_GMS_OCT_PULSELO (0x200000) -#define MCF_GPT_GMS_OCT_TOGGLE (0x300000) -#define MCF_GPT_GMS_OCPW(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_GPT_GCIR */ -#define MCF_GPT_GCIR_CNT(x) (((x)&0xFFFF)<<0) -#define MCF_GPT_GCIR_PRE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_GPT_GPWM */ -#define MCF_GPT_GPWM_LOAD (0x1) -#define MCF_GPT_GPWM_PWMOP (0x100) -#define MCF_GPT_GPWM_WIDTH(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_GPT_GSR */ -#define MCF_GPT_GSR_CAPT (0x1) -#define MCF_GPT_GSR_COMP (0x2) -#define MCF_GPT_GSR_PWMP (0x4) -#define MCF_GPT_GSR_TEXP (0x8) -#define MCF_GPT_GSR_PIN (0x100) -#define MCF_GPT_GSR_OVF(x) (((x)&0x7)<<0xC) -#define MCF_GPT_GSR_CAPTURE(x) (((x)&0xFFFF)<<0x10) - - -#endif /* __MCF5475_GPT_H__ */ diff --git a/include/MCF5475_I2C.h b/include/MCF5475_I2C.h deleted file mode 100644 index 1e8a85b..0000000 --- a/include/MCF5475_I2C.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_I2C_H__ -#define __MCF5475_I2C_H__ - - -/********************************************************************* -* -* I2C Module (I2C) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_I2C_I2ADR (*(volatile uint8_t *)(&_MBAR[0x8F00])) -#define MCF_I2C_I2FDR (*(volatile uint8_t *)(&_MBAR[0x8F04])) -#define MCF_I2C_I2CR (*(volatile uint8_t *)(&_MBAR[0x8F08])) -#define MCF_I2C_I2SR (*(volatile uint8_t *)(&_MBAR[0x8F0C])) -#define MCF_I2C_I2DR (*(volatile uint8_t *)(&_MBAR[0x8F10])) -#define MCF_I2C_I2ICR (*(volatile uint8_t *)(&_MBAR[0x8F20])) - - - -/* Bit definitions and macros for MCF_I2C_I2ADR */ -#define MCF_I2C_I2ADR_ADR(x) (((x)&0x7F)<<0x1) - -/* Bit definitions and macros for MCF_I2C_I2FDR */ -#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F)<<0) - -/* Bit definitions and macros for MCF_I2C_I2CR */ -#define MCF_I2C_I2CR_RSTA (0x4) -#define MCF_I2C_I2CR_TXAK (0x8) -#define MCF_I2C_I2CR_MTX (0x10) -#define MCF_I2C_I2CR_MSTA (0x20) -#define MCF_I2C_I2CR_IIEN (0x40) -#define MCF_I2C_I2CR_IEN (0x80) - -/* Bit definitions and macros for MCF_I2C_I2SR */ -#define MCF_I2C_I2SR_RXAK (0x1) -#define MCF_I2C_I2SR_IIF (0x2) -#define MCF_I2C_I2SR_SRW (0x4) -#define MCF_I2C_I2SR_IAL (0x10) -#define MCF_I2C_I2SR_IBB (0x20) -#define MCF_I2C_I2SR_IAAS (0x40) -#define MCF_I2C_I2SR_ICF (0x80) - -/* Bit definitions and macros for MCF_I2C_I2DR */ -#define MCF_I2C_I2DR_DATA(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_I2C_I2ICR */ -#define MCF_I2C_I2ICR_IE (0x1) -#define MCF_I2C_I2ICR_RE (0x2) -#define MCF_I2C_I2ICR_TE (0x4) -#define MCF_I2C_I2ICR_BNBE (0x8) - - -#endif /* __MCF5475_I2C_H__ */ diff --git a/include/MCF5475_INTC.h b/include/MCF5475_INTC.h deleted file mode 100644 index 50e8074..0000000 --- a/include/MCF5475_INTC.h +++ /dev/null @@ -1,330 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_INTC_H__ -#define __MCF5475_INTC_H__ - - -/********************************************************************* -* -* Interrupt Controller (INTC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_INTC_IPRH (*(volatile uint32_t*)(&_MBAR[0x700])) -#define MCF_INTC_IPRL (*(volatile uint32_t*)(&_MBAR[0x704])) -#define MCF_INTC_IMRH (*(volatile uint32_t*)(&_MBAR[0x708])) -#define MCF_INTC_IMRL (*(volatile uint32_t*)(&_MBAR[0x70C])) -#define MCF_INTC_INTFRCH (*(volatile uint32_t*)(&_MBAR[0x710])) -#define MCF_INTC_INTFRCL (*(volatile uint32_t*)(&_MBAR[0x714])) -#define MCF_INTC_IRLR (*(volatile uint8_t *)(&_MBAR[0x718])) -#define MCF_INTC_IACKLPR (*(volatile uint8_t *)(&_MBAR[0x719])) -#define MCF_INTC_ICR01 (*(volatile uint8_t *)(&_MBAR[0x741])) -#define MCF_INTC_ICR02 (*(volatile uint8_t *)(&_MBAR[0x742])) -#define MCF_INTC_ICR03 (*(volatile uint8_t *)(&_MBAR[0x743])) -#define MCF_INTC_ICR04 (*(volatile uint8_t *)(&_MBAR[0x744])) -#define MCF_INTC_ICR05 (*(volatile uint8_t *)(&_MBAR[0x745])) -#define MCF_INTC_ICR06 (*(volatile uint8_t *)(&_MBAR[0x746])) -#define MCF_INTC_ICR07 (*(volatile uint8_t *)(&_MBAR[0x747])) -#define MCF_INTC_ICR08 (*(volatile uint8_t *)(&_MBAR[0x748])) -#define MCF_INTC_ICR09 (*(volatile uint8_t *)(&_MBAR[0x749])) -#define MCF_INTC_ICR10 (*(volatile uint8_t *)(&_MBAR[0x74A])) -#define MCF_INTC_ICR11 (*(volatile uint8_t *)(&_MBAR[0x74B])) -#define MCF_INTC_ICR12 (*(volatile uint8_t *)(&_MBAR[0x74C])) -#define MCF_INTC_ICR13 (*(volatile uint8_t *)(&_MBAR[0x74D])) -#define MCF_INTC_ICR14 (*(volatile uint8_t *)(&_MBAR[0x74E])) -#define MCF_INTC_ICR15 (*(volatile uint8_t *)(&_MBAR[0x74F])) -#define MCF_INTC_ICR16 (*(volatile uint8_t *)(&_MBAR[0x750])) -#define MCF_INTC_ICR17 (*(volatile uint8_t *)(&_MBAR[0x751])) -#define MCF_INTC_ICR18 (*(volatile uint8_t *)(&_MBAR[0x752])) -#define MCF_INTC_ICR19 (*(volatile uint8_t *)(&_MBAR[0x753])) -#define MCF_INTC_ICR20 (*(volatile uint8_t *)(&_MBAR[0x754])) -#define MCF_INTC_ICR21 (*(volatile uint8_t *)(&_MBAR[0x755])) -#define MCF_INTC_ICR22 (*(volatile uint8_t *)(&_MBAR[0x756])) -#define MCF_INTC_ICR23 (*(volatile uint8_t *)(&_MBAR[0x757])) -#define MCF_INTC_ICR24 (*(volatile uint8_t *)(&_MBAR[0x758])) -#define MCF_INTC_ICR25 (*(volatile uint8_t *)(&_MBAR[0x759])) -#define MCF_INTC_ICR26 (*(volatile uint8_t *)(&_MBAR[0x75A])) -#define MCF_INTC_ICR27 (*(volatile uint8_t *)(&_MBAR[0x75B])) -#define MCF_INTC_ICR28 (*(volatile uint8_t *)(&_MBAR[0x75C])) -#define MCF_INTC_ICR29 (*(volatile uint8_t *)(&_MBAR[0x75D])) -#define MCF_INTC_ICR30 (*(volatile uint8_t *)(&_MBAR[0x75E])) -#define MCF_INTC_ICR31 (*(volatile uint8_t *)(&_MBAR[0x75F])) -#define MCF_INTC_ICR32 (*(volatile uint8_t *)(&_MBAR[0x760])) -#define MCF_INTC_ICR33 (*(volatile uint8_t *)(&_MBAR[0x761])) -#define MCF_INTC_ICR34 (*(volatile uint8_t *)(&_MBAR[0x762])) -#define MCF_INTC_ICR35 (*(volatile uint8_t *)(&_MBAR[0x763])) -#define MCF_INTC_ICR36 (*(volatile uint8_t *)(&_MBAR[0x764])) -#define MCF_INTC_ICR37 (*(volatile uint8_t *)(&_MBAR[0x765])) -#define MCF_INTC_ICR38 (*(volatile uint8_t *)(&_MBAR[0x766])) -#define MCF_INTC_ICR39 (*(volatile uint8_t *)(&_MBAR[0x767])) -#define MCF_INTC_ICR40 (*(volatile uint8_t *)(&_MBAR[0x768])) -#define MCF_INTC_ICR41 (*(volatile uint8_t *)(&_MBAR[0x769])) -#define MCF_INTC_ICR42 (*(volatile uint8_t *)(&_MBAR[0x76A])) -#define MCF_INTC_ICR43 (*(volatile uint8_t *)(&_MBAR[0x76B])) -#define MCF_INTC_ICR44 (*(volatile uint8_t *)(&_MBAR[0x76C])) -#define MCF_INTC_ICR45 (*(volatile uint8_t *)(&_MBAR[0x76D])) -#define MCF_INTC_ICR46 (*(volatile uint8_t *)(&_MBAR[0x76E])) -#define MCF_INTC_ICR47 (*(volatile uint8_t *)(&_MBAR[0x76F])) -#define MCF_INTC_ICR48 (*(volatile uint8_t *)(&_MBAR[0x770])) -#define MCF_INTC_ICR49 (*(volatile uint8_t *)(&_MBAR[0x771])) -#define MCF_INTC_ICR50 (*(volatile uint8_t *)(&_MBAR[0x772])) -#define MCF_INTC_ICR51 (*(volatile uint8_t *)(&_MBAR[0x773])) -#define MCF_INTC_ICR52 (*(volatile uint8_t *)(&_MBAR[0x774])) -#define MCF_INTC_ICR53 (*(volatile uint8_t *)(&_MBAR[0x775])) -#define MCF_INTC_ICR54 (*(volatile uint8_t *)(&_MBAR[0x776])) -#define MCF_INTC_ICR55 (*(volatile uint8_t *)(&_MBAR[0x777])) -#define MCF_INTC_ICR56 (*(volatile uint8_t *)(&_MBAR[0x778])) -#define MCF_INTC_ICR57 (*(volatile uint8_t *)(&_MBAR[0x779])) -#define MCF_INTC_ICR58 (*(volatile uint8_t *)(&_MBAR[0x77A])) -#define MCF_INTC_ICR59 (*(volatile uint8_t *)(&_MBAR[0x77B])) -#define MCF_INTC_ICR60 (*(volatile uint8_t *)(&_MBAR[0x77C])) -#define MCF_INTC_ICR61 (*(volatile uint8_t *)(&_MBAR[0x77D])) -#define MCF_INTC_ICR62 (*(volatile uint8_t *)(&_MBAR[0x77E])) -#define MCF_INTC_ICR63 (*(volatile uint8_t *)(&_MBAR[0x77F])) -#define MCF_INTC_SWIACK (*(volatile uint8_t *)(&_MBAR[0x7E0])) -#define MCF_INTC_L1IACK (*(volatile uint8_t *)(&_MBAR[0x7E4])) -#define MCF_INTC_L2IACK (*(volatile uint8_t *)(&_MBAR[0x7E8])) -#define MCF_INTC_L3IACK (*(volatile uint8_t *)(&_MBAR[0x7EC])) -#define MCF_INTC_L4IACK (*(volatile uint8_t *)(&_MBAR[0x7F0])) -#define MCF_INTC_L5IACK (*(volatile uint8_t *)(&_MBAR[0x7F4])) -#define MCF_INTC_L6IACK (*(volatile uint8_t *)(&_MBAR[0x7F8])) -#define MCF_INTC_L7IACK (*(volatile uint8_t *)(&_MBAR[0x7FC])) -#define MCF_INTC_ICR(x) (*(volatile uint8_t *)(&_MBAR[0x741 + ((x-1)*0x1)])) -#define MCF_INTC_LIACK(x) (*(volatile uint8_t *)(&_MBAR[0x7E4 + ((x-1)*0x4)])) - - -/* Bit definitions and macros for MCF_INTC_IPRH */ -#define MCF_INTC_IPRH_INT32 (0x1) -#define MCF_INTC_IPRH_INT33 (0x2) -#define MCF_INTC_IPRH_INT34 (0x4) -#define MCF_INTC_IPRH_INT35 (0x8) -#define MCF_INTC_IPRH_INT36 (0x10) -#define MCF_INTC_IPRH_INT37 (0x20) -#define MCF_INTC_IPRH_INT38 (0x40) -#define MCF_INTC_IPRH_INT39 (0x80) -#define MCF_INTC_IPRH_INT40 (0x100) -#define MCF_INTC_IPRH_INT41 (0x200) -#define MCF_INTC_IPRH_INT42 (0x400) -#define MCF_INTC_IPRH_INT43 (0x800) -#define MCF_INTC_IPRH_INT44 (0x1000) -#define MCF_INTC_IPRH_INT45 (0x2000) -#define MCF_INTC_IPRH_INT46 (0x4000) -#define MCF_INTC_IPRH_INT47 (0x8000) -#define MCF_INTC_IPRH_INT48 (0x10000) -#define MCF_INTC_IPRH_INT49 (0x20000) -#define MCF_INTC_IPRH_INT50 (0x40000) -#define MCF_INTC_IPRH_INT51 (0x80000) -#define MCF_INTC_IPRH_INT52 (0x100000) -#define MCF_INTC_IPRH_INT53 (0x200000) -#define MCF_INTC_IPRH_INT54 (0x400000) -#define MCF_INTC_IPRH_INT55 (0x800000) -#define MCF_INTC_IPRH_INT56 (0x1000000) -#define MCF_INTC_IPRH_INT57 (0x2000000) -#define MCF_INTC_IPRH_INT58 (0x4000000) -#define MCF_INTC_IPRH_INT59 (0x8000000) -#define MCF_INTC_IPRH_INT60 (0x10000000) -#define MCF_INTC_IPRH_INT61 (0x20000000) -#define MCF_INTC_IPRH_INT62 (0x40000000) -#define MCF_INTC_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IPRL */ -#define MCF_INTC_IPRL_INT1 (0x2) -#define MCF_INTC_IPRL_INT2 (0x4) -#define MCF_INTC_IPRL_INT3 (0x8) -#define MCF_INTC_IPRL_INT4 (0x10) -#define MCF_INTC_IPRL_INT5 (0x20) -#define MCF_INTC_IPRL_INT6 (0x40) -#define MCF_INTC_IPRL_INT7 (0x80) -#define MCF_INTC_IPRL_INT8 (0x100) -#define MCF_INTC_IPRL_INT9 (0x200) -#define MCF_INTC_IPRL_INT10 (0x400) -#define MCF_INTC_IPRL_INT11 (0x800) -#define MCF_INTC_IPRL_INT12 (0x1000) -#define MCF_INTC_IPRL_INT13 (0x2000) -#define MCF_INTC_IPRL_INT14 (0x4000) -#define MCF_INTC_IPRL_INT15 (0x8000) -#define MCF_INTC_IPRL_INT16 (0x10000) -#define MCF_INTC_IPRL_INT17 (0x20000) -#define MCF_INTC_IPRL_INT18 (0x40000) -#define MCF_INTC_IPRL_INT19 (0x80000) -#define MCF_INTC_IPRL_INT20 (0x100000) -#define MCF_INTC_IPRL_INT21 (0x200000) -#define MCF_INTC_IPRL_INT22 (0x400000) -#define MCF_INTC_IPRL_INT23 (0x800000) -#define MCF_INTC_IPRL_INT24 (0x1000000) -#define MCF_INTC_IPRL_INT25 (0x2000000) -#define MCF_INTC_IPRL_INT26 (0x4000000) -#define MCF_INTC_IPRL_INT27 (0x8000000) -#define MCF_INTC_IPRL_INT28 (0x10000000) -#define MCF_INTC_IPRL_INT29 (0x20000000) -#define MCF_INTC_IPRL_INT30 (0x40000000) -#define MCF_INTC_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IMRH */ -#define MCF_INTC_IMRH_INT_MASK32 (0x1) -#define MCF_INTC_IMRH_INT_MASK33 (0x2) -#define MCF_INTC_IMRH_INT_MASK34 (0x4) -#define MCF_INTC_IMRH_INT_MASK35 (0x8) -#define MCF_INTC_IMRH_INT_MASK36 (0x10) -#define MCF_INTC_IMRH_INT_MASK37 (0x20) -#define MCF_INTC_IMRH_INT_MASK38 (0x40) -#define MCF_INTC_IMRH_INT_MASK39 (0x80) -#define MCF_INTC_IMRH_INT_MASK40 (0x100) -#define MCF_INTC_IMRH_INT_MASK41 (0x200) -#define MCF_INTC_IMRH_INT_MASK42 (0x400) -#define MCF_INTC_IMRH_INT_MASK43 (0x800) -#define MCF_INTC_IMRH_INT_MASK44 (0x1000) -#define MCF_INTC_IMRH_INT_MASK45 (0x2000) -#define MCF_INTC_IMRH_INT_MASK46 (0x4000) -#define MCF_INTC_IMRH_INT_MASK47 (0x8000) -#define MCF_INTC_IMRH_INT_MASK48 (0x10000) -#define MCF_INTC_IMRH_INT_MASK49 (0x20000) -#define MCF_INTC_IMRH_INT_MASK50 (0x40000) -#define MCF_INTC_IMRH_INT_MASK51 (0x80000) -#define MCF_INTC_IMRH_INT_MASK52 (0x100000) -#define MCF_INTC_IMRH_INT_MASK53 (0x200000) -#define MCF_INTC_IMRH_INT_MASK54 (0x400000) -#define MCF_INTC_IMRH_INT_MASK55 (0x800000) -#define MCF_INTC_IMRH_INT_MASK56 (0x1000000) -#define MCF_INTC_IMRH_INT_MASK57 (0x2000000) -#define MCF_INTC_IMRH_INT_MASK58 (0x4000000) -#define MCF_INTC_IMRH_INT_MASK59 (0x8000000) -#define MCF_INTC_IMRH_INT_MASK60 (0x10000000) -#define MCF_INTC_IMRH_INT_MASK61 (0x20000000) -#define MCF_INTC_IMRH_INT_MASK62 (0x40000000) -#define MCF_INTC_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IMRL */ -#define MCF_INTC_IMRL_MASKALL (0x1) -#define MCF_INTC_IMRL_INT_MASK1 (0x2) -#define MCF_INTC_IMRL_INT_MASK2 (0x4) -#define MCF_INTC_IMRL_INT_MASK3 (0x8) -#define MCF_INTC_IMRL_INT_MASK4 (0x10) -#define MCF_INTC_IMRL_INT_MASK5 (0x20) -#define MCF_INTC_IMRL_INT_MASK6 (0x40) -#define MCF_INTC_IMRL_INT_MASK7 (0x80) -#define MCF_INTC_IMRL_INT_MASK8 (0x100) -#define MCF_INTC_IMRL_INT_MASK9 (0x200) -#define MCF_INTC_IMRL_INT_MASK10 (0x400) -#define MCF_INTC_IMRL_INT_MASK11 (0x800) -#define MCF_INTC_IMRL_INT_MASK12 (0x1000) -#define MCF_INTC_IMRL_INT_MASK13 (0x2000) -#define MCF_INTC_IMRL_INT_MASK14 (0x4000) -#define MCF_INTC_IMRL_INT_MASK15 (0x8000) -#define MCF_INTC_IMRL_INT_MASK16 (0x10000) -#define MCF_INTC_IMRL_INT_MASK17 (0x20000) -#define MCF_INTC_IMRL_INT_MASK18 (0x40000) -#define MCF_INTC_IMRL_INT_MASK19 (0x80000) -#define MCF_INTC_IMRL_INT_MASK20 (0x100000) -#define MCF_INTC_IMRL_INT_MASK21 (0x200000) -#define MCF_INTC_IMRL_INT_MASK22 (0x400000) -#define MCF_INTC_IMRL_INT_MASK23 (0x800000) -#define MCF_INTC_IMRL_INT_MASK24 (0x1000000) -#define MCF_INTC_IMRL_INT_MASK25 (0x2000000) -#define MCF_INTC_IMRL_INT_MASK26 (0x4000000) -#define MCF_INTC_IMRL_INT_MASK27 (0x8000000) -#define MCF_INTC_IMRL_INT_MASK28 (0x10000000) -#define MCF_INTC_IMRL_INT_MASK29 (0x20000000) -#define MCF_INTC_IMRL_INT_MASK30 (0x40000000) -#define MCF_INTC_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_INTFRCH */ -#define MCF_INTC_INTFRCH_INTFRC32 (0x1) -#define MCF_INTC_INTFRCH_INTFRC33 (0x2) -#define MCF_INTC_INTFRCH_INTFRC34 (0x4) -#define MCF_INTC_INTFRCH_INTFRC35 (0x8) -#define MCF_INTC_INTFRCH_INTFRC36 (0x10) -#define MCF_INTC_INTFRCH_INTFRC37 (0x20) -#define MCF_INTC_INTFRCH_INTFRC38 (0x40) -#define MCF_INTC_INTFRCH_INTFRC39 (0x80) -#define MCF_INTC_INTFRCH_INTFRC40 (0x100) -#define MCF_INTC_INTFRCH_INTFRC41 (0x200) -#define MCF_INTC_INTFRCH_INTFRC42 (0x400) -#define MCF_INTC_INTFRCH_INTFRC43 (0x800) -#define MCF_INTC_INTFRCH_INTFRC44 (0x1000) -#define MCF_INTC_INTFRCH_INTFRC45 (0x2000) -#define MCF_INTC_INTFRCH_INTFRC46 (0x4000) -#define MCF_INTC_INTFRCH_INTFRC47 (0x8000) -#define MCF_INTC_INTFRCH_INTFRC48 (0x10000) -#define MCF_INTC_INTFRCH_INTFRC49 (0x20000) -#define MCF_INTC_INTFRCH_INTFRC50 (0x40000) -#define MCF_INTC_INTFRCH_INTFRC51 (0x80000) -#define MCF_INTC_INTFRCH_INTFRC52 (0x100000) -#define MCF_INTC_INTFRCH_INTFRC53 (0x200000) -#define MCF_INTC_INTFRCH_INTFRC54 (0x400000) -#define MCF_INTC_INTFRCH_INTFRC55 (0x800000) -#define MCF_INTC_INTFRCH_INTFRC56 (0x1000000) -#define MCF_INTC_INTFRCH_INTFRC57 (0x2000000) -#define MCF_INTC_INTFRCH_INTFRC58 (0x4000000) -#define MCF_INTC_INTFRCH_INTFRC59 (0x8000000) -#define MCF_INTC_INTFRCH_INTFRC60 (0x10000000) -#define MCF_INTC_INTFRCH_INTFRC61 (0x20000000) -#define MCF_INTC_INTFRCH_INTFRC62 (0x40000000) -#define MCF_INTC_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_INTFRCL */ -#define MCF_INTC_INTFRCL_INTFRC1 (0x2) -#define MCF_INTC_INTFRCL_INTFRC2 (0x4) -#define MCF_INTC_INTFRCL_INTFRC3 (0x8) -#define MCF_INTC_INTFRCL_INTFRC4 (0x10) -#define MCF_INTC_INTFRCL_INTFRC5 (0x20) -#define MCF_INTC_INTFRCL_INTFRC6 (0x40) -#define MCF_INTC_INTFRCL_INTFRC7 (0x80) -#define MCF_INTC_INTFRCL_INTFRC8 (0x100) -#define MCF_INTC_INTFRCL_INTFRC9 (0x200) -#define MCF_INTC_INTFRCL_INTFRC10 (0x400) -#define MCF_INTC_INTFRCL_INTFRC11 (0x800) -#define MCF_INTC_INTFRCL_INTFRC12 (0x1000) -#define MCF_INTC_INTFRCL_INTFRC13 (0x2000) -#define MCF_INTC_INTFRCL_INTFRC14 (0x4000) -#define MCF_INTC_INTFRCL_INTFRC15 (0x8000) -#define MCF_INTC_INTFRCL_INTFRC16 (0x10000) -#define MCF_INTC_INTFRCL_INTFRC17 (0x20000) -#define MCF_INTC_INTFRCL_INTFRC18 (0x40000) -#define MCF_INTC_INTFRCL_INTFRC19 (0x80000) -#define MCF_INTC_INTFRCL_INTFRC20 (0x100000) -#define MCF_INTC_INTFRCL_INTFRC21 (0x200000) -#define MCF_INTC_INTFRCL_INTFRC22 (0x400000) -#define MCF_INTC_INTFRCL_INTFRC23 (0x800000) -#define MCF_INTC_INTFRCL_INTFRC24 (0x1000000) -#define MCF_INTC_INTFRCL_INTFRC25 (0x2000000) -#define MCF_INTC_INTFRCL_INTFRC26 (0x4000000) -#define MCF_INTC_INTFRCL_INTFRC27 (0x8000000) -#define MCF_INTC_INTFRCL_INTFRC28 (0x10000000) -#define MCF_INTC_INTFRCL_INTFRC29 (0x20000000) -#define MCF_INTC_INTFRCL_INTFRC30 (0x40000000) -#define MCF_INTC_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IRLR */ -#define MCF_INTC_IRLR_IRQ(x) (((x)&0x7F)<<0x1) - -/* Bit definitions and macros for MCF_INTC_IACKLPR */ -#define MCF_INTC_IACKLPR_PRI(x) (((x)&0xF)<<0) -#define MCF_INTC_IACKLPR_LEVEL(x) (((x)&0x7)<<0x4) - -/* Bit definitions and macros for MCF_INTC_ICR */ -#define MCF_INTC_ICR_IP(x) (((x)&0x7)<<0) -#define MCF_INTC_ICR_IL(x) (((x)&0x7)<<0x3) - -/* Bit definitions and macros for MCF_INTC_SWIACK */ -#define MCF_INTC_SWIACK_VECTOR(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_INTC_LIACK */ -#define MCF_INTC_LIACK_VECTOR(x) (((x)&0xFF)<<0) - - -#endif /* __MCF5475_INTC_H__ */ diff --git a/include/MCF5475_MMU.h b/include/MCF5475_MMU.h deleted file mode 100644 index 942e62e..0000000 --- a/include/MCF5475_MMU.h +++ /dev/null @@ -1,79 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_MMU_H__ -#define __MCF5475_MMU_H__ - - -/********************************************************************* -* -* Memory Management Unit (MMU) -* -*********************************************************************/ - -/* Register read/write macros */ - -/* note the uint32_t_a - this is to avoid gcc warnings about pointer aliasing */ -#define MCF_MMU_MMUCR (*(volatile uint32_t_a*)(&_MMUBAR[0])) -#define MCF_MMU_MMUOR (*(volatile uint32_t_a*)(&_MMUBAR[0x4])) -#define MCF_MMU_MMUSR (*(volatile uint32_t_a*)(&_MMUBAR[0x8])) -#define MCF_MMU_MMUAR (*(volatile uint32_t_a*)(&_MMUBAR[0x10])) -#define MCF_MMU_MMUTR (*(volatile uint32_t_a*)(&_MMUBAR[0x14])) -#define MCF_MMU_MMUDR (*(volatile uint32_t_a*)(&_MMUBAR[0x18])) - - -/* Bit definitions and macros for MCF_MMU_MMUCR */ -#define MCF_MMU_MMUCR_EN (0x1) -#define MCF_MMU_MMUCR_ASM (0x2) - -/* Bit definitions and macros for MCF_MMU_MMUOR */ -#define MCF_MMU_MMUOR_UAA (0x1) -#define MCF_MMU_MMUOR_ACC (0x2) -#define MCF_MMU_MMUOR_RW (0x4) -#define MCF_MMU_MMUOR_ADR (0x8) -#define MCF_MMU_MMUOR_ITLB (0x10) -#define MCF_MMU_MMUOR_CAS (0x20) -#define MCF_MMU_MMUOR_CNL (0x40) -#define MCF_MMU_MMUOR_CA (0x80) -#define MCF_MMU_MMUOR_STLB (0x100) -#define MCF_MMU_MMUOR_AA(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_MMU_MMUSR */ -#define MCF_MMU_MMUSR_HIT (0x2) -#define MCF_MMU_MMUSR_WF (0x8) -#define MCF_MMU_MMUSR_RF (0x10) -#define MCF_MMU_MMUSR_SPF (0x20) - -/* Bit definitions and macros for MCF_MMU_MMUAR */ -#define MCF_MMU_MMUAR_FA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_MMU_MMUTR */ -#define MCF_MMU_MMUTR_V (0x1) -#define MCF_MMU_MMUTR_SG (0x2) -#define MCF_MMU_MMUTR_ID(x) (((x) & 0xFF) << 0x2) -#define MCF_MMU_MMUTR_VA(x) (((x)&0x3FFFFF)<<0xA) - -/* Bit definitions and macros for MCF_MMU_MMUDR */ -#define MCF_MMU_MMUDR_LK (0x2) -#define MCF_MMU_MMUDR_X (0x4) -#define MCF_MMU_MMUDR_W (0x8) -#define MCF_MMU_MMUDR_R (0x10) -#define MCF_MMU_MMUDR_SP (0x20) -#define MCF_MMU_MMUDR_CM(x) (((x) & 0x3) << 0x6) -#define MCF_MMU_MMUDR_SZ(x) (((x) & 0x3) << 0x8) -#define MCF_MMU_MMUDR_PA(x) (((x) & 0x3FFFFF) << 0xA) - - -#endif /* __MCF5475_MMU_H__ */ diff --git a/include/MCF5475_PAD.h b/include/MCF5475_PAD.h deleted file mode 100644 index 1d87e2e..0000000 --- a/include/MCF5475_PAD.h +++ /dev/null @@ -1,233 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_PAD_H__ -#define __MCF5475_PAD_H__ - - -/********************************************************************* -* -* Common GPIO -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PAD_PAR_FBCTL (*(volatile uint16_t*)(&_MBAR[0xA40])) -#define MCF_PAD_PAR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA42])) -#define MCF_PAD_PAR_DMA (*(volatile uint8_t *)(&_MBAR[0xA43])) -#define MCF_PAD_PAR_FECI2CIRQ (*(volatile uint16_t*)(&_MBAR[0xA44])) -#define MCF_PAD_PAR_PCIBG (*(volatile uint16_t*)(&_MBAR[0xA48])) -#define MCF_PAD_PAR_PCIBR (*(volatile uint16_t*)(&_MBAR[0xA4A])) -#define MCF_PAD_PAR_PSC3 (*(volatile uint8_t *)(&_MBAR[0xA4C])) -#define MCF_PAD_PAR_PSC2 (*(volatile uint8_t *)(&_MBAR[0xA4D])) -#define MCF_PAD_PAR_PSC1 (*(volatile uint8_t *)(&_MBAR[0xA4E])) -#define MCF_PAD_PAR_PSC0 (*(volatile uint8_t *)(&_MBAR[0xA4F])) -#define MCF_PAD_PAR_DSPI (*(volatile uint16_t*)(&_MBAR[0xA50])) -#define MCF_PAD_PAR_TIMER (*(volatile uint8_t *)(&_MBAR[0xA52])) - - -/* Bit definitions and macros for MCF_PAD_PAR_FBCTL */ -#define MCF_PAD_PAR_FBCTL_PAR_ALE(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_FBCTL_PAR_ALE_GPIO (0) -#define MCF_PAD_PAR_FBCTL_PAR_ALE_TBST (0x2) -#define MCF_PAD_PAR_FBCTL_PAR_ALE_ALE (0x3) -#define MCF_PAD_PAR_FBCTL_PAR_TA (0x4) -#define MCF_PAD_PAR_FBCTL_PAR_RWB(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_FBCTL_PAR_RWB_GPIO (0) -#define MCF_PAD_PAR_FBCTL_PAR_RWB_TBST (0x20) -#define MCF_PAD_PAR_FBCTL_PAR_RWB_RW (0x30) -#define MCF_PAD_PAR_FBCTL_PAR_OE (0x40) -#define MCF_PAD_PAR_FBCTL_PAR_BWE0 (0x100) -#define MCF_PAD_PAR_FBCTL_PAR_BWE1 (0x400) -#define MCF_PAD_PAR_FBCTL_PAR_BWE2 (0x1000) -#define MCF_PAD_PAR_FBCTL_PAR_BWE3 (0x4000) - -/* Bit definitions and macros for MCF_PAD_PAR_FBCS */ -#define MCF_PAD_PAR_FBCS_PAR_CS1 (0x2) -#define MCF_PAD_PAR_FBCS_PAR_CS2 (0x4) -#define MCF_PAD_PAR_FBCS_PAR_CS3 (0x8) -#define MCF_PAD_PAR_FBCS_PAR_CS4 (0x10) -#define MCF_PAD_PAR_FBCS_PAR_CS5 (0x20) - -/* Bit definitions and macros for MCF_PAD_PAR_DMA */ -#define MCF_PAD_PAR_DMA_PAR_DREQ0(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_DMA_PAR_DREQ0_GPIO (0) -#define MCF_PAD_PAR_DMA_PAR_DREQ0_TIN0 (0x2) -#define MCF_PAD_PAR_DMA_PAR_DREQ0_DREQ0 (0x3) -#define MCF_PAD_PAR_DMA_PAR_DREQ1(x) (((x)&0x3)<<0x2) -#define MCF_PAD_PAR_DMA_PAR_DREQ1_GPIO (0) -#define MCF_PAD_PAR_DMA_PAR_DREQ1_IRQ1 (0x4) -#define MCF_PAD_PAR_DMA_PAR_DREQ1_TIN1 (0x8) -#define MCF_PAD_PAR_DMA_PAR_DREQ1_DREQ1 (0xC) -#define MCF_PAD_PAR_DMA_PAR_DACK0(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_DMA_PAR_DACK0_GPIO (0) -#define MCF_PAD_PAR_DMA_PAR_DACK0_TOUT0 (0x20) -#define MCF_PAD_PAR_DMA_PAR_DACK0_DACK0 (0x30) -#define MCF_PAD_PAR_DMA_PAR_DACK1(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_DMA_PAR_DACK1_GPIO (0) -#define MCF_PAD_PAR_DMA_PAR_DACK1_TOUT1 (0x80) -#define MCF_PAD_PAR_DMA_PAR_DACK1_DACK1 (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_FECI2CIRQ */ -#define MCF_PAD_PAR_FECI2CIRQ_PAR_IRQ5 (0x1) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_IRQ6 (0x2) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_SCL (0x4) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_SDA (0x8) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDC(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDC_SCL (0x80) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDC_E1MDC (0xC0) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDIO(x) (((x)&0x3)<<0x8) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDIO_SDA (0x200) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDIO_E1MDIO (0x300) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MII (0x400) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E17 (0x800) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E0MDC (0x1000) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E0MDIO (0x2000) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E0MII (0x4000) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E07 (0x8000) - -/* Bit definitions and macros for MCF_PAD_PAR_PCIBG */ -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG0(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG0_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG0_TOUT0 (0x2) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0 (0x3) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG1(x) (((x)&0x3)<<0x2) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG1_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG1_TOUT1 (0x8) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 (0xC) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG2(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG2_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG2_TOUT2 (0x20) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 (0x30) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG3(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG3_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG3_TOUT3 (0x80) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG3_PCIBG3 (0xC0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG4(x) (((x)&0x3)<<0x8) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG4_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG4_TBST (0x200) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG4_PCIBG4 (0x300) - -/* Bit definitions and macros for MCF_PAD_PAR_PCIBR */ -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR0(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR0_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR0_TIN0 (0x2) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0 (0x3) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR1(x) (((x)&0x3)<<0x2) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR1_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR1_TIN1 (0x8) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 (0xC) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR2(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR2_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR2_TIN2 (0x20) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 (0x30) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR3(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR3_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR3_TIN3 (0x80) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR3_PCIBR3 (0xC0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR4(x) (((x)&0x3)<<0x8) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR4_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR4_IRQ4 (0x200) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR4_PCIBR4 (0x300) - -/* Bit definitions and macros for MCF_PAD_PAR_PSC3 */ -#define MCF_PAD_PAR_PSC3_PAR_TXD3 (0x4) -#define MCF_PAD_PAR_PSC3_PAR_RXD3 (0x8) -#define MCF_PAD_PAR_PSC3_PAR_RTS3(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PSC3_PAR_RTS3_GPIO (0) -#define MCF_PAD_PAR_PSC3_PAR_RTS3_FSYNC (0x20) -#define MCF_PAD_PAR_PSC3_PAR_RTS3_RTS (0x30) -#define MCF_PAD_PAR_PSC3_PAR_CTS3(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PSC3_PAR_CTS3_GPIO (0) -#define MCF_PAD_PAR_PSC3_PAR_CTS3_BCLK (0x80) -#define MCF_PAD_PAR_PSC3_PAR_CTS3_CTS (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_PSC2 */ -#define MCF_PAD_PAR_PSC2_PAR_TXD2 (0x4) -#define MCF_PAD_PAR_PSC2_PAR_RXD2 (0x8) -#define MCF_PAD_PAR_PSC2_PAR_RTS2(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PSC2_PAR_RTS2_GPIO (0) -#define MCF_PAD_PAR_PSC2_PAR_RTS2_FSYNC (0x20) -#define MCF_PAD_PAR_PSC2_PAR_RTS2_RTS (0x30) -#define MCF_PAD_PAR_PSC2_PAR_CTS2(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PSC2_PAR_CTS2_GPIO (0) -#define MCF_PAD_PAR_PSC2_PAR_CTS2_BCLK (0x80) -#define MCF_PAD_PAR_PSC2_PAR_CTS2_CTS (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_PSC1 */ -#define MCF_PAD_PAR_PSC1_PAR_TXD1 (0x4) -#define MCF_PAD_PAR_PSC1_PAR_RXD1 (0x8) -#define MCF_PAD_PAR_PSC1_PAR_RTS1(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PSC1_PAR_RTS1_GPIO (0) -#define MCF_PAD_PAR_PSC1_PAR_RTS1_FSYNC (0x20) -#define MCF_PAD_PAR_PSC1_PAR_RTS1_RTS (0x30) -#define MCF_PAD_PAR_PSC1_PAR_CTS1(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PSC1_PAR_CTS1_GPIO (0) -#define MCF_PAD_PAR_PSC1_PAR_CTS1_BCLK (0x80) -#define MCF_PAD_PAR_PSC1_PAR_CTS1_CTS (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_PSC0 */ -#define MCF_PAD_PAR_PSC0_PAR_TXD0 (0x4) -#define MCF_PAD_PAR_PSC0_PAR_RXD0 (0x8) -#define MCF_PAD_PAR_PSC0_PAR_RTS0(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PSC0_PAR_RTS0_GPIO (0) -#define MCF_PAD_PAR_PSC0_PAR_RTS0_FSYNC (0x20) -#define MCF_PAD_PAR_PSC0_PAR_RTS0_RTS (0x30) -#define MCF_PAD_PAR_PSC0_PAR_CTS0(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PSC0_PAR_CTS0_GPIO (0) -#define MCF_PAD_PAR_PSC0_PAR_CTS0_BCLK (0x80) -#define MCF_PAD_PAR_PSC0_PAR_CTS0_CTS (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_DSPI */ -#define MCF_PAD_PAR_DSPI_PAR_SOUT(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_DSPI_PAR_SOUT_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_SOUT_TXD (0x2) -#define MCF_PAD_PAR_DSPI_PAR_SOUT_SOUT (0x3) -#define MCF_PAD_PAR_DSPI_PAR_SIN(x) (((x)&0x3)<<0x2) -#define MCF_PAD_PAR_DSPI_PAR_SIN_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_SIN_RXD (0x8) -#define MCF_PAD_PAR_DSPI_PAR_SIN_SIN (0xC) -#define MCF_PAD_PAR_DSPI_PAR_SCK(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_DSPI_PAR_SCK_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_SCK_BCLK (0x10) -#define MCF_PAD_PAR_DSPI_PAR_SCK_CTS (0x20) -#define MCF_PAD_PAR_DSPI_PAR_SCK_SCK (0x30) -#define MCF_PAD_PAR_DSPI_PAR_CS0(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_DSPI_PAR_CS0_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_CS0_FSYNC (0x40) -#define MCF_PAD_PAR_DSPI_PAR_CS0_RTS (0x80) -#define MCF_PAD_PAR_DSPI_PAR_CS0_DSPICS0 (0xC0) -#define MCF_PAD_PAR_DSPI_PAR_CS2(x) (((x)&0x3)<<0x8) -#define MCF_PAD_PAR_DSPI_PAR_CS2_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_CS2_TOUT2 (0x200) -#define MCF_PAD_PAR_DSPI_PAR_CS2_DSPICS2 (0x300) -#define MCF_PAD_PAR_DSPI_PAR_CS3(x) (((x)&0x3)<<0xA) -#define MCF_PAD_PAR_DSPI_PAR_CS3_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_CS3_TOUT3 (0x800) -#define MCF_PAD_PAR_DSPI_PAR_CS3_DSPICS3 (0xC00) -#define MCF_PAD_PAR_DSPI_PAR_CS5 (0x1000) - -/* Bit definitions and macros for MCF_PAD_PAR_TIMER */ -#define MCF_PAD_PAR_TIMER_PAR_TOUT2 (0x1) -#define MCF_PAD_PAR_TIMER_PAR_TIN2(x) (((x)&0x3)<<0x1) -#define MCF_PAD_PAR_TIMER_PAR_TIN2_IRQ2 (0x4) -#define MCF_PAD_PAR_TIMER_PAR_TIN2_TIN2 (0x6) -#define MCF_PAD_PAR_TIMER_PAR_TOUT3 (0x8) -#define MCF_PAD_PAR_TIMER_PAR_TIN3(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_TIMER_PAR_TIN3_IRQ3 (0x20) -#define MCF_PAD_PAR_TIMER_PAR_TIN3_TIN3 (0x30) - - -#endif /* __MCF5475_PAD_H__ */ diff --git a/include/MCF5475_PCI.h b/include/MCF5475_PCI.h deleted file mode 100644 index 3eb3341..0000000 --- a/include/MCF5475_PCI.h +++ /dev/null @@ -1,376 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_PCI_H__ -#define __MCF5475_PCI_H__ - - -/********************************************************************* -* -* PCI Bus Controller (PCI) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PCI_PCIIDR (*(volatile uint32_t*)(&_MBAR[0xB00])) -#define MCF_PCI_PCISCR (*(volatile uint32_t*)(&_MBAR[0xB04])) -#define MCF_PCI_PCICCRIR (*(volatile uint32_t*)(&_MBAR[0xB08])) -#define MCF_PCI_PCICR1 (*(volatile uint32_t*)(&_MBAR[0xB0C])) -#define MCF_PCI_PCIBAR0 (*(volatile uint32_t*)(&_MBAR[0xB10])) -#define MCF_PCI_PCIBAR1 (*(volatile uint32_t*)(&_MBAR[0xB14])) -#define MCF_PCI_PCICCPR (*(volatile uint32_t*)(&_MBAR[0xB28])) -#define MCF_PCI_PCISID (*(volatile uint32_t*)(&_MBAR[0xB2C])) -#define MCF_PCI_PCICR2 (*(volatile uint32_t*)(&_MBAR[0xB3C])) -#define MCF_PCI_PCIGSCR (*(volatile uint32_t*)(&_MBAR[0xB60])) -#define MCF_PCI_PCITBATR0 (*(volatile uint32_t*)(&_MBAR[0xB64])) -#define MCF_PCI_PCITBATR1 (*(volatile uint32_t*)(&_MBAR[0xB68])) -#define MCF_PCI_PCITCR (*(volatile uint32_t*)(&_MBAR[0xB6C])) -#define MCF_PCI_PCIIW0BTAR (*(volatile uint32_t*)(&_MBAR[0xB70])) -#define MCF_PCI_PCIIW1BTAR (*(volatile uint32_t*)(&_MBAR[0xB74])) -#define MCF_PCI_PCIIW2BTAR (*(volatile uint32_t*)(&_MBAR[0xB78])) -#define MCF_PCI_PCIIWCR (*(volatile uint32_t*)(&_MBAR[0xB80])) -#define MCF_PCI_PCIICR (*(volatile uint32_t*)(&_MBAR[0xB84])) -#define MCF_PCI_PCIISR (*(volatile uint32_t*)(&_MBAR[0xB88])) -#define MCF_PCI_PCICAR (*(volatile uint32_t*)(&_MBAR[0xBF8])) -#define MCF_PCI_PCITPSR (*(volatile uint32_t*)(&_MBAR[0x8400])) -#define MCF_PCI_PCITSAR (*(volatile uint32_t*)(&_MBAR[0x8404])) -#define MCF_PCI_PCITTCR (*(volatile uint32_t*)(&_MBAR[0x8408])) -#define MCF_PCI_PCITER (*(volatile uint32_t*)(&_MBAR[0x840C])) -#define MCF_PCI_PCITNAR (*(volatile uint32_t*)(&_MBAR[0x8410])) -#define MCF_PCI_PCITLWR (*(volatile uint32_t*)(&_MBAR[0x8414])) -#define MCF_PCI_PCITDCR (*(volatile uint32_t*)(&_MBAR[0x8418])) -#define MCF_PCI_PCITSR (*(volatile uint32_t*)(&_MBAR[0x841C])) -#define MCF_PCI_PCITFDR (*(volatile uint32_t*)(&_MBAR[0x8440])) -#define MCF_PCI_PCITFSR (*(volatile uint32_t*)(&_MBAR[0x8444])) -#define MCF_PCI_PCITFCR (*(volatile uint32_t*)(&_MBAR[0x8448])) -#define MCF_PCI_PCITFAR (*(volatile uint32_t*)(&_MBAR[0x844C])) -#define MCF_PCI_PCITFRPR (*(volatile uint32_t*)(&_MBAR[0x8450])) -#define MCF_PCI_PCITFWPR (*(volatile uint32_t*)(&_MBAR[0x8454])) -#define MCF_PCI_PCIRPSR (*(volatile uint32_t*)(&_MBAR[0x8480])) -#define MCF_PCI_PCIRSAR (*(volatile uint32_t*)(&_MBAR[0x8484])) -#define MCF_PCI_PCIRTCR (*(volatile uint32_t*)(&_MBAR[0x8488])) -#define MCF_PCI_PCIRER (*(volatile uint32_t*)(&_MBAR[0x848C])) -#define MCF_PCI_PCIRNAR (*(volatile uint32_t*)(&_MBAR[0x8490])) -#define MCF_PCI_PCIRDCR (*(volatile uint32_t*)(&_MBAR[0x8498])) -#define MCF_PCI_PCIRSR (*(volatile uint32_t*)(&_MBAR[0x849C])) -#define MCF_PCI_PCIRFDR (*(volatile uint32_t*)(&_MBAR[0x84C0])) -#define MCF_PCI_PCIRFSR (*(volatile uint32_t*)(&_MBAR[0x84C4])) -#define MCF_PCI_PCIRFCR (*(volatile uint32_t*)(&_MBAR[0x84C8])) -#define MCF_PCI_PCIRFAR (*(volatile uint32_t*)(&_MBAR[0x84CC])) -#define MCF_PCI_PCIRFRPR (*(volatile uint32_t*)(&_MBAR[0x84D0])) -#define MCF_PCI_PCIRFWPR (*(volatile uint32_t*)(&_MBAR[0x84D4])) - - -/* Bit definitions and macros for MCF_PCI_PCIIDR */ -#define MCF_PCI_PCIIDR_VENDORID(x) (((x)&0xFFFF)<<0) -#define MCF_PCI_PCIIDR_DEVICEID(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCISCR */ -#define MCF_PCI_PCISCR_IO (0x1) -#define MCF_PCI_PCISCR_M (0x2) -#define MCF_PCI_PCISCR_B (0x4) -#define MCF_PCI_PCISCR_SP (0x8) -#define MCF_PCI_PCISCR_MW (0x10) -#define MCF_PCI_PCISCR_V (0x20) -#define MCF_PCI_PCISCR_PER (0x40) -#define MCF_PCI_PCISCR_ST (0x80) -#define MCF_PCI_PCISCR_S (0x100) -#define MCF_PCI_PCISCR_F (0x200) -#define MCF_PCI_PCISCR_C (0x100000) -#define MCF_PCI_PCISCR_66M (0x200000) -#define MCF_PCI_PCISCR_R (0x400000) -#define MCF_PCI_PCISCR_FC (0x800000) -#define MCF_PCI_PCISCR_DP (0x1000000) -#define MCF_PCI_PCISCR_DT(x) (((x)&0x3)<<0x19) -#define MCF_PCI_PCISCR_TS (0x8000000) -#define MCF_PCI_PCISCR_TR (0x10000000) -#define MCF_PCI_PCISCR_MA (0x20000000) -#define MCF_PCI_PCISCR_SE (0x40000000) -#define MCF_PCI_PCISCR_PE (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCICCRIR */ -#define MCF_PCI_PCICCRIR_REVISIONID(x) (((x)&0xFF)<<0) -#define MCF_PCI_PCICCRIR_CLASSCODE(x) (((x)&0xFFFFFF)<<0x8) - -/* Bit definitions and macros for MCF_PCI_PCICR1 */ -#define MCF_PCI_PCICR1_CACHELINESIZE(x) (((x)&0xFF)<<0) -#define MCF_PCI_PCICR1_LATTIMER(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCICR1_HEADERTYPE(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCICR1_BIST(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIBAR0 */ -#define MCF_PCI_PCIBAR0_IOM (0x1) -#define MCF_PCI_PCIBAR0_RANGE(x) (((x)&0x3)<<0x1) -#define MCF_PCI_PCIBAR0_PREF (0x8) -#define MCF_PCI_PCIBAR0_BAR0(x) (((x)&0x3FFF)<<0x12) - -/* Bit definitions and macros for MCF_PCI_PCIBAR1 */ -#define MCF_PCI_PCIBAR1_IOM (0x1) -#define MCF_PCI_PCIBAR1_RANGE(x) (((x)&0x3)<<0x1) -#define MCF_PCI_PCIBAR1_PREF (0x8) -#define MCF_PCI_PCIBAR1_BAR1(x) (((x)&0x3)<<0x1E) - -/* Bit definitions and macros for MCF_PCI_PCICCPR */ -#define MCF_PCI_PCICCPR_PCICCP(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCISID */ -#define MCF_PCI_PCISID_VENDORID(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCICR2 */ -#define MCF_PCI_PCICR2_INTLINE(x) (((x)&0xFF)<<0) -#define MCF_PCI_PCICR2_INTPIN(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCICR2_MINGNT(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCICR2_MAXLAT(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIGSCR */ -#define MCF_PCI_PCIGSCR_PR (0x1) -#define MCF_PCI_PCIGSCR_SEE (0x1000) -#define MCF_PCI_PCIGSCR_PEE (0x2000) -#define MCF_PCI_PCIGSCR_CLKINRESERVED(x) (((x)&0x7)<<0x10) -#define MCF_PCI_PCIGSCR_XLB2CLKIN(x) (((x)&0x7)<<0x18) -#define MCF_PCI_PCIGSCR_SE (0x10000000) -#define MCF_PCI_PCIGSCR_PE (0x20000000) - -/* Bit definitions and macros for MCF_PCI_PCITBATR0 */ -#define MCF_PCI_PCITBATR0_EN (0x1) -#define MCF_PCI_PCITBATR0_BAT0(x) (((x)&0x3FFF)<<0x12) - -/* Bit definitions and macros for MCF_PCI_PCITBATR1 */ -#define MCF_PCI_PCITBATR1_EN (0x1) -#define MCF_PCI_PCITBATR1_BAT1(x) (((x)&0x3)<<0x1E) - -/* Bit definitions and macros for MCF_PCI_PCITCR */ -#define MCF_PCI_PCITCR_P (0x10000) -#define MCF_PCI_PCITCR_LD (0x1000000) - -/* Bit definitions and macros for MCF_PCI_PCIIW0BTAR */ -#define MCF_PCI_PCIIW0BTAR_WTA0(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCIIW0BTAR_WAM0(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCIIW0BTAR_WBA0(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIIW1BTAR */ -#define MCF_PCI_PCIIW1BTAR_WTA1(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCIIW1BTAR_WAM1(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCIIW1BTAR_WBA1(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIIW2BTAR */ -#define MCF_PCI_PCIIW2BTAR_WTA2(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCIIW2BTAR_WAM2(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCIIW2BTAR_WBA2(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIIWCR */ -#define MCF_PCI_PCIIWCR_WINCTRL2_E (0x100) -#define MCF_PCI_PCIIWCR_WINCTRL2_PRC(x) (((x)&0x3)<<0x9) -#define MCF_PCI_PCIIWCR_WINCTRL2_IOM (0x800) -#define MCF_PCI_PCIIWCR_WINCTRL1_E (0x10000) -#define MCF_PCI_PCIIWCR_WINCTRL1_PRC(x) (((x)&0x3)<<0x11) -#define MCF_PCI_PCIIWCR_WINCTRL1_IOM (0x80000) -#define MCF_PCI_PCIIWCR_WINCTRL0_E (0x1000000) -#define MCF_PCI_PCIIWCR_WINCTRL0_PRC(x) (((x)&0x3)<<0x19) -#define MCF_PCI_PCIIWCR_WINCTRL0_IOM (0x8000000) -#define MCF_PCI_PCIIWCR_WINCTRL2_MEMREAD (0x100) -#define MCF_PCI_PCIIWCR_WINCTRL2_MEMRDLINE (0x300) -#define MCF_PCI_PCIIWCR_WINCTRL2_MEMRDMUL (0x500) -#define MCF_PCI_PCIIWCR_WINCTRL2_IO (0x900) -#define MCF_PCI_PCIIWCR_WINCTRL1_MEMREAD (0x10000) -#define MCF_PCI_PCIIWCR_WINCTRL1_MEMRDLINE (0x30000) -#define MCF_PCI_PCIIWCR_WINCTRL1_MEMRDMUL (0x50000) -#define MCF_PCI_PCIIWCR_WINCTRL1_IO (0x90000) -#define MCF_PCI_PCIIWCR_WINCTRL0_MEMREAD (0x1000000) -#define MCF_PCI_PCIIWCR_WINCTRL0_MEMRDLINE (0x3000000) -#define MCF_PCI_PCIIWCR_WINCTRL0_MEMRDMUL (0x5000000) -#define MCF_PCI_PCIIWCR_WINCTRL0_IO (0x9000000) - -/* Bit definitions and macros for MCF_PCI_PCIICR */ -#define MCF_PCI_PCIICR_MAXRETRY(x) (((x)&0xFF)<<0) -#define MCF_PCI_PCIICR_TAE (0x1000000) -#define MCF_PCI_PCIICR_IAE (0x2000000) -#define MCF_PCI_PCIICR_REE (0x4000000) - -/* Bit definitions and macros for MCF_PCI_PCIISR */ -#define MCF_PCI_PCIISR_TA (0x1000000) -#define MCF_PCI_PCIISR_IA (0x2000000) -#define MCF_PCI_PCIISR_RE (0x4000000) - -/* Bit definitions and macros for MCF_PCI_PCICAR */ -#define MCF_PCI_PCICAR_DWORD(x) (((x)&0x3F)<<0x2) -#define MCF_PCI_PCICAR_FUNCNUM(x) (((x)&0x7)<<0x8) -#define MCF_PCI_PCICAR_DEVNUM(x) (((x)&0x1F)<<0xB) -#define MCF_PCI_PCICAR_BUSNUM(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCICAR_E (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCITPSR */ -#define MCF_PCI_PCITPSR_PKTSIZE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCITSAR */ -#define MCF_PCI_PCITSAR_STARTADD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITTCR */ -#define MCF_PCI_PCITTCR_DI (0x1) -#define MCF_PCI_PCITTCR_W (0x10) -#define MCF_PCI_PCITTCR_MAXBEATS(x) (((x)&0x7)<<0x8) -#define MCF_PCI_PCITTCR_MAXRETRY(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCITTCR_PCICMD(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCITER */ -#define MCF_PCI_PCITER_NE (0x10000) -#define MCF_PCI_PCITER_IAE (0x20000) -#define MCF_PCI_PCITER_TAE (0x40000) -#define MCF_PCI_PCITER_RE (0x80000) -#define MCF_PCI_PCITER_SE (0x100000) -#define MCF_PCI_PCITER_FEE (0x200000) -#define MCF_PCI_PCITER_ME (0x1000000) -#define MCF_PCI_PCITER_BE (0x8000000) -#define MCF_PCI_PCITER_CM (0x10000000) -#define MCF_PCI_PCITER_RF (0x40000000) -#define MCF_PCI_PCITER_RC (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCITNAR */ -#define MCF_PCI_PCITNAR_NEXTADDRESS(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITLWR */ -#define MCF_PCI_PCITLWR_LASTWORD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITDCR */ -#define MCF_PCI_PCITDCR_PKTSDONE(x) (((x)&0xFFFF)<<0) -#define MCF_PCI_PCITDCR_BYTESDONE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCITSR */ -#define MCF_PCI_PCITSR_IA (0x10000) -#define MCF_PCI_PCITSR_TA (0x20000) -#define MCF_PCI_PCITSR_RE (0x40000) -#define MCF_PCI_PCITSR_SE (0x80000) -#define MCF_PCI_PCITSR_FE (0x100000) -#define MCF_PCI_PCITSR_BE1 (0x200000) -#define MCF_PCI_PCITSR_BE2 (0x400000) -#define MCF_PCI_PCITSR_BE3 (0x800000) -#define MCF_PCI_PCITSR_NT (0x1000000) - -/* Bit definitions and macros for MCF_PCI_PCITFDR */ -#define MCF_PCI_PCITFDR_FIFODATAWORD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITFSR */ -#define MCF_PCI_PCITFSR_EMPTY (0x10000) -#define MCF_PCI_PCITFSR_ALARM (0x20000) -#define MCF_PCI_PCITFSR_FULL (0x40000) -#define MCF_PCI_PCITFSR_FR (0x80000) -#define MCF_PCI_PCITFSR_OF (0x100000) -#define MCF_PCI_PCITFSR_UF (0x200000) -#define MCF_PCI_PCITFSR_RXW (0x400000) -#define MCF_PCI_PCITFSR_FAE (0x800000) -#define MCF_PCI_PCITFSR_TXW (0x40000000) -#define MCF_PCI_PCITFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCITFCR */ -#define MCF_PCI_PCITFCR_TXW_MASK (0x40000) -#define MCF_PCI_PCITFCR_OF_MASK (0x80000) -#define MCF_PCI_PCITFCR_UF_MASK (0x100000) -#define MCF_PCI_PCITFCR_RXW_MASK (0x200000) -#define MCF_PCI_PCITFCR_FAE_MASK (0x400000) -#define MCF_PCI_PCITFCR_IP_MASK (0x800000) -#define MCF_PCI_PCITFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_PCI_PCITFCR_WFR (0x20000000) - -/* Bit definitions and macros for MCF_PCI_PCITFAR */ -#define MCF_PCI_PCITFAR_ALARM(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITFRPR */ -#define MCF_PCI_PCITFRPR_READPTR(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITFWPR */ -#define MCF_PCI_PCITFWPR_WRITEPTR(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRPSR */ -#define MCF_PCI_PCIRPSR_PKTSIZE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCIRSAR */ -#define MCF_PCI_PCIRSAR_STARTADD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRTCR */ -#define MCF_PCI_PCIRTCR_DI (0x1) -#define MCF_PCI_PCIRTCR_W (0x10) -#define MCF_PCI_PCIRTCR_MAXBEATS(x) (((x)&0x7)<<0x8) -#define MCF_PCI_PCIRTCR_FB (0x1000) -#define MCF_PCI_PCIRTCR_MAXRETRY(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCIRTCR_PCICMD(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIRER */ -#define MCF_PCI_PCIRER_NE (0x10000) -#define MCF_PCI_PCIRER_IAE (0x20000) -#define MCF_PCI_PCIRER_TAE (0x40000) -#define MCF_PCI_PCIRER_RE (0x80000) -#define MCF_PCI_PCIRER_SE (0x100000) -#define MCF_PCI_PCIRER_FEE (0x200000) -#define MCF_PCI_PCIRER_ME (0x1000000) -#define MCF_PCI_PCIRER_BE (0x8000000) -#define MCF_PCI_PCIRER_CM (0x10000000) -#define MCF_PCI_PCIRER_FE (0x20000000) -#define MCF_PCI_PCIRER_RF (0x40000000) -#define MCF_PCI_PCIRER_RC (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCIRNAR */ -#define MCF_PCI_PCIRNAR_NEXTADDRESS(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRDCR */ -#define MCF_PCI_PCIRDCR_PKTSDONE(x) (((x)&0xFFFF)<<0) -#define MCF_PCI_PCIRDCR_BYTESDONE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCIRSR */ -#define MCF_PCI_PCIRSR_IA (0x10000) -#define MCF_PCI_PCIRSR_TA (0x20000) -#define MCF_PCI_PCIRSR_RE (0x40000) -#define MCF_PCI_PCIRSR_SE (0x80000) -#define MCF_PCI_PCIRSR_FE (0x100000) -#define MCF_PCI_PCIRSR_BE1 (0x200000) -#define MCF_PCI_PCIRSR_BE2 (0x400000) -#define MCF_PCI_PCIRSR_BE3 (0x800000) -#define MCF_PCI_PCIRSR_NT (0x1000000) - -/* Bit definitions and macros for MCF_PCI_PCIRFDR */ -#define MCF_PCI_PCIRFDR_FIFODATAWORD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRFSR */ -#define MCF_PCI_PCIRFSR_EMPTY (0x10000) -#define MCF_PCI_PCIRFSR_ALARM (0x20000) -#define MCF_PCI_PCIRFSR_FULL (0x40000) -#define MCF_PCI_PCIRFSR_FR (0x80000) -#define MCF_PCI_PCIRFSR_OF (0x100000) -#define MCF_PCI_PCIRFSR_UF (0x200000) -#define MCF_PCI_PCIRFSR_RXW (0x400000) -#define MCF_PCI_PCIRFSR_FAE (0x800000) -#define MCF_PCI_PCIRFSR_TXW (0x40000000) -#define MCF_PCI_PCIRFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCIRFCR */ -#define MCF_PCI_PCIRFCR_TXW_MASK (0x40000) -#define MCF_PCI_PCIRFCR_OF_MASK (0x80000) -#define MCF_PCI_PCIRFCR_UF_MASK (0x100000) -#define MCF_PCI_PCIRFCR_RXW_MASK (0x200000) -#define MCF_PCI_PCIRFCR_FAE_MASK (0x400000) -#define MCF_PCI_PCIRFCR_IP_MASK (0x800000) -#define MCF_PCI_PCIRFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_PCI_PCIRFCR_WFR (0x20000000) - -/* Bit definitions and macros for MCF_PCI_PCIRFAR */ -#define MCF_PCI_PCIRFAR_ALARM(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRFRPR */ -#define MCF_PCI_PCIRFRPR_READPTR(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRFWPR */ -#define MCF_PCI_PCIRFWPR_WRITEPTR(x) (((x)&0x7F)<<0) - - -#endif /* __MCF5475_PCI_H__ */ diff --git a/include/MCF5475_PCIARB.h b/include/MCF5475_PCIARB.h deleted file mode 100644 index 9e8c05b..0000000 --- a/include/MCF5475_PCIARB.h +++ /dev/null @@ -1,43 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_PCIARB_H__ -#define __MCF5475_PCIARB_H__ - - -/********************************************************************* -* -* PCI Bus Arbiter Module (PCIARB) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PCIARB_PACR (*(volatile uint32_t*)(&_MBAR[0xC00])) -#define MCF_PCIARB_PASR (*(volatile uint32_t*)(&_MBAR[0xC04])) - - -/* Bit definitions and macros for MCF_PCIARB_PACR */ -#define MCF_PCIARB_PACR_INTMPRI (0x1) -#define MCF_PCIARB_PACR_EXTMPRI(x) (((x)&0x1F)<<0x1) -#define MCF_PCIARB_PACR_INTMINTEN (0x10000) -#define MCF_PCIARB_PACR_EXTMINTEN(x) (((x)&0x1F)<<0x11) -#define MCF_PCIARB_PACR_DS (0x80000000) - -/* Bit definitions and macros for MCF_PCIARB_PASR */ -#define MCF_PCIARB_PASR_ITLMBK (0x10000) -#define MCF_PCIARB_PASR_EXTMBK(x) (((x)&0x1F)<<0x11) - - -#endif /* __MCF5475_PCIARB_H__ */ diff --git a/include/MCF5475_PSC.h b/include/MCF5475_PSC.h deleted file mode 100644 index ffa9f3e..0000000 --- a/include/MCF5475_PSC.h +++ /dev/null @@ -1,527 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_PSC_H__ -#define __MCF5475_PSC_H__ - - -/********************************************************************* -* -* Programmable Serial Controller (PSC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PSC0_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8600])) -#define MCF_PSC0_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8600])) -#define MCF_PSC0_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8604])) -#define MCF_PSC0_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8604])) -#define MCF_PSC0_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8608])) -#define MCF_PSC0_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8610])) -#define MCF_PSC0_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8610])) -#define MCF_PSC0_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8614])) -#define MCF_PSC0_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8614])) -#define MCF_PSC0_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8618])) -#define MCF_PSC0_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x861C])) -#define MCF_PSC0_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8634])) -#define MCF_PSC0_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8638])) -#define MCF_PSC0_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x863C])) -#define MCF_PSC0_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8640])) -#define MCF_PSC0_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8644])) -#define MCF_PSC0_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8648])) -#define MCF_PSC0_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x864C])) -#define MCF_PSC0_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8650])) -#define MCF_PSC0_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8654])) -#define MCF_PSC0_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8658])) -#define MCF_PSC0_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x865C])) -#define MCF_PSC0_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8660])) -#define MCF_PSC0_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8664])) -#define MCF_PSC0_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8668])) -#define MCF_PSC0_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x866E])) -#define MCF_PSC0_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8672])) -#define MCF_PSC0_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8676])) -#define MCF_PSC0_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x867A])) -#define MCF_PSC0_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x867E])) -#define MCF_PSC0_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8680])) -#define MCF_PSC0_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8684])) -#define MCF_PSC0_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8688])) -#define MCF_PSC0_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x868E])) -#define MCF_PSC0_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8692])) -#define MCF_PSC0_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8696])) -#define MCF_PSC0_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x869A])) -#define MCF_PSC0_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x869E])) - -#define MCF_PSC1_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8700])) -#define MCF_PSC1_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8700])) -#define MCF_PSC1_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8704])) -#define MCF_PSC1_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8704])) -#define MCF_PSC1_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8708])) -#define MCF_PSC1_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8710])) -#define MCF_PSC1_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8710])) -#define MCF_PSC1_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8714])) -#define MCF_PSC1_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8714])) -#define MCF_PSC1_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8718])) -#define MCF_PSC1_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x871C])) -#define MCF_PSC1_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8734])) -#define MCF_PSC1_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8738])) -#define MCF_PSC1_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x873C])) -#define MCF_PSC1_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8740])) -#define MCF_PSC1_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8744])) -#define MCF_PSC1_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8748])) -#define MCF_PSC1_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x874C])) -#define MCF_PSC1_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8750])) -#define MCF_PSC1_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8754])) -#define MCF_PSC1_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8758])) -#define MCF_PSC1_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x875C])) -#define MCF_PSC1_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8760])) -#define MCF_PSC1_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8764])) -#define MCF_PSC1_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8768])) -#define MCF_PSC1_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x876E])) -#define MCF_PSC1_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8772])) -#define MCF_PSC1_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8776])) -#define MCF_PSC1_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x877A])) -#define MCF_PSC1_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x877E])) -#define MCF_PSC1_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8780])) -#define MCF_PSC1_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8784])) -#define MCF_PSC1_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8788])) -#define MCF_PSC1_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x878E])) -#define MCF_PSC1_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8792])) -#define MCF_PSC1_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8796])) -#define MCF_PSC1_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x879A])) -#define MCF_PSC1_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x879E])) - -#define MCF_PSC2_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8800])) -#define MCF_PSC2_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8800])) -#define MCF_PSC2_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8804])) -#define MCF_PSC2_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8804])) -#define MCF_PSC2_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8808])) -#define MCF_PSC2_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8810])) -#define MCF_PSC2_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8810])) -#define MCF_PSC2_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8814])) -#define MCF_PSC2_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8814])) -#define MCF_PSC2_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8818])) -#define MCF_PSC2_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x881C])) -#define MCF_PSC2_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8834])) -#define MCF_PSC2_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8838])) -#define MCF_PSC2_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x883C])) -#define MCF_PSC2_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8840])) -#define MCF_PSC2_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8844])) -#define MCF_PSC2_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8848])) -#define MCF_PSC2_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x884C])) -#define MCF_PSC2_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8850])) -#define MCF_PSC2_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8854])) -#define MCF_PSC2_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8858])) -#define MCF_PSC2_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x885C])) -#define MCF_PSC2_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8860])) -#define MCF_PSC2_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8864])) -#define MCF_PSC2_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8868])) -#define MCF_PSC2_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x886E])) -#define MCF_PSC2_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8872])) -#define MCF_PSC2_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8876])) -#define MCF_PSC2_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x887A])) -#define MCF_PSC2_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x887E])) -#define MCF_PSC2_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8880])) -#define MCF_PSC2_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8884])) -#define MCF_PSC2_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8888])) -#define MCF_PSC2_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x888E])) -#define MCF_PSC2_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8892])) -#define MCF_PSC2_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8896])) -#define MCF_PSC2_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x889A])) -#define MCF_PSC2_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x889E])) - -#define MCF_PSC3_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8900])) -#define MCF_PSC3_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8900])) -#define MCF_PSC3_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8904])) -#define MCF_PSC3_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8904])) -#define MCF_PSC3_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8908])) -#define MCF_PSC3_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8910])) -#define MCF_PSC3_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8910])) -#define MCF_PSC3_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8914])) -#define MCF_PSC3_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8914])) -#define MCF_PSC3_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8918])) -#define MCF_PSC3_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x891C])) -#define MCF_PSC3_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8934])) -#define MCF_PSC3_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8938])) -#define MCF_PSC3_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x893C])) -#define MCF_PSC3_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8940])) -#define MCF_PSC3_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8944])) -#define MCF_PSC3_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8948])) -#define MCF_PSC3_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x894C])) -#define MCF_PSC3_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8950])) -#define MCF_PSC3_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8954])) -#define MCF_PSC3_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8958])) -#define MCF_PSC3_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x895C])) -#define MCF_PSC3_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8960])) -#define MCF_PSC3_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8964])) -#define MCF_PSC3_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8968])) -#define MCF_PSC3_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x896E])) -#define MCF_PSC3_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8972])) -#define MCF_PSC3_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8976])) -#define MCF_PSC3_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x897A])) -#define MCF_PSC3_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x897E])) -#define MCF_PSC3_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8980])) -#define MCF_PSC3_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8984])) -#define MCF_PSC3_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8988])) -#define MCF_PSC3_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x898E])) -#define MCF_PSC3_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8992])) -#define MCF_PSC3_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8996])) -#define MCF_PSC3_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x899A])) -#define MCF_PSC3_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x899E])) - -#define MCF_PSC_PSCMR(x) (*(volatile uint8_t *)(&_MBAR[0x8600 + ((x)*0x100)])) -#define MCF_PSC_PSCCSR(x) (*(volatile uint8_t *)(&_MBAR[0x8604 + ((x)*0x100)])) -#define MCF_PSC_PSCSR(x) (*(volatile uint16_t*)(&_MBAR[0x8604 + ((x)*0x100)])) -#define MCF_PSC_PSCCR(x) (*(volatile uint8_t *)(&_MBAR[0x8608 + ((x)*0x100)])) -#define MCF_PSC_PSCRB_8BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCTB_8BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCRB_16BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCTB_16BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCRB_AC97(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCTB_AC97(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCIPCR(x) (*(volatile uint8_t *)(&_MBAR[0x8610 + ((x)*0x100)])) -#define MCF_PSC_PSCACR(x) (*(volatile uint8_t *)(&_MBAR[0x8610 + ((x)*0x100)])) -#define MCF_PSC_PSCIMR(x) (*(volatile uint16_t*)(&_MBAR[0x8614 + ((x)*0x100)])) -#define MCF_PSC_PSCISR(x) (*(volatile uint16_t*)(&_MBAR[0x8614 + ((x)*0x100)])) -#define MCF_PSC_PSCCTUR(x) (*(volatile uint8_t *)(&_MBAR[0x8618 + ((x)*0x100)])) -#define MCF_PSC_PSCCTLR(x) (*(volatile uint8_t *)(&_MBAR[0x861C + ((x)*0x100)])) -#define MCF_PSC_PSCIP(x) (*(volatile uint8_t *)(&_MBAR[0x8634 + ((x)*0x100)])) -#define MCF_PSC_PSCOPSET(x) (*(volatile uint8_t *)(&_MBAR[0x8638 + ((x)*0x100)])) -#define MCF_PSC_PSCOPRESET(x) (*(volatile uint8_t *)(&_MBAR[0x863C + ((x)*0x100)])) -#define MCF_PSC_PSCSICR(x) (*(volatile uint8_t *)(&_MBAR[0x8640 + ((x)*0x100)])) -#define MCF_PSC_PSCIRCR1(x) (*(volatile uint8_t *)(&_MBAR[0x8644 + ((x)*0x100)])) -#define MCF_PSC_PSCIRCR2(x) (*(volatile uint8_t *)(&_MBAR[0x8648 + ((x)*0x100)])) -#define MCF_PSC_PSCIRSDR(x) (*(volatile uint8_t *)(&_MBAR[0x864C + ((x)*0x100)])) -#define MCF_PSC_PSCIRMDR(x) (*(volatile uint8_t *)(&_MBAR[0x8650 + ((x)*0x100)])) -#define MCF_PSC_PSCIRFDR(x) (*(volatile uint8_t *)(&_MBAR[0x8654 + ((x)*0x100)])) -#define MCF_PSC_PSCRFCNT(x) (*(volatile uint16_t*)(&_MBAR[0x8658 + ((x)*0x100)])) -#define MCF_PSC_PSCTFCNT(x) (*(volatile uint16_t*)(&_MBAR[0x865C + ((x)*0x100)])) -#define MCF_PSC_PSCRFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8660 + ((x)*0x100)])) -#define MCF_PSC_PSCRFSR(x) (*(volatile uint16_t*)(&_MBAR[0x8664 + ((x)*0x100)])) -#define MCF_PSC_PSCRFCR(x) (*(volatile uint32_t*)(&_MBAR[0x8668 + ((x)*0x100)])) -#define MCF_PSC_PSCRFAR(x) (*(volatile uint16_t*)(&_MBAR[0x866E + ((x)*0x100)])) -#define MCF_PSC_PSCRFRP(x) (*(volatile uint16_t*)(&_MBAR[0x8672 + ((x)*0x100)])) -#define MCF_PSC_PSCRFWP(x) (*(volatile uint16_t*)(&_MBAR[0x8676 + ((x)*0x100)])) -#define MCF_PSC_PSCRLRFP(x) (*(volatile uint16_t*)(&_MBAR[0x867A + ((x)*0x100)])) -#define MCF_PSC_PSCRLWFP(x) (*(volatile uint16_t*)(&_MBAR[0x867E + ((x)*0x100)])) -#define MCF_PSC_PSCTFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8680 + ((x)*0x100)])) -#define MCF_PSC_PSCTFSR(x) (*(volatile uint16_t*)(&_MBAR[0x8684 + ((x)*0x100)])) -#define MCF_PSC_PSCTFCR(x) (*(volatile uint32_t*)(&_MBAR[0x8688 + ((x)*0x100)])) -#define MCF_PSC_PSCTFAR(x) (*(volatile uint16_t*)(&_MBAR[0x868E + ((x)*0x100)])) -#define MCF_PSC_PSCTFRP(x) (*(volatile uint16_t*)(&_MBAR[0x8692 + ((x)*0x100)])) -#define MCF_PSC_PSCTFWP(x) (*(volatile uint16_t*)(&_MBAR[0x8696 + ((x)*0x100)])) -#define MCF_PSC_PSCTLRFP(x) (*(volatile uint16_t*)(&_MBAR[0x869A + ((x)*0x100)])) -#define MCF_PSC_PSCTLWFP(x) (*(volatile uint16_t*)(&_MBAR[0x869E + ((x)*0x100)])) - -/* Bit definitions and macros for MCF_PSC_PSCMR */ -#define MCF_PSC_PSCMR_SB(x) (((x)&0xF)<<0) -#define MCF_PSC_PSCMR_TXCTS (0x10) -#define MCF_PSC_PSCMR_TXRTS (0x20) -#define MCF_PSC_PSCMR_CM(x) (((x)&0x3)<<0x6) -#define MCF_PSC_PSCMR_CM_NORMAL (0) -#define MCF_PSC_PSCMR_CM_ECHO (0x40) -#define MCF_PSC_PSCMR_CM_LOCAL_LOOP (0x80) -#define MCF_PSC_PSCMR_CM_REMOTE_LOOP (0xC0) -#define MCF_PSC_PSCMR_SB_STOP_BITS_1 (0x7) -#define MCF_PSC_PSCMR_SB_STOP_BITS_15 (0x8) -#define MCF_PSC_PSCMR_SB_STOP_BITS_2 (0xF) -#define MCF_PSC_PSCMR_PM_MULTI_ADDR (0x1C) -#define MCF_PSC_PSCMR_PM_MULTI_DATA (0x18) -#define MCF_PSC_PSCMR_PM_NONE (0x10) -#define MCF_PSC_PSCMR_PM_FORCE_HI (0xC) -#define MCF_PSC_PSCMR_PM_FORCE_LO (0x8) -#define MCF_PSC_PSCMR_PM_ODD (0x4) -#define MCF_PSC_PSCMR_PM_EVEN (0) -#define MCF_PSC_PSCMR_BC(x) (((x)&0x3)<<0) -#define MCF_PSC_PSCMR_BC_5 (0) -#define MCF_PSC_PSCMR_BC_6 (0x1) -#define MCF_PSC_PSCMR_BC_7 (0x2) -#define MCF_PSC_PSCMR_BC_8 (0x3) -#define MCF_PSC_PSCMR_PT (0x4) -#define MCF_PSC_PSCMR_PM(x) (((x)&0x3)<<0x3) -#define MCF_PSC_PSCMR_ERR (0x20) -#define MCF_PSC_PSCMR_RXIRQ_FU (0x40) -#define MCF_PSC_PSCMR_RXRTS (0x80) - -/* Bit definitions and macros for MCF_PSC_PSCCSR */ -#define MCF_PSC_PSCCSR_TCSEL(x) (((x)&0xF)<<0) -#define MCF_PSC_PSCCSR_RCSEL(x) (((x)&0xF)<<0x4) -#define MCF_PSC_PSCCSR_TCSEL_SYS_CLK (0x0D) -#define MCF_PSC_PSCCSR_TCSEL_CTM16 (0x0E) -#define MCF_PSC_PSCCSR_TCSEL_CTM (0x0F) -#define MCF_PSC_PSCCSR_RCSEL_SYS_CLK (0xD0) -#define MCF_PSC_PSCCSR_RCSEL_CTM16 (0xE0) -#define MCF_PSC_PSCCSR_RCSEL_CTM (0xF0) - -/* Bit definitions and macros for MCF_PSC_PSCSR */ -#define MCF_PSC_PSCSR_ERR (0x40) -#define MCF_PSC_PSCSR_CDE_DEOF (0x80) -#define MCF_PSC_PSCSR_RXRDY (0x100) -#define MCF_PSC_PSCSR_FU (0x200) -#define MCF_PSC_PSCSR_TXRDY (0x400) -#define MCF_PSC_PSCSR_TXEMP_URERR (0x800) -#define MCF_PSC_PSCSR_OE (0x1000) -#define MCF_PSC_PSCSR_PE_CRCERR (0x2000) -#define MCF_PSC_PSCSR_FE_PHYERR (0x4000) -#define MCF_PSC_PSCSR_RB_NEOF (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCCR */ -#define MCF_PSC_PSCCR_RXC(x) (((x)&0x3)<<0) -#define MCF_PSC_PSCCR_RX_ENABLED (0x1) -#define MCF_PSC_PSCCR_RX_DISABLED (0x2) -#define MCF_PSC_PSCCR_TXC(x) (((x)&0x3)<<0x2) -#define MCF_PSC_PSCCR_TX_ENABLED (0x4) -#define MCF_PSC_PSCCR_TX_DISABLED (0x8) -#define MCF_PSC_PSCCR_MISC(x) (((x)&0x7)<<0x4) -#define MCF_PSC_PSCCR_NONE (0) -#define MCF_PSC_PSCCR_RESET_MR (0x10) -#define MCF_PSC_PSCCR_RESET_RX (0x20) -#define MCF_PSC_PSCCR_RESET_TX (0x30) -#define MCF_PSC_PSCCR_RESET_ERROR (0x40) -#define MCF_PSC_PSCCR_RESET_BKCHGINT (0x50) -#define MCF_PSC_PSCCR_START_BREAK (0x60) -#define MCF_PSC_PSCCR_STOP_BREAK (0x70) - -/* Bit definitions and macros for MCF_PSC_PSCRB_8BIT */ -#define MCF_PSC_PSCRB_8BIT_RB3(x) (((x)&0xFF)<<0) -#define MCF_PSC_PSCRB_8BIT_RB2(x) (((x)&0xFF)<<0x8) -#define MCF_PSC_PSCRB_8BIT_RB1(x) (((x)&0xFF)<<0x10) -#define MCF_PSC_PSCRB_8BIT_RB0(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PSC_PSCTB_8BIT */ -#define MCF_PSC_PSCTB_8BIT_TB3(x) (((x)&0xFF)<<0) -#define MCF_PSC_PSCTB_8BIT_TB2(x) (((x)&0xFF)<<0x8) -#define MCF_PSC_PSCTB_8BIT_TB1(x) (((x)&0xFF)<<0x10) -#define MCF_PSC_PSCTB_8BIT_TB0(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PSC_PSCRB_16BIT */ -#define MCF_PSC_PSCRB_16BIT_RB1(x) (((x)&0xFFFF)<<0) -#define MCF_PSC_PSCRB_16BIT_RB0(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PSC_PSCTB_16BIT */ -#define MCF_PSC_PSCTB_16BIT_TB1(x) (((x)&0xFFFF)<<0) -#define MCF_PSC_PSCTB_16BIT_TB0(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PSC_PSCRB_AC97 */ -#define MCF_PSC_PSCRB_AC97_SOF (0x800) -#define MCF_PSC_PSCRB_AC97_RB(x) (((x)&0xFFFFF)<<0xC) - -/* Bit definitions and macros for MCF_PSC_PSCTB_AC97 */ -#define MCF_PSC_PSCTB_AC97_TB(x) (((x)&0xFFFFF)<<0xC) - -/* Bit definitions and macros for MCF_PSC_PSCIPCR */ -#define MCF_PSC_PSCIPCR_RESERVED (0xC) -#define MCF_PSC_PSCIPCR_CTS (0xD) -#define MCF_PSC_PSCIPCR_D_CTS (0x1C) -#define MCF_PSC_PSCIPCR_SYNC (0x8C) - -/* Bit definitions and macros for MCF_PSC_PSCACR */ -#define MCF_PSC_PSCACR_IEC0 (0x1) - -/* Bit definitions and macros for MCF_PSC_PSCIMR */ -#define MCF_PSC_PSCIMR_ERR (0x40) -#define MCF_PSC_PSCIMR_DEOF (0x80) -#define MCF_PSC_PSCIMR_TXRDY (0x100) -#define MCF_PSC_PSCIMR_RXRDY_FU (0x200) -#define MCF_PSC_PSCIMR_DB (0x400) -#define MCF_PSC_PSCIMR_IPC (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCISR */ -#define MCF_PSC_PSCISR_ERR (0x40) -#define MCF_PSC_PSCISR_DEOF (0x80) -#define MCF_PSC_PSCISR_TXRDY (0x100) -#define MCF_PSC_PSCISR_RXRDY_FU (0x200) -#define MCF_PSC_PSCISR_DB (0x400) -#define MCF_PSC_PSCISR_IPC (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCCTUR */ -#define MCF_PSC_PSCCTUR_CT(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCCTLR */ -#define MCF_PSC_PSCCTLR_CT(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCIP */ -#define MCF_PSC_PSCIP_CTS (0x1) -#define MCF_PSC_PSCIP_TGL (0x40) -#define MCF_PSC_PSCIP_LPWR_B (0x80) - -/* Bit definitions and macros for MCF_PSC_PSCOPSET */ -#define MCF_PSC_PSCOPSET_RTS (0x1) - -/* Bit definitions and macros for MCF_PSC_PSCOPRESET */ -#define MCF_PSC_PSCOPRESET_RTS (0x1) - -/* Bit definitions and macros for MCF_PSC_PSCSICR */ -#define MCF_PSC_PSCSICR_SIM(x) (((x)&0x7)<<0) -#define MCF_PSC_PSCSICR_SIM_UART (0) -#define MCF_PSC_PSCSICR_SIM_MODEM8 (0x1) -#define MCF_PSC_PSCSICR_SIM_MODEM16 (0x2) -#define MCF_PSC_PSCSICR_SIM_AC97 (0x3) -#define MCF_PSC_PSCSICR_SIM_SIR (0x4) -#define MCF_PSC_PSCSICR_SIM_MIR (0x5) -#define MCF_PSC_PSCSICR_SIM_FIR (0x6) -#define MCF_PSC_PSCSICR_SHDIR (0x10) -#define MCF_PSC_PSCSICR_DTS1 (0x20) -#define MCF_PSC_PSCSICR_AWR (0x40) -#define MCF_PSC_PSCSICR_ACRB (0x80) - -/* Bit definitions and macros for MCF_PSC_PSCIRCR1 */ -#define MCF_PSC_PSCIRCR1_SPUL (0x1) -#define MCF_PSC_PSCIRCR1_SIPEN (0x2) -#define MCF_PSC_PSCIRCR1_FD (0x4) - -/* Bit definitions and macros for MCF_PSC_PSCIRCR2 */ -#define MCF_PSC_PSCIRCR2_NXTEOF (0x1) -#define MCF_PSC_PSCIRCR2_ABORT (0x2) -#define MCF_PSC_PSCIRCR2_SIPREQ (0x4) - -/* Bit definitions and macros for MCF_PSC_PSCIRSDR */ -#define MCF_PSC_PSCIRSDR_IRSTIM(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCIRMDR */ -#define MCF_PSC_PSCIRMDR_M_FDIV(x) (((x)&0x7F)<<0) -#define MCF_PSC_PSCIRMDR_FREQ (0x80) - -/* Bit definitions and macros for MCF_PSC_PSCIRFDR */ -#define MCF_PSC_PSCIRFDR_F_FDIV(x) (((x)&0xF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFCNT */ -#define MCF_PSC_PSCRFCNT_CNT(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFCNT */ -#define MCF_PSC_PSCTFCNT_CNT(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFDR */ -#define MCF_PSC_PSCRFDR_DATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFSR */ -#define MCF_PSC_PSCRFSR_EMT (0x1) -#define MCF_PSC_PSCRFSR_ALARM (0x2) -#define MCF_PSC_PSCRFSR_FU (0x4) -#define MCF_PSC_PSCRFSR_FRMRDY (0x8) -#define MCF_PSC_PSCRFSR_OF (0x10) -#define MCF_PSC_PSCRFSR_UF (0x20) -#define MCF_PSC_PSCRFSR_RXW (0x40) -#define MCF_PSC_PSCRFSR_FAE (0x80) -#define MCF_PSC_PSCRFSR_FRM(x) (((x)&0xF)<<0x8) -#define MCF_PSC_PSCRFSR_FRM_BYTE0 (0x800) -#define MCF_PSC_PSCRFSR_FRM_BYTE1 (0x400) -#define MCF_PSC_PSCRFSR_FRM_BYTE2 (0x200) -#define MCF_PSC_PSCRFSR_FRM_BYTE3 (0x100) -#define MCF_PSC_PSCRFSR_TAG(x) (((x)&0x3)<<0xC) -#define MCF_PSC_PSCRFSR_TXW (0x4000) -#define MCF_PSC_PSCRFSR_IP (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCRFCR */ -#define MCF_PSC_PSCRFCR_CNTR(x) (((x)&0xFFFF)<<0) -#define MCF_PSC_PSCRFCR_TXW_MSK (0x40000) -#define MCF_PSC_PSCRFCR_OF_MSK (0x80000) -#define MCF_PSC_PSCRFCR_UF_MSK (0x100000) -#define MCF_PSC_PSCRFCR_RXW_MSK (0x200000) -#define MCF_PSC_PSCRFCR_FAE_MSK (0x400000) -#define MCF_PSC_PSCRFCR_IP_MSK (0x800000) -#define MCF_PSC_PSCRFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_PSC_PSCRFCR_FRMEN (0x8000000) -#define MCF_PSC_PSCRFCR_TIMER (0x10000000) - -/* Bit definitions and macros for MCF_PSC_PSCRFAR */ -#define MCF_PSC_PSCRFAR_ALARM(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFRP */ -#define MCF_PSC_PSCRFRP_READ(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFWP */ -#define MCF_PSC_PSCRFWP_WRITE(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRLRFP */ -#define MCF_PSC_PSCRLRFP_LRFP(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRLWFP */ -#define MCF_PSC_PSCRLWFP_LWFP(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFDR */ -#define MCF_PSC_PSCTFDR_DATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFSR */ -#define MCF_PSC_PSCTFSR_EMT (0x1) -#define MCF_PSC_PSCTFSR_ALARM (0x2) -#define MCF_PSC_PSCTFSR_FU (0x4) -#define MCF_PSC_PSCTFSR_FRMRDY (0x8) -#define MCF_PSC_PSCTFSR_OF (0x10) -#define MCF_PSC_PSCTFSR_UF (0x20) -#define MCF_PSC_PSCTFSR_RXW (0x40) -#define MCF_PSC_PSCTFSR_FAE (0x80) -#define MCF_PSC_PSCTFSR_FRM(x) (((x)&0xF)<<0x8) -#define MCF_PSC_PSCTFSR_FRM_BYTE0 (0x800) -#define MCF_PSC_PSCTFSR_FRM_BYTE1 (0x400) -#define MCF_PSC_PSCTFSR_FRM_BYTE2 (0x200) -#define MCF_PSC_PSCTFSR_FRM_BYTE3 (0x100) -#define MCF_PSC_PSCTFSR_TAG(x) (((x)&0x3)<<0xC) -#define MCF_PSC_PSCTFSR_TXW (0x4000) -#define MCF_PSC_PSCTFSR_IP (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCTFCR */ -#define MCF_PSC_PSCTFCR_CNTR(x) (((x)&0xFFFF)<<0) -#define MCF_PSC_PSCTFCR_TXW_MSK (0x40000) -#define MCF_PSC_PSCTFCR_OF_MSK (0x80000) -#define MCF_PSC_PSCTFCR_UF_MSK (0x100000) -#define MCF_PSC_PSCTFCR_RXW_MSK (0x200000) -#define MCF_PSC_PSCTFCR_FAE_MSK (0x400000) -#define MCF_PSC_PSCTFCR_IP_MSK (0x800000) -#define MCF_PSC_PSCTFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_PSC_PSCTFCR_FRMEN (0x8000000) -#define MCF_PSC_PSCTFCR_TIMER (0x10000000) -#define MCF_PSC_PSCTFCR_WFR (0x20000000) - -/* Bit definitions and macros for MCF_PSC_PSCTFAR */ -#define MCF_PSC_PSCTFAR_ALARM(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFRP */ -#define MCF_PSC_PSCTFRP_READ(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFWP */ -#define MCF_PSC_PSCTFWP_WRITE(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTLRFP */ -#define MCF_PSC_PSCTLRFP_LRFP(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTLWFP */ -#define MCF_PSC_PSCTLWFP_LWFP(x) (((x)&0x1FF)<<0) - - -#endif /* __MCF5475_PSC_H__ */ diff --git a/include/MCF5475_SDRAMC.h b/include/MCF5475_SDRAMC.h deleted file mode 100644 index 6cdbd68..0000000 --- a/include/MCF5475_SDRAMC.h +++ /dev/null @@ -1,106 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SDRAMC_H__ -#define __MCF5475_SDRAMC_H__ - - -/********************************************************************* -* -* Synchronous DRAM Controller (SDRAMC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SDRAMC_SDRAMDS (*(volatile uint32_t*)(&_MBAR[0x4])) -#define MCF_SDRAMC_CS0CFG (*(volatile uint32_t*)(&_MBAR[0x20])) -#define MCF_SDRAMC_CS1CFG (*(volatile uint32_t*)(&_MBAR[0x24])) -#define MCF_SDRAMC_CS2CFG (*(volatile uint32_t*)(&_MBAR[0x28])) -#define MCF_SDRAMC_CS3CFG (*(volatile uint32_t*)(&_MBAR[0x2C])) -#define MCF_SDRAMC_SDMR (*(volatile uint32_t*)(&_MBAR[0x100])) -#define MCF_SDRAMC_SDCR (*(volatile uint32_t*)(&_MBAR[0x104])) -#define MCF_SDRAMC_SDCFG1 (*(volatile uint32_t*)(&_MBAR[0x108])) -#define MCF_SDRAMC_SDCFG2 (*(volatile uint32_t*)(&_MBAR[0x10C])) -#define MCF_SDRAMC_CSCFG(x) (*(volatile uint32_t*)(&_MBAR[0x20 + ((x)*0x4)])) - - -/* Bit definitions and macros for MCF_SDRAMC_SDRAMDS */ -#define MCF_SDRAMC_SDRAMDS_SB_D(x) (((x)&0x3)<<0) -#define MCF_SDRAMC_SDRAMDS_SB_S(x) (((x)&0x3)<<0x2) -#define MCF_SDRAMC_SDRAMDS_SB_A(x) (((x)&0x3)<<0x4) -#define MCF_SDRAMC_SDRAMDS_SB_C(x) (((x)&0x3)<<0x6) -#define MCF_SDRAMC_SDRAMDS_SB_E(x) (((x)&0x3)<<0x8) -#define MCF_SDRAMC_SDRAMDS_DRIVE_24MA (0) -#define MCF_SDRAMC_SDRAMDS_DRIVE_16MA (0x1) -#define MCF_SDRAMC_SDRAMDS_DRIVE_8MA (0x2) -#define MCF_SDRAMC_SDRAMDS_DRIVE_NONE (0x3) - -/* Bit definitions and macros for MCF_SDRAMC_CSCFG */ -#define MCF_SDRAMC_CSCFG_CSSZ(x) (((x)&0x1F)<<0) -#define MCF_SDRAMC_CSCFG_CSSZ_DISABLED (0) -#define MCF_SDRAMC_CSCFG_CSSZ_1MBYTE (0x13) -#define MCF_SDRAMC_CSCFG_CSSZ_2MBYTE (0x14) -#define MCF_SDRAMC_CSCFG_CSSZ_4MBYTE (0x15) -#define MCF_SDRAMC_CSCFG_CSSZ_8MBYTE (0x16) -#define MCF_SDRAMC_CSCFG_CSSZ_16MBYTE (0x17) -#define MCF_SDRAMC_CSCFG_CSSZ_32MBYTE (0x18) -#define MCF_SDRAMC_CSCFG_CSSZ_64MBYTE (0x19) -#define MCF_SDRAMC_CSCFG_CSSZ_128MBYTE (0x1A) -#define MCF_SDRAMC_CSCFG_CSSZ_256MBYTE (0x1B) -#define MCF_SDRAMC_CSCFG_CSSZ_512MBYTE (0x1C) -#define MCF_SDRAMC_CSCFG_CSSZ_1GBYTE (0x1D) -#define MCF_SDRAMC_CSCFG_CSSZ_2GBYTE (0x1E) -#define MCF_SDRAMC_CSCFG_CSSZ_4GBYTE (0x1F) -#define MCF_SDRAMC_CSCFG_CSBA(x) (((x)&0xFFF)<<0x14) -#define MCF_SDRAMC_CSCFG_BA(x) ((x)&0xFFF00000) - -/* Bit definitions and macros for MCF_SDRAMC_SDMR */ -#define MCF_SDRAMC_SDMR_CMD (0x10000) -#define MCF_SDRAMC_SDMR_AD(x) (((x)&0xFFF)<<0x12) -#define MCF_SDRAMC_SDMR_BNKAD(x) (((x)&0x3)<<0x1E) -#define MCF_SDRAMC_SDMR_BK_LMR (0) -#define MCF_SDRAMC_SDMR_BK_LEMR (0x40000000) - -/* Bit definitions and macros for MCF_SDRAMC_SDCR */ -#define MCF_SDRAMC_SDCR_IPALL (0x2) -#define MCF_SDRAMC_SDCR_IREF (0x4) -#define MCF_SDRAMC_SDCR_BUFF (0x10) -#define MCF_SDRAMC_SDCR_DQS_OE(x) (((x)&0xF)<<0x8) -#define MCF_SDRAMC_SDCR_RCNT(x) (((x)&0x3F)<<0x10) -#define MCF_SDRAMC_SDCR_DRIVE (0x400000) -#define MCF_SDRAMC_SDCR_AP (0x800000) -#define MCF_SDRAMC_SDCR_MUX(x) (((x)&0x3)<<0x18) -#define MCF_SDRAMC_SDCR_REF (0x10000000) -#define MCF_SDRAMC_SDCR_DDR (0x20000000) -#define MCF_SDRAMC_SDCR_CKE (0x40000000) -#define MCF_SDRAMC_SDCR_MODE_EN (0x80000000) - -/* Bit definitions and macros for MCF_SDRAMC_SDCFG1 */ -#define MCF_SDRAMC_SDCFG1_WTLAT(x) (((x)&0x7)<<0x4) -#define MCF_SDRAMC_SDCFG1_REF2ACT(x) (((x)&0xF)<<0x8) -#define MCF_SDRAMC_SDCFG1_PRE2ACT(x) (((x)&0x7)<<0xC) -#define MCF_SDRAMC_SDCFG1_ACT2RW(x) (((x)&0x7)<<0x10) -#define MCF_SDRAMC_SDCFG1_RDLAT(x) (((x)&0xF)<<0x14) -#define MCF_SDRAMC_SDCFG1_SWT2RD(x) (((x)&0x7)<<0x18) -#define MCF_SDRAMC_SDCFG1_SRD2RW(x) (((x)&0xF)<<0x1C) - -/* Bit definitions and macros for MCF_SDRAMC_SDCFG2 */ -#define MCF_SDRAMC_SDCFG2_BL(x) (((x)&0xF)<<0x10) -#define MCF_SDRAMC_SDCFG2_BRD2WT(x) (((x)&0xF)<<0x14) -#define MCF_SDRAMC_SDCFG2_BWT2RW(x) (((x)&0xF)<<0x18) -#define MCF_SDRAMC_SDCFG2_BRD2PRE(x) (((x)&0xF)<<0x1C) - - -#endif /* __MCF5475_SDRAMC_H__ */ diff --git a/include/MCF5475_SEC.h b/include/MCF5475_SEC.h deleted file mode 100644 index 8deff0b..0000000 --- a/include/MCF5475_SEC.h +++ /dev/null @@ -1,398 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SEC_H__ -#define __MCF5475_SEC_H__ - - -/********************************************************************* -* -* Integrated Security Engine (SEC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SEC_EUACRH (*(volatile uint32_t*)(&_MBAR[0x21000])) -#define MCF_SEC_EUACRL (*(volatile uint32_t*)(&_MBAR[0x21004])) -#define MCF_SEC_SIMRH (*(volatile uint32_t*)(&_MBAR[0x21008])) -#define MCF_SEC_SIMRL (*(volatile uint32_t*)(&_MBAR[0x2100C])) -#define MCF_SEC_SISRH (*(volatile uint32_t*)(&_MBAR[0x21010])) -#define MCF_SEC_SISRL (*(volatile uint32_t*)(&_MBAR[0x21014])) -#define MCF_SEC_SICRH (*(volatile uint32_t*)(&_MBAR[0x21018])) -#define MCF_SEC_SICRL (*(volatile uint32_t*)(&_MBAR[0x2101C])) -#define MCF_SEC_SIDR (*(volatile uint32_t*)(&_MBAR[0x21020])) -#define MCF_SEC_EUASRH (*(volatile uint32_t*)(&_MBAR[0x21028])) -#define MCF_SEC_EUASRL (*(volatile uint32_t*)(&_MBAR[0x2102C])) -#define MCF_SEC_SMCR (*(volatile uint32_t*)(&_MBAR[0x21030])) -#define MCF_SEC_MEAR (*(volatile uint32_t*)(&_MBAR[0x21038])) -#define MCF_SEC_CCCR0 (*(volatile uint32_t*)(&_MBAR[0x2200C])) -#define MCF_SEC_CCPSRH0 (*(volatile uint32_t*)(&_MBAR[0x22010])) -#define MCF_SEC_CCPSRL0 (*(volatile uint32_t*)(&_MBAR[0x22014])) -#define MCF_SEC_CDPR0 (*(volatile uint32_t*)(&_MBAR[0x22044])) -#define MCF_SEC_FR0 (*(volatile uint32_t*)(&_MBAR[0x2204C])) -#define MCF_SEC_CCCR1 (*(volatile uint32_t*)(&_MBAR[0x2300C])) -#define MCF_SEC_CCPSRH1 (*(volatile uint32_t*)(&_MBAR[0x23010])) -#define MCF_SEC_CCPSRL1 (*(volatile uint32_t*)(&_MBAR[0x23014])) -#define MCF_SEC_CDPR1 (*(volatile uint32_t*)(&_MBAR[0x23044])) -#define MCF_SEC_FR1 (*(volatile uint32_t*)(&_MBAR[0x2304C])) -#define MCF_SEC_AFRCR (*(volatile uint32_t*)(&_MBAR[0x28018])) -#define MCF_SEC_AFSR (*(volatile uint32_t*)(&_MBAR[0x28028])) -#define MCF_SEC_AFISR (*(volatile uint32_t*)(&_MBAR[0x28030])) -#define MCF_SEC_AFIMR (*(volatile uint32_t*)(&_MBAR[0x28038])) -#define MCF_SEC_DRCR (*(volatile uint32_t*)(&_MBAR[0x2A018])) -#define MCF_SEC_DSR (*(volatile uint32_t*)(&_MBAR[0x2A028])) -#define MCF_SEC_DISR (*(volatile uint32_t*)(&_MBAR[0x2A030])) -#define MCF_SEC_DIMR (*(volatile uint32_t*)(&_MBAR[0x2A038])) -#define MCF_SEC_MDRCR (*(volatile uint32_t*)(&_MBAR[0x2C018])) -#define MCF_SEC_MDSR (*(volatile uint32_t*)(&_MBAR[0x2C028])) -#define MCF_SEC_MDISR (*(volatile uint32_t*)(&_MBAR[0x2C030])) -#define MCF_SEC_MDIMR (*(volatile uint32_t*)(&_MBAR[0x2C038])) -#define MCF_SEC_RNGRCR (*(volatile uint32_t*)(&_MBAR[0x2E018])) -#define MCF_SEC_RNGSR (*(volatile uint32_t*)(&_MBAR[0x2E028])) -#define MCF_SEC_RNGISR (*(volatile uint32_t*)(&_MBAR[0x2E030])) -#define MCF_SEC_RNGIMR (*(volatile uint32_t*)(&_MBAR[0x2E038])) -#define MCF_SEC_AESRCR (*(volatile uint32_t*)(&_MBAR[0x32018])) -#define MCF_SEC_AESSR (*(volatile uint32_t*)(&_MBAR[0x32028])) -#define MCF_SEC_AESISR (*(volatile uint32_t*)(&_MBAR[0x32030])) -#define MCF_SEC_AESIMR (*(volatile uint32_t*)(&_MBAR[0x32038])) -#define MCF_SEC_CCCRn(x) (*(volatile uint32_t*)(&_MBAR[0x2200C + ((x)*0x1000)])) -#define MCF_SEC_CCPSRHn(x) (*(volatile uint32_t*)(&_MBAR[0x22010 + ((x)*0x1000)])) -#define MCF_SEC_CCPSRLn(x) (*(volatile uint32_t*)(&_MBAR[0x22014 + ((x)*0x1000)])) -#define MCF_SEC_CDPRn(x) (*(volatile uint32_t*)(&_MBAR[0x22044 + ((x)*0x1000)])) -#define MCF_SEC_FRn(x) (*(volatile uint32_t*)(&_MBAR[0x2204C + ((x)*0x1000)])) - - -/* Bit definitions and macros for MCF_SEC_EUACRH */ -#define MCF_SEC_EUACRH_AFEU(x) (((x)&0xF)<<0) -#define MCF_SEC_EUACRH_AFFEU_NOASSIGN (0) -#define MCF_SEC_EUACRH_AFFEU_CHA0 (0x1) -#define MCF_SEC_EUACRH_AFFEU_CHA1 (0x2) -#define MCF_SEC_EUACRH_MDEU(x) (((x)&0xF)<<0x8) -#define MCF_SEC_EUACRH_MDEU_NOASSIGN (0) -#define MCF_SEC_EUACRH_MDEU_CHA0 (0x100) -#define MCF_SEC_EUACRH_MDEU_CHA1 (0x200) -#define MCF_SEC_EUACRH_RNG(x) (((x)&0xF)<<0x18) -#define MCF_SEC_EUACRH_RNG_NOASSIGN (0) -#define MCF_SEC_EUACRH_RNG_CHA0 (0x1000000) -#define MCF_SEC_EUACRH_RNG_CHA1 (0x2000000) - -/* Bit definitions and macros for MCF_SEC_EUACRL */ -#define MCF_SEC_EUACRL_AESU(x) (((x)&0xF)<<0x10) -#define MCF_SEC_EUACRL_AESU_NOASSIGN (0) -#define MCF_SEC_EUACRL_AESU_CHA0 (0x10000) -#define MCF_SEC_EUACRL_AESU_CHA1 (0x20000) -#define MCF_SEC_EUACRL_DEU(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SEC_SIMRH */ -#define MCF_SEC_SIMRH_AERR (0x8000000) -#define MCF_SEC_SIMRH_CHA_0_DN (0x10000000) -#define MCF_SEC_SIMRH_CHA_0_ERR (0x20000000) -#define MCF_SEC_SIMRH_CHA_1_DN (0x40000000) -#define MCF_SEC_SIMRH_CHA_1_ERR (0x80000000) - -/* Bit definitions and macros for MCF_SEC_SIMRL */ -#define MCF_SEC_SIMRL_TEA (0x40) -#define MCF_SEC_SIMRL_DEU_DN (0x100) -#define MCF_SEC_SIMRL_DEU_ERR (0x200) -#define MCF_SEC_SIMRL_AESU_DN (0x1000) -#define MCF_SEC_SIMRL_AESU_ERR (0x2000) -#define MCF_SEC_SIMRL_MDEU_DN (0x10000) -#define MCF_SEC_SIMRL_MDEU_ERR (0x20000) -#define MCF_SEC_SIMRL_AFEU_DN (0x100000) -#define MCF_SEC_SIMRL_AFEU_ERR (0x200000) -#define MCF_SEC_SIMRL_RNG_DN (0x1000000) -#define MCF_SEC_SIMRL_RNG_ERR (0x2000000) - -/* Bit definitions and macros for MCF_SEC_SISRH */ -#define MCF_SEC_SISRH_AERR (0x8000000) -#define MCF_SEC_SISRH_CHA_0_DN (0x10000000) -#define MCF_SEC_SISRH_CHA_0_ERR (0x20000000) -#define MCF_SEC_SISRH_CHA_1_DN (0x40000000) -#define MCF_SEC_SISRH_CHA_1_ERR (0x80000000) - -/* Bit definitions and macros for MCF_SEC_SISRL */ -#define MCF_SEC_SISRL_TEA (0x40) -#define MCF_SEC_SISRL_DEU_DN (0x100) -#define MCF_SEC_SISRL_DEU_ERR (0x200) -#define MCF_SEC_SISRL_AESU_DN (0x1000) -#define MCF_SEC_SISRL_AESU_ERR (0x2000) -#define MCF_SEC_SISRL_MDEU_DN (0x10000) -#define MCF_SEC_SISRL_MDEU_ERR (0x20000) -#define MCF_SEC_SISRL_AFEU_DN (0x100000) -#define MCF_SEC_SISRL_AFEU_ERR (0x200000) -#define MCF_SEC_SISRL_RNG_DN (0x1000000) -#define MCF_SEC_SISRL_RNG_ERR (0x2000000) - -/* Bit definitions and macros for MCF_SEC_SICRH */ -#define MCF_SEC_SICRH_AERR (0x8000000) -#define MCF_SEC_SICRH_CHA_0_DN (0x10000000) -#define MCF_SEC_SICRH_CHA_0_ERR (0x20000000) -#define MCF_SEC_SICRH_CHA_1_DN (0x40000000) -#define MCF_SEC_SICRH_CHA_1_ERR (0x80000000) - -/* Bit definitions and macros for MCF_SEC_SICRL */ -#define MCF_SEC_SICRL_TEA (0x40) -#define MCF_SEC_SICRL_DEU_DN (0x100) -#define MCF_SEC_SICRL_DEU_ERR (0x200) -#define MCF_SEC_SICRL_AESU_DN (0x1000) -#define MCF_SEC_SICRL_AESU_ERR (0x2000) -#define MCF_SEC_SICRL_MDEU_DN (0x10000) -#define MCF_SEC_SICRL_MDEU_ERR (0x20000) -#define MCF_SEC_SICRL_AFEU_DN (0x100000) -#define MCF_SEC_SICRL_AFEU_ERR (0x200000) -#define MCF_SEC_SICRL_RNG_DN (0x1000000) -#define MCF_SEC_SICRL_RNG_ERR (0x2000000) - -/* Bit definitions and macros for MCF_SEC_SIDR */ -#define MCF_SEC_SIDR_VERSION(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SEC_EUASRH */ -#define MCF_SEC_EUASRH_AFEU(x) (((x)&0xF)<<0) -#define MCF_SEC_EUASRH_MDEU(x) (((x)&0xF)<<0x8) -#define MCF_SEC_EUASRH_RNG(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SEC_EUASRL */ -#define MCF_SEC_EUASRL_AESU(x) (((x)&0xF)<<0x10) -#define MCF_SEC_EUASRL_DEU(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SEC_SMCR */ -#define MCF_SEC_SMCR_CURR_CHAN(x) (((x)&0xF)<<0x4) -#define MCF_SEC_SMCR_CURR_CHAN_1 (0x10) -#define MCF_SEC_SMCR_CURR_CHAN_2 (0x20) -#define MCF_SEC_SMCR_SWR (0x1000000) - -/* Bit definitions and macros for MCF_SEC_MEAR */ -#define MCF_SEC_MEAR_ADDRESS(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SEC_CCCRn */ -#define MCF_SEC_CCCRn_RST (0x1) -#define MCF_SEC_CCCRn_CDIE (0x2) -#define MCF_SEC_CCCRn_NT (0x4) -#define MCF_SEC_CCCRn_NE (0x8) -#define MCF_SEC_CCCRn_WE (0x10) -#define MCF_SEC_CCCRn_BURST_SIZE(x) (((x)&0x7)<<0x8) -#define MCF_SEC_CCCRn_BURST_SIZE_2 (0) -#define MCF_SEC_CCCRn_BURST_SIZE_8 (0x100) -#define MCF_SEC_CCCRn_BURST_SIZE_16 (0x200) -#define MCF_SEC_CCCRn_BURST_SIZE_24 (0x300) -#define MCF_SEC_CCCRn_BURST_SIZE_32 (0x400) -#define MCF_SEC_CCCRn_BURST_SIZE_40 (0x500) -#define MCF_SEC_CCCRn_BURST_SIZE_48 (0x600) -#define MCF_SEC_CCCRn_BURST_SIZE_56 (0x700) - -/* Bit definitions and macros for MCF_SEC_CCPSRHn */ -#define MCF_SEC_CCPSRHn_STATE(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_SEC_CCPSRLn */ -#define MCF_SEC_CCPSRLn_PAIR_PTR(x) (((x)&0xFF)<<0) -#define MCF_SEC_CCPSRLn_EUERR (0x100) -#define MCF_SEC_CCPSRLn_SERR (0x200) -#define MCF_SEC_CCPSRLn_DERR (0x400) -#define MCF_SEC_CCPSRLn_PERR (0x1000) -#define MCF_SEC_CCPSRLn_TEA (0x2000) -#define MCF_SEC_CCPSRLn_SD (0x10000) -#define MCF_SEC_CCPSRLn_PD (0x20000) -#define MCF_SEC_CCPSRLn_SRD (0x40000) -#define MCF_SEC_CCPSRLn_PRD (0x80000) -#define MCF_SEC_CCPSRLn_SG (0x100000) -#define MCF_SEC_CCPSRLn_PG (0x200000) -#define MCF_SEC_CCPSRLn_SR (0x400000) -#define MCF_SEC_CCPSRLn_PR (0x800000) -#define MCF_SEC_CCPSRLn_MO (0x1000000) -#define MCF_SEC_CCPSRLn_MI (0x2000000) -#define MCF_SEC_CCPSRLn_STAT (0x4000000) - -/* Bit definitions and macros for MCF_SEC_CDPRn */ -#define MCF_SEC_CDPRn_CDP(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SEC_FRn */ -#define MCF_SEC_FRn_FETCH_ADDR(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SEC_AFRCR */ -#define MCF_SEC_AFRCR_SR (0x1000000) -#define MCF_SEC_AFRCR_MI (0x2000000) -#define MCF_SEC_AFRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_AFSR */ -#define MCF_SEC_AFSR_RD (0x1000000) -#define MCF_SEC_AFSR_ID (0x2000000) -#define MCF_SEC_AFSR_IE (0x4000000) -#define MCF_SEC_AFSR_OFR (0x8000000) -#define MCF_SEC_AFSR_IFW (0x10000000) -#define MCF_SEC_AFSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_AFISR */ -#define MCF_SEC_AFISR_DSE (0x10000) -#define MCF_SEC_AFISR_KSE (0x20000) -#define MCF_SEC_AFISR_CE (0x40000) -#define MCF_SEC_AFISR_ERE (0x80000) -#define MCF_SEC_AFISR_IE (0x100000) -#define MCF_SEC_AFISR_OFU (0x2000000) -#define MCF_SEC_AFISR_IFO (0x4000000) -#define MCF_SEC_AFISR_IFE (0x10000000) -#define MCF_SEC_AFISR_OFE (0x20000000) -#define MCF_SEC_AFISR_AE (0x40000000) -#define MCF_SEC_AFISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_AFIMR */ -#define MCF_SEC_AFIMR_DSE (0x10000) -#define MCF_SEC_AFIMR_KSE (0x20000) -#define MCF_SEC_AFIMR_CE (0x40000) -#define MCF_SEC_AFIMR_ERE (0x80000) -#define MCF_SEC_AFIMR_IE (0x100000) -#define MCF_SEC_AFIMR_OFU (0x2000000) -#define MCF_SEC_AFIMR_IFO (0x4000000) -#define MCF_SEC_AFIMR_IFE (0x10000000) -#define MCF_SEC_AFIMR_OFE (0x20000000) -#define MCF_SEC_AFIMR_AE (0x40000000) -#define MCF_SEC_AFIMR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_DRCR */ -#define MCF_SEC_DRCR_SR (0x1000000) -#define MCF_SEC_DRCR_MI (0x2000000) -#define MCF_SEC_DRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_DSR */ -#define MCF_SEC_DSR_RD (0x1000000) -#define MCF_SEC_DSR_ID (0x2000000) -#define MCF_SEC_DSR_IE (0x4000000) -#define MCF_SEC_DSR_OFR (0x8000000) -#define MCF_SEC_DSR_IFW (0x10000000) -#define MCF_SEC_DSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_DISR */ -#define MCF_SEC_DISR_DSE (0x10000) -#define MCF_SEC_DISR_KSE (0x20000) -#define MCF_SEC_DISR_CE (0x40000) -#define MCF_SEC_DISR_ERE (0x80000) -#define MCF_SEC_DISR_IE (0x100000) -#define MCF_SEC_DISR_KPE (0x200000) -#define MCF_SEC_DISR_OFU (0x2000000) -#define MCF_SEC_DISR_IFO (0x4000000) -#define MCF_SEC_DISR_IFE (0x10000000) -#define MCF_SEC_DISR_OFE (0x20000000) -#define MCF_SEC_DISR_AE (0x40000000) -#define MCF_SEC_DISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_DIMR */ -#define MCF_SEC_DIMR_DSE (0x10000) -#define MCF_SEC_DIMR_KSE (0x20000) -#define MCF_SEC_DIMR_CE (0x40000) -#define MCF_SEC_DIMR_ERE (0x80000) -#define MCF_SEC_DIMR_IE (0x100000) -#define MCF_SEC_DIMR_KPE (0x200000) -#define MCF_SEC_DIMR_OFU (0x2000000) -#define MCF_SEC_DIMR_IFO (0x4000000) -#define MCF_SEC_DIMR_IFE (0x10000000) -#define MCF_SEC_DIMR_OFE (0x20000000) -#define MCF_SEC_DIMR_AE (0x40000000) -#define MCF_SEC_DIMR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_MDRCR */ -#define MCF_SEC_MDRCR_SR (0x1000000) -#define MCF_SEC_MDRCR_MI (0x2000000) -#define MCF_SEC_MDRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_MDSR */ -#define MCF_SEC_MDSR_RD (0x1000000) -#define MCF_SEC_MDSR_ID (0x2000000) -#define MCF_SEC_MDSR_IE (0x4000000) -#define MCF_SEC_MDSR_IFW (0x10000000) -#define MCF_SEC_MDSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_MDISR */ -#define MCF_SEC_MDISR_DSE (0x10000) -#define MCF_SEC_MDISR_KSE (0x20000) -#define MCF_SEC_MDISR_CE (0x40000) -#define MCF_SEC_MDISR_ERE (0x80000) -#define MCF_SEC_MDISR_IE (0x100000) -#define MCF_SEC_MDISR_IFO (0x4000000) -#define MCF_SEC_MDISR_AE (0x40000000) -#define MCF_SEC_MDISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_MDIMR */ -#define MCF_SEC_MDIMR_DSE (0x10000) -#define MCF_SEC_MDIMR_KSE (0x20000) -#define MCF_SEC_MDIMR_CE (0x40000) -#define MCF_SEC_MDIMR_ERE (0x80000) -#define MCF_SEC_MDIMR_IE (0x100000) -#define MCF_SEC_MDIMR_IFO (0x4000000) -#define MCF_SEC_MDIMR_AE (0x40000000) -#define MCF_SEC_MDIMR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_RNGRCR */ -#define MCF_SEC_RNGRCR_SR (0x1000000) -#define MCF_SEC_RNGRCR_MI (0x2000000) -#define MCF_SEC_RNGRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_RNGSR */ -#define MCF_SEC_RNGSR_RD (0x1000000) -#define MCF_SEC_RNGSR_IE (0x4000000) -#define MCF_SEC_RNGSR_OFR (0x8000000) -#define MCF_SEC_RNGSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_RNGISR */ -#define MCF_SEC_RNGISR_IE (0x100000) -#define MCF_SEC_RNGISR_OFU (0x2000000) -#define MCF_SEC_RNGISR_AE (0x40000000) -#define MCF_SEC_RNGISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_RNGIMR */ -#define MCF_SEC_RNGIMR_IE (0x100000) -#define MCF_SEC_RNGIMR_OFU (0x2000000) -#define MCF_SEC_RNGIMR_AE (0x40000000) -#define MCF_SEC_RNGIMR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_AESRCR */ -#define MCF_SEC_AESRCR_SR (0x1000000) -#define MCF_SEC_AESRCR_MI (0x2000000) -#define MCF_SEC_AESRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_AESSR */ -#define MCF_SEC_AESSR_RD (0x1000000) -#define MCF_SEC_AESSR_ID (0x2000000) -#define MCF_SEC_AESSR_IE (0x4000000) -#define MCF_SEC_AESSR_OFR (0x8000000) -#define MCF_SEC_AESSR_IFW (0x10000000) -#define MCF_SEC_AESSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_AESISR */ -#define MCF_SEC_AESISR_DSE (0x10000) -#define MCF_SEC_AESISR_KSE (0x20000) -#define MCF_SEC_AESISR_CE (0x40000) -#define MCF_SEC_AESISR_ERE (0x80000) -#define MCF_SEC_AESISR_IE (0x100000) -#define MCF_SEC_AESISR_OFU (0x2000000) -#define MCF_SEC_AESISR_IFO (0x4000000) -#define MCF_SEC_AESISR_IFE (0x10000000) -#define MCF_SEC_AESISR_OFE (0x20000000) -#define MCF_SEC_AESISR_AE (0x40000000) -#define MCF_SEC_AESISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_AESIMR */ -#define MCF_SEC_AESIMR_DSE (0x10000) -#define MCF_SEC_AESIMR_KSE (0x20000) -#define MCF_SEC_AESIMR_CE (0x40000) -#define MCF_SEC_AESIMR_ERE (0x80000) -#define MCF_SEC_AESIMR_IE (0x100000) -#define MCF_SEC_AESIMR_OFU (0x2000000) -#define MCF_SEC_AESIMR_IFO (0x4000000) -#define MCF_SEC_AESIMR_IFE (0x10000000) -#define MCF_SEC_AESIMR_OFE (0x20000000) -#define MCF_SEC_AESIMR_AE (0x40000000) -#define MCF_SEC_AESIMR_ME (0x80000000) - - -#endif /* __MCF5475_SEC_H__ */ diff --git a/include/MCF5475_SIU.h b/include/MCF5475_SIU.h deleted file mode 100644 index efb2896..0000000 --- a/include/MCF5475_SIU.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SIU_H__ -#define __MCF5475_SIU_H__ - - -/********************************************************************* -* -* System Integration Unit (SIU) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SIU_SBCR (*(volatile uint32_t*)(&_MBAR[0x10])) -#define MCF_SIU_SECSACR (*(volatile uint32_t*)(&_MBAR[0x38])) -#define MCF_SIU_RSR (*(volatile uint32_t*)(&_MBAR[0x44])) -#define MCF_SIU_JTAGID (*(volatile uint32_t*)(&_MBAR[0x50])) - - -/* Bit definitions and macros for MCF_SIU_SBCR */ -#define MCF_SIU_SBCR_PIN2DSPI (0x8000000) -#define MCF_SIU_SBCR_DMA2CPU (0x10000000) -#define MCF_SIU_SBCR_CPU2DMA (0x20000000) -#define MCF_SIU_SBCR_PIN2DMA (0x40000000) -#define MCF_SIU_SBCR_PIN2CPU (0x80000000) - -/* Bit definitions and macros for MCF_SIU_SECSACR */ -#define MCF_SIU_SECSACR_SEQEN (0x1) - -/* Bit definitions and macros for MCF_SIU_RSR */ -#define MCF_SIU_RSR_RST (0x1) -#define MCF_SIU_RSR_RSTWD (0x2) -#define MCF_SIU_RSR_RSTJTG (0x8) - -/* Bit definitions and macros for MCF_SIU_JTAGID */ -#define MCF_SIU_JTAGID_JTAGID(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SIU_JTAGID */ -#define MCF_SIU_JTAGID_REV (0xF0000000) -#define MCF_SIU_JTAGID_PROCESSOR (0x0FFFFFFF) -#define MCF_SIU_JTAGID_MCF5485 (0x0800C01D) -#define MCF_SIU_JTAGID_MCF5484 (0x0800D01D) -#define MCF_SIU_JTAGID_MCF5483 (0x0800E01D) -#define MCF_SIU_JTAGID_MCF5482 (0x0800F01D) -#define MCF_SIU_JTAGID_MCF5481 (0x0801001D) -#define MCF_SIU_JTAGID_MCF5480 (0x0801101D) -#define MCF_SIU_JTAGID_MCF5475 (0x0801201D) -#define MCF_SIU_JTAGID_MCF5474 (0x0801301D) -#define MCF_SIU_JTAGID_MCF5473 (0x0801401D) -#define MCF_SIU_JTAGID_MCF5472 (0x0801501D) -#define MCF_SIU_JTAGID_MCF5471 (0x0801601D) -#define MCF_SIU_JTAGID_MCF5470 (0x0801701D) - -#endif /* __MCF5475_SIU_H__ */ diff --git a/include/MCF5475_SLT.h b/include/MCF5475_SLT.h deleted file mode 100644 index 20e8558..0000000 --- a/include/MCF5475_SLT.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SLT_H__ -#define __MCF5475_SLT_H__ - - -/********************************************************************* -* -* Slice Timers (SLT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SLT0_STCNT (*(volatile uint32_t*)(&_MBAR[0x900])) -#define MCF_SLT0_SCR (*(volatile uint32_t*)(&_MBAR[0x904])) -#define MCF_SLT0_SCNT (*(volatile uint32_t*)(&_MBAR[0x908])) -#define MCF_SLT0_SSR (*(volatile uint32_t*)(&_MBAR[0x90C])) - -#define MCF_SLT1_STCNT (*(volatile uint32_t*)(&_MBAR[0x910])) -#define MCF_SLT1_SCR (*(volatile uint32_t*)(&_MBAR[0x914])) -#define MCF_SLT1_SCNT (*(volatile uint32_t*)(&_MBAR[0x918])) -#define MCF_SLT1_SSR (*(volatile uint32_t*)(&_MBAR[0x91C])) - -#define MCF_SLT_STCNT(x) (*(volatile uint32_t*)(&_MBAR[0x900 + ((x)*0x10)])) -#define MCF_SLT_SCR(x) (*(volatile uint32_t*)(&_MBAR[0x904 + ((x)*0x10)])) -#define MCF_SLT_SCNT(x) (*(volatile int32_t*)(&_MBAR[0x908 + ((x)*0x10)])) -#define MCF_SLT_SSR(x) (*(volatile uint32_t*)(&_MBAR[0x90C + ((x)*0x10)])) - - -/* Bit definitions and macros for MCF_SLT_STCNT */ -#define MCF_SLT_STCNT_TC(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SLT_SCR */ -#define MCF_SLT_SCR_TEN (0x1000000) -#define MCF_SLT_SCR_IEN (0x2000000) -#define MCF_SLT_SCR_RUN (0x4000000) - -/* Bit definitions and macros for MCF_SLT_SCNT */ -#define MCF_SLT_SCNT_CNT(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SLT_SSR */ -#define MCF_SLT_SSR_ST (0x1000000) -#define MCF_SLT_SSR_BE (0x2000000) - - -#endif /* __MCF5475_SLT_H__ */ diff --git a/include/MCF5475_SRAM.h b/include/MCF5475_SRAM.h deleted file mode 100644 index d111f13..0000000 --- a/include/MCF5475_SRAM.h +++ /dev/null @@ -1,62 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SRAM_H__ -#define __MCF5475_SRAM_H__ - - -/********************************************************************* -* -* System SRAM Module (SRAM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SRAM_SSCR (*(volatile uint32_t*)(&__MBAR[0x1FFC0])) -#define MCF_SRAM_TCCR (*(volatile uint32_t*)(&__MBAR[0x1FFC4])) -#define MCF_SRAM_TCCRDR (*(volatile uint32_t*)(&__MBAR[0x1FFC8])) -#define MCF_SRAM_TCCRDW (*(volatile uint32_t*)(&__MBAR[0x1FFCC])) -#define MCF_SRAM_TCCRSEC (*(volatile uint32_t*)(&__MBAR[0x1FFD0])) - - -/* Bit definitions and macros for MCF_SRAM_SSCR */ -#define MCF_SRAM_SSCR_INLV (0x10000) - -/* Bit definitions and macros for MCF_SRAM_TCCR */ -#define MCF_SRAM_TCCR_BANK0_TC(x) (((x)&0xF)<<0) -#define MCF_SRAM_TCCR_BANK1_TC(x) (((x)&0xF)<<0x8) -#define MCF_SRAM_TCCR_BANK2_TC(x) (((x)&0xF)<<0x10) -#define MCF_SRAM_TCCR_BANK3_TC(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SRAM_TCCRDR */ -#define MCF_SRAM_TCCRDR_BANK0_TC(x) (((x)&0xF)<<0) -#define MCF_SRAM_TCCRDR_BANK1_TC(x) (((x)&0xF)<<0x8) -#define MCF_SRAM_TCCRDR_BANK2_TC(x) (((x)&0xF)<<0x10) -#define MCF_SRAM_TCCRDR_BANK3_TC(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SRAM_TCCRDW */ -#define MCF_SRAM_TCCRDW_BANK0_TC(x) (((x)&0xF)<<0) -#define MCF_SRAM_TCCRDW_BANK1_TC(x) (((x)&0xF)<<0x8) -#define MCF_SRAM_TCCRDW_BANK2_TC(x) (((x)&0xF)<<0x10) -#define MCF_SRAM_TCCRDW_BANK3_TC(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SRAM_TCCRSEC */ -#define MCF_SRAM_TCCRSEC_BANK0_TC(x) (((x)&0xF)<<0) -#define MCF_SRAM_TCCRSEC_BANK1_TC(x) (((x)&0xF)<<0x8) -#define MCF_SRAM_TCCRSEC_BANK2_TC(x) (((x)&0xF)<<0x10) -#define MCF_SRAM_TCCRSEC_BANK3_TC(x) (((x)&0xF)<<0x18) - - -#endif /* __MCF5475_SRAM_H__ */ diff --git a/include/MCF5475_USB.h b/include/MCF5475_USB.h deleted file mode 100644 index c60273c..0000000 --- a/include/MCF5475_USB.h +++ /dev/null @@ -1,554 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_USB_H__ -#define __MCF5475_USB_H__ - - -/********************************************************************* -* -* Universal Serial Bus Interface (USB) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_USB_USBAISR (*(volatile uint8_t *)(&__MBAR[0xB000])) -#define MCF_USB_USBAIMR (*(volatile uint8_t *)(&__MBAR[0xB001])) -#define MCF_USB_EPINFO (*(volatile uint8_t *)(&__MBAR[0xB003])) -#define MCF_USB_CFGR (*(volatile uint8_t *)(&__MBAR[0xB004])) -#define MCF_USB_CFGAR (*(volatile uint8_t *)(&__MBAR[0xB005])) -#define MCF_USB_SPEEDR (*(volatile uint8_t *)(&__MBAR[0xB006])) -#define MCF_USB_FRMNUMR (*(volatile uint16_t*)(&__MBAR[0xB00E])) -#define MCF_USB_EPTNR (*(volatile uint16_t*)(&__MBAR[0xB010])) -#define MCF_USB_IFUR (*(volatile uint16_t*)(&__MBAR[0xB014])) -#define MCF_USB_IFR0 (*(volatile uint16_t*)(&__MBAR[0xB040])) -#define MCF_USB_IFR1 (*(volatile uint16_t*)(&__MBAR[0xB042])) -#define MCF_USB_IFR2 (*(volatile uint16_t*)(&__MBAR[0xB044])) -#define MCF_USB_IFR3 (*(volatile uint16_t*)(&__MBAR[0xB046])) -#define MCF_USB_IFR4 (*(volatile uint16_t*)(&__MBAR[0xB048])) -#define MCF_USB_IFR5 (*(volatile uint16_t*)(&__MBAR[0xB04A])) -#define MCF_USB_IFR6 (*(volatile uint16_t*)(&__MBAR[0xB04C])) -#define MCF_USB_IFR7 (*(volatile uint16_t*)(&__MBAR[0xB04E])) -#define MCF_USB_IFR8 (*(volatile uint16_t*)(&__MBAR[0xB050])) -#define MCF_USB_IFR9 (*(volatile uint16_t*)(&__MBAR[0xB052])) -#define MCF_USB_IFR10 (*(volatile uint16_t*)(&__MBAR[0xB054])) -#define MCF_USB_IFR11 (*(volatile uint16_t*)(&__MBAR[0xB056])) -#define MCF_USB_IFR12 (*(volatile uint16_t*)(&__MBAR[0xB058])) -#define MCF_USB_IFR13 (*(volatile uint16_t*)(&__MBAR[0xB05A])) -#define MCF_USB_IFR14 (*(volatile uint16_t*)(&__MBAR[0xB05C])) -#define MCF_USB_IFR15 (*(volatile uint16_t*)(&__MBAR[0xB05E])) -#define MCF_USB_IFR16 (*(volatile uint16_t*)(&__MBAR[0xB060])) -#define MCF_USB_IFR17 (*(volatile uint16_t*)(&__MBAR[0xB062])) -#define MCF_USB_IFR18 (*(volatile uint16_t*)(&__MBAR[0xB064])) -#define MCF_USB_IFR19 (*(volatile uint16_t*)(&__MBAR[0xB066])) -#define MCF_USB_IFR20 (*(volatile uint16_t*)(&__MBAR[0xB068])) -#define MCF_USB_IFR21 (*(volatile uint16_t*)(&__MBAR[0xB06A])) -#define MCF_USB_IFR22 (*(volatile uint16_t*)(&__MBAR[0xB06C])) -#define MCF_USB_IFR23 (*(volatile uint16_t*)(&__MBAR[0xB06E])) -#define MCF_USB_IFR24 (*(volatile uint16_t*)(&__MBAR[0xB070])) -#define MCF_USB_IFR25 (*(volatile uint16_t*)(&__MBAR[0xB072])) -#define MCF_USB_IFR26 (*(volatile uint16_t*)(&__MBAR[0xB074])) -#define MCF_USB_IFR27 (*(volatile uint16_t*)(&__MBAR[0xB076])) -#define MCF_USB_IFR28 (*(volatile uint16_t*)(&__MBAR[0xB078])) -#define MCF_USB_IFR29 (*(volatile uint16_t*)(&__MBAR[0xB07A])) -#define MCF_USB_IFR30 (*(volatile uint16_t*)(&__MBAR[0xB07C])) -#define MCF_USB_IFR31 (*(volatile uint16_t*)(&__MBAR[0xB07E])) -#define MCF_USB_PPCNT (*(volatile uint16_t*)(&__MBAR[0xB080])) -#define MCF_USB_DPCNT (*(volatile uint16_t*)(&__MBAR[0xB082])) -#define MCF_USB_CRCECNT (*(volatile uint16_t*)(&__MBAR[0xB084])) -#define MCF_USB_BSECNT (*(volatile uint16_t*)(&__MBAR[0xB086])) -#define MCF_USB_PIDECNT (*(volatile uint16_t*)(&__MBAR[0xB088])) -#define MCF_USB_FRMECNT (*(volatile uint16_t*)(&__MBAR[0xB08A])) -#define MCF_USB_TXPCNT (*(volatile uint16_t*)(&__MBAR[0xB08C])) -#define MCF_USB_CNTOVR (*(volatile uint8_t *)(&__MBAR[0xB08E])) -#define MCF_USB_EP0ACR (*(volatile uint8_t *)(&__MBAR[0xB101])) -#define MCF_USB_EP0MPSR (*(volatile uint16_t*)(&__MBAR[0xB102])) -#define MCF_USB_EP0IFR (*(volatile uint8_t *)(&__MBAR[0xB104])) -#define MCF_USB_EP0SR (*(volatile uint8_t *)(&__MBAR[0xB105])) -#define MCF_USB_BMRTR (*(volatile uint8_t *)(&__MBAR[0xB106])) -#define MCF_USB_BRTR (*(volatile uint8_t *)(&__MBAR[0xB107])) -#define MCF_USB_WVALUER (*(volatile uint16_t*)(&__MBAR[0xB108])) -#define MCF_USB_WINDEXR (*(volatile uint16_t*)(&__MBAR[0xB10A])) -#define MCF_USB_WLENGTHR (*(volatile uint16_t*)(&__MBAR[0xB10C])) -#define MCF_USB_EP1OUTACR (*(volatile uint8_t *)(&__MBAR[0xB131])) -#define MCF_USB_EP1OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB132])) -#define MCF_USB_EP1OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB134])) -#define MCF_USB_EP1OUTSR (*(volatile uint8_t *)(&__MBAR[0xB135])) -#define MCF_USB_EP1OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB13E])) -#define MCF_USB_EP1INACR (*(volatile uint8_t *)(&__MBAR[0xB149])) -#define MCF_USB_EP1INMPSR (*(volatile uint16_t*)(&__MBAR[0xB14A])) -#define MCF_USB_EP1INIFR (*(volatile uint8_t *)(&__MBAR[0xB14C])) -#define MCF_USB_EP1INSR (*(volatile uint8_t *)(&__MBAR[0xB14D])) -#define MCF_USB_EP1INSFR (*(volatile uint16_t*)(&__MBAR[0xB156])) -#define MCF_USB_EP2OUTACR (*(volatile uint8_t *)(&__MBAR[0xB161])) -#define MCF_USB_EP2OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB162])) -#define MCF_USB_EP2OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB164])) -#define MCF_USB_EP2OUTSR (*(volatile uint8_t *)(&__MBAR[0xB165])) -#define MCF_USB_EP2OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB16E])) -#define MCF_USB_EP2INACR (*(volatile uint8_t *)(&__MBAR[0xB179])) -#define MCF_USB_EP2INMPSR (*(volatile uint16_t*)(&__MBAR[0xB17A])) -#define MCF_USB_EP2INIFR (*(volatile uint8_t *)(&__MBAR[0xB17C])) -#define MCF_USB_EP2INSR (*(volatile uint8_t *)(&__MBAR[0xB17D])) -#define MCF_USB_EP2INSFR (*(volatile uint16_t*)(&__MBAR[0xB186])) -#define MCF_USB_EP3OUTACR (*(volatile uint8_t *)(&__MBAR[0xB191])) -#define MCF_USB_EP3OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB192])) -#define MCF_USB_EP3OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB194])) -#define MCF_USB_EP3OUTSR (*(volatile uint8_t *)(&__MBAR[0xB195])) -#define MCF_USB_EP3OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB19E])) -#define MCF_USB_EP3INACR (*(volatile uint8_t *)(&__MBAR[0xB1A9])) -#define MCF_USB_EP3INMPSR (*(volatile uint16_t*)(&__MBAR[0xB1AA])) -#define MCF_USB_EP3INIFR (*(volatile uint8_t *)(&__MBAR[0xB1AC])) -#define MCF_USB_EP3INSR (*(volatile uint8_t *)(&__MBAR[0xB1AD])) -#define MCF_USB_EP3INSFR (*(volatile uint16_t*)(&__MBAR[0xB1B6])) -#define MCF_USB_EP4OUTACR (*(volatile uint8_t *)(&__MBAR[0xB1C1])) -#define MCF_USB_EP4OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB1C2])) -#define MCF_USB_EP4OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB1C4])) -#define MCF_USB_EP4OUTSR (*(volatile uint8_t *)(&__MBAR[0xB1C5])) -#define MCF_USB_EP4OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB1CE])) -#define MCF_USB_EP4INACR (*(volatile uint8_t *)(&__MBAR[0xB1D9])) -#define MCF_USB_EP4INMPSR (*(volatile uint16_t*)(&__MBAR[0xB1DA])) -#define MCF_USB_EP4INIFR (*(volatile uint8_t *)(&__MBAR[0xB1DC])) -#define MCF_USB_EP4INSR (*(volatile uint8_t *)(&__MBAR[0xB1DD])) -#define MCF_USB_EP4INSFR (*(volatile uint16_t*)(&__MBAR[0xB1E6])) -#define MCF_USB_EP5OUTACR (*(volatile uint8_t *)(&__MBAR[0xB1F1])) -#define MCF_USB_EP5OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB1F2])) -#define MCF_USB_EP5OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB1F4])) -#define MCF_USB_EP5OUTSR (*(volatile uint8_t *)(&__MBAR[0xB1F5])) -#define MCF_USB_EP5OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB1FE])) -#define MCF_USB_EP5INACR (*(volatile uint8_t *)(&__MBAR[0xB209])) -#define MCF_USB_EP5INMPSR (*(volatile uint16_t*)(&__MBAR[0xB20A])) -#define MCF_USB_EP5INIFR (*(volatile uint8_t *)(&__MBAR[0xB20C])) -#define MCF_USB_EP5INSR (*(volatile uint8_t *)(&__MBAR[0xB20D])) -#define MCF_USB_EP5INSFR (*(volatile uint16_t*)(&__MBAR[0xB216])) -#define MCF_USB_EP6OUTACR (*(volatile uint8_t *)(&__MBAR[0xB221])) -#define MCF_USB_EP6OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB222])) -#define MCF_USB_EP6OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB224])) -#define MCF_USB_EP6OUTSR (*(volatile uint8_t *)(&__MBAR[0xB225])) -#define MCF_USB_EP6OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB22E])) -#define MCF_USB_EP6INACR (*(volatile uint8_t *)(&__MBAR[0xB239])) -#define MCF_USB_EP6INMPSR (*(volatile uint16_t*)(&__MBAR[0xB23A])) -#define MCF_USB_EP6INIFR (*(volatile uint8_t *)(&__MBAR[0xB23C])) -#define MCF_USB_EP6INSR (*(volatile uint8_t *)(&__MBAR[0xB23D])) -#define MCF_USB_EP6INSFR (*(volatile uint16_t*)(&__MBAR[0xB246])) -#define MCF_USB_USBSR (*(volatile uint32_t*)(&__MBAR[0xB400])) -#define MCF_USB_USBCR (*(volatile uint32_t*)(&__MBAR[0xB404])) -#define MCF_USB_DRAMCR (*(volatile uint32_t*)(&__MBAR[0xB408])) -#define MCF_USB_DRAMDR (*(volatile uint32_t*)(&__MBAR[0xB40C])) -#define MCF_USB_USBISR (*(volatile uint32_t*)(&__MBAR[0xB410])) -#define MCF_USB_USBIMR (*(volatile uint32_t*)(&__MBAR[0xB414])) -#define MCF_USB_EP0STAT (*(volatile uint32_t*)(&__MBAR[0xB440])) -#define MCF_USB_EP0ISR (*(volatile uint32_t*)(&__MBAR[0xB444])) -#define MCF_USB_EP0IMR (*(volatile uint32_t*)(&__MBAR[0xB448])) -#define MCF_USB_EP0FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB44C])) -#define MCF_USB_EP0FDR (*(volatile uint32_t*)(&__MBAR[0xB450])) -#define MCF_USB_EP0FSR (*(volatile uint32_t*)(&__MBAR[0xB454])) -#define MCF_USB_EP0FCR (*(volatile uint32_t*)(&__MBAR[0xB458])) -#define MCF_USB_EP0FAR (*(volatile uint32_t*)(&__MBAR[0xB45C])) -#define MCF_USB_EP0FRP (*(volatile uint32_t*)(&__MBAR[0xB460])) -#define MCF_USB_EP0FWP (*(volatile uint32_t*)(&__MBAR[0xB464])) -#define MCF_USB_EP0LRFP (*(volatile uint32_t*)(&__MBAR[0xB468])) -#define MCF_USB_EP0LWFP (*(volatile uint32_t*)(&__MBAR[0xB46C])) -#define MCF_USB_EP1STAT (*(volatile uint32_t*)(&__MBAR[0xB470])) -#define MCF_USB_EP1ISR (*(volatile uint32_t*)(&__MBAR[0xB474])) -#define MCF_USB_EP1IMR (*(volatile uint32_t*)(&__MBAR[0xB478])) -#define MCF_USB_EP1FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB47C])) -#define MCF_USB_EP1FDR (*(volatile uint32_t*)(&__MBAR[0xB480])) -#define MCF_USB_EP1FSR (*(volatile uint32_t*)(&__MBAR[0xB484])) -#define MCF_USB_EP1FCR (*(volatile uint32_t*)(&__MBAR[0xB488])) -#define MCF_USB_EP1FAR (*(volatile uint32_t*)(&__MBAR[0xB48C])) -#define MCF_USB_EP1FRP (*(volatile uint32_t*)(&__MBAR[0xB490])) -#define MCF_USB_EP1FWP (*(volatile uint32_t*)(&__MBAR[0xB494])) -#define MCF_USB_EP1LRFP (*(volatile uint32_t*)(&__MBAR[0xB498])) -#define MCF_USB_EP1LWFP (*(volatile uint32_t*)(&__MBAR[0xB49C])) -#define MCF_USB_EP2STAT (*(volatile uint32_t*)(&__MBAR[0xB4A0])) -#define MCF_USB_EP2ISR (*(volatile uint32_t*)(&__MBAR[0xB4A4])) -#define MCF_USB_EP2IMR (*(volatile uint32_t*)(&__MBAR[0xB4A8])) -#define MCF_USB_EP2FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB4AC])) -#define MCF_USB_EP2FDR (*(volatile uint32_t*)(&__MBAR[0xB4B0])) -#define MCF_USB_EP2FSR (*(volatile uint32_t*)(&__MBAR[0xB4B4])) -#define MCF_USB_EP2FCR (*(volatile uint32_t*)(&__MBAR[0xB4B8])) -#define MCF_USB_EP2FAR (*(volatile uint32_t*)(&__MBAR[0xB4BC])) -#define MCF_USB_EP2FRP (*(volatile uint32_t*)(&__MBAR[0xB4C0])) -#define MCF_USB_EP2FWP (*(volatile uint32_t*)(&__MBAR[0xB4C4])) -#define MCF_USB_EP2LRFP (*(volatile uint32_t*)(&__MBAR[0xB4C8])) -#define MCF_USB_EP2LWFP (*(volatile uint32_t*)(&__MBAR[0xB4CC])) -#define MCF_USB_EP3STAT (*(volatile uint32_t*)(&__MBAR[0xB4D0])) -#define MCF_USB_EP3ISR (*(volatile uint32_t*)(&__MBAR[0xB4D4])) -#define MCF_USB_EP3IMR (*(volatile uint32_t*)(&__MBAR[0xB4D8])) -#define MCF_USB_EP3FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB4DC])) -#define MCF_USB_EP3FDR (*(volatile uint32_t*)(&__MBAR[0xB4E0])) -#define MCF_USB_EP3FSR (*(volatile uint32_t*)(&__MBAR[0xB4E4])) -#define MCF_USB_EP3FCR (*(volatile uint32_t*)(&__MBAR[0xB4E8])) -#define MCF_USB_EP3FAR (*(volatile uint32_t*)(&__MBAR[0xB4EC])) -#define MCF_USB_EP3FRP (*(volatile uint32_t*)(&__MBAR[0xB4F0])) -#define MCF_USB_EP3FWP (*(volatile uint32_t*)(&__MBAR[0xB4F4])) -#define MCF_USB_EP3LRFP (*(volatile uint32_t*)(&__MBAR[0xB4F8])) -#define MCF_USB_EP3LWFP (*(volatile uint32_t*)(&__MBAR[0xB4FC])) -#define MCF_USB_EP4STAT (*(volatile uint32_t*)(&__MBAR[0xB500])) -#define MCF_USB_EP4ISR (*(volatile uint32_t*)(&__MBAR[0xB504])) -#define MCF_USB_EP4IMR (*(volatile uint32_t*)(&__MBAR[0xB508])) -#define MCF_USB_EP4FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB50C])) -#define MCF_USB_EP4FDR (*(volatile uint32_t*)(&__MBAR[0xB510])) -#define MCF_USB_EP4FSR (*(volatile uint32_t*)(&__MBAR[0xB514])) -#define MCF_USB_EP4FCR (*(volatile uint32_t*)(&__MBAR[0xB518])) -#define MCF_USB_EP4FAR (*(volatile uint32_t*)(&__MBAR[0xB51C])) -#define MCF_USB_EP4FRP (*(volatile uint32_t*)(&__MBAR[0xB520])) -#define MCF_USB_EP4FWP (*(volatile uint32_t*)(&__MBAR[0xB524])) -#define MCF_USB_EP4LRFP (*(volatile uint32_t*)(&__MBAR[0xB528])) -#define MCF_USB_EP4LWFP (*(volatile uint32_t*)(&__MBAR[0xB52C])) -#define MCF_USB_EP5STAT (*(volatile uint32_t*)(&__MBAR[0xB530])) -#define MCF_USB_EP5ISR (*(volatile uint32_t*)(&__MBAR[0xB534])) -#define MCF_USB_EP5IMR (*(volatile uint32_t*)(&__MBAR[0xB538])) -#define MCF_USB_EP5FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB53C])) -#define MCF_USB_EP5FDR (*(volatile uint32_t*)(&__MBAR[0xB540])) -#define MCF_USB_EP5FSR (*(volatile uint32_t*)(&__MBAR[0xB544])) -#define MCF_USB_EP5FCR (*(volatile uint32_t*)(&__MBAR[0xB548])) -#define MCF_USB_EP5FAR (*(volatile uint32_t*)(&__MBAR[0xB54C])) -#define MCF_USB_EP5FRP (*(volatile uint32_t*)(&__MBAR[0xB550])) -#define MCF_USB_EP5FWP (*(volatile uint32_t*)(&__MBAR[0xB554])) -#define MCF_USB_EP5LRFP (*(volatile uint32_t*)(&__MBAR[0xB558])) -#define MCF_USB_EP5LWFP (*(volatile uint32_t*)(&__MBAR[0xB55C])) -#define MCF_USB_EP6STAT (*(volatile uint32_t*)(&__MBAR[0xB560])) -#define MCF_USB_EP6ISR (*(volatile uint32_t*)(&__MBAR[0xB564])) -#define MCF_USB_EP6IMR (*(volatile uint32_t*)(&__MBAR[0xB568])) -#define MCF_USB_EP6FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB56C])) -#define MCF_USB_EP6FDR (*(volatile uint32_t*)(&__MBAR[0xB570])) -#define MCF_USB_EP6FSR (*(volatile uint32_t*)(&__MBAR[0xB574])) -#define MCF_USB_EP6FCR (*(volatile uint32_t*)(&__MBAR[0xB578])) -#define MCF_USB_EP6FAR (*(volatile uint32_t*)(&__MBAR[0xB57C])) -#define MCF_USB_EP6FRP (*(volatile uint32_t*)(&__MBAR[0xB580])) -#define MCF_USB_EP6FWP (*(volatile uint32_t*)(&__MBAR[0xB584])) -#define MCF_USB_EP6LRFP (*(volatile uint32_t*)(&__MBAR[0xB588])) -#define MCF_USB_EP6LWFP (*(volatile uint32_t*)(&__MBAR[0xB58C])) -#define MCF_USB_IFR(x) (*(volatile uint16_t*)(&__MBAR[0xB040 + ((x)*0x2)])) -#define MCF_USB_EPOUTACR(x) (*(volatile uint8_t *)(&__MBAR[0xB131 + ((x-1)*0x30)])) -#define MCF_USB_EPOUTMPSR(x) (*(volatile uint16_t*)(&__MBAR[0xB132 + ((x-1)*0x30)])) -#define MCF_USB_EPOUTIFR(x) (*(volatile uint8_t *)(&__MBAR[0xB134 + ((x-1)*0x30)])) -#define MCF_USB_EPOUTSR(x) (*(volatile uint8_t *)(&__MBAR[0xB135 + ((x-1)*0x30)])) -#define MCF_USB_EPOUTSFR(x) (*(volatile uint16_t*)(&__MBAR[0xB13E + ((x-1)*0x30)])) -#define MCF_USB_EPINACR(x) (*(volatile uint8_t *)(&__MBAR[0xB149 + ((x-1)*0x30)])) -#define MCF_USB_EPINMPSR(x) (*(volatile uint16_t*)(&__MBAR[0xB14A + ((x-1)*0x30)])) -#define MCF_USB_EPINIFR(x) (*(volatile uint8_t *)(&__MBAR[0xB14C + ((x-1)*0x30)])) -#define MCF_USB_EPINSR(x) (*(volatile uint8_t *)(&__MBAR[0xB14D + ((x-1)*0x30)])) -#define MCF_USB_EPINSFR(x) (*(volatile uint16_t*)(&__MBAR[0xB156 + ((x-1)*0x30)])) -#define MCF_USB_EPSTAT(x) (*(volatile uint32_t*)(&__MBAR[0xB440 + ((x)*0x30)])) -#define MCF_USB_EPISR(x) (*(volatile uint32_t*)(&__MBAR[0xB444 + ((x)*0x30)])) -#define MCF_USB_EPIMR(x) (*(volatile uint32_t*)(&__MBAR[0xB448 + ((x)*0x30)])) -#define MCF_USB_EPFRCFGR(x) (*(volatile uint32_t*)(&__MBAR[0xB44C + ((x)*0x30)])) -#define MCF_USB_EPFDR(x) (*(volatile uint32_t*)(&__MBAR[0xB450 + ((x)*0x30)])) -#define MCF_USB_EPFSR(x) (*(volatile uint32_t*)(&__MBAR[0xB454 + ((x)*0x30)])) -#define MCF_USB_EPFCR(x) (*(volatile uint32_t*)(&__MBAR[0xB458 + ((x)*0x30)])) -#define MCF_USB_EPFAR(x) (*(volatile uint32_t*)(&__MBAR[0xB45C + ((x)*0x30)])) -#define MCF_USB_EPFRP(x) (*(volatile uint32_t*)(&__MBAR[0xB460 + ((x)*0x30)])) -#define MCF_USB_EPFWP(x) (*(volatile uint32_t*)(&__MBAR[0xB464 + ((x)*0x30)])) -#define MCF_USB_EPLRFP(x) (*(volatile uint32_t*)(&__MBAR[0xB468 + ((x)*0x30)])) -#define MCF_USB_EPLWFP(x) (*(volatile uint32_t*)(&__MBAR[0xB46C + ((x)*0x30)])) - - -/* Bit definitions and macros for MCF_USB_USBAISR */ -#define MCF_USB_USBAISR_SETUP (0x1) -#define MCF_USB_USBAISR_IN (0x2) -#define MCF_USB_USBAISR_OUT (0x4) -#define MCF_USB_USBAISR_EPHALT (0x8) -#define MCF_USB_USBAISR_TRANSERR (0x10) -#define MCF_USB_USBAISR_ACK (0x20) -#define MCF_USB_USBAISR_CTROVFL (0x40) -#define MCF_USB_USBAISR_EPSTALL (0x80) - -/* Bit definitions and macros for MCF_USB_USBAIMR */ -#define MCF_USB_USBAIMR_SETUPEN (0x1) -#define MCF_USB_USBAIMR_INEN (0x2) -#define MCF_USB_USBAIMR_OUTEN (0x4) -#define MCF_USB_USBAIMR_EPHALTEN (0x8) -#define MCF_USB_USBAIMR_TRANSERREN (0x10) -#define MCF_USB_USBAIMR_ACKEN (0x20) -#define MCF_USB_USBAIMR_CTROVFLEN (0x40) -#define MCF_USB_USBAIMR_EPSTALLEN (0x80) - -/* Bit definitions and macros for MCF_USB_EPINFO */ -#define MCF_USB_EPINFO_EPDIR (0x1) -#define MCF_USB_EPINFO_EPNUM(x) (((x)&0x7)<<0x1) - -/* Bit definitions and macros for MCF_USB_CFGR */ -#define MCF_USB_CFGR_Configuration_Value(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_CFGAR */ -#define MCF_USB_CFGAR_RESERVED (0xA0) -#define MCF_USB_CFGAR_RMTWKEUP (0xE0) - -/* Bit definitions and macros for MCF_USB_SPEEDR */ -#define MCF_USB_SPEEDR_SPEED(x) (((x)&0x3)<<0) - -/* Bit definitions and macros for MCF_USB_FRMNUMR */ -#define MCF_USB_FRMNUMR_FRMNUM(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPTNR */ -#define MCF_USB_EPTNR_EP1T(x) (((x)&0x3)<<0) -#define MCF_USB_EPTNR_EP2T(x) (((x)&0x3)<<0x2) -#define MCF_USB_EPTNR_EP3T(x) (((x)&0x3)<<0x4) -#define MCF_USB_EPTNR_EP4T(x) (((x)&0x3)<<0x6) -#define MCF_USB_EPTNR_EP5T(x) (((x)&0x3)<<0x8) -#define MCF_USB_EPTNR_EP6T(x) (((x)&0x3)<<0xA) -#define MCF_USB_EPTNR_EPnT1 (0) -#define MCF_USB_EPTNR_EPnT2 (0x1) -#define MCF_USB_EPTNR_EPnT3 (0x2) - -/* Bit definitions and macros for MCF_USB_IFUR */ -#define MCF_USB_IFUR_ALTSET(x) (((x)&0xFF)<<0) -#define MCF_USB_IFUR_IFNUM(x) (((x)&0xFF)<<0x8) - -/* Bit definitions and macros for MCF_USB_IFR */ -#define MCF_USB_IFR_ALTSET(x) (((x)&0xFF)<<0) -#define MCF_USB_IFR_IFNUM(x) (((x)&0xFF)<<0x8) - -/* Bit definitions and macros for MCF_USB_PPCNT */ -#define MCF_USB_PPCNT_PPCNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_DPCNT */ -#define MCF_USB_DPCNT_DPCNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_CRCECNT */ -#define MCF_USB_CRCECNT_CRCECNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_BSECNT */ -#define MCF_USB_BSECNT_BSECNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_PIDECNT */ -#define MCF_USB_PIDECNT_PIDECNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_FRMECNT */ -#define MCF_USB_FRMECNT_FRMECNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_TXPCNT */ -#define MCF_USB_TXPCNT_TXPCNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_CNTOVR */ -#define MCF_USB_CNTOVR_PPCNT (0x1) -#define MCF_USB_CNTOVR_DPCNT (0x2) -#define MCF_USB_CNTOVR_CRCECNT (0x4) -#define MCF_USB_CNTOVR_BSECNT (0x8) -#define MCF_USB_CNTOVR_PIDECNT (0x10) -#define MCF_USB_CNTOVR_FRMECNT (0x20) -#define MCF_USB_CNTOVR_TXPCNT (0x40) - -/* Bit definitions and macros for MCF_USB_EP0ACR */ -#define MCF_USB_EP0ACR_TTYPE(x) (((x)&0x3)<<0) -#define MCF_USB_EP0ACR_TTYPE_CTRL (0) -#define MCF_USB_EP0ACR_TTYPE_ISOC (0x1) -#define MCF_USB_EP0ACR_TTYPE_BULK (0x2) -#define MCF_USB_EP0ACR_TTYPE_INT (0x3) - -/* Bit definitions and macros for MCF_USB_EP0MPSR */ -#define MCF_USB_EP0MPSR_MAXPKTSZ(x) (((x)&0x7FF)<<0) -#define MCF_USB_EP0MPSR_ADDTRANS(x) (((x)&0x3)<<0xB) - -/* Bit definitions and macros for MCF_USB_EP0IFR */ -#define MCF_USB_EP0IFR_IFNUM(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_EP0SR */ -#define MCF_USB_EP0SR_HALT (0x1) -#define MCF_USB_EP0SR_ACTIVE (0x2) -#define MCF_USB_EP0SR_PSTALL (0x4) -#define MCF_USB_EP0SR_CCOMP (0x8) -#define MCF_USB_EP0SR_TXZERO (0x20) -#define MCF_USB_EP0SR_INT (0x80) - -/* Bit definitions and macros for MCF_USB_BMRTR */ -#define MCF_USB_BMRTR_REC(x) (((x)&0x1F)<<0) -#define MCF_USB_BMRTR_REC_DEVICE (0) -#define MCF_USB_BMRTR_REC_INTERFACE (0x1) -#define MCF_USB_BMRTR_REC_ENDPOINT (0x2) -#define MCF_USB_BMRTR_REC_OTHER (0x3) -#define MCF_USB_BMRTR_TYPE(x) (((x)&0x3)<<0x5) -#define MCF_USB_BMRTR_TYPE_STANDARD (0) -#define MCF_USB_BMRTR_TYPE_CLASS (0x20) -#define MCF_USB_BMRTR_TYPE_VENDOR (0x40) -#define MCF_USB_BMRTR_DIR (0x80) - -/* Bit definitions and macros for MCF_USB_BRTR */ -#define MCF_USB_BRTR_BREQ(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_WVALUER */ -#define MCF_USB_WVALUER_WVALUE(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_WINDEXR */ -#define MCF_USB_WINDEXR_WINDEX(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_WLENGTHR */ -#define MCF_USB_WLENGTHR_WLENGTH(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPOUTACR */ -#define MCF_USB_EPOUTACR_TTYPE(x) (((x)&0x3)<<0) -#define MCF_USB_EPOUTACR_TTYPE_ISOC (0x1) -#define MCF_USB_EPOUTACR_TTYPE_BULK (0x2) -#define MCF_USB_EPOUTACR_TTYPE_INT (0x3) - -/* Bit definitions and macros for MCF_USB_EPOUTMPSR */ -#define MCF_USB_EPOUTMPSR_MAXPKTSZ(x) (((x)&0x7FF)<<0) -#define MCF_USB_EPOUTMPSR_ADDTRANS(x) (((x)&0x3)<<0xB) - -/* Bit definitions and macros for MCF_USB_EPOUTIFR */ -#define MCF_USB_EPOUTIFR_IFNUM(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPOUTSR */ -#define MCF_USB_EPOUTSR_HALT (0x1) -#define MCF_USB_EPOUTSR_ACTIVE (0x2) -#define MCF_USB_EPOUTSR_PSTALL (0x4) -#define MCF_USB_EPOUTSR_CCOMP (0x8) -#define MCF_USB_EPOUTSR_TXZERO (0x20) -#define MCF_USB_EPOUTSR_INT (0x80) - -/* Bit definitions and macros for MCF_USB_EPOUTSFR */ -#define MCF_USB_EPOUTSFR_FRMNUM(x) (((x)&0x7FF)<<0) - -/* Bit definitions and macros for MCF_USB_EPINACR */ -#define MCF_USB_EPINACR_TTYPE(x) (((x)&0x3)<<0) -#define MCF_USB_EPINACR_TTYPE_ISOC (0x1) -#define MCF_USB_EPINACR_TTYPE_BULK (0x2) -#define MCF_USB_EPINACR_TTYPE_INT (0x3) - -/* Bit definitions and macros for MCF_USB_EPINMPSR */ -#define MCF_USB_EPINMPSR_MAXPKTSZ(x) (((x)&0x7FF)<<0) -#define MCF_USB_EPINMPSR_ADDTRANS(x) (((x)&0x3)<<0xB) - -/* Bit definitions and macros for MCF_USB_EPINIFR */ -#define MCF_USB_EPINIFR_IFNUM(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPINSR */ -#define MCF_USB_EPINSR_HALT (0x1) -#define MCF_USB_EPINSR_ACTIVE (0x2) -#define MCF_USB_EPINSR_PSTALL (0x4) -#define MCF_USB_EPINSR_CCOMP (0x8) -#define MCF_USB_EPINSR_TXZERO (0x20) -#define MCF_USB_EPINSR_INT (0x80) - -/* Bit definitions and macros for MCF_USB_EPINSFR */ -#define MCF_USB_EPINSFR_FRMNUM(x) (((x)&0x7FF)<<0) - -/* Bit definitions and macros for MCF_USB_USBSR */ -#define MCF_USB_USBSR_ISOERREP(x) (((x)&0xF)<<0) -#define MCF_USB_USBSR_SUSP (0x80) - -/* Bit definitions and macros for MCF_USB_USBCR */ -#define MCF_USB_USBCR_RESUME (0x1) -#define MCF_USB_USBCR_APPLOCK (0x2) -#define MCF_USB_USBCR_RST (0x4) -#define MCF_USB_USBCR_RAMEN (0x8) -#define MCF_USB_USBCR_RAMSPLIT (0x20) - -/* Bit definitions and macros for MCF_USB_DRAMCR */ -#define MCF_USB_DRAMCR_DADR(x) (((x)&0x3FF)<<0) -#define MCF_USB_DRAMCR_DSIZE(x) (((x)&0x7FF)<<0x10) -#define MCF_USB_DRAMCR_BSY (0x40000000) -#define MCF_USB_DRAMCR_START (0x80000000) - -/* Bit definitions and macros for MCF_USB_DRAMDR */ -#define MCF_USB_DRAMDR_DDAT(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_USBISR */ -#define MCF_USB_USBISR_ISOERR (0x1) -#define MCF_USB_USBISR_FTUNLCK (0x2) -#define MCF_USB_USBISR_SUSP (0x4) -#define MCF_USB_USBISR_RES (0x8) -#define MCF_USB_USBISR_UPDSOF (0x10) -#define MCF_USB_USBISR_RSTSTOP (0x20) -#define MCF_USB_USBISR_SOF (0x40) -#define MCF_USB_USBISR_MSOF (0x80) - -/* Bit definitions and macros for MCF_USB_USBIMR */ -#define MCF_USB_USBIMR_ISOERR (0x1) -#define MCF_USB_USBIMR_FTUNLCK (0x2) -#define MCF_USB_USBIMR_SUSP (0x4) -#define MCF_USB_USBIMR_RES (0x8) -#define MCF_USB_USBIMR_UPDSOF (0x10) -#define MCF_USB_USBIMR_RSTSTOP (0x20) -#define MCF_USB_USBIMR_SOF (0x40) -#define MCF_USB_USBIMR_MSOF (0x80) - -/* Bit definitions and macros for MCF_USB_EPSTAT */ -#define MCF_USB_EPSTAT_RST (0x1) -#define MCF_USB_EPSTAT_FLUSH (0x2) -#define MCF_USB_EPSTAT_DIR (0x80) -#define MCF_USB_EPSTAT_BYTECNT(x) (((x)&0xFFF)<<0x10) - -/* Bit definitions and macros for MCF_USB_EPISR */ -#define MCF_USB_EPISR_EOF (0x1) -#define MCF_USB_EPISR_EOT (0x4) -#define MCF_USB_EPISR_FIFOLO (0x10) -#define MCF_USB_EPISR_FIFOHI (0x20) -#define MCF_USB_EPISR_ERR (0x40) -#define MCF_USB_EPISR_EMT (0x80) -#define MCF_USB_EPISR_FU (0x100) - -/* Bit definitions and macros for MCF_USB_EPIMR */ -#define MCF_USB_EPIMR_EOF (0x1) -#define MCF_USB_EPIMR_EOT (0x4) -#define MCF_USB_EPIMR_FIFOLO (0x10) -#define MCF_USB_EPIMR_FIFOHI (0x20) -#define MCF_USB_EPIMR_ERR (0x40) -#define MCF_USB_EPIMR_EMT (0x80) -#define MCF_USB_EPIMR_FU (0x100) - -/* Bit definitions and macros for MCF_USB_EPFRCFGR */ -#define MCF_USB_EPFRCFGR_DEPTH(x) (((x)&0x1FFF)<<0) -#define MCF_USB_EPFRCFGR_BASE(x) (((x)&0xFFF)<<0x10) - -/* Bit definitions and macros for MCF_USB_EPFDR */ -#define MCF_USB_EPFDR_RX_TXDATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPFSR */ -#define MCF_USB_EPFSR_EMT (0x10000) -#define MCF_USB_EPFSR_ALRM (0x20000) -#define MCF_USB_EPFSR_FU (0x40000) -#define MCF_USB_EPFSR_FR (0x80000) -#define MCF_USB_EPFSR_OF (0x100000) -#define MCF_USB_EPFSR_UF (0x200000) -#define MCF_USB_EPFSR_RXW (0x400000) -#define MCF_USB_EPFSR_FAE (0x800000) -#define MCF_USB_EPFSR_FRM(x) (((x)&0xF)<<0x18) -#define MCF_USB_EPFSR_TXW (0x40000000) -#define MCF_USB_EPFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_USB_EPFCR */ -#define MCF_USB_EPFCR_COUNTER(x) (((x)&0xFFFF)<<0) -#define MCF_USB_EPFCR_TXWMSK (0x40000) -#define MCF_USB_EPFCR_OFMSK (0x80000) -#define MCF_USB_EPFCR_UFMSK (0x100000) -#define MCF_USB_EPFCR_RXWMSK (0x200000) -#define MCF_USB_EPFCR_FAEMSK (0x400000) -#define MCF_USB_EPFCR_IPMSK (0x800000) -#define MCF_USB_EPFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_USB_EPFCR_FRM (0x8000000) -#define MCF_USB_EPFCR_TMR (0x10000000) -#define MCF_USB_EPFCR_WFR (0x20000000) -#define MCF_USB_EPFCR_SHAD (0x80000000) - -/* Bit definitions and macros for MCF_USB_EPFAR */ -#define MCF_USB_EPFAR_ALRMP(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPFRP */ -#define MCF_USB_EPFRP_RP(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPFWP */ -#define MCF_USB_EPFWP_WP(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPLRFP */ -#define MCF_USB_EPLRFP_LRFP(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPLWFP */ -#define MCF_USB_EPLWFP_LWFP(x) (((x)&0xFFF)<<0) - - -#endif /* __MCF5475_USB_H__ */ diff --git a/include/MCF5475_XLB.h b/include/MCF5475_XLB.h deleted file mode 100644 index af25ae7..0000000 --- a/include/MCF5475_XLB.h +++ /dev/null @@ -1,101 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_XLB_H__ -#define __MCF5475_XLB_H__ - - -/********************************************************************* -* -* XL Bus Arbiter (XLB) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_XLB_XARB_CFG (*(volatile uint32_t*)(&_MBAR[0x240])) -#define MCF_XLB_XARB_VER (*(volatile uint32_t*)(&_MBAR[0x244])) -#define MCF_XLB_XARB_SR (*(volatile uint32_t*)(&_MBAR[0x248])) -#define MCF_XLB_XARB_IMR (*(volatile uint32_t*)(&_MBAR[0x24C])) -#define MCF_XLB_XARB_ADRCAP (*(volatile uint32_t*)(&_MBAR[0x250])) -#define MCF_XLB_XARB_SIGCAP (*(volatile uint32_t*)(&_MBAR[0x254])) -#define MCF_XLB_XARB_ADRTO (*(volatile uint32_t*)(&_MBAR[0x258])) -#define MCF_XLB_XARB_DATTO (*(volatile uint32_t*)(&_MBAR[0x25C])) -#define MCF_XLB_XARB_BUSTO (*(volatile uint32_t*)(&_MBAR[0x260])) -#define MCF_XLB_XARB_PRIEN (*(volatile uint32_t*)(&_MBAR[0x264])) -#define MCF_XLB_XARB_PRI (*(volatile uint32_t*)(&_MBAR[0x268])) - - -/* Bit definitions and macros for MCF_XLB_XARB_CFG */ -#define MCF_XLB_XARB_CFG_AT (0x2) -#define MCF_XLB_XARB_CFG_DT (0x4) -#define MCF_XLB_XARB_CFG_BA (0x8) -#define MCF_XLB_XARB_CFG_PM(x) (((x)&0x3)<<0x5) -#define MCF_XLB_XARB_CFG_SP(x) (((x)&0x7)<<0x8) -#define MCF_XLB_XARB_CFG_PLDIS (0x80000000) - -/* Bit definitions and macros for MCF_XLB_XARB_VER */ -#define MCF_XLB_XARB_VER_VER(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_SR */ -#define MCF_XLB_XARB_SR_AT (0x1) -#define MCF_XLB_XARB_SR_DT (0x2) -#define MCF_XLB_XARB_SR_BA (0x4) -#define MCF_XLB_XARB_SR_TTM (0x8) -#define MCF_XLB_XARB_SR_ECW (0x10) -#define MCF_XLB_XARB_SR_TTR (0x20) -#define MCF_XLB_XARB_SR_TTA (0x40) -#define MCF_XLB_XARB_SR_MM (0x80) -#define MCF_XLB_XARB_SR_SEA (0x100) - -/* Bit definitions and macros for MCF_XLB_XARB_IMR */ -#define MCF_XLB_XARB_IMR_ATE (0x1) -#define MCF_XLB_XARB_IMR_DTE (0x2) -#define MCF_XLB_XARB_IMR_BAE (0x4) -#define MCF_XLB_XARB_IMR_TTME (0x8) -#define MCF_XLB_XARB_IMR_ECWE (0x10) -#define MCF_XLB_XARB_IMR_TTRE (0x20) -#define MCF_XLB_XARB_IMR_TTAE (0x40) -#define MCF_XLB_XARB_IMR_MME (0x80) -#define MCF_XLB_XARB_IMR_SEAE (0x100) - -/* Bit definitions and macros for MCF_XLB_XARB_ADRCAP */ -#define MCF_XLB_XARB_ADRCAP_ADRCAP(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_SIGCAP */ -#define MCF_XLB_XARB_SIGCAP_TT(x) (((x)&0x1F)<<0) -#define MCF_XLB_XARB_SIGCAP_TBST (0x20) -#define MCF_XLB_XARB_SIGCAP_TSIZ(x) (((x)&0x7)<<0x7) - -/* Bit definitions and macros for MCF_XLB_XARB_ADRTO */ -#define MCF_XLB_XARB_ADRTO_ADRTO(x) (((x)&0xFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_DATTO */ -#define MCF_XLB_XARB_DATTO_DATTO(x) (((x)&0xFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_BUSTO */ -#define MCF_XLB_XARB_BUSTO_BUSTO(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_PRIEN */ -#define MCF_XLB_XARB_PRIEN_M0 (0x1) -#define MCF_XLB_XARB_PRIEN_M2 (0x4) -#define MCF_XLB_XARB_PRIEN_M3 (0x8) - -/* Bit definitions and macros for MCF_XLB_XARB_PRI */ -#define MCF_XLB_XARB_PRI_M0P(x) (((x)&0x7)<<0) -#define MCF_XLB_XARB_PRI_M2P(x) (((x)&0x7)<<0x8) -#define MCF_XLB_XARB_PRI_M3P(x) (((x)&0x7)<<0xC) - - -#endif /* __MCF5475_XLB_H__ */ diff --git a/include/acia.h b/include/acia.h deleted file mode 100644 index 65e95c2..0000000 --- a/include/acia.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _ACIA_H_ -#define _ACIA_H_ - -/* - * ACIA registers - */ -#define keyctl 0xfffc00 -#define keybd 0xfffc02 -#define midictl 0xfffc04 -#define midi 0xfffc06 - -#endif /* _ACIA_H_ */ diff --git a/include/am79c874.h b/include/am79c874.h deleted file mode 100644 index d501183..0000000 --- a/include/am79c874.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * File: am79c874.h - * Purpose: Driver for the AM79C874 10/100 Ethernet PHY - * - * Notes: - */ - -#ifndef _AM79C874_H_ -#define _AM79C874_H_ - - -extern int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex); - - -/* MII Register Addresses */ -#define MII_AM79C874_CR 0 /* MII Management Control Register */ -#define MII_AM79C874_SR 1 /* MII Management Status Register */ -#define MII_AM79C874_PHYIDR1 2 /* PHY Identifier 1 Register */ -#define MII_AM79C874_PHYIDR2 3 /* PHY Identifier 2 Register */ -#define MII_AM79C874_ANAR 4 /* Auto-Negociation Advertissement Register */ -#define MII_AM79C874_ANLPAR 5 /* Auto-Negociation Link Partner Register */ -#define MII_AM79C874_ANER 6 /* Auto-Negociation Expansion Register */ -#define MII_AM79C874_ANNPTR 7 /* Next Page Advertisement Register */ -#define MII_AM79C874_MFR 16 /* Miscellaneous Feature Register */ -#define MII_AM79C874_ICSR 17 /* Interrupt/Status Register */ -#define MII_AM79C874_DR 18 /* Diagnostic Register */ -#define MII_AM79C874_PMLR 19 /* Power and Loopback Register */ -#define MII_AM79C874_MCR 21 /* ModeControl Register */ -#define MII_AM79C874_DC 23 /* Disconnect Counter */ -#define MII_AM79C874_REC 24 /* Recieve Error Counter */ - -/* Bit definitions and macros for MII_AM79C874_CR */ -#define MII_AM79C874_CR_RESET (0x8000) -#define MII_AM79C874_CR_LOOP (0x4000) -#define MII_AM79C874_CR_100MB (0x2000) -#define MII_AM79C874_CR_AUTON (0x1000) -#define MII_AM79C874_CR_POWD (0x0800) -#define MII_AM79C874_CR_ISO (0x0400) -#define MII_AM79C874_CR_RST_NEG (0x0200) -#define MII_AM79C874_CR_DPLX (0x0100) -#define MII_AM79C874_CR_COL_TST (0x0080) -#define MII_AM79C874_CR_SPEED_MASK (0x2040) -#define MII_AM79C874_CR_1000_MPS (0x0040) -#define MII_AM79C874_CR_100_MPS (0x2000) -#define MII_AM79C874_CR_10_MPS (0x0000) - -/* Bit definitions and macros for MII_AM79C874_SR */ -#define MII_AM79C874_SR_100T4 (0x8000) -#define MII_AM79C874_SR_100TXF (0x4000) -#define MII_AM79C874_SR_100TXH (0x2000) -#define MII_AM79C874_SR_10TF (0x1000) -#define MII_AM79C874_SR_10TH (0x0800) -#define MII_AM79C874_SR_PRE_SUP (0x0040) -#define MII_AM79C874_SR_AUTN_COMP (0x0020) -#define MII_AM79C874_SR_RF (0x0010) -#define MII_AM79C874_SR_AUTN_ABLE (0x0008) -#define MII_AM79C874_SR_LS (0x0004) -#define MII_AM79C874_SR_JD (0x0002) -#define MII_AM79C874_SR_EXT (0x0001) - -/* Bit definitions and macros for MII_AM79C874_ANLPAR */ -#define MII_AM79C874_ANLPAR_NP (0x8000) -#define MII_AM79C874_ANLPAR_ACK (0x4000) -#define MII_AM79C874_ANLPAR_RF (0x2000) -#define MII_AM79C874_ANLPAR_T4 (0x0200) -#define MII_AM79C874_ANLPAR_TXFD (0x0100) -#define MII_AM79C874_ANLPAR_TX (0x0080) -#define MII_AM79C874_ANLPAR_10FD (0x0040) -#define MII_AM79C874_ANLPAR_10 (0x0020) -#define MII_AM79C874_ANLPAR_100 (0x0380) -#define MII_AM79C874_ANLPAR_PSB_MASK (0x001F) -#define MII_AM79C874_ANLPAR_PSB_802_3 (0x0001) -#define MII_AM79C874_ANLPAR_PSB_802_9 (0x0002) - -/* Bit definitions and macros for MII_AM79C874_DR */ -#define MII_AM79C874_DR_DPLX (0x0800) -#define MII_AM79C874_DR_DATA_RATE (0x0400) -#define MII_AM79C874_DR_RX_PASS (0x0200) -#define MII_AM79C874_DR_RX_LOCK (0x0100) - -#define AUTONEGLINK (MII_AM79C874_SR_AUTN_COMP | MII_AM79C874_SR_LS) - -/********************************************************************/ - -#endif /* _AM79C874_H_ */ diff --git a/include/arp.h b/include/arp.h deleted file mode 100644 index 9f8a846..0000000 --- a/include/arp.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * File: arp.h - * Purpose: ARP definitions. - * - * Notes: - */ - -#ifndef _ARP_H -#define _ARP_H - -/********************************************************************/ - -/* - * This data definition is defined for Ethernet only! - */ -typedef struct -{ - uint16_t ar_hrd; - uint16_t ar_pro; - uint8_t ar_hln; - uint8_t ar_pln; - uint16_t opcode; - uint8_t ar_sha[6]; /* ethernet hw address */ - uint8_t ar_spa[4]; /* ip address */ - uint8_t ar_tha[6]; /* ethernet hw address */ - uint8_t ar_tpa[4]; /* ip address */ -} arp_frame_hdr; - -#define ARP_HDR_LEN sizeof(arp_frame_hdr) - -/* - * ARP table entry definition. Note that this table only designed - * with Ethernet and IP in mind. - */ -#define MAX_HWA_SIZE (6) /* 6 is enough for Ethernet address */ -#define MAX_PA_SIZE (4) /* 4 is enough for Protocol address */ -typedef struct -{ - uint16_t protocol; - uint8_t hwa_size; - uint8_t hwa[MAX_HWA_SIZE]; - uint8_t pa_size; - uint8_t pa[MAX_PA_SIZE]; - int longevity; -} ARPENTRY; -#define MAX_ARP_ENTRY (10) - -typedef struct -{ - unsigned int tab_size; - ARPENTRY table[MAX_ARP_ENTRY]; -} ARP_INFO; - -#define ARP_ENTRY_EMPTY (0) -#define ARP_ENTRY_PERM (1) -#define ARP_ENTRY_TEMP (2) - - -#define ETHERNET (1) -#define ARP_REQUEST (1) -#define ARP_REPLY (2) - -#define ARP_TIMEOUT (1) /* Timeout in seconds */ - -/* Protocol Header information */ -#define ARP_HDR_OFFSET ETH_HDR_LEN - -/********************************************************************/ - -uint8_t * -arp_get_mypa (void); - -uint8_t * -arp_get_myha (void); - -uint8_t * -arp_get_broadcast (void); - -void -arp_merge (ARP_INFO *, uint16_t, int, uint8_t *, int, uint8_t *, int); - -void -arp_remove (ARP_INFO *, uint16_t, uint8_t *, uint8_t *); - -void -arp_request (NIF *, uint8_t *); - -void -arp_handler (NIF *, NBUF *); - -uint8_t * -arp_resolve (NIF *, uint16_t, uint8_t *); - -void -arp_init (ARP_INFO *); - -/********************************************************************/ - -#endif /* _ARP_H */ diff --git a/include/ati_ids.h b/include/ati_ids.h deleted file mode 100644 index 13321c6..0000000 --- a/include/ati_ids.h +++ /dev/null @@ -1,211 +0,0 @@ -/* - * ATI PCI IDs from XFree86, kept here to make sync'ing with - * XFree much simpler. Currently, this list is only used by - * radeonfb - */ - -#define PCI_CHIP_RV380_3150 0x3150 -#define PCI_CHIP_RV380_3151 0x3151 -#define PCI_CHIP_RV380_3152 0x3152 -#define PCI_CHIP_RV380_3153 0x3153 -#define PCI_CHIP_RV380_3154 0x3154 -#define PCI_CHIP_RV380_3156 0x3156 -#define PCI_CHIP_RV380_3E50 0x3E50 -#define PCI_CHIP_RV380_3E51 0x3E51 -#define PCI_CHIP_RV380_3E52 0x3E52 -#define PCI_CHIP_RV380_3E53 0x3E53 -#define PCI_CHIP_RV380_3E54 0x3E54 -#define PCI_CHIP_RV380_3E56 0x3E56 -#define PCI_CHIP_RS100_4136 0x4136 -#define PCI_CHIP_RS200_4137 0x4137 -#define PCI_CHIP_R300_AD 0x4144 -#define PCI_CHIP_R300_AE 0x4145 -#define PCI_CHIP_R300_AF 0x4146 -#define PCI_CHIP_R300_AG 0x4147 -#define PCI_CHIP_R350_AH 0x4148 -#define PCI_CHIP_R350_AI 0x4149 -#define PCI_CHIP_R350_AJ 0x414A -#define PCI_CHIP_R350_AK 0x414B -#define PCI_CHIP_RV350_AP 0x4150 -#define PCI_CHIP_RV350_AQ 0x4151 -#define PCI_CHIP_RV360_AR 0x4152 -#define PCI_CHIP_RV350_AS 0x4153 -#define PCI_CHIP_RV350_AT 0x4154 -#define PCI_CHIP_RV350_AV 0x4156 -#define PCI_CHIP_MACH32 0x4158 -#define PCI_CHIP_RS250_4237 0x4237 -#define PCI_CHIP_R200_BB 0x4242 -#define PCI_CHIP_R200_BC 0x4243 -#define PCI_CHIP_RS100_4336 0x4336 -#define PCI_CHIP_RS200_4337 0x4337 -#define PCI_CHIP_MACH64CT 0x4354 -#define PCI_CHIP_MACH64CX 0x4358 -#define PCI_CHIP_RS250_4437 0x4437 -#define PCI_CHIP_MACH64ET 0x4554 -#define PCI_CHIP_MACH64GB 0x4742 -#define PCI_CHIP_MACH64GD 0x4744 -#define PCI_CHIP_MACH64GI 0x4749 -#define PCI_CHIP_MACH64GL 0x474C -#define PCI_CHIP_MACH64GM 0x474D -#define PCI_CHIP_MACH64GN 0x474E -#define PCI_CHIP_MACH64GO 0x474F -#define PCI_CHIP_MACH64GP 0x4750 -#define PCI_CHIP_MACH64GQ 0x4751 -#define PCI_CHIP_MACH64GR 0x4752 -#define PCI_CHIP_MACH64GS 0x4753 -#define PCI_CHIP_MACH64GT 0x4754 -#define PCI_CHIP_MACH64GU 0x4755 -#define PCI_CHIP_MACH64GV 0x4756 -#define PCI_CHIP_MACH64GW 0x4757 -#define PCI_CHIP_MACH64GX 0x4758 -#define PCI_CHIP_MACH64GY 0x4759 -#define PCI_CHIP_MACH64GZ 0x475A -#define PCI_CHIP_RV250_Id 0x4964 -#define PCI_CHIP_RV250_Ie 0x4965 -#define PCI_CHIP_RV250_If 0x4966 -#define PCI_CHIP_RV250_Ig 0x4967 -#define PCI_CHIP_R420_JH 0x4A48 -#define PCI_CHIP_R420_JI 0x4A49 -#define PCI_CHIP_R420_JJ 0x4A4A -#define PCI_CHIP_R420_JK 0x4A4B -#define PCI_CHIP_R420_JL 0x4A4C -#define PCI_CHIP_R420_JM 0x4A4D -#define PCI_CHIP_R420_JN 0x4A4E -#define PCI_CHIP_R420_JP 0x4A50 -#define PCI_CHIP_MACH64LB 0x4C42 -#define PCI_CHIP_MACH64LD 0x4C44 -#define PCI_CHIP_RAGE128LE 0x4C45 -#define PCI_CHIP_RAGE128LF 0x4C46 -#define PCI_CHIP_MACH64LG 0x4C47 -#define PCI_CHIP_MACH64LI 0x4C49 -#define PCI_CHIP_MACH64LM 0x4C4D -#define PCI_CHIP_MACH64LN 0x4C4E -#define PCI_CHIP_MACH64LP 0x4C50 -#define PCI_CHIP_MACH64LQ 0x4C51 -#define PCI_CHIP_MACH64LR 0x4C52 -#define PCI_CHIP_MACH64LS 0x4C53 -#define PCI_CHIP_MACH64LT 0x4C54 -#define PCI_CHIP_RADEON_LW 0x4C57 -#define PCI_CHIP_RADEON_LX 0x4C58 -#define PCI_CHIP_RADEON_LY 0x4C59 -#define PCI_CHIP_RADEON_LZ 0x4C5A -#define PCI_CHIP_RV250_Ld 0x4C64 -#define PCI_CHIP_RV250_Le 0x4C65 -#define PCI_CHIP_RV250_Lf 0x4C66 -#define PCI_CHIP_RV250_Lg 0x4C67 -#define PCI_CHIP_RV250_Ln 0x4C6E -#define PCI_CHIP_RAGE128MF 0x4D46 -#define PCI_CHIP_RAGE128ML 0x4D4C -#define PCI_CHIP_R300_ND 0x4E44 -#define PCI_CHIP_R300_NE 0x4E45 -#define PCI_CHIP_R300_NF 0x4E46 -#define PCI_CHIP_R300_NG 0x4E47 -#define PCI_CHIP_R350_NH 0x4E48 -#define PCI_CHIP_R350_NI 0x4E49 -#define PCI_CHIP_R360_NJ 0x4E4A -#define PCI_CHIP_R350_NK 0x4E4B -#define PCI_CHIP_RV350_NP 0x4E50 -#define PCI_CHIP_RV350_NQ 0x4E51 -#define PCI_CHIP_RV350_NR 0x4E52 -#define PCI_CHIP_RV350_NS 0x4E53 -#define PCI_CHIP_RV350_NT 0x4E54 -#define PCI_CHIP_RV350_NV 0x4E56 -#define PCI_CHIP_RAGE128PA 0x5041 -#define PCI_CHIP_RAGE128PB 0x5042 -#define PCI_CHIP_RAGE128PC 0x5043 -#define PCI_CHIP_RAGE128PD 0x5044 -#define PCI_CHIP_RAGE128PE 0x5045 -#define PCI_CHIP_RAGE128PF 0x5046 -#define PCI_CHIP_RAGE128PG 0x5047 -#define PCI_CHIP_RAGE128PH 0x5048 -#define PCI_CHIP_RAGE128PI 0x5049 -#define PCI_CHIP_RAGE128PJ 0x504A -#define PCI_CHIP_RAGE128PK 0x504B -#define PCI_CHIP_RAGE128PL 0x504C -#define PCI_CHIP_RAGE128PM 0x504D -#define PCI_CHIP_RAGE128PN 0x504E -#define PCI_CHIP_RAGE128PO 0x504F -#define PCI_CHIP_RAGE128PP 0x5050 -#define PCI_CHIP_RAGE128PQ 0x5051 -#define PCI_CHIP_RAGE128PR 0x5052 -#define PCI_CHIP_RAGE128PS 0x5053 -#define PCI_CHIP_RAGE128PT 0x5054 -#define PCI_CHIP_RAGE128PU 0x5055 -#define PCI_CHIP_RAGE128PV 0x5056 -#define PCI_CHIP_RAGE128PW 0x5057 -#define PCI_CHIP_RAGE128PX 0x5058 -#define PCI_CHIP_RADEON_QD 0x5144 -#define PCI_CHIP_RADEON_QE 0x5145 -#define PCI_CHIP_RADEON_QF 0x5146 -#define PCI_CHIP_RADEON_QG 0x5147 -#define PCI_CHIP_R200_QH 0x5148 -#define PCI_CHIP_R200_QI 0x5149 -#define PCI_CHIP_R200_QJ 0x514A -#define PCI_CHIP_R200_QK 0x514B -#define PCI_CHIP_R200_QL 0x514C -#define PCI_CHIP_R200_QM 0x514D -#define PCI_CHIP_R200_QN 0x514E -#define PCI_CHIP_R200_QO 0x514F -#define PCI_CHIP_RV200_QW 0x5157 -#define PCI_CHIP_RV200_QX 0x5158 -#define PCI_CHIP_RV100_QY 0x5159 -#define PCI_CHIP_RV100_QZ 0x515A -#define PCI_CHIP_RAGE128RE 0x5245 -#define PCI_CHIP_RAGE128RF 0x5246 -#define PCI_CHIP_RAGE128RG 0x5247 -#define PCI_CHIP_RAGE128RK 0x524B -#define PCI_CHIP_RAGE128RL 0x524C -#define PCI_CHIP_RAGE128SE 0x5345 -#define PCI_CHIP_RAGE128SF 0x5346 -#define PCI_CHIP_RAGE128SG 0x5347 -#define PCI_CHIP_RAGE128SH 0x5348 -#define PCI_CHIP_RAGE128SK 0x534B -#define PCI_CHIP_RAGE128SL 0x534C -#define PCI_CHIP_RAGE128SM 0x534D -#define PCI_CHIP_RAGE128SN 0x534E -#define PCI_CHIP_RAGE128TF 0x5446 -#define PCI_CHIP_RAGE128TL 0x544C -#define PCI_CHIP_RAGE128TR 0x5452 -#define PCI_CHIP_RAGE128TS 0x5453 -#define PCI_CHIP_RAGE128TT 0x5454 -#define PCI_CHIP_RAGE128TU 0x5455 -#define PCI_CHIP_RV370_5460 0x5460 -#define PCI_CHIP_RV370_5461 0x5461 -#define PCI_CHIP_RV370_5462 0x5462 -#define PCI_CHIP_RV370_5463 0x5463 -#define PCI_CHIP_RV370_5464 0x5464 -#define PCI_CHIP_RV370_5465 0x5465 -#define PCI_CHIP_RV370_5466 0x5466 -#define PCI_CHIP_RV370_5467 0x5467 -#define PCI_CHIP_R423_UH 0x5548 -#define PCI_CHIP_R423_UI 0x5549 -#define PCI_CHIP_R423_UJ 0x554A -#define PCI_CHIP_R423_UK 0x554B -#define PCI_CHIP_R423_UQ 0x5551 -#define PCI_CHIP_R423_UR 0x5552 -#define PCI_CHIP_R423_UT 0x5554 -#define PCI_CHIP_MACH64VT 0x5654 -#define PCI_CHIP_MACH64VU 0x5655 -#define PCI_CHIP_MACH64VV 0x5656 -#define PCI_CHIP_RS300_5834 0x5834 -#define PCI_CHIP_RS300_5835 0x5835 -#define PCI_CHIP_RS300_5836 0x5836 -#define PCI_CHIP_RS300_5837 0x5837 -#define PCI_CHIP_RV370_5B60 0x5B60 -#define PCI_CHIP_RV370_5B61 0x5B61 -#define PCI_CHIP_RV370_5B62 0x5B62 -#define PCI_CHIP_RV370_5B63 0x5B63 -#define PCI_CHIP_RV370_5B64 0x5B64 -#define PCI_CHIP_RV370_5B65 0x5B65 -#define PCI_CHIP_RV370_5B66 0x5B66 -#define PCI_CHIP_RV370_5B67 0x5B67 -#define PCI_CHIP_RV280_5960 0x5960 -#define PCI_CHIP_RV280_5961 0x5961 -#define PCI_CHIP_RV280_5962 0x5962 -#define PCI_CHIP_RV280_5964 0x5964 -#define PCI_CHIP_RV280_5C61 0x5C61 -#define PCI_CHIP_RV280_5C63 0x5C63 -#define PCI_CHIP_R423_5D57 0x5D57 -#define PCI_CHIP_RS350_7834 0x7834 -#define PCI_CHIP_RS350_7835 0x7835 - diff --git a/include/bas_printf.h b/include/bas_printf.h deleted file mode 100644 index 5b42c28..0000000 --- a/include/bas_printf.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - */ - -#ifndef _BAS_PRINTF_H_ -#define _BAS_PRINTF_H_ -#include -#include - -extern void xvsnprintf(char *str, size_t size, const char *fmt, va_list va); -extern void xvprintf(const char *fmt, va_list va); -extern void xprintf(const char *fmt, ...); -extern void xsnprintf(char *str, size_t size, const char *fmt, ...); -extern void xputchar(int c); -extern int sprintf(char *str, const char *format, ...); - - -extern void display_progress(void); -extern void hexdump(uint8_t buffer[], int size); -#endif /* _BAS_PRINTF_H_ */ diff --git a/include/bas_string.h b/include/bas_string.h deleted file mode 100644 index c743c95..0000000 --- a/include/bas_string.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * bas_string.h - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#ifndef BAS_STRING_H_ -#define BAS_STRING_H_ - -#include - -extern int strncmp(const char *s1, const char *s2, size_t max); -extern char *strcpy(char *dst, const char *src); -char *strncpy(char *dst, const char *src, size_t max); -extern int strcmp(const char *s1, const char *s2); -extern size_t strlen(const char *str); -extern char *strcat(char *dst, const char *src); -extern char *strncat(char *dst, const char *src, size_t max); -extern int atoi(const char *c); -extern void *memcpy(void *dst, const void *src, size_t n); -extern void *memset(void *s, int c, size_t n); -extern int memcmp(const void *s1, const void *s2, size_t max); -extern void bzero(void *s, size_t n); - -#define isdigit(c) (((c) >= '0') && ((c) <= '9')) -#define isupper(c) ((c) >= 'A' && ((c) <= 'Z')) -#define islower(c) ((c) >= 'a' && ((c) <= 'z')) -#define isalpha(c) (isupper((c)) || islower(c)) -#define tolower(c) (isupper(c) ? ((c) + 'a' - 'A') : (c)) - -#endif /* BAS_STRING_H_ */ diff --git a/include/bas_types.h b/include/bas_types.h deleted file mode 100644 index 4f692a1..0000000 --- a/include/bas_types.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * bas_types.h - * - * Created on: 17.11.2012 - * Author: mfro - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - * - */ - -#ifndef BAS_TYPES_H_ -#define BAS_TYPES_H_ - -#include -#include -#include /* for sizeof() etc. */ - -#endif /* BAS_TYPES_H_ */ diff --git a/include/bas_utils.h b/include/bas_utils.h deleted file mode 100644 index a0fe0d2..0000000 --- a/include/bas_utils.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * bas_utils.h - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#ifndef _BAS_UTILS_H_ -#define _BAS_UTILS_H_ - -#define CLEAR_BIT(p,bit) p &= ~(bit) -#define CLEAR_BIT_NO(p,nr) CLEAR_BIT(p, (1 << (nr))) - -#endif /* _BAS_UTILS_H_ */ diff --git a/include/bcm5222.h b/include/bcm5222.h deleted file mode 100644 index f7dc81e..0000000 --- a/include/bcm5222.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * File: bcm5222.h - * Purpose: Driver for the BCM5222 10/100 Ethernet PHY - * - * Notes: - */ - -#ifndef _BCM5222_H_ -#define _BCM5222_H_ - -extern int bcm5222_init(uint8_t, uint8_t, uint8_t, uint8_t); -extern void bcm5222_get_reg(uint16_t*, uint16_t*); - -/********************************************************************/ - -/* MII Register Addresses */ -#define BCM5222_CTRL (0x00) -#define BCM5222_STAT (0x01) -#define BCM5222_PHY_ID1 (0x02) -#define BCM5222_PHY_ID2 (0x03) -#define BCM5222_AN_ADV (0x04) -#define BCM5222_AN_LINK_PAR (0x05) -#define BCM5222_AN_EXP (0x06) -#define BCM5222_AN_NPR (0x07) -#define BCM5222_LINK_NPA (0x08) -#define BCM5222_ACSR (0x18) - -/* Bit definitions and macros for BCM5222_CTRL */ -#define BCM5222_CTRL_RESET (0x8000) -#define BCM5222_CTRL_LOOP (0x4000) -#define BCM5222_CTRL_SPEED (0x2000) -#define BCM5222_CTRL_ANE (0x1000) -#define BCM5222_CTRL_PD (0x0800) -#define BCM5222_CTRL_ISOLATE (0x0400) -#define BCM5222_CTRL_RESTART_AN (0x0200) -#define BCM5222_CTRL_FDX (0x0100) -#define BCM5222_CTRL_COL_TEST (0x0080) - - -/* Bit definitions and macros for BCM5222_STAT */ -#define BCM5222_STAT_100BT4 (0x8000) -#define BCM5222_STAT_100BTX_FDX (0x4000) -#define BCM5222_STAT_100BTX (0x2000) -#define BCM5222_STAT_10BT_FDX (0x1000) -#define BCM5222_STAT_10BT (0x0800) -#define BCM5222_STAT_NO_PREAMBLE (0x0040) -#define BCM5222_STAT_AN_COMPLETE (0x0020) -#define BCM5222_STAT_REMOTE_FAULT (0x0010) -#define BCM5222_STAT_AN_ABILITY (0x0008) -#define BCM5222_STAT_LINK (0x0004) -#define BCM5222_STAT_JABBER (0x0002) -#define BCM5222_STAT_EXTENDED (0x0001) - -/* Bit definitions and macros for BCM5222_AN_ADV */ -#define BCM5222_AN_ADV_NEXT_PAGE (0x8001) -#define BCM5222_AN_ADV_REM_FAULT (0x2001) -#define BCM5222_AN_ADV_PAUSE (0x0401) -#define BCM5222_AN_ADV_100BT4 (0x0201) -#define BCM5222_AN_ADV_100BTX_FDX (0x0101) -#define BCM5222_AN_ADV_100BTX (0x0081) -#define BCM5222_AN_ADV_10BT_FDX (0x0041) -#define BCM5222_AN_ADV_10BT (0x0021) -#define BCM5222_AN_ADV_802_3 (0x0001) - -/* Bit definitions and macros for BCM5222_ACSR */ -#define BCM5222_ACSR_100BTX (0x0002) -#define BCM5222_ACSR_FDX (0x0001) - -/********************************************************************/ - -#endif /* _BCM5222_H_ */ diff --git a/include/bootp.h b/include/bootp.h deleted file mode 100644 index ec62e40..0000000 --- a/include/bootp.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * File: bootp.h - * Purpose: BOOTP definitions. - * - * Notes: - */ - -#ifndef _BOOTP_H_ -#define _BOOTP_H_ - -#define BOOTP_SERVER_PORT 67 -#define BOOTP_CLIENT_PORT 68 - -/* protocol header information */ -#define BOOTP_HDR_OFFSET (ETH_HDR_LEN + IP_HDR_SIZE + UDP_HDR_SIZE) - -/* timeout in seconds */ -#define BOOTP_TIMEOUT 2 - -/* BOOTP connection status */ - -struct bootp_connection -{ - bool open; /* connection established flag */ - NIF *nif; /* pointer to network interface */ - IP_ADDR server_ip; /* server IP address */ -}; - -/* - * This data definition is defined for Ethernet only! - */ -struct bootp_packet -{ - uint8_t type; /* bootp operation type */ - uint8_t htype; /* hardware type */ - uint8_t hlen; /* hardware address length */ - uint8_t hops; /* hops */ - uint32_t xid; /* transaction identifier */ - uint16_t secs; /* seconds since trying to boot */ - uint16_t flags; /* only broadcast flag in use */ - uint32_t cl_addr; /* client ip address. Set to all 0 on request */ - uint32_t yi_addr; /* this field contains the new IP */ - uint32_t gi_addr; /* gateway address */ - uint8_t ch_addr[16]; /* client hw address */ - uint8_t sname[64]; /* server name */ - uint8_t file[128]; /* name of bootfile */ - uint8_t vend[64]; /* vendor specific (see below) */ -}; - -#define BOOTP_PACKET_LEN (BOOTP_HDR_OFFSET + sizeof(struct bootp_packet)) - -/* possible values for type field */ -#define BOOTP_TYPE_BOOTREQUEST 1 -#define BOOTP_TYPE_BOOTREPLY 2 - -/* values for hardware type - we only use ethernet */ -#define BOOTP_HTYPE_ETHERNET 1 - -/* values for hlen - again only ethernet defined */ -#define BOOTP_HLEN_ETHERNET 6 - -/* values for flags - only broadcast flag in use */ -#define BOOTP_FLAGS_BROADCAST 1 - -extern void bootp_request(NIF *, uint8_t *); -extern void bootp_handler(NIF *, NBUF *); -//extern void bootp_init(BOOTP_INFO *); - -#endif /* _BOOTP_H_ */ diff --git a/include/cache.h b/include/cache.h deleted file mode 100644 index 0136163..0000000 --- a/include/cache.h +++ /dev/null @@ -1,89 +0,0 @@ -#ifndef _CACHE_H_ -#define _CACHE_H_ - -/* - * cache.h - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - * - */ - -#include - -/* - * CACR Cache Control Register - */ -#define CF_CACR_DEC (0x80000000) /* Data Cache Enable */ -#define CF_CACR_DW (0x40000000) /* Data default Write-protect */ -#define CF_CACR_DESB (0x20000000) /* Data Enable Store Buffer */ -#define CF_CACR_DPI (0x10000000) /* Data Disable CPUSHL Invalidate */ -#define CF_CACR_DHLCK (0x08000000) /* 1/2 Data Cache Lock Mode */ -#define CF_CACR_DDCM_00 (0x00000000) /* Cacheable writethrough imprecise */ -#define CF_CACR_DDCM_01 (0x02000000) /* Cacheable copyback */ -#define CF_CACR_DDCM_10 (0x04000000) /* Noncacheable precise */ -#define CF_CACR_DDCM_11 (0x06000000) /* Noncacheable imprecise */ -#define CF_CACR_DCINVA (0x01000000) /* Data Cache Invalidate All */ -#define CF_CACR_DDSP (0x00800000) /* Data default supervisor-protect */ -#define CF_CACR_IVO (0x00100000) /* Invalidate only */ -#define CF_CACR_BEC (0x00080000) /* Branch Cache Enable */ -#define CF_CACR_BCINVA (0x00040000) /* Branch Cache Invalidate All */ -#define CF_CACR_IEC (0x00008000) /* Instruction Cache Enable */ -#define CF_CACR_SPA (0x00004000) /* Search by Physical Address */ -#define CF_CACR_DNFB (0x00002000) /* Default cache-inhibited fill buf */ -#define CF_CACR_IDPI (0x00001000) /* Instr Disable CPUSHL Invalidate */ -#define CF_CACR_IHLCK (0x00000800) /* 1/2 Instruction Cache Lock Mode */ -#define CF_CACR_IDCM (0x00000400) /* Noncacheable Instr default mode */ -#define CF_CACR_ICINVA (0x00000100) /* Instr Cache Invalidate All */ -#define CF_CACR_IDSP (0x00000080) /* Ins default supervisor-protect */ -#define CF_CACR_EUSP (0x00000020) /* Switch stacks in user mode */ -#define CF_CACR_DF (0x00000010) /* Disable FPU */ - -#define _DCACHE_SET_MASK ((DCACHE_SIZE/64-1)< - - -/* Status of Disk Functions */ -typedef uint8_t DSTATUS; - -/* Results of Disk Functions */ -typedef enum { - RES_OK = 0, /* 0: Successful */ - RES_ERROR, /* 1: R/W Error */ - RES_WRPRT, /* 2: Write Protected */ - RES_NOTRDY, /* 3: Not Ready */ - RES_PARERR /* 4: Invalid Parameter */ -} DRESULT; - - -/*---------------------------------------*/ -/* Prototypes for disk control functions */ - - -DSTATUS disk_initialize (uint8_t); -DSTATUS disk_reset(uint8_t); -DSTATUS disk_status (uint8_t); -DRESULT disk_read (uint8_t, uint8_t*, uint32_t, uint8_t); -#if _READONLY == 0 -DRESULT disk_write (uint8_t, const uint8_t*, uint32_t, uint8_t); -#endif -DRESULT disk_ioctl (uint8_t, uint8_t, void*); - - -/* Disk Status Bits (DSTATUS) */ -#define STA_NOINIT 0x01 /* Drive not initialized */ -#define STA_NODISK 0x02 /* No medium in the drive */ -#define STA_PROTECT 0x04 /* Write protected */ - - -/* Command code for disk_ioctrl fucntion */ - -/* Generic command (used by FatFs) */ -#define CTRL_SYNC 0 /* Flush disk cache (for write functions) */ -#define GET_SECTOR_COUNT 1 /* Get media size (for only f_mkfs()) */ -#define GET_SECTOR_SIZE 2 /* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */ -#define GET_BLOCK_SIZE 3 /* Get erase block size (for only f_mkfs()) */ -#define CTRL_ERASE_SECTOR 4 /* Force erased a block of sectors (for only _USE_ERASE) */ - -/* Generic command (not used by FatFs) */ -#define CTRL_POWER 5 /* Get/Set power status */ -#define CTRL_LOCK 6 /* Lock/Unlock media removal */ -#define CTRL_EJECT 7 /* Eject media */ -#define CTRL_FORMAT 8 /* Create physical format on the media */ - -/* MMC/SDC specific ioctl command */ -#define MMC_GET_TYPE 10 /* Get card type */ -#define MMC_GET_CSD 11 /* Get CSD */ -#define MMC_GET_CID 12 /* Get CID */ -#define MMC_GET_OCR 13 /* Get OCR */ -#define MMC_GET_SDSTAT 14 /* Get SD status */ - -/* ATA/CF specific ioctl command */ -#define ATA_GET_REV 20 /* Get F/W revision */ -#define ATA_GET_MODEL 21 /* Get model name */ -#define ATA_GET_SN 22 /* Get serial number */ - - -/* MMC card type flags (MMC_GET_TYPE) */ -#define CT_MMC 0x01 /* MMC ver 3 */ -#define CT_SD1 0x02 /* SD ver 1 */ -#define CT_SD2 0x04 /* SD ver 2 */ -#define CT_SDC (CT_SD1|CT_SD2) /* SD */ -#define CT_BLOCK 0x08 /* Block addressing */ - - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/include/dma.h b/include/dma.h deleted file mode 100644 index 2776b28..0000000 --- a/include/dma.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * spidma.h * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#ifndef _DMA_H_ -#define _DMA_H_ - -#include "MCF5475.h" -#include "MCD_dma.h" -#include "bas_string.h" - -void *dma_memcpy(void *dst, void *src, size_t n); -extern int dma_init(void); -extern int dma_get_channel(int requestor); -extern int dma_set_channel(int, void (*)(void)); -extern void dma_free_channel(int requestor); -extern void dma_clear_channel(int channel); -extern uint32_t dma_get_initiator(int requestor); -extern int dma_set_initiator(int initiator); -extern void dma_free_initiator(int initiator); -extern void dma_irq_enable(void); -extern void dma_irq_disable(void); -extern bool dma_interrupt_handler(void *arg1, void *arg2); - - -#endif /* _DMA_H_ */ diff --git a/include/driver_mem.h b/include/driver_mem.h deleted file mode 100644 index a08d0f3..0000000 --- a/include/driver_mem.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef _DRIVER_MEM_H_ -#define _DRIVER_MEM_H_ - -#include "bas_types.h" - -/* - * the driver_mem module provides a block of _uncached_ memory for USB and other drivers as - * well as some memory handling functions for it - */ -extern int driver_mem_init(void); -extern void *driver_mem_alloc(uint32_t amount); -extern int32_t driver_mem_free(void *addr); -extern void driver_mem_release(void); - -#endif /* _DRIVER_MEM_H_ */ diff --git a/include/driver_vec.h b/include/driver_vec.h deleted file mode 100644 index bbce08d..0000000 --- a/include/driver_vec.h +++ /dev/null @@ -1,302 +0,0 @@ -/* - * driver_vec.h - * - * Interface for exposure of BaS drivers to the OS - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 24.10.2013 - * Author: Markus Fröschle - */ - -#ifndef _DRIVER_VEC_H_ -#define _DRIVER_VEC_H_ - -#include "xhdi_sd.h" -#include "MCD_dma.h" -#include "pci.h" - -enum driver_type -{ - BLOCKDEV_DRIVER, - CHARDEV_DRIVER, - XHDI_DRIVER, - MCD_DRIVER, - VIDEO_DRIVER, - PCI_DRIVER, - MMU_DRIVER, - END_OF_DRIVERS = 0xffffffff, /* marks end of driver list */ -}; - -struct generic_driver_interface -{ - uint32_t (*init)(void); - uint32_t (*read)(void *buf, size_t count); - uint32_t (*write)(const void *buf, size_t count); - uint32_t (*ioctl)(uint32_t request, ...); -}; - -struct dma_driver_interface -{ - int32_t version; - int32_t magic; - int (*dma_set_initiator)(int initiator); - uint32_t (*dma_get_initiator)(int requestor); - void (*dma_free_initiator)(int requestor); - int (*dma_set_channel)(int requestor, void (*handler)(void)); - int (*dma_get_channel)(int requestor); - void (*dma_free_channel)(int requestor); - void (*dma_clear_channel)(int channel); - int (*MCD_startDma)(long channel, - int8_t *srcAddr, unsigned int srcIncr, int8_t *destAddr, unsigned int destIncr, - unsigned int dmaSize, unsigned int xferSize, unsigned int initiator, int priority, - unsigned int flags, unsigned int funcDesc); - int32_t (*MCD_dmaStatus)(int32_t channel); - int32_t (*MCD_XferProgrQuery)(int32_t channel, MCD_XferProg *progRep); - int32_t (*MCD_killDma)(int32_t channel); - int32_t (*MCD_continDma)(int32_t channel); - int32_t (*MCD_pauseDma)(int32_t channel); - int32_t (*MCD_resumeDma)(int32_t channel); - int32_t (*MCD_csumQuery)(int32_t channel, uint32_t *csum); - void *(*dma_malloc)(uint32_t amount); - int32_t (*dma_free)(void *addr); -}; - -struct xhdi_driver_interface -{ - uint32_t (*xhdivec)(); -}; - -/* - * Interpretation of offset for color fields: All offsets are from the right, - * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you - * can use the offset as right argument to <<). A pixel afterwards is a bit - * stream and is written to video memory as that unmodified. This implies - * big-endian byte order if bits_per_pixel is greater than 8. - */ -struct fb_bitfield -{ - unsigned long offset; /* beginning of bitfield */ - unsigned long length; /* length of bitfield */ - unsigned long msb_right; /* != 0 : Most significant bit is */ - /* right */ -}; - -/* - * the following structures define the interface to the BaS-builtin-framebuffer video driver - */ -struct fb_var_screeninfo -{ - unsigned long xres; /* visible resolution */ - unsigned long yres; - unsigned long xres_virtual; /* virtual resolution */ - unsigned long yres_virtual; - unsigned long xoffset; /* offset from virtual to visible */ - unsigned long yoffset; /* resolution */ - - unsigned long bits_per_pixel; /* guess what */ - unsigned long grayscale; /* != 0 Graylevels instead of colors */ - - struct fb_bitfield red; /* bitfield in fb mem if true color, */ - struct fb_bitfield green; /* else only length is significant */ - struct fb_bitfield blue; - struct fb_bitfield transp; /* transparency */ - - unsigned long nonstd; /* != 0 Non standard pixel format */ - - unsigned long activate; /* see FB_ACTIVATE_* */ - - unsigned long height; /* height of picture in mm */ - unsigned long width; /* width of picture in mm */ - - unsigned long accel_flags; /* (OBSOLETE) see fb_info.flags */ - - /* Timing: All values in pixclocks, except pixclock (of course) */ - unsigned long pixclock; /* pixel clock in ps (pico seconds) */ - unsigned long left_margin; /* time from sync to picture */ - unsigned long right_margin; /* time from picture to sync */ - unsigned long upper_margin; /* time from sync to picture */ - unsigned long lower_margin; - unsigned long hsync_len; /* length of horizontal sync */ - unsigned long vsync_len; /* length of vertical sync */ - unsigned long sync; /* see FB_SYNC_* */ - unsigned long vmode; /* see FB_VMODE_* */ - unsigned long rotate; /* angle we rotate counter clockwise */ - unsigned long refresh; - unsigned long reserved[4]; /* Reserved for future compatibility */ -}; - -struct fb_fix_screeninfo -{ - char id[16]; /* identification string eg "TT Builtin" */ - unsigned long smem_start; /* Start of frame buffer mem */ - /* (physical address) */ - unsigned long smem_len; /* Length of frame buffer mem */ - unsigned long type; /* see FB_TYPE_* */ - unsigned long type_aux; /* Interleave for interleaved Planes */ - unsigned long visual; /* see FB_VISUAL_* */ - unsigned short xpanstep; /* zero if no hardware panning */ - unsigned short ypanstep; /* zero if no hardware panning */ - unsigned short ywrapstep; /* zero if no hardware ywrap */ - unsigned long line_length; /* length of a line in bytes */ - unsigned long mmio_start; /* Start of Memory Mapped I/O */ - /* (physical address) */ - unsigned long mmio_len; /* Length of Memory Mapped I/O */ - unsigned long accel; /* Indicate to driver which */ - /* specific chip/card we have */ - unsigned short reserved[3]; /* Reserved for future compatibility */ -}; - -struct fb_chroma -{ - unsigned long redx; /* in fraction of 1024 */ - unsigned long greenx; - unsigned long bluex; - unsigned long whitex; - unsigned long redy; - unsigned long greeny; - unsigned long bluey; - unsigned long whitey; -}; - -struct fb_monspecs -{ - struct fb_chroma chroma; - struct fb_videomode *modedb; /* mode database */ - unsigned char manufacturer[4]; /* Manufacturer */ - unsigned char monitor[14]; /* Monitor String */ - unsigned char serial_no[14]; /* Serial Number */ - unsigned char ascii[14]; /* ? */ - unsigned long modedb_len; /* mode database length */ - unsigned long model; /* Monitor Model */ - unsigned long serial; /* Serial Number - Integer */ - unsigned long year; /* Year manufactured */ - unsigned long week; /* Week Manufactured */ - unsigned long hfmin; /* hfreq lower limit (Hz) */ - unsigned long hfmax; /* hfreq upper limit (Hz) */ - unsigned long dclkmin; /* pixelclock lower limit (Hz) */ - unsigned long dclkmax; /* pixelclock upper limit (Hz) */ - unsigned short input; /* display type - see FB_DISP_* */ - unsigned short dpms; /* DPMS support - see FB_DPMS_ */ - unsigned short signal; /* Signal Type - see FB_SIGNAL_* */ - unsigned short vfmin; /* vfreq lower limit (Hz) */ - unsigned short vfmax; /* vfreq upper limit (Hz) */ - unsigned short gamma; /* Gamma - in fractions of 100 */ - unsigned short gtf : 1; /* supports GTF */ - unsigned short misc; /* Misc flags - see FB_MISC_* */ - unsigned char version; /* EDID version... */ - unsigned char revision; /* ...and revision */ - unsigned char max_x; /* Maximum horizontal size (cm) */ - unsigned char max_y; /* Maximum vertical size (cm) */ -}; - -struct framebuffer_driver_interface -{ - struct fb_info **framebuffer_info; /* pointer to an fb_info struct (defined in include/fb.h) */ -}; - -struct pci_bios_interface -{ - uint32_t subjar; - uint32_t version; - /* Although we declare this functions as standard gcc functions (cdecl), - * they expect parameters inside registers (fastcall) unsupported by gcc m68k. - * Caller will take care of parameters passing convention. - */ - int32_t (*find_pci_device)(uint32_t id, uint16_t index); - int32_t (*find_pci_classcode)(uint32_t class, uint16_t index); - int32_t (*read_config_byte)(int32_t handle, uint16_t reg, uint8_t *address); - int32_t (*read_config_word)(int32_t handle, uint16_t reg, uint16_t *address); - int32_t (*read_config_longword)(int32_t handle, uint16_t reg, uint32_t *address); - uint8_t (*fast_read_config_byte)(int32_t handle, uint16_t reg); - uint16_t (*fast_read_config_word)(int32_t handle, uint16_t reg); - uint32_t (*fast_read_config_longword)(int32_t handle, uint16_t reg); - int32_t (*write_config_byte)(int32_t handle, uint16_t reg, uint16_t val); - int32_t (*write_config_word)(int32_t handle, uint16_t reg, uint16_t val); - int32_t (*write_config_longword)(int32_t handle, uint16_t reg, uint32_t val); - int32_t (*hook_interrupt)(int32_t handle, uint32_t *routine, uint32_t *parameter); - int32_t (*unhook_interrupt)(int32_t handle); - int32_t (*special_cycle)(uint16_t bus, uint32_t data); - int32_t (*get_routing)(int32_t handle); - int32_t (*set_interrupt)(int32_t handle); - int32_t (*get_resource)(int32_t handle); - int32_t (*get_card_used)(int32_t handle, uint32_t *address); - int32_t (*set_card_used)(int32_t handle, uint32_t *callback); - int32_t (*read_mem_byte)(int32_t handle, uint32_t offset, uint8_t *address); - int32_t (*read_mem_word)(int32_t handle, uint32_t offset, uint16_t *address); - int32_t (*read_mem_longword)(int32_t handle, uint32_t offset, uint32_t *address); - uint8_t (*fast_read_mem_byte)(int32_t handle, uint32_t offset); - uint16_t (*fast_read_mem_word)(int32_t handle, uint32_t offset); - uint32_t (*fast_read_mem_longword)(int32_t handle, uint32_t offset); - int32_t (*write_mem_byte)(int32_t handle, uint32_t offset, uint16_t val); - int32_t (*write_mem_word)(int32_t handle, uint32_t offset, uint16_t val); - int32_t (*write_mem_longword)(int32_t handle, uint32_t offset, uint32_t val); - int32_t (*read_io_byte)(int32_t handle, uint32_t offset, uint8_t *address); - int32_t (*read_io_word)(int32_t handle, uint32_t offset, uint16_t *address); - int32_t (*read_io_longword)(int32_t handle, uint32_t offset, uint32_t *address); - uint8_t (*fast_read_io_byte)(int32_t handle, uint32_t offset); - uint16_t (*fast_read_io_word)(int32_t handle, uint32_t offset); - uint32_t (*fast_read_io_longword)(int32_t handle, uint32_t offset); - int32_t (*write_io_byte)(int32_t handle, uint32_t offset, uint16_t val); - int32_t (*write_io_word)(int32_t handle, uint32_t offset, uint16_t val); - int32_t (*write_io_longword)(int32_t handle, uint32_t offset, uint32_t val); - int32_t (*get_machine_id)(void); - int32_t (*get_pagesize)(void); - int32_t (*virt_to_bus)(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); - int32_t (*bus_to_virt)(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); - int32_t (*virt_to_phys)(uint32_t address, PCI_CONV_ADR *pointer); - int32_t (*phys_to_virt)(uint32_t address, PCI_CONV_ADR *pointer); - // int32_t reserved[2]; -}; - -struct mmu_driver_interface -{ - int32_t (*map_page_locked)(uint32_t address, uint32_t length, int asid); - int32_t (*unlock_page)(uint32_t address, uint32_t length, int asid); - int32_t (*report_locked_pages)(uint32_t *num_itlb, uint32_t *num_dtlb); - uint32_t (*report_pagesize)(void); -}; - -union interface -{ - struct generic_driver_interface *gdi; - struct xhdi_driver_interface *xhdi; - struct dma_driver_interface *dma; - struct framebuffer_driver_interface *fb; - struct pci_bios_interface *pci; - struct mmu_driver_interface *mmu; -}; - -struct generic_interface -{ - enum driver_type type; - char name[16]; - char description[64]; - int version; - int revision; - union interface interface; -}; - -struct driver_table -{ - uint32_t bas_version; - uint32_t bas_revision; - void (*remove_handler)(void); /* calling this will disable the BaS' hook into trap #0 */ - struct generic_interface *interfaces; -}; - - -#endif /* _DRIVER_VEC_H_ */ diff --git a/include/edid.h b/include/edid.h deleted file mode 100644 index 432b919..0000000 --- a/include/edid.h +++ /dev/null @@ -1,138 +0,0 @@ -/* - * edid.h - EDID/DDC Header - * - * Based on: - * 1. XFree86 4.3.0, edid.h - * Copyright 1998 by Egbert Eich - * - * 2. John Fremlin and - * Ani Joshi - * - * DDC is a Trademark of VESA (Video Electronics Standard Association). - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. -*/ - -#ifndef __EDID_H__ -#define __EDID_H__ - -#define EDID_LENGTH 0x80 -#define EDID_HEADER 0x00 -#define EDID_HEADER_END 0x07 - -#define ID_MANUFACTURER_NAME 0x08 -#define ID_MANUFACTURER_NAME_END 0x09 -#define ID_MODEL 0x0a - -#define ID_SERIAL_NUMBER 0x0c - -#define MANUFACTURE_WEEK 0x10 -#define MANUFACTURE_YEAR 0x11 - -#define EDID_STRUCT_VERSION 0x12 -#define EDID_STRUCT_REVISION 0x13 - -#define EDID_STRUCT_DISPLAY 0x14 - -#define DPMS_FLAGS 0x18 -#define ESTABLISHED_TIMING_1 0x23 -#define ESTABLISHED_TIMING_2 0x24 -#define MANUFACTURERS_TIMINGS 0x25 - -/* standard timings supported */ -#define STD_TIMING 8 -#define STD_TIMING_DESCRIPTION_SIZE 2 -#define STD_TIMING_DESCRIPTIONS_START 0x26 - -#define DETAILED_TIMING_DESCRIPTIONS_START 0x36 -#define DETAILED_TIMING_DESCRIPTION_SIZE 18 -#define NO_DETAILED_TIMING_DESCRIPTIONS 4 - -#define DETAILED_TIMING_DESCRIPTION_1 0x36 -#define DETAILED_TIMING_DESCRIPTION_2 0x48 -#define DETAILED_TIMING_DESCRIPTION_3 0x5a -#define DETAILED_TIMING_DESCRIPTION_4 0x6c - -#define DESCRIPTOR_DATA 5 - -#define UPPER_NIBBLE( x ) \ - (((128|64|32|16) & (x)) >> 4) - -#define LOWER_NIBBLE( x ) \ - ((1|2|4|8) & (x)) - -#define COMBINE_HI_8LO( hi, lo ) \ - ( (((unsigned)hi) << 8) | (unsigned)lo ) - -#define COMBINE_HI_4LO( hi, lo ) \ - ( (((unsigned)hi) << 4) | (unsigned)lo ) - -#define PIXEL_CLOCK_LO (unsigned)block[ 0 ] -#define PIXEL_CLOCK_HI (unsigned)block[ 1 ] -#define PIXEL_CLOCK (COMBINE_HI_8LO( PIXEL_CLOCK_HI,PIXEL_CLOCK_LO )*10000) -#define H_ACTIVE_LO (unsigned)block[ 2 ] -#define H_BLANKING_LO (unsigned)block[ 3 ] -#define H_ACTIVE_HI UPPER_NIBBLE( (unsigned)block[ 4 ] ) -#define H_ACTIVE COMBINE_HI_8LO( H_ACTIVE_HI, H_ACTIVE_LO ) -#define H_BLANKING_HI LOWER_NIBBLE( (unsigned)block[ 4 ] ) -#define H_BLANKING COMBINE_HI_8LO( H_BLANKING_HI, H_BLANKING_LO ) - -#define V_ACTIVE_LO (unsigned)block[ 5 ] -#define V_BLANKING_LO (unsigned)block[ 6 ] -#define V_ACTIVE_HI UPPER_NIBBLE( (unsigned)block[ 7 ] ) -#define V_ACTIVE COMBINE_HI_8LO( V_ACTIVE_HI, V_ACTIVE_LO ) -#define V_BLANKING_HI LOWER_NIBBLE( (unsigned)block[ 7 ] ) -#define V_BLANKING COMBINE_HI_8LO( V_BLANKING_HI, V_BLANKING_LO ) - -#define H_SYNC_OFFSET_LO (unsigned)block[ 8 ] -#define H_SYNC_WIDTH_LO (unsigned)block[ 9 ] - -#define V_SYNC_OFFSET_LO UPPER_NIBBLE( (unsigned)block[ 10 ] ) -#define V_SYNC_WIDTH_LO LOWER_NIBBLE( (unsigned)block[ 10 ] ) - -#define V_SYNC_WIDTH_HI ((unsigned)block[ 11 ] & (1|2)) -#define V_SYNC_OFFSET_HI (((unsigned)block[ 11 ] & (4|8)) >> 2) - -#define H_SYNC_WIDTH_HI (((unsigned)block[ 11 ] & (16|32)) >> 4) -#define H_SYNC_OFFSET_HI (((unsigned)block[ 11 ] & (64|128)) >> 6) - -#define V_SYNC_WIDTH COMBINE_HI_4LO( V_SYNC_WIDTH_HI, V_SYNC_WIDTH_LO ) -#define V_SYNC_OFFSET COMBINE_HI_4LO( V_SYNC_OFFSET_HI, V_SYNC_OFFSET_LO ) - -#define H_SYNC_WIDTH COMBINE_HI_4LO( H_SYNC_WIDTH_HI, H_SYNC_WIDTH_LO ) -#define H_SYNC_OFFSET COMBINE_HI_4LO( H_SYNC_OFFSET_HI, H_SYNC_OFFSET_LO ) - -#define H_SIZE_LO (unsigned)block[ 12 ] -#define V_SIZE_LO (unsigned)block[ 13 ] - -#define H_SIZE_HI UPPER_NIBBLE( (unsigned)block[ 14 ] ) -#define V_SIZE_HI LOWER_NIBBLE( (unsigned)block[ 14 ] ) - -#define H_SIZE COMBINE_HI_8LO( H_SIZE_HI, H_SIZE_LO ) -#define V_SIZE COMBINE_HI_8LO( V_SIZE_HI, V_SIZE_LO ) - -#define H_BORDER (unsigned)block[ 15 ] -#define V_BORDER (unsigned)block[ 16 ] - -#define FLAGS (unsigned)block[ 17 ] - -#define INTERLACED (FLAGS&128) -#define SYNC_TYPE (FLAGS&3<<3) /* bits 4,3 */ -#define SYNC_SEPARATE (3<<3) -#define HSYNC_POSITIVE (FLAGS & 4) -#define VSYNC_POSITIVE (FLAGS & 2) - -#define V_MIN_RATE block[ 5 ] -#define V_MAX_RATE block[ 6 ] -#define H_MIN_RATE block[ 7 ] -#define H_MAX_RATE block[ 8 ] -#define MAX_PIXEL_CLOCK (((int)block[ 9 ]) * 10) -#define GTF_SUPPORT block[10] - -#define DPMS_ACTIVE_OFF (1 << 5) -#define DPMS_SUSPEND (1 << 6) -#define DPMS_STANDBY (1 << 7) - -#endif /* __EDID_H__ */ diff --git a/include/ehci.h b/include/ehci.h deleted file mode 100644 index 8122bd1..0000000 --- a/include/ehci.h +++ /dev/null @@ -1,211 +0,0 @@ -/*- - * Copyright (c) 2007-2008, Juniper Networks, Inc. - * Copyright (c) 2008, Michael Trimarchi - * All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef USB_EHCI_H -#define USB_EHCI_H - -#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 5 - -/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */ -#define DeviceRequest \ - ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8) - -#define DeviceOutRequest \ - ((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8) - -#define InterfaceRequest \ - ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8) - -#define EndpointRequest \ - ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8) - -#define EndpointOutRequest \ - ((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8) - -/* - * Register Space. - */ -struct ehci_hccr -{ - uint32_t cr_capbase; -#define HC_LENGTH(p) (((p) >> 0) & 0x00ff) -#define HC_VERSION(p) (((p) >> 16) & 0xffff) - uint32_t cr_hcsparams; -#define HCS_PPC(p) ((p) & (1 << 4)) -#define HCS_INDICATOR(p) ((p) & (1 << 16)) /* Port indicators */ -#define HCS_N_PORTS(p) (((p) >> 0) & 0xf) - uint32_t cr_hccparams; - uint8_t cr_hcsp_portrt[8]; -} __attribute__ ((packed)); - -struct ehci_hcor -{ - uint32_t or_usbcmd; -#define CMD_PARK (1 << 11) /* enable "park" */ -#define CMD_PARK_CNT(c) (((c) >> 8) & 3) /* how many transfers to park */ -#define CMD_ASE (1 << 5) /* async schedule enable */ -#define CMD_LRESET (1 << 7) /* partial reset */ -#define CMD_IAAD (1 << 5) /* "doorbell" interrupt */ -#define CMD_PSE (1 << 4) /* periodic schedule enable */ -#define CMD_RESET (1 << 1) /* reset HC not bus */ -#define CMD_RUN (1 << 0) /* start/stop HC */ - uint32_t or_usbsts; -#define STD_ASS (1 << 15) -#define STS_PSSTAT (1 << 14) -#define STS_RECL (1 << 13) -#define STS_HALT (1 << 12) -#define STS_IAA (1 << 5) -#define STS_HSE (1 << 4) -#define STS_FLR (1 << 3) -#define STS_PCD (1 << 2) -#define STS_USBERRINT (1 << 1) -#define STS_USBINT (1 << 0) - uint32_t or_usbintr; -#define INTR_IAAE (1 << 5) -#define INTR_HSEE (1 << 4) -#define INTR_FLRE (1 << 3) -#define INTR_PCDE (1 << 2) -#define INTR_USBERRINTE (1 << 1) -#define INTR_USBINTE (1 << 0) - uint32_t or_frindex; - uint32_t or_ctrldssegment; - uint32_t or_periodiclistbase; - uint32_t or_asynclistaddr; - uint32_t _reserved_[9]; - uint32_t or_configflag; -#define FLAG_CF (1 << 0) /* true: we'll support "high speed" */ - uint32_t or_portsc[CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS]; - uint32_t or_systune; -} __attribute__ ((packed)); - -#define USBMODE 0x68 /* USB Device mode */ -#define USBMODE_SDIS (1 << 3) /* Stream disable */ -#define USBMODE_BE (1 << 2) /* BE/LE endiannes select */ -#define USBMODE_CM_HC (3 << 0) /* host controller mode */ -#define USBMODE_CM_IDLE (0 << 0) /* idle state */ - -/* Interface descriptor */ -struct usb_linux_interface_descriptor -{ - unsigned char bLength; - unsigned char bDescriptorType; - unsigned char bInterfaceNumber; - unsigned char bAlternateSetting; - unsigned char bNumEndpoints; - unsigned char bInterfaceClass; - unsigned char bInterfaceSubClass; - unsigned char bInterfaceProtocol; - unsigned char iInterface; -} __attribute__ ((packed)); - -/* Configuration descriptor information.. */ -struct usb_linux_config_descriptor -{ - unsigned char bLength; - unsigned char bDescriptorType; - unsigned short wTotalLength; - unsigned char bNumInterfaces; - unsigned char bConfigurationValue; - unsigned char iConfiguration; - unsigned char bmAttributes; - unsigned char MaxPower; -} __attribute__ ((packed)); - -#if defined CONFIG_EHCI_DESC_BIG_ENDIAN -#define ehci_readl(x) (*((volatile uint32_t *)(x))) -#define ehci_writel(a, b) (*((volatile uint32_t *)(a)) = ((volatile uint32_t) b)) -#else -#define ehci_readl(x) swpl((*((volatile uint32_t *)(x)))) -#define ehci_writel(a, b) (*((volatile uint32_t *)(a)) = swpl(((volatile uint32_t) b))) -#endif - -#if defined CONFIG_EHCI_MMIO_BIG_ENDIAN -#define hc32_to_cpu(x) be32_to_cpu((x)) -#define cpu_to_hc32(x) cpu_to_be32((x)) -#else -#define hc32_to_cpu(x) swpl((x)) -#define cpu_to_hc32(x) swpl((x)) -#endif - -#define EHCI_PS_WKOC_E (1 << 22) /* RW wake on over current */ -#define EHCI_PS_WKDSCNNT_E (1 << 21) /* RW wake on disconnect */ -#define EHCI_PS_WKCNNT_E (1 << 20) /* RW wake on connect */ -#define EHCI_PS_PO (1 << 13) /* RW port owner */ -#define EHCI_PS_PP (1 << 12) /* RW,RO port power */ -#define EHCI_PS_LS (3 << 10) /* RO line status */ -#define EHCI_PS_PR (1 << 8) /* RW port reset */ -#define EHCI_PS_SUSP (1 << 7) /* RW suspend */ -#define EHCI_PS_FPR (1 << 6) /* RW force port resume */ -#define EHCI_PS_OCC (1 << 5) /* RWC over current change */ -#define EHCI_PS_OCA (1 << 4) /* RO over current active */ -#define EHCI_PS_PEC (1 << 3) /* RWC port enable change */ -#define EHCI_PS_PE (1 << 2) /* RW port enable */ -#define EHCI_PS_CSC (1 << 1) /* RWC connect status change */ -#define EHCI_PS_CS (1 << 0) /* RO connect status */ -#define EHCI_PS_CLEAR (EHCI_PS_OCC | EHCI_PS_PEC | EHCI_PS_CSC) - -#define EHCI_PS_IS_LOWSPEED(x) (((x) & EHCI_PS_LS) == (1 << 10)) - -/* - * Schedule Interface Space. - * - * IMPORTANT: Software must ensure that no interface data structure - * reachable by the EHCI host controller spans a 4K page boundary! - * - * Periodic transfers (i.e. isochronous and interrupt transfers) are - * not supported. - */ - -/* Queue Element Transfer Descriptor (qTD). */ -struct qTD -{ - uint32_t qt_next; -#define QT_NEXT_TERMINATE 1 - uint32_t qt_altnext; - uint32_t qt_token; - uint32_t qt_buffer[5]; -}; - -/* Queue Head (QH). */ -struct QH -{ - uint32_t qh_link; -#define QH_LINK_TERMINATE 1 -#define QH_LINK_TYPE_ITD 0 -#define QH_LINK_TYPE_QH 2 -#define QH_LINK_TYPE_SITD 4 -#define QH_LINK_TYPE_FSTN 6 - uint32_t qh_endpt1; - uint32_t qh_endpt2; - uint32_t qh_curtd; - struct qTD qh_overlay; - /* - * Add dummy fill value to make the size of this struct - * aligned to 32 bytes - */ - uint8_t fill[16]; -}; - -/* Low level init functions */ -int ehci_hcd_init(void); -int ehci_hcd_stop(void); - -#endif /* USB_EHCI_H */ diff --git a/include/eth.h b/include/eth.h deleted file mode 100644 index dc3b127..0000000 --- a/include/eth.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * File: eth.h - * Purpose: Definitions for Ethernet Frames. - * - * Modifications: - */ - -#ifndef _ETH_H -#define _ETH_H - -#include "bas_types.h" - -/*******************************************************************/ - -/* Ethernet standard lengths in bytes*/ -#define ETH_ADDR_LEN (6) -#define ETH_TYPE_LEN (2) -#define ETH_CRC_LEN (4) -#define ETH_MAX_DATA (1500) -#define ETH_MIN_DATA (46) -#define ETH_HDR_LEN (ETH_ADDR_LEN * 2 + ETH_TYPE_LEN) - -/* Defined Ethernet Frame Types */ -#define ETH_FRM_IP (0x0800) -#define ETH_FRM_ARP (0x0806) -#define ETH_FRM_RARP (0x8035) -#define ETH_FRM_TEST (0xA5A5) - -/* Maximum and Minimum Ethernet Frame Sizes */ -#define ETH_MAX_FRM (ETH_HDR_LEN + ETH_MAX_DATA + ETH_CRC_LEN) -#define ETH_MIN_FRM (ETH_HDR_LEN + ETH_MIN_DATA + ETH_CRC_LEN) -#define ETH_MTU (ETH_HDR_LEN + ETH_MAX_DATA) - -/* Ethernet Addresses */ -typedef uint8_t ETH_ADDR[ETH_ADDR_LEN]; - -/* 16-bit Ethernet Frame Type, ie. Protocol */ -typedef uint16_t ETH_FRM_TYPE; - -/* Ethernet Frame Header definition */ -typedef struct -{ - ETH_ADDR dest; - ETH_ADDR src; - ETH_FRM_TYPE type; -} ETH_HDR; - -/* Ethernet Frame definition */ -typedef struct -{ - ETH_HDR head; - uint8_t* data; -} ETH_FRAME; - -/*******************************************************************/ - -#endif /* _ETH_H */ diff --git a/include/exceptions.h b/include/exceptions.h deleted file mode 100644 index 06b7047..0000000 --- a/include/exceptions.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef _EXCEPTIONS_H_ -#define _EXCEPTIONS_H_ - -#include - -static inline uint32_t set_ipl(uint32_t ipl) -{ - uint32_t ret; - - __asm__ __volatile__( - " move.w sr,%[ret]\r\n" /* retrieve status register */ - " andi.l #0x07,%[ipl]\n\t" /* mask out ipl bits on new value */ - " lsl.l #8,%[ipl]\n\t" /* shift them to position */ - " move.l %[ret],d0\n\t" /* retrieve original value */ - " andi.l #0x0000f8ff,d0\n\t" /* clear ipl part */ - " or.l %[ipl],d0\n\t" /* or in new value */ - " move.w d0,sr\n\t" /* put it in place */ - " andi.l #0x0700,%[ret]\r\n" /* mask out ipl bits */ - " lsr.l #8,%[ret]\r\n" /* shift them to position */ - : [ret] "=&d" (ret) /* output */ - : [ipl] "d" (ipl) /* input */ - : "cc", "d0" /* clobber */ - ); - - return ret; -} - -#endif /* _EXCEPTIONS_H_ */ diff --git a/include/fb.h b/include/fb.h deleted file mode 100644 index 57cef1d..0000000 --- a/include/fb.h +++ /dev/null @@ -1,551 +0,0 @@ -#ifndef _FB_H -#define _FB_H - -/* Definitions of frame buffers */ - -#define FB_MAJOR 29 -#define FB_MAX 32 /* sufficient for now */ - -/* ioctls - 0x46 is 'F' */ -#define FBIOGET_VSCREENINFO 0x4600 -#define FBIOPUT_VSCREENINFO 0x4601 -#define FBIOGET_FSCREENINFO 0x4602 -#define FBIOPAN_DISPLAY 0x4606 -#define FBIOBLANK 0x4611 /* arg: 0 or vesa level + 1 */ -#define FBIO_ALLOC 0x4613 -#define FBIO_FREE 0x4614 - -/* picture format */ -#define PICT_FORMAT(bpp,type,a,r,g,b) (((bpp) << 24) | ((type) << 16) | ((a) << 12) | ((r) << 8) | ((g) << 4) | ((b))) -/* gray/color formats use a visual index instead of argb */ -#define PICT_VISFORMAT(bpp,type,vi) (((bpp) << 24) | ((type) << 16) | ((vi))) -#define PICT_FORMAT_BPP(f) (((f) >> 24) ) -#define PICT_FORMAT_TYPE(f) (((f) >> 16) & 0xff) -#define PICT_FORMAT_A(f) (((f) >> 12) & 0x0f) -#define PICT_FORMAT_R(f) (((f) >> 8) & 0x0f) -#define PICT_FORMAT_G(f) (((f) >> 4) & 0x0f) -#define PICT_FORMAT_B(f) (((f) ) & 0x0f) -#define PICT_FORMAT_RGB(f) (((f) ) & 0xfff) -#define PICT_FORMAT_VIS(f) (((f) ) & 0xffff) -#define PICT_TYPE_OTHER 0 -#define PICT_TYPE_A 1 -#define PICT_TYPE_ARGB 2 -#define PICT_TYPE_ABGR 3 -#define PICT_TYPE_COLOR 4 -#define PICT_TYPE_GRAY 5 -#define PICT_FORMAT_COLOR(f) (PICT_FORMAT_TYPE(f) & 2) -/* 32bpp formats */ -#define PICT_a8r8g8b8 PICT_FORMAT(32,PICT_TYPE_ARGB,8,8,8,8) -#define PICT_x8r8g8b8 PICT_FORMAT(32,PICT_TYPE_ARGB,0,8,8,8) -#define PICT_a8b8g8r8 PICT_FORMAT(32,PICT_TYPE_ABGR,8,8,8,8) -#define PICT_x8b8g8r8 PICT_FORMAT(32,PICT_TYPE_ABGR,0,8,8,8) -/* 24bpp formats */ -#define PICT_r8g8b8 PICT_FORMAT(24,PICT_TYPE_ARGB,0,8,8,8) -#define PICT_b8g8r8 PICT_FORMAT(24,PICT_TYPE_ABGR,0,8,8,8) -/* 16bpp formats */ -#define PICT_r5g6b5 PICT_FORMAT(16,PICT_TYPE_ARGB,0,5,6,5) -#define PICT_b5g6r5 PICT_FORMAT(16,PICT_TYPE_ABGR,0,5,6,5) -#define PICT_a1r5g5b5 PICT_FORMAT(16,PICT_TYPE_ARGB,1,5,5,5) -#define PICT_x1r5g5b5 PICT_FORMAT(16,PICT_TYPE_ARGB,0,5,5,5) -#define PICT_a1b5g5r5 PICT_FORMAT(16,PICT_TYPE_ABGR,1,5,5,5) -#define PICT_x1b5g5r5 PICT_FORMAT(16,PICT_TYPE_ABGR,0,5,5,5) -#define PICT_a4r4g4b4 PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4) -#define PICT_x4r4g4b4 PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4) -#define PICT_a4b4g4r4 PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4) -#define PICT_x4b4g4r4 PICT_FORMAT(16,PICT_TYPE_ARGB,4,4,4,4) -/* 8bpp formats */ -#define PICT_a8 PICT_FORMAT(8,PICT_TYPE_A,8,0,0,0) -#define PICT_r3g3b2 PICT_FORMAT(8,PICT_TYPE_ARGB,0,3,3,2) -#define PICT_b2g3r3 PICT_FORMAT(8,PICT_TYPE_ABGR,0,3,3,2) -#define PICT_a2r2g2b2 PICT_FORMAT(8,PICT_TYPE_ARGB,2,2,2,2) -#define PICT_a2b2g2r2 PICT_FORMAT(8,PICT_TYPE_ABGR,2,2,2,2) -#define PICT_c8 PICT_FORMAT(8,PICT_TYPE_COLOR,0,0,0,0) -#define PICT_g8 PICT_FORMAT(8,PICT_TYPE_GRAY,0,0,0,0) - -/* fVDI */ -#define MODE_EMUL_MONO_FLAG 1 -#define MODE_VESA_FLAG 2 /* for modedb.c */ -struct mode_option { - short used; /* Whether the mode option was used or not. */ - short width; - short height; - short bpp; - short freq; - short flags; -}; - -extern struct mode_option resolution; /* fVDI */ - -#define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */ -#define FB_TYPE_PLANES 1 /* Non interleaved planes */ -#define FB_TYPE_INTERLEAVED_PLANES 2 /* Interleaved planes */ -#define FB_TYPE_TEXT 3 /* Text/attributes */ -#define FB_TYPE_VGA_PLANES 4 /* EGA/VGA planes */ - -#define FB_AUX_TEXT_MDA 0 /* Monochrome text */ -#define FB_AUX_TEXT_CGA 1 /* CGA/EGA/VGA Color text */ -#define FB_AUX_TEXT_S3_MMIO 2 /* S3 MMIO fasttext */ -#define FB_AUX_TEXT_MGA_STEP16 3 /* MGA Millenium I: text, attr, 14 reserved bytes */ -#define FB_AUX_TEXT_MGA_STEP8 4 /* other MGAs: text, attr, 6 reserved bytes */ - -#define FB_AUX_VGA_PLANES_VGA4 0 /* 16 color planes (EGA/VGA) */ -#define FB_AUX_VGA_PLANES_CFB4 1 /* CFB4 in planes (VGA) */ -#define FB_AUX_VGA_PLANES_CFB8 2 /* CFB8 in planes (VGA) */ - -#define FB_VISUAL_MONO01 0 /* Monochr. 1=Black 0=White */ -#define FB_VISUAL_MONO10 1 /* Monochr. 1=White 0=Black */ -#define FB_VISUAL_TRUECOLOR 2 /* True color */ -#define FB_VISUAL_PSEUDOCOLOR 3 /* Pseudo color (like atari) */ -#define FB_VISUAL_DIRECTCOLOR 4 /* Direct color */ -#define FB_VISUAL_STATIC_PSEUDOCOLOR 5 /* Pseudo color readonly */ - -#define FB_ACCEL_NONE 0 /* no hardware accelerator */ -#define FB_ACCEL_ATARIBLITT 1 /* Atari Blitter */ -#define FB_ACCEL_AMIGABLITT 2 /* Amiga Blitter */ -#define FB_ACCEL_S3_TRIO64 3 /* Cybervision64 (S3 Trio64) */ -#define FB_ACCEL_NCR_77C32BLT 4 /* RetinaZ3 (NCR 77C32BLT) */ -#define FB_ACCEL_S3_VIRGE 5 /* Cybervision64/3D (S3 ViRGE) */ -#define FB_ACCEL_ATI_MACH64GX 6 /* ATI Mach 64GX family */ -#define FB_ACCEL_DEC_TGA 7 /* DEC 21030 TGA */ -#define FB_ACCEL_ATI_MACH64CT 8 /* ATI Mach 64CT family */ -#define FB_ACCEL_ATI_MACH64VT 9 /* ATI Mach 64CT family VT class */ -#define FB_ACCEL_ATI_MACH64GT 10 /* ATI Mach 64CT family GT class */ -#define FB_ACCEL_SUN_CREATOR 11 /* Sun Creator/Creator3D */ -#define FB_ACCEL_SUN_CGSIX 12 /* Sun cg6 */ -#define FB_ACCEL_SUN_LEO 13 /* Sun leo/zx */ -#define FB_ACCEL_IMS_TWINTURBO 14 /* IMS Twin Turbo */ -#define FB_ACCEL_3DLABS_PERMEDIA2 15 /* 3Dlabs Permedia 2 */ -#define FB_ACCEL_MATROX_MGA2064W 16 /* Matrox MGA2064W (Millenium) */ -#define FB_ACCEL_MATROX_MGA1064SG 17 /* Matrox MGA1064SG (Mystique) */ -#define FB_ACCEL_MATROX_MGA2164W 18 /* Matrox MGA2164W (Millenium II) */ -#define FB_ACCEL_MATROX_MGA2164W_AGP 19 /* Matrox MGA2164W (Millenium II) */ -#define FB_ACCEL_MATROX_MGAG100 20 /* Matrox G100 (Productiva G100) */ -#define FB_ACCEL_MATROX_MGAG200 21 /* Matrox G200 (Myst, Mill, ...) */ -#define FB_ACCEL_SUN_CG14 22 /* Sun cgfourteen */ -#define FB_ACCEL_SUN_BWTWO 23 /* Sun bwtwo */ -#define FB_ACCEL_SUN_CGTHREE 24 /* Sun cgthree */ -#define FB_ACCEL_SUN_TCX 25 /* Sun tcx */ -#define FB_ACCEL_MATROX_MGAG400 26 /* Matrox G400 */ -#define FB_ACCEL_NV3 27 /* nVidia RIVA 128 */ -#define FB_ACCEL_NV4 28 /* nVidia RIVA TNT */ -#define FB_ACCEL_NV5 29 /* nVidia RIVA TNT2 */ -#define FB_ACCEL_CT_6555x 30 /* C&T 6555x */ -#define FB_ACCEL_3DFX_BANSHEE 31 /* 3Dfx Banshee */ -#define FB_ACCEL_ATI_RAGE128 32 /* ATI Rage128 family */ -#define FB_ACCEL_IGS_CYBER2000 33 /* CyberPro 2000 */ -#define FB_ACCEL_IGS_CYBER2010 34 /* CyberPro 2010 */ -#define FB_ACCEL_IGS_CYBER5000 35 /* CyberPro 5000 */ -#define FB_ACCEL_SIS_GLAMOUR 36 /* SiS 300/630/540 */ -#define FB_ACCEL_3DLABS_PERMEDIA3 37 /* 3Dlabs Permedia 3 */ -#define FB_ACCEL_ATI_RADEON 38 /* ATI Radeon family */ -#define FB_ACCEL_I810 39 /* Intel 810/815 */ -#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 650, 740 */ -#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre") */ -#define FB_ACCEL_I830 42 /* Intel 830M/845G/85x/865G */ -#define FB_ACCEL_NV_10 43 /* nVidia Arch 10 */ -#define FB_ACCEL_NV_20 44 /* nVidia Arch 20 */ -#define FB_ACCEL_NV_30 45 /* nVidia Arch 30 */ -#define FB_ACCEL_NV_40 46 /* nVidia Arch 40 */ -#define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */ -#define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */ -#define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */ -#define FB_ACCEL_NEOMAGIC_NM2097 93 /* NeoMagic NM2097 */ -#define FB_ACCEL_NEOMAGIC_NM2160 94 /* NeoMagic NM2160 */ -#define FB_ACCEL_NEOMAGIC_NM2200 95 /* NeoMagic NM2200 */ -#define FB_ACCEL_NEOMAGIC_NM2230 96 /* NeoMagic NM2230 */ -#define FB_ACCEL_NEOMAGIC_NM2360 97 /* NeoMagic NM2360 */ -#define FB_ACCEL_NEOMAGIC_NM2380 98 /* NeoMagic NM2380 */ - -#define FB_ACCEL_SAVAGE4 0x80 /* S3 Savage4 */ -#define FB_ACCEL_SAVAGE3D 0x81 /* S3 Savage3D */ -#define FB_ACCEL_SAVAGE3D_MV 0x82 /* S3 Savage3D-MV */ -#define FB_ACCEL_SAVAGE2000 0x83 /* S3 Savage2000 */ -#define FB_ACCEL_SAVAGE_MX_MV 0x84 /* S3 Savage/MX-MV */ -#define FB_ACCEL_SAVAGE_MX 0x85 /* S3 Savage/MX */ -#define FB_ACCEL_SAVAGE_IX_MV 0x86 /* S3 Savage/IX-MV */ -#define FB_ACCEL_SAVAGE_IX 0x87 /* S3 Savage/IX */ -#define FB_ACCEL_PROSAVAGE_PM 0x88 /* S3 ProSavage PM133 */ -#define FB_ACCEL_PROSAVAGE_KM 0x89 /* S3 ProSavage KM133 */ -#define FB_ACCEL_S3TWISTER_P 0x8a /* S3 Twister */ -#define FB_ACCEL_S3TWISTER_K 0x8b /* S3 TwisterK */ -#define FB_ACCEL_SUPERSAVAGE 0x8c /* S3 Supersavage */ -#define FB_ACCEL_PROSAVAGE_DDR 0x8d /* S3 ProSavage DDR */ -#define FB_ACCEL_PROSAVAGE_DDRK 0x8e /* S3 ProSavage DDR-K */ - -struct fb_fix_screeninfo { - char id[16]; /* identification string eg "TT Builtin" */ - unsigned long smem_start; /* Start of frame buffer mem */ - /* (physical address) */ - unsigned long smem_len; /* Length of frame buffer mem */ - unsigned long type; /* see FB_TYPE_* */ - unsigned long type_aux; /* Interleave for interleaved Planes */ - unsigned long visual; /* see FB_VISUAL_* */ - unsigned short xpanstep; /* zero if no hardware panning */ - unsigned short ypanstep; /* zero if no hardware panning */ - unsigned short ywrapstep; /* zero if no hardware ywrap */ - unsigned long line_length; /* length of a line in bytes */ - unsigned long mmio_start; /* Start of Memory Mapped I/O */ - /* (physical address) */ - unsigned long mmio_len; /* Length of Memory Mapped I/O */ - unsigned long accel; /* Indicate to driver which */ - /* specific chip/card we have */ - unsigned short reserved[3]; /* Reserved for future compatibility */ -}; - -/* Interpretation of offset for color fields: All offsets are from the right, - * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you - * can use the offset as right argument to <<). A pixel afterwards is a bit - * stream and is written to video memory as that unmodified. This implies - * big-endian byte order if bits_per_pixel is greater than 8. - */ -struct fb_bitfield { - unsigned long offset; /* beginning of bitfield */ - unsigned long length; /* length of bitfield */ - unsigned long msb_right; /* != 0 : Most significant bit is */ - /* right */ -}; - -#define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */ - -#define FB_ACTIVATE_NOW 0 /* set values immediately (or vbl)*/ -#define FB_ACTIVATE_NXTOPEN 1 /* activate on next open */ -#define FB_ACTIVATE_TEST 2 /* don't set, round up impossible */ -#define FB_ACTIVATE_MASK 15 - /* values */ -#define FB_ACTIVATE_VBL 16 /* activate values on next vbl */ -#define FB_CHANGE_CMAP_VBL 32 /* change colormap on vbl */ -#define FB_ACTIVATE_ALL 64 /* change all VCs on this fb */ -#define FB_ACTIVATE_FORCE 128 /* force apply even when no change*/ -#define FB_ACTIVATE_INV_MODE 256 /* invalidate videomode */ - -#define FB_ACCELF_TEXT 1 /* (OBSOLETE) see fb_info.flags and vc_mode */ - -#define FB_SYNC_HOR_HIGH_ACT 1 /* horizontal sync high active */ -#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */ -#define FB_SYNC_EXT 4 /* external sync */ -#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */ -#define FB_SYNC_BROADCAST 16 /* broadcast video timings */ - /* vtotal = 144d/288n/576i => PAL */ - /* vtotal = 121d/242n/484i => NTSC */ -#define FB_SYNC_ON_GREEN 32 /* sync on green */ - -#define FB_VMODE_NONINTERLACED 0 /* non interlaced */ -#define FB_VMODE_INTERLACED 1 /* interlaced */ -#define FB_VMODE_DOUBLE 2 /* double scan */ -#define FB_VMODE_MASK 255 - -#define FB_VMODE_YWRAP 256 /* ywrap instead of panning */ -#define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */ -#define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */ - -#define PICOS2KHZ(a) (1000000000UL/(a)) -#define KHZ2PICOS(a) (1000000000UL/(a)) - -struct fb_var_screeninfo { - unsigned long xres; /* visible resolution */ - unsigned long yres; - unsigned long xres_virtual; /* virtual resolution */ - unsigned long yres_virtual; - unsigned long xoffset; /* offset from virtual to visible */ - unsigned long yoffset; /* resolution */ - - unsigned long bits_per_pixel; /* guess what */ - unsigned long grayscale; /* != 0 Graylevels instead of colors */ - - struct fb_bitfield red; /* bitfield in fb mem if true color, */ - struct fb_bitfield green; /* else only length is significant */ - struct fb_bitfield blue; - struct fb_bitfield transp; /* transparency */ - - unsigned long nonstd; /* != 0 Non standard pixel format */ - - unsigned long activate; /* see FB_ACTIVATE_* */ - - unsigned long height; /* height of picture in mm */ - unsigned long width; /* width of picture in mm */ - - unsigned long accel_flags; /* (OBSOLETE) see fb_info.flags */ - - /* Timing: All values in pixclocks, except pixclock (of course) */ - unsigned long pixclock; /* pixel clock in ps (pico seconds) */ - unsigned long left_margin; /* time from sync to picture */ - unsigned long right_margin; /* time from picture to sync */ - unsigned long upper_margin; /* time from sync to picture */ - unsigned long lower_margin; - unsigned long hsync_len; /* length of horizontal sync */ - unsigned long vsync_len; /* length of vertical sync */ - unsigned long sync; /* see FB_SYNC_* */ - unsigned long vmode; /* see FB_VMODE_* */ - unsigned long rotate; /* angle we rotate counter clockwise */ - unsigned long refresh; - unsigned long reserved[4]; /* Reserved for future compatibility */ -}; - -/* VESA Blanking Levels */ -#define VESA_NO_BLANKING 0 -#define VESA_VSYNC_SUSPEND 1 -#define VESA_HSYNC_SUSPEND 2 -#define VESA_POWERDOWN 3 - -enum { - /* screen: unblanked, hsync: on, vsync: on */ - FB_BLANK_UNBLANK = VESA_NO_BLANKING, - /* screen: blanked, hsync: on, vsync: on */ - FB_BLANK_NORMAL = VESA_NO_BLANKING + 1, - /* screen: blanked, hsync: on, vsync: off */ - FB_BLANK_VSYNC_SUSPEND = VESA_VSYNC_SUSPEND + 1, - /* screen: blanked, hsync: off, vsync: on */ - FB_BLANK_HSYNC_SUSPEND = VESA_HSYNC_SUSPEND + 1, - /* screen: blanked, hsync: off, vsync: off */ - FB_BLANK_POWERDOWN = VESA_POWERDOWN + 1 -}; - -#define FB_VBLANK_VBLANKING 0x001 /* currently in a vertical blank */ -#define FB_VBLANK_HBLANKING 0x002 /* currently in a horizontal blank */ -#define FB_VBLANK_HAVE_VBLANK 0x004 /* vertical blanks can be detected */ -#define FB_VBLANK_HAVE_HBLANK 0x008 /* horizontal blanks can be detected */ -#define FB_VBLANK_HAVE_COUNT 0x010 /* global retrace counter is available */ -#define FB_VBLANK_HAVE_VCOUNT 0x020 /* the vcount field is valid */ -#define FB_VBLANK_HAVE_HCOUNT 0x040 /* the hcount field is valid */ -#define FB_VBLANK_VSYNCING 0x080 /* currently in a vsync */ -#define FB_VBLANK_HAVE_VSYNC 0x100 /* verical syncs can be detected */ - -struct fb_vblank { - unsigned long flags; /* FB_VBLANK flags */ - unsigned long count; /* counter of retraces since boot */ - unsigned long vcount; /* current scanline position */ - unsigned long hcount; /* current scandot position */ - unsigned long reserved[4]; /* reserved for future compatibility */ -}; - -struct vm_area_struct; -struct fb_info; -struct device; -struct file; - -/* Definitions below are used in the parsed monitor specs */ -#define FB_DPMS_ACTIVE_OFF 1 -#define FB_DPMS_SUSPEND 2 -#define FB_DPMS_STANDBY 4 - -#define FB_DISP_DDI 1 -#define FB_DISP_ANA_700_300 2 -#define FB_DISP_ANA_714_286 4 -#define FB_DISP_ANA_1000_400 8 -#define FB_DISP_ANA_700_000 16 - -#define FB_DISP_MONO 32 -#define FB_DISP_RGB 64 -#define FB_DISP_MULTI 128 -#define FB_DISP_UNKNOWN 256 - -#define FB_SIGNAL_NONE 0 -#define FB_SIGNAL_BLANK_BLANK 1 -#define FB_SIGNAL_SEPARATE 2 -#define FB_SIGNAL_COMPOSITE 4 -#define FB_SIGNAL_SYNC_ON_GREEN 8 -#define FB_SIGNAL_SERRATION_ON 16 - -#define FB_MISC_PRIM_COLOR 1 -#define FB_MISC_1ST_DETAIL 2 /* First Detailed Timing is preferred */ -struct fb_chroma { - unsigned long redx; /* in fraction of 1024 */ - unsigned long greenx; - unsigned long bluex; - unsigned long whitex; - unsigned long redy; - unsigned long greeny; - unsigned long bluey; - unsigned long whitey; -}; - -struct fb_monspecs { - struct fb_chroma chroma; - struct fb_videomode *modedb; /* mode database */ - unsigned char manufacturer[4]; /* Manufacturer */ - unsigned char monitor[14]; /* Monitor String */ - unsigned char serial_no[14]; /* Serial Number */ - unsigned char ascii[14]; /* ? */ - unsigned long modedb_len; /* mode database length */ - unsigned long model; /* Monitor Model */ - unsigned long serial; /* Serial Number - Integer */ - unsigned long year; /* Year manufactured */ - unsigned long week; /* Week Manufactured */ - unsigned long hfmin; /* hfreq lower limit (Hz) */ - unsigned long hfmax; /* hfreq upper limit (Hz) */ - unsigned long dclkmin; /* pixelclock lower limit (Hz) */ - unsigned long dclkmax; /* pixelclock upper limit (Hz) */ - unsigned short input; /* display type - see FB_DISP_* */ - unsigned short dpms; /* DPMS support - see FB_DPMS_ */ - unsigned short signal; /* Signal Type - see FB_SIGNAL_* */ - unsigned short vfmin; /* vfreq lower limit (Hz) */ - unsigned short vfmax; /* vfreq upper limit (Hz) */ - unsigned short gamma; /* Gamma - in fractions of 100 */ - unsigned short gtf : 1; /* supports GTF */ - unsigned short misc; /* Misc flags - see FB_MISC_* */ - unsigned char version; /* EDID version... */ - unsigned char revision; /* ...and revision */ - unsigned char max_x; /* Maximum horizontal size (cm) */ - unsigned char max_y; /* Maximum vertical size (cm) */ -}; - -struct fb_ops { - /* checks var and eventually tweaks if to soomething supported, - * DO NOT MODIFY PAR */ - int (*fb_check_var)(struct fb_var_screeninfo *var, struct fb_info *info); - /* set the video mode according to info->var */ - int (*fb_set_par)(struct fb_info *info); - /* set color register */ - int (*fb_setcolreg)(unsigned regno, unsigned red, unsigned green, - unsigned blue, unsigned transp, struct fb_info *info); - /* pan display */ - int (*fb_pan_display)(struct fb_var_screeninfo *var, struct fb_info *info); - /* blank display */ - int (*fb_blank)(int blank, struct fb_info *info); - /* wait for blit idle */ - int (*fb_sync)(struct fb_info *info); - /* perform fb specific ioctl */ - int (*fb_ioctl)(unsigned int cmd, unsigned long arg, struct fb_info *info); - /* Buildthe modedb for head 1 (head 2 will come later), check panel infos - * from either BIOS or EDID, and pick up the default mode */ - void (*fb_check_modes)(struct fb_info *info, struct mode_option *resolution); - /* Accel functions */ -#define DEGREES_0 0 -#define DEGREES_90 1 -#define DEGREES_180 2 -#define DEGREES_270 3 -#define OMIT_LAST 1 - void (*SetupForSolidFill)(struct fb_info *info, int color, int rop, unsigned int planemask); - void (*SubsequentSolidFillRect)(struct fb_info *info, int x, int y, int w, int h); - void (*SetupForSolidLine)(struct fb_info *info, int color, int rop, unsigned int planemask); - void (*SubsequentSolidHorVertLine)(struct fb_info *info, int x, int y, int len, int dir); - void (*SubsequentSolidTwoPointLine)(struct fb_info *info, int xa, int ya, int xb, int yb, int flags); - void (*SetupForDashedLine)(struct fb_info *info, int fg, int bg, int rop, unsigned int planemask, int length, unsigned char *pattern); - void (*SubsequentDashedTwoPointLine)(struct fb_info *info, int xa, int ya, int xb, int yb, int flags, int phase); - void (*SetupForScreenToScreenCopy)(struct fb_info *info, int xdir, int ydir, int rop, unsigned int planemask, int trans_color); - void (*SubsequentScreenToScreenCopy)(struct fb_info *info, int xa, int ya, int xb, int yb, int w, int h); - void (*ScreenToScreenCopy)(struct fb_info *info, int xa, int ya, int xb, int yb, int w, int h, int rop); - void (*SetupForMono8x8PatternFill)(struct fb_info *info, int patternx, int patterny, int fg, int bg, int rop, unsigned int planemask); - void (*SubsequentMono8x8PatternFillRect)(struct fb_info *info, int patternx, int patterny, int x, int y, int w, int h); - void (*SetupForScanlineCPUToScreenColorExpandFill)(struct fb_info *info, int fg, int bg, int rop, unsigned int planemask); - void (*SubsequentScanlineCPUToScreenColorExpandFill)(struct fb_info *info, int x, int y, int w, int h, int skipleft); - void (*SubsequentScanline)(struct fb_info *info, unsigned long *buf); - void (*SetupForScanlineImageWrite)(struct fb_info *info, int rop, unsigned int planemask, int trans_color, int bpp); - void (*SubsequentScanlineImageWriteRect)(struct fb_info *info, int x, int y, int w, int h, int skipleft); - void (*SetClippingRectangle)(struct fb_info *info, int xa, int ya, int xb, int yb); - void (*DisableClipping)(struct fb_info *info); - int (*SetupForCPUToScreenAlphaTexture)(struct fb_info *info, - int op, unsigned short red, unsigned short green, unsigned short blue, unsigned short alpha, unsigned long maskFormat, unsigned long dstFormat, unsigned char *alphaPtr, int alphaPitch, int width, int height, int flags); - int (*SetupForCPUToScreenTexture)(struct fb_info *info, int op, unsigned long srcFormat, unsigned long dstFormat, unsigned char *texPtr, int texPitch, int width, int height, int flags); - void (*SubsequentCPUToScreenTexture)(struct fb_info *info, int dstx, int dsty, int srcx, int srcy, int width, int height); - /* Cursor functions */ - void (*SetCursorColors)(struct fb_info *info, int bg, int fg); - void (*SetCursorPosition)(struct fb_info *info, int x, int y); - void (*LoadCursorImage)(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom); - void (*HideCursor)(struct fb_info *info); - void (*ShowCursor)(struct fb_info *info); - long (*CursorInit)(struct fb_info *info); - void (*WaitVbl)(struct fb_info *info); -}; - -struct fb_info { - struct fb_var_screeninfo var; /* Current var */ - struct fb_fix_screeninfo fix; /* Current fix */ - struct fb_monspecs monspecs; /* Current Monitor specs */ - struct fb_videomode *mode; /* current mode */ - char *screen_base; /* Virtual address */ - unsigned long screen_size; - char *ram_base; /* base vram */ - unsigned long ram_size; /* vram size */ - char *screen_mono; - long update_mono; - struct fb_ops *fbops; - void *par; /* device dependent */ -}; - -/* fbmem.c */ -extern int fb_pan_display(struct fb_info *info, struct fb_var_screeninfo *var); -extern int fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var); -extern int fb_blank(struct fb_info *info, int blank); -extern int fb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg); -extern struct fb_info *framebuffer_alloc(unsigned long size); -extern void framebuffer_release(struct fb_info *info); - -/* offscreen.c */ -extern long offscreen_free(struct fb_info *info, long addr); -extern long offscreen_alloc(struct fb_info *info, long amount); -extern long offscren_reserved(struct fb_info *info); -extern void offscreen_init(struct fb_info *info); - -/* fbmon.c */ -#define FB_MAXTIMINGS 0 -#define FB_VSYNCTIMINGS 1 -#define FB_HSYNCTIMINGS 2 -#define FB_DCLKTIMINGS 3 -#define FB_IGNOREMON 0x100 - -#define FB_MODE_IS_UNKNOWN 0 -#define FB_MODE_IS_DETAILED 1 -#define FB_MODE_IS_STANDARD 2 -#define FB_MODE_IS_VESA 4 -#define FB_MODE_IS_CALCULATED 8 -#define FB_MODE_IS_FIRST 16 -#define FB_MODE_IS_FROM_VAR 32 - -extern void fb_destroy_modedb(struct fb_videomode *modedb); -extern int fb_parse_edid(unsigned char *edid, struct fb_var_screeninfo *var); -extern void fb_edid_to_monspecs(unsigned char *edid, struct fb_monspecs *specs); -extern int fb_get_mode(int flags, unsigned long val, struct fb_var_screeninfo *var, struct fb_info *info); -extern int fb_validate_mode(const struct fb_var_screeninfo *var, struct fb_info *info); - -/* modedb.c */ -#define VESA_MODEDB_SIZE 34 -extern int fb_find_mode(struct fb_var_screeninfo *var, - struct fb_info *info, struct mode_option *resolution , - const struct fb_videomode *db, unsigned int dbsize, - const struct fb_videomode *default_mode, unsigned int default_bpp); -extern void fb_var_to_videomode(struct fb_videomode *mode, struct fb_var_screeninfo *var); -extern void fb_videomode_to_var(struct fb_var_screeninfo *var, struct fb_videomode *mode); -extern int fb_mode_is_equal(struct fb_videomode *mode1, struct fb_videomode *mode2); - -struct fb_videomode { - unsigned short refresh; /* optional */ - unsigned short xres; - unsigned short yres; - unsigned long pixclock; - unsigned short left_margin; - unsigned short right_margin; - unsigned short upper_margin; - unsigned short lower_margin; - unsigned short hsync_len; - unsigned short vsync_len; - unsigned short sync; - unsigned short vmode; - unsigned short flag; -}; - -extern const struct fb_videomode vesa_modes[]; - -/* timer */ -#ifdef COLDFIRE -#ifdef MCF5445X -#define US_TO_TIMER(a) (a) -#define TIMER_TO_US(a) (a) -#else /* MCF548X */ -#define US_TO_TIMER(a) ((a)*100) -#define TIMER_TO_US(a) ((a)/100) -#endif -#else -#define US_TO_TIMER(a) (((a)*256)/5000) -#define TIMER_TO_US(a) (((a)*5000)/256) -#endif - -extern void start_timeout(void); -extern int end_timeout(long msec); -extern void mdelay(long msec); -extern void install_vbl_timer(void *func, int remove); -extern void uninstall_vbl_timer(void *func); - -extern struct fb_info *info_fvdi; -#endif /* _FB_H */ diff --git a/include/fec.h b/include/fec.h deleted file mode 100644 index c439618..0000000 --- a/include/fec.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * File: fec.h - * Purpose: Driver for the Fast Ethernet Controller (FEC) - * - * Notes: - */ - -#ifndef _FEC_H_ -#define _FEC_H_ - -/********************************************************************/ -/* MII Speed Settings */ -#define FEC_MII_10BASE_T 0 -#define FEC_MII_100BASE_TX 1 - -/* MII Duplex Settings */ -#define FEC_MII_HALF_DUPLEX 0 -#define FEC_MII_FULL_DUPLEX 1 - -/* Timeout for MII communications */ -#define FEC_MII_TIMEOUT 0x10000 - -/* External Interface Modes */ -#define FEC_MODE_7WIRE 0 -#define FEC_MODE_MII 1 -#define FEC_MODE_LOOPBACK 2 /* Internal Loopback */ - -/* - * FEC Event Log - */ -typedef struct -{ - int total; /* total count of errors */ - int hberr; /* heartbeat error */ - int babr; /* babbling receiver */ - int babt; /* babbling transmitter */ - int gra; /* graceful stop complete */ - int txf; /* transmit frame */ - int mii; /* MII */ - int lc; /* late collision */ - int rl; /* collision retry limit */ - int xfun; /* transmit FIFO underrrun */ - int xferr; /* transmit FIFO error */ - int rferr; /* receive FIFO error */ - int dtxf; /* DMA transmit frame */ - int drxf; /* DMA receive frame */ - int rfsw_inv; /* Invalid bit in RFSW */ - int rfsw_l; /* RFSW Last in Frame */ - int rfsw_m; /* RFSW Miss */ - int rfsw_bc; /* RFSW Broadcast */ - int rfsw_mc; /* RFSW Multicast */ - int rfsw_lg; /* RFSW Length Violation */ - int rfsw_no; /* RFSW Non-octet */ - int rfsw_cr; /* RFSW Bad CRC */ - int rfsw_ov; /* RFSW Overflow */ - int rfsw_tr; /* RFSW Truncated */ -} FEC_EVENT_LOG; - - -extern int fec_mii_write(uint8_t , uint8_t , uint8_t , uint16_t ); -extern int fec_mii_read(uint8_t , uint8_t , uint8_t , uint16_t *); -extern void fec_mii_init(uint8_t, uint32_t); -extern void fec_mib_init(uint8_t); -extern void fec_mib_dump(uint8_t); -extern void fec_log_init(uint8_t); -extern void fec_log_dump(uint8_t); -extern void fec_debug_dump(uint8_t); -extern void fec_duplex (uint8_t, uint8_t); -extern uint8_t fec_hash_address(const uint8_t *); -extern void fec_set_address (uint8_t ch, const uint8_t *); -extern void fec_reset (uint8_t); -extern void fec_init(uint8_t ch, uint8_t mode, const uint8_t *pa); -extern void fec_rx_start(uint8_t, int8_t *); -extern void fec_rx_restart(uint8_t); -extern void fec_rx_stop (uint8_t); -extern void fec_rx_frame(uint8_t, NIF *); -extern void fec0_rx_frame(void); -extern void fec1_rx_frame(void); -extern void fec_tx_start(uint8_t, int8_t *); -extern void fec_tx_restart(uint8_t); -extern void fec_tx_stop (uint8_t); -extern void fec0_tx_frame(void); -extern void fec1_tx_frame(void); -extern int fec_send(uint8_t, NIF *, uint8_t *, uint8_t *, uint16_t , NBUF *); -extern int fec0_send(NIF *, uint8_t *, uint8_t *, uint16_t , NBUF *); -extern int fec1_send(NIF *, uint8_t *, uint8_t *, uint16_t , NBUF *); -extern void fec_irq_enable(uint8_t, uint8_t, uint8_t); -extern void fec_irq_disable(uint8_t); -extern void fec_interrupt_handler(uint8_t); -extern bool fec0_interrupt_handler(void *, void *); -extern bool fec1_interrupt_handler(void *, void *); -extern void fec_eth_setup(uint8_t, uint8_t, uint8_t, uint8_t, const uint8_t *); -extern void fec_eth_reset(uint8_t); -extern void fec_eth_stop(uint8_t); - -#endif /* _FEC_H_ */ diff --git a/include/fecbd.h b/include/fecbd.h deleted file mode 100644 index 5f71454..0000000 --- a/include/fecbd.h +++ /dev/null @@ -1,93 +0,0 @@ -/* - * File: fecbd.h - * Purpose: - * - * Purpose: Provide a simple buffer management driver - */ - -#ifndef _FECBD_H_ -#define _FECBD_H_ - -#include "bas_types.h" - -/********************************************************************/ - -#define Rx 1 -#define Tx 0 - -/* - * Buffer sizes in bytes - */ -#ifndef RX_BUF_SZ -#define RX_BUF_SZ NBUF_SZ -#endif -#ifndef TX_BUF_SZ -#define TX_BUF_SZ NBUF_SZ -#endif - -/* - * Number of Rx and Tx Buffers and Buffer Descriptors - */ -#ifndef NRXBD -#define NRXBD 20 -#endif -#ifndef NTXBD -#define NTXBD 20 -#endif - -/* - * Buffer Descriptor Format - */ -typedef struct -{ - uint16_t status; /* control and status */ - uint16_t length; /* transfer length */ - uint8_t *data; /* buffer address */ -} FECBD; - -/* - * Bit level definitions for status field of buffer descriptors - */ -#define TX_BD_R 0x8000 -#define TX_BD_TO1 0x4000 -#define TX_BD_W 0x2000 -#define TX_BD_TO2 0x1000 -#define TX_BD_INTERRUPT 0x1000 /* MCF547x/8x Only */ -#define TX_BD_L 0x0800 -#define TX_BD_TC 0x0400 -#define TX_BD_DEF 0x0200 /* MCF5272 Only */ -#define TX_BD_ABC 0x0200 -#define TX_BD_HB 0x0100 /* MCF5272 Only */ -#define TX_BD_LC 0x0080 /* MCF5272 Only */ -#define TX_BD_RL 0x0040 /* MCF5272 Only */ -#define TX_BD_UN 0x0002 /* MCF5272 Only */ -#define TX_BD_CSL 0x0001 /* MCF5272 Only */ - -#define RX_BD_E 0x8000 -#define RX_BD_R01 0x4000 -#define RX_BD_W 0x2000 -#define RX_BD_R02 0x1000 -#define RX_BD_INTERRUPT 0x1000 /* MCF547x/8x Only */ -#define RX_BD_L 0x0800 -#define RX_BD_M 0x0100 -#define RX_BD_BC 0x0080 -#define RX_BD_MC 0x0040 -#define RX_BD_LG 0x0020 -#define RX_BD_NO 0x0010 -#define RX_BD_CR 0x0004 -#define RX_BD_OV 0x0002 -#define RX_BD_TR 0x0001 -#define RX_BD_ERROR (RX_BD_NO | RX_BD_CR | RX_BD_OV | RX_BD_TR) - -/* - * Functions provided in fec_bd.c - */ -extern void fecbd_init(uint8_t); -extern uint32_t fecbd_get_start(uint8_t, uint8_t); -extern FECBD *fecbd_rx_alloc(uint8_t); -extern FECBD *fecbd_tx_alloc(uint8_t); -extern FECBD *fecbd_tx_free(uint8_t); - -/*******************************************************************/ - -#endif /* _FECBD_H_ */ diff --git a/include/ff.h b/include/ff.h deleted file mode 100644 index a4eb4a1..0000000 --- a/include/ff.h +++ /dev/null @@ -1,337 +0,0 @@ -/*---------------------------------------------------------------------------/ -/ FatFs - FAT file system module include file R0.09a (C)ChaN, 2012 -/----------------------------------------------------------------------------/ -/ FatFs module is a generic FAT file system module for small embedded systems. -/ This is a free software that opened for education, research and commercial -/ developments under license policy of following terms. -/ -/ Copyright (C) 2012, ChaN, all right reserved. -/ -/ * The FatFs module is a free software and there is NO WARRANTY. -/ * No restriction on use. You can use, modify and redistribute it for -/ personal, non-profit or commercial product UNDER YOUR RESPONSIBILITY. -/ * Redistributions of source code must retain the above copyright notice. -/ -/----------------------------------------------------------------------------*/ - -#ifndef _FATFS -#define _FATFS 4004 /* Revision ID */ - -#ifdef __cplusplus -extern "C" { -#endif - -#include -#include /* FatFs configuration options */ - -#if _FATFS != _FFCONF -#error Wrong configuration file (ffconf.h). -#endif - - - -/* Definitions of volume management */ - -#if _MULTI_PARTITION /* Multiple partition configuration */ -typedef struct { - uint8_t pd; /* Physical drive number */ - uint8_t pt; /* Partition: 0:Auto detect, 1-4:Forced partition) */ -} PARTITION; -extern PARTITION VolToPart[]; /* Volume - Partition resolution table */ -#define LD2PD(vol) (VolToPart[vol].pd) /* Get physical drive number */ -#define LD2PT(vol) (VolToPart[vol].pt) /* Get partition index */ - -#else /* Single partition configuration */ -#define LD2PD(vol) (uint8_t)(vol) /* Each logical drive is bound to the same physical drive number */ -#define LD2PT(vol) 0 /* Always mounts the 1st partition or in SFD */ - -#endif - - - -/* Type of path name strings on FatFs API */ - -#if _LFN_UNICODE /* Unicode string */ -#if !_USE_LFN -#error _LFN_UNICODE must be 0 in non-LFN cfg. -#endif -#ifndef _INC_TCHAR -typedef uint16_t TCHAR; -#define _T(x) L ## x -#define _TEXT(x) L ## x -#endif - -#else /* ANSI/OEM string */ -#ifndef _INC_TCHAR -typedef char TCHAR; -#define _T(x) x -#define _TEXT(x) x -#endif - -#endif - - - -/* File system object structure (FATFS) */ - -typedef struct { - uint8_t fs_type; /* FAT sub-type (0:Not mounted) */ - uint8_t drv; /* Physical drive number */ - uint8_t csize; /* Sectors per cluster (1,2,4...128) */ - uint8_t n_fats; /* Number of FAT copies (1,2) */ - uint8_t wflag; /* win[] dirty flag (1:must be written back) */ - uint8_t fsi_flag; /* fsinfo dirty flag (1:must be written back) */ - uint16_t id; /* File system mount ID */ - uint16_t n_rootdir; /* Number of root directory entries (FAT12/16) */ -#if _MAX_SS != 512 - uint16_t ssize; /* Bytes per sector (512, 1024, 2048 or 4096) */ -#endif -#if _FS_REENTRANT - _SYNC_t sobj; /* Identifier of sync object */ -#endif -#if !_FS_READONLY - uint32_t last_clust; /* Last allocated cluster */ - uint32_t free_clust; /* Number of free clusters */ - uint32_t fsi_sector; /* fsinfo sector (FAT32) */ -#endif -#if _FS_RPATH - uint32_t cdir; /* Current directory start cluster (0:root) */ -#endif - uint32_t n_fatent; /* Number of FAT entries (= number of clusters + 2) */ - uint32_t fsize; /* Sectors per FAT */ - uint32_t fatbase; /* FAT start sector */ - uint32_t dirbase; /* Root directory start sector (FAT32:Cluster#) */ - uint32_t database; /* Data start sector */ - uint32_t winsect; /* Current sector appearing in the win[] */ - uint8_t win[_MAX_SS]; /* Disk access window for Directory, FAT (and Data on tiny cfg) */ -} FATFS; - - - -/* File object structure (FIL) */ - -typedef struct { - FATFS* fs; /* Pointer to the related file system object */ - uint16_t id; /* File system mount ID of the related file system object */ - uint8_t flag; /* File status flags */ - uint8_t pad1; - uint32_t fptr; /* File read/write pointer (0ed on file open) */ - uint32_t fsize; /* File size */ - uint32_t sclust; /* File data start cluster (0:no data cluster, always 0 when fsize is 0) */ - uint32_t clust; /* Current cluster of fpter */ - uint32_t dsect; /* Current data sector of fpter */ -#if !_FS_READONLY - uint32_t dir_sect; /* Sector containing the directory entry */ - uint8_t* dir_ptr; /* Pointer to the directory entry in the window */ -#endif -#if _USE_FASTSEEK - uint32_t* cltbl; /* Pointer to the cluster link map table (null on file open) */ -#endif -#if _FS_LOCK - uint32_t lockid; /* File lock ID (index of file semaphore table Files[]) */ -#endif -#if !_FS_TINY - uint8_t buf[_MAX_SS]; /* File data read/write buffer */ -#endif -} FIL; - - - -/* Directory object structure (DIR) */ - -typedef struct { - FATFS* fs; /* Pointer to the owner file system object */ - uint16_t id; /* Owner file system mount ID */ - uint16_t index; /* Current read/write index number */ - uint32_t sclust; /* Table start cluster (0:Root dir) */ - uint32_t clust; /* Current cluster */ - uint32_t sect; /* Current sector */ - uint8_t* dir; /* Pointer to the current SFN entry in the win[] */ - uint8_t* fn; /* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */ -#if _USE_LFN - uint16_t* lfn; /* Pointer to the LFN working buffer */ - uint16_t lfn_idx; /* Last matched LFN index number (0xFFFF:No LFN) */ -#endif -} DIR; - - - -/* File status structure (FILINFO) */ - -typedef struct { - uint32_t fsize; /* File size */ - uint16_t fdate; /* Last modified date */ - uint16_t ftime; /* Last modified time */ - uint8_t fattrib; /* Attribute */ - TCHAR fname[13]; /* Short file name (8.3 format) */ -#if _USE_LFN - TCHAR* lfname; /* Pointer to the LFN buffer */ - uint32_t lfsize; /* Size of LFN buffer in TCHAR */ -#endif -} FILINFO; - - - -/* File function return code (FRESULT) */ - -typedef enum { - FR_OK = 0, /* (0) Succeeded */ - FR_DISK_ERR, /* (1) A hard error occurred in the low level disk I/O layer */ - FR_INT_ERR, /* (2) Assertion failed */ - FR_NOT_READY, /* (3) The physical drive cannot work */ - FR_NO_FILE, /* (4) Could not find the file */ - FR_NO_PATH, /* (5) Could not find the path */ - FR_INVALID_NAME, /* (6) The path name format is invalid */ - FR_DENIED, /* (7) Access denied due to prohibited access or directory full */ - FR_EXIST, /* (8) Access denied due to prohibited access */ - FR_INVALID_OBJECT, /* (9) The file/directory object is invalid */ - FR_WRITE_PROTECTED, /* (10) The physical drive is write protected */ - FR_INVALID_DRIVE, /* (11) The logical drive number is invalid */ - FR_NOT_ENABLED, /* (12) The volume has no work area */ - FR_NO_FILESYSTEM, /* (13) There is no valid FAT volume */ - FR_MKFS_ABORTED, /* (14) The f_mkfs() aborted due to any parameter error */ - FR_TIMEOUT, /* (15) Could not get a grant to access the volume within defined period */ - FR_LOCKED, /* (16) The operation is rejected according to the file sharing policy */ - FR_NOT_ENOUGH_CORE, /* (17) LFN working buffer could not be allocated */ - FR_TOO_MANY_OPEN_FILES, /* (18) Number of open files > _FS_SHARE */ - FR_INVALID_PARAMETER /* (19) Given parameter is invalid */ -} FRESULT; - - - -/*--------------------------------------------------------------*/ -/* FatFs module application interface */ - -FRESULT f_mount (uint8_t, FATFS*); /* Mount/Unmount a logical drive */ -FRESULT f_open (FIL*, const TCHAR*, uint8_t); /* Open or create a file */ -FRESULT f_read (FIL*, void*, uint32_t, uint32_t*); /* Read data from a file */ -FRESULT f_lseek (FIL*, uint32_t); /* Move file pointer of a file object */ -FRESULT f_close (FIL*); /* Close an open file object */ -FRESULT f_opendir (DIR*, const char*); /* Open an existing directory */ -FRESULT f_readdir (DIR*, FILINFO*); /* Read a directory item */ -FRESULT f_stat (const TCHAR*, FILINFO*); /* Get file status */ -FRESULT f_write (FIL*, const void*, uint32_t, uint32_t*); /* Write data to a file */ -FRESULT f_getfree (const TCHAR*, uint32_t*, FATFS**); /* Get number of free clusters on the drive */ -FRESULT f_truncate (FIL*); /* Truncate file */ -FRESULT f_sync (FIL*); /* Flush cached data of a writing file */ -FRESULT f_unlink (const TCHAR*); /* Delete an existing file or directory */ -FRESULT f_mkdir (const TCHAR*); /* Create a new directory */ -FRESULT f_chmod (const TCHAR*, uint8_t, uint8_t); /* Change attribute of the file/dir */ -FRESULT f_utime (const TCHAR*, const FILINFO*); /* Change times-tamp of the file/dir */ -FRESULT f_rename (const TCHAR*, const TCHAR*); /* Rename/Move a file or directory */ -FRESULT f_chdrive (uint8_t); /* Change current drive */ -FRESULT f_chdir (const TCHAR*); /* Change current directory */ -FRESULT f_getcwd (TCHAR*, uint32_t); /* Get current directory */ -FRESULT f_forward (FIL*, uint32_t(*)(const uint8_t*,uint32_t), uint32_t, uint32_t*); /* Forward data to the stream */ -FRESULT f_mkfs (uint8_t, uint8_t, uint32_t); /* Create a file system on the drive */ -FRESULT f_fdisk (uint8_t, const uint32_t[], void*); /* Divide a physical drive into some partitions */ -int f_putc (TCHAR, FIL*); /* Put a character to the file */ -int f_puts (const TCHAR*, FIL*); /* Put a string to the file */ -int f_printf (FIL*, const TCHAR*, ...); /* Put a formatted string to the file */ -TCHAR* f_gets (TCHAR*, int, FIL*); /* Get a string from the file */ - -#define f_eof(fp) (((fp)->fptr == (fp)->fsize) ? 1 : 0) -#define f_error(fp) (((fp)->flag & FA__ERROR) ? 1 : 0) -#define f_tell(fp) ((fp)->fptr) -#define f_size(fp) ((fp)->fsize) - -#ifndef EOF -#define EOF (-1) -#endif - - - - -/*--------------------------------------------------------------*/ -/* Additional user defined functions */ - -/* RTC function */ -#if !_FS_READONLY -uint32_t get_fattime (void); -#endif - -/* Unicode support functions */ -#if _USE_LFN /* Unicode - OEM code conversion */ -uint16_t ff_convert (uint16_t, uint32_t); /* OEM-Unicode bidirectional conversion */ -uint16_t ff_wtoupper (uint16_t); /* Unicode upper-case conversion */ -#if _USE_LFN == 3 /* Memory functions */ -void* ff_memalloc (uint32_t); /* Allocate memory block */ -void ff_memfree (void*); /* Free memory block */ -#endif -#endif - -/* Sync functions */ -#if _FS_REENTRANT -int ff_cre_syncobj (uint8_t, _SYNC_t*);/* Create a sync object */ -int ff_req_grant (_SYNC_t); /* Lock sync object */ -void ff_rel_grant (_SYNC_t); /* Unlock sync object */ -int ff_del_syncobj (_SYNC_t); /* Delete a sync object */ -#endif - - - - -/*--------------------------------------------------------------*/ -/* Flags and offset address */ - - -/* File access control and file status flags (FIL.flag) */ - -#define FA_READ 0x01 -#define FA_OPEN_EXISTING 0x00 -#define FA__ERROR 0x80 - -#if !_FS_READONLY -#define FA_WRITE 0x02 -#define FA_CREATE_NEW 0x04 -#define FA_CREATE_ALWAYS 0x08 -#define FA_OPEN_ALWAYS 0x10 -#define FA__WRITTEN 0x20 -#define FA__DIRTY 0x40 -#endif - - -/* FAT sub type (FATFS.fs_type) */ - -#define FS_FAT12 1 -#define FS_FAT16 2 -#define FS_FAT32 3 - - -/* File attribute bits for directory entry */ - -#define AM_RDO 0x01 /* Read only */ -#define AM_HID 0x02 /* Hidden */ -#define AM_SYS 0x04 /* System */ -#define AM_VOL 0x08 /* Volume label */ -#define AM_LFN 0x0F /* LFN entry */ -#define AM_DIR 0x10 /* Directory */ -#define AM_ARC 0x20 /* Archive */ -#define AM_MASK 0x3F /* Mask of defined bits */ - - -/* Fast seek feature */ -#define CREATE_LINKMAP 0xFFFFFFFF - - - -/*--------------------------------*/ -/* Multi-byte word access macros */ - -#if _WORD_ACCESS == 1 /* Enable word access to the FAT structure */ -#define LD_WORD(ptr) (uint16_t)(* (uint16_t *)(uint8_t *)(ptr)) -#define LD_DWORD(ptr) (uint32_t)(* (uint32_t *)(uint8_t *)(ptr)) -#define ST_WORD(ptr,val) *(uint16_t *) (uint8_t *)(ptr) = (uint16_t)(val) -#define ST_DWORD(ptr,val) *(uint32_t *) (uint8_t *)(ptr) = (uint32_t)(val) -#else /* Use byte-by-byte access to the FAT structure */ -#define LD_WORD(ptr) (uint16_t)(((uint16_t)*((uint8_t *)(ptr) + 1) << 8) | (uint16_t) *(uint8_t *)(ptr)) -#define LD_DWORD(ptr) (uint32_t)(((uint32_t)*((uint8_t *)(ptr) + 3) << 24) | ((uint32_t)*((uint8_t*)(ptr) + 2) << 16) | ((uint16_t) *((uint8_t*)(ptr) + 1) << 8) | *(uint8_t*)(ptr)) -#define ST_WORD(ptr,val) *(uint8_t *)(ptr) = (uint8_t)(val); *((uint8_t *)(ptr) + 1) = (uint8_t)((uint16_t)(val) >> 8) -#define ST_DWORD(ptr,val) *(uint8_t *)(ptr) = (uint8_t)(val); *((uint8_t *)(ptr) + 1) = (uint8_t)((uint16_t)(val) >> 8); *((uint8_t*)(ptr) + 2) = (uint8_t)((uint32_t)(val) >> 16); *((uint8_t *)(ptr) + 3) = (uint8_t)((uint32_t)(val) >> 24) -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* _FATFS */ diff --git a/include/ffconf.h b/include/ffconf.h deleted file mode 100644 index 2247451..0000000 --- a/include/ffconf.h +++ /dev/null @@ -1,190 +0,0 @@ -/*---------------------------------------------------------------------------/ -/ FatFs - FAT file system module configuration file R0.09a (C)ChaN, 2012 -/----------------------------------------------------------------------------/ -/ -/ CAUTION! Do not forget to make clean the project after any changes to -/ the configuration options. -/ -/----------------------------------------------------------------------------*/ -#ifndef _FFCONF -#define _FFCONF 4004 /* Revision ID */ - - -/*---------------------------------------------------------------------------/ -/ Functions and Buffer Configurations -/----------------------------------------------------------------------------*/ - -#define _FS_TINY 0 /* 0:Normal or 1:Tiny */ -/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system -/ object instead of the sector buffer in the individual file object for file -/ data transfer. This reduces memory consumption 512 bytes each file object. */ - - -#define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */ -/* Setting _FS_READONLY to 1 defines read only configuration. This removes -/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename, -/ f_truncate and useless f_getfree. */ - - -#define _FS_MINIMIZE 0 /* 0 to 3 */ -/* The _FS_MINIMIZE option defines minimization level to remove some functions. -/ -/ 0: Full function. -/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename -/ are removed. -/ 2: f_opendir and f_readdir are removed in addition to 1. -/ 3: f_lseek is removed in addition to 2. */ - - -#define _USE_STRFUNC 1 /* 0:Disable or 1-2:Enable */ -/* To enable string functions, set _USE_STRFUNC to 1 or 2. */ - - -#define _USE_MKFS 0 /* 0:Disable or 1:Enable */ -/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */ - - -#define _USE_FORWARD 0 /* 0:Disable or 1:Enable */ -/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */ - - -#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */ -/* To enable fast seek feature, set _USE_FASTSEEK to 1. */ - - - -/*---------------------------------------------------------------------------/ -/ Locale and Namespace Configurations -/----------------------------------------------------------------------------*/ - -#define _CODE_PAGE 858 -/* The _CODE_PAGE specifies the OEM code page to be used on the target system. -/ Incorrect setting of the code page can cause a file open failure. -/ -/ 932 - Japanese Shift-JIS (DBCS, OEM, Windows) -/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows) -/ 949 - Korean (DBCS, OEM, Windows) -/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows) -/ 1250 - Central Europe (Windows) -/ 1251 - Cyrillic (Windows) -/ 1252 - Latin 1 (Windows) -/ 1253 - Greek (Windows) -/ 1254 - Turkish (Windows) -/ 1255 - Hebrew (Windows) -/ 1256 - Arabic (Windows) -/ 1257 - Baltic (Windows) -/ 1258 - Vietnam (OEM, Windows) -/ 437 - U.S. (OEM) -/ 720 - Arabic (OEM) -/ 737 - Greek (OEM) -/ 775 - Baltic (OEM) -/ 850 - Multilingual Latin 1 (OEM) -/ 858 - Multilingual Latin 1 + Euro (OEM) -/ 852 - Latin 2 (OEM) -/ 855 - Cyrillic (OEM) -/ 866 - Russian (OEM) -/ 857 - Turkish (OEM) -/ 862 - Hebrew (OEM) -/ 874 - Thai (OEM, Windows) -/ 1 - ASCII only (Valid for non LFN cfg.) -*/ - - -#define _USE_LFN 0 /* 0 to 3 */ -#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */ -/* The _USE_LFN option switches the LFN support. -/ -/ 0: Disable LFN feature. _MAX_LFN and _LFN_UNICODE have no effect. -/ 1: Enable LFN with static working buffer on the BSS. Always NOT reentrant. -/ 2: Enable LFN with dynamic working buffer on the STACK. -/ 3: Enable LFN with dynamic working buffer on the HEAP. -/ -/ The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. To enable LFN, -/ Unicode handling functions ff_convert() and ff_wtoupper() must be added -/ to the project. When enable to use heap, memory control functions -/ ff_memalloc() and ff_memfree() must be added to the project. */ - - -#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */ -/* To switch the character code set on FatFs API to Unicode, -/ enable LFN feature and set _LFN_UNICODE to 1. */ - - -#define _FS_RPATH 0 /* 0 to 2 */ -/* The _FS_RPATH option configures relative path feature. -/ -/ 0: Disable relative path feature and remove related functions. -/ 1: Enable relative path. f_chdrive() and f_chdir() are available. -/ 2: f_getcwd() is available in addition to 1. -/ -/ Note that output of the f_readdir fnction is affected by this option. */ - - - -/*---------------------------------------------------------------------------/ -/ Physical Drive Configurations -/----------------------------------------------------------------------------*/ - -#define _VOLUMES 1 -/* Number of volumes (logical drives) to be used. */ - - -#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */ -/* Maximum sector size to be handled. -/ Always set 512 for memory card and hard disk but a larger value may be -/ required for on-board flash memory, floppy disk and optical disk. -/ When _MAX_SS is larger than 512, it configures FatFs to variable sector size -/ and GET_SECTOR_SIZE command must be implememted to the disk_ioctl function. */ - - -#define _MULTI_PARTITION 0 /* 0:Single partition, 1/2:Enable multiple partition */ -/* When set to 0, each volume is bound to the same physical drive number and -/ it can mount only first primaly partition. When it is set to 1, each volume -/ is tied to the partitions listed in VolToPart[]. */ - - -#define _USE_ERASE 0 /* 0:Disable or 1:Enable */ -/* To enable sector erase feature, set _USE_ERASE to 1. CTRL_ERASE_SECTOR command -/ should be added to the disk_ioctl functio. */ - - - -/*---------------------------------------------------------------------------/ -/ System Configurations -/----------------------------------------------------------------------------*/ - -#define _WORD_ACCESS 0 /* 0 or 1 */ -/* Set 0 first and it is always compatible with all platforms. The _WORD_ACCESS -/ option defines which access method is used to the word data on the FAT volume. -/ -/ 0: Byte-by-byte access. -/ 1: Word access. Do not choose this unless following condition is met. -/ -/ When the byte order on the memory is big-endian or address miss-aligned word -/ access results incorrect behavior, the _WORD_ACCESS must be set to 0. -/ If it is not the case, the value can also be set to 1 to improve the -/ performance and code size. -*/ - - -/* A header file that defines sync object types on the O/S, such as -/ windows.h, ucos_ii.h and semphr.h, must be included prior to ff.h. */ - -#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */ -#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */ -#define _SYNC_t HANDLE /* O/S dependent type of sync object. e.g. HANDLE, OS_EVENT*, ID and etc.. */ - -/* The _FS_REENTRANT option switches the reentrancy (thread safe) of the FatFs module. -/ -/ 0: Disable reentrancy. _SYNC_t and _FS_TIMEOUT have no effect. -/ 1: Enable reentrancy. Also user provided synchronization handlers, -/ ff_req_grant, ff_rel_grant, ff_del_syncobj and ff_cre_syncobj -/ function must be added to the project. */ - - -#define _FS_LOCK 0 /* 0:Disable or >=1:Enable */ -/* To enable file lock control feature, set _FS_LOCK to 1 or greater. - The value defines how many files can be opened simultaneously. */ - - -#endif /* _FFCONFIG */ diff --git a/include/firebee.h b/include/firebee.h deleted file mode 100644 index c02f92e..0000000 --- a/include/firebee.h +++ /dev/null @@ -1,50 +0,0 @@ -#ifndef _FIREBEE_H_ -#define _FIREBEE_H_ - -/* - * firebee.h - * - * preprocessor definitions for the Firebee machine. This file should contain nothing but preprocessor - * definition that evaluate to numbers. It is intended for use in C sources as well as in linker control - * files, so care must be taken to not break the syntax of either one. - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#define SYSCLK 132000 /* NOTE: 132 _is_ correct. 133 _is_ wrong. Do not change! */ - -#define BOOTFLASH_BASE_ADDRESS 0xE0000000 -#define BOOTFLASH_SIZE 0x800000 /* FireBee has 8 MByte Flash */ -#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1) - -#define SDRAM_START 0x00000000 /* start at address 0 */ -#define SDRAM_SIZE 0x20000000 /* 512 MB on the Firebee */ - -#ifdef COMPILE_RAM -#define TARGET_ADDRESS (SDRAM_START + SDRAM_SIZE - 0x200000) -#else -#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS - -#endif /* COMPILE_RAM */ - -#define DRIVER_MEM_BUFFER_SIZE 0x100000 - -#define EMUTOS_BASE_ADDRESS 0xe0600000 - -#endif /* _FIREBEE_H_ */ diff --git a/include/font.h b/include/font.h deleted file mode 100644 index 84ba317..0000000 --- a/include/font.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * font.h - font specific definitions - * - * Copyright (c) 2001 Lineo, Inc. - * Copyright (c) 2004 by Authors: - * - * Authors: - * MAD Martin Doering - * - * This file is distributed under the GPL, version 2 or at your - * option any later version. See doc/license.txt for details. - */ - -#ifndef FONT_H -#define FONT_H - -#include - -/* font header flags */ - -#define F_DEFAULT 1 /* this is the default font (face and size) */ -#define F_HORZ_OFF 2 /* there are left and right offset tables */ -#define F_STDFORM 4 /* is the font in standard format */ -#define F_MONOSPACE 8 /* is the font monospaced */ - -/* font style bits */ - -#define F_THICKEN 1 -#define F_LIGHT 2 -#define F_SKEW 4 -#define F_UNDER 8 -#define F_OUTLINE 16 -#define F_SHADOW 32 - -/* font specific linea variables */ - -extern const uint16_t *v_fnt_ad; /* address of current monospace font */ -extern const uint16_t *v_off_ad; /* address of font offset table */ -extern uint16_t v_fnt_nd; /* ascii code of last cell in font */ -extern uint16_t v_fnt_st; /* ascii code of first cell in font */ -extern uint16_t v_fnt_wr; /* font cell wrap */ - -/* character cell specific linea variables */ - -extern uint16_t v_cel_ht; /* cell height (width is 8) */ -extern uint16_t v_cel_mx; /* needed by MiNT: columns on the screen minus 1 */ -extern uint16_t v_cel_my; /* needed by MiNT: rows on the screen minus 1 */ -extern uint16_t v_cel_wr; /* needed by MiNT: length (in int8_ts) of a line of characters */ - -/* - * font_ring is a struct of four pointers, each of which points to - * a list of font headers linked together to form a string. - */ - -extern struct font_head *font_ring[4]; /* Ring of available fonts */ -extern int16_t font_count; /* all three fonts and NULL */ - -/* the font header descibes a font */ - -struct font_head { - int16_t font_id; - int16_t point; - int8_t name[32]; - uint16_t first_ade; - uint16_t last_ade; - uint16_t top; - uint16_t ascent; - uint16_t half; - uint16_t descent; - uint16_t bottom; - uint16_t max_char_width; - uint16_t max_cell_width; - uint16_t left_offset; /* amount character slants left when skewed */ - uint16_t right_offset; /* amount character slants right */ - uint16_t thicken; /* number of pixels to smear */ - uint16_t ul_size; /* size of the underline */ - uint16_t lighten; /* mask to and with to lighten */ - uint16_t skew; /* mask for skewing */ - uint16_t flags; - - const uint8_t *hor_table; /* horizontal offsets */ - const uint16_t *off_table; /* character offsets */ - const uint16_t *dat_table; /* character definitions */ - uint16_t form_width; - uint16_t form_height; - - struct font_head *next_font;/* pointer to next font */ - uint16_t font_seg; -}; - - - -/* prototypes */ - -void font_init(void); /* initialize BIOS font ring */ -void font_set_default(void); /* choose the default font */ - -#endif /* FONT_H */ diff --git a/include/i2c-algo-bit.h b/include/i2c-algo-bit.h deleted file mode 100644 index 92545ac..0000000 --- a/include/i2c-algo-bit.h +++ /dev/null @@ -1,55 +0,0 @@ -/* ------------------------------------------------------------------------- */ -/* i2c-algo-bit.h i2c driver algorithms for bit-shift adapters */ -/* ------------------------------------------------------------------------- */ -/* Copyright (C) 1995-99 Simon G. Vogl - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -/* ------------------------------------------------------------------------- */ - -/* With some changes from Kyösti Mälkki and even - Frodo Looijaard */ - -/* $Id: i2c-algo-bit.h,v 1.1.1.1 2012/08/16 18:43:05 mfro Exp $ */ - -#ifndef I2C_ALGO_BIT_H -#define I2C_ALGO_BIT_H - -/* --- Defines for bit-adapters --------------------------------------- */ -/* - * This struct contains the hw-dependent functions of bit-style adapters to - * manipulate the line states, and to init any hw-specific features. This is - * only used if you have more than one hw-type of adapter running. - */ -struct i2c_algo_bit_data -{ - void *data; /* private data for lowlevel routines */ - void (*setsda) (void *data, int state); - void (*setscl) (void *data, int state); - int (*getsda) (void *data); - int (*getscl) (void *data); - - /* local settings */ - int udelay; /* half-clock-cycle time in microsecs */ - /* i.e. clock is (500 / udelay) KHz */ - int mdelay; /* in millisecs, unused */ - int timeout; /* in jiffies */ -}; - -#define I2C_BIT_ADAP_MAX 16 - -int i2c_bit_add_bus(struct i2c_adapter *); -int i2c_bit_del_bus(struct i2c_adapter *); - -#endif /* I2C_ALGO_BIT_H */ diff --git a/include/i2c.h b/include/i2c.h deleted file mode 100644 index ac44287..0000000 --- a/include/i2c.h +++ /dev/null @@ -1,96 +0,0 @@ -/* ------------------------------------------------------------------------- */ -/* */ -/* i2c.h - definitions for the i2c-bus interface */ -/* */ -/* ------------------------------------------------------------------------- */ -/* Copyright (C) 1995-2000 Simon G. Vogl - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -/* ------------------------------------------------------------------------- */ - -/* With some changes from Kyösti Mälkki and - Frodo Looijaard */ - -/* $Id: i2c.h,v 1.1.1.1 2012/08/16 18:43:05 mfro Exp $ */ - -#ifndef _I2C_H -#define _I2C_H - -#include "bas_types.h" - -/* --- General options ------------------------------------------------ */ - -struct i2c_msg; -struct i2c_algorithm; -struct i2c_adapter; - -/* Transfer num messages. - */ -extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num); - -/* - * The following structs are for those who like to implement new bus drivers: - * i2c_algorithm is the interface to a class of hardware solutions which can - * be addressed using the same bus algorithms - i.e. bit-banging or the PCF8584 - * to name two of the most common. - */ -struct i2c_algorithm -{ - unsigned int id; - int (*master_xfer)(struct i2c_adapter *adap,struct i2c_msg *msgs, int num); - /* --- ioctl like call to set div. parameters. */ - int (*algo_control)(struct i2c_adapter *, unsigned int, unsigned long); -}; - -/* - * i2c_adapter is the structure used to identify a physical i2c bus along - * with the access algorithms necessary to access it. - */ -struct i2c_adapter -{ - struct i2c_algorithm *algo; /* the algorithm to access the bus */ - void *algo_data; - int timeout; - int retries; - int nr; -}; - -/* - * I2C Message - used for pure i2c transaction, also from /dev interface - */ -struct i2c_msg -{ - unsigned short addr; /* slave address */ - unsigned short flags; -#define I2C_M_TEN 0x10 /* we have a ten bit chip address */ -#define I2C_M_RD 0x01 -#define I2C_M_NOSTART 0x4000 -#define I2C_M_REV_DIR_ADDR 0x2000 -#define I2C_M_IGNORE_NAK 0x1000 -#define I2C_M_NO_RD_ACK 0x0800 - unsigned short len; /* msg length */ - unsigned char *buf; /* pointer to msg data */ -}; - -extern void i2c_init(void); -extern void i2c_set_frequency(int hz); -extern int i2c_read(int address, char *data, int lengt, bool repeated); -extern int i2c_read_byte(int ack); -extern int i2c_write(int address, const char *data, int length, bool repeated); -extern int i2c_write_byte(int data); -extern void i2c_start(void); -extern void i2c_stop(void); - -#endif /* _I2C_H */ diff --git a/include/icmp.h b/include/icmp.h deleted file mode 100644 index 2231692..0000000 --- a/include/icmp.h +++ /dev/null @@ -1,121 +0,0 @@ -/* - * File: icmp.h - * Purpose: Handle Internet Control Message Protocol packets. - * - * Notes: See RFC 792 "Internet Control Message Protocol" - * for more details. - */ - -#ifndef _ICMP_H -#define _ICMP_H - -/********************************************************************/ - -typedef struct -{ - uint32_t unused; - uint8_t ih_dg; -} icmp_dest_unreachable; -#define ICMP_DEST_UNREACHABLE (3) /* type */ -#define ICMP_NET_UNREACHABLE (0) /* code */ -#define ICMP_HOST_UNREACHABLE (1) -#define ICMP_PROTOCOL_UNREACHABLE (2) -#define ICMP_PORT_UNREACHABLE (3) -#define ICMP_FRAG_NEEDED (4) -#define ICMP_ROUTE_FAILED (5) - -typedef struct -{ - uint32_t unused; - uint8_t ih_dg; -} icmp_time_exceeded; -#define ICMP_TIME_EXCEEDED (11) /* type */ -#define ICMP_TTL_EXCEEDED (0) /* code */ -#define ICMP_FRAG_TIME_EXCEEDED (1) - -typedef struct -{ - uint8_t pointer; - uint8_t unused1; - uint16_t unused2; - uint8_t ih_dg; -} icmp_parameter_problem; -#define ICMP_PARAMETER_PROBLEM (12) /* type */ -#define ICMP_POINTER (0) /* code -- not */ - -typedef struct -{ - uint32_t unused; - uint8_t ih_dg; -} icmp_source_quench; -#define ICMP_SOURCE_QUENCH (4) /* type */ - -typedef struct -{ - uint32_t gateway_addr; - uint8_t ih_dg; -} icmp_redirect; -#define ICMP_REDIRECT (5) /* type */ -#define ICMP_REDIRECT_NET (0) /* code */ -#define ICMP_REDIRECT_HOST (1) -#define ICMP_REDIRECT_TOS_NET (2) -#define ICMP_REDIRECT_TOS_HOST (3) - -typedef struct -{ - uint16_t identifier; - uint16_t sequence; - uint8_t data; -} icmp_echo; -#define ICMP_ECHO (8) /* type */ -#define ICMP_ECHO_REPLY (0) /* type */ - -typedef struct -{ - uint16_t identifier; - uint16_t sequence; -} icmp_information; -#define ICMP_INFORMATION_REQUEST (15) /* type */ -#define ICMP_INFORMATION_REPLY (16) /* type */ - -typedef struct -{ - uint16_t identifier; - uint16_t sequence; - uint32_t originate_ts; - uint32_t receive_ts; - uint32_t transmit_ts; -} icmp_timestamp; -#define ICMP_TIMESTAMP (13) /* type */ -#define ICMP_TIMESTAMP_REPLY (14) /* type */ - -typedef struct -{ - uint8_t type; - uint8_t code; - uint16_t chksum; - union - { - icmp_dest_unreachable dest_unreachable; - icmp_source_quench source_quench; - icmp_redirect redirect; - icmp_time_exceeded time_exceeded; - icmp_parameter_problem parameter_problem; - icmp_timestamp timestamp; - icmp_information information; - icmp_echo echo; - } msg; -} icmp_message; - -/********************************************************************/ - -/* Protocol Header information */ -#define ICMP_HDR_OFFSET (ETH_HDR_LEN + IP_HDR_SIZE) -#define ICMP_HDR_SIZE 8 - -void -icmp_handler(NIF *, NBUF *); - -/********************************************************************/ - -#endif /* _ICMP_H */ diff --git a/include/ikbd.h b/include/ikbd.h deleted file mode 100644 index 2f6927b..0000000 --- a/include/ikbd.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _IKBD_H_ -#define _IKBD_H_ - -extern void ikbd_init(void); -extern void ikbd_poll(void); -extern void ikbd_joystick(uint8_t joy, uint8_t map); -extern void ikbd_mouse(uint8_t buttons, int8_t x, int8_t y); -extern void ikbd_keyboard(uint8_t code); - -#endif /* _IKBD_H_ */ - diff --git a/include/interrupts.h b/include/interrupts.h deleted file mode 100644 index b9310cd..0000000 --- a/include/interrupts.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * interrupts.h - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * - * Created on: 08.08.2013 - * Author: Markus Fröschle - */ - -#ifndef _INTERRUPTS_H_ -#define _INTERRUPTS_H_ - -#include - -/* interrupt sources */ -#define INT_SOURCE_EPORT_EPF1 1 // edge port flag 1 -#define INT_SOURCE_EPORT_EPF2 2 // edge port flag 2 -#define INT_SOURCE_EPORT_EPF3 3 // edge port flag 3 -#define INT_SOURCE_EPORT_EPF4 4 // edge port flag 4 -#define INT_SOURCE_EPORT_EPF5 5 // edge port flag 5 -#define INT_SOURCE_EPORT_EPF6 6 // edge port flag 6 -#define INT_SOURCE_EPORT_EPF7 7 // edge port flag 7 -#define INT_SOURCE_USB_EP0ISR 15 // USB endpoint 0 interrupt -#define INT_SOURCE_USB_EP1ISR 16 // USB endpoint 1 interrupt -#define INT_SOURCE_USB_EP2ISR 17 // USB endpoint 2 interrupt -#define INT_SOURCE_USB_EP3ISR 18 // USB endpoint 3 interrupt -#define INT_SOURCE_USB_EP4ISR 19 // USB endpoint 4 interrupt -#define INT_SOURCE_USB_EP5ISR 20 // USB endpoint 5 interrupt -#define INT_SOURCE_USB_EP6ISR 21 // USB endpoint 6 interrupt -#define INT_SOURCE_USB_USBISR 22 // USB general interrupt -#define INT_SOURCE_USB_USBAISR 23 // USB core interrupt -#define INT_SOURCE_USB_ANY 24 // OR of all USB interrupts -#define INT_SOURCE_USB_DSPI_OVF 25 // DSPI overflow or underflow -#define INT_SOURCE_USB_DSPI_RFOF 26 // receive FIFO overflow interrupt -#define INT_SOURCE_USB_DSPI_RFDF 27 // receive FIFO drain interrupt -#define INT_SOURCE_USB_DSPI_TFUF 28 // transmit FIFO underflow interrupt -#define INT_SOURCE_USB_DSPI_TCF 29 // transfer complete interrupt -#define INT_SOURCE_USB_DSPI_TFFF 30 // transfer FIFO fill interrupt -#define INT_SOURCE_USB_DSPI_EOQF 31 // end of queue interrupt -#define INT_SOURCE_PSC3 32 // PSC3 interrupt -#define INT_SOURCE_PSC2 33 // PSC2 interrupt -#define INT_SOURCE_PSC1 34 // PSC1 interrupt -#define INT_SOURCE_PSC0 35 // PSC0 interrupt -#define INT_SOURCE_CTIMERS 36 // combined source for comm timers -#define INT_SOURCE_SEC 37 // SEC interrupt -#define INT_SOURCE_FEC1 38 // FEC1 interrupt -#define INT_SOURCE_FEC0 39 // FEC0 interrupt -#define INT_SOURCE_I2C 40 // I2C interrupt -#define INT_SOURCE_PCIARB 41 // PCI arbiter interrupt -#define INT_SOURCE_CBPCI 42 // COMM bus PCI interrupt -#define INT_SOURCE_XLBPCI 43 // XLB PCI interrupt -#define INT_SOURCE_XLBARB 47 // XLBARB to PCI interrupt -#define INT_SOURCE_DMA 48 // multichannel DMA interrupt -#define INT_SOURCE_CAN0_ERROR 49 // FlexCAN error interrupt -#define INT_SOURCE_CAN0_BUSOFF 50 // FlexCAN bus off interrupt -#define INT_SOURCE_CAN0_MBOR 51 // message buffer ORed interrupt -#define INT_SOURCE_SLT1 53 // slice timer 1 interrupt -#define INT_SOURCE_SLT0 54 // slice timer 0 interrupt -#define INT_SOURCE_CAN1_ERROR 55 // FlexCAN error interrupt -#define INT_SOURCE_CAN1_BUSOFF 56 // FlexCAN bus off interrupt -#define INT_SOURCE_CAN1_MBOR 57 // message buffer ORed interrupt -#define INT_SOURCE_GPT3 59 // GPT3 timer interrupt -#define INT_SOURCE_GPT2 60 // GPT2 timer interrupt -#define INT_SOURCE_GPT1 61 // GPT1 timer interrupt -#define INT_SOURCE_GPT0 62 // GPT0 timer interrupt - - -#define FEC0_INTC_LVL 6 /* interrupt level for FEC0 */ -#define FEC0_INTC_PRI 7 /* interrupt priority for FEC0 */ - -#define FEC1_INTC_LVL 6 /* interrupt level for FEC1 */ -#define FEC1_INTC_PRI 6 /* interrupt priority for FEC1 */ - -#define FEC_INTC_LVL(x) ((x == 0) ? FEC0_INTC_LVL : FEC1_INTC_LVL) -#define FEC_INTC_PRI(x) ((x == 0) ? FEC0_INTC_PRI : FEC1_INTC_PRI) - -#define FEC0RX_DMA_PRI 5 -#define FEC1RX_DMA_PRI 4 -#define FECRX_DMA_PRI(x) ((x == 0) ? FEC0RX_DMA_PRI : FEC1RX_DMA_PRI) -#define FEC0TX_DMA_PRI 2 -#define FEC1TX_DMA_PRI 1 -#define FECTX_DMA_PRI(x) ((x == 0) ? FEC0TX_DMA_PRI : FEC1TX_DMA_PRI) - -#if defined(MACHINE_FIREBEE) - -/* Firebee FPGA interrupt controller */ -#define FBEE_INTR_CONTROL * ((volatile uint32_t *) 0xf0010000) -#define FBEE_INTR_ENABLE * ((volatile uint32_t *) 0xf0010004) -#define FBEE_INTR_CLEAR * ((volatile uint32_t *) 0xf0010008) -#define FBEE_INTR_PENDING * ((volatile uint32_t *) 0xff01000c) - -/* register bits for Firebee FPGA-based interrupt controller */ -#define FBEE_INTR_PIC (1 << 0) /* PIC interrupt enable/pending/clear bit */ -#define FBEE_INTR_ETHERNET (1 << 1) /* ethernet PHY interrupt enable/pending/clear bit */ -#define FBEE_INTR_DVI (1 << 2) /* TFP410 monitor sense interrupt enable/pending/clear bit */ -#define FBEE_INTR_PCI_INTA (1 << 3) /* /PCIINTA enable/pending clear bit */ -#define FBEE_INTR_PCI_INTB (1 << 4) /* /PCIINTB enable/pending clear bit */ -#define FBEE_INTR_PCI_INTC (1 << 5) /* /PCIINTC enable/pending clear bit */ -#define FBEE_INTR_PCI_INTD (1 << 6) /* /PCIINTD enable/pending clear bit */ -#define FBEE_INTR_DSP (1 << 7) /* DSP interrupt enable/pending/clear bit */ -#define FBEE_INTR_VSYNC (1 << 8) /* VSYNC interrupt enable/pending/clear bit */ -#define FBEE_INTR_HSYNC (1 << 9) /* HSYNC interrupt enable/pending/clear bit */ - -#define FBEE_INTR_INT_HSYNC_IRQ2 (1 << 26) /* these bits are only meaningful for the FBEE_INTR_ENABLE register */ -#define FBEE_INTR_INT_CTR0_IRQ3 (1 << 27) -#define FBEE_INTR_INT_VSYNC_IRQ4 (1 << 28) -#define FBEE_INTR_INT_FPGA_IRQ5 (1 << 29) -#define FBEE_INTR_INT_MFP_IRQ6 (1 << 30) -#define FBEE_INTR_INT_IRQ7 (1 << 31) - -/* - * Atari MFP interrupt registers. - */ - -#define FALCON_MFP_IERA *((volatile uint8_t *) 0xfffffa07) -#define FALCON_MFP_IERB *((volatile uint8_t *) 0xfffffa09) -#define FALCON_MFP_IPRA *((volatile uint8_t *) 0xfffffa0b) -#define FALCON_MFP_IPRB *((volatile uint8_t *) 0xfffffa0d) -#define FALCON_MFP_IMRA *((volatile uint8_t *) 0xfffffa13) -#define FALCON_MFP_IMRB *((volatile uint8_t *) 0xfffffa15) - -#endif /* MACHINE_FIREBEE */ - -extern void isr_init(void); -extern bool isr_set_prio_and_level(int int_source, int priority, int level); -extern bool isr_enable_int_source(int int_source); -extern bool isr_register_handler(int vector, int level, int priority, bool (*handler)(void *, void *), void *hdev, void *harg); -extern void isr_remove_handler(bool (*handler)(void *, void *)); -extern bool isr_execute_handler(int vector); -extern bool pic_interrupt_handler(void *arg1, void *arg2); -extern bool xlbpci_interrupt_handler(void *arg1, void *arg2); -extern bool pciarb_interrupt_handler(void *arg1, void *arg2); -extern bool gpt0_interrupt_handler(void *arg1, void *arg2); -extern bool irq5_handler(void *arg1, void *arg2); -#endif /* _INTERRUPTS_H_ */ diff --git a/include/ip.h b/include/ip.h deleted file mode 100644 index bde1213..0000000 --- a/include/ip.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * File: ip.h - * Purpose: Definitions for the Internet Protocol, IP. - * - * Notes: See RFC 791 "DARPA Internet Program Protocol - * Specification" for more details. - */ - -#ifndef _IP_H -#define _IP_H - - -/* 32-bit IP Addresses */ -typedef uint8_t IP_ADDR[4]; - -/* Pointer to an IP Address */ -typedef uint8_t IP_ADDR_P[]; - -/* Definition of an IP packet header */ -typedef struct -{ - uint8_t version_ihl; - uint8_t service_type; - uint16_t total_length; - uint16_t identification; - uint16_t flags_frag_offset; - uint8_t ttl; - uint8_t protocol; - uint16_t checksum; - IP_ADDR source_addr; - IP_ADDR dest_addr; - uint8_t options; /* actually an array of undetermined length */ -} ip_frame_hdr; - -/* Macros for accessing an IP datagram. */ -#define IP_VERSION(a) ((a->version_ihl & 0x00F0) >> 4) -#define IP_IHL(a) ((a->version_ihl & 0x000F)) -#define IP_SERVICE(a) (a->service_type) -#define IP_LENGTH(a) (a->total_length) -#define IP_IDENT(a) (a->identification) -#define IP_FLAGS(a) ((a->flags_frag_offset & 0x0000E000) >> 13) -#define IP_FRAGMENT(a) ((a->flags_frag_offset & 0x00001FFF)) -#define IP_TTL(a) (a->ttl) -#define IP_PROTOCOL(a) (a->protocol) -#define IP_CHKSUM(a) (a->checksum) -#define IP_SRC(a) (&a->source_addr[0]) -#define IP_DEST(a) (&a->dest_addr[0]) -#define IP_OPTIONS(a) (&a->options) -#define IP_DATA(a) (&((uint8_t *)a)[IP_IHL(a) * 4]) - -/* Defined IP protocols */ -#define IP_PROTO_ICMP (1) -#define IP_PROTO_UDP (17) - -/* Protocol Header information */ -#define IP_HDR_OFFSET ETH_HDR_LEN -#define IP_HDR_SIZE 20 /* no options */ - - -typedef struct -{ - IP_ADDR myip; - IP_ADDR gateway; - IP_ADDR netmask; - IP_ADDR broadcast; - unsigned int rx; - unsigned int rx_unsup; - unsigned int tx; - unsigned int err; -} IP_INFO; - - -extern void ip_handler(NIF *nif, NBUF *nbf); -uint16_t ip_chksum(uint16_t *data, int num); -extern int ip_send(NIF *nif, uint8_t *dest_addr, uint8_t *src_addr, uint8_t protocol, NBUF *nbf); -extern void ip_init(IP_INFO *, IP_ADDR_P, IP_ADDR_P, IP_ADDR_P); -extern uint8_t *ip_get_myip(IP_INFO *); -extern uint8_t *ip_resolve_route(NIF *, IP_ADDR_P); - -#endif /* _IP_H */ diff --git a/include/m54455.h b/include/m54455.h deleted file mode 100644 index 4e06c4d..0000000 --- a/include/m54455.h +++ /dev/null @@ -1,49 +0,0 @@ -#ifndef _M54455_H_ -#define _M54455_H_ - -/* - * m54455.h - * - * preprocessor definitions for the M54455 Freescale machine. This file should contain nothing but preprocessor - * definition that evaluate to numbers. It is intended for use in C sources as well as in linker control - * files, so care must be taken to not break the syntax of either one. - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#define SYSCLK 133000 - -#define BOOTFLASH_BASE_ADDRESS 0xe0000000 -#define BOOTFLASH_SIZE 0x800000 -#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1) - -#define SDRAM_START 0x00000000 /* start at address 0 */ -#define SDRAM_SIZE 0x8000000 - -#ifdef COMPILE_RAM -#define TARGET_ADDRESS (SDRAM_START + SDRAM_SIZE - 0x200000) -#else -#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS -#endif /* COMPILE_RAM */ - -#define DRIVER_MEM_BUFFER_SIZE 0x100000 - -#define EMUTOS_BASE_ADDRESS 0xe0100000 - -#endif /* _M54455_H_ */ diff --git a/include/m5484l.h b/include/m5484l.h deleted file mode 100644 index 4876f5e..0000000 --- a/include/m5484l.h +++ /dev/null @@ -1,49 +0,0 @@ -#ifndef _M5484L_H_ -#define _M5484L_H_ - -/* - * m5484l.h - * - * preprocessor definitions for the M5484LITE machine. This file should contain nothing but preprocessor - * definition that evaluate to numbers. It is intended for use in C sources as well as in linker control - * files, so care must be taken to not break the syntax of either one. - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#define SYSCLK 100000 - -#define BOOTFLASH_BASE_ADDRESS 0xe0000000 -#define BOOTFLASH_SIZE 0x400000 /* LITEKIT has 4MB flash */ -#define BOOTFLASH_BAM (BOOTFLASH_SIZE - 1) - -#define SDRAM_START 0x00000000 /* start at address 0 */ -#define SDRAM_SIZE 0x4000000 /* 64 MB on the LITEKIT */ - -#ifdef COMPILE_RAM -#define TARGET_ADDRESS (SDRAM_START + SDRAM_SIZE - 0x200000) -#else -#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS -#endif /* COMPILE_RAM */ - -#define DRIVER_MEM_BUFFER_SIZE 0x100000 - -#define EMUTOS_BASE_ADDRESS 0xe0100000 - -#endif /* _M5484L_H_ */ diff --git a/include/mcd_initiators.h b/include/mcd_initiators.h deleted file mode 100644 index c6f41ca..0000000 --- a/include/mcd_initiators.h +++ /dev/null @@ -1,48 +0,0 @@ -#ifndef _MCD_INITIATORS_H_ -#define _MCD_INITIATORS_H_ - -/* initiators */ - -/* direct connected initiators */ -#define DMA_ALWAYS (0) -#define DMA_DSPI_RXFIFO (1) -#define DMA_DSPI_TXFIFO (2) -#define DMA_DREQ0 (3) -#define DMA_PSC0_RX (4) -#define DMA_PSC0_TX (5) -#define DMA_USB_EP0 (6) -#define DMA_USB_EP1 (7) -#define DMA_USB_EP2 (8) -#define DMA_USB_EP3 (9) -#define DMA_PCI_TX (10) -#define DMA_PCI_RX (11) -#define DMA_PSC1_RX (12) -#define DMA_PSC1_TX (13) -#define DMA_I2C_RX (14) -#define DMA_I2C_TX (15) - -/* multiplexed initiators */ -#define DMA_FEC0_RX (16) -#define DMA_FEC0_TX (17) -#define DMA_FEC1_RX (18) -#define DMA_FEC1_TX (19) -#define DMA_DREQ1 (20) -#define DMA_CTM0 (21) -#define DMA_CTM1 (22) -#define DMA_CTM2 (23) -#define DMA_CTM3 (24) -#define DMA_CTM4 (25) -#define DMA_CTM5 (26) -#define DMA_CTM6 (27) -#define DMA_CTM7 (28) -#define DMA_USBEP4 (29) -#define DMA_USBEP5 (30) -#define DMA_USBEP6 (31) -#define DMA_PSC2_RX (32) -#define DMA_PSC2_TX (33) -#define DMA_PSC3_RX (34) -#define DMA_PSC3_TX (35) -#define DMA_FEC_RX(x) ((x == 0) ? DMA_FEC0_RX : DMA_FEC1_RX) -#define DMA_FEC_TX(x) ((x == 0) ? DMA_FEC0_TX : DMA_FEC1_TX) - -#endif /* _MCD_INITIATORS_H_ */ diff --git a/include/mmu.h b/include/mmu.h deleted file mode 100644 index b200c65..0000000 --- a/include/mmu.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * mmu.h - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - - -#ifndef _MMU_H_ -#define _MMU_H_ - -#include -#include "bas_types.h" - -/* - * ACR register handling macros - */ -#define ACR_BA(x) ((x) & 0xffff0000) -#define ACR_ADMSK(x) (((x) & 0xffff) << 16) -#define ACR_E(x) (((x) & 1) << 15) - -#define ACR_S(x) (((x) & 3) << 13) -#define ACR_S_USERMODE 0 -#define ACR_S_SUPERVISOR_MODE 1 -#define ACR_S_ALL 2 - -#define ACR_ADDRESS_MASK_MODE(x) (((x) & 1) << 10) - -#define ACR_CACHE_MODE(x) (((x) & 3) << 5) -#define ACR_SUPERVISOR_PROTECT(x) (((x) & 1) << 3) -#define ACR_WRITE_PROTECT(x) (((x) & 1) << 2) - - -/* - * MMU register handling macros - */ - -#define SCA_PAGE_ID 6 /* indicates video memory page */ - -/* - * MMU page sizes - */ - -enum mmu_page_size -{ - MMU_PAGE_SIZE_1M = 0, - MMU_PAGE_SIZE_4K = 1, - MMU_PAGE_SIZE_8K = 2, - MMU_PAGE_SIZE_1K = 3 -}; - -#define SIZE_1M 0x100000 /* 1 Megabyte */ -#define SIZE_4K 0x1000 /* 4 KB */ -#define SIZE_8K 0x2000 /* 8 KB */ -#define SIZE_1K 0x400 /* 1 KB */ - -#define DEFAULT_PAGE_SIZE 0x00100000 /* 1M pagesize */ - -/* - * cache modes - */ -#define CACHE_WRITETHROUGH 0 -#define CACHE_COPYBACK 1 -#define CACHE_NOCACHE_PRECISE 2 -#define CACHE_NOCACHE_IMPRECISE 3 - - -/* - * page flags - */ -#define SV_PROTECT 1 -#define SV_USER 0 - -#define ACCESS_READ (1 << 0) -#define ACCESS_WRITE (1 << 1) -#define ACCESS_EXECUTE (1 << 2) - - -/* - * global variables from linker script - */ -extern long video_tlb; -extern long video_sbt; - -struct mmu_page_descriptor; - -extern void mmu_init(void); -extern int mmu_map_page(int32_t virt, int32_t phys, enum mmu_page_size sz, uint8_t page_id, const struct mmu_page_descriptor *flags); - -/* - * API functions for the BaS driver interface - */ -extern int32_t mmu_map_data_page_locked(uint32_t address, uint32_t length, int asid); -extern int32_t mmu_unlock_data_page(uint32_t address, uint32_t length, int asid); -extern int32_t mmu_report_locked_pages(uint32_t *num_itlb, uint32_t *num_dtlb); -extern uint32_t mmu_report_pagesize(void); -#endif /* _MMU_H_ */ diff --git a/include/mod_devicetable.h b/include/mod_devicetable.h deleted file mode 100644 index 443c6e4..0000000 --- a/include/mod_devicetable.h +++ /dev/null @@ -1,176 +0,0 @@ -#ifndef MOD_DEVICETABLE_H -#define MOD_DEVICETABLE_H - -#define PCI_ANY_ID (~0) - -struct pci_device_id -{ - unsigned long vendor; /* Vendor and device ID or PCI_ANY_ID*/ - unsigned long device; - unsigned long subvendor; /* Subsystem ID's or PCI_ANY_ID */ - unsigned long subdevice; - unsigned long class; /* (class,subclass,prog-if) triplet */ - unsigned long class_mask; - unsigned long driver_data; /* Data private to the driver */ -}; - -#define IEEE1394_MATCH_VENDOR_ID 0x0001 -#define IEEE1394_MATCH_MODEL_ID 0x0002 -#define IEEE1394_MATCH_SPECIFIER_ID 0x0004 -#define IEEE1394_MATCH_VERSION 0x0008 - -struct ieee1394_device_id -{ - unsigned long match_flags; - unsigned long vendor_id; - unsigned long model_id; - unsigned long specifier_id; - unsigned long version; - unsigned long driver_data; -}; - -/* - * Device table entry for "new style" table-driven USB drivers. - * User mode code can read these tables to choose which modules to load. - * Declare the table as a MODULE_DEVICE_TABLE. - * - * A probe() parameter will point to a matching entry from this table. - * Use the driver_info field for each match to hold information tied - * to that match: device quirks, etc. - * - * Terminate the driver's table with an all-zeroes entry. - * Use the flag values to control which fields are compared. - */ - -/** - * struct usb_device_id - identifies USB devices for probing and hotplugging - * @match_flags: Bit mask controlling of the other fields are used to match - * against new devices. Any field except for driver_info may be used, - * although some only make sense in conjunction with other fields. - * This is usually set by a USB_DEVICE_*() macro, which sets all - * other fields in this structure except for driver_info. - * @idVendor: USB vendor ID for a device; numbers are assigned - * by the USB forum to its members. - * @idProduct: Vendor-assigned product ID. - * @bcdDevice_lo: Low end of range of vendor-assigned product version numbers. - * This is also used to identify individual product versions, for - * a range consisting of a single device. - * @bcdDevice_hi: High end of version number range. The range of product - * versions is inclusive. - * @bDeviceClass: Class of device; numbers are assigned - * by the USB forum. Products may choose to implement classes, - * or be vendor-specific. Device classes specify behavior of all - * the interfaces on a devices. - * @bDeviceSubClass: Subclass of device; associated with bDeviceClass. - * @bDeviceProtocol: Protocol of device; associated with bDeviceClass. - * @bInterfaceClass: Class of interface; numbers are assigned - * by the USB forum. Products may choose to implement classes, - * or be vendor-specific. Interface classes specify behavior only - * of a given interface; other interfaces may support other classes. - * @bInterfaceSubClass: Subclass of interface; associated with bInterfaceClass. - * @bInterfaceProtocol: Protocol of interface; associated with bInterfaceClass. - * @driver_info: Holds information used by the driver. Usually it holds - * a pointer to a descriptor understood by the driver, or perhaps - * device flags. - * - * In most cases, drivers will create a table of device IDs by using - * USB_DEVICE(), or similar macros designed for that purpose. - * They will then export it to userspace using MODULE_DEVICE_TABLE(), - * and provide it to the USB core through their usb_driver structure. - * - * See the usb_match_id() function for information about how matches are - * performed. Briefly, you will normally use one of several macros to help - * construct these entries. Each entry you provide will either identify - * one or more specific products, or will identify a class of products - * which have agreed to behave the same. You should put the more specific - * matches towards the beginning of your table, so that driver_info can - * record quirks of specific products. - */ -struct usb_device_id -{ - /* which fields to match against? */ - unsigned short match_flags; - - /* Used for product specific matches; range is inclusive */ - unsigned short idVendor; - unsigned short idProduct; - unsigned short bcdDevice_lo; - unsigned short bcdDevice_hi; - - /* Used for device class matches */ - unsigned char bDeviceClass; - unsigned char bDeviceSubClass; - unsigned char bDeviceProtocol; - - /* Used for interface class matches */ - unsigned char bInterfaceClass; - unsigned char bInterfaceSubClass; - unsigned char bInterfaceProtocol; - - /* not matched against */ - unsigned long driver_info; -}; - -/* Some useful macros to use to create struct usb_device_id */ -#define USB_DEVICE_ID_MATCH_VENDOR 0x0001 -#define USB_DEVICE_ID_MATCH_PRODUCT 0x0002 -#define USB_DEVICE_ID_MATCH_DEV_LO 0x0004 -#define USB_DEVICE_ID_MATCH_DEV_HI 0x0008 -#define USB_DEVICE_ID_MATCH_DEV_CLASS 0x0010 -#define USB_DEVICE_ID_MATCH_DEV_SUBCLASS 0x0020 -#define USB_DEVICE_ID_MATCH_DEV_PROTOCOL 0x0040 -#define USB_DEVICE_ID_MATCH_INT_CLASS 0x0080 -#define USB_DEVICE_ID_MATCH_INT_SUBCLASS 0x0100 -#define USB_DEVICE_ID_MATCH_INT_PROTOCOL 0x0200 - -/* s390 CCW devices */ -struct ccw_device_id -{ - unsigned short match_flags; /* which fields to match against */ - - unsigned short cu_type; /* control unit type */ - unsigned short dev_type; /* device type */ - unsigned char cu_model; /* control unit model */ - unsigned char dev_model; /* device model */ - - unsigned long driver_info; -}; - -#define CCW_DEVICE_ID_MATCH_CU_TYPE 0x01 -#define CCW_DEVICE_ID_MATCH_CU_MODEL 0x02 -#define CCW_DEVICE_ID_MATCH_DEVICE_TYPE 0x04 -#define CCW_DEVICE_ID_MATCH_DEVICE_MODEL 0x08 - - -#define PNP_ID_LEN 8 -#define PNP_MAX_DEVICES 8 - -struct pnp_device_id -{ - unsigned char id[PNP_ID_LEN]; - unsigned long driver_data; -}; - -struct pnp_card_device_id -{ - unsigned char id[PNP_ID_LEN]; - unsigned long driver_data; - struct - { - unsigned char id[PNP_ID_LEN]; - } devs[PNP_MAX_DEVICES]; -}; - - -#define SERIO_ANY 0xff - -struct serio_device_id -{ - unsigned char type; - unsigned char extra; - unsigned char id; - unsigned char proto; -}; - - -#endif /* MOD_DEVICETABLE_H */ diff --git a/include/nbuf.h b/include/nbuf.h deleted file mode 100644 index 7e3a785..0000000 --- a/include/nbuf.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * File: nbuf.h - * Purpose: Definitions for network buffer management - * - * Notes: These routines implement a network buffer scheme - */ - -#ifndef _NBUF_H_ -#define _NBUF_H_ - -#include "bas_types.h" - -/* - * Include the Queue structure definitions - */ -#include "queue.h" - -/* - * Number of network buffers to use - */ -#define NBUF_MAX 30 - -/* - * Size of each buffer in bytes - */ -#ifndef NBUF_SZ -#define NBUF_SZ 2048 -#endif - -/* - * Defines to identify all the buffer queues - * - FREE must always be defined as 0 - */ -#define NBUF_FREE 0 /* available buffers */ -#define NBUF_TX_RING 1 /* buffers in the Tx BD ring */ -#define NBUF_RX_RING 2 /* buffers in the Rx BD ring */ -#define NBUF_SCRATCH 3 /* misc */ -#define NBUF_MAXQ 4 /* total number of queueus */ - -/* - * Buffer Descriptor Format - * - * Fields: - * next Pointer to next node in the queue - * data Pointer to the data buffer - * offset Index into buffer - * length Remaining bytes in buffer from (data + offset) - */ -typedef struct -{ - QNODE node; - uint8_t *data; - uint16_t offset; - uint16_t length; -} NBUF; - -/* - * Functions to manipulate the network buffers. - */ -extern int nbuf_init(void); -extern void nbuf_flush(void); -extern NBUF *nbuf_alloc (void); -extern void nbuf_free(NBUF *); -extern NBUF *nbuf_remove(int); -extern void nbuf_add(int, NBUF *); -extern void nbuf_reset(void); -extern void nbuf_debug_dump(void); - - -#endif /* _NBUF_H_ */ diff --git a/include/net.h b/include/net.h deleted file mode 100644 index e6ce6ec..0000000 --- a/include/net.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * File: net.h - * Purpose: Network definitions and prototypes for BaS. - * - * Notes: - */ - -#ifndef _NET_H -#define _NET_H - - -/* - * Include information and prototypes for all protocols - */ -#include "eth.h" -#include "nbuf.h" -#include "nif.h" -#include "ip.h" -#include "icmp.h" -#include "arp.h" -#include "udp.h" -#include "tftp.h" - -#define TIMER_NETWORK 3 /* use GPT3 for network timers */ -#define TMR_INTC_LVL 3 /* interrupt level for network timer */ -#define TMR_INTC_PRI 0 /* interrupt priority for network timer */ - -extern int net_init(void); - - -#endif /* _NET_H */ - diff --git a/include/net_timer.h b/include/net_timer.h deleted file mode 100644 index 0fd571a..0000000 --- a/include/net_timer.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * File: net_timer.h - * Purpose: Provide a timer use by the BaS network as a timeout - * indicator - * - */ - -#ifndef _TIMER_H_ -#define _TIMER_H_ - -#include - -typedef struct -{ - uint8_t ch; /* which channel is this structure for? */ - uint8_t lvl; /* Interrupt level for this channel */ - uint8_t pri; /* Interrupt priority for this channel */ - uint8_t reference; /* timeout indicator */ - uint32_t gms; /* mode select register value */ - uint16_t pre; /* prescale value */ - uint16_t cnt; /* prescaled clocks for timeout */ -} NET_TIMER; - - -extern bool timer_init(uint8_t, uint8_t, uint8_t); -extern bool timer_set_secs(uint8_t ch, uint32_t secs); -extern uint32_t timer_get_reference(uint8_t ch); - -/* Vector numbers for all the timer channels */ -#define TIMER_VECTOR(x) (126-x) - -#endif /* _TIMER_H_ */ diff --git a/include/nif.h b/include/nif.h deleted file mode 100644 index 639d341..0000000 --- a/include/nif.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * File: nif.h - * Purpose: Definition of a Network InterFace. - * - * Notes: - */ - -#ifndef _NIF_H -#define _NIF_H - -/* - * Maximum number of supported protoocls: IP, ARP, RARP - */ -#define MAX_SUP_PROTO (3) - -typedef struct NIF_t -{ - ETH_ADDR hwa; /* ethernet card hardware address */ - ETH_ADDR broadcast; /* broadcast address */ - int mtu; /* hardware maximum transmission unit */ - int ch; /* ethernet channel associated with this NIF */ - - struct SUP_PROTO_t - { - uint16_t protocol; - void (*handler)(struct NIF_t *, NBUF *); - void *info; - } protocol[MAX_SUP_PROTO]; - - unsigned short num_protocol; - - int (*send)(struct NIF_t *, uint8_t *, uint8_t *, uint16_t, NBUF *); - - unsigned int f_rx; - unsigned int f_tx; - unsigned int f_rx_err; - unsigned int f_tx_err; - unsigned int f_err; -} NIF; - - -extern NIF *nif_init (NIF *); -extern int nif_protocol_exist (NIF *, uint16_t); -extern void nif_protocol_handler (NIF *, uint16_t, NBUF *); -extern void *nif_get_protocol_info (NIF *, uint16_t); -extern int nif_bind_protocol (NIF *, uint16_t, void (*)(NIF *, NBUF *), void *); - - -#endif /* _NIF_H */ diff --git a/include/ohci.h b/include/ohci.h deleted file mode 100644 index 0f7d68b..0000000 --- a/include/ohci.h +++ /dev/null @@ -1,464 +0,0 @@ -/* - * URB OHCI HCD (Host Controller Driver) for USB. - * - * (C) Copyright 1999 Roman Weissgaerber - * (C) Copyright 2000-2001 David Brownell - * - * usb-ohci.h - */ - -#define USB_OHCI_MAX_ROOT_PORTS 4 - -static int cc_to_error[16] = -{ - -/* mapping of the OHCI CC status to error codes */ - /* No Error */ 0, - /* CRC Error */ USB_ST_CRC_ERR, - /* Bit Stuff */ USB_ST_BIT_ERR, - /* Data Togg */ USB_ST_CRC_ERR, - /* Stall */ USB_ST_STALLED, - /* DevNotResp */ -1, - /* PIDCheck */ USB_ST_BIT_ERR, - /* UnExpPID */ USB_ST_BIT_ERR, - /* DataOver */ USB_ST_BUF_ERR, - /* DataUnder */ USB_ST_BUF_ERR, - /* reservd */ -1, - /* reservd */ -1, - /* BufferOver */ USB_ST_BUF_ERR, - /* BuffUnder */ USB_ST_BUF_ERR, - /* Not Access */ -1, - /* Not Access */ -1 -}; - -static const char *cc_to_string[16] = -{ - "No Error", - "CRC: Last data packet from endpoint contained a CRC error.", - "BITSTUFFING:\r\nLast data packet from endpoint contained a bit stuffing violation", - "DATATOGGLEMISMATCH:\r\n Last packet from endpoint had data toggle PID\r\n" \ - "that did not match the expected value.", - "STALL: TD was moved to the Done Queue because the endpoint returned a STALL PID", - "DEVICENOTRESPONDING:\r\nDevice did not respond to token (IN) or did\r\n" \ - "not provide a handshake (OUT)", - "PIDCHECKFAILURE:\r\nCheck bits on PID from endpoint failed on data PID\r\n"\ - "(IN) or handshake (OUT)", - "UNEXPECTEDPID:\r\nReceive PID was not valid when encountered or PID\r\n" \ - "value is not defined.", - "DATAOVERRUN:\r\nThe amount of data returned by the endpoint exceeded\r\n" \ - "either the size of the maximum data packet allowed\r\n" \ - "from the endpoint (found in MaximumPacketSize field\r\n" \ - "of ED) or the remaining buffer size.", - "DATAUNDERRUN:\r\nThe endpoint returned less than MaximumPacketSize\r\n" \ - "and that amount was not sufficient to fill the\r\n" \ - "specified buffer", - "reserved1", - "reserved2", - "BUFFEROVERRUN:\r\nDuring an IN, HC received data from endpoint faster\r\n" \ - "than it could be written to system memory", - "BUFFERUNDERRUN:\r\nDuring an OUT, HC could not retrieve data from\r\n" \ - "system memory fast enough to keep up with data USB data rate.", - "NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \ - "on a list to be processed by the HC.(1)", - "NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \ - "on a list to be processed by the HC.(2)", -}; - -/* ED States */ - -#define ED_NEW 0x00 -#define ED_UNLINK 0x01 -#define ED_OPER 0x02 -#define ED_DEL 0x04 -#define ED_URB_DEL 0x08 - -/* usb_ohci_ed */ -struct ed -{ - uint32_t hwINFO; - uint32_t hwTailP; - uint32_t hwHeadP; - uint32_t hwNextED; - - struct ed *ed_prev; - uint8_t int_period; - uint8_t int_branch; - uint8_t int_load; - uint8_t int_interval; - uint8_t state; - uint8_t type; - uint16_t last_iso; - struct ed *ed_rm_list; - - struct usb_device *usb_dev; - void *purb; - uint32_t unused[2]; -} __attribute__((aligned(16))); -typedef struct ed ed_t; - - -/* TD info field */ -#define TD_CC 0xf0000000 -#define TD_CC_GET(td_p) ((td_p >>28) & 0x0f) -#define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28) -#define TD_EC 0x0C000000 -#define TD_T 0x03000000 -#define TD_T_DATA0 0x02000000 -#define TD_T_DATA1 0x03000000 -#define TD_T_TOGGLE 0x00000000 -#define TD_R 0x00040000 -#define TD_DI 0x00E00000 -#define TD_DI_SET(X) (((X) & 0x07)<< 21) -#define TD_DP 0x00180000 -#define TD_DP_SETUP 0x00000000 -#define TD_DP_IN 0x00100000 -#define TD_DP_OUT 0x00080000 - -#define TD_ISO 0x00010000 -#define TD_DEL 0x00020000 - -/* CC Codes */ -#define TD_CC_NOERROR 0x00 -#define TD_CC_CRC 0x01 -#define TD_CC_BITSTUFFING 0x02 -#define TD_CC_DATATOGGLEM 0x03 -#define TD_CC_STALL 0x04 -#define TD_DEVNOTRESP 0x05 -#define TD_PIDCHECKFAIL 0x06 -#define TD_UNEXPECTEDPID 0x07 -#define TD_DATAOVERRUN 0x08 -#define TD_DATAUNDERRUN 0x09 -#define TD_BUFFEROVERRUN 0x0C -#define TD_BUFFERUNDERRUN 0x0D -#define TD_NOTACCESSED 0x0F - - -#define MAXPSW 1 - -struct td -{ - uint32_t hwINFO; - uint32_t hwCBP; /* Current Buffer Pointer */ - uint32_t hwNextTD; /* Next TD Pointer */ - uint32_t hwBE; /* Memory Buffer End Pointer */ - - uint16_t hwPSW[MAXPSW]; - uint8_t unused; - uint8_t index; - struct ed *ed; - struct td *next_dl_td; - struct usb_device *usb_dev; - int transfer_len; - uint32_t data; - - uint32_t unused2[2]; -} __attribute__((aligned(32))); -typedef struct td td_t; - -#define OHCI_ED_SKIP (1 << 14) - -/* - * The HCCA (Host Controller Communications Area) is a 256 byte - * structure defined in the OHCI spec. that the host controller is - * told the base address of. It must be 256-byte aligned. - */ - -#define NUM_INTS 32 /* part of the OHCI standard */ -struct ohci_hcca -{ - uint32_t int_table[NUM_INTS]; /* Interrupt ED table */ -#if defined(CONFIG_MPC5200) - uint16_t pad1; /* set to 0 on each frame_no change */ - uint16_t frame_no; /* current frame number */ -#else - uint16_t frame_no; /* current frame number */ - uint16_t pad1; /* set to 0 on each frame_no change */ -#endif - uint32_t done_head; /* info returned for an interrupt */ - uint8_t reserved_for_hc[116]; -} __attribute__((aligned(256))); - -/* - * This is the structure of the OHCI controller's memory mapped I/O - * region. This is Memory Mapped I/O. You must use the readl() and - * writel() macros defined in asm/io.h to access these!! - */ -struct ohci_regs -{ - /* control and status registers */ - uint32_t revision; - uint32_t control; - uint32_t cmdstatus; - uint32_t intrstatus; - uint32_t intrenable; - uint32_t intrdisable; - /* memory pointers */ - uint32_t hcca; - uint32_t ed_periodcurrent; - uint32_t ed_controlhead; - uint32_t ed_controlcurrent; - uint32_t ed_bulkhead; - uint32_t ed_bulkcurrent; - uint32_t donehead; - /* frame counters */ - uint32_t fminterval; - uint32_t fmremaining; - uint32_t fmnumber; - uint32_t periodicstart; - uint32_t lsthresh; - /* Root hub ports */ - struct ohci_roothub_regs - { - uint32_t a; - uint32_t b; - uint32_t status; - uint32_t portstatus[USB_OHCI_MAX_ROOT_PORTS]; - } roothub; -} __attribute__((aligned(32))); - -/* Some EHCI controls */ -#define EHCI_USBCMD_OFF 0x20 -#define EHCI_USBCMD_HCRESET (1 << 1) - -/* OHCI CONTROL AND STATUS REGISTER MASKS */ - -/* - * HcControl (control) register masks - */ -#define OHCI_CTRL_CBSR (3 << 0) /* control/bulk service ratio */ -#define OHCI_CTRL_PLE (1 << 2) /* periodic list enable */ -#define OHCI_CTRL_IE (1 << 3) /* isochronous enable */ -#define OHCI_CTRL_CLE (1 << 4) /* control list enable */ -#define OHCI_CTRL_BLE (1 << 5) /* bulk list enable */ -#define OHCI_CTRL_HCFS (3 << 6) /* host controller functional state */ -#define OHCI_CTRL_IR (1 << 8) /* interrupt routing */ -#define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */ -#define OHCI_CTRL_RWE (1 << 10) /* remote wakeup enable */ - -/* pre-shifted values for HCFS */ -# define OHCI_USB_RESET (0 << 6) -# define OHCI_USB_RESUME (1 << 6) -# define OHCI_USB_OPER (2 << 6) -# define OHCI_USB_SUSPEND (3 << 6) - -/* - * HcCommandStatus (cmdstatus) register masks - */ -#define OHCI_HCR (1 << 0) /* host controller reset */ -#define OHCI_CLF (1 << 1) /* control list filled */ -#define OHCI_BLF (1 << 2) /* bulk list filled */ -#define OHCI_OCR (1 << 3) /* ownership change request */ -#define OHCI_SOC (3 << 16) /* scheduling overrun count */ - -/* - * masks used with interrupt registers: - * HcInterruptStatus (intrstatus) - * HcInterruptEnable (intrenable) - * HcInterruptDisable (intrdisable) - */ -#define OHCI_INTR_SO (1 << 0) /* scheduling overrun */ -#define OHCI_INTR_WDH (1 << 1) /* writeback of done_head */ -#define OHCI_INTR_SF (1 << 2) /* start frame */ -#define OHCI_INTR_RD (1 << 3) /* resume detect */ -#define OHCI_INTR_UE (1 << 4) /* unrecoverable error */ -#define OHCI_INTR_FNO (1 << 5) /* frame number overflow */ -#define OHCI_INTR_RHSC (1 << 6) /* root hub status change */ -#define OHCI_INTR_OC (1 << 30) /* ownership change */ -#define OHCI_INTR_MIE (1 << 31) /* master interrupt enable */ - - -/* Virtual Root HUB */ -struct virt_root_hub -{ - int devnum; /* Address of Root Hub endpoint */ - void *dev; /* was urb */ - void *int_addr; - int send; - int interval; -}; - -/* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */ - -/* destination of request */ -#define RH_INTERFACE 0x01 -#define RH_ENDPOINT 0x02 -#define RH_OTHER 0x03 - -#define RH_CLASS 0x20 -#define RH_VENDOR 0x40 - -/* Requests: bRequest << 8 | bmRequestType */ -#define RH_GET_STATUS 0x0080 -#define RH_CLEAR_FEATURE 0x0100 -#define RH_SET_FEATURE 0x0300 -#define RH_SET_ADDRESS 0x0500 -#define RH_GET_DESCRIPTOR 0x0680 -#define RH_SET_DESCRIPTOR 0x0700 -#define RH_GET_CONFIGURATION 0x0880 -#define RH_SET_CONFIGURATION 0x0900 -#define RH_GET_STATE 0x0280 -#define RH_GET_INTERFACE 0x0A80 -#define RH_SET_INTERFACE 0x0B00 -#define RH_SYNC_FRAME 0x0C80 -/* Our Vendor Specific Request */ -#define RH_SET_EP 0x2000 - - -/* Hub port features */ -#define RH_PORT_CONNECTION 0x00 -#define RH_PORT_ENABLE 0x01 -#define RH_PORT_SUSPEND 0x02 -#define RH_PORT_OVER_CURRENT 0x03 -#define RH_PORT_RESET 0x04 -#define RH_PORT_POWER 0x08 -#define RH_PORT_LOW_SPEED 0x09 - -#define RH_C_PORT_CONNECTION 0x10 -#define RH_C_PORT_ENABLE 0x11 -#define RH_C_PORT_SUSPEND 0x12 -#define RH_C_PORT_OVER_CURRENT 0x13 -#define RH_C_PORT_RESET 0x14 - -/* Hub features */ -#define RH_C_HUB_LOCAL_POWER 0x00 -#define RH_C_HUB_OVER_CURRENT 0x01 - -#define RH_DEVICE_REMOTE_WAKEUP 0x00 -#define RH_ENDPOINT_STALL 0x01 - -#define RH_ACK 0x01 -#define RH_REQ_ERR -1 -#define RH_NACK 0x00 - - -/* OHCI ROOT HUB REGISTER MASKS */ - -/* roothub.portstatus [i] bits */ -#define RH_PS_CCS 0x00000001 /* current connect status */ -#define RH_PS_PES 0x00000002 /* port enable status*/ -#define RH_PS_PSS 0x00000004 /* port suspend status */ -#define RH_PS_POCI 0x00000008 /* port over current indicator */ -#define RH_PS_PRS 0x00000010 /* port reset status */ -#define RH_PS_PPS 0x00000100 /* port power status */ -#define RH_PS_LSDA 0x00000200 /* low speed device attached */ -#define RH_PS_CSC 0x00010000 /* connect status change */ -#define RH_PS_PESC 0x00020000 /* port enable status change */ -#define RH_PS_PSSC 0x00040000 /* port suspend status change */ -#define RH_PS_OCIC 0x00080000 /* over current indicator change */ -#define RH_PS_PRSC 0x00100000 /* port reset status change */ - -/* roothub.status bits */ -#define RH_HS_LPS 0x00000001 /* local power status */ -#define RH_HS_OCI 0x00000002 /* over current indicator */ -#define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */ -#define RH_HS_LPSC 0x00010000 /* local power status change */ -#define RH_HS_OCIC 0x00020000 /* over current indicator change */ -#define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */ - -/* roothub.b masks */ -#define RH_B_DR 0x0000ffff /* device removable flags */ -#define RH_B_PPCM 0xffff0000 /* port power control mask */ - -/* roothub.a masks */ -#define RH_A_NDP (0xff << 0) /* number of downstream ports */ -#define RH_A_PSM (1 << 8) /* power switching mode */ -#define RH_A_NPS (1 << 9) /* no power switching */ -#define RH_A_DT (1 << 10) /* device type (mbz) */ -#define RH_A_OCPM (1 << 11) /* over current protection mode */ -#define RH_A_NOCP (1 << 12) /* no over current protection */ -#define RH_A_POTPGT (0xff << 24) /* power on to power good time */ - -/* urb */ -#define N_URB_TD 48 -typedef struct -{ - ed_t *ed; - uint16_t length; /* number of tds associated with this request */ - uint16_t td_cnt; /* number of tds already serviced */ - struct usb_device *dev; - int state; - uint32_t pipe; - void *transfer_buffer; - int transfer_buffer_length; - int interval; - int actual_length; - int finished; - td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs associated with this request */ -} urb_priv_t; -#define URB_DEL 1 - -#define NUM_EDS 8 /* num of preallocated endpoint descriptors */ - -struct ohci_device -{ - ed_t ed[NUM_EDS]; - int ed_cnt; -}; - -/* - * This is the full ohci controller description - * - * Note how the "proper" USB information is just - * a subset of what the full implementation needs. (Linus) - */ - -typedef struct ohci -{ - /* ------- common part -------- */ - long handle; /* PCI BIOS */ - const struct pci_device_id *ent; - int usbnum; - /* ---- end of common part ---- */ - int big_endian; /* PCI BIOS */ - int controller; - struct ohci_hcca *hcca_unaligned; - struct ohci_hcca *hcca; /* hcca */ - td_t *td_unaligned; - struct ohci_device *ohci_dev_unaligned; - /* this allocates EDs for all possible endpoints */ - struct ohci_device *ohci_dev; - - int irq_enabled; - int stat_irq; - int irq; - int disabled; /* e.g. got a UE, we're hung */ - int sleeping; -#define OHCI_FLAGS_NEC 0x80000000 - uint32_t flags; /* for HC bugs */ - - uint32_t offset; - uint32_t dma_offset; - struct ohci_regs *regs; /* OHCI controller's memory */ - - int ohci_int_load[32]; /* load of the 32 Interrupt Chains (for load balancing)*/ - ed_t *ed_rm_list[2]; /* lists of all endpoints to be removed */ - ed_t *ed_bulktail; /* last endpoint of bulk list */ - ed_t *ed_controltail; /* last endpoint of control list */ - int intrstatus; - uint32_t hc_control; /* copy of the hc control reg */ - uint32_t ndp; /* copy NDP from roothub_a */ - struct virt_root_hub rh; - - const char *slot_name; - - /* device which was disconnected */ - struct usb_device *devgone; -} ohci_t; - -/* hcd */ -/* endpoint */ -static int ep_link(ohci_t * ohci, ed_t * ed); -static int ep_unlink(ohci_t * ohci, ed_t * ed); -static ed_t * ep_add_ed(ohci_t * ohci, struct usb_device * usb_dev, uint32_t pipe, int interval, int load); - - -/* we need more TDs than EDs */ -#define NUM_TD 64 - - -static inline void ed_free(struct ed *ed) -{ - ed->usb_dev = NULL; -} - - diff --git a/include/part.h b/include/part.h deleted file mode 100644 index 54ffafb..0000000 --- a/include/part.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _PART_H -#define _PART_H - -typedef unsigned long long uint64_t; -typedef unsigned long lbaint_t; - -typedef struct block_dev_desc -{ - int if_type; /* type of the interface */ - int dev; /* device number */ - unsigned char part_type; /* partition type */ - unsigned char target; /* target SCSI ID */ - unsigned char lun; /* target LUN */ - unsigned char type; /* device type */ - unsigned char removable; /* removable device */ -#ifdef CONFIG_LBA48 - unsigned char lba48; /* device can use 48bit addr (ATA/ATAPI v7) */ -#endif - lbaint_t lba; /* number of blocks */ - unsigned long blksz; /* block size */ - char vendor [40+1]; /* IDE model, SCSI Vendor */ - char product[20+1]; /* IDE Serial no, SCSI product */ - char revision[8+1]; /* firmware revision */ - long (*block_read)(int dev, unsigned long start, lbaint_t blkcnt, void *buffer); - long (*block_write)(int dev, unsigned long start, lbaint_t blkcnt, const void *buffer); - void *priv; /* driver private struct pointer */ -}block_dev_desc_t; - -/* Interface types: */ -#define IF_TYPE_UNKNOWN 0 -#define IF_TYPE_IDE 1 -#define IF_TYPE_SCSI 2 -#define IF_TYPE_ATAPI 3 -#define IF_TYPE_USB 4 -#define IF_TYPE_DOC 5 -#define IF_TYPE_MMC 6 -#define IF_TYPE_SD 7 -#define IF_TYPE_SATA 8 - -/* Part types */ -#define PART_TYPE_UNKNOWN 0x00 -#define PART_TYPE_MAC 0x01 -#define PART_TYPE_DOS 0x02 -#define PART_TYPE_ISO 0x03 -#define PART_TYPE_AMIGA 0x04 -#define PART_TYPE_EFI 0x05 -#define PART_TYPE_GEMDOS 0x06 - -/* - * Type string for U-Boot bootable partitions - */ -#define BOOT_PART_TYPE "U-Boot" /* primary boot partition type */ -#define BOOT_PART_COMP "PPCBoot" /* PPCBoot compatibility type */ - -/* device types */ -#define DEV_TYPE_UNKNOWN 0xff /* not connected */ -#define DEV_TYPE_HARDDISK 0x00 /* harddisk */ -#define DEV_TYPE_TAPE 0x01 /* Tape */ -#define DEV_TYPE_CDROM 0x05 /* CD-ROM */ -#define DEV_TYPE_OPDISK 0x07 /* optical disk */ - -void print_part(block_dev_desc_t *dev_desc); -void init_part(block_dev_desc_t *dev_desc); -void dev_print(block_dev_desc_t *dev_desc); - -int fat_register_device(block_dev_desc_t *dev_desc, int part_no, unsigned long *part_type, unsigned long *part_offset, unsigned long *part_size); - -#endif /* _PART_H */ diff --git a/include/pci.h b/include/pci.h deleted file mode 100644 index 32756a8..0000000 --- a/include/pci.h +++ /dev/null @@ -1,353 +0,0 @@ -#ifndef _PCI_H_ -#define _PCI_H_ - -/* - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#include -#include "util.h" /* for swpX() */ - -#define PCI_MEMORY_OFFSET (0x80000000) -#define PCI_MEMORY_SIZE (0x40000000) /* 1 GByte PCI memory window */ -#define PCI_IO_OFFSET (0xD0000000) -#define PCI_IO_SIZE (0x10000000) /* 128 MByte PCI I/O window */ - -/* - * Note: the byte offsets are in little endian format, so you can't use them - * on byteswapped (Motorola format) values! - */ -#define PCIIDR 0x00 /* PCI Configuration ID Register */ -#define PCICSR 0x04 /* PCI Command/Status Register */ -#define PCICR 0x04 /* PCI Command Register */ -#define PCISR 0x06 /* PCI Status Register */ -#define PCIREV 0x08 /* PCI Revision ID Register */ -#define PCICCR 0x0B /* PCI Class Code Register */ -#define PCICLSR 0x0C /* PCI Cache Line Size Register */ -#define PCILTR 0x0D /* PCI Latency Timer Register */ -#define PCIHTR 0x0E /* PCI Header Type Register */ -#define PCIBISTR 0x0F /* PCI Build-In Self Test Register */ -#define PCIBAR0 0x10 /* PCI Base Address Register for Memory - Accesses to Local, Runtime, and DMA */ -#define PCIBAR1 0x14 /* PCI Base Address Register for I/O - Accesses to Local, Runtime, and DMA */ -#define PCIBAR2 0x18 /* PCI Base Address Register for Memory - Accesses to Local Address Space 0 */ -#define PCIBAR3 0x1C /* PCI Base Address Register for Memory - Accesses to Local Address Space 1 */ -#define PCIBAR4 0x20 /* PCI Base Address Register, reserved */ -#define PCIBAR5 0x24 /* PCI Base Address Register, reserved */ -#define PCICIS 0x28 /* PCI Cardbus CIS Pointer, not support*/ -#define PCISVID 0x2E /* PCI Subsystem Vendor ID */ -#define PCISID 0x2E /* PCI Subsystem ID */ -#define PCIERBAR 0x30 /* PCI Expansion ROM Base Register */ -#define CAP_PTR 0x34 /* New Capability Pointer */ -#define PCIILR 0x3C /* PCI Interrupt Line Register */ -#define PCIIPR 0x3D /* PCI Interrupt Pin Register */ -#define PCIMGR 0x3E /* PCI Min_Gnt Register */ -#define PCIMLR 0x3F /* PCI Max_Lat Register */ -#define PMCAPID 0x40 /* Power Management Capability ID */ -#define PMNEXT 0x41 /* Power Management Next Capability - Pointer */ -#define PMC 0x42 /* Power Management Capabilities */ -#define PMCSR 0x44 /* Power Management Control/Status */ -#define PMCSR_BSE 0x46 /* PMCSR Bridge Support Extensions */ -#define PMDATA 0x47 /* Power Management Data */ -#define HS_CNTL 0x48 /* Hot Swap Control */ -#define HS_NEXT 0x49 /* Hot Swap Next Capability Pointer */ -#define HS_CSR 0x4A /* Hot Swap Control/Status */ -#define PVPDCNTL 0x4C /* PCI Vital Product Data Control */ -#define PVPD_NEXT 0x4D /* PCI Vital Product Data Next - Capability Pointer */ -#define PVPDAD 0x4E /* PCI Vital Product Data Address */ -#define PVPDATA 0x50 /* PCI VPD Data */ - -/* - * bit definitions for PCICSR lower half (Command Register) - */ -#define PCICSR_IO (1 << 0) /* if set: device responds to I/O space accesses */ -#define PCICSR_MEMORY (1 << 1) /* if set: device responds to memory space accesses */ -#define PCICSR_MASTER (1 << 2) /* if set: device is master */ -#define PCICSR_SPECIAL (1 << 3) /* if set: device reacts on special cycles */ -#define PCICSR_MEMWI (1 << 4) /* if set: device deals with memory write and invalidate */ -#define PCICSR_VGA_SNOOP (1 << 5) /* if set: capable of palette snoop */ -#define PCICSR_PERR (1 << 6) /* if set: reacts to parity errors */ -#define PCICSR_STEPPING (1 << 7) /* if set: stepping enabled */ -#define PCICSR_SERR (1 << 8) /* if set: SERR pin enabled */ -#define PCICSR_FAST_BTOB_E (1 << 9) /* if set: fast back-to-back enabled */ -#define PCICSR_INT_DISABLE (1 << 10) /* if set: disable interrupts from this device */ -/* - * bit definitions for PCICSR upper half (Status Register) - */ -#define PCICSR_INTERRUPT (1 << 3) /* device requested interrupt */ -#define PCICSR_CAPABILITIES (1 << 4) /* if set, capabilities pointer is valid */ -#define PCICSR_66MHZ (1 << 5) /* 66 MHz capable */ -#define PCICSR_UDF (1 << 6) /* UDF supported */ -#define PCICSR_FAST_BTOB (1 << 7) /* Fast back-to-back enabled */ -#define PCICSR_DPARITY_ERROR (1 << 8) /* data parity error detected */ - -#define PCICSR_T_ABORT_S (1 << 11) /* target abort signaled */ -#define PCICSR_T_ABORT_R (1 << 12) /* target abort received */ -#define PCICSR_M_ABORT_R (1 << 13) /* master abort received */ -#define PCICSR_S_ERROR_S (1 << 14) /* system error signaled */ -#define PCICSR_PARITY_ERR (1 << 15) /* data parity error */ - -/* Header type 1 (PCI-to-PCI bridges) */ -#define PCI_PRIMARY_BUS 0x18 /* Primary bus number */ -#define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */ -#define PCI_SUBORDINATE_BUS 0x1A /* Highest bus number behind the bridge */ -#define PCI_SEC_LATENCY_TIMER 0x1B /* Latency timer for secondary interface */ -#define PCI_IO_BASE 0x1C /* I/O range behind the bridge */ -#define PCI_IO_LIMIT 0x1D -#define PCI_SEC_STATUS 0x1E /* Secondary status register, only bit 14 used */ -#define PCI_MEMORY_BASE 0x20 /* Memory range behind */ -#define PCI_MEMORY_LIMIT 0x22 -#define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */ -#define PCI_PREF_MEMORY_LIMIT 0x26 -#define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory range */ -#define PCI_PREF_LIMIT_UPPER32 0x2C -#define PCI_IO_BASE_UPPER16 0x30 /* Upper half of I/O addresses */ -#define PCI_IO_LIMIT_UPPER16 0x32 -#define PCI_BRIDGE_CONTROL 0x3E /* Bridge Control */ - -struct pci_rd /* structure of resource descriptor */ -{ - unsigned short next; /* length of the following structure */ - unsigned short flags; /* type of resource and misc. flags */ - unsigned long start; /* start-address of resource */ - unsigned long length; /* length of resource */ - unsigned long offset; /* offset PCI to phys. CPU Address */ - unsigned long dmaoffset; /* offset for DMA-transfers */ -} __attribute__ ((packed)); - -typedef struct /* structure of address conversion */ -{ - unsigned long adr; /* calculated address (CPU<->PCI) */ - unsigned long len; /* length of memory range */ -} PCI_CONV_ADR; - -/******************************************************************************/ -/* PCI-BIOS Error Codes */ -/******************************************************************************/ -#define PCI_SUCCESSFUL 0 /* everything's fine */ -#define PCI_FUNC_NOT_SUPPORTED -2 /* function not supported */ -#define PCI_BAD_VENDOR_ID -3 /* wrong Vendor ID */ -#define PCI_DEVICE_NOT_FOUND -4 /* PCI-Device not found */ -#define PCI_BAD_REGISTER_NUMBER -5 /* wrong register number */ -#define PCI_SET_FAILED -6 /* reserved for later use */ -#define PCI_BUFFER_TOO_SMALL -7 /* reserved for later use */ -#define PCI_GENERAL_ERROR -8 /* general BIOS error code */ -#define PCI_BAD_HANDLE -9 /* wrong/unknown PCI-handle */ - -/******************************************************************************/ -/* Flags used in Resource-Descriptor */ -/******************************************************************************/ -#define FLG_IO 0x4000 /* Ressource in IO range */ -#define FLG_ROM 0x2000 /* Expansion ROM */ -#define FLG_LAST 0x8000 /* last ressource */ -#define FLG_8BIT 0x0100 /* 8 bit accesses allowed */ -#define FLG_16BIT 0x0200 /* 16 bit accesses allowed */ -#define FLG_32BIT 0x0400 /* 32 bit accesses allowed */ -#define FLG_ENDMASK 0x000F /* mask for byte ordering */ - -/******************************************************************************/ -/* Values used in FLG_ENDMASK for Byte Ordering */ -/******************************************************************************/ -#define ORD_MOTOROLA 0 /* Motorola (big endian) */ -#define ORD_INTEL_AS 1 /* Intel (little endian), addr.swapped */ -#define ORD_INTEL_LS 2 /* Intel (little endian), lane swapped */ -#define ORD_UNKNOWN 15 /* unknown (BIOS-calls allowed only) */ - -/******************************************************************************/ -/* Status Info used in Device-Descriptor */ -/******************************************************************************/ -#define DEVICE_FREE 0 /* Device is not used */ -#define DEVICE_USED 1 /* Device is used by another driver */ -#define DEVICE_CALLBACK 2 /* used, but driver can be cancelled */ -#define DEVICE_AVAILABLE 3 /* used, not available */ -#define NO_DEVICE -1 /* no device detected */ - -/* PCI configuration space macros */ - -/* register 0x00 macros */ -#define PCI_VENDOR_ID(i) swpw((uint16_t)(((i) & 0xffff0000) >> 16)) -#define PCI_DEVICE_ID(i) swpw((uint16_t) ((i) & 0xffff)) - -/* register 0x04 macros */ -#define PCI_STATUS(i) ((i) & 0xffff) -#define PCI_COMMAND(i) (((i) >> 16) & 0xffff) - -/* register 0x08 macros */ -#define PCI_CLASS_CODE(i) ((swpl((i)) & 0xffff0000) >> 16) -#define PCI_SUBCLASS(i) ((swpl((i)) & 0xffffff00) >> 8) -#define PCI_PROG_IF(i) ((swpl((i)) & 0x0000ff00) >> 8) -#define PCI_REVISION_ID(i) ((swpl((i)) & 0x000000ff)) - -/* register 0x0c macros */ -#define PCI_BIST(i) ((swpl((i)) & 0xff000000) >> 24) -#define PCI_HEADER_TYPE(i) ((swpl((i)) & 0x00ff0000) >> 16) -#define PCI_LAT_TIMER(i) ((swpl((i)) & 0x0000ff00) >> 8) -#define PCI_CACHELINE_SIZE(i) ((swpl((i)) & 0x000000ff)) - -/* register 0x2c macros */ -#define PCI_SUBSYS_ID(i) (((i) & 0xffff0000) >> 16) -#define PCI_SUBSYS_VID(i) (((i) & 0xffff)) - -/* register 0x34 macros */ -#define PCI_CAPABILITIES(i) ((i) & 0xff) - -/* register 0x3c macros */ -#define PCI_MAX_LATENCY(i) (((i) & 0xff000000) >> 24) -#define PCI_MIN_GRANT(i) (((i) & 0xff0000) >> 16) -#define PCI_INTERRUPT_PIN(i) (((i) & 0xff00) >> 8) -#define PCI_INTERRUPT_LINE(i) (((i)) & 0xff) - -#define IS_PCI_MEM_BAR(i) ((i) & 1) == 0 -#define IS_PCI_IO_BAR(i) ((i) & 1) == 1 -#define PCI_MEMBAR_TYPE(i) (((i) & 0x6) >> 1) -#define PCI_IOBAR_ADR(i) (((i) & 0xfffffffc)) -#define PCI_MEMBAR_ADR(i) (((i) & 0xfffffff0)) - -extern void init_eport(void); -extern void init_xlbus_arbiter(void); -extern void init_pci(void); -extern int pci_handle2index(int32_t handle); - -extern int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index); -extern int32_t pci_find_classcode(uint32_t classcode, int index); - -extern int32_t pci_get_interrupt_cause(void); -extern int32_t pci_call_interrupt_chain(int32_t handle, int32_t data); - -/* - * match bits for pci_find_classcode() - */ -#define PCI_FIND_BASE_CLASS (1 << 26) -#define PCI_FIND_SUB_CLASS (1 << 25) -#define PCI_FIND_PROG_IF (1 << 24) - -extern uint32_t pci_read_config_longword(int32_t handle, int offset); -extern uint16_t pci_read_config_word(int32_t handle, int offset); -extern uint8_t pci_read_config_byte(int32_t handle, int offset); - -extern int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t value); -extern int32_t pci_write_config_word(int32_t handle, int offset, uint16_t value); -extern int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value); - -typedef int (*pci_interrupt_handler)(int param); - -extern int32_t pci_hook_interrupt(int32_t handle, void *handler, void *parameter); -extern int32_t pci_unhook_interrupt(int32_t handle); - -extern struct pci_rd *pci_get_resource(int32_t handle); - -/* - * Not implemented PCI_BIOS functions - */ -extern uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg); -extern uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg); -extern uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg); -extern int32_t pci_special_cycle(uint16_t bus, uint32_t data); -extern int32_t pci_get_routing(int32_t handle); -extern int32_t pci_set_interrupt(int32_t handle); -extern int32_t pci_get_card_used(int32_t handle, uint32_t *address); -extern int32_t pci_set_card_used(int32_t handle, uint32_t *callback); -extern int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address); -extern int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address); -extern int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address); -extern uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset); -extern uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset); -extern uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset); -extern int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val); -extern int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val); -extern int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val); -extern int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address); -extern int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address); -extern int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address); -extern uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset); -extern uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset); -extern uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset); -extern int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val); -extern int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val); -extern int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val); -extern int32_t pci_get_machine_id(void); -extern int32_t pci_get_pagesize(void); -extern int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); -extern int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); -extern int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer); -extern int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer); - -/* - * prototypes for PCI wrapper routines - */ -extern int32_t wrapper_find_pci_device(uint32_t id, uint16_t index); -extern int32_t wrapper_find_pci_classcode(uint32_t class, uint16_t index); -extern int32_t wrapper_read_config_byte(int32_t handle, uint16_t reg, uint8_t *address); -extern int32_t wrapper_read_config_word(int32_t handle, uint16_t reg, uint16_t *address); -extern int32_t wrapper_read_config_longword(int32_t handle, uint16_t reg, uint32_t *address); -extern uint8_t wrapper_fast_read_config_byte(int32_t handle, uint16_t reg); -extern uint16_t wrapper_fast_read_config_word(int32_t handle, uint16_t reg); -extern uint32_t wrapper_fast_read_config_longword(int32_t handle, uint16_t reg); -extern int32_t wrapper_write_config_byte(int32_t handle, uint16_t reg, uint16_t val); -extern int32_t wrapper_write_config_word(int32_t handle, uint16_t reg, uint16_t val); -extern int32_t wrapper_write_config_longword(int32_t handle, uint16_t reg, uint32_t val); -extern int32_t wrapper_hook_interrupt(int32_t handle, uint32_t *routine, uint32_t *parameter); -extern int32_t wrapper_unhook_interrupt(int32_t handle); -extern int32_t wrapper_special_cycle(uint16_t bus, uint32_t data); -extern int32_t wrapper_get_routing(int32_t handle); -extern int32_t wrapper_set_interrupt(int32_t handle); -extern int32_t wrapper_get_resource(int32_t handle); -extern int32_t wrapper_get_card_used(int32_t handle, uint32_t *address); -extern int32_t wrapper_set_card_used(int32_t handle, uint32_t *callback); -extern int32_t wrapper_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address); -extern int32_t wrapper_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address); -extern int32_t wrapper_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address); -extern uint8_t wrapper_fast_read_mem_byte(int32_t handle, uint32_t offset); -extern uint16_t wrapper_fast_read_mem_word(int32_t handle, uint32_t offset); -extern uint32_t wrapper_fast_read_mem_longword(int32_t handle, uint32_t offset); -extern int32_t wrapper_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val); -extern int32_t wrapper_write_mem_word(int32_t handle, uint32_t offset, uint16_t val); -extern int32_t wrapper_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val); -extern int32_t wrapper_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address); -extern int32_t wrapper_read_io_word(int32_t handle, uint32_t offset, uint16_t *address); -extern int32_t wrapper_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address); -extern uint8_t wrapper_fast_read_io_byte(int32_t handle, uint32_t offset); -extern uint16_t wrapper_fast_read_io_word(int32_t handle, uint32_t offset); -extern uint32_t wrapper_fast_read_io_longword(int32_t handle, uint32_t offset); -extern int32_t wrapper_write_io_byte(int32_t handle, uint32_t offset, uint16_t val); -extern int32_t wrapper_write_io_word(int32_t handle, uint32_t offset, uint16_t val); -extern int32_t wrapper_write_io_longword(int32_t handle, uint32_t offset, uint32_t val); -extern int32_t wrapper_get_machine_id(void); -extern int32_t wrapper_get_pagesize(void); -extern int32_t wrapper_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); -extern int32_t wrapper_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); -extern int32_t wrapper_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer); -extern int32_t wrapper_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer); - -#define PCI_MK_CONF_ADDR(bus, device, function) (MCF_PCI_PCICAR_E | \ - ((bus) << 16) | \ - ((device << 8) | \ - (function)) - -#define PCI_HANDLE(bus, slot, function) (0 | ((bus & 0xff) << 10 | (slot & 0x1f) << 3 | (function & 7))) -#define PCI_BUS_FROM_HANDLE(h) (((h) & 0xff00) >> 10) -#define PCI_DEVICE_FROM_HANDLE(h) (((h) & 0xf8) >> 3) -#define PCI_FUNCTION_FROM_HANDLE(h) (((h) & 0x7)) - -#endif /* _PCI_H_ */ diff --git a/include/pci_ids.h b/include/pci_ids.h deleted file mode 100644 index 843d5ab..0000000 --- a/include/pci_ids.h +++ /dev/null @@ -1,2626 +0,0 @@ -/* - * PCI Class, Vendor and Device IDs - * - * Please keep sorted. - */ - -/* Device classes and subclasses */ - -#define PCI_CLASS_NOT_DEFINED 0x0000 -#define PCI_CLASS_NOT_DEFINED_VGA 0x0001 - -#define PCI_BASE_CLASS_STORAGE 0x01 -#define PCI_CLASS_STORAGE_SCSI 0x0100 -#define PCI_CLASS_STORAGE_IDE 0x0101 -#define PCI_CLASS_STORAGE_FLOPPY 0x0102 -#define PCI_CLASS_STORAGE_IPI 0x0103 -#define PCI_CLASS_STORAGE_RAID 0x0104 -#define PCI_CLASS_STORAGE_OTHER 0x0180 - -#define PCI_BASE_CLASS_NETWORK 0x02 -#define PCI_CLASS_NETWORK_ETHERNET 0x0200 -#define PCI_CLASS_NETWORK_TOKEN_RING 0x0201 -#define PCI_CLASS_NETWORK_FDDI 0x0202 -#define PCI_CLASS_NETWORK_ATM 0x0203 -#define PCI_CLASS_NETWORK_OTHER 0x0280 - -#define PCI_BASE_CLASS_DISPLAY 0x03 -#define PCI_CLASS_DISPLAY_VGA 0x0300 -#define PCI_CLASS_DISPLAY_XGA 0x0301 -#define PCI_CLASS_DISPLAY_3D 0x0302 -#define PCI_CLASS_DISPLAY_OTHER 0x0380 - -#define PCI_BASE_CLASS_MULTIMEDIA 0x04 -#define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400 -#define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401 -#define PCI_CLASS_MULTIMEDIA_PHONE 0x0402 -#define PCI_CLASS_MULTIMEDIA_OTHER 0x0480 - -#define PCI_BASE_CLASS_MEMORY 0x05 -#define PCI_CLASS_MEMORY_RAM 0x0500 -#define PCI_CLASS_MEMORY_FLASH 0x0501 -#define PCI_CLASS_MEMORY_OTHER 0x0580 - -#define PCI_BASE_CLASS_BRIDGE 0x06 -#define PCI_CLASS_BRIDGE_HOST 0x0600 -#define PCI_CLASS_BRIDGE_ISA 0x0601 -#define PCI_CLASS_BRIDGE_EISA 0x0602 -#define PCI_CLASS_BRIDGE_MC 0x0603 -#define PCI_CLASS_BRIDGE_PCI 0x0604 -#define PCI_CLASS_BRIDGE_PCMCIA 0x0605 -#define PCI_CLASS_BRIDGE_NUBUS 0x0606 -#define PCI_CLASS_BRIDGE_CARDBUS 0x0607 -#define PCI_CLASS_BRIDGE_RACEWAY 0x0608 -#define PCI_CLASS_BRIDGE_OTHER 0x0680 - -#define PCI_BASE_CLASS_COMMUNICATION 0x07 -#define PCI_CLASS_COMMUNICATION_SERIAL 0x0700 -#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701 -#define PCI_CLASS_COMMUNICATION_MULTISERIAL 0x0702 -#define PCI_CLASS_COMMUNICATION_MODEM 0x0703 -#define PCI_CLASS_COMMUNICATION_OTHER 0x0780 - -#define PCI_BASE_CLASS_SYSTEM 0x08 -#define PCI_CLASS_SYSTEM_PIC 0x0800 -#define PCI_CLASS_SYSTEM_DMA 0x0801 -#define PCI_CLASS_SYSTEM_TIMER 0x0802 -#define PCI_CLASS_SYSTEM_RTC 0x0803 -#define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 -#define PCI_CLASS_SYSTEM_OTHER 0x0880 - -#define PCI_BASE_CLASS_INPUT 0x09 -#define PCI_CLASS_INPUT_KEYBOARD 0x0900 -#define PCI_CLASS_INPUT_PEN 0x0901 -#define PCI_CLASS_INPUT_MOUSE 0x0902 -#define PCI_CLASS_INPUT_SCANNER 0x0903 -#define PCI_CLASS_INPUT_GAMEPORT 0x0904 -#define PCI_CLASS_INPUT_OTHER 0x0980 - -#define PCI_BASE_CLASS_DOCKING 0x0a -#define PCI_CLASS_DOCKING_GENERIC 0x0a00 -#define PCI_CLASS_DOCKING_OTHER 0x0a80 - -#define PCI_BASE_CLASS_PROCESSOR 0x0b -#define PCI_CLASS_PROCESSOR_386 0x0b00 -#define PCI_CLASS_PROCESSOR_486 0x0b01 -#define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02 -#define PCI_CLASS_PROCESSOR_ALPHA 0x0b10 -#define PCI_CLASS_PROCESSOR_POWERPC 0x0b20 -#define PCI_CLASS_PROCESSOR_MIPS 0x0b30 -#define PCI_CLASS_PROCESSOR_CO 0x0b40 - -#define PCI_BASE_CLASS_SERIAL 0x0c -#define PCI_CLASS_SERIAL_FIREWIRE 0x0c00 -#define PCI_CLASS_SERIAL_ACCESS 0x0c01 -#define PCI_CLASS_SERIAL_SSA 0x0c02 -#define PCI_CLASS_SERIAL_USB 0x0c03 -/* added code to find different types of USB controllers */ -#define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300 -#define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310 -#define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320 -#define PCI_CLASS_SERIAL_FIBER 0x0c04 -#define PCI_CLASS_SERIAL_SMBUS 0x0c05 - -#define PCI_BASE_CLASS_INTELLIGENT 0x0e -#define PCI_CLASS_INTELLIGENT_I2O 0x0e00 - -#define PCI_BASE_CLASS_SATELLITE 0x0f -#define PCI_CLASS_SATELLITE_TV 0x0f00 -#define PCI_CLASS_SATELLITE_AUDIO 0x0f01 -#define PCI_CLASS_SATELLITE_VOICE 0x0f03 -#define PCI_CLASS_SATELLITE_DATA 0x0f04 - -#define PCI_BASE_CLASS_CRYPT 0x10 -#define PCI_CLASS_CRYPT_NETWORK 0x1000 -#define PCI_CLASS_CRYPT_ENTERTAINMENT 0x1001 -#define PCI_CLASS_CRYPT_OTHER 0x1080 - -#define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11 -#define PCI_CLASS_SP_DPIO 0x1100 -#define PCI_CLASS_SP_OTHER 0x1180 - -#define PCI_CLASS_OTHERS 0xff - -/* Vendors and devices. Sort key: vendor first, device next. */ - -#define PCI_VENDOR_ID_DYNALINK 0x0675 -#define PCI_DEVICE_ID_DYNALINK_IS64PH 0x1702 - -#define PCI_VENDOR_ID_BERKOM 0x0871 -#define PCI_DEVICE_ID_BERKOM_A1T 0xffa1 -#define PCI_DEVICE_ID_BERKOM_T_CONCEPT 0xffa2 -#define PCI_DEVICE_ID_BERKOM_A4T 0xffa4 -#define PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO 0xffa8 - -#define PCI_VENDOR_ID_COMPAQ 0x0e11 -#define PCI_DEVICE_ID_COMPAQ_TOKENRING 0x0508 -#define PCI_DEVICE_ID_COMPAQ_1280 0x3033 -#define PCI_DEVICE_ID_COMPAQ_TRIFLEX 0x4000 -#define PCI_DEVICE_ID_COMPAQ_6010 0x6010 -#define PCI_DEVICE_ID_COMPAQ_TACHYON 0xa0fc -#define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10 -#define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32 -#define PCI_DEVICE_ID_COMPAQ_NETEL10 0xae34 -#define PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE 0xae33 -#define PCI_DEVICE_ID_COMPAQ_NETFLEX3I 0xae35 -#define PCI_DEVICE_ID_COMPAQ_NETEL100D 0xae40 -#define PCI_DEVICE_ID_COMPAQ_NETEL100PI 0xae43 -#define PCI_DEVICE_ID_COMPAQ_NETEL100I 0xb011 -#define PCI_DEVICE_ID_COMPAQ_CISS 0xb060 -#define PCI_DEVICE_ID_COMPAQ_CISSB 0xb178 -#define PCI_DEVICE_ID_COMPAQ_CISSC 0x46 -#define PCI_DEVICE_ID_COMPAQ_THUNDER 0xf130 -#define PCI_DEVICE_ID_COMPAQ_NETFLEX3B 0xf150 - -#define PCI_VENDOR_ID_NCR 0x1000 -#define PCI_VENDOR_ID_LSI_LOGIC 0x1000 -#define PCI_DEVICE_ID_NCR_53C810 0x0001 -#define PCI_DEVICE_ID_NCR_53C820 0x0002 -#define PCI_DEVICE_ID_NCR_53C825 0x0003 -#define PCI_DEVICE_ID_NCR_53C815 0x0004 -#define PCI_DEVICE_ID_LSI_53C810AP 0x0005 -#define PCI_DEVICE_ID_NCR_53C860 0x0006 -#define PCI_DEVICE_ID_LSI_53C1510 0x000a -#define PCI_DEVICE_ID_NCR_53C896 0x000b -#define PCI_DEVICE_ID_NCR_53C895 0x000c -#define PCI_DEVICE_ID_NCR_53C885 0x000d -#define PCI_DEVICE_ID_NCR_53C875 0x000f -#define PCI_DEVICE_ID_NCR_53C1510 0x0010 -#define PCI_DEVICE_ID_LSI_53C895A 0x0012 -#define PCI_DEVICE_ID_LSI_53C875A 0x0013 -#define PCI_DEVICE_ID_LSI_53C1010_33 0x0020 -#define PCI_DEVICE_ID_LSI_53C1010_66 0x0021 -#define PCI_DEVICE_ID_LSI_53C1030 0x0030 -#define PCI_DEVICE_ID_LSI_1030_53C1035 0x0032 -#define PCI_DEVICE_ID_LSI_53C1035 0x0040 -#define PCI_DEVICE_ID_NCR_53C875J 0x008f -#define PCI_DEVICE_ID_LSI_FC909 0x0621 -#define PCI_DEVICE_ID_LSI_FC929 0x0622 -#define PCI_DEVICE_ID_LSI_FC929_LAN 0x0623 -#define PCI_DEVICE_ID_LSI_FC919 0x0624 -#define PCI_DEVICE_ID_LSI_FC919_LAN 0x0625 -#define PCI_DEVICE_ID_LSI_FC929X 0x0626 -#define PCI_DEVICE_ID_LSI_FC939X 0x0642 -#define PCI_DEVICE_ID_LSI_FC949X 0x0640 -#define PCI_DEVICE_ID_LSI_FC919X 0x0628 -#define PCI_DEVICE_ID_NCR_YELLOWFIN 0x0701 -#define PCI_DEVICE_ID_LSI_61C102 0x0901 -#define PCI_DEVICE_ID_LSI_63C815 0x1000 -#define PCI_DEVICE_ID_LSI_SAS1064 0x0050 -#define PCI_DEVICE_ID_LSI_SAS1066 0x005E -#define PCI_DEVICE_ID_LSI_SAS1068 0x0054 -#define PCI_DEVICE_ID_LSI_SAS1064A 0x005C -#define PCI_DEVICE_ID_LSI_SAS1064E 0x0056 -#define PCI_DEVICE_ID_LSI_SAS1066E 0x005A -#define PCI_DEVICE_ID_LSI_SAS1068E 0x0058 -#define PCI_DEVICE_ID_LSI_SAS1078 0x0060 - -#define PCI_VENDOR_ID_ATI 0x1002 -/* Mach64 */ -#define PCI_DEVICE_ID_ATI_68800 0x4158 -#define PCI_DEVICE_ID_ATI_215CT222 0x4354 -#define PCI_DEVICE_ID_ATI_210888CX 0x4358 -#define PCI_DEVICE_ID_ATI_215ET222 0x4554 -/* Mach64 / Rage */ -#define PCI_DEVICE_ID_ATI_215GB 0x4742 -#define PCI_DEVICE_ID_ATI_215GD 0x4744 -#define PCI_DEVICE_ID_ATI_215GI 0x4749 -#define PCI_DEVICE_ID_ATI_215GP 0x4750 -#define PCI_DEVICE_ID_ATI_215GQ 0x4751 -#define PCI_DEVICE_ID_ATI_215XL 0x4752 -#define PCI_DEVICE_ID_ATI_215GT 0x4754 -#define PCI_DEVICE_ID_ATI_215GTB 0x4755 -#define PCI_DEVICE_ID_ATI_215_IV 0x4756 -#define PCI_DEVICE_ID_ATI_215_IW 0x4757 -#define PCI_DEVICE_ID_ATI_215_IZ 0x475A -#define PCI_DEVICE_ID_ATI_210888GX 0x4758 -#define PCI_DEVICE_ID_ATI_215_LB 0x4c42 -#define PCI_DEVICE_ID_ATI_215_LD 0x4c44 -#define PCI_DEVICE_ID_ATI_215_LG 0x4c47 -#define PCI_DEVICE_ID_ATI_215_LI 0x4c49 -#define PCI_DEVICE_ID_ATI_215_LM 0x4c4D -#define PCI_DEVICE_ID_ATI_215_LN 0x4c4E -#define PCI_DEVICE_ID_ATI_215_LR 0x4c52 -#define PCI_DEVICE_ID_ATI_215_LS 0x4c53 -#define PCI_DEVICE_ID_ATI_264_LT 0x4c54 -/* Mach64 VT */ -#define PCI_DEVICE_ID_ATI_264VT 0x5654 -#define PCI_DEVICE_ID_ATI_264VU 0x5655 -#define PCI_DEVICE_ID_ATI_264VV 0x5656 -/* Rage128 GL */ -#define PCI_DEVICE_ID_ATI_RAGE128_RE 0x5245 -#define PCI_DEVICE_ID_ATI_RAGE128_RF 0x5246 -#define PCI_DEVICE_ID_ATI_RAGE128_RG 0x5247 -/* Rage128 VR */ -#define PCI_DEVICE_ID_ATI_RAGE128_RK 0x524b -#define PCI_DEVICE_ID_ATI_RAGE128_RL 0x524c -#define PCI_DEVICE_ID_ATI_RAGE128_SE 0x5345 -#define PCI_DEVICE_ID_ATI_RAGE128_SF 0x5346 -#define PCI_DEVICE_ID_ATI_RAGE128_SG 0x5347 -#define PCI_DEVICE_ID_ATI_RAGE128_SH 0x5348 -#define PCI_DEVICE_ID_ATI_RAGE128_SK 0x534b -#define PCI_DEVICE_ID_ATI_RAGE128_SL 0x534c -#define PCI_DEVICE_ID_ATI_RAGE128_SM 0x534d -#define PCI_DEVICE_ID_ATI_RAGE128_SN 0x534e -/* Rage128 Ultra */ -#define PCI_DEVICE_ID_ATI_RAGE128_TF 0x5446 -#define PCI_DEVICE_ID_ATI_RAGE128_TL 0x544c -#define PCI_DEVICE_ID_ATI_RAGE128_TR 0x5452 -#define PCI_DEVICE_ID_ATI_RAGE128_TS 0x5453 -#define PCI_DEVICE_ID_ATI_RAGE128_TT 0x5454 -#define PCI_DEVICE_ID_ATI_RAGE128_TU 0x5455 -/* Rage128 M3 */ -#define PCI_DEVICE_ID_ATI_RAGE128_LE 0x4c45 -#define PCI_DEVICE_ID_ATI_RAGE128_LF 0x4c46 -/* Rage128 M4 */ -#define PCI_DEVICE_ID_ATI_RAGE128_MF 0x4d46 -#define PCI_DEVICE_ID_ATI_RAGE128_ML 0x4d4c -/* Rage128 Pro GL */ -#define PCI_DEVICE_ID_ATI_RAGE128_PA 0x5041 -#define PCI_DEVICE_ID_ATI_RAGE128_PB 0x5042 -#define PCI_DEVICE_ID_ATI_RAGE128_PC 0x5043 -#define PCI_DEVICE_ID_ATI_RAGE128_PD 0x5044 -#define PCI_DEVICE_ID_ATI_RAGE128_PE 0x5045 -#define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046 -/* Rage128 Pro VR */ -#define PCI_DEVICE_ID_ATI_RAGE128_PG 0x5047 -#define PCI_DEVICE_ID_ATI_RAGE128_PH 0x5048 -#define PCI_DEVICE_ID_ATI_RAGE128_PI 0x5049 -#define PCI_DEVICE_ID_ATI_RAGE128_PJ 0x504A -#define PCI_DEVICE_ID_ATI_RAGE128_PK 0x504B -#define PCI_DEVICE_ID_ATI_RAGE128_PL 0x504C -#define PCI_DEVICE_ID_ATI_RAGE128_PM 0x504D -#define PCI_DEVICE_ID_ATI_RAGE128_PN 0x504E -#define PCI_DEVICE_ID_ATI_RAGE128_PO 0x504F -#define PCI_DEVICE_ID_ATI_RAGE128_PP 0x5050 -#define PCI_DEVICE_ID_ATI_RAGE128_PQ 0x5051 -#define PCI_DEVICE_ID_ATI_RAGE128_PR 0x5052 -#define PCI_DEVICE_ID_ATI_RAGE128_TR 0x5452 -#define PCI_DEVICE_ID_ATI_RAGE128_PS 0x5053 -#define PCI_DEVICE_ID_ATI_RAGE128_PT 0x5054 -#define PCI_DEVICE_ID_ATI_RAGE128_PU 0x5055 -#define PCI_DEVICE_ID_ATI_RAGE128_PV 0x5056 -#define PCI_DEVICE_ID_ATI_RAGE128_PW 0x5057 -#define PCI_DEVICE_ID_ATI_RAGE128_PX 0x5058 -/* Rage128 M4 */ -#define PCI_DEVICE_ID_ATI_RADEON_LE 0x4d45 -#define PCI_DEVICE_ID_ATI_RADEON_LF 0x4d46 -/* Radeon R100 */ -#define PCI_DEVICE_ID_ATI_RADEON_QD 0x5144 -#define PCI_DEVICE_ID_ATI_RADEON_QE 0x5145 -#define PCI_DEVICE_ID_ATI_RADEON_QF 0x5146 -#define PCI_DEVICE_ID_ATI_RADEON_QG 0x5147 -/* Radeon RV100 (VE) */ -#define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159 -#define PCI_DEVICE_ID_ATI_RADEON_QZ 0x515a -/* Radeon R200 (8500) */ -#define PCI_DEVICE_ID_ATI_RADEON_QL 0x514c -#define PCI_DEVICE_ID_ATI_RADEON_QN 0x514e -#define PCI_DEVICE_ID_ATI_RADEON_QO 0x514f -#define PCI_DEVICE_ID_ATI_RADEON_Ql 0x516c -#define PCI_DEVICE_ID_ATI_RADEON_BB 0x4242 -/* Radeon R200 (9100) */ -#define PCI_DEVICE_ID_ATI_RADEON_QM 0x514d -/* Radeon RV200 (7500) */ -#define PCI_DEVICE_ID_ATI_RADEON_QW 0x5157 -#define PCI_DEVICE_ID_ATI_RADEON_QX 0x5158 -/* Radeon NV-100 */ -#define PCI_DEVICE_ID_ATI_RADEON_N1 0x5159 -#define PCI_DEVICE_ID_ATI_RADEON_N2 0x515a -/* Radeon RV250 (9000) */ -#define PCI_DEVICE_ID_ATI_RADEON_Id 0x4964 -#define PCI_DEVICE_ID_ATI_RADEON_Ie 0x4965 -#define PCI_DEVICE_ID_ATI_RADEON_If 0x4966 -#define PCI_DEVICE_ID_ATI_RADEON_Ig 0x4967 -/* Radeon RV280 (9200) */ -#define PCI_DEVICE_ID_ATI_RADEON_Y_ 0x5960 -#define PCI_DEVICE_ID_ATI_RADEON_Ya 0x5961 -#define PCI_DEVICE_ID_ATI_RADEON_Yd 0x5964 -/* Radeon R300 (9500) */ -#define PCI_DEVICE_ID_ATI_RADEON_AD 0x4144 -/* Radeon R300 (9700) */ -#define PCI_DEVICE_ID_ATI_RADEON_ND 0x4e44 -#define PCI_DEVICE_ID_ATI_RADEON_NE 0x4e45 -#define PCI_DEVICE_ID_ATI_RADEON_NF 0x4e46 -#define PCI_DEVICE_ID_ATI_RADEON_NG 0x4e47 -#define PCI_DEVICE_ID_ATI_RADEON_AE 0x4145 -#define PCI_DEVICE_ID_ATI_RADEON_AF 0x4146 -/* Radeon R350 (9800) */ -#define PCI_DEVICE_ID_ATI_RADEON_NH 0x4e48 -#define PCI_DEVICE_ID_ATI_RADEON_NI 0x4e49 -/* Radeon RV350 (9600) */ -#define PCI_DEVICE_ID_ATI_RADEON_AP 0x4150 -#define PCI_DEVICE_ID_ATI_RADEON_AR 0x4152 -/* Radeon M6 */ -#define PCI_DEVICE_ID_ATI_RADEON_LY 0x4c59 -#define PCI_DEVICE_ID_ATI_RADEON_LZ 0x4c5a -/* Radeon M7 */ -#define PCI_DEVICE_ID_ATI_RADEON_LW 0x4c57 -#define PCI_DEVICE_ID_ATI_RADEON_LX 0x4c58 -/* Radeon M9 */ -#define PCI_DEVICE_ID_ATI_RADEON_Ld 0x4c64 -#define PCI_DEVICE_ID_ATI_RADEON_Le 0x4c65 -#define PCI_DEVICE_ID_ATI_RADEON_Lf 0x4c66 -#define PCI_DEVICE_ID_ATI_RADEON_Lg 0x4c67 -/* Radeon */ -#define PCI_DEVICE_ID_ATI_RADEON_RA 0x5144 -#define PCI_DEVICE_ID_ATI_RADEON_RB 0x5145 -#define PCI_DEVICE_ID_ATI_RADEON_RC 0x5146 -#define PCI_DEVICE_ID_ATI_RADEON_RD 0x5147 -/* RadeonIGP */ -#define PCI_DEVICE_ID_ATI_RS100 0xcab0 -#define PCI_DEVICE_ID_ATI_RS200 0xcab2 -#define PCI_DEVICE_ID_ATI_RS200_B 0xcbb2 -#define PCI_DEVICE_ID_ATI_RS250 0xcab3 -#define PCI_DEVICE_ID_ATI_RS300_100 0x5830 -#define PCI_DEVICE_ID_ATI_RS300_133 0x5831 -#define PCI_DEVICE_ID_ATI_RS300_166 0x5832 -#define PCI_DEVICE_ID_ATI_RS300_200 0x5833 -#define PCI_DEVICE_ID_ATI_RS350_100 0x7830 -#define PCI_DEVICE_ID_ATI_RS350_133 0x7831 -#define PCI_DEVICE_ID_ATI_RS350_166 0x7832 -#define PCI_DEVICE_ID_ATI_RS350_200 0x7833 -#define PCI_DEVICE_ID_ATI_RS400_100 0x5a30 -#define PCI_DEVICE_ID_ATI_RS400_133 0x5a31 -#define PCI_DEVICE_ID_ATI_RS400_166 0x5a32 -#define PCI_DEVICE_ID_ATI_RS400_200 0x5a33 -#define PCI_DEVICE_ID_ATI_RS480 0x5950 -/* ATI IXP Chipset */ -#define PCI_DEVICE_ID_ATI_IXP200_IDE 0x4349 -#define PCI_DEVICE_ID_ATI_IXP300_IDE 0x4369 -#define PCI_DEVICE_ID_ATI_IXP300_SATA 0x436e -#define PCI_DEVICE_ID_ATI_IXP400_IDE 0x4376 -#define PCI_DEVICE_ID_ATI_IXP400_SATA 0x4379 - -#define PCI_VENDOR_ID_VLSI 0x1004 -#define PCI_DEVICE_ID_VLSI_82C592 0x0005 -#define PCI_DEVICE_ID_VLSI_82C593 0x0006 -#define PCI_DEVICE_ID_VLSI_82C594 0x0007 -#define PCI_DEVICE_ID_VLSI_82C597 0x0009 -#define PCI_DEVICE_ID_VLSI_82C541 0x000c -#define PCI_DEVICE_ID_VLSI_82C543 0x000d -#define PCI_DEVICE_ID_VLSI_82C532 0x0101 -#define PCI_DEVICE_ID_VLSI_82C534 0x0102 -#define PCI_DEVICE_ID_VLSI_82C535 0x0104 -#define PCI_DEVICE_ID_VLSI_82C147 0x0105 -#define PCI_DEVICE_ID_VLSI_VAS96011 0x0702 - -#define PCI_VENDOR_ID_ADL 0x1005 -#define PCI_DEVICE_ID_ADL_2301 0x2301 - -#define PCI_VENDOR_ID_NS 0x100b -#define PCI_DEVICE_ID_NS_87415 0x0002 -#define PCI_DEVICE_ID_NS_87560_LIO 0x000e -#define PCI_DEVICE_ID_NS_87560_USB 0x0012 -#define PCI_DEVICE_ID_NS_83815 0x0020 -#define PCI_DEVICE_ID_NS_83820 0x0022 -#define PCI_DEVICE_ID_NS_SCx200_BRIDGE 0x0500 -#define PCI_DEVICE_ID_NS_SCx200_SMI 0x0501 -#define PCI_DEVICE_ID_NS_SCx200_IDE 0x0502 -#define PCI_DEVICE_ID_NS_SCx200_AUDIO 0x0503 -#define PCI_DEVICE_ID_NS_SCx200_VIDEO 0x0504 -#define PCI_DEVICE_ID_NS_SCx200_XBUS 0x0505 -#define PCI_DEVICE_ID_NS_SC1100_BRIDGE 0x0510 -#define PCI_DEVICE_ID_NS_SC1100_SMI 0x0511 -#define PCI_DEVICE_ID_NS_SC1100_XBUS 0x0515 -#define PCI_DEVICE_ID_NS_87410 0xd001 - -#define PCI_VENDOR_ID_TSENG 0x100c -#define PCI_DEVICE_ID_TSENG_W32P_2 0x3202 -#define PCI_DEVICE_ID_TSENG_W32P_b 0x3205 -#define PCI_DEVICE_ID_TSENG_W32P_c 0x3206 -#define PCI_DEVICE_ID_TSENG_W32P_d 0x3207 -#define PCI_DEVICE_ID_TSENG_ET6000 0x3208 - -#define PCI_VENDOR_ID_WEITEK 0x100e -#define PCI_DEVICE_ID_WEITEK_P9000 0x9001 -#define PCI_DEVICE_ID_WEITEK_P9100 0x9100 - -#define PCI_VENDOR_ID_DEC 0x1011 -#define PCI_DEVICE_ID_DEC_BRD 0x0001 -#define PCI_DEVICE_ID_DEC_TULIP 0x0002 -#define PCI_DEVICE_ID_DEC_TGA 0x0004 -#define PCI_DEVICE_ID_DEC_TULIP_FAST 0x0009 -#define PCI_DEVICE_ID_DEC_TGA2 0x000D -#define PCI_DEVICE_ID_DEC_FDDI 0x000F -#define PCI_DEVICE_ID_DEC_TULIP_PLUS 0x0014 -#define PCI_DEVICE_ID_DEC_21142 0x0019 -#define PCI_DEVICE_ID_DEC_21052 0x0021 -#define PCI_DEVICE_ID_DEC_21150 0x0022 -#define PCI_DEVICE_ID_DEC_21152 0x0024 -#define PCI_DEVICE_ID_DEC_21153 0x0025 -#define PCI_DEVICE_ID_DEC_21154 0x0026 -#define PCI_DEVICE_ID_DEC_21285 0x1065 -#define PCI_DEVICE_ID_COMPAQ_42XX 0x0046 - -#define PCI_VENDOR_ID_CIRRUS 0x1013 -#define PCI_DEVICE_ID_CIRRUS_7548 0x0038 -#define PCI_DEVICE_ID_CIRRUS_5430 0x00a0 -#define PCI_DEVICE_ID_CIRRUS_5434_4 0x00a4 -#define PCI_DEVICE_ID_CIRRUS_5434_8 0x00a8 -#define PCI_DEVICE_ID_CIRRUS_5436 0x00ac -#define PCI_DEVICE_ID_CIRRUS_5446 0x00b8 -#define PCI_DEVICE_ID_CIRRUS_5480 0x00bc -#define PCI_DEVICE_ID_CIRRUS_5462 0x00d0 -#define PCI_DEVICE_ID_CIRRUS_5464 0x00d4 -#define PCI_DEVICE_ID_CIRRUS_5465 0x00d6 -#define PCI_DEVICE_ID_CIRRUS_6729 0x1100 -#define PCI_DEVICE_ID_CIRRUS_6832 0x1110 -#define PCI_DEVICE_ID_CIRRUS_7542 0x1200 -#define PCI_DEVICE_ID_CIRRUS_7543 0x1202 -#define PCI_DEVICE_ID_CIRRUS_7541 0x1204 - -#define PCI_VENDOR_ID_IBM 0x1014 -#define PCI_DEVICE_ID_IBM_FIRE_CORAL 0x000a -#define PCI_DEVICE_ID_IBM_TR 0x0018 -#define PCI_DEVICE_ID_IBM_82G2675 0x001d -#define PCI_DEVICE_ID_IBM_MCA 0x0020 -#define PCI_DEVICE_ID_IBM_82351 0x0022 -#define PCI_DEVICE_ID_IBM_PYTHON 0x002d -#define PCI_DEVICE_ID_IBM_SERVERAID 0x002e -#define PCI_DEVICE_ID_IBM_TR_WAKE 0x003e -#define PCI_DEVICE_ID_IBM_MPIC 0x0046 -#define PCI_DEVICE_ID_IBM_3780IDSP 0x007d -#define PCI_DEVICE_ID_IBM_CHUKAR 0x0096 -#define PCI_DEVICE_ID_IBM_CPC710_PCI64 0x00fc -#define PCI_DEVICE_ID_IBM_CPC710_PCI32 0x0105 -#define PCI_DEVICE_ID_IBM_405GP 0x0156 -#define PCI_DEVICE_ID_IBM_SNIPE 0x0180 -#define PCI_DEVICE_ID_IBM_SERVERAIDI960 0x01bd -#define PCI_DEVICE_ID_IBM_CITRINE 0x028C -#define PCI_DEVICE_ID_IBM_GEMSTONE 0xB166 -#define PCI_DEVICE_ID_IBM_MPIC_2 0xffff -#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1 0x0031 -#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2 0x0219 -#define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX 0x021A -#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM 0x0251 -#define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL 0x252 - -#define PCI_VENDOR_ID_COMPEX2 0x101a // pci.ids says "AT&T GIS (NCR)" -#define PCI_DEVICE_ID_COMPEX2_100VG 0x0005 - -#define PCI_VENDOR_ID_WD 0x101c -#define PCI_DEVICE_ID_WD_7197 0x3296 -#define PCI_DEVICE_ID_WD_90C 0xc24a - -#define PCI_VENDOR_ID_AMI 0x101e -#define PCI_DEVICE_ID_AMI_MEGARAID3 0x1960 -#define PCI_DEVICE_ID_AMI_MEGARAID 0x9010 -#define PCI_DEVICE_ID_AMI_MEGARAID2 0x9060 - -#define PCI_VENDOR_ID_AMD 0x1022 -#define PCI_DEVICE_ID_AMD_LANCE 0x2000 -#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001 -#define PCI_DEVICE_ID_AMD_SCSI 0x2020 -#define PCI_DEVICE_ID_AMD_SERENADE 0x36c0 -#define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006 -#define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007 -#define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C -#define PCI_DEVICE_ID_AMD_FE_GATE_700D 0x700D -#define PCI_DEVICE_ID_AMD_FE_GATE_700E 0x700E -#define PCI_DEVICE_ID_AMD_FE_GATE_700F 0x700F -#define PCI_DEVICE_ID_AMD_COBRA_7400 0x7400 -#define PCI_DEVICE_ID_AMD_COBRA_7401 0x7401 -#define PCI_DEVICE_ID_AMD_COBRA_7403 0x7403 -#define PCI_DEVICE_ID_AMD_COBRA_7404 0x7404 -#define PCI_DEVICE_ID_AMD_VIPER_7408 0x7408 -#define PCI_DEVICE_ID_AMD_VIPER_7409 0x7409 -#define PCI_DEVICE_ID_AMD_VIPER_740B 0x740B -#define PCI_DEVICE_ID_AMD_VIPER_740C 0x740C -#define PCI_DEVICE_ID_AMD_VIPER_7410 0x7410 -#define PCI_DEVICE_ID_AMD_VIPER_7411 0x7411 -#define PCI_DEVICE_ID_AMD_VIPER_7413 0x7413 -#define PCI_DEVICE_ID_AMD_VIPER_7414 0x7414 -#define PCI_DEVICE_ID_AMD_OPUS_7440 0x7440 -# define PCI_DEVICE_ID_AMD_VIPER_7440 PCI_DEVICE_ID_AMD_OPUS_7440 -#define PCI_DEVICE_ID_AMD_OPUS_7441 0x7441 -# define PCI_DEVICE_ID_AMD_VIPER_7441 PCI_DEVICE_ID_AMD_OPUS_7441 -#define PCI_DEVICE_ID_AMD_OPUS_7443 0x7443 -# define PCI_DEVICE_ID_AMD_VIPER_7443 PCI_DEVICE_ID_AMD_OPUS_7443 -#define PCI_DEVICE_ID_AMD_OPUS_7445 0x7445 -#define PCI_DEVICE_ID_AMD_OPUS_7448 0x7448 -# define PCI_DEVICE_ID_AMD_VIPER_7448 PCI_DEVICE_ID_AMD_OPUS_7448 -#define PCI_DEVICE_ID_AMD_OPUS_7449 0x7449 -# define PCI_DEVICE_ID_AMD_VIPER_7449 PCI_DEVICE_ID_AMD_OPUS_7449 -#define PCI_DEVICE_ID_AMD_8111_LAN 0x7462 -#define PCI_DEVICE_ID_AMD_8111_LPC 0x7468 -#define PCI_DEVICE_ID_AMD_8111_IDE 0x7469 -#define PCI_DEVICE_ID_AMD_8111_SMBUS2 0x746a -#define PCI_DEVICE_ID_AMD_8111_SMBUS 0x746b -#define PCI_DEVICE_ID_AMD_8111_AUDIO 0x746d -#define PCI_DEVICE_ID_AMD_8151_0 0x7454 -#define PCI_DEVICE_ID_AMD_8131_APIC 0x7450 - -#define PCI_VENDOR_ID_TRIDENT 0x1023 -#define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX 0x2000 -#define PCI_DEVICE_ID_TRIDENT_4DWAVE_NX 0x2001 -#define PCI_DEVICE_ID_TRIDENT_9320 0x9320 -#define PCI_DEVICE_ID_TRIDENT_9388 0x9388 -#define PCI_DEVICE_ID_TRIDENT_9397 0x9397 -#define PCI_DEVICE_ID_TRIDENT_939A 0x939A -#define PCI_DEVICE_ID_TRIDENT_9520 0x9520 -#define PCI_DEVICE_ID_TRIDENT_9525 0x9525 -#define PCI_DEVICE_ID_TRIDENT_9420 0x9420 -#define PCI_DEVICE_ID_TRIDENT_9440 0x9440 -#define PCI_DEVICE_ID_TRIDENT_9660 0x9660 -#define PCI_DEVICE_ID_TRIDENT_9750 0x9750 -#define PCI_DEVICE_ID_TRIDENT_9850 0x9850 -#define PCI_DEVICE_ID_TRIDENT_9880 0x9880 -#define PCI_DEVICE_ID_TRIDENT_8400 0x8400 -#define PCI_DEVICE_ID_TRIDENT_8420 0x8420 -#define PCI_DEVICE_ID_TRIDENT_8500 0x8500 - -#define PCI_VENDOR_ID_AI 0x1025 -#define PCI_DEVICE_ID_AI_M1435 0x1435 - -#define PCI_VENDOR_ID_DELL 0x1028 -#define PCI_DEVICE_ID_DELL_RACIII 0x0008 -#define PCI_DEVICE_ID_DELL_RAC4 0x0012 - -#define PCI_VENDOR_ID_MATROX 0x102B -#define PCI_DEVICE_ID_MATROX_MGA_2 0x0518 -#define PCI_DEVICE_ID_MATROX_MIL 0x0519 -#define PCI_DEVICE_ID_MATROX_MYS 0x051A -#define PCI_DEVICE_ID_MATROX_MIL_2 0x051b -#define PCI_DEVICE_ID_MATROX_MIL_2_AGP 0x051f -#define PCI_DEVICE_ID_MATROX_MGA_IMP 0x0d10 -#define PCI_DEVICE_ID_MATROX_G100_MM 0x1000 -#define PCI_DEVICE_ID_MATROX_G100_AGP 0x1001 -#define PCI_DEVICE_ID_MATROX_G200_PCI 0x0520 -#define PCI_DEVICE_ID_MATROX_G200_AGP 0x0521 -#define PCI_DEVICE_ID_MATROX_G400 0x0525 -#define PCI_DEVICE_ID_MATROX_G550 0x2527 -#define PCI_DEVICE_ID_MATROX_VIA 0x4536 - -#define PCI_VENDOR_ID_CT 0x102c -#define PCI_DEVICE_ID_CT_69000 0x00c0 -#define PCI_DEVICE_ID_CT_65545 0x00d8 -#define PCI_DEVICE_ID_CT_65548 0x00dc -#define PCI_DEVICE_ID_CT_65550 0x00e0 -#define PCI_DEVICE_ID_CT_65554 0x00e4 -#define PCI_DEVICE_ID_CT_65555 0x00e5 - -#define PCI_VENDOR_ID_MIRO 0x1031 -#define PCI_DEVICE_ID_MIRO_36050 0x5601 -#define PCI_DEVICE_ID_MIRO_DC10PLUS 0x7efe -#define PCI_DEVICE_ID_MIRO_DC30PLUS 0xd801 - -#define PCI_VENDOR_ID_NEC 0x1033 -#define PCI_DEVICE_ID_NEC_CBUS_1 0x0001 /* PCI-Cbus Bridge */ -#define PCI_DEVICE_ID_NEC_LOCAL 0x0002 /* Local Bridge */ -#define PCI_DEVICE_ID_NEC_ATM 0x0003 /* ATM LAN Controller */ -#define PCI_DEVICE_ID_NEC_R4000 0x0004 /* R4000 Bridge */ -#define PCI_DEVICE_ID_NEC_486 0x0005 /* 486 Like Peripheral Bus Bridge */ -#define PCI_DEVICE_ID_NEC_ACCEL_1 0x0006 /* Graphic Accelerator */ -#define PCI_DEVICE_ID_NEC_UXBUS 0x0007 /* UX-Bus Bridge */ -#define PCI_DEVICE_ID_NEC_ACCEL_2 0x0008 /* Graphic Accelerator */ -#define PCI_DEVICE_ID_NEC_GRAPH 0x0009 /* PCI-CoreGraph Bridge */ -#define PCI_DEVICE_ID_NEC_VL 0x0016 /* PCI-VL Bridge */ -#define PCI_DEVICE_ID_NEC_STARALPHA2 0x002c /* STAR ALPHA2 */ -#define PCI_DEVICE_ID_NEC_CBUS_2 0x002d /* PCI-Cbus Bridge */ -#define PCI_DEVICE_ID_NEC_USB_A 0x0031 -#define PCI_DEVICE_ID_NEC_USB 0x0035 /* PCI-USB Host */ -#define PCI_DEVICE_ID_NEC_USB_2 0x00e0 /* PCI-USB 2 Host */ -#define PCI_DEVICE_ID_NEC_USB_3 0x00f0 -#define PCI_DEVICE_ID_NEC_CBUS_3 0x003b -#define PCI_DEVICE_ID_NEC_NAPCCARD 0x003e -#define PCI_DEVICE_ID_NEC_PCX2 0x0046 /* PowerVR */ -#define PCI_DEVICE_ID_NEC_NILE4 0x005a -#define PCI_DEVICE_ID_NEC_VRC5476 0x009b -#define PCI_DEVICE_ID_NEC_VRC4173 0x00a5 -#define PCI_DEVICE_ID_NEC_VRC5477_AC97 0x00a6 -#define PCI_DEVICE_ID_NEC_PC9821CS01 0x800c /* PC-9821-CS01 */ -#define PCI_DEVICE_ID_NEC_PC9821NRB06 0x800d /* PC-9821NR-B06 */ - -#define PCI_VENDOR_ID_FD 0x1036 -#define PCI_DEVICE_ID_FD_36C70 0x0000 - -#define PCI_VENDOR_ID_SI 0x1039 -#define PCI_DEVICE_ID_SI_5591_AGP 0x0001 -#define PCI_DEVICE_ID_SI_6202 0x0002 -#define PCI_DEVICE_ID_SI_503 0x0008 -#define PCI_DEVICE_ID_SI_ACPI 0x0009 -#define PCI_DEVICE_ID_SI_SMBUS 0x0016 -#define PCI_DEVICE_ID_SI_LPC 0x0018 -#define PCI_DEVICE_ID_SI_5597_VGA 0x0200 -#define PCI_DEVICE_ID_SI_6205 0x0205 -#define PCI_DEVICE_ID_SI_501 0x0406 -#define PCI_DEVICE_ID_SI_496 0x0496 -#define PCI_DEVICE_ID_SI_300 0x0300 -#define PCI_DEVICE_ID_SI_315H 0x0310 -#define PCI_DEVICE_ID_SI_315 0x0315 -#define PCI_DEVICE_ID_SI_315PRO 0x0325 -#define PCI_DEVICE_ID_SI_530 0x0530 -#define PCI_DEVICE_ID_SI_540 0x0540 -#define PCI_DEVICE_ID_SI_550 0x0550 -#define PCI_DEVICE_ID_SI_540_VGA 0x5300 -#define PCI_DEVICE_ID_SI_550_VGA 0x5315 -#define PCI_DEVICE_ID_SI_601 0x0601 -#define PCI_DEVICE_ID_SI_620 0x0620 -#define PCI_DEVICE_ID_SI_630 0x0630 -#define PCI_DEVICE_ID_SI_633 0x0633 -#define PCI_DEVICE_ID_SI_635 0x0635 -#define PCI_DEVICE_ID_SI_640 0x0640 -#define PCI_DEVICE_ID_SI_645 0x0645 -#define PCI_DEVICE_ID_SI_646 0x0646 -#define PCI_DEVICE_ID_SI_648 0x0648 -#define PCI_DEVICE_ID_SI_650 0x0650 -#define PCI_DEVICE_ID_SI_651 0x0651 -#define PCI_DEVICE_ID_SI_652 0x0652 -#define PCI_DEVICE_ID_SI_655 0x0655 -#define PCI_DEVICE_ID_SI_661 0x0661 -#define PCI_DEVICE_ID_SI_730 0x0730 -#define PCI_DEVICE_ID_SI_733 0x0733 -#define PCI_DEVICE_ID_SI_630_VGA 0x6300 -#define PCI_DEVICE_ID_SI_730_VGA 0x7300 -#define PCI_DEVICE_ID_SI_735 0x0735 -#define PCI_DEVICE_ID_SI_740 0x0740 -#define PCI_DEVICE_ID_SI_741 0x0741 -#define PCI_DEVICE_ID_SI_745 0x0745 -#define PCI_DEVICE_ID_SI_746 0x0746 -#define PCI_DEVICE_ID_SI_748 0x0748 -#define PCI_DEVICE_ID_SI_750 0x0750 -#define PCI_DEVICE_ID_SI_751 0x0751 -#define PCI_DEVICE_ID_SI_752 0x0752 -#define PCI_DEVICE_ID_SI_755 0x0755 -#define PCI_DEVICE_ID_SI_760 0x0760 -#define PCI_DEVICE_ID_SI_900 0x0900 -#define PCI_DEVICE_ID_SI_961 0x0961 -#define PCI_DEVICE_ID_SI_962 0x0962 -#define PCI_DEVICE_ID_SI_963 0x0963 -#define PCI_DEVICE_ID_SI_5107 0x5107 -#define PCI_DEVICE_ID_SI_5300 0x5300 -#define PCI_DEVICE_ID_SI_5511 0x5511 -#define PCI_DEVICE_ID_SI_5513 0x5513 -#define PCI_DEVICE_ID_SI_5518 0x5518 -#define PCI_DEVICE_ID_SI_5571 0x5571 -#define PCI_DEVICE_ID_SI_5581 0x5581 -#define PCI_DEVICE_ID_SI_5582 0x5582 -#define PCI_DEVICE_ID_SI_5591 0x5591 -#define PCI_DEVICE_ID_SI_5596 0x5596 -#define PCI_DEVICE_ID_SI_5597 0x5597 -#define PCI_DEVICE_ID_SI_5598 0x5598 -#define PCI_DEVICE_ID_SI_5600 0x5600 -#define PCI_DEVICE_ID_SI_6300 0x6300 -#define PCI_DEVICE_ID_SI_6306 0x6306 -#define PCI_DEVICE_ID_SI_6326 0x6326 -#define PCI_DEVICE_ID_SI_7001 0x7001 -#define PCI_DEVICE_ID_SI_7012 0x7012 -#define PCI_DEVICE_ID_SI_7016 0x7016 - -#define PCI_VENDOR_ID_HP 0x103c -#define PCI_DEVICE_ID_HP_VISUALIZE_EG 0x1005 -#define PCI_DEVICE_ID_HP_VISUALIZE_FX6 0x1006 -#define PCI_DEVICE_ID_HP_VISUALIZE_FX4 0x1008 -#define PCI_DEVICE_ID_HP_VISUALIZE_FX2 0x100a -#define PCI_DEVICE_ID_HP_TACHYON 0x1028 -#define PCI_DEVICE_ID_HP_TACHLITE 0x1029 -#define PCI_DEVICE_ID_HP_J2585A 0x1030 -#define PCI_DEVICE_ID_HP_J2585B 0x1031 -#define PCI_DEVICE_ID_HP_J2973A 0x1040 -#define PCI_DEVICE_ID_HP_J2970A 0x1042 -#define PCI_DEVICE_ID_HP_DIVA 0x1048 -#define PCI_DEVICE_ID_HP_DIVA_TOSCA1 0x1049 -#define PCI_DEVICE_ID_HP_DIVA_TOSCA2 0x104A -#define PCI_DEVICE_ID_HP_DIVA_MAESTRO 0x104B -#define PCI_DEVICE_ID_HP_PCI_LBA 0x1054 -#define PCI_DEVICE_ID_HP_REO_SBA 0x10f0 -#define PCI_DEVICE_ID_HP_REO_IOC 0x10f1 -#define PCI_DEVICE_ID_HP_VISUALIZE_FXE 0x108b -#define PCI_DEVICE_ID_HP_DIVA_HALFDOME 0x1223 -#define PCI_DEVICE_ID_HP_DIVA_KEYSTONE 0x1226 -#define PCI_DEVICE_ID_HP_DIVA_POWERBAR 0x1227 -#define PCI_DEVICE_ID_HP_ZX1_SBA 0x1229 -#define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a -#define PCI_DEVICE_ID_HP_PCIX_LBA 0x122e -#define PCI_DEVICE_ID_HP_SX1000_IOC 0x127c -#define PCI_DEVICE_ID_HP_DIVA_EVEREST 0x1282 -#define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290 -#define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301 -#define PCI_DEVICE_ID_HP_CISSA 0x3220 -#define PCI_DEVICE_ID_HP_CISSB 0x3230 -#define PCI_DEVICE_ID_HP_ZX2_IOC 0x4031 - -#define PCI_VENDOR_ID_PCTECH 0x1042 -#define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000 -#define PCI_DEVICE_ID_PCTECH_RZ1001 0x1001 -#define PCI_DEVICE_ID_PCTECH_SAMURAI_0 0x3000 -#define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010 -#define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020 - -#define PCI_VENDOR_ID_ASUSTEK 0x1043 -#define PCI_DEVICE_ID_ASUSTEK_0675 0x0675 - -#define PCI_VENDOR_ID_DPT 0x1044 -#define PCI_DEVICE_ID_DPT 0xa400 - -#define PCI_VENDOR_ID_OPTI 0x1045 -#define PCI_DEVICE_ID_OPTI_92C178 0xc178 -#define PCI_DEVICE_ID_OPTI_82C557 0xc557 -#define PCI_DEVICE_ID_OPTI_82C558 0xc558 -#define PCI_DEVICE_ID_OPTI_82C621 0xc621 -#define PCI_DEVICE_ID_OPTI_82C700 0xc700 -#define PCI_DEVICE_ID_OPTI_82C701 0xc701 -#define PCI_DEVICE_ID_OPTI_82C814 0xc814 -#define PCI_DEVICE_ID_OPTI_82C822 0xc822 -#define PCI_DEVICE_ID_OPTI_82C861 0xc861 -#define PCI_DEVICE_ID_OPTI_82C825 0xd568 - -#define PCI_VENDOR_ID_ELSA 0x1048 -#define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000 -#define PCI_DEVICE_ID_ELSA_QS3000 0x3000 - -#define PCI_VENDOR_ID_SGS 0x104a -#define PCI_DEVICE_ID_SGS_2000 0x0008 -#define PCI_DEVICE_ID_SGS_1764 0x0009 - -#define PCI_VENDOR_ID_BUSLOGIC 0x104B -#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140 -#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER 0x1040 -#define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130 - -#define PCI_VENDOR_ID_TI 0x104c -#define PCI_DEVICE_ID_TI_TVP4010 0x3d04 -#define PCI_DEVICE_ID_TI_TVP4020 0x3d07 -#define PCI_DEVICE_ID_TI_4450 0x8011 -#define PCI_DEVICE_ID_TI_1130 0xac12 -#define PCI_DEVICE_ID_TI_1031 0xac13 -#define PCI_DEVICE_ID_TI_1131 0xac15 -#define PCI_DEVICE_ID_TI_1250 0xac16 -#define PCI_DEVICE_ID_TI_1220 0xac17 -#define PCI_DEVICE_ID_TI_1221 0xac19 -#define PCI_DEVICE_ID_TI_1210 0xac1a -#define PCI_DEVICE_ID_TI_1450 0xac1b -#define PCI_DEVICE_ID_TI_1225 0xac1c -#define PCI_DEVICE_ID_TI_1251A 0xac1d -#define PCI_DEVICE_ID_TI_1211 0xac1e -#define PCI_DEVICE_ID_TI_1251B 0xac1f -#define PCI_DEVICE_ID_TI_4410 0xac41 -#define PCI_DEVICE_ID_TI_4451 0xac42 -#define PCI_DEVICE_ID_TI_4510 0xac44 -#define PCI_DEVICE_ID_TI_4520 0xac46 -#define PCI_DEVICE_ID_TI_1410 0xac50 -#define PCI_DEVICE_ID_TI_1420 0xac51 -#define PCI_DEVICE_ID_TI_1451A 0xac52 -#define PCI_DEVICE_ID_TI_1620 0xac54 -#define PCI_DEVICE_ID_TI_1520 0xac55 -#define PCI_DEVICE_ID_TI_1510 0xac56 - -#define PCI_VENDOR_ID_SONY 0x104d -#define PCI_DEVICE_ID_SONY_CXD3222 0x8039 - -#define PCI_VENDOR_ID_OAK 0x104e -#define PCI_DEVICE_ID_OAK_OTI107 0x0107 - -/* Winbond have two vendor IDs! See 0x10ad as well */ -#define PCI_VENDOR_ID_WINBOND2 0x1050 -#define PCI_DEVICE_ID_WINBOND2_89C940 0x0940 -#define PCI_DEVICE_ID_WINBOND2_89C940F 0x5a5a -#define PCI_DEVICE_ID_WINBOND2_6692 0x6692 - -#define PCI_VENDOR_ID_ANIGMA 0x1051 -#define PCI_DEVICE_ID_ANIGMA_MC145575 0x0100 - -#define PCI_VENDOR_ID_EFAR 0x1055 -#define PCI_DEVICE_ID_EFAR_SLC90E66_1 0x9130 -#define PCI_DEVICE_ID_EFAR_SLC90E66_0 0x9460 -#define PCI_DEVICE_ID_EFAR_SLC90E66_2 0x9462 -#define PCI_DEVICE_ID_EFAR_SLC90E66_3 0x9463 - -#define PCI_VENDOR_ID_MOTOROLA 0x1057 -#define PCI_VENDOR_ID_MOTOROLA_OOPS 0x1507 -#define PCI_DEVICE_ID_MOTOROLA_MPC105 0x0001 -#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002 -#define PCI_DEVICE_ID_MOTOROLA_MPC107 0x0004 -#define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801 -#define PCI_DEVICE_ID_MOTOROLA_FALCON 0x4802 -#define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803 -#define PCI_DEVICE_ID_MOTOROLA_CPX8216 0x4806 -#define PCI_DEVICE_ID_MOTOROLA_HARRIER 0x480b -#define PCI_DEVICE_ID_MOTOROLA_MPC5200 0x5803 - -#define PCI_VENDOR_ID_PROMISE 0x105a -#define PCI_DEVICE_ID_PROMISE_20265 0x0d30 -#define PCI_DEVICE_ID_PROMISE_20267 0x4d30 -#define PCI_DEVICE_ID_PROMISE_20246 0x4d33 -#define PCI_DEVICE_ID_PROMISE_20262 0x4d38 -#define PCI_DEVICE_ID_PROMISE_20263 0x0D38 -#define PCI_DEVICE_ID_PROMISE_20268 0x4d68 -#define PCI_DEVICE_ID_PROMISE_20268R 0x6268 -#define PCI_DEVICE_ID_PROMISE_20269 0x4d69 -#define PCI_DEVICE_ID_PROMISE_20270 0x6268 -#define PCI_DEVICE_ID_PROMISE_20271 0x6269 -#define PCI_DEVICE_ID_PROMISE_20275 0x1275 -#define PCI_DEVICE_ID_PROMISE_20276 0x5275 -#define PCI_DEVICE_ID_PROMISE_20277 0x7275 -#define PCI_DEVICE_ID_PROMISE_5300 0x5300 - -#define PCI_VENDOR_ID_N9 0x105d -#define PCI_DEVICE_ID_N9_I128 0x2309 -#define PCI_DEVICE_ID_N9_I128_2 0x2339 -#define PCI_DEVICE_ID_N9_I128_T2R 0x493d - -#define PCI_VENDOR_ID_UMC 0x1060 -#define PCI_DEVICE_ID_UMC_UM8673F 0x0101 -#define PCI_DEVICE_ID_UMC_UM8891A 0x0891 -#define PCI_DEVICE_ID_UMC_UM8886BF 0x673a -#define PCI_DEVICE_ID_UMC_UM8886A 0x886a -#define PCI_DEVICE_ID_UMC_UM8881F 0x8881 -#define PCI_DEVICE_ID_UMC_UM8886F 0x8886 -#define PCI_DEVICE_ID_UMC_UM9017F 0x9017 -#define PCI_DEVICE_ID_UMC_UM8886N 0xe886 -#define PCI_DEVICE_ID_UMC_UM8891N 0xe891 - -#define PCI_VENDOR_ID_X 0x1061 -#define PCI_DEVICE_ID_X_AGX016 0x0001 - -#define PCI_VENDOR_ID_MYLEX 0x1069 -#define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001 -#define PCI_DEVICE_ID_MYLEX_DAC960_PD 0x0002 -#define PCI_DEVICE_ID_MYLEX_DAC960_PG 0x0010 -#define PCI_DEVICE_ID_MYLEX_DAC960_LA 0x0020 -#define PCI_DEVICE_ID_MYLEX_DAC960_LP 0x0050 -#define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56 -#define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166 - -#define PCI_VENDOR_ID_PICOP 0x1066 -#define PCI_DEVICE_ID_PICOP_PT86C52X 0x0001 -#define PCI_DEVICE_ID_PICOP_PT80C524 0x8002 - -#define PCI_VENDOR_ID_APPLE 0x106b -#define PCI_DEVICE_ID_APPLE_BANDIT 0x0001 -#define PCI_DEVICE_ID_APPLE_GC 0x0002 -#define PCI_DEVICE_ID_APPLE_HYDRA 0x000e -#define PCI_DEVICE_ID_APPLE_UNI_N_FW 0x0018 -#define PCI_DEVICE_ID_APPLE_KL_USB 0x0019 -#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020 -#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021 -#define PCI_DEVICE_ID_APPLE_KEYLARGO 0x0022 -#define PCI_DEVICE_ID_APPLE_UNI_N_GMACP 0x0024 -#define PCI_DEVICE_ID_APPLE_KEYLARGO_P 0x0025 -#define PCI_DEVICE_ID_APPLE_KL_USB_P 0x0026 -#define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P 0x0027 -#define PCI_DEVICE_ID_APPLE_UNI_N_AGP15 0x002d -#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e -#define PCI_DEVICE_ID_APPLE_UNI_N_FW2 0x0030 -#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032 -#define PCI_DEVIEC_ID_APPLE_UNI_N_ATA 0x0033 -#define PCI_DEVICE_ID_APPLE_UNI_N_AGP2 0x0034 -#define PCI_DEVICE_ID_APPLE_IPID_ATA100 0x003b -#define PCI_DEVICE_ID_APPLE_KEYLARGO_I 0x003e -#define PCI_DEVICE_ID_APPLE_K2_ATA100 0x0043 -#define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b -#define PCI_DEVICE_ID_APPLE_K2_GMAC 0x004c -#define PCI_DEVICE_ID_APPLE_SH_ATA 0x0050 -#define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051 -#define PCI_DEVICE_ID_APPLE_SH_FW 0x0052 -#define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058 -#define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059 -#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645 - -#define PCI_VENDOR_ID_YAMAHA 0x1073 -#define PCI_DEVICE_ID_YAMAHA_724 0x0004 -#define PCI_DEVICE_ID_YAMAHA_724F 0x000d -#define PCI_DEVICE_ID_YAMAHA_740 0x000a -#define PCI_DEVICE_ID_YAMAHA_740C 0x000c -#define PCI_DEVICE_ID_YAMAHA_744 0x0010 -#define PCI_DEVICE_ID_YAMAHA_754 0x0012 - -#define PCI_VENDOR_ID_NEXGEN 0x1074 -#define PCI_DEVICE_ID_NEXGEN_82C501 0x4e78 - -#define PCI_VENDOR_ID_QLOGIC 0x1077 -#define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020 -#define PCI_DEVICE_ID_QLOGIC_ISP1022 0x1022 -#define PCI_DEVICE_ID_QLOGIC_ISP2100 0x2100 -#define PCI_DEVICE_ID_QLOGIC_ISP2200 0x2200 - -#define PCI_VENDOR_ID_CYRIX 0x1078 -#define PCI_DEVICE_ID_CYRIX_5510 0x0000 -#define PCI_DEVICE_ID_CYRIX_PCI_MASTER 0x0001 -#define PCI_DEVICE_ID_CYRIX_5520 0x0002 -#define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100 -#define PCI_DEVICE_ID_CYRIX_5530_SMI 0x0101 -#define PCI_DEVICE_ID_CYRIX_5530_IDE 0x0102 -#define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103 -#define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104 - -#define PCI_VENDOR_ID_LEADTEK 0x107d -#define PCI_DEVICE_ID_LEADTEK_805 0x0000 - -#define PCI_VENDOR_ID_INTERPHASE 0x107e -#define PCI_DEVICE_ID_INTERPHASE_5526 0x0004 -#define PCI_DEVICE_ID_INTERPHASE_55x6 0x0005 -#define PCI_DEVICE_ID_INTERPHASE_5575 0x0008 - -#define PCI_VENDOR_ID_CONTAQ 0x1080 -#define PCI_DEVICE_ID_CONTAQ_82C599 0x0600 -#define PCI_DEVICE_ID_CONTAQ_82C693 0xc693 - -#define PCI_VENDOR_ID_FOREX 0x1083 - -#define PCI_VENDOR_ID_OLICOM 0x108d -#define PCI_DEVICE_ID_OLICOM_OC3136 0x0001 -#define PCI_DEVICE_ID_OLICOM_OC2315 0x0011 -#define PCI_DEVICE_ID_OLICOM_OC2325 0x0012 -#define PCI_DEVICE_ID_OLICOM_OC2183 0x0013 -#define PCI_DEVICE_ID_OLICOM_OC2326 0x0014 -#define PCI_DEVICE_ID_OLICOM_OC6151 0x0021 - -#define PCI_VENDOR_ID_SUN 0x108e -#define PCI_DEVICE_ID_SUN_EBUS 0x1000 -#define PCI_DEVICE_ID_SUN_HAPPYMEAL 0x1001 -#define PCI_DEVICE_ID_SUN_RIO_EBUS 0x1100 -#define PCI_DEVICE_ID_SUN_RIO_GEM 0x1101 -#define PCI_DEVICE_ID_SUN_RIO_1394 0x1102 -#define PCI_DEVICE_ID_SUN_RIO_USB 0x1103 -#define PCI_DEVICE_ID_SUN_GEM 0x2bad -#define PCI_DEVICE_ID_SUN_SIMBA 0x5000 -#define PCI_DEVICE_ID_SUN_PBM 0x8000 -#define PCI_DEVICE_ID_SUN_SCHIZO 0x8001 -#define PCI_DEVICE_ID_SUN_SABRE 0xa000 -#define PCI_DEVICE_ID_SUN_HUMMINGBIRD 0xa001 -#define PCI_DEVICE_ID_SUN_TOMATILLO 0xa801 - -#define PCI_VENDOR_ID_CMD 0x1095 -#define PCI_DEVICE_ID_CMD_640 0x0640 -#define PCI_DEVICE_ID_CMD_643 0x0643 -#define PCI_DEVICE_ID_CMD_646 0x0646 -#define PCI_DEVICE_ID_CMD_647 0x0647 -#define PCI_DEVICE_ID_CMD_648 0x0648 -#define PCI_DEVICE_ID_CMD_649 0x0649 -#define PCI_DEVICE_ID_CMD_670 0x0670 -#define PCI_DEVICE_ID_CMD_680 0x0680 - -#define PCI_DEVICE_ID_SII_680 0x0680 -#define PCI_DEVICE_ID_SII_3112 0x3112 -#define PCI_DEVICE_ID_SII_1210SA 0x0240 - -#define PCI_VENDOR_ID_VISION 0x1098 -#define PCI_DEVICE_ID_VISION_QD8500 0x0001 -#define PCI_DEVICE_ID_VISION_QD8580 0x0002 - -#define PCI_VENDOR_ID_BROOKTREE 0x109e -#define PCI_DEVICE_ID_BROOKTREE_848 0x0350 -#define PCI_DEVICE_ID_BROOKTREE_849A 0x0351 -#define PCI_DEVICE_ID_BROOKTREE_878_1 0x036e -#define PCI_DEVICE_ID_BROOKTREE_878 0x0878 -#define PCI_DEVICE_ID_BROOKTREE_8474 0x8474 - -#define PCI_VENDOR_ID_SIERRA 0x10a8 -#define PCI_DEVICE_ID_SIERRA_STB 0x0000 - -#define PCI_VENDOR_ID_SGI 0x10a9 -#define PCI_DEVICE_ID_SGI_IOC3 0x0003 -#define PCI_DEVICE_ID_SGI_IOC4 0x100a -#define PCI_VENDOR_ID_SGI_LITHIUM 0x1002 - -#define PCI_VENDOR_ID_ACC 0x10aa -#define PCI_DEVICE_ID_ACC_2056 0x0000 - -#define PCI_VENDOR_ID_WINBOND 0x10ad -#define PCI_DEVICE_ID_WINBOND_83769 0x0001 -#define PCI_DEVICE_ID_WINBOND_82C105 0x0105 -#define PCI_DEVICE_ID_WINBOND_83C553 0x0565 - -#define PCI_VENDOR_ID_DATABOOK 0x10b3 -#define PCI_DEVICE_ID_DATABOOK_87144 0xb106 - -#define PCI_VENDOR_ID_PLX 0x10b5 -#define PCI_DEVICE_ID_PLX_R685 0x1030 -#define PCI_DEVICE_ID_PLX_ROMULUS 0x106a -#define PCI_DEVICE_ID_PLX_SPCOM800 0x1076 -#define PCI_DEVICE_ID_PLX_1077 0x1077 -#define PCI_DEVICE_ID_PLX_SPCOM200 0x1103 -#define PCI_DEVICE_ID_PLX_DJINN_ITOO 0x1151 -#define PCI_DEVICE_ID_PLX_R753 0x1152 -#define PCI_DEVICE_ID_PLX_9030 0x9030 -#define PCI_DEVICE_ID_PLX_9050 0x9050 -#define PCI_DEVICE_ID_PLX_9060 0x9060 -#define PCI_DEVICE_ID_PLX_9060ES 0x906E -#define PCI_DEVICE_ID_PLX_9060SD 0x906D -#define PCI_DEVICE_ID_PLX_9080 0x9080 -#define PCI_DEVICE_ID_PLX_GTEK_SERIAL2 0xa001 - -#define PCI_VENDOR_ID_MADGE 0x10b6 -#define PCI_DEVICE_ID_MADGE_MK2 0x0002 -#define PCI_DEVICE_ID_MADGE_C155S 0x1001 - -#define PCI_VENDOR_ID_3COM 0x10b7 -#define PCI_DEVICE_ID_3COM_3C985 0x0001 -#define PCI_DEVICE_ID_3COM_3C940 0x1700 -#define PCI_DEVICE_ID_3COM_3C339 0x3390 -#define PCI_DEVICE_ID_3COM_3C359 0x3590 -#define PCI_DEVICE_ID_3COM_3C590 0x5900 -#define PCI_DEVICE_ID_3COM_3C595TX 0x5950 -#define PCI_DEVICE_ID_3COM_3C595T4 0x5951 -#define PCI_DEVICE_ID_3COM_3C595MII 0x5952 -#define PCI_DEVICE_ID_3COM_3C940B 0x80eb -#define PCI_DEVICE_ID_3COM_3C900TPO 0x9000 -#define PCI_DEVICE_ID_3COM_3C900COMBO 0x9001 -#define PCI_DEVICE_ID_3COM_3C905TX 0x9050 -#define PCI_DEVICE_ID_3COM_3C905T4 0x9051 -#define PCI_DEVICE_ID_3COM_3C905B_TX 0x9055 -#define PCI_DEVICE_ID_3COM_3CR990 0x9900 -#define PCI_DEVICE_ID_3COM_3CR990_TX_95 0x9902 -#define PCI_DEVICE_ID_3COM_3CR990_TX_97 0x9903 -#define PCI_DEVICE_ID_3COM_3CR990B 0x9904 -#define PCI_DEVICE_ID_3COM_3CR990_FX 0x9905 -#define PCI_DEVICE_ID_3COM_3CR990SVR95 0x9908 -#define PCI_DEVICE_ID_3COM_3CR990SVR97 0x9909 -#define PCI_DEVICE_ID_3COM_3CR990SVR 0x990a - -#define PCI_VENDOR_ID_SMC 0x10b8 -#define PCI_DEVICE_ID_SMC_EPIC100 0x0005 - -#define PCI_VENDOR_ID_AL 0x10b9 -#define PCI_DEVICE_ID_AL_M1445 0x1445 -#define PCI_DEVICE_ID_AL_M1449 0x1449 -#define PCI_DEVICE_ID_AL_M1451 0x1451 -#define PCI_DEVICE_ID_AL_M1461 0x1461 -#define PCI_DEVICE_ID_AL_M1489 0x1489 -#define PCI_DEVICE_ID_AL_M1511 0x1511 -#define PCI_DEVICE_ID_AL_M1513 0x1513 -#define PCI_DEVICE_ID_AL_M1521 0x1521 -#define PCI_DEVICE_ID_AL_M1523 0x1523 -#define PCI_DEVICE_ID_AL_M1531 0x1531 -#define PCI_DEVICE_ID_AL_M1533 0x1533 -#define PCI_DEVICE_ID_AL_M1535 0x1535 -#define PCI_DEVICE_ID_AL_M1541 0x1541 -#define PCI_DEVICE_ID_AL_M1543 0x1543 -#define PCI_DEVICE_ID_AL_M1563 0x1563 -#define PCI_DEVICE_ID_AL_M1621 0x1621 -#define PCI_DEVICE_ID_AL_M1631 0x1631 -#define PCI_DEVICE_ID_AL_M1632 0x1632 -#define PCI_DEVICE_ID_AL_M1641 0x1641 -#define PCI_DEVICE_ID_AL_M1644 0x1644 -#define PCI_DEVICE_ID_AL_M1647 0x1647 -#define PCI_DEVICE_ID_AL_M1651 0x1651 -#define PCI_DEVICE_ID_AL_M1671 0x1671 -#define PCI_DEVICE_ID_AL_M1681 0x1681 -#define PCI_DEVICE_ID_AL_M1683 0x1683 -#define PCI_DEVICE_ID_AL_M1689 0x1689 -#define PCI_DEVICE_ID_AL_M3307 0x3307 -#define PCI_DEVICE_ID_AL_M4803 0x5215 -#define PCI_DEVICE_ID_AL_M5219 0x5219 -#define PCI_DEVICE_ID_AL_M5228 0x5228 -#define PCI_DEVICE_ID_AL_M5229 0x5229 -#define PCI_DEVICE_ID_AL_M5237 0x5237 -#define PCI_DEVICE_ID_AL_M5243 0x5243 -#define PCI_DEVICE_ID_AL_M5451 0x5451 -#define PCI_DEVICE_ID_AL_M7101 0x7101 - -#define PCI_VENDOR_ID_MITSUBISHI 0x10ba - -#define PCI_VENDOR_ID_SURECOM 0x10bd -#define PCI_DEVICE_ID_SURECOM_NE34 0x0e34 - -#define PCI_VENDOR_ID_NEOMAGIC 0x10c8 -#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2070 0x0001 -#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128V 0x0002 -#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZV 0x0003 -#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2160 0x0004 -#define PCI_DEVICE_ID_NEOMAGIC_MAGICMEDIA_256AV 0x0005 -#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZVPLUS 0x0083 - -#define PCI_VENDOR_ID_ASP 0x10cd -#define PCI_DEVICE_ID_ASP_ABP940 0x1200 -#define PCI_DEVICE_ID_ASP_ABP940U 0x1300 -#define PCI_DEVICE_ID_ASP_ABP940UW 0x2300 - -#define PCI_VENDOR_ID_MACRONIX 0x10d9 -#define PCI_DEVICE_ID_MACRONIX_MX98713 0x0512 -#define PCI_DEVICE_ID_MACRONIX_MX987x5 0x0531 - -#define PCI_VENDOR_ID_TCONRAD 0x10da -#define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508 - -#define PCI_VENDOR_ID_CERN 0x10dc -#define PCI_DEVICE_ID_CERN_SPSB_PMC 0x0001 -#define PCI_DEVICE_ID_CERN_SPSB_PCI 0x0002 -#define PCI_DEVICE_ID_CERN_HIPPI_DST 0x0021 -#define PCI_DEVICE_ID_CERN_HIPPI_SRC 0x0022 - -#define PCI_VENDOR_ID_NVIDIA 0x10de -#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020 -#define PCI_DEVICE_ID_NVIDIA_TNT2 0x0028 -#define PCI_DEVICE_ID_NVIDIA_UTNT2 0x0029 -#define PCI_DEVICE_ID_NVIDIA_TNT_UNKNOWN 0x002a -#define PCI_DEVICE_ID_NVIDIA_VTNT2 0x002C -#define PCI_DEVICE_ID_NVIDIA_UVTNT2 0x002D -#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE 0x0035 -#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA 0x0036 -#define PCI_DEVICE_ID_NVIDIA_NVENET_10 0x0037 -#define PCI_DEVICE_ID_NVIDIA_NVENET_11 0x0038 -#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2 0x003e -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_ULTRA 0x0040 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800 0x0041 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_LE 0x0042 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800_GT 0x0045 -#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_4000 0x004E -#define PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS 0x0052 -#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE 0x0053 -#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA 0x0054 -#define PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_SATA2 0x0055 -#define PCI_DEVICE_ID_NVIDIA_NVENET_8 0x0056 -#define PCI_DEVICE_ID_NVIDIA_NVENET_9 0x0057 -#define PCI_DEVICE_ID_NVIDIA_CK804_AUDIO 0x0059 -#define PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS 0x0064 -#define PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE 0x0065 -#define PCI_DEVICE_ID_NVIDIA_NVENET_2 0x0066 -#define PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO 0x006a -#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS 0x0084 -#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE 0x0085 -#define PCI_DEVICE_ID_NVIDIA_NVENET_4 0x0086 -#define PCI_DEVICE_ID_NVIDIA_NVENET_5 0x008c -#define PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA 0x008e -#define PCI_DEVICE_ID_NVIDIA_ITNT2 0x00A0 -#define PCI_DEVICE_ID_GEFORCE_6800A 0x00c1 -#define PCI_DEVICE_ID_GEFORCE_6800A_LE 0x00c2 -#define PCI_DEVICE_ID_GEFORCE_GO_6800 0x00c8 -#define PCI_DEVICE_ID_GEFORCE_GO_6800_ULTRA 0x00c9 -#define PCI_DEVICE_ID_QUADRO_FX_GO1400 0x00cc -#define PCI_DEVICE_ID_QUADRO_FX_1400 0x00ce -#define PCI_DEVICE_ID_NVIDIA_NFORCE3 0x00d1 -#define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da -#define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS 0x00d4 -#define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE 0x00d5 -#define PCI_DEVICE_ID_NVIDIA_NVENET_3 0x00d6 -#define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da -#define PCI_DEVICE_ID_NVIDIA_NVENET_7 0x00df -#define PCI_DEVICE_ID_NVIDIA_NFORCE3S 0x00e1 -#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA 0x00e3 -#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS 0x00e4 -#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE 0x00e5 -#define PCI_DEVICE_ID_NVIDIA_NVENET_6 0x00e6 -#define PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2 0x00ee -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_SDR 0x0100 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_DDR 0x0101 -#define PCI_DEVICE_ID_NVIDIA_QUADRO 0x0103 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX 0x0110 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_MX2 0x0111 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GO 0x0112 -#define PCI_DEVICE_ID_NVIDIA_QUADRO2_MXR 0x0113 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6600_GT 0x0140 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6600 0x0141 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6610_XL 0x0145 -#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_540 0x014E -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6200 0x014F -#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS 0x0150 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_GTS2 0x0151 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE2_ULTRA 0x0152 -#define PCI_DEVICE_ID_NVIDIA_QUADRO2_PRO 0x0153 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6200_TURBOCACHE 0x0161 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6200 0x0164 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6250 0x0166 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6200_1 0x0167 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_GO_6250_1 0x0168 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_460 0x0170 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440 0x0171 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_420 0x0172 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440_SE 0x0173 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_440_GO 0x0174 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_420_GO 0x0175 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_420_GO_M32 0x0176 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_460_GO 0x0177 -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_500XGL 0x0178 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_440_GO_M64 0x0179 -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_200 0x017A -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_550XGL 0x017B -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_500_GOGL 0x017C -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_410_GO_M16 0x017D -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440_8X 0x0181 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_440SE_8X 0x0182 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_420_8X 0x0183 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_448_GO 0x0186 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_488_GO 0x0187 -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_580_XGL 0x0188 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_MX_MAC 0x0189 -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_280_NVS 0x018A -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_380_XGL 0x018B -#define PCI_DEVICE_ID_NVIDIA_IGEFORCE2 0x01a0 -#define PCI_DEVICE_ID_NVIDIA_NFORCE 0x01a4 -#define PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO 0x01b1 -#define PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS 0x01b4 -#define PCI_DEVICE_ID_NVIDIA_NFORCE_IDE 0x01bc -#define PCI_DEVICE_ID_NVIDIA_NVENET_1 0x01c3 -#define PCI_DEVICE_ID_NVIDIA_NFORCE2 0x01e0 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE3 0x0200 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_1 0x0201 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE3_2 0x0202 -#define PCI_DEVICE_ID_NVIDIA_QUADRO_DDC 0x0203 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B 0x0211 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B_LE 0x0212 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_6800B_GT 0x0215 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4600 0x0250 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4400 0x0251 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4200 0x0253 -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_900XGL 0x0258 -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_750XGL 0x0259 -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700XGL 0x025B -#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE 0x0265 -#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA 0x0266 -#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2 0x0267 -#define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268 -#define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269 -#define PCI_DEVICE_ID_NVIDIA_MCP51_AUDIO 0x026B -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800 0x0280 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X 0x0281 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE 0x0282 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_4200_GO 0x0286 -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_980_XGL 0x0288 -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_780_XGL 0x0289 -#define PCI_DEVICE_ID_NVIDIA_QUADRO4_700_GOGL 0x028C -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5800_ULTRA 0x0301 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5800 0x0302 -#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_2000 0x0308 -#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1000 0x0309 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600_ULTRA 0x0311 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600 0x0312 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5600SE 0x0314 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5600 0x031A -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5650 0x031B -#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO700 0x031C -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200 0x0320 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200_ULTRA 0x0321 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200_1 0x0322 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5200SE 0x0323 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5200 0x0324 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5250 0x0325 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5500 0x0326 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5100 0x0327 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5250_32 0x0328 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO_5200 0x0329 -#define PCI_DEVICE_ID_NVIDIA_QUADRO_NVS_280_PCI 0x032A -#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_500 0x032B -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5300 0x032C -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5100 0x032D -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900_ULTRA 0x0330 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900 0x0331 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900XT 0x0332 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5950_ULTRA 0x0333 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5900ZT 0x0334 -#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_3000 0x0338 -#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_700 0x033F -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700_ULTRA 0x0341 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700 0x0342 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700LE 0x0343 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_5700VE 0x0344 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_1 0x0347 -#define PCI_DEVICE_ID_NVIDIA_GEFORCE_FX_GO5700_2 0x0348 -#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_GO1000 0x034C -#define PCI_DEVICE_ID_NVIDIA_QUADRO_FX_1100 0x034E - -#define PCI_VENDOR_ID_IMS 0x10e0 -#define PCI_DEVICE_ID_IMS_8849 0x8849 -#define PCI_DEVICE_ID_IMS_TT128 0x9128 -#define PCI_DEVICE_ID_IMS_TT3D 0x9135 - -#define PCI_VENDOR_ID_TEKRAM2 0x10e1 -#define PCI_DEVICE_ID_TEKRAM2_690c 0x690c - -#define PCI_VENDOR_ID_TUNDRA 0x10e3 -#define PCI_DEVICE_ID_TUNDRA_CA91C042 0x0000 - -#define PCI_VENDOR_ID_AMCC 0x10e8 -#define PCI_DEVICE_ID_AMCC_MYRINET 0x8043 -#define PCI_DEVICE_ID_AMCC_PARASTATION 0x8062 -#define PCI_DEVICE_ID_AMCC_S5933 0x807d -#define PCI_DEVICE_ID_AMCC_S5933_HEPC3 0x809c - -#define PCI_VENDOR_ID_INTERG 0x10ea -#define PCI_DEVICE_ID_INTERG_1680 0x1680 -#define PCI_DEVICE_ID_INTERG_1682 0x1682 -#define PCI_DEVICE_ID_INTERG_2000 0x2000 -#define PCI_DEVICE_ID_INTERG_2010 0x2010 -#define PCI_DEVICE_ID_INTERG_5000 0x5000 -#define PCI_DEVICE_ID_INTERG_5050 0x5050 - -#define PCI_VENDOR_ID_REALTEK 0x10ec -#define PCI_DEVICE_ID_REALTEK_8029 0x8029 -#define PCI_DEVICE_ID_REALTEK_8129 0x8129 -#define PCI_DEVICE_ID_REALTEK_8139 0x8139 -#define PCI_DEVICE_ID_REALTEK_8169 0x8169 - -#define PCI_VENDOR_ID_XILINX 0x10ee -#define PCI_DEVICE_ID_TURBOPAM 0x4020 - -#define PCI_VENDOR_ID_TRUEVISION 0x10fa -#define PCI_DEVICE_ID_TRUEVISION_T1000 0x000c - -#define PCI_VENDOR_ID_INIT 0x1101 -#define PCI_DEVICE_ID_INIT_320P 0x9100 -#define PCI_DEVICE_ID_INIT_360P 0x9500 - -#define PCI_VENDOR_ID_CREATIVE 0x1102 // duplicate: ECTIVA -#define PCI_DEVICE_ID_CREATIVE_EMU10K1 0x0002 - -#define PCI_VENDOR_ID_ECTIVA 0x1102 // duplicate: CREATIVE -#define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938 - -#define PCI_VENDOR_ID_TTI 0x1103 -#define PCI_DEVICE_ID_TTI_HPT343 0x0003 -#define PCI_DEVICE_ID_TTI_HPT366 0x0004 -#define PCI_DEVICE_ID_TTI_HPT372 0x0005 -#define PCI_DEVICE_ID_TTI_HPT302 0x0006 -#define PCI_DEVICE_ID_TTI_HPT371 0x0007 -#define PCI_DEVICE_ID_TTI_HPT374 0x0008 -#define PCI_DEVICE_ID_TTI_HPT372N 0x0009 // apparently a 372N variant? - -#define PCI_VENDOR_ID_VIA 0x1106 -#define PCI_DEVICE_ID_VIA_8763_0 0x0198 -#define PCI_DEVICE_ID_VIA_8380_0 0x0204 -#define PCI_DEVICE_ID_VIA_3238_0 0x0238 -#define PCI_DEVICE_ID_VIA_PT880 0x0258 -#define PCI_DEVICE_ID_VIA_PX8X0_0 0x0259 -#define PCI_DEVICE_ID_VIA_3269_0 0x0269 -#define PCI_DEVICE_ID_VIA_K8T800PRO_0 0x0282 -#define PCI_DEVICE_ID_VIA_8363_0 0x0305 -#define PCI_DEVICE_ID_VIA_8371_0 0x0391 -#define PCI_DEVICE_ID_VIA_8501_0 0x0501 -#define PCI_DEVICE_ID_VIA_82C505 0x0505 -#define PCI_DEVICE_ID_VIA_82C561 0x0561 -#define PCI_DEVICE_ID_VIA_82C586_1 0x0571 -#define PCI_DEVICE_ID_VIA_82C576 0x0576 -#define PCI_DEVICE_ID_VIA_82C585 0x0585 -#define PCI_DEVICE_ID_VIA_82C586_0 0x0586 -#define PCI_DEVICE_ID_VIA_82C595 0x0595 -#define PCI_DEVICE_ID_VIA_82C596 0x0596 -#define PCI_DEVICE_ID_VIA_82C597_0 0x0597 -#define PCI_DEVICE_ID_VIA_82C598_0 0x0598 -#define PCI_DEVICE_ID_VIA_8601_0 0x0601 -#define PCI_DEVICE_ID_VIA_8605_0 0x0605 -#define PCI_DEVICE_ID_VIA_82C680 0x0680 -#define PCI_DEVICE_ID_VIA_82C686 0x0686 -#define PCI_DEVICE_ID_VIA_82C691_0 0x0691 -#define PCI_DEVICE_ID_VIA_82C693 0x0693 -#define PCI_DEVICE_ID_VIA_82C693_1 0x0698 -#define PCI_DEVICE_ID_VIA_82C926 0x0926 -#define PCI_DEVICE_ID_VIA_82C576_1 0x1571 -#define PCI_DEVICE_ID_VIA_82C595_97 0x1595 -#define PCI_DEVICE_ID_VIA_82C586_2 0x3038 -#define PCI_DEVICE_ID_VIA_82C586_3 0x3040 -#define PCI_DEVICE_ID_VIA_6305 0x3044 -#define PCI_DEVICE_ID_VIA_82C596_3 0x3050 -#define PCI_DEVICE_ID_VIA_82C596B_3 0x3051 -#define PCI_DEVICE_ID_VIA_82C686_4 0x3057 -#define PCI_DEVICE_ID_VIA_82C686_5 0x3058 -#define PCI_DEVICE_ID_VIA_8233_5 0x3059 -#define PCI_DEVICE_ID_VIA_8233_7 0x3065 -#define PCI_DEVICE_ID_VIA_82C686_6 0x3068 -#define PCI_DEVICE_ID_VIA_8233_0 0x3074 -#define PCI_DEVICE_ID_VIA_8633_0 0x3091 -#define PCI_DEVICE_ID_VIA_8367_0 0x3099 -#define PCI_DEVICE_ID_VIA_8653_0 0x3101 -#define PCI_DEVICE_ID_VIA_8622 0x3102 -#define PCI_DEVICE_ID_VIA_8233C_0 0x3109 -#define PCI_DEVICE_ID_VIA_8361 0x3112 -#define PCI_DEVICE_ID_VIA_XM266 0x3116 -#define PCI_DEVICE_ID_VIA_612X 0x3119 -#define PCI_DEVICE_ID_VIA_862X_0 0x3123 -#define PCI_DEVICE_ID_VIA_8753_0 0x3128 -#define PCI_DEVICE_ID_VIA_8233A 0x3147 -#define PCI_DEVICE_ID_VIA_8703_51_0 0x3148 -#define PCI_DEVICE_ID_VIA_8237_SATA 0x3149 -#define PCI_DEVICE_ID_VIA_XN266 0x3156 -#define PCI_DEVICE_ID_VIA_8754C_0 0x3168 -#define PCI_DEVICE_ID_VIA_8235 0x3177 -#define PCI_DEVICE_ID_VIA_P4N333 0x3178 -#define PCI_DEVICE_ID_VIA_8385_0 0x3188 -#define PCI_DEVICE_ID_VIA_8377_0 0x3189 -#define PCI_DEVICE_ID_VIA_8378_0 0x3205 -#define PCI_DEVICE_ID_VIA_8783_0 0x3208 -#define PCI_DEVICE_ID_VIA_P4M400 0x3209 -#define PCI_DEVICE_ID_VIA_8237 0x3227 -#define PCI_DEVICE_ID_VIA_3296_0 0x0296 -#define PCI_DEVICE_ID_VIA_86C100A 0x6100 -#define PCI_DEVICE_ID_VIA_8231 0x8231 -#define PCI_DEVICE_ID_VIA_8231_4 0x8235 -#define PCI_DEVICE_ID_VIA_8365_1 0x8305 -#define PCI_DEVICE_ID_VIA_8371_1 0x8391 -#define PCI_DEVICE_ID_VIA_8501_1 0x8501 -#define PCI_DEVICE_ID_VIA_82C597_1 0x8597 -#define PCI_DEVICE_ID_VIA_82C598_1 0x8598 -#define PCI_DEVICE_ID_VIA_8601_1 0x8601 -#define PCI_DEVICE_ID_VIA_8505_1 0x8605 -#define PCI_DEVICE_ID_VIA_8633_1 0xB091 -#define PCI_DEVICE_ID_VIA_8367_1 0xB099 -#define PCI_DEVICE_ID_VIA_P4X266_1 0xB101 -#define PCI_DEVICE_ID_VIA_8615_1 0xB103 -#define PCI_DEVICE_ID_VIA_8361_1 0xB112 -#define PCI_DEVICE_ID_VIA_8235_1 0xB168 -#define PCI_DEVICE_ID_VIA_838X_1 0xB188 -#define PCI_DEVICE_ID_VIA_83_87XX_1 0xB198 - -#define PCI_VENDOR_ID_SIEMENS 0x110A -#define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102 - -#define PCI_VENDOR_ID_SMC2 0x1113 -#define PCI_DEVICE_ID_SMC2_1211TX 0x1211 - -#define PCI_VENDOR_ID_VORTEX 0x1119 -#define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000 -#define PCI_DEVICE_ID_VORTEX_GDT6000B 0x0001 -#define PCI_DEVICE_ID_VORTEX_GDT6x10 0x0002 -#define PCI_DEVICE_ID_VORTEX_GDT6x20 0x0003 -#define PCI_DEVICE_ID_VORTEX_GDT6530 0x0004 -#define PCI_DEVICE_ID_VORTEX_GDT6550 0x0005 -#define PCI_DEVICE_ID_VORTEX_GDT6x17 0x0006 -#define PCI_DEVICE_ID_VORTEX_GDT6x27 0x0007 -#define PCI_DEVICE_ID_VORTEX_GDT6537 0x0008 -#define PCI_DEVICE_ID_VORTEX_GDT6557 0x0009 -#define PCI_DEVICE_ID_VORTEX_GDT6x15 0x000a -#define PCI_DEVICE_ID_VORTEX_GDT6x25 0x000b -#define PCI_DEVICE_ID_VORTEX_GDT6535 0x000c -#define PCI_DEVICE_ID_VORTEX_GDT6555 0x000d -#define PCI_DEVICE_ID_VORTEX_GDT6x17RP 0x0100 -#define PCI_DEVICE_ID_VORTEX_GDT6x27RP 0x0101 -#define PCI_DEVICE_ID_VORTEX_GDT6537RP 0x0102 -#define PCI_DEVICE_ID_VORTEX_GDT6557RP 0x0103 -#define PCI_DEVICE_ID_VORTEX_GDT6x11RP 0x0104 -#define PCI_DEVICE_ID_VORTEX_GDT6x21RP 0x0105 -#define PCI_DEVICE_ID_VORTEX_GDT6x17RP1 0x0110 -#define PCI_DEVICE_ID_VORTEX_GDT6x27RP1 0x0111 -#define PCI_DEVICE_ID_VORTEX_GDT6537RP1 0x0112 -#define PCI_DEVICE_ID_VORTEX_GDT6557RP1 0x0113 -#define PCI_DEVICE_ID_VORTEX_GDT6x11RP1 0x0114 -#define PCI_DEVICE_ID_VORTEX_GDT6x21RP1 0x0115 -#define PCI_DEVICE_ID_VORTEX_GDT6x17RP2 0x0120 -#define PCI_DEVICE_ID_VORTEX_GDT6x27RP2 0x0121 -#define PCI_DEVICE_ID_VORTEX_GDT6537RP2 0x0122 -#define PCI_DEVICE_ID_VORTEX_GDT6557RP2 0x0123 -#define PCI_DEVICE_ID_VORTEX_GDT6x11RP2 0x0124 -#define PCI_DEVICE_ID_VORTEX_GDT6x21RP2 0x0125 - -#define PCI_VENDOR_ID_EF 0x111a -#define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000 -#define PCI_DEVICE_ID_EF_ATM_ASIC 0x0002 -#define PCI_VENDOR_ID_EF_ATM_LANAI2 0x0003 -#define PCI_VENDOR_ID_EF_ATM_LANAIHB 0x0005 - -#define PCI_VENDOR_ID_IDT 0x111d -#define PCI_DEVICE_ID_IDT_IDT77201 0x0001 - -#define PCI_VENDOR_ID_FORE 0x1127 -#define PCI_DEVICE_ID_FORE_PCA200PC 0x0210 -#define PCI_DEVICE_ID_FORE_PCA200E 0x0300 - -#define PCI_VENDOR_ID_IMAGINGTECH 0x112f -#define PCI_DEVICE_ID_IMAGINGTECH_ICPCI 0x0000 - -#define PCI_VENDOR_ID_PHILIPS 0x1131 -#define PCI_DEVICE_ID_PHILIPS_ISP1561 0x1561 -#define PCI_DEVICE_ID_PHILIPS_ISP1561_2 0x1562 -#define PCI_DEVICE_ID_PHILIPS_SAA7145 0x7145 -#define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146 -#define PCI_DEVICE_ID_PHILIPS_SAA9730 0x9730 - -#define PCI_VENDOR_ID_EICON 0x1133 -#define PCI_DEVICE_ID_EICON_DIVA20PRO 0xe001 -#define PCI_DEVICE_ID_EICON_DIVA20 0xe002 -#define PCI_DEVICE_ID_EICON_DIVA20PRO_U 0xe003 -#define PCI_DEVICE_ID_EICON_DIVA20_U 0xe004 -#define PCI_DEVICE_ID_EICON_DIVA201 0xe005 -#define PCI_DEVICE_ID_EICON_DIVA202 0xe00b -#define PCI_DEVICE_ID_EICON_MAESTRA 0xe010 -#define PCI_DEVICE_ID_EICON_MAESTRAQ 0xe012 -#define PCI_DEVICE_ID_EICON_MAESTRAQ_U 0xe013 -#define PCI_DEVICE_ID_EICON_MAESTRAP 0xe014 - -#define PCI_VENDOR_ID_ZIATECH 0x1138 -#define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550 - -#define PCI_VENDOR_ID_CYCLONE 0x113c -#define PCI_DEVICE_ID_CYCLONE_SDK 0x0001 - -#define PCI_VENDOR_ID_ALLIANCE 0x1142 -#define PCI_DEVICE_ID_ALLIANCE_PROMOTIO 0x3210 -#define PCI_DEVICE_ID_ALLIANCE_PROVIDEO 0x6422 -#define PCI_DEVICE_ID_ALLIANCE_AT24 0x6424 -#define PCI_DEVICE_ID_ALLIANCE_AT3D 0x643d - -#define PCI_VENDOR_ID_SYSKONNECT 0x1148 -#define PCI_DEVICE_ID_SYSKONNECT_FP 0x4000 -#define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200 -#define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300 -#define PCI_DEVICE_ID_SYSKONNECT_YU 0x4320 -#define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400 -#define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500 - -#define PCI_VENDOR_ID_VMIC 0x114a -#define PCI_DEVICE_ID_VMIC_VME 0x7587 - -#define PCI_VENDOR_ID_DIGI 0x114f -#define PCI_DEVICE_ID_DIGI_EPC 0x0002 -#define PCI_DEVICE_ID_DIGI_RIGHTSWITCH 0x0003 -#define PCI_DEVICE_ID_DIGI_XEM 0x0004 -#define PCI_DEVICE_ID_DIGI_XR 0x0005 -#define PCI_DEVICE_ID_DIGI_CX 0x0006 -#define PCI_DEVICE_ID_DIGI_XRJ 0x0009 -#define PCI_DEVICE_ID_DIGI_EPCJ 0x000a -#define PCI_DEVICE_ID_DIGI_XR_920 0x0027 -#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E 0x0070 -#define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071 -#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_A 0x0072 -#define PCI_DEVICE_ID_DIGI_DF_M_A 0x0073 -#define PCI_DEVICE_ID_NEO_2DB9 0x00C8 -#define PCI_DEVICE_ID_NEO_2DB9PRI 0x00C9 -#define PCI_DEVICE_ID_NEO_2RJ45 0x00CA -#define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB - -#define PCI_VENDOR_ID_MUTECH 0x1159 -#define PCI_DEVICE_ID_MUTECH_MV1000 0x0001 - -#define PCI_VENDOR_ID_XIRCOM 0x115d -#define PCI_DEVICE_ID_XIRCOM_X3201_ETH 0x0003 -#define PCI_DEVICE_ID_XIRCOM_RBM56G 0x0101 -#define PCI_DEVICE_ID_XIRCOM_X3201_MDM 0x0103 - -#define PCI_VENDOR_ID_RENDITION 0x1163 -#define PCI_DEVICE_ID_RENDITION_VERITE 0x0001 -#define PCI_DEVICE_ID_RENDITION_VERITE2100 0x2000 - -#define PCI_VENDOR_ID_SERVERWORKS 0x1166 -#define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008 -#define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 -#define PCI_DEVICE_ID_SERVERWORKS_CIOB30 0x0010 -#define PCI_DEVICE_ID_SERVERWORKS_CMIC_HE 0x0011 -#define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017 -#define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 -#define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 -#define PCI_DEVICE_ID_SERVERWORKS_CSB6 0x0203 -#define PCI_DEVICE_ID_SERVERWORKS_OSB4IDE 0x0211 -#define PCI_DEVICE_ID_SERVERWORKS_CSB5IDE 0x0212 -#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213 -#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217 -#define PCI_DEVICE_ID_SERVERWORKS_OSB4USB 0x0220 -#define PCI_DEVICE_ID_SERVERWORKS_CSB5USB PCI_DEVICE_ID_SERVERWORKS_OSB4USB -#define PCI_DEVICE_ID_SERVERWORKS_CSB6USB 0x0221 -#define PCI_DEVICE_ID_SERVERWORKS_GCLE 0x0225 -#define PCI_DEVICE_ID_SERVERWORKS_GCLE2 0x0227 -#define PCI_DEVICE_ID_SERVERWORKS_CSB5ISA 0x0230 - -#define PCI_VENDOR_ID_SBE 0x1176 -#define PCI_DEVICE_ID_SBE_WANXL100 0x0301 -#define PCI_DEVICE_ID_SBE_WANXL200 0x0302 -#define PCI_DEVICE_ID_SBE_WANXL400 0x0104 - -#define PCI_VENDOR_ID_TOSHIBA 0x1179 -#define PCI_DEVICE_ID_TOSHIBA_PICCOLO 0x0102 -#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0103 -#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0105 -#define PCI_DEVICE_ID_TOSHIBA_601 0x0601 -#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a -#define PCI_DEVICE_ID_TOSHIBA_TOPIC95_A 0x0603 -#define PCI_DEVICE_ID_TOSHIBA_TOPIC95_B 0x060a -#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f -#define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x0617 - -#define PCI_VENDOR_ID_TOSHIBA_2 0x102f -#define PCI_DEVICE_ID_TOSHIBA_TX3927 0x000a -#define PCI_DEVICE_ID_TOSHIBA_TC35815CF 0x0030 -#define PCI_DEVICE_ID_TOSHIBA_TX4927 0x0180 -#define PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC 0x0108 - -#define PCI_VENDOR_ID_RICOH 0x1180 -#define PCI_DEVICE_ID_RICOH_RL5C465 0x0465 -#define PCI_DEVICE_ID_RICOH_RL5C466 0x0466 -#define PCI_DEVICE_ID_RICOH_RL5C475 0x0475 -#define PCI_DEVICE_ID_RICOH_RL5C476 0x0476 -#define PCI_DEVICE_ID_RICOH_RL5C478 0x0478 - -#define PCI_VENDOR_ID_DLINK 0x1186 -#define PCI_DEVICE_ID_DLINK_DGE510T 0x4c00 - -#define PCI_VENDOR_ID_ARTOP 0x1191 -#define PCI_DEVICE_ID_ARTOP_ATP8400 0x0004 -#define PCI_DEVICE_ID_ARTOP_ATP850UF 0x0005 -#define PCI_DEVICE_ID_ARTOP_ATP860 0x0006 -#define PCI_DEVICE_ID_ARTOP_ATP860R 0x0007 -#define PCI_DEVICE_ID_ARTOP_ATP865 0x0008 -#define PCI_DEVICE_ID_ARTOP_ATP865R 0x0009 -#define PCI_DEVICE_ID_ARTOP_AEC7610 0x8002 -#define PCI_DEVICE_ID_ARTOP_AEC7612UW 0x8010 -#define PCI_DEVICE_ID_ARTOP_AEC7612U 0x8020 -#define PCI_DEVICE_ID_ARTOP_AEC7612S 0x8030 -#define PCI_DEVICE_ID_ARTOP_AEC7612D 0x8040 -#define PCI_DEVICE_ID_ARTOP_AEC7612SUW 0x8050 -#define PCI_DEVICE_ID_ARTOP_8060 0x8060 -#define PCI_DEVICE_ID_ARTOP_AEC67160 0x8080 -#define PCI_DEVICE_ID_ARTOP_AEC67160_2 0x8081 -#define PCI_DEVICE_ID_ARTOP_AEC67162 0x808a - -#define PCI_VENDOR_ID_ZEITNET 0x1193 -#define PCI_DEVICE_ID_ZEITNET_1221 0x0001 -#define PCI_DEVICE_ID_ZEITNET_1225 0x0002 - -#define PCI_VENDOR_ID_OMEGA 0x119b -#define PCI_DEVICE_ID_OMEGA_82C092G 0x1221 - -#define PCI_VENDOR_ID_FUJITSU_ME 0x119e -#define PCI_DEVICE_ID_FUJITSU_FS155 0x0001 -#define PCI_DEVICE_ID_FUJITSU_FS50 0x0003 - -#define PCI_SUBVENDOR_ID_KEYSPAN 0x11a9 -#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334 - -#define PCI_VENDOR_ID_MARVELL 0x11ab -#define PCI_DEVICE_ID_MARVELL_GT64011 0x4146 -#define PCI_DEVICE_ID_MARVELL_GT64111 0x4146 -#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430 -#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460 -#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480 -#define PCI_DEVICE_ID_MARVELL_GT96100 0x9652 -#define PCI_DEVICE_ID_MARVELL_GT96100A 0x9653 - -#define PCI_VENDOR_ID_LITEON 0x11ad -#define PCI_DEVICE_ID_LITEON_LNE100TX 0x0002 - -#define PCI_VENDOR_ID_V3 0x11b0 -#define PCI_DEVICE_ID_V3_V960 0x0001 -#define PCI_DEVICE_ID_V3_V350 0x0001 -#define PCI_DEVICE_ID_V3_V961 0x0002 -#define PCI_DEVICE_ID_V3_V351 0x0002 - -#define PCI_VENDOR_ID_NP 0x11bc -#define PCI_DEVICE_ID_NP_PCI_FDDI 0x0001 - -#define PCI_VENDOR_ID_ATT 0x11c1 -#define PCI_DEVICE_ID_ATT_L56XMF 0x0440 -#define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480 - -#define PCI_VENDOR_ID_NEC2 0x11c3 /* NEC (2nd) */ - -#define PCI_VENDOR_ID_SPECIALIX 0x11cb -#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000 -#define PCI_DEVICE_ID_SPECIALIX_XIO 0x4000 -#define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000 -#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004 - -#define PCI_VENDOR_ID_AURAVISION 0x11d1 -#define PCI_DEVICE_ID_AURAVISION_VXP524 0x01f7 - -#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4 -#define PCI_DEVICE_ID_AD1889JS 0x1889 - -#define PCI_VENDOR_ID_IKON 0x11d5 -#define PCI_DEVICE_ID_IKON_10115 0x0115 -#define PCI_DEVICE_ID_IKON_10117 0x0117 - -#define PCI_VENDOR_ID_SEGA 0x11db -#define PCI_DEVICE_ID_SEGA_BBA 0x1234 - -#define PCI_VENDOR_ID_ZORAN 0x11de -#define PCI_DEVICE_ID_ZORAN_36057 0x6057 -#define PCI_DEVICE_ID_ZORAN_36120 0x6120 - -#define PCI_VENDOR_ID_KINETIC 0x11f4 -#define PCI_DEVICE_ID_KINETIC_2915 0x2915 - -#define PCI_VENDOR_ID_COMPEX 0x11f6 -#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112 -#define PCI_DEVICE_ID_COMPEX_RL2000 0x1401 - -#define PCI_VENDOR_ID_RP 0x11fe -#define PCI_DEVICE_ID_RP32INTF 0x0001 -#define PCI_DEVICE_ID_RP8INTF 0x0002 -#define PCI_DEVICE_ID_RP16INTF 0x0003 -#define PCI_DEVICE_ID_RP4QUAD 0x0004 -#define PCI_DEVICE_ID_RP8OCTA 0x0005 -#define PCI_DEVICE_ID_RP8J 0x0006 -#define PCI_DEVICE_ID_RP4J 0x0007 -#define PCI_DEVICE_ID_RP8SNI 0x0008 -#define PCI_DEVICE_ID_RP16SNI 0x0009 -#define PCI_DEVICE_ID_RPP4 0x000A -#define PCI_DEVICE_ID_RPP8 0x000B -#define PCI_DEVICE_ID_RP8M 0x000C -#define PCI_DEVICE_ID_RP4M 0x000D -#define PCI_DEVICE_ID_RP2_232 0x000E -#define PCI_DEVICE_ID_RP2_422 0x000F -#define PCI_DEVICE_ID_URP32INTF 0x0801 -#define PCI_DEVICE_ID_URP8INTF 0x0802 -#define PCI_DEVICE_ID_URP16INTF 0x0803 -#define PCI_DEVICE_ID_URP8OCTA 0x0805 -#define PCI_DEVICE_ID_UPCI_RM3_8PORT 0x080C -#define PCI_DEVICE_ID_UPCI_RM3_4PORT 0x080D -#define PCI_DEVICE_ID_CRP16INTF 0x0903 - -#define PCI_VENDOR_ID_CYCLADES 0x120e -#define PCI_DEVICE_ID_CYCLOM_Y_Lo 0x0100 -#define PCI_DEVICE_ID_CYCLOM_Y_Hi 0x0101 -#define PCI_DEVICE_ID_CYCLOM_4Y_Lo 0x0102 -#define PCI_DEVICE_ID_CYCLOM_4Y_Hi 0x0103 -#define PCI_DEVICE_ID_CYCLOM_8Y_Lo 0x0104 -#define PCI_DEVICE_ID_CYCLOM_8Y_Hi 0x0105 -#define PCI_DEVICE_ID_CYCLOM_Z_Lo 0x0200 -#define PCI_DEVICE_ID_CYCLOM_Z_Hi 0x0201 -#define PCI_DEVICE_ID_PC300_RX_2 0x0300 -#define PCI_DEVICE_ID_PC300_RX_1 0x0301 -#define PCI_DEVICE_ID_PC300_TE_2 0x0310 -#define PCI_DEVICE_ID_PC300_TE_1 0x0311 -#define PCI_DEVICE_ID_PC300_TE_M_2 0x0320 -#define PCI_DEVICE_ID_PC300_TE_M_1 0x0321 - -/* Allied Telesyn */ -#define PCI_VENDOR_ID_AT 0x1259 -#define PCI_SUBDEVICE_ID_AT_2701FX 0x2703 - -#define PCI_VENDOR_ID_ESSENTIAL 0x120f -#define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001 - -#define PCI_VENDOR_ID_O2 0x1217 -#define PCI_DEVICE_ID_O2_6729 0x6729 -#define PCI_DEVICE_ID_O2_6730 0x673a -#define PCI_DEVICE_ID_O2_6832 0x6832 -#define PCI_DEVICE_ID_O2_6836 0x6836 - -#define PCI_VENDOR_ID_3DFX 0x121a -#define PCI_DEVICE_ID_3DFX_VOODOO 0x0001 -#define PCI_DEVICE_ID_3DFX_VOODOO2 0x0002 -#define PCI_DEVICE_ID_3DFX_BANSHEE 0x0003 -#define PCI_DEVICE_ID_3DFX_VOODOO3 0x0005 -#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009 - -#define PCI_VENDOR_ID_SIGMADES 0x1236 -#define PCI_DEVICE_ID_SIGMADES_6425 0x6401 - -#define PCI_VENDOR_ID_CCUBE 0x123f - -#define PCI_VENDOR_ID_AVM 0x1244 -#define PCI_DEVICE_ID_AVM_B1 0x0700 -#define PCI_DEVICE_ID_AVM_C4 0x0800 -#define PCI_DEVICE_ID_AVM_A1 0x0a00 -#define PCI_DEVICE_ID_AVM_A1_V2 0x0e00 -#define PCI_DEVICE_ID_AVM_C2 0x1100 -#define PCI_DEVICE_ID_AVM_T1 0x1200 - -#define PCI_VENDOR_ID_DIPIX 0x1246 - -#define PCI_VENDOR_ID_STALLION 0x124d -#define PCI_DEVICE_ID_STALLION_ECHPCI832 0x0000 -#define PCI_DEVICE_ID_STALLION_ECHPCI864 0x0002 -#define PCI_DEVICE_ID_STALLION_EIOPCI 0x0003 - -#define PCI_VENDOR_ID_OPTIBASE 0x1255 -#define PCI_DEVICE_ID_OPTIBASE_FORGE 0x1110 -#define PCI_DEVICE_ID_OPTIBASE_FUSION 0x1210 -#define PCI_DEVICE_ID_OPTIBASE_VPLEX 0x2110 -#define PCI_DEVICE_ID_OPTIBASE_VPLEXCC 0x2120 -#define PCI_DEVICE_ID_OPTIBASE_VQUEST 0x2130 - -/* Allied Telesyn */ -#define PCI_VENDOR_ID_AT 0x1259 -#define PCI_SUBDEVICE_ID_AT_2700FX 0x2701 -#define PCI_SUBDEVICE_ID_AT_2701FX 0x2703 - -#define PCI_VENDOR_ID_ESS 0x125d -#define PCI_DEVICE_ID_ESS_ESS1968 0x1968 -#define PCI_DEVICE_ID_ESS_AUDIOPCI 0x1969 -#define PCI_DEVICE_ID_ESS_ESS1978 0x1978 - -#define PCI_VENDOR_ID_SATSAGEM 0x1267 -#define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016 -#define PCI_DEVICE_ID_SATSAGEM_PCR2101 0x5352 -#define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b - -#define PCI_VENDOR_ID_SMI 0x126f -#define PCI_DEVICE_ID_SMI_710 0x0710 -#define PCI_DEVICE_ID_SMI_712 0x0712 -#define PCI_DEVICE_ID_SMI_720 0x0720 -#define PCI_DEVICE_ID_SMI_810 0x0810 -#define PCI_DEVICE_ID_SMI_820 0x0810 -#define PCI_DEVICE_ID_SMI_910 0x0910 - -#define PCI_VENDOR_ID_HUGHES 0x1273 -#define PCI_DEVICE_ID_HUGHES_DIRECPC 0x0002 - -#define PCI_VENDOR_ID_ENSONIQ 0x1274 -#define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880 -#define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000 -#define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371 - -#define PCI_VENDOR_ID_TRANSMETA 0x1279 -#define PCI_DEVICE_ID_EFFICEON 0x0060 - -#define PCI_VENDOR_ID_ROCKWELL 0x127A - -#define PCI_VENDOR_ID_ITE 0x1283 -#define PCI_DEVICE_ID_ITE_IT8172G 0x8172 -#define PCI_DEVICE_ID_ITE_IT8172G_AUDIO 0x0801 -#define PCI_DEVICE_ID_ITE_8872 0x8872 -#define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886 - -/* formerly Platform Tech */ -#define PCI_VENDOR_ID_ESS_OLD 0x1285 -#define PCI_DEVICE_ID_ESS_ESS0100 0x0100 - -#define PCI_VENDOR_ID_ALTEON 0x12ae -#define PCI_DEVICE_ID_ALTEON_ACENIC 0x0001 - -#define PCI_VENDOR_ID_USR 0x12B9 - -#define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4 -#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232 0x0001 -#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_232 0x0002 -#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_232 0x0003 -#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485 0x0004 -#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_4_4 0x0005 -#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485 0x0006 -#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_485_2_2 0x0007 -#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH2_485 0x0008 -#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_485_2_6 0x0009 -#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1 0x000A -#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1 0x000B - -#define PCI_VENDOR_ID_PICTUREL 0x12c5 -#define PCI_DEVICE_ID_PICTUREL_PCIVST 0x0081 - -#define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2 -#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018 - -#define PCI_SUBVENDOR_ID_CHASE_PCIFAST 0x12E0 -#define PCI_SUBDEVICE_ID_CHASE_PCIFAST4 0x0031 -#define PCI_SUBDEVICE_ID_CHASE_PCIFAST8 0x0021 -#define PCI_SUBDEVICE_ID_CHASE_PCIFAST16 0x0011 -#define PCI_SUBDEVICE_ID_CHASE_PCIFAST16FMC 0x0041 -#define PCI_SUBVENDOR_ID_CHASE_PCIRAS 0x124D -#define PCI_SUBDEVICE_ID_CHASE_PCIRAS4 0xF001 -#define PCI_SUBDEVICE_ID_CHASE_PCIRAS8 0xF010 - -#define PCI_VENDOR_ID_AUREAL 0x12eb -#define PCI_DEVICE_ID_AUREAL_VORTEX_1 0x0001 -#define PCI_DEVICE_ID_AUREAL_VORTEX_2 0x0002 -#define PCI_DEVICE_ID_AUREAL_ADVANTAGE 0x0003 - -#define PCI_VENDOR_ID_ELECTRONICDESIGNGMBH 0x12f8 -#define PCI_DEVICE_ID_LML_33R10 0x8a02 - -#define PCI_VENDOR_ID_CBOARDS 0x1307 -#define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001 - -#define PCI_VENDOR_ID_SIIG 0x131f -#define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000 -#define PCI_DEVICE_ID_SIIG_1S_10x_650 0x1001 -#define PCI_DEVICE_ID_SIIG_1S_10x_850 0x1002 -#define PCI_DEVICE_ID_SIIG_1S1P_10x_550 0x1010 -#define PCI_DEVICE_ID_SIIG_1S1P_10x_650 0x1011 -#define PCI_DEVICE_ID_SIIG_1S1P_10x_850 0x1012 -#define PCI_DEVICE_ID_SIIG_1P_10x 0x1020 -#define PCI_DEVICE_ID_SIIG_2P_10x 0x1021 -#define PCI_DEVICE_ID_SIIG_2S_10x_550 0x1030 -#define PCI_DEVICE_ID_SIIG_2S_10x_650 0x1031 -#define PCI_DEVICE_ID_SIIG_2S_10x_850 0x1032 -#define PCI_DEVICE_ID_SIIG_2S1P_10x_550 0x1034 -#define PCI_DEVICE_ID_SIIG_2S1P_10x_650 0x1035 -#define PCI_DEVICE_ID_SIIG_2S1P_10x_850 0x1036 -#define PCI_DEVICE_ID_SIIG_4S_10x_550 0x1050 -#define PCI_DEVICE_ID_SIIG_4S_10x_650 0x1051 -#define PCI_DEVICE_ID_SIIG_4S_10x_850 0x1052 -#define PCI_DEVICE_ID_SIIG_1S_20x_550 0x2000 -#define PCI_DEVICE_ID_SIIG_1S_20x_650 0x2001 -#define PCI_DEVICE_ID_SIIG_1S_20x_850 0x2002 -#define PCI_DEVICE_ID_SIIG_1P_20x 0x2020 -#define PCI_DEVICE_ID_SIIG_2P_20x 0x2021 -#define PCI_DEVICE_ID_SIIG_2S_20x_550 0x2030 -#define PCI_DEVICE_ID_SIIG_2S_20x_650 0x2031 -#define PCI_DEVICE_ID_SIIG_2S_20x_850 0x2032 -#define PCI_DEVICE_ID_SIIG_2P1S_20x_550 0x2040 -#define PCI_DEVICE_ID_SIIG_2P1S_20x_650 0x2041 -#define PCI_DEVICE_ID_SIIG_2P1S_20x_850 0x2042 -#define PCI_DEVICE_ID_SIIG_1S1P_20x_550 0x2010 -#define PCI_DEVICE_ID_SIIG_1S1P_20x_650 0x2011 -#define PCI_DEVICE_ID_SIIG_1S1P_20x_850 0x2012 -#define PCI_DEVICE_ID_SIIG_4S_20x_550 0x2050 -#define PCI_DEVICE_ID_SIIG_4S_20x_650 0x2051 -#define PCI_DEVICE_ID_SIIG_4S_20x_850 0x2052 -#define PCI_DEVICE_ID_SIIG_2S1P_20x_550 0x2060 -#define PCI_DEVICE_ID_SIIG_2S1P_20x_650 0x2061 -#define PCI_DEVICE_ID_SIIG_2S1P_20x_850 0x2062 - -#define PCI_VENDOR_ID_RADISYS 0x1331 -#define PCI_DEVICE_ID_RADISYS_ENP2611 0x0030 - -#define PCI_VENDOR_ID_DOMEX 0x134a -#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001 - -#define PCI_VENDOR_ID_QUATECH 0x135C -#define PCI_DEVICE_ID_QUATECH_QSC100 0x0010 -#define PCI_DEVICE_ID_QUATECH_DSC100 0x0020 -#define PCI_DEVICE_ID_QUATECH_DSC200 0x0030 -#define PCI_DEVICE_ID_QUATECH_QSC200 0x0040 -#define PCI_DEVICE_ID_QUATECH_ESC100D 0x0050 -#define PCI_DEVICE_ID_QUATECH_ESC100M 0x0060 - -#define PCI_VENDOR_ID_SEALEVEL 0x135e -#define PCI_DEVICE_ID_SEALEVEL_U530 0x7101 -#define PCI_DEVICE_ID_SEALEVEL_UCOMM2 0x7201 -#define PCI_DEVICE_ID_SEALEVEL_UCOMM422 0x7402 -#define PCI_DEVICE_ID_SEALEVEL_UCOMM232 0x7202 -#define PCI_DEVICE_ID_SEALEVEL_COMM4 0x7401 -#define PCI_DEVICE_ID_SEALEVEL_COMM8 0x7801 -#define PCI_DEVICE_ID_SEALEVEL_UCOMM8 0x7804 - -#define PCI_VENDOR_ID_HYPERCOPE 0x1365 -#define PCI_DEVICE_ID_HYPERCOPE_PLX 0x9050 -#define PCI_SUBDEVICE_ID_HYPERCOPE_OLD_ERGO 0x0104 -#define PCI_SUBDEVICE_ID_HYPERCOPE_ERGO 0x0106 -#define PCI_SUBDEVICE_ID_HYPERCOPE_METRO 0x0107 -#define PCI_SUBDEVICE_ID_HYPERCOPE_CHAMP2 0x0108 -#define PCI_SUBDEVICE_ID_HYPERCOPE_PLEXUS 0x0109 - -#define PCI_VENDOR_ID_KAWASAKI 0x136b -#define PCI_DEVICE_ID_MCHIP_KL5A72002 0xff01 - -#define PCI_VENDOR_ID_CNET 0x1371 -#define PCI_DEVICE_ID_CNET_GIGACARD 0x434e - -#define PCI_VENDOR_ID_LMC 0x1376 -#define PCI_DEVICE_ID_LMC_HSSI 0x0003 -#define PCI_DEVICE_ID_LMC_DS3 0x0004 -#define PCI_DEVICE_ID_LMC_SSI 0x0005 -#define PCI_DEVICE_ID_LMC_T1 0x0006 - -#define PCI_VENDOR_ID_NETGEAR 0x1385 -#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a -#define PCI_DEVICE_ID_NETGEAR_GA622 0x622a - -#define PCI_VENDOR_ID_APPLICOM 0x1389 -#define PCI_DEVICE_ID_APPLICOM_PCIGENERIC 0x0001 -#define PCI_DEVICE_ID_APPLICOM_PCI2000IBS_CAN 0x0002 -#define PCI_DEVICE_ID_APPLICOM_PCI2000PFB 0x0003 - -#define PCI_VENDOR_ID_MOXA 0x1393 -#define PCI_DEVICE_ID_MOXA_RC7000 0x0001 -#define PCI_DEVICE_ID_MOXA_CP102 0x1020 -#define PCI_DEVICE_ID_MOXA_CP102UL 0x1021 -#define PCI_DEVICE_ID_MOXA_CP102U 0x1022 -#define PCI_DEVICE_ID_MOXA_C104 0x1040 -#define PCI_DEVICE_ID_MOXA_CP104U 0x1041 -#define PCI_DEVICE_ID_MOXA_CP104JU 0x1042 -#define PCI_DEVICE_ID_MOXA_CT114 0x1140 -#define PCI_DEVICE_ID_MOXA_CP114 0x1141 -#define PCI_DEVICE_ID_MOXA_CP118U 0x1180 -#define PCI_DEVICE_ID_MOXA_CP132 0x1320 -#define PCI_DEVICE_ID_MOXA_CP132U 0x1321 -#define PCI_DEVICE_ID_MOXA_CP134U 0x1340 -#define PCI_DEVICE_ID_MOXA_C168 0x1680 -#define PCI_DEVICE_ID_MOXA_CP168U 0x1681 -#define PCI_DEVICE_ID_MOXA_CP204J 0x2040 -#define PCI_DEVICE_ID_MOXA_C218 0x2180 -#define PCI_DEVICE_ID_MOXA_C320 0x3200 - -#define PCI_VENDOR_ID_CCD 0x1397 -#define PCI_DEVICE_ID_CCD_2BD0 0x2bd0 -#define PCI_DEVICE_ID_CCD_B000 0xb000 -#define PCI_DEVICE_ID_CCD_B006 0xb006 -#define PCI_DEVICE_ID_CCD_B007 0xb007 -#define PCI_DEVICE_ID_CCD_B008 0xb008 -#define PCI_DEVICE_ID_CCD_B009 0xb009 -#define PCI_DEVICE_ID_CCD_B00A 0xb00a -#define PCI_DEVICE_ID_CCD_B00B 0xb00b -#define PCI_DEVICE_ID_CCD_B00C 0xb00c -#define PCI_DEVICE_ID_CCD_B100 0xb100 - -#define PCI_VENDOR_ID_EXAR 0x13a8 -#define PCI_DEVICE_ID_EXAR_XR17C152 0x0152 -#define PCI_DEVICE_ID_EXAR_XR17C154 0x0154 -#define PCI_DEVICE_ID_EXAR_XR17C158 0x0158 - -#define PCI_VENDOR_ID_MICROGATE 0x13c0 -#define PCI_DEVICE_ID_MICROGATE_USC 0x0010 -#define PCI_DEVICE_ID_MICROGATE_SCC 0x0020 -#define PCI_DEVICE_ID_MICROGATE_SCA 0x0030 -#define PCI_DEVICE_ID_MICROGATE_USC2 0x0210 - -#define PCI_VENDOR_ID_3WARE 0x13C1 -#define PCI_DEVICE_ID_3WARE_1000 0x1000 -#define PCI_DEVICE_ID_3WARE_7000 0x1001 -#define PCI_DEVICE_ID_3WARE_9000 0x1002 - -#define PCI_VENDOR_ID_IOMEGA 0x13ca -#define PCI_DEVICE_ID_IOMEGA_BUZ 0x4231 - -#define PCI_VENDOR_ID_ABOCOM 0x13D1 -#define PCI_DEVICE_ID_ABOCOM_2BD1 0x2BD1 - -#define PCI_VENDOR_ID_CMEDIA 0x13f6 -#define PCI_DEVICE_ID_CMEDIA_CM8338A 0x0100 -#define PCI_DEVICE_ID_CMEDIA_CM8338B 0x0101 -#define PCI_DEVICE_ID_CMEDIA_CM8738 0x0111 -#define PCI_DEVICE_ID_CMEDIA_CM8738B 0x0112 - -#define PCI_VENDOR_ID_LAVA 0x1407 -#define PCI_DEVICE_ID_LAVA_DSERIAL 0x0100 /* 2x 16550 */ -#define PCI_DEVICE_ID_LAVA_QUATRO_A 0x0101 /* 2x 16550, half of 4 port */ -#define PCI_DEVICE_ID_LAVA_QUATRO_B 0x0102 /* 2x 16550, half of 4 port */ -#define PCI_DEVICE_ID_LAVA_OCTO_A 0x0180 /* 4x 16550A, half of 8 port */ -#define PCI_DEVICE_ID_LAVA_OCTO_B 0x0181 /* 4x 16550A, half of 8 port */ -#define PCI_DEVICE_ID_LAVA_PORT_PLUS 0x0200 /* 2x 16650 */ -#define PCI_DEVICE_ID_LAVA_QUAD_A 0x0201 /* 2x 16650, half of 4 port */ -#define PCI_DEVICE_ID_LAVA_QUAD_B 0x0202 /* 2x 16650, half of 4 port */ -#define PCI_DEVICE_ID_LAVA_SSERIAL 0x0500 /* 1x 16550 */ -#define PCI_DEVICE_ID_LAVA_PORT_650 0x0600 /* 1x 16650 */ -#define PCI_DEVICE_ID_LAVA_PARALLEL 0x8000 -#define PCI_DEVICE_ID_LAVA_DUAL_PAR_A 0x8002 /* The Lava Dual Parallel is */ -#define PCI_DEVICE_ID_LAVA_DUAL_PAR_B 0x8003 /* two PCI devices on a card */ -#define PCI_DEVICE_ID_LAVA_BOCA_IOPPAR 0x8800 - -#define PCI_VENDOR_ID_TIMEDIA 0x1409 -#define PCI_DEVICE_ID_TIMEDIA_1889 0x7168 - -#define PCI_VENDOR_ID_OXSEMI 0x1415 -#define PCI_DEVICE_ID_OXSEMI_12PCI840 0x8403 -#define PCI_DEVICE_ID_OXSEMI_16PCI954 0x9501 -#define PCI_DEVICE_ID_OXSEMI_16PCI95N 0x9511 -#define PCI_DEVICE_ID_OXSEMI_16PCI954PP 0x9513 -#define PCI_DEVICE_ID_OXSEMI_16PCI952 0x9521 - -#define PCI_VENDOR_ID_SAMSUNG 0x144d - -#define PCI_VENDOR_ID_AIRONET 0x14b9 -#define PCI_DEVICE_ID_AIRONET_4800_1 0x0001 -#define PCI_DEVICE_ID_AIRONET_4800 0x4500 // values switched? see -#define PCI_DEVICE_ID_AIRONET_4500 0x4800 // drivers/net/aironet4500_card.c - -#define PCI_VENDOR_ID_TITAN 0x14D2 -#define PCI_DEVICE_ID_TITAN_010L 0x8001 -#define PCI_DEVICE_ID_TITAN_100L 0x8010 -#define PCI_DEVICE_ID_TITAN_110L 0x8011 -#define PCI_DEVICE_ID_TITAN_200L 0x8020 -#define PCI_DEVICE_ID_TITAN_210L 0x8021 -#define PCI_DEVICE_ID_TITAN_400L 0x8040 -#define PCI_DEVICE_ID_TITAN_800L 0x8080 -#define PCI_DEVICE_ID_TITAN_100 0xA001 -#define PCI_DEVICE_ID_TITAN_200 0xA005 -#define PCI_DEVICE_ID_TITAN_400 0xA003 -#define PCI_DEVICE_ID_TITAN_800B 0xA004 - -#define PCI_VENDOR_ID_PANACOM 0x14d4 -#define PCI_DEVICE_ID_PANACOM_QUADMODEM 0x0400 -#define PCI_DEVICE_ID_PANACOM_DUALMODEM 0x0402 - -#define PCI_VENDOR_ID_SIPACKETS 0x14d9 -#define PCI_DEVICE_ID_SP_HT 0x0010 - -#define PCI_VENDOR_ID_AFAVLAB 0x14db -#define PCI_DEVICE_ID_AFAVLAB_P028 0x2180 -#define PCI_DEVICE_ID_AFAVLAB_P030 0x2182 - -#define PCI_VENDOR_ID_BROADCOM 0x14e4 -#define PCI_DEVICE_ID_TIGON3_5752 0x1600 -#define PCI_DEVICE_ID_TIGON3_5752M 0x1601 -#define PCI_DEVICE_ID_TIGON3_5700 0x1644 -#define PCI_DEVICE_ID_TIGON3_5701 0x1645 -#define PCI_DEVICE_ID_TIGON3_5702 0x1646 -#define PCI_DEVICE_ID_TIGON3_5703 0x1647 -#define PCI_DEVICE_ID_TIGON3_5704 0x1648 -#define PCI_DEVICE_ID_TIGON3_5704S_2 0x1649 -#define PCI_DEVICE_ID_NX2_5706 0x164a -#define PCI_DEVICE_ID_TIGON3_5702FE 0x164d -#define PCI_DEVICE_ID_TIGON3_5705 0x1653 -#define PCI_DEVICE_ID_TIGON3_5705_2 0x1654 -#define PCI_DEVICE_ID_TIGON3_5720 0x1658 -#define PCI_DEVICE_ID_TIGON3_5721 0x1659 -#define PCI_DEVICE_ID_TIGON3_5705M 0x165d -#define PCI_DEVICE_ID_TIGON3_5705M_2 0x165e -#define PCI_DEVICE_ID_TIGON3_5705F 0x166e -#define PCI_DEVICE_ID_TIGON3_5750 0x1676 -#define PCI_DEVICE_ID_TIGON3_5751 0x1677 -#define PCI_DEVICE_ID_TIGON3_5750M 0x167c -#define PCI_DEVICE_ID_TIGON3_5751M 0x167d -#define PCI_DEVICE_ID_TIGON3_5751F 0x167e -#define PCI_DEVICE_ID_TIGON3_5782 0x1696 -#define PCI_DEVICE_ID_TIGON3_5788 0x169c -#define PCI_DEVICE_ID_TIGON3_5789 0x169d -#define PCI_DEVICE_ID_TIGON3_5702X 0x16a6 -#define PCI_DEVICE_ID_TIGON3_5703X 0x16a7 -#define PCI_DEVICE_ID_TIGON3_5704S 0x16a8 -#define PCI_DEVICE_ID_NX2_5706S 0x16aa -#define PCI_DEVICE_ID_TIGON3_5702A3 0x16c6 -#define PCI_DEVICE_ID_TIGON3_5703A3 0x16c7 -#define PCI_DEVICE_ID_TIGON3_5781 0x16dd -#define PCI_DEVICE_ID_TIGON3_5753 0x16f7 -#define PCI_DEVICE_ID_TIGON3_5753M 0x16fd -#define PCI_DEVICE_ID_TIGON3_5753F 0x16fe -#define PCI_DEVICE_ID_TIGON3_5901 0x170d -#define PCI_DEVICE_ID_BCM4401B1 0x170c -#define PCI_DEVICE_ID_TIGON3_5901_2 0x170e -#define PCI_DEVICE_ID_BCM4401 0x4401 -#define PCI_DEVICE_ID_BCM4401B0 0x4402 - -#define PCI_VENDOR_ID_TOPIC 0x151f -#define PCI_DEVICE_ID_TOPIC_TP560 0x0000 - -#define PCI_VENDOR_ID_ENE 0x1524 -#define PCI_DEVICE_ID_ENE_1211 0x1211 -#define PCI_DEVICE_ID_ENE_1225 0x1225 -#define PCI_DEVICE_ID_ENE_1410 0x1410 -#define PCI_DEVICE_ID_ENE_1420 0x1420 - -#define PCI_VENDOR_ID_SYBA 0x1592 -#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782 -#define PCI_DEVICE_ID_SYBA_1P_ECP 0x0783 - -#define PCI_VENDOR_ID_MORETON 0x15aa -#define PCI_DEVICE_ID_RASTEL_2PORT 0x2000 - -#define PCI_VENDOR_ID_ZOLTRIX 0x15b0 -#define PCI_DEVICE_ID_ZOLTRIX_2BD0 0x2bd0 - -#define PCI_VENDOR_ID_MELLANOX 0x15b3 -#define PCI_DEVICE_ID_MELLANOX_TAVOR 0x5a44 -#define PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT 0x6278 -#define PCI_DEVICE_ID_MELLANOX_ARBEL 0x6282 -#define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c -#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 - -#define PCI_VENDOR_ID_PDC 0x15e9 -#define PCI_DEVICE_ID_PDC_1841 0x1841 - -#define PCI_VENDOR_ID_MACROLINK 0x15ed -#define PCI_DEVICE_ID_MACROLINK_MCCS8 0x1000 -#define PCI_DEVICE_ID_MACROLINK_MCCS 0x1001 -#define PCI_DEVICE_ID_MACROLINK_MCCS8H 0x1002 -#define PCI_DEVICE_ID_MACROLINK_MCCSH 0x1003 -#define PCI_DEVICE_ID_MACROLINK_MCCR8 0x2000 -#define PCI_DEVICE_ID_MACROLINK_MCCR 0x2001 - -#define PCI_VENDOR_ID_FARSITE 0x1619 -#define PCI_DEVICE_ID_FARSITE_T2P 0x0400 -#define PCI_DEVICE_ID_FARSITE_T4P 0x0440 -#define PCI_DEVICE_ID_FARSITE_T1U 0x0610 -#define PCI_DEVICE_ID_FARSITE_T2U 0x0620 -#define PCI_DEVICE_ID_FARSITE_T4U 0x0640 -#define PCI_DEVICE_ID_FARSITE_TE1 0x1610 -#define PCI_DEVICE_ID_FARSITE_TE1C 0x1612 - -#define PCI_VENDOR_ID_SIBYTE 0x166d -#define PCI_DEVICE_ID_BCM1250_HT 0x0002 - -#define PCI_VENDOR_ID_LINKSYS 0x1737 -#define PCI_DEVICE_ID_LINKSYS_EG1032 0x1032 -#define PCI_DEVICE_ID_LINKSYS_EG1064 0x1064 - -#define PCI_VENDOR_ID_ALTIMA 0x173b -#define PCI_DEVICE_ID_ALTIMA_AC1000 0x03e8 -#define PCI_DEVICE_ID_ALTIMA_AC1001 0x03e9 -#define PCI_DEVICE_ID_ALTIMA_AC9100 0x03ea -#define PCI_DEVICE_ID_ALTIMA_AC1003 0x03eb - -#define PCI_VENDOR_ID_S2IO 0x17d5 -#define PCI_DEVICE_ID_S2IO_WIN 0x5731 -#define PCI_DEVICE_ID_S2IO_UNI 0x5831 -#define PCI_DEVICE_ID_HERC_WIN 0x5732 -#define PCI_DEVICE_ID_HERC_UNI 0x5832 - -#define PCI_VENDOR_ID_INFINICON 0x1820 - -#define PCI_VENDOR_ID_TOPSPIN 0x1867 - -#define PCI_VENDOR_ID_TDI 0x192E -#define PCI_DEVICE_ID_TDI_EHCI 0x0101 - -#define PCI_VENDOR_ID_SYMPHONY 0x1c1c -#define PCI_DEVICE_ID_SYMPHONY_101 0x0001 - -#define PCI_VENDOR_ID_TEKRAM 0x1de1 -#define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 - -#define PCI_VENDOR_ID_HINT 0x3388 -#define PCI_DEVICE_ID_HINT_VXPROII_IDE 0x8013 - -#define PCI_VENDOR_ID_3DLABS 0x3d3d -#define PCI_DEVICE_ID_3DLABS_300SX 0x0001 -#define PCI_DEVICE_ID_3DLABS_500TX 0x0002 -#define PCI_DEVICE_ID_3DLABS_DELTA 0x0003 -#define PCI_DEVICE_ID_3DLABS_PERMEDIA 0x0004 -#define PCI_DEVICE_ID_3DLABS_MX 0x0006 -#define PCI_DEVICE_ID_3DLABS_PERMEDIA2 0x0007 -#define PCI_DEVICE_ID_3DLABS_GAMMA 0x0008 -#define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009 - -#define PCI_VENDOR_ID_AVANCE 0x4005 -#define PCI_DEVICE_ID_AVANCE_ALG2064 0x2064 -#define PCI_DEVICE_ID_AVANCE_2302 0x2302 - -#define PCI_VENDOR_ID_AKS 0x416c -#define PCI_DEVICE_ID_AKS_ALADDINCARD 0x0100 -#define PCI_DEVICE_ID_AKS_CPC 0x0200 - -#define PCI_VENDOR_ID_REDCREEK 0x4916 -#define PCI_DEVICE_ID_RC45 0x1960 - -#define PCI_VENDOR_ID_NETVIN 0x4a14 -#define PCI_DEVICE_ID_NETVIN_NV5000SC 0x5000 - -#define PCI_VENDOR_ID_S3 0x5333 -#define PCI_DEVICE_ID_S3_PLATO_PXS 0x0551 -#define PCI_DEVICE_ID_S3_ViRGE 0x5631 -#define PCI_DEVICE_ID_S3_TRIO 0x8811 -#define PCI_DEVICE_ID_S3_AURORA64VP 0x8812 -#define PCI_DEVICE_ID_S3_TRIO64UVP 0x8814 -#define PCI_DEVICE_ID_S3_ViRGE_VX 0x883d -#define PCI_DEVICE_ID_S3_868 0x8880 -#define PCI_DEVICE_ID_S3_928 0x88b0 -#define PCI_DEVICE_ID_S3_864_1 0x88c0 -#define PCI_DEVICE_ID_S3_864_2 0x88c1 -#define PCI_DEVICE_ID_S3_964_1 0x88d0 -#define PCI_DEVICE_ID_S3_964_2 0x88d1 -#define PCI_DEVICE_ID_S3_968 0x88f0 -#define PCI_DEVICE_ID_S3_TRIO64V2 0x8901 -#define PCI_DEVICE_ID_S3_PLATO_PXG 0x8902 -#define PCI_DEVICE_ID_S3_ViRGE_DXGX 0x8a01 -#define PCI_DEVICE_ID_S3_ViRGE_GX2 0x8a10 -#define PCI_DEVICE_ID_S3_SAVAGE4 0x8a25 -#define PCI_DEVICE_ID_S3_ViRGE_MX 0x8c01 -#define PCI_DEVICE_ID_S3_ViRGE_MXP 0x8c02 -#define PCI_DEVICE_ID_S3_ViRGE_MXPMV 0x8c03 -#define PCI_DEVICE_ID_S3_PROSAVAGE8 0x8d04 -#define PCI_DEVICE_ID_S3_SONICVIBES 0xca00 - -#define PCI_VENDOR_ID_DUNORD 0x5544 -#define PCI_DEVICE_ID_DUNORD_I3000 0x0001 - -#define PCI_VENDOR_ID_DCI 0x6666 -#define PCI_DEVICE_ID_DCI_PCCOM4 0x0001 -#define PCI_DEVICE_ID_DCI_PCCOM8 0x0002 - -#define PCI_VENDOR_ID_DUNORD 0x5544 -#define PCI_DEVICE_ID_DUNORD_I3000 0x0001 - -#define PCI_VENDOR_ID_GENROCO 0x5555 -#define PCI_DEVICE_ID_GENROCO_HFP832 0x0003 - -#define PCI_VENDOR_ID_INTEL 0x8086 -#define PCI_DEVICE_ID_INTEL_EESSC 0x0008 -#define PCI_DEVICE_ID_INTEL_21145 0x0039 -#define PCI_DEVICE_ID_INTEL_82375 0x0482 -#define PCI_DEVICE_ID_INTEL_82424 0x0483 -#define PCI_DEVICE_ID_INTEL_82378 0x0484 -#define PCI_DEVICE_ID_INTEL_82430 0x0486 -#define PCI_DEVICE_ID_INTEL_82434 0x04a3 -#define PCI_DEVICE_ID_INTEL_I960 0x0960 -#define PCI_DEVICE_ID_INTEL_I960RM 0x0962 -#define PCI_DEVICE_ID_INTEL_82562ET 0x1031 -#define PCI_DEVICE_ID_INTEL_82801CAM 0x1038 -#define PCI_DEVICE_ID_INTEL_82815_MC 0x1130 -#define PCI_DEVICE_ID_INTEL_82815_AB 0x1131 -#define PCI_DEVICE_ID_INTEL_82815_CGC 0x1132 -#define PCI_DEVICE_ID_INTEL_82559ER 0x1209 -#define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221 -#define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222 -#define PCI_DEVICE_ID_INTEL_7116 0x1223 -#define PCI_DEVICE_ID_INTEL_7505_0 0x2550 -#define PCI_DEVICE_ID_INTEL_7505_1 0x2552 -#define PCI_DEVICE_ID_INTEL_7205_0 0x255d -#define PCI_DEVICE_ID_INTEL_82596 0x1226 -#define PCI_DEVICE_ID_INTEL_82865 0x1227 -#define PCI_DEVICE_ID_INTEL_82557 0x1229 -#define PCI_DEVICE_ID_INTEL_82437 0x122d -#define PCI_DEVICE_ID_INTEL_82371FB_0 0x122e -#define PCI_DEVICE_ID_INTEL_82371FB_1 0x1230 -#define PCI_DEVICE_ID_INTEL_82371MX 0x1234 -#define PCI_DEVICE_ID_INTEL_82437MX 0x1235 -#define PCI_DEVICE_ID_INTEL_82441 0x1237 -#define PCI_DEVICE_ID_INTEL_82380FB 0x124b -#define PCI_DEVICE_ID_INTEL_82439 0x1250 -#define PCI_DEVICE_ID_INTEL_80960_RP 0x1960 -#define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21 -#define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30 -#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 -#define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411 -#define PCI_DEVICE_ID_INTEL_82801AA_2 0x2412 -#define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413 -#define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415 -#define PCI_DEVICE_ID_INTEL_82801AA_6 0x2416 -#define PCI_DEVICE_ID_INTEL_82801AA_8 0x2418 -#define PCI_DEVICE_ID_INTEL_82801AB_0 0x2420 -#define PCI_DEVICE_ID_INTEL_82801AB_1 0x2421 -#define PCI_DEVICE_ID_INTEL_82801AB_2 0x2422 -#define PCI_DEVICE_ID_INTEL_82801AB_3 0x2423 -#define PCI_DEVICE_ID_INTEL_82801AB_5 0x2425 -#define PCI_DEVICE_ID_INTEL_82801AB_6 0x2426 -#define PCI_DEVICE_ID_INTEL_82801AB_8 0x2428 -#define PCI_DEVICE_ID_INTEL_82801BA_0 0x2440 -#define PCI_DEVICE_ID_INTEL_82801BA_1 0x2442 -#define PCI_DEVICE_ID_INTEL_82801BA_2 0x2443 -#define PCI_DEVICE_ID_INTEL_82801BA_3 0x2444 -#define PCI_DEVICE_ID_INTEL_82801BA_4 0x2445 -#define PCI_DEVICE_ID_INTEL_82801BA_5 0x2446 -#define PCI_DEVICE_ID_INTEL_82801BA_6 0x2448 -#define PCI_DEVICE_ID_INTEL_82801BA_7 0x2449 -#define PCI_DEVICE_ID_INTEL_82801BA_8 0x244a -#define PCI_DEVICE_ID_INTEL_82801BA_9 0x244b -#define PCI_DEVICE_ID_INTEL_82801BA_10 0x244c -#define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e -#define PCI_DEVICE_ID_INTEL_82801E_0 0x2450 -#define PCI_DEVICE_ID_INTEL_82801E_2 0x2452 -#define PCI_DEVICE_ID_INTEL_82801E_3 0x2453 -#define PCI_DEVICE_ID_INTEL_82801E_9 0x2459 -#define PCI_DEVICE_ID_INTEL_82801E_11 0x245b -#define PCI_DEVICE_ID_INTEL_82801E_13 0x245d -#define PCI_DEVICE_ID_INTEL_82801E_14 0x245e -#define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480 -#define PCI_DEVICE_ID_INTEL_82801CA_2 0x2482 -#define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483 -#define PCI_DEVICE_ID_INTEL_82801CA_4 0x2484 -#define PCI_DEVICE_ID_INTEL_82801CA_5 0x2485 -#define PCI_DEVICE_ID_INTEL_82801CA_6 0x2486 -#define PCI_DEVICE_ID_INTEL_82801CA_7 0x2487 -#define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a -#define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b -#define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c -#define PCI_DEVICE_ID_INTEL_82801DB_0 0x24c0 -#define PCI_DEVICE_ID_INTEL_82801DB_1 0x24c1 -#define PCI_DEVICE_ID_INTEL_82801DB_2 0x24c2 -#define PCI_DEVICE_ID_INTEL_82801DB_3 0x24c3 -#define PCI_DEVICE_ID_INTEL_82801DB_4 0x24c4 -#define PCI_DEVICE_ID_INTEL_82801DB_5 0x24c5 -#define PCI_DEVICE_ID_INTEL_82801DB_6 0x24c6 -#define PCI_DEVICE_ID_INTEL_82801DB_7 0x24c7 -#define PCI_DEVICE_ID_INTEL_82801DB_9 0x24c9 -#define PCI_DEVICE_ID_INTEL_82801DB_10 0x24ca -#define PCI_DEVICE_ID_INTEL_82801DB_11 0x24cb -#define PCI_DEVICE_ID_INTEL_82801DB_12 0x24cc -#define PCI_DEVICE_ID_INTEL_82801DB_13 0x24cd -#define PCI_DEVICE_ID_INTEL_82801EB_0 0x24d0 -#define PCI_DEVICE_ID_INTEL_82801EB_1 0x24d1 -#define PCI_DEVICE_ID_INTEL_82801EB_2 0x24d2 -#define PCI_DEVICE_ID_INTEL_82801EB_3 0x24d3 -#define PCI_DEVICE_ID_INTEL_82801EB_4 0x24d4 -#define PCI_DEVICE_ID_INTEL_82801EB_5 0x24d5 -#define PCI_DEVICE_ID_INTEL_82801EB_6 0x24d6 -#define PCI_DEVICE_ID_INTEL_82801EB_7 0x24d7 -#define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db -#define PCI_DEVICE_ID_INTEL_82801EB_13 0x24dd -#define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1 -#define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2 -#define PCI_DEVICE_ID_INTEL_ESB_3 0x25a3 -#define PCI_DEVICE_ID_INTEL_ESB_31 0x25b0 -#define PCI_DEVICE_ID_INTEL_ESB_4 0x25a4 -#define PCI_DEVICE_ID_INTEL_ESB_5 0x25a6 -#define PCI_DEVICE_ID_INTEL_ESB_6 0x25a7 -#define PCI_DEVICE_ID_INTEL_ESB_7 0x25a9 -#define PCI_DEVICE_ID_INTEL_ESB_8 0x25aa -#define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab -#define PCI_DEVICE_ID_INTEL_ESB_11 0x25ac -#define PCI_DEVICE_ID_INTEL_ESB_12 0x25ad -#define PCI_DEVICE_ID_INTEL_ESB_13 0x25ae -#define PCI_DEVICE_ID_INTEL_82820_HB 0x2500 -#define PCI_DEVICE_ID_INTEL_82820_UP_HB 0x2501 -#define PCI_DEVICE_ID_INTEL_82850_HB 0x2530 -#define PCI_DEVICE_ID_INTEL_82860_HB 0x2531 -#define PCI_DEVICE_ID_INTEL_82845G_HB 0x2560 -#define PCI_DEVICE_ID_INTEL_82845G_IG 0x2562 -#define PCI_DEVICE_ID_INTEL_82865_HB 0x2570 -#define PCI_DEVICE_ID_INTEL_82865_IG 0x2572 -#define PCI_DEVICE_ID_INTEL_82875_HB 0x2578 -#define PCI_DEVICE_ID_INTEL_82875_IG 0x257b -#define PCI_DEVICE_ID_INTEL_82915G_HB 0x2580 -#define PCI_DEVICE_ID_INTEL_82915G_IG 0x2582 -#define PCI_DEVICE_ID_INTEL_82915GM_HB 0x2590 -#define PCI_DEVICE_ID_INTEL_82915GM_IG 0x2592 -#define PCI_DEVICE_ID_INTEL_82945G_HB 0x2770 -#define PCI_DEVICE_ID_INTEL_82945G_IG 0x2772 -#define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640 -#define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641 -#define PCI_DEVICE_ID_INTEL_ICH6_2 0x2642 -#define PCI_DEVICE_ID_INTEL_ICH6_3 0x2651 -#define PCI_DEVICE_ID_INTEL_ICH6_4 0x2652 -#define PCI_DEVICE_ID_INTEL_ICH6_5 0x2653 -#define PCI_DEVICE_ID_INTEL_ICH6_6 0x2658 -#define PCI_DEVICE_ID_INTEL_ICH6_7 0x2659 -#define PCI_DEVICE_ID_INTEL_ICH6_8 0x265a -#define PCI_DEVICE_ID_INTEL_ICH6_9 0x265b -#define PCI_DEVICE_ID_INTEL_ICH6_10 0x265c -#define PCI_DEVICE_ID_INTEL_ICH6_11 0x2660 -#define PCI_DEVICE_ID_INTEL_ICH6_12 0x2662 -#define PCI_DEVICE_ID_INTEL_ICH6_13 0x2664 -#define PCI_DEVICE_ID_INTEL_ICH6_14 0x2666 -#define PCI_DEVICE_ID_INTEL_ICH6_15 0x2668 -#define PCI_DEVICE_ID_INTEL_ICH6_16 0x266a -#define PCI_DEVICE_ID_INTEL_ICH6_17 0x266d -#define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e -#define PCI_DEVICE_ID_INTEL_ICH6_19 0x266f -#define PCI_DEVICE_ID_INTEL_ESB2_0 0x2670 -#define PCI_DEVICE_ID_INTEL_ESB2_1 0x2680 -#define PCI_DEVICE_ID_INTEL_ESB2_2 0x2681 -#define PCI_DEVICE_ID_INTEL_ESB2_3 0x2682 -#define PCI_DEVICE_ID_INTEL_ESB2_4 0x2683 -#define PCI_DEVICE_ID_INTEL_ESB2_5 0x2688 -#define PCI_DEVICE_ID_INTEL_ESB2_6 0x2689 -#define PCI_DEVICE_ID_INTEL_ESB2_7 0x268a -#define PCI_DEVICE_ID_INTEL_ESB2_8 0x268b -#define PCI_DEVICE_ID_INTEL_ESB2_9 0x268c -#define PCI_DEVICE_ID_INTEL_ESB2_10 0x2690 -#define PCI_DEVICE_ID_INTEL_ESB2_11 0x2692 -#define PCI_DEVICE_ID_INTEL_ESB2_12 0x2694 -#define PCI_DEVICE_ID_INTEL_ESB2_13 0x2696 -#define PCI_DEVICE_ID_INTEL_ESB2_14 0x2698 -#define PCI_DEVICE_ID_INTEL_ESB2_15 0x2699 -#define PCI_DEVICE_ID_INTEL_ESB2_16 0x269a -#define PCI_DEVICE_ID_INTEL_ESB2_17 0x269b -#define PCI_DEVICE_ID_INTEL_ESB2_18 0x269e -#define PCI_DEVICE_ID_INTEL_ICH7_0 0x27b8 -#define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b9 -#define PCI_DEVICE_ID_INTEL_ICH7_2 0x27c0 -#define PCI_DEVICE_ID_INTEL_ICH7_3 0x27c1 -#define PCI_DEVICE_ID_INTEL_ICH7_30 0x27b0 -#define PCI_DEVICE_ID_INTEL_ICH7_31 0x27bd -#define PCI_DEVICE_ID_INTEL_ICH7_5 0x27c4 -#define PCI_DEVICE_ID_INTEL_ICH7_6 0x27c5 -#define PCI_DEVICE_ID_INTEL_ICH7_7 0x27c8 -#define PCI_DEVICE_ID_INTEL_ICH7_8 0x27c9 -#define PCI_DEVICE_ID_INTEL_ICH7_9 0x27ca -#define PCI_DEVICE_ID_INTEL_ICH7_10 0x27cb -#define PCI_DEVICE_ID_INTEL_ICH7_11 0x27cc -#define PCI_DEVICE_ID_INTEL_ICH7_12 0x27d0 -#define PCI_DEVICE_ID_INTEL_ICH7_13 0x27d2 -#define PCI_DEVICE_ID_INTEL_ICH7_14 0x27d4 -#define PCI_DEVICE_ID_INTEL_ICH7_15 0x27d6 -#define PCI_DEVICE_ID_INTEL_ICH7_16 0x27d8 -#define PCI_DEVICE_ID_INTEL_ICH7_17 0x27da -#define PCI_DEVICE_ID_INTEL_ICH7_18 0x27dc -#define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd -#define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de -#define PCI_DEVICE_ID_INTEL_ICH7_21 0x27df -#define PCI_DEVICE_ID_INTEL_ICH7_22 0x27e0 -#define PCI_DEVICE_ID_INTEL_ICH7_23 0x27e2 -#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 -#define PCI_DEVICE_ID_INTEL_ESB2_19 0x3500 -#define PCI_DEVICE_ID_INTEL_ESB2_20 0x3501 -#define PCI_DEVICE_ID_INTEL_ESB2_21 0x3504 -#define PCI_DEVICE_ID_INTEL_ESB2_22 0x3505 -#define PCI_DEVICE_ID_INTEL_ESB2_23 0x350c -#define PCI_DEVICE_ID_INTEL_ESB2_24 0x350d -#define PCI_DEVICE_ID_INTEL_ESB2_25 0x3510 -#define PCI_DEVICE_ID_INTEL_ESB2_26 0x3511 -#define PCI_DEVICE_ID_INTEL_ESB2_27 0x3514 -#define PCI_DEVICE_ID_INTEL_ESB2_28 0x3515 -#define PCI_DEVICE_ID_INTEL_ESB2_29 0x3518 -#define PCI_DEVICE_ID_INTEL_ESB2_30 0x3519 -#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 -#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 -#define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580 -#define PCI_DEVICE_ID_INTEL_82855GM_IG 0x3582 -#define PCI_DEVICE_ID_INTEL_E7520_MCH 0x3590 -#define PCI_DEVICE_ID_INTEL_E7320_MCH 0x3592 -#define PCI_DEVICE_ID_INTEL_MCH_PA 0x3595 -#define PCI_DEVICE_ID_INTEL_MCH_PA1 0x3596 -#define PCI_DEVICE_ID_INTEL_MCH_PB 0x3597 -#define PCI_DEVICE_ID_INTEL_MCH_PB1 0x3598 -#define PCI_DEVICE_ID_INTEL_MCH_PC 0x3599 -#define PCI_DEVICE_ID_INTEL_MCH_PC1 0x359a -#define PCI_DEVICE_ID_INTEL_E7525_MCH 0x359e -#define PCI_DEVICE_ID_INTEL_80310 0x530d -#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000 -#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010 -#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020 -#define PCI_DEVICE_ID_INTEL_82437VX 0x7030 -#define PCI_DEVICE_ID_INTEL_82439TX 0x7100 -#define PCI_DEVICE_ID_INTEL_82371AB_0 0x7110 -#define PCI_DEVICE_ID_INTEL_82371AB 0x7111 -#define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112 -#define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113 -#define PCI_DEVICE_ID_INTEL_82810_MC1 0x7120 -#define PCI_DEVICE_ID_INTEL_82810_IG1 0x7121 -#define PCI_DEVICE_ID_INTEL_82810_MC3 0x7122 -#define PCI_DEVICE_ID_INTEL_82810_IG3 0x7123 -#define PCI_DEVICE_ID_INTEL_82810E_MC 0x7124 -#define PCI_DEVICE_ID_INTEL_82810E_IG 0x7125 -#define PCI_DEVICE_ID_INTEL_82443LX_0 0x7180 -#define PCI_DEVICE_ID_INTEL_82443LX_1 0x7181 -#define PCI_DEVICE_ID_INTEL_82443BX_0 0x7190 -#define PCI_DEVICE_ID_INTEL_82443BX_1 0x7191 -#define PCI_DEVICE_ID_INTEL_82443BX_2 0x7192 -#define PCI_DEVICE_ID_INTEL_440MX 0x7195 -#define PCI_DEVICE_ID_INTEL_82443MX_0 0x7198 -#define PCI_DEVICE_ID_INTEL_82443MX_1 0x7199 -#define PCI_DEVICE_ID_INTEL_82443MX_2 0x719a -#define PCI_DEVICE_ID_INTEL_82443MX_3 0x719b -#define PCI_DEVICE_ID_INTEL_82443GX_0 0x71a0 -#define PCI_DEVICE_ID_INTEL_82443GX_1 0x71a1 -#define PCI_DEVICE_ID_INTEL_82443GX_2 0x71a2 -#define PCI_DEVICE_ID_INTEL_82372FB_0 0x7600 -#define PCI_DEVICE_ID_INTEL_82372FB_1 0x7601 -#define PCI_DEVICE_ID_INTEL_82372FB_2 0x7602 -#define PCI_DEVICE_ID_INTEL_82372FB_3 0x7603 -#define PCI_DEVICE_ID_INTEL_82454GX 0x84c4 -#define PCI_DEVICE_ID_INTEL_82450GX 0x84c5 -#define PCI_DEVICE_ID_INTEL_82451NX 0x84ca -#define PCI_DEVICE_ID_INTEL_82454NX 0x84cb -#define PCI_DEVICE_ID_INTEL_84460GX 0x84ea -#define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500 -#define PCI_DEVICE_ID_INTEL_IXP2400 0x9001 -#define PCI_DEVICE_ID_INTEL_IXP2800 0x9004 -#define PCI_DEVICE_ID_INTEL_S21152BB 0xb152 - -#define PCI_VENDOR_ID_COMPUTONE 0x8e0e -#define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291 -#define PCI_DEVICE_ID_COMPUTONE_PG 0x0302 -#define PCI_SUBVENDOR_ID_COMPUTONE 0x8e0e -#define PCI_SUBDEVICE_ID_COMPUTONE_PG4 0x0001 -#define PCI_SUBDEVICE_ID_COMPUTONE_PG8 0x0002 -#define PCI_SUBDEVICE_ID_COMPUTONE_PG6 0x0003 - -#define PCI_VENDOR_ID_KTI 0x8e2e -#define PCI_DEVICE_ID_KTI_ET32P2 0x3000 - -#define PCI_VENDOR_ID_ADAPTEC 0x9004 -#define PCI_DEVICE_ID_ADAPTEC_7810 0x1078 -#define PCI_DEVICE_ID_ADAPTEC_7821 0x2178 -#define PCI_DEVICE_ID_ADAPTEC_38602 0x3860 -#define PCI_DEVICE_ID_ADAPTEC_7850 0x5078 -#define PCI_DEVICE_ID_ADAPTEC_7855 0x5578 -#define PCI_DEVICE_ID_ADAPTEC_5800 0x5800 -#define PCI_DEVICE_ID_ADAPTEC_3860 0x6038 -#define PCI_DEVICE_ID_ADAPTEC_1480A 0x6075 -#define PCI_DEVICE_ID_ADAPTEC_7860 0x6078 -#define PCI_DEVICE_ID_ADAPTEC_7861 0x6178 -#define PCI_DEVICE_ID_ADAPTEC_7870 0x7078 -#define PCI_DEVICE_ID_ADAPTEC_7871 0x7178 -#define PCI_DEVICE_ID_ADAPTEC_7872 0x7278 -#define PCI_DEVICE_ID_ADAPTEC_7873 0x7378 -#define PCI_DEVICE_ID_ADAPTEC_7874 0x7478 -#define PCI_DEVICE_ID_ADAPTEC_7895 0x7895 -#define PCI_DEVICE_ID_ADAPTEC_7880 0x8078 -#define PCI_DEVICE_ID_ADAPTEC_7881 0x8178 -#define PCI_DEVICE_ID_ADAPTEC_7882 0x8278 -#define PCI_DEVICE_ID_ADAPTEC_7883 0x8378 -#define PCI_DEVICE_ID_ADAPTEC_7884 0x8478 -#define PCI_DEVICE_ID_ADAPTEC_7885 0x8578 -#define PCI_DEVICE_ID_ADAPTEC_7886 0x8678 -#define PCI_DEVICE_ID_ADAPTEC_7887 0x8778 -#define PCI_DEVICE_ID_ADAPTEC_7888 0x8878 -#define PCI_DEVICE_ID_ADAPTEC_1030 0x8b78 - -#define PCI_VENDOR_ID_ADAPTEC2 0x9005 -#define PCI_DEVICE_ID_ADAPTEC2_2940U2 0x0010 -#define PCI_DEVICE_ID_ADAPTEC2_2930U2 0x0011 -#define PCI_DEVICE_ID_ADAPTEC2_7890B 0x0013 -#define PCI_DEVICE_ID_ADAPTEC2_7890 0x001f -#define PCI_DEVICE_ID_ADAPTEC2_3940U2 0x0050 -#define PCI_DEVICE_ID_ADAPTEC2_3950U2D 0x0051 -#define PCI_DEVICE_ID_ADAPTEC2_7896 0x005f -#define PCI_DEVICE_ID_ADAPTEC2_7892A 0x0080 -#define PCI_DEVICE_ID_ADAPTEC2_7892B 0x0081 -#define PCI_DEVICE_ID_ADAPTEC2_7892D 0x0083 -#define PCI_DEVICE_ID_ADAPTEC2_7892P 0x008f -#define PCI_DEVICE_ID_ADAPTEC2_7899A 0x00c0 -#define PCI_DEVICE_ID_ADAPTEC2_7899B 0x00c1 -#define PCI_DEVICE_ID_ADAPTEC2_7899D 0x00c3 -#define PCI_DEVICE_ID_ADAPTEC2_7899P 0x00cf -#define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503 - -#define PCI_VENDOR_ID_ATRONICS 0x907f -#define PCI_DEVICE_ID_ATRONICS_2015 0x2015 - -#define PCI_VENDOR_ID_HOLTEK 0x9412 -#define PCI_DEVICE_ID_HOLTEK_6565 0x6565 - -#define PCI_VENDOR_ID_NETMOS 0x9710 -#define PCI_DEVICE_ID_NETMOS_9705 0x9705 -#define PCI_DEVICE_ID_NETMOS_9715 0x9715 -#define PCI_DEVICE_ID_NETMOS_9735 0x9735 -#define PCI_DEVICE_ID_NETMOS_9745 0x9745 -#define PCI_DEVICE_ID_NETMOS_9755 0x9755 -#define PCI_DEVICE_ID_NETMOS_9805 0x9805 -#define PCI_DEVICE_ID_NETMOS_9815 0x9815 -#define PCI_DEVICE_ID_NETMOS_9835 0x9835 -#define PCI_DEVICE_ID_NETMOS_9845 0x9845 -#define PCI_DEVICE_ID_NETMOS_9855 0x9855 - -#define PCI_SUBVENDOR_ID_EXSYS 0xd84d -#define PCI_SUBDEVICE_ID_EXSYS_4014 0x4014 - -#define PCI_VENDOR_ID_TIGERJET 0xe159 -#define PCI_DEVICE_ID_TIGERJET_300 0x0001 -#define PCI_DEVICE_ID_TIGERJET_100 0x0002 - -#define PCI_VENDOR_ID_TTTECH 0x0357 -#define PCI_DEVICE_ID_TTTECH_MC322 0x000A - -#define PCI_VENDOR_ID_ARK 0xedd8 -#define PCI_DEVICE_ID_ARK_STING 0xa091 -#define PCI_DEVICE_ID_ARK_STINGARK 0xa099 -#define PCI_DEVICE_ID_ARK_2000MT 0xa0a1 diff --git a/include/queue.h b/include/queue.h deleted file mode 100644 index f8fc229..0000000 --- a/include/queue.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * File: queue.h - * Purpose: Implement a first in, first out linked list - * - * Notes: - */ - -#ifndef _QUEUE_H_ -#define _QUEUE_H_ - -/* - * Individual queue node - */ -typedef struct NODE -{ - struct NODE *next; -} QNODE; - -/* - * Queue Struture - linked list of qentry items - */ -typedef struct -{ - QNODE *head; - QNODE *tail; -} QUEUE; - -/* - * Functions provided by queue.c - */ -void -queue_init(QUEUE *); - -int -queue_isempty(QUEUE *); - -void -queue_add(QUEUE *, QNODE *); - -QNODE* -queue_remove(QUEUE *); - -QNODE* -queue_peek(QUEUE *); - -void -queue_move(QUEUE *, QUEUE *); - -/********************************************************************/ - -#endif /* _QUEUE_H_ */ diff --git a/include/radeon_reg.h b/include/radeon_reg.h deleted file mode 100644 index aebaa31..0000000 --- a/include/radeon_reg.h +++ /dev/null @@ -1,5646 +0,0 @@ -#ifndef _RADEON_H -#define _RADEON_H - -/* to fix: multiple definition from Linux defines and Xfree defines added for VIDX and RENDER */ - -#define RADEON_REGSIZE 0x4000 - -#define MM_INDEX 0x0000 -#define MM_DATA 0x0004 -#define BUS_CNTL 0x0030 -#define HI_STAT 0x004C -#define BUS_CNTL1 0x0034 -#define I2C_CNTL_1 0x0094 -#define CONFIG_CNTL 0x00E0 -#define CONFIG_MEMSIZE 0x00F8 -#define CONFIG_APER_0_BASE 0x0100 -#define CONFIG_APER_1_BASE 0x0104 -#define CONFIG_APER_SIZE 0x0108 -#define CONFIG_REG_1_BASE 0x010C -#define CONFIG_REG_APER_SIZE 0x0110 -#define PAD_AGPINPUT_DELAY 0x0164 -#define PAD_CTLR_STRENGTH 0x0168 -#define PAD_CTLR_UPDATE 0x016C -#define PAD_CTLR_MISC 0x0aa0 -#define AGP_CNTL 0x0174 -#define BM_STATUS 0x0160 -#define CAP0_TRIG_CNTL 0x0950 -#define CAP1_TRIG_CNTL 0x09c0 -#define VENDOR_ID 0x0F00 -#define DEVICE_ID 0x0F02 -#define COMMAND 0x0F04 -#define STATUS 0x0F06 -#define REVISION_ID 0x0F08 -#define REGPROG_INF 0x0F09 -#define SUB_CLASS 0x0F0A -#define BASE_CODE 0x0F0B -#define CACHE_LINE 0x0F0C -#define LATENCY 0x0F0D -#define HEADER 0x0F0E -#define BIST 0x0F0F -#define REG_MEM_BASE 0x0F10 -#define REG_IO_BASE 0x0F14 -#define REG_REG_BASE 0x0F18 -#define ADAPTER_ID 0x0F2C -#define BIOS_ROM 0x0F30 -#define CAPABILITIES_PTR 0x0F34 -#define INTERRUPT_LINE 0x0F3C -#define INTERRUPT_PIN 0x0F3D -#define MIN_GRANT 0x0F3E -#define MAX_LATENCY 0x0F3F -#define ADAPTER_ID_W 0x0F4C -#define PMI_CAP_ID 0x0F50 -#define PMI_NXT_CAP_PTR 0x0F51 -#define PMI_PMC_REG 0x0F52 -#define PM_STATUS 0x0F54 -#define PMI_DATA 0x0F57 -#define AGP_CAP_ID 0x0F58 -#define AGP_STATUS 0x0F5C -#define AGP_COMMAND 0x0F60 -#define AIC_CTRL 0x01D0 -#define AIC_STAT 0x01D4 -#define AIC_PT_BASE 0x01D8 -#define AIC_LO_ADDR 0x01DC -#define AIC_HI_ADDR 0x01E0 -#define AIC_TLB_ADDR 0x01E4 -#define AIC_TLB_DATA 0x01E8 -#define DAC_CNTL 0x0058 -#define DAC_CNTL2 0x007c -#define CRTC_GEN_CNTL 0x0050 -#define MEM_CNTL 0x0140 -#define MC_CNTL 0x0140 -#define EXT_MEM_CNTL 0x0144 -#define MC_TIMING_CNTL 0x0144 -#define MC_AGP_LOCATION 0x014C -#define MEM_IO_CNTL_A0 0x0178 -#define MEM_REFRESH_CNTL 0x0178 -#define MEM_INIT_LATENCY_TIMER 0x0154 -#define MC_INIT_GFX_LAT_TIMER 0x0154 -#define MEM_SDRAM_MODE_REG 0x0158 -#define AGP_BASE 0x0170 -#define MEM_IO_CNTL_A1 0x017C -#define MC_READ_CNTL_AB 0x017C -#define MEM_IO_CNTL_B0 0x0180 -#define MC_INIT_MISC_LAT_TIMER 0x0180 -#define MEM_IO_CNTL_B1 0x0184 -#define MC_IOPAD_CNTL 0x0184 -#define MC_DEBUG 0x0188 -#define MC_STATUS 0x0150 -#define MEM_IO_OE_CNTL 0x018C -#define MC_CHIP_IO_OE_CNTL_AB 0x018C -#define MC_FB_LOCATION 0x0148 -#define HOST_PATH_CNTL 0x0130 -#define MEM_VGA_WP_SEL 0x0038 -#define MEM_VGA_RP_SEL 0x003C -#define HDP_DEBUG 0x0138 -#define SW_SEMAPHORE 0x013C -#define TEST_DEBUG_CNTL 0x0120 -#define TEST_DEBUG_MUX 0x0124 -#define TEST_DEBUG_OUT 0x012c -#define CRTC2_GEN_CNTL 0x03f8 -#define CRTC2_DISPLAY_BASE_ADDR 0x033c -#define SURFACE_CNTL 0x0B00 -#define SURFACE0_LOWER_BOUND 0x0B04 -#define SURFACE1_LOWER_BOUND 0x0B14 -#define SURFACE2_LOWER_BOUND 0x0B24 -#define SURFACE3_LOWER_BOUND 0x0B34 -#define SURFACE4_LOWER_BOUND 0x0B44 -#define SURFACE5_LOWER_BOUND 0x0B54 -#define SURFACE6_LOWER_BOUND 0x0B64 -#define SURFACE7_LOWER_BOUND 0x0B74 -#define SURFACE0_UPPER_BOUND 0x0B08 -#define SURFACE1_UPPER_BOUND 0x0B18 -#define SURFACE2_UPPER_BOUND 0x0B28 -#define SURFACE3_UPPER_BOUND 0x0B38 -#define SURFACE4_UPPER_BOUND 0x0B48 -#define SURFACE5_UPPER_BOUND 0x0B58 -#define SURFACE6_UPPER_BOUND 0x0B68 -#define SURFACE7_UPPER_BOUND 0x0B78 -#define SURFACE0_INFO 0x0B0C -#define SURFACE1_INFO 0x0B1C -#define SURFACE2_INFO 0x0B2C -#define SURFACE3_INFO 0x0B3C -#define SURFACE4_INFO 0x0B4C -#define SURFACE5_INFO 0x0B5C -#define SURFACE6_INFO 0x0B6C -#define SURFACE7_INFO 0x0B7C -#define SURFACE_ACCESS_FLAGS 0x0BF8 -#define SURFACE_ACCESS_CLR 0x0BFC -#define BRUSH_DATA0 0x1480 -#define BRUSH_DATA1 0x1484 -#define BRUSH_DATA2 0x1488 -#define BRUSH_DATA3 0x148c -#define BRUSH_DATA4 0x1490 -#define BRUSH_DATA5 0x1494 -#define BRUSH_DATA7 0x149c -#define BRUSH_DATA8 0x14a0 -#define BRUSH_DATA9 0x14a4 -#define BRUSH_DATA10 0x14a8 -#define BRUSH_DATA11 0x14ac -#define BRUSH_DATA12 0x14b0 -#define BRUSH_DATA13 0x14b4 -#define BRUSH_DATA14 0x14b8 -#define BRUSH_DATA15 0x14bc -#define BRUSH_DATA16 0x14c0 -#define BRUSH_DATA17 0x14c4 -#define BRUSH_DATA18 0x14c8 -#define BRUSH_DATA19 0x14cc -#define BRUSH_DATA20 0x14d0 -#define BRUSH_DATA21 0x14d4 -#define BRUSH_DATA22 0x14d8 -#define BRUSH_DATA23 0x14dc -#define BRUSH_DATA24 0x14e0 -#define BRUSH_DATA25 0x14e4 -#define BRUSH_DATA26 0x14e8 -#define BRUSH_DATA27 0x14ec -#define BRUSH_DATA28 0x14f0 -#define BRUSH_DATA29 0x14f4 -#define BRUSH_DATA30 0x14f8 -#define BRUSH_DATA31 0x14fc -#define BRUSH_DATA32 0x1500 -#define BRUSH_DATA33 0x1504 -#define BRUSH_DATA34 0x1508 -#define BRUSH_DATA35 0x150c -#define BRUSH_DATA36 0x1510 -#define BRUSH_DATA37 0x1514 -#define BRUSH_DATA38 0x1518 -#define BRUSH_DATA39 0x151c -#define BRUSH_DATA40 0x1520 -#define BRUSH_DATA41 0x1524 -#define BRUSH_DATA42 0x1528 -#define BRUSH_DATA43 0x152c -#define BRUSH_DATA44 0x1530 -#define BRUSH_DATA45 0x1534 -#define BRUSH_DATA46 0x1538 -#define BRUSH_DATA47 0x153c -#define BRUSH_DATA48 0x1540 -#define BRUSH_DATA49 0x1544 -#define BRUSH_DATA50 0x1548 -#define BRUSH_DATA51 0x154c -#define BRUSH_DATA52 0x1550 -#define BRUSH_DATA53 0x1554 -#define BRUSH_DATA54 0x1558 -#define BRUSH_DATA55 0x155c -#define BRUSH_DATA56 0x1560 -#define BRUSH_DATA57 0x1564 -#define BRUSH_DATA58 0x1568 -#define BRUSH_DATA59 0x156c -#define BRUSH_DATA6 0x1498 -#define BRUSH_DATA60 0x1570 -#define BRUSH_DATA61 0x1574 -#define BRUSH_DATA62 0x1578 -#define BRUSH_DATA63 0x157c -#define BRUSH_SCALE 0x1470 -#define BRUSH_Y_X 0x1474 -#define GEN_INT_CNTL 0x0040 -#define GEN_INT_STATUS 0x0044 -#define CRTC_EXT_CNTL 0x0054 -#define RB3D_CNTL 0x1C3C -#define WAIT_UNTIL 0x1720 -#define ISYNC_CNTL 0x1724 -#define RBBM_GUICNTL 0x172C -#define RBBM_STATUS 0x0E40 -#define RBBM_STATUS_alt_1 0x1740 -#define RBBM_CNTL 0x00EC -#define RBBM_CNTL_alt_1 0x0E44 -#define RBBM_SOFT_RESET 0x00F0 -#define RBBM_SOFT_RESET_alt_1 0x0E48 -#define NQWAIT_UNTIL 0x0E50 -#define RBBM_DEBUG 0x0E6C -#define RBBM_CMDFIFO_ADDR 0x0E70 -#define RBBM_CMDFIFO_DATAL 0x0E74 -#define RBBM_CMDFIFO_DATAH 0x0E78 -#define RBBM_CMDFIFO_STAT 0x0E7C -#define CRTC_STATUS 0x005C -#define GPIO_VGA_DDC 0x0060 -#define GPIO_DVI_DDC 0x0064 -#define GPIO_MONID 0x0068 -#define GPIO_CRT2_DDC 0x006c -#define PALETTE_INDEX 0x00B0 -#define PALETTE_DATA 0x00B4 -#define PALETTE_30_DATA 0x00B8 -#define CRTC_H_TOTAL_DISP 0x0200 -#define CRTC_H_SYNC_STRT_WID 0x0204 -#define CRTC_V_TOTAL_DISP 0x0208 -#define CRTC_V_SYNC_STRT_WID 0x020C -#define CRTC_VLINE_CRNT_VLINE 0x0210 -#define CRTC_CRNT_FRAME 0x0214 -#define CRTC_GUI_TRIG_VLINE 0x0218 -#define CRTC_DEBUG 0x021C -#define CRTC_OFFSET_RIGHT 0x0220 -#define CRTC_OFFSET 0x0224 -#define CRTC_OFFSET_CNTL 0x0228 -#define CRTC_PITCH 0x022C -#define OVR_CLR 0x0230 -#define OVR_WID_LEFT_RIGHT 0x0234 -#define OVR_WID_TOP_BOTTOM 0x0238 -#define DISPLAY_BASE_ADDR 0x023C -#define SNAPSHOT_VH_COUNTS 0x0240 -#define SNAPSHOT_F_COUNT 0x0244 -#define N_VIF_COUNT 0x0248 -#define SNAPSHOT_VIF_COUNT 0x024C -#define FP_CRTC_H_TOTAL_DISP 0x0250 -#define FP_CRTC_V_TOTAL_DISP 0x0254 -#define CRT_CRTC_H_SYNC_STRT_WID 0x0258 -#define CRT_CRTC_V_SYNC_STRT_WID 0x025C -#define CUR_OFFSET 0x0260 -#define CUR_HORZ_VERT_POSN 0x0264 -#define CUR_HORZ_VERT_OFF 0x0268 -#define CUR_CLR0 0x026C -#define CUR_CLR1 0x0270 -#define FP_HORZ_VERT_ACTIVE 0x0278 -#define CRTC_MORE_CNTL 0x027C -#define CRTC_H_CUTOFF_ACTIVE_EN (1<<4) -#define CRTC_V_CUTOFF_ACTIVE_EN (1<<5) -#define DAC_EXT_CNTL 0x0280 -#define FP_GEN_CNTL 0x0284 -#define FP_HORZ_STRETCH 0x028C -#define FP_VERT_STRETCH 0x0290 -#define FP_H_SYNC_STRT_WID 0x02C4 -#define FP_V_SYNC_STRT_WID 0x02C8 -#define AUX_WINDOW_HORZ_CNTL 0x02D8 -#define AUX_WINDOW_VERT_CNTL 0x02DC -//#define DDA_CONFIG 0x02e0 -//#define DDA_ON_OFF 0x02e4 -#define DVI_I2C_CNTL_1 0x02e4 -#define GRPH_BUFFER_CNTL 0x02F0 -#define GRPH2_BUFFER_CNTL 0x03F0 -#define VGA_BUFFER_CNTL 0x02F4 -#define OV0_Y_X_START 0x0400 -#define OV0_Y_X_END 0x0404 -#define OV0_PIPELINE_CNTL 0x0408 -#define OV0_REG_LOAD_CNTL 0x0410 -#define OV0_SCALE_CNTL 0x0420 -#define OV0_V_INC 0x0424 -#define OV0_P1_V_ACCUM_INIT 0x0428 -#define OV0_P23_V_ACCUM_INIT 0x042C -#define OV0_P1_BLANK_LINES_AT_TOP 0x0430 -#define OV0_P23_BLANK_LINES_AT_TOP 0x0434 -#define OV0_BASE_ADDR 0x043C -#define OV0_VID_BUF0_BASE_ADRS 0x0440 -#define OV0_VID_BUF1_BASE_ADRS 0x0444 -#define OV0_VID_BUF2_BASE_ADRS 0x0448 -#define OV0_VID_BUF3_BASE_ADRS 0x044C -#define OV0_VID_BUF4_BASE_ADRS 0x0450 -#define OV0_VID_BUF5_BASE_ADRS 0x0454 -#define OV0_VID_BUF_PITCH0_VALUE 0x0460 -#define OV0_VID_BUF_PITCH1_VALUE 0x0464 -#define OV0_AUTO_FLIP_CNTRL 0x0470 -#define OV0_DEINTERLACE_PATTERN 0x0474 -#define OV0_SUBMIT_HISTORY 0x0478 -#define OV0_H_INC 0x0480 -#define OV0_STEP_BY 0x0484 -#define OV0_P1_H_ACCUM_INIT 0x0488 -#define OV0_P23_H_ACCUM_INIT 0x048C -#define OV0_P1_X_START_END 0x0494 -#define OV0_P2_X_START_END 0x0498 -#define OV0_P3_X_START_END 0x049C -#define OV0_FILTER_CNTL 0x04A0 -#define OV0_FOUR_TAP_COEF_0 0x04B0 -#define OV0_FOUR_TAP_COEF_1 0x04B4 -#define OV0_FOUR_TAP_COEF_2 0x04B8 -#define OV0_FOUR_TAP_COEF_3 0x04BC -#define OV0_FOUR_TAP_COEF_4 0x04C0 -#define OV0_FLAG_CNTRL 0x04DC -#define OV0_SLICE_CNTL 0x04E0 -#define OV0_VID_KEY_CLR_LOW 0x04E4 -#define OV0_VID_KEY_CLR_HIGH 0x04E8 -#define OV0_GRPH_KEY_CLR_LOW 0x04EC -#define OV0_GRPH_KEY_CLR_HIGH 0x04F0 -#define OV0_KEY_CNTL 0x04F4 -#define OV0_TEST 0x04F8 -#define SUBPIC_CNTL 0x0540 -#define SUBPIC_DEFCOLCON 0x0544 -#define SUBPIC_Y_X_START 0x054C -#define SUBPIC_Y_X_END 0x0550 -#define SUBPIC_V_INC 0x0554 -#define SUBPIC_H_INC 0x0558 -#define SUBPIC_BUF0_OFFSET 0x055C -#define SUBPIC_BUF1_OFFSET 0x0560 -#define SUBPIC_LC0_OFFSET 0x0564 -#define SUBPIC_LC1_OFFSET 0x0568 -#define SUBPIC_PITCH 0x056C -#define SUBPIC_BTN_HLI_COLCON 0x0570 -#define SUBPIC_BTN_HLI_Y_X_START 0x0574 -#define SUBPIC_BTN_HLI_Y_X_END 0x0578 -#define SUBPIC_PALETTE_INDEX 0x057C -#define SUBPIC_PALETTE_DATA 0x0580 -#define SUBPIC_H_ACCUM_INIT 0x0584 -#define SUBPIC_V_ACCUM_INIT 0x0588 -#define DISP_MISC_CNTL 0x0D00 -#define DAC_MACRO_CNTL 0x0D04 -#define DISP_PWR_MAN 0x0D08 -#define DISP_TEST_DEBUG_CNTL 0x0D10 -#define DISP_HW_DEBUG 0x0D14 -#define DAC_CRC_SIG1 0x0D18 -#define DAC_CRC_SIG2 0x0D1C -#define OV0_LIN_TRANS_A 0x0D20 -#define OV0_LIN_TRANS_B 0x0D24 -#define OV0_LIN_TRANS_C 0x0D28 -#define OV0_LIN_TRANS_D 0x0D2C -#define OV0_LIN_TRANS_E 0x0D30 -#define OV0_LIN_TRANS_F 0x0D34 -#define OV0_GAMMA_0_F 0x0D40 -#define OV0_GAMMA_10_1F 0x0D44 -#define OV0_GAMMA_20_3F 0x0D48 -#define OV0_GAMMA_40_7F 0x0D4C -#define OV0_GAMMA_380_3BF 0x0D50 -#define OV0_GAMMA_3C0_3FF 0x0D54 -#define DISP_MERGE_CNTL 0x0D60 -#define DISP_OUTPUT_CNTL 0x0D64 -#define DISP_LIN_TRANS_GRPH_A 0x0D80 -#define DISP_LIN_TRANS_GRPH_B 0x0D84 -#define DISP_LIN_TRANS_GRPH_C 0x0D88 -#define DISP_LIN_TRANS_GRPH_D 0x0D8C -#define DISP_LIN_TRANS_GRPH_E 0x0D90 -#define DISP_LIN_TRANS_GRPH_F 0x0D94 -#define DISP_LIN_TRANS_VID_A 0x0D98 -#define DISP_LIN_TRANS_VID_B 0x0D9C -#define DISP_LIN_TRANS_VID_C 0x0DA0 -#define DISP_LIN_TRANS_VID_D 0x0DA4 -#define DISP_LIN_TRANS_VID_E 0x0DA8 -#define DISP_LIN_TRANS_VID_F 0x0DAC -#define RMX_HORZ_FILTER_0TAP_COEF 0x0DB0 -#define RMX_HORZ_FILTER_1TAP_COEF 0x0DB4 -#define RMX_HORZ_FILTER_2TAP_COEF 0x0DB8 -#define RMX_HORZ_PHASE 0x0DBC -#define DAC_EMBEDDED_SYNC_CNTL 0x0DC0 -#define DAC_BROAD_PULSE 0x0DC4 -#define DAC_SKEW_CLKS 0x0DC8 -#define DAC_INCR 0x0DCC -#define DAC_NEG_SYNC_LEVEL 0x0DD0 -#define DAC_POS_SYNC_LEVEL 0x0DD4 -#define DAC_BLANK_LEVEL 0x0DD8 -#define CLOCK_CNTL_INDEX 0x0008 -#define CLOCK_CNTL_DATA 0x000C -#define CP_RB_CNTL 0x0704 -#define CP_RB_BASE 0x0700 -#define CP_RB_RPTR_ADDR 0x070C -#define CP_RB_RPTR 0x0710 -#define CP_RB_WPTR 0x0714 -#define CP_RB_WPTR_DELAY 0x0718 -#define CP_IB_BASE 0x0738 -#define CP_IB_BUFSZ 0x073C -#define SCRATCH_REG0 0x15E0 -#define GUI_SCRATCH_REG0 0x15E0 -#define SCRATCH_REG1 0x15E4 -#define GUI_SCRATCH_REG1 0x15E4 -#define SCRATCH_REG2 0x15E8 -#define GUI_SCRATCH_REG2 0x15E8 -#define SCRATCH_REG3 0x15EC -#define GUI_SCRATCH_REG3 0x15EC -#define SCRATCH_REG4 0x15F0 -#define GUI_SCRATCH_REG4 0x15F0 -#define SCRATCH_REG5 0x15F4 -#define GUI_SCRATCH_REG5 0x15F4 -#define SCRATCH_UMSK 0x0770 -#define SCRATCH_ADDR 0x0774 -#define DP_BRUSH_FRGD_CLR 0x147C -#define DP_BRUSH_BKGD_CLR 0x1478 -#define DST_LINE_START 0x1600 -#define DST_LINE_END 0x1604 -#define DST_LINE_PATCOUNT 0x1608 -#define SRC_OFFSET 0x15AC -#define SRC_PITCH 0x15B0 -#define SRC_TILE 0x1704 -#define SRC_PITCH_OFFSET 0x1428 -#define SRC_X 0x1414 -#define SRC_Y 0x1418 -#define SRC_X_Y 0x1590 -#define SRC_Y_X 0x1434 -#define DST_Y_X 0x1438 -#define DST_WIDTH_HEIGHT 0x1598 -#define DST_HEIGHT_WIDTH 0x143c -#define DST_OFFSET 0x1404 -#define SRC_CLUT_ADDRESS 0x1780 -#define SRC_CLUT_DATA 0x1784 -#define SRC_CLUT_DATA_RD 0x1788 -#define HOST_DATA0 0x17C0 -#define HOST_DATA1 0x17C4 -#define HOST_DATA2 0x17C8 -#define HOST_DATA3 0x17CC -#define HOST_DATA4 0x17D0 -#define HOST_DATA5 0x17D4 -#define HOST_DATA6 0x17D8 -#define HOST_DATA7 0x17DC -#define HOST_DATA_LAST 0x17E0 -#define DP_SRC_ENDIAN 0x15D4 -#define DP_SRC_FRGD_CLR 0x15D8 -#define DP_SRC_BKGD_CLR 0x15DC -#define SC_LEFT 0x1640 -#define SC_RIGHT 0x1644 -#define SC_TOP 0x1648 -#define SC_BOTTOM 0x164C -#define SRC_SC_RIGHT 0x1654 -#define SRC_SC_BOTTOM 0x165C -#define DP_CNTL 0x16C0 -#define DP_CNTL_XDIR_YDIR_YMAJOR 0x16D0 -#define DP_DATATYPE 0x16C4 -#define DP_MIX 0x16C8 -#define DP_WRITE_MSK 0x16CC -#define DP_XOP 0x17F8 -#define CLR_CMP_CLR_SRC 0x15C4 -#define CLR_CMP_CLR_DST 0x15C8 -#define CLR_CMP_CNTL 0x15C0 -#define CLR_CMP_MSK 0x15CC -#define DSTCACHE_MODE 0x1710 -#define DSTCACHE_CTLSTAT 0x1714 -#define DEFAULT_PITCH_OFFSET 0x16E0 -#define DEFAULT_OFFSET 0x16e0 -#define DEFAULT_PITCH 0x16e4 -#define DEFAULT_SC_BOTTOM_RIGHT 0x16E8 -#define DEFAULT_SC_TOP_LEFT 0x16EC -#define SRC_PITCH_OFFSET 0x1428 -#define DST_PITCH_OFFSET 0x142C -#define DP_GUI_MASTER_CNTL 0x146C -#define SC_TOP_LEFT 0x16EC -#define SC_BOTTOM_RIGHT 0x16F0 -#define SRC_SC_BOTTOM_RIGHT 0x16F4 -#define RB2D_DSTCACHE_MODE 0x3428 -#define RB2D_DSTCACHE_CTLSTAT 0x342C -#define LVDS_GEN_CNTL 0x02d0 -#define LVDS_PLL_CNTL 0x02d4 -#define FP2_GEN_CNTL 0x0288 -#define TMDS_CNTL 0x0294 -#define TMDS_CRC 0x02a0 -#define TMDS_TRANSMITTER_CNTL 0x02a4 -#define MPP_TB_CONFIG 0x01c0 -#define PAMAC0_DLY_CNTL 0x0a94 -#define PAMAC1_DLY_CNTL 0x0a98 -#define PAMAC2_DLY_CNTL 0x0a9c -#define FW_CNTL 0x0118 -#define FCP_CNTL 0x0910 -#define VGA_DDA_ON_OFF 0x02ec -#define TV_MASTER_CNTL 0x0800 - -#define BIOS_0_SCRATCH 0x0010 -#define BIOS_1_SCRATCH 0x0014 -#define BIOS_2_SCRATCH 0x0018 -#define BIOS_3_SCRATCH 0x001c -#define BIOS_4_SCRATCH 0x0020 -#define BIOS_5_SCRATCH 0x0024 -#define BIOS_6_SCRATCH 0x0028 -#define BIOS_7_SCRATCH 0x002c - -#define HDP_SOFT_RESET (1 << 26) - -#define TV_DAC_CNTL 0x088c -#define GPIOPAD_MASK 0x0198 -#define GPIOPAD_A 0x019c -#define GPIOPAD_EN 0x01a0 -#define GPIOPAD_Y 0x01a4 -#define ZV_LCDPAD_MASK 0x01a8 -#define ZV_LCDPAD_A 0x01ac -#define ZV_LCDPAD_EN 0x01b0 -#define ZV_LCDPAD_Y 0x01b4 - -/* PLL Registers */ -#define CLK_PIN_CNTL 0x0001 -#define PPLL_CNTL 0x0002 -#define PPLL_REF_DIV 0x0003 -#define PPLL_DIV_0 0x0004 -#define PPLL_DIV_1 0x0005 -#define PPLL_DIV_2 0x0006 -#define PPLL_DIV_3 0x0007 -#define VCLK_ECP_CNTL 0x0008 -#define HTOTAL_CNTL 0x0009 -#define M_SPLL_REF_FB_DIV 0x000a -#define AGP_PLL_CNTL 0x000b -#define SPLL_CNTL 0x000c -#define SCLK_CNTL 0x000d -#define MPLL_CNTL 0x000e -#define MDLL_CKO 0x000f -#define MDLL_RDCKA 0x0010 -#define MCLK_CNTL 0x0012 -#define AGP_PLL_CNTL 0x000b -#define PLL_TEST_CNTL 0x0013 -#define CLK_PWRMGT_CNTL 0x0014 -#define PLL_PWRMGT_CNTL 0x0015 -#define MCLK_MISC 0x001f -#define P2PLL_CNTL 0x002a -#define P2PLL_REF_DIV 0x002b -#define PIXCLKS_CNTL 0x002d -#define SCLK_MORE_CNTL 0x0035 - -/* MCLK_CNTL bit constants */ -#define FORCEON_MCLKA (1 << 16) -#define FORCEON_MCLKB (1 << 17) -#define FORCEON_YCLKA (1 << 18) -#define FORCEON_YCLKB (1 << 19) -#define FORCEON_MC (1 << 20) -#define FORCEON_AIC (1 << 21) - -/* SCLK_CNTL bit constants */ -#define DYN_STOP_LAT_MASK 0x00007ff8 -#define CP_MAX_DYN_STOP_LAT 0x0008 -#define SCLK_FORCEON_MASK 0xffff8000 - -/* SCLK_MORE_CNTL bit constants */ -#define SCLK_MORE_FORCEON 0x0700 - -/* BUS_CNTL bit constants */ -#define BUS_DBL_RESYNC 0x00000001 -#define BUS_MSTR_RESET 0x00000002 -#define BUS_FLUSH_BUF 0x00000004 -#define BUS_STOP_REQ_DIS 0x00000008 -#define BUS_ROTATION_DIS 0x00000010 -#define BUS_MASTER_DIS 0x00000040 -#define BUS_ROM_WRT_EN 0x00000080 -#define BUS_DIS_ROM 0x00001000 -#define BUS_PCI_READ_RETRY_EN 0x00002000 -#define BUS_AGP_AD_STEPPING_EN 0x00004000 -#define BUS_PCI_WRT_RETRY_EN 0x00008000 -#define BUS_MSTR_RD_MULT 0x00100000 -#define BUS_MSTR_RD_LINE 0x00200000 -#define BUS_SUSPEND 0x00400000 -#define LAT_16X 0x00800000 -#define BUS_RD_DISCARD_EN 0x01000000 -#define BUS_RD_ABORT_EN 0x02000000 -#define BUS_MSTR_WS 0x04000000 -#define BUS_PARKING_DIS 0x08000000 -#define BUS_MSTR_DISCONNECT_EN 0x10000000 -#define BUS_WRT_BURST 0x20000000 -#define BUS_READ_BURST 0x40000000 -#define BUS_RDY_READ_DLY 0x80000000 - -/* PIXCLKS_CNTL */ -#define PIX2CLK_SRC_SEL_MASK 0x03 -#define PIX2CLK_SRC_SEL_CPUCLK 0x00 -#define PIX2CLK_SRC_SEL_PSCANCLK 0x01 -#define PIX2CLK_SRC_SEL_BYTECLK 0x02 -#define PIX2CLK_SRC_SEL_P2PLLCLK 0x03 -#define PIX2CLK_ALWAYS_ONb (1<<6) -#define PIX2CLK_DAC_ALWAYS_ONb (1<<7) -#define PIXCLK_TV_SRC_SEL (1 << 8) -#define PIXCLK_LVDS_ALWAYS_ONb (1 << 14) -#define PIXCLK_TMDS_ALWAYS_ONb (1 << 15) - -/* CLOCK_CNTL_INDEX bit constants */ -#define PLL_WR_EN 0x00000080 - -/* CONFIG_CNTL bit constants */ -#define CFG_VGA_RAM_EN 0x00000100 -#define CFG_ATI_REV_ID_MASK (0xf << 16) -#define CFG_ATI_REV_A11 (0 << 16) -#define CFG_ATI_REV_A12 (1 << 16) -#define CFG_ATI_REV_A13 (2 << 16) - -/* CRTC_EXT_CNTL bit constants */ -#define VGA_ATI_LINEAR 0x00000008 -#define VGA_128KAP_PAGING 0x00000010 -#define XCRT_CNT_EN (1 << 6) -#define CRTC_HSYNC_DIS (1 << 8) -#define CRTC_VSYNC_DIS (1 << 9) -#define CRTC_DISPLAY_DIS (1 << 10) -#define CRTC_CRT_ON (1 << 15) - -/* DSTCACHE_CTLSTAT bit constants */ -#define RB2D_DC_FLUSH (3 << 0) -#define RB2D_DC_FREE (3 << 2) -#define RB2D_DC_FLUSH_ALL 0xf -#define RB2D_DC_BUSY (1 << 31) - -/* CRTC_GEN_CNTL bit constants */ -#define CRTC_DBL_SCAN_EN (1 << 0) -#define CRTC_INTERLACE_EN (1 << 1) -#define CRTC_CSYNC_EN (1 << 4) -#define CRTC_BYPASS_LUT_EN (1 << 14) -#define CRTC_CUR_EN (1 << 16) -#define CRTC_CUR_MODE_MASK (7 << 17) -#define CRTC_ICON_EN (1 << 20) -#define CRTC_EXT_DISP_EN (1 << 24) -#define CRTC_EN (1 << 25) -#define CRTC_DISP_REQ_EN_B (1 << 26) - -/* CRTC2_GEN_CTRL bit constants */ -#define CRTC2_DBL_SCAN_EN (1 << 0) -#define CRTC2_INTERLACE_EN (1 << 1) -#define CRTC2_SYNC_TRISTAT (1 << 4) -#define CRTC2_HSYNC_TRISTAT (1 << 5) -#define CRTC2_VSYNC_TRISTAT (1 << 6) -#define CRTC2_CRT2_ON (1 << 7) -#define CRTC2_ICON_EN (1 << 15) -#define CRTC2_CUR_EN (1 << 16) -#define CRTC2_CUR_MODE_MASK (7 << 20) -#define CRTC2_DISP_DIS (1 << 23) -#define CRTC2_EN (1 << 25) -#define CRTC2_DISP_REQ_EN_B (1 << 26) -#define CRTC2_CSYNC_EN (1 << 27) -#define CRTC2_HSYNC_DIS (1 << 28) -#define CRTC2_VSYNC_DIS (1 << 29) - -/* CRTC_STATUS bit constants */ -#define CRTC_VBLANK 0x00000001 - -/* CRTC2_GEN_CNTL bit constants */ -#define CRT2_ON (1 << 7) -#define CRTC2_DISPLAY_DIS (1 << 23) -#define CRTC2_EN (1 << 25) -#define CRTC2_DISP_REQ_EN_B (1 << 26) - -/* CUR_OFFSET, CUR_HORZ_VERT_POSN, CUR_HORZ_VERT_OFF bit constants */ -#define CUR_LOCK 0x80000000 - -/* GPIO bit constants */ -#define GPIO_A_0 (1 << 0) -#define GPIO_A_1 (1 << 1) -#define GPIO_Y_0 (1 << 8) -#define GPIO_Y_1 (1 << 9) -#define GPIO_EN_0 (1 << 16) -#define GPIO_EN_1 (1 << 17) -#define GPIO_MASK_0 (1 << 24) -#define GPIO_MASK_1 (1 << 25) -#define VGA_DDC_DATA_OUTPUT GPIO_A_0 -#define VGA_DDC_CLK_OUTPUT GPIO_A_1 -#define VGA_DDC_DATA_INPUT GPIO_Y_0 -#define VGA_DDC_CLK_INPUT GPIO_Y_1 -#define VGA_DDC_DATA_OUT_EN GPIO_EN_0 -#define VGA_DDC_CLK_OUT_EN GPIO_EN_1 - -/* FP bit constants */ -#define FP_CRTC_H_TOTAL_MASK 0x000003ff -#define FP_CRTC_H_DISP_MASK 0x01ff0000 -#define FP_CRTC_V_TOTAL_MASK 0x00000fff -#define FP_CRTC_V_DISP_MASK 0x0fff0000 -#define FP_H_SYNC_STRT_CHAR_MASK 0x00001ff8 -#define FP_H_SYNC_WID_MASK 0x003f0000 -#define FP_V_SYNC_STRT_MASK 0x00000fff -#define FP_V_SYNC_WID_MASK 0x001f0000 -#define FP_CRTC_H_TOTAL_SHIFT 0x00000000 -#define FP_CRTC_H_DISP_SHIFT 0x00000010 -#define FP_CRTC_V_TOTAL_SHIFT 0x00000000 -#define FP_CRTC_V_DISP_SHIFT 0x00000010 -#define FP_H_SYNC_STRT_CHAR_SHIFT 0x00000003 -#define FP_H_SYNC_WID_SHIFT 0x00000010 -#define FP_V_SYNC_STRT_SHIFT 0x00000000 -#define FP_V_SYNC_WID_SHIFT 0x00000010 - -/* FP_GEN_CNTL bit constants */ -#define FP_FPON (1 << 0) -#define FP_TMDS_EN (1 << 2) -#define FP_PANEL_FORMAT (1 << 3) -#define FP_EN_TMDS (1 << 7) -#define FP_DETECT_SENSE (1 << 8) -#define R200_FP_SOURCE_SEL_MASK (3 << 10) -#define R200_FP_SOURCE_SEL_CRTC1 (0 << 10) -#define R200_FP_SOURCE_SEL_CRTC2 (1 << 10) -#define R200_FP_SOURCE_SEL_RMX (2 << 10) -#define R200_FP_SOURCE_SEL_TRANS (3 << 10) -#define FP_SEL_CRTC1 (0 << 13) -#define FP_SEL_CRTC2 (1 << 13) -#define FP_USE_VGA_HSYNC (1 << 14) -#define FP_CRTC_DONT_SHADOW_HPAR (1 << 15) -#define FP_CRTC_DONT_SHADOW_VPAR (1 << 16) -#define FP_CRTC_DONT_SHADOW_HEND (1 << 17) -#define FP_CRTC_USE_SHADOW_VEND (1 << 18) -#define FP_RMX_HVSYNC_CONTROL_EN (1 << 20) -#define FP_DFP_SYNC_SEL (1 << 21) -#define FP_CRTC_LOCK_8DOT (1 << 22) -#define FP_CRT_SYNC_SEL (1 << 23) -#define FP_USE_SHADOW_EN (1 << 24) -#define FP_CRT_SYNC_ALT (1 << 26) - -/* FP2_GEN_CNTL bit constants */ -#define FP2_BLANK_EN (1 << 1) -#define FP2_ON (1 << 2) -#define FP2_PANEL_FORMAT (1 << 3) -#define FP2_SOURCE_SEL_MASK (3 << 10) -#define FP2_SOURCE_SEL_CRTC2 (1 << 10) -#define FP2_SRC_SEL_MASK (3 << 13) -#define FP2_SRC_SEL_CRTC2 (1 << 13) -#define FP2_FP_POL (1 << 16) -#define FP2_LP_POL (1 << 17) -#define FP2_SCK_POL (1 << 18) -#define FP2_LCD_CNTL_MASK (7 << 19) -#define FP2_PAD_FLOP_EN (1 << 22) -#define FP2_CRC_EN (1 << 23) -#define FP2_CRC_READ_EN (1 << 24) -#define FP2_DV0_EN (1 << 25) -#define FP2_DV0_RATE_SEL_SDR (1 << 26) - -/* LVDS_GEN_CNTL bit constants */ -#define LVDS_ON (1 << 0) -#define LVDS_DISPLAY_DIS (1 << 1) -#define LVDS_PANEL_TYPE (1 << 2) -#define LVDS_PANEL_FORMAT (1 << 3) -#define LVDS_EN (1 << 7) -#define LVDS_BL_MOD_LEVEL_MASK 0x0000ff00 -#define LVDS_BL_MOD_LEVEL_SHIFT 8 -#define LVDS_BL_MOD_EN (1 << 16) -#define LVDS_DIGON (1 << 18) -#define LVDS_BLON (1 << 19) -#define LVDS_SEL_CRTC2 (1 << 23) -#define LVDS_STATE_MASK \ - (LVDS_ON | LVDS_DISPLAY_DIS | LVDS_BL_MOD_LEVEL_MASK | LVDS_BLON) - -/* LVDS_PLL_CNTL bit constatns */ -#define HSYNC_DELAY_SHIFT 0x1c -#define HSYNC_DELAY_MASK (0xf << 0x1c) - -/* TMDS_TRANSMITTER_CNTL bit constants */ -#define TMDS_PLL_EN (1 << 0) -#define TMDS_PLLRST (1 << 1) -#define TMDS_RAN_PAT_RST (1 << 7) -#define TMDS_ICHCSEL (1 << 28) - -/* FP_HORZ_STRETCH bit constants */ -#define HORZ_STRETCH_RATIO_MASK 0xffff -#define HORZ_STRETCH_RATIO_MAX 4096 -#define HORZ_PANEL_SIZE (0x1ff << 16) -#define HORZ_PANEL_SHIFT 16 -#define HORZ_STRETCH_PIXREP (0 << 25) -#define HORZ_STRETCH_BLEND (1 << 26) -#define HORZ_STRETCH_ENABLE (1 << 25) -#define HORZ_AUTO_RATIO (1 << 27) -#define HORZ_FP_LOOP_STRETCH (0x7 << 28) -#define HORZ_AUTO_RATIO_INC (1 << 31) - -/* FP_VERT_STRETCH bit constants */ -#define VERT_STRETCH_RATIO_MASK 0xfff -#define VERT_STRETCH_RATIO_MAX 4096 -#define VERT_PANEL_SIZE (0xfff << 12) -#define VERT_PANEL_SHIFT 12 -#define VERT_STRETCH_LINREP (0 << 26) -#define VERT_STRETCH_BLEND (1 << 26) -#define VERT_STRETCH_ENABLE (1 << 25) -#define VERT_AUTO_RATIO_EN (1 << 27) -#define VERT_FP_LOOP_STRETCH (0x7 << 28) -#define VERT_STRETCH_RESERVED 0xf1000000 - -/* DAC_CNTL bit constants */ -#define DAC_8BIT_EN 0x00000100 -#define DAC_4BPP_PIX_ORDER 0x00000200 -#define DAC_CRC_EN 0x00080000 -#define DAC_MASK_ALL (0xff << 24) -#define DAC_PDWN (1 << 15) -#define DAC_EXPAND_MODE (1 << 14) -#define DAC_VGA_ADR_EN (1 << 13) -#define DAC_RANGE_CNTL (3 << 0) -#define DAC_RANGE_CNTL_MASK 0x03 -#define DAC_BLANKING (1 << 2) -#define DAC_CMP_EN (1 << 3) -#define DAC_CMP_OUTPUT (1 << 7) - -/* DAC_CNTL2 bit constants */ -#define DAC2_EXPAND_MODE (1 << 14) -#define DAC2_CMP_EN (1 << 7) -#define DAC2_PALETTE_ACCESS_CNTL (1 << 5) - -/* DAC_EXT_CNTL bit constants */ -#define DAC_FORCE_BLANK_OFF_EN (1 << 4) -#define DAC_FORCE_DATA_EN (1 << 5) -#define DAC_FORCE_DATA_SEL_MASK (3 << 6) -#define DAC_FORCE_DATA_MASK 0x0003ff00 -#define DAC_FORCE_DATA_SHIFT 8 - -/* GEN_RESET_CNTL bit constants */ -#define SOFT_RESET_GUI 0x00000001 -#define SOFT_RESET_VCLK 0x00000100 -#define SOFT_RESET_PCLK 0x00000200 -#define SOFT_RESET_ECP 0x00000400 -#define SOFT_RESET_DISPENG_XCLK 0x00000800 - -/* MEM_CNTL bit constants */ -#define MEM_CTLR_STATUS_IDLE 0x00000000 -#define MEM_CTLR_STATUS_BUSY 0x00100000 -#define MEM_SEQNCR_STATUS_IDLE 0x00000000 -#define MEM_SEQNCR_STATUS_BUSY 0x00200000 -#define MEM_ARBITER_STATUS_IDLE 0x00000000 -#define MEM_ARBITER_STATUS_BUSY 0x00400000 -#define MEM_REQ_UNLOCK 0x00000000 -#define MEM_REQ_LOCK 0x00800000 -#define MEM_NUM_CHANNELS_MASK 0x00000001 -#define MEM_USE_B_CH_ONLY 0x00000002 -#define RV100_MEM_HALF_MODE 0x00000008 -#define R300_MEM_NUM_CHANNELS_MASK 0x00000003 -#define R300_MEM_USE_CD_CH_ONLY 0x00000004 - -/* RBBM_GUICNTL bit connstants */ -#define HOST_DATA_SWAP_NONE (0 << 0) -#define HOST_DATA_SWAP_16BIT (1 << 0) -#define HOST_DATA_SWAP_32BIT (2 << 0) -#define HOST_DATA_SWAP_HDW (3 << 0) - -/* RBBM_SOFT_RESET bit constants */ -#define SOFT_RESET_CP (1 << 0) -#define SOFT_RESET_HI (1 << 1) -#define SOFT_RESET_SE (1 << 2) -#define SOFT_RESET_RE (1 << 3) -#define SOFT_RESET_PP (1 << 4) -#define SOFT_RESET_E2 (1 << 5) -#define SOFT_RESET_RB (1 << 6) -#define SOFT_RESET_HDP (1 << 7) - -/* RBBM_STATUS bit constants */ -#define RBBM_FIFOCNT_MASK 0x007f -#define RBBM_ACTIVE (1 << 31) - -/* SURFACE_CNTL bit constants */ -#define SURF_TRANSLATION_DIS (1 << 8) -#define NONSURF_AP0_SWP_16BPP (1 << 20) -#define NONSURF_AP0_SWP_32BPP (1 << 21) -#define NONSURF_AP1_SWP_16BPP (1 << 22) -#define NONSURF_AP1_SWP_32BPP (1 << 23) - -/* SURFACE_INFO bit constants */ -#define SURF_TILE_COLOR_MACRO (0 << 16) -#define SURF_TILE_COLOR_BOTH (1 << 16) -#define SURF_TILE_DEPTH_32BPP (2 << 16) -#define SURF_TILE_DEPTH_16BPP (3 << 16) -#define R200_SURF_TILE_NONE (0 << 16) -#define R200_SURF_TILE_COLOR_MACRO (1 << 16) -#define R200_SURF_TILE_COLOR_MICRO (2 << 16) -#define R200_SURF_TILE_COLOR_BOTH (3 << 16) -#define R200_SURF_TILE_DEPTH_32BPP (4 << 16) -#define R200_SURF_TILE_DEPTH_16BPP (5 << 16) -#define R300_SURF_TILE_NONE (0 << 16) -#define R300_SURF_TILE_COLOR_MACRO (1 << 16) -#define R300_SURF_TILE_DEPTH_32BPP (2 << 16) -#define SURF_AP0_SWP_16BPP (1 << 20) -#define SURF_AP0_SWP_32BPP (1 << 21) -#define SURF_AP1_SWP_16BPP (1 << 22) -#define SURF_AP1_SWP_32BPP (1 << 23) - - -/* DEFAULT_SC_BOTTOM_RIGHT bit constants */ -#define DEFAULT_SC_RIGHT_MAX (0x1fff << 0) -#define DEFAULT_SC_BOTTOM_MAX (0x1fff << 16) - -/* MM_INDEX bit constants */ -#define MM_APER 0x80000000 - -/* CLR_CMP_CNTL bit constants */ -#define COMPARE_SRC_FALSE 0x00000000 -#define COMPARE_SRC_TRUE 0x00000001 -#define COMPARE_SRC_NOT_EQUAL 0x00000004 -#define COMPARE_SRC_EQUAL 0x00000005 -#define COMPARE_SRC_EQUAL_FLIP 0x00000007 -#define COMPARE_DST_FALSE 0x00000000 -#define COMPARE_DST_TRUE 0x00000100 -#define COMPARE_DST_NOT_EQUAL 0x00000400 -#define COMPARE_DST_EQUAL 0x00000500 -#define COMPARE_DESTINATION 0x00000000 -#define COMPARE_SOURCE 0x01000000 -#define COMPARE_SRC_AND_DST 0x02000000 - -/* CMP_CNTL bit constants */ -#define SRC_CMP_EQ_COLOR (4 << 0) -#define SRC_CMP_NEQ_COLOR (5 << 0) -#define CLR_CMP_SRC_SOURCE (1 << 24) - -/* DP_CNTL bit constants */ -#define DST_X_RIGHT_TO_LEFT 0x00000000 -#define DST_X_LEFT_TO_RIGHT 0x00000001 -#define DST_Y_BOTTOM_TO_TOP 0x00000000 -#define DST_Y_TOP_TO_BOTTOM 0x00000002 -#define DST_X_MAJOR 0x00000000 -#define DST_Y_MAJOR 0x00000004 -#define DST_X_TILE 0x00000008 -#define DST_Y_TILE 0x00000010 -#define DST_LAST_PEL 0x00000020 -#define DST_TRAIL_X_RIGHT_TO_LEFT 0x00000000 -#define DST_TRAIL_X_LEFT_TO_RIGHT 0x00000040 -#define DST_TRAP_FILL_RIGHT_TO_LEFT 0x00000000 -#define DST_TRAP_FILL_LEFT_TO_RIGHT 0x00000080 -#define DST_BRES_SIGN 0x00000100 -#define DST_HOST_BIG_ENDIAN_EN 0x00000200 -#define DST_POLYLINE_NONLAST 0x00008000 -#define DST_RASTER_STALL 0x00010000 -#define DST_POLY_EDGE 0x00040000 - -/* DP_CNTL_YDIR_XDIR_YMAJOR bit constants (short version of DP_CNTL) */ -#define DST_X_MAJOR_S 0x00000000 -#define DST_Y_MAJOR_S 0x00000001 -#define DST_Y_BOTTOM_TO_TOP_S 0x00000000 -#define DST_Y_TOP_TO_BOTTOM_S 0x00008000 -#define DST_X_RIGHT_TO_LEFT_S 0x00000000 -#define DST_X_LEFT_TO_RIGHT_S 0x80000000 - -/* SC_TOP_LEFT_C bit contsants */ -#define SC_SIGN_MASK_LO 0x8000 -#define SC_SIGN_MASK_HI 0x80000000 - -/* DST_LINE_PATCOUNT bit constants */ -#define BRES_CNTL_SHIFT 8 - -/* DP_DATATYPE bit constants */ -#define DST_8BPP 0x00000002 -#define DST_15BPP 0x00000003 -#define DST_16BPP 0x00000004 -#define DST_24BPP 0x00000005 -#define DST_32BPP 0x00000006 -#define DST_8BPP_RGB332 0x00000007 -#define DST_8BPP_Y8 0x00000008 -#define DST_8BPP_RGB8 0x00000009 -#define DST_16BPP_VYUY422 0x0000000b -#define DST_16BPP_YVYU422 0x0000000c -#define DST_32BPP_AYUV444 0x0000000e -#define DST_16BPP_ARGB4444 0x0000000f -#define BRUSH_SOLIDCOLOR 0x00000d00 -#define SRC_MONO 0x00000000 -#define SRC_MONO_LBKGD 0x00010000 -#define SRC_DSTCOLOR 0x00030000 -#define BYTE_ORDER_MSB_TO_LSB 0x00000000 -#define BYTE_ORDER_LSB_TO_MSB 0x40000000 -#define DP_CONVERSION_TEMP 0x80000000 -#define HOST_BIG_ENDIAN_EN (1 << 29) - -/* DP_GUI_MASTER_CNTL bit constants */ -#define GMC_SRC_PITCH_OFFSET_DEFAULT 0x00000000 -#define GMC_SRC_PITCH_OFFSET_LEAVE 0x00000001 -#define GMC_DST_PITCH_OFFSET_DEFAULT 0x00000000 -#define GMC_DST_PITCH_OFFSET_LEAVE 0x00000002 -#define GMC_SRC_CLIP_DEFAULT 0x00000000 -#define GMC_SRC_CLIP_LEAVE 0x00000004 -#define GMC_DST_CLIP_DEFAULT 0x00000000 -#define GMC_DST_CLIP_LEAVE 0x00000008 -#define GMC_BRUSH_8x8MONO 0x00000000 -#define GMC_BRUSH_8x8MONO_LBKGD 0x00000010 -#define GMC_BRUSH_8x1MONO 0x00000020 -#define GMC_BRUSH_8x1MONO_LBKGD 0x00000030 -#define GMC_BRUSH_1x8MONO 0x00000040 -#define GMC_BRUSH_1x8MONO_LBKGD 0x00000050 -#define GMC_BRUSH_32x1MONO 0x00000060 -#define GMC_BRUSH_32x1MONO_LBKGD 0x00000070 -#define GMC_BRUSH_32x32MONO 0x00000080 -#define GMC_BRUSH_32x32MONO_LBKGD 0x00000090 -#define GMC_BRUSH_8x8COLOR 0x000000a0 -#define GMC_BRUSH_8x1COLOR 0x000000b0 -#define GMC_BRUSH_1x8COLOR 0x000000c0 -#define GMC_DST_8BPP 0x00000200 -#define GMC_DST_8BPP_RGB332 0x00000700 -#define GMC_DST_8BPP_Y8 0x00000800 -#define GMC_DST_8BPP_RGB8 0x00000900 -#define GMC_DST_16BPP_VYUY422 0x00000b00 -#define GMC_DST_16BPP_YVYU422 0x00000c00 -#define GMC_DST_32BPP_AYUV444 0x00000e00 -#define GMC_DST_16BPP_ARGB4444 0x00000f00 -#define GMC_SRC_MONO 0x00000000 -#define GMC_SRC_MONO_LBKGD 0x00001000 -#define GMC_SRC_DSTCOLOR 0x00003000 -#define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000 -#define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000 -#define GMC_DP_CONVERSION_TEMP_9300 0x00008000 -#define GMC_DP_CONVERSION_TEMP_6500 0x00000000 -#define GMC_DP_SRC_RECT 0x02000000 -#define GMC_DP_SRC_HOST 0x03000000 -#define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000 -#define GMC_3D_FCN_EN_CLR 0x00000000 -#define GMC_3D_FCN_EN_SET 0x08000000 -#define GMC_DST_CLR_CMP_FCN_LEAVE 0x00000000 -#define GMC_DST_CLR_CMP_FCN_CLEAR 0x10000000 -#define GMC_AUX_CLIP_LEAVE 0x00000000 -#define GMC_AUX_CLIP_CLEAR 0x20000000 -#define GMC_WRITE_MASK_LEAVE 0x00000000 -#define GMC_WRITE_MASK_SET 0x40000000 -#define GMC_CLR_CMP_CNTL_DIS (1 << 28) -#define GMC_SRC_DATATYPE_COLOR (3 << 12) -#define DP_SRC_SOURCE_MASK (7 << 24) -#define GMC_BRUSH_NONE (15 << 4) -#define DP_SRC_SOURCE_MEMORY (2 << 24) -#define GMC_BRUSH_SOLIDCOLOR 0x000000d0 -#define GMC_SRC_PITCH_OFFSET_CNTL (1 << 0) -#define GMC_DST_PITCH_OFFSET_CNTL (1 << 1) -#define GMC_SRC_CLIPPING (1 << 2) -#define GMC_DST_CLIPPING (1 << 3) -#define GMC_BRUSH_DATATYPE_MASK (0x0f << 4) -#define GMC_BRUSH_8X8_MONO_FG_BG (0 << 4) -#define GMC_BRUSH_8X8_MONO_FG_LA (1 << 4) -#define GMC_BRUSH_1X8_MONO_FG_BG (4 << 4) -#define GMC_BRUSH_1X8_MONO_FG_LA (5 << 4) -#define GMC_BRUSH_32X1_MONO_FG_BG (6 << 4) -#define GMC_BRUSH_32X1_MONO_FG_LA (7 << 4) -#define GMC_BRUSH_32X32_MONO_FG_BG (8 << 4) -#define GMC_BRUSH_32X32_MONO_FG_LA (9 << 4) -#define GMC_BRUSH_8X8_COLOR (10 << 4) -#define GMC_BRUSH_1X8_COLOR (12 << 4) -#define GMC_BRUSH_SOLID_COLOR (13 << 4) -#define GMC_BRUSH_NONE (15 << 4) -#define GMC_DST_8BPP_CI (2 << 8) -#define GMC_DST_15BPP (3 << 8) -#define GMC_DST_16BPP (4 << 8) -#define GMC_DST_24BPP (5 << 8) -#define GMC_DST_32BPP (6 << 8) -#define GMC_DST_8BPP_RGB (7 << 8) -#define GMC_DST_Y8 (8 << 8) -#define GMC_DST_RGB8 (9 << 8) -#define GMC_DST_VYUY (11 << 8) -#define GMC_DST_YVYU (12 << 8) -#define GMC_DST_AYUV444 (14 << 8) -#define GMC_DST_ARGB4444 (15 << 8) -#define GMC_DST_DATATYPE_MASK (0x0f << 8) -#define GMC_DST_DATATYPE_SHIFT 8 -#define GMC_SRC_DATATYPE_MASK (3 << 12) -#define GMC_SRC_DATATYPE_MONO_FG_BG (0 << 12) -#define GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12) -#define GMC_SRC_DATATYPE_COLOR (3 << 12) -#define GMC_BYTE_PIX_ORDER (1 << 14) -#define GMC_BYTE_MSB_TO_LSB (0 << 14) -#define GMC_BYTE_LSB_TO_MSB (1 << 14) -#define GMC_CONVERSION_TEMP (1 << 15) -#define GMC_CONVERSION_TEMP_6500 (0 << 15) -#define GMC_CONVERSION_TEMP_9300 (1 << 15) -#define GMC_ROP3_MASK (0xff << 16) -#define DP_SRC_SOURCE_MASK (7 << 24) -#define DP_SRC_SOURCE_MEMORY (2 << 24) -#define DP_SRC_SOURCE_HOST_DATA (3 << 24) -#define GMC_3D_FCN_EN (1 << 27) -#define GMC_CLR_CMP_CNTL_DIS (1 << 28) -#define GMC_AUX_CLIP_DIS (1 << 29) -#define GMC_WR_MSK_DIS (1 << 30) -#define GMC_LD_BRUSH_Y_X (1 << 31) -#define ROP3_ZERO 0x00000000 -#define ROP3_DSa 0x00880000 -#define ROP3_SDna 0x00440000 -#define ROP3_S 0x00cc0000 -#define ROP3_SRCCOPY 0x00cc0000 -#define ROP3_DSna 0x00220000 -#define ROP3_D 0x00aa0000 -#define ROP3_DSx 0x00660000 -#define ROP3_DSo 0x00ee0000 -#define ROP3_DSon 0x00110000 -#define ROP3_DSxn 0x00990000 -#define ROP3_Dn 0x00550000 -#define ROP3_SDno 0x00dd0000 -#define ROP3_Sn 0x00330000 -#define ROP3_DSno 0x00bb0000 -#define ROP3_DSan 0x00770000 -#define ROP3_ONE 0x00ff0000 -#define ROP3_DPa 0x00a00000 -#define ROP3_PDna 0x00500000 -#define ROP3_P 0x00f00000 -#define ROP3_PATCOPY 0x00f00000 -#define ROP3_DPna 0x000a0000 -#define ROP3_D 0x00aa0000 -#define ROP3_DPx 0x005a0000 -#define ROP3_DPo 0x00fa0000 -#define ROP3_DPon 0x00050000 -#define ROP3_PDxn 0x00a50000 -#define ROP3_PDno 0x00f50000 -#define ROP3_Pn 0x000f0000 -#define ROP3_DPno 0x00af0000 -#define ROP3_DPan 0x005f0000 - -/* DP_MIX bit constants */ -#define DP_SRC_RECT 0x00000200 -#define DP_SRC_HOST 0x00000300 -#define DP_SRC_HOST_BYTEALIGN 0x00000400 - -/* MPLL_CNTL bit constants */ -#define MPLL_RESET 0x00000001 - -/* MDLL_CKO bit constants */ -#define MCKOA_SLEEP 0x00000001 -#define MCKOA_RESET 0x00000002 -#define MCKOA_REF_SKEW_MASK 0x00000700 -#define MCKOA_FB_SKEW_MASK 0x00007000 - -/* MDLL_RDCKA bit constants */ -#define MRDCKA0_SLEEP 0x00000001 -#define MRDCKA0_RESET 0x00000002 -#define MRDCKA1_SLEEP 0x00010000 -#define MRDCKA1_RESET 0x00020000 - -/* VCLK_ECP_CNTL constants */ -#define VCLK_SRC_SEL_MASK 0x03 -#define VCLK_SRC_SEL_CPUCLK 0x00 -#define VCLK_SRC_SEL_PSCANCLK 0x01 -#define VCLK_SRC_SEL_BYTECLK 0x02 -#define VCLK_SRC_SEL_PPLLCLK 0x03 -#define PIXCLK_ALWAYS_ONb 0x00000040 -#define PIXCLK_DAC_ALWAYS_ONb 0x00000080 - -/* BUS_CNTL1 constants */ -#define BUS_CNTL1_MOBILE_PLATFORM_SEL_MASK 0x0c000000 -#define BUS_CNTL1_MOBILE_PLATFORM_SEL_SHIFT 26 -#define BUS_CNTL1_AGPCLK_VALID 0x80000000 - -/* PLL_PWRMGT_CNTL constants */ -#define PLL_PWRMGT_CNTL_SPLL_TURNOFF 0x00000002 -#define PLL_PWRMGT_CNTL_PPLL_TURNOFF 0x00000004 -#define PLL_PWRMGT_CNTL_P2PLL_TURNOFF 0x00000008 -#define PLL_PWRMGT_CNTL_TVPLL_TURNOFF 0x00000010 -#define PLL_PWRMGT_CNTL_MOBILE_SU 0x00010000 -#define PLL_PWRMGT_CNTL_SU_SCLK_USE_BCLK 0x00020000 -#define PLL_PWRMGT_CNTL_SU_MCLK_USE_BCLK 0x00040000 - -/* TV_DAC_CNTL constants */ -#define TV_DAC_CNTL_BGSLEEP 0x00000040 -#define TV_DAC_CNTL_DETECT 0x00000010 -#define TV_DAC_CNTL_BGADJ_MASK 0x000f0000 -#define TV_DAC_CNTL_DACADJ_MASK 0x00f00000 -#define TV_DAC_CNTL_BGADJ__SHIFT 16 -#define TV_DAC_CNTL_DACADJ__SHIFT 20 -#define TV_DAC_CNTL_RDACPD 0x01000000 -#define TV_DAC_CNTL_GDACPD 0x02000000 -#define TV_DAC_CNTL_BDACPD 0x04000000 - -/* DISP_MISC_CNTL constants */ -#define DISP_MISC_CNTL_SOFT_RESET_GRPH_PP (1 << 0) -#define DISP_MISC_CNTL_SOFT_RESET_SUBPIC_PP (1 << 1) -#define DISP_MISC_CNTL_SOFT_RESET_OV0_PP (1 << 2) -#define DISP_MISC_CNTL_SOFT_RESET_GRPH_SCLK (1 << 4) -#define DISP_MISC_CNTL_SOFT_RESET_SUBPIC_SCLK (1 << 5) -#define DISP_MISC_CNTL_SOFT_RESET_OV0_SCLK (1 << 6) -#define DISP_MISC_CNTL_SOFT_RESET_GRPH2_PP (1 << 12) -#define DISP_MISC_CNTL_SOFT_RESET_GRPH2_SCLK (1 << 15) -#define DISP_MISC_CNTL_SOFT_RESET_LVDS (1 << 16) -#define DISP_MISC_CNTL_SOFT_RESET_TMDS (1 << 17) -#define DISP_MISC_CNTL_SOFT_RESET_DIG_TMDS (1 << 18) -#define DISP_MISC_CNTL_SOFT_RESET_TV (1 << 19) - -/* DISP_PWR_MAN constants */ -#define DISP_PWR_MAN_DISP_PWR_MAN_D3_CRTC_EN (1 << 0) -#define DISP_PWR_MAN_DISP2_PWR_MAN_D3_CRTC2_EN (1 << 4) -#define DISP_PWR_MAN_DISP_D3_RST (1 << 16) -#define DISP_PWR_MAN_DISP_D3_REG_RST (1 << 17) -#define DISP_PWR_MAN_DISP_D3_GRPH_RST (1 << 18) -#define DISP_PWR_MAN_DISP_D3_SUBPIC_RST (1 << 19) -#define DISP_PWR_MAN_DISP_D3_OV0_RST (1 << 20) -#define DISP_PWR_MAN_DISP_D1D2_GRPH_RST (1 << 21) -#define DISP_PWR_MAN_DISP_D1D2_SUBPIC_RST (1 << 22) -#define DISP_PWR_MAN_DISP_D1D2_OV0_RST (1 << 23) -#define DISP_PWR_MAN_DIG_TMDS_ENABLE_RST (1 << 24) -#define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25) -#define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26) - -/* DST_PITCH_OFFSET bit constants */ -#define PITCH_SHIFT 21 -#define DST_TILE_LINEAR (0 << 30) -#define DST_TILE_MACRO (1 << 30) -#define DST_TILE_MICRO (2 << 30) -#define DST_TILE_BOTH (3 << 30) - -/* masks */ -#define CONFIG_MEMSIZE_MASK 0x1f000000 -#define MEM_CFG_TYPE 0x40000000 -#define DST_OFFSET_MASK 0x003fffff -#define DST_PITCH_MASK 0x3fc00000 -#define DEFAULT_TILE_MASK 0xc0000000 -#define PPLL_DIV_SEL_MASK 0x00000300 -#define PPLL_RESET 0x00000001 -#define PPLL_SLEEP 0x00000002 -#define PPLL_ATOMIC_UPDATE_EN 0x00010000 -#define PPLL_REF_DIV_MASK 0x000003ff -#define PPLL_FB3_DIV_MASK 0x000007ff -#define PPLL_POST3_DIV_MASK 0x00070000 -#define PPLL_ATOMIC_UPDATE_R 0x00008000 -#define PPLL_ATOMIC_UPDATE_W 0x00008000 -#define PPLL_VGA_ATOMIC_UPDATE_EN 0x00020000 -#define R300_PPLL_REF_DIV_ACC_MASK (0x3ff << 18) -#define R300_PPLL_REF_DIV_ACC_SHIFT 18 - -#define GUI_ACTIVE 0x80000000 - -#define MC_IND_INDEX 0x01F8 -#define MC_IND_DATA 0x01FC - -/* PAD_CTLR_STRENGTH */ -#define PAD_MANUAL_OVERRIDE 0x80000000 - -/* pllCLK_PIN_CNTL */ -#define CLK_PIN_CNTL__OSC_EN_MASK 0x00000001L -#define CLK_PIN_CNTL__OSC_EN 0x00000001L -#define CLK_PIN_CNTL__XTL_LOW_GAIN_MASK 0x00000004L -#define CLK_PIN_CNTL__XTL_LOW_GAIN 0x00000004L -#define CLK_PIN_CNTL__DONT_USE_XTALIN_MASK 0x00000010L -#define CLK_PIN_CNTL__DONT_USE_XTALIN 0x00000010L -#define CLK_PIN_CNTL__SLOW_CLOCK_SOURCE_MASK 0x00000020L -#define CLK_PIN_CNTL__SLOW_CLOCK_SOURCE 0x00000020L -#define CLK_PIN_CNTL__CG_CLK_TO_OUTPIN_MASK 0x00000800L -#define CLK_PIN_CNTL__CG_CLK_TO_OUTPIN 0x00000800L -#define CLK_PIN_CNTL__CG_COUNT_UP_TO_OUTPIN_MASK 0x00001000L -#define CLK_PIN_CNTL__CG_COUNT_UP_TO_OUTPIN 0x00001000L -#define CLK_PIN_CNTL__ACCESS_REGS_IN_SUSPEND_MASK 0x00002000L -#define CLK_PIN_CNTL__ACCESS_REGS_IN_SUSPEND 0x00002000L -#define CLK_PIN_CNTL__CG_SPARE_MASK 0x00004000L -#define CLK_PIN_CNTL__CG_SPARE 0x00004000L -#define CLK_PIN_CNTL__SCLK_DYN_START_CNTL_MASK 0x00008000L -#define CLK_PIN_CNTL__SCLK_DYN_START_CNTL 0x00008000L -#define CLK_PIN_CNTL__CP_CLK_RUNNING_MASK 0x00010000L -#define CLK_PIN_CNTL__CP_CLK_RUNNING 0x00010000L -#define CLK_PIN_CNTL__CG_SPARE_RD_MASK 0x00060000L -#define CLK_PIN_CNTL__XTALIN_ALWAYS_ONb_MASK 0x00080000L -#define CLK_PIN_CNTL__XTALIN_ALWAYS_ONb 0x00080000L -#define CLK_PIN_CNTL__PWRSEQ_DELAY_MASK 0xff000000L - -/* pllCLK_PWRMGT_CNTL */ -#define CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF__SHIFT 0x00000000 -#define CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF__SHIFT 0x00000001 -#define CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF__SHIFT 0x00000002 -#define CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF__SHIFT 0x00000003 -#define CLK_PWRMGT_CNTL__MCLK_TURNOFF__SHIFT 0x00000004 -#define CLK_PWRMGT_CNTL__SCLK_TURNOFF__SHIFT 0x00000005 -#define CLK_PWRMGT_CNTL__PCLK_TURNOFF__SHIFT 0x00000006 -#define CLK_PWRMGT_CNTL__P2CLK_TURNOFF__SHIFT 0x00000007 -#define CLK_PWRMGT_CNTL__MC_CH_MODE__SHIFT 0x00000008 -#define CLK_PWRMGT_CNTL__TEST_MODE__SHIFT 0x00000009 -#define CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN__SHIFT 0x0000000a -#define CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE__SHIFT 0x0000000c -#define CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT__SHIFT 0x0000000d -#define CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT__SHIFT 0x0000000f -#define CLK_PWRMGT_CNTL__MC_BUSY__SHIFT 0x00000010 -#define CLK_PWRMGT_CNTL__MC_INT_CNTL__SHIFT 0x00000011 -#define CLK_PWRMGT_CNTL__MC_SWITCH__SHIFT 0x00000012 -#define CLK_PWRMGT_CNTL__DLL_READY__SHIFT 0x00000013 -#define CLK_PWRMGT_CNTL__DISP_PM__SHIFT 0x00000014 -#define CLK_PWRMGT_CNTL__DYN_STOP_MODE__SHIFT 0x00000015 -#define CLK_PWRMGT_CNTL__CG_NO1_DEBUG__SHIFT 0x00000018 -#define CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF__SHIFT 0x0000001e -#define CLK_PWRMGT_CNTL__TVCLK_TURNOFF__SHIFT 0x0000001f - -/* pllP2PLL_CNTL */ -#define P2PLL_CNTL__P2PLL_RESET_MASK 0x00000001L -#define P2PLL_CNTL__P2PLL_RESET 0x00000001L -#define P2PLL_CNTL__P2PLL_SLEEP_MASK 0x00000002L -#define P2PLL_CNTL__P2PLL_SLEEP 0x00000002L -#define P2PLL_CNTL__P2PLL_TST_EN_MASK 0x00000004L -#define P2PLL_CNTL__P2PLL_TST_EN 0x00000004L -#define P2PLL_CNTL__P2PLL_REFCLK_SEL_MASK 0x00000010L -#define P2PLL_CNTL__P2PLL_REFCLK_SEL 0x00000010L -#define P2PLL_CNTL__P2PLL_FBCLK_SEL_MASK 0x00000020L -#define P2PLL_CNTL__P2PLL_FBCLK_SEL 0x00000020L -#define P2PLL_CNTL__P2PLL_TCPOFF_MASK 0x00000040L -#define P2PLL_CNTL__P2PLL_TCPOFF 0x00000040L -#define P2PLL_CNTL__P2PLL_TVCOMAX_MASK 0x00000080L -#define P2PLL_CNTL__P2PLL_TVCOMAX 0x00000080L -#define P2PLL_CNTL__P2PLL_PCP_MASK 0x00000700L -#define P2PLL_CNTL__P2PLL_PVG_MASK 0x00003800L -#define P2PLL_CNTL__P2PLL_PDC_MASK 0x0000c000L -#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_EN_MASK 0x00010000L -#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_EN 0x00010000L -#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_SYNC_MASK 0x00040000L -#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_SYNC 0x00040000L -#define P2PLL_CNTL__P2PLL_DISABLE_AUTO_RESET_MASK 0x00080000L -#define P2PLL_CNTL__P2PLL_DISABLE_AUTO_RESET 0x00080000L - -/* pllPIXCLKS_CNTL */ -#define PIXCLKS_CNTL__PIX2CLK_SRC_SEL__SHIFT 0x00000000 -#define PIXCLKS_CNTL__PIX2CLK_INVERT__SHIFT 0x00000004 -#define PIXCLKS_CNTL__PIX2CLK_SRC_INVERT__SHIFT 0x00000005 -#define PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb__SHIFT 0x00000006 -#define PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb__SHIFT 0x00000007 -#define PIXCLKS_CNTL__PIXCLK_TV_SRC_SEL__SHIFT 0x00000008 -#define PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb__SHIFT 0x0000000b -#define PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb__SHIFT 0x0000000c -#define PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb__SHIFT 0x0000000d -#define PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb__SHIFT 0x0000000e -#define PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb__SHIFT 0x0000000f - -/* pllPIXCLKS_CNTL */ -#define PIXCLKS_CNTL__PIX2CLK_SRC_SEL_MASK 0x00000003L -#define PIXCLKS_CNTL__PIX2CLK_INVERT 0x00000010L -#define PIXCLKS_CNTL__PIX2CLK_SRC_INVERT 0x00000020L -#define PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb 0x00000040L -#define PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb 0x00000080L -#define PIXCLKS_CNTL__PIXCLK_TV_SRC_SEL 0x00000100L -#define PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb 0x00000800L -#define PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb 0x00001000L -#define PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb 0x00002000L -#define PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb 0x00004000L -#define PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb 0x00008000L -#define PIXCLKS_CNTL__DISP_TVOUT_PIXCLK_TV_ALWAYS_ONb (1 << 9) -#define PIXCLKS_CNTL__R300_DVOCLK_ALWAYS_ONb (1 << 10) -#define PIXCLKS_CNTL__R300_PIXCLK_DVO_ALWAYS_ONb (1 << 13) -#define PIXCLKS_CNTL__R300_PIXCLK_TRANS_ALWAYS_ONb (1 << 16) -#define PIXCLKS_CNTL__R300_PIXCLK_TVO_ALWAYS_ONb (1 << 17) -#define PIXCLKS_CNTL__R300_P2G2CLK_ALWAYS_ONb (1 << 18) -#define PIXCLKS_CNTL__R300_P2G2CLK_DAC_ALWAYS_ONb (1 << 19) -#define PIXCLKS_CNTL__R300_DISP_DAC_PIXCLK_DAC2_BLANK_OFF (1 << 23) - -/* pllP2PLL_DIV_0 */ -#define P2PLL_DIV_0__P2PLL_FB_DIV_MASK 0x000007ffL -#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_W_MASK 0x00008000L -#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_W 0x00008000L -#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_R_MASK 0x00008000L -#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_R 0x00008000L -#define P2PLL_DIV_0__P2PLL_POST_DIV_MASK 0x00070000L - -/* pllSCLK_CNTL */ -#define SCLK_CNTL__SCLK_SRC_SEL_MASK 0x00000007L -#define SCLK_CNTL__CP_MAX_DYN_STOP_LAT 0x00000008L -#define SCLK_CNTL__HDP_MAX_DYN_STOP_LAT 0x00000010L -#define SCLK_CNTL__TV_MAX_DYN_STOP_LAT 0x00000020L -#define SCLK_CNTL__E2_MAX_DYN_STOP_LAT 0x00000040L -#define SCLK_CNTL__SE_MAX_DYN_STOP_LAT 0x00000080L -#define SCLK_CNTL__IDCT_MAX_DYN_STOP_LAT 0x00000100L -#define SCLK_CNTL__VIP_MAX_DYN_STOP_LAT 0x00000200L -#define SCLK_CNTL__RE_MAX_DYN_STOP_LAT 0x00000400L -#define SCLK_CNTL__PB_MAX_DYN_STOP_LAT 0x00000800L -#define SCLK_CNTL__TAM_MAX_DYN_STOP_LAT 0x00001000L -#define SCLK_CNTL__TDM_MAX_DYN_STOP_LAT 0x00002000L -#define SCLK_CNTL__RB_MAX_DYN_STOP_LAT 0x00004000L -#define SCLK_CNTL__DYN_STOP_LAT_MASK 0x00007ff8 -#define SCLK_CNTL__FORCE_DISP2 0x00008000L -#define SCLK_CNTL__FORCE_CP 0x00010000L -#define SCLK_CNTL__FORCE_HDP 0x00020000L -#define SCLK_CNTL__FORCE_DISP1 0x00040000L -#define SCLK_CNTL__FORCE_TOP 0x00080000L -#define SCLK_CNTL__FORCE_E2 0x00100000L -#define SCLK_CNTL__FORCE_SE 0x00200000L -#define SCLK_CNTL__FORCE_IDCT 0x00400000L -#define SCLK_CNTL__FORCE_VIP 0x00800000L -#define SCLK_CNTL__FORCE_RE 0x01000000L -#define SCLK_CNTL__FORCE_PB 0x02000000L -#define SCLK_CNTL__FORCE_TAM 0x04000000L -#define SCLK_CNTL__FORCE_TDM 0x08000000L -#define SCLK_CNTL__FORCE_RB 0x10000000L -#define SCLK_CNTL__FORCE_TV_SCLK 0x20000000L -#define SCLK_CNTL__FORCE_SUBPIC 0x40000000L -#define SCLK_CNTL__FORCE_OV0 0x80000000L -#define SCLK_CNTL__R300_FORCE_VAP (1<<21) -#define SCLK_CNTL__R300_FORCE_SR (1<<25) -#define SCLK_CNTL__R300_FORCE_PX (1<<26) -#define SCLK_CNTL__R300_FORCE_TX (1<<27) -#define SCLK_CNTL__R300_FORCE_US (1<<28) -#define SCLK_CNTL__R300_FORCE_SU (1<<30) -#define SCLK_CNTL__FORCEON_MASK 0xffff8000L - -/* pllSCLK_CNTL2 */ -#define SCLK_CNTL2__R300_TCL_MAX_DYN_STOP_LAT (1<<10) -#define SCLK_CNTL2__R300_GA_MAX_DYN_STOP_LAT (1<<11) -#define SCLK_CNTL2__R300_CBA_MAX_DYN_STOP_LAT (1<<12) -#define SCLK_CNTL2__R300_FORCE_TCL (1<<13) -#define SCLK_CNTL2__R300_FORCE_CBA (1<<14) -#define SCLK_CNTL2__R300_FORCE_GA (1<<15) - -/* SCLK_MORE_CNTL */ -#define SCLK_MORE_CNTL__DISPREGS_MAX_DYN_STOP_LAT 0x00000001L -#define SCLK_MORE_CNTL__MC_GUI_MAX_DYN_STOP_LAT 0x00000002L -#define SCLK_MORE_CNTL__MC_HOST_MAX_DYN_STOP_LAT 0x00000004L -#define SCLK_MORE_CNTL__FORCE_DISPREGS 0x00000100L -#define SCLK_MORE_CNTL__FORCE_MC_GUI 0x00000200L -#define SCLK_MORE_CNTL__FORCE_MC_HOST 0x00000400L -#define SCLK_MORE_CNTL__STOP_SCLK_EN 0x00001000L -#define SCLK_MORE_CNTL__STOP_SCLK_A 0x00002000L -#define SCLK_MORE_CNTL__STOP_SCLK_B 0x00004000L -#define SCLK_MORE_CNTL__STOP_SCLK_C 0x00008000L -#define SCLK_MORE_CNTL__HALF_SPEED_SCLK 0x00010000L -#define SCLK_MORE_CNTL__IO_CG_VOLTAGE_DROP 0x00020000L -#define SCLK_MORE_CNTL__TVFB_SOFT_RESET 0x00040000L -#define SCLK_MORE_CNTL__VOLTAGE_DROP_SYNC 0x00080000L -#define SCLK_MORE_CNTL__IDLE_DELAY_HALF_SCLK 0x00400000L -#define SCLK_MORE_CNTL__AGP_BUSY_HALF_SCLK 0x00800000L -#define SCLK_MORE_CNTL__CG_SPARE_RD_C_MASK 0xff000000L -#define SCLK_MORE_CNTL__FORCEON 0x00000700L - -/* MCLK_CNTL */ -#define MCLK_CNTL__MCLKA_SRC_SEL_MASK 0x00000007L -#define MCLK_CNTL__YCLKA_SRC_SEL_MASK 0x00000070L -#define MCLK_CNTL__MCLKB_SRC_SEL_MASK 0x00000700L -#define MCLK_CNTL__YCLKB_SRC_SEL_MASK 0x00007000L -#define MCLK_CNTL__FORCE_MCLKA_MASK 0x00010000L -#define MCLK_CNTL__FORCE_MCLKA 0x00010000L -#define MCLK_CNTL__FORCE_MCLKB_MASK 0x00020000L -#define MCLK_CNTL__FORCE_MCLKB 0x00020000L -#define MCLK_CNTL__FORCE_YCLKA_MASK 0x00040000L -#define MCLK_CNTL__FORCE_YCLKA 0x00040000L -#define MCLK_CNTL__FORCE_YCLKB_MASK 0x00080000L -#define MCLK_CNTL__FORCE_YCLKB 0x00080000L -#define MCLK_CNTL__FORCE_MC_MASK 0x00100000L -#define MCLK_CNTL__FORCE_MC 0x00100000L -#define MCLK_CNTL__FORCE_AIC_MASK 0x00200000L -#define MCLK_CNTL__FORCE_AIC 0x00200000L -#define MCLK_CNTL__MRDCKA0_SOUTSEL_MASK 0x03000000L -#define MCLK_CNTL__MRDCKA1_SOUTSEL_MASK 0x0c000000L -#define MCLK_CNTL__MRDCKB0_SOUTSEL_MASK 0x30000000L -#define MCLK_CNTL__MRDCKB1_SOUTSEL_MASK 0xc0000000L -#define MCLK_CNTL__R300_DISABLE_MC_MCLKA (1 << 21) -#define MCLK_CNTL__R300_DISABLE_MC_MCLKB (1 << 21) - -/* MCLK_MISC */ -#define MCLK_MISC__SCLK_SOURCED_FROM_MPLL_SEL_MASK 0x00000003L -#define MCLK_MISC__MCLK_FROM_SPLL_DIV_SEL_MASK 0x00000004L -#define MCLK_MISC__MCLK_FROM_SPLL_DIV_SEL 0x00000004L -#define MCLK_MISC__ENABLE_SCLK_FROM_MPLL_MASK 0x00000008L -#define MCLK_MISC__ENABLE_SCLK_FROM_MPLL 0x00000008L -#define MCLK_MISC__MPLL_MODEA_MODEC_HW_SEL_EN_MASK 0x00000010L -#define MCLK_MISC__MPLL_MODEA_MODEC_HW_SEL_EN 0x00000010L -#define MCLK_MISC__DLL_READY_LAT_MASK 0x00000100L -#define MCLK_MISC__DLL_READY_LAT 0x00000100L -#define MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT_MASK 0x00001000L -#define MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT 0x00001000L -#define MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT_MASK 0x00002000L -#define MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT 0x00002000L -#define MCLK_MISC__MC_MCLK_DYN_ENABLE_MASK 0x00004000L -#define MCLK_MISC__MC_MCLK_DYN_ENABLE 0x00004000L -#define MCLK_MISC__IO_MCLK_DYN_ENABLE_MASK 0x00008000L -#define MCLK_MISC__IO_MCLK_DYN_ENABLE 0x00008000L -#define MCLK_MISC__CGM_CLK_TO_OUTPIN_MASK 0x00010000L -#define MCLK_MISC__CGM_CLK_TO_OUTPIN 0x00010000L -#define MCLK_MISC__CLK_OR_COUNT_SEL_MASK 0x00020000L -#define MCLK_MISC__CLK_OR_COUNT_SEL 0x00020000L -#define MCLK_MISC__EN_MCLK_TRISTATE_IN_SUSPEND_MASK 0x00040000L -#define MCLK_MISC__EN_MCLK_TRISTATE_IN_SUSPEND 0x00040000L -#define MCLK_MISC__CGM_SPARE_RD_MASK 0x00300000L -#define MCLK_MISC__CGM_SPARE_A_RD_MASK 0x00c00000L -#define MCLK_MISC__TCLK_TO_YCLKB_EN_MASK 0x01000000L -#define MCLK_MISC__TCLK_TO_YCLKB_EN 0x01000000L -#define MCLK_MISC__CGM_SPARE_A_MASK 0x0e000000L - -/* VCLK_ECP_CNTL */ -#define VCLK_ECP_CNTL__VCLK_SRC_SEL_MASK 0x00000003L -#define VCLK_ECP_CNTL__VCLK_INVERT 0x00000010L -#define VCLK_ECP_CNTL__PIXCLK_SRC_INVERT 0x00000020L -#define VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb 0x00000040L -#define VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb 0x00000080L -#define VCLK_ECP_CNTL__ECP_DIV_MASK 0x00000300L -#define VCLK_ECP_CNTL__ECP_FORCE_ON 0x00040000L -#define VCLK_ECP_CNTL__SUBCLK_FORCE_ON 0x00080000L -#define VCLK_ECP_CNTL__R300_DISP_DAC_PIXCLK_DAC_BLANK_OFF (1<<23) - -/* PLL_PWRMGT_CNTL */ -#define PLL_PWRMGT_CNTL__MPLL_TURNOFF_MASK 0x00000001L -#define PLL_PWRMGT_CNTL__MPLL_TURNOFF 0x00000001L -#define PLL_PWRMGT_CNTL__SPLL_TURNOFF_MASK 0x00000002L -#define PLL_PWRMGT_CNTL__SPLL_TURNOFF 0x00000002L -#define PLL_PWRMGT_CNTL__PPLL_TURNOFF_MASK 0x00000004L -#define PLL_PWRMGT_CNTL__PPLL_TURNOFF 0x00000004L -#define PLL_PWRMGT_CNTL__P2PLL_TURNOFF_MASK 0x00000008L -#define PLL_PWRMGT_CNTL__P2PLL_TURNOFF 0x00000008L -#define PLL_PWRMGT_CNTL__TVPLL_TURNOFF_MASK 0x00000010L -#define PLL_PWRMGT_CNTL__TVPLL_TURNOFF 0x00000010L -#define PLL_PWRMGT_CNTL__AGPCLK_DYN_STOP_LAT_MASK 0x000001e0L -#define PLL_PWRMGT_CNTL__APM_POWER_STATE_MASK 0x00000600L -#define PLL_PWRMGT_CNTL__APM_PWRSTATE_RD_MASK 0x00001800L -#define PLL_PWRMGT_CNTL__PM_MODE_SEL_MASK 0x00002000L -#define PLL_PWRMGT_CNTL__PM_MODE_SEL 0x00002000L -#define PLL_PWRMGT_CNTL__EN_PWRSEQ_DONE_COND_MASK 0x00004000L -#define PLL_PWRMGT_CNTL__EN_PWRSEQ_DONE_COND 0x00004000L -#define PLL_PWRMGT_CNTL__EN_DISP_PARKED_COND_MASK 0x00008000L -#define PLL_PWRMGT_CNTL__EN_DISP_PARKED_COND 0x00008000L -#define PLL_PWRMGT_CNTL__MOBILE_SU_MASK 0x00010000L -#define PLL_PWRMGT_CNTL__MOBILE_SU 0x00010000L -#define PLL_PWRMGT_CNTL__SU_SCLK_USE_BCLK_MASK 0x00020000L -#define PLL_PWRMGT_CNTL__SU_SCLK_USE_BCLK 0x00020000L -#define PLL_PWRMGT_CNTL__SU_MCLK_USE_BCLK_MASK 0x00040000L -#define PLL_PWRMGT_CNTL__SU_MCLK_USE_BCLK 0x00040000L -#define PLL_PWRMGT_CNTL__SU_SUSTAIN_DISABLE_MASK 0x00080000L -#define PLL_PWRMGT_CNTL__SU_SUSTAIN_DISABLE 0x00080000L -#define PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE_MASK 0x00100000L -#define PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE 0x00100000L -#define PLL_PWRMGT_CNTL__TCL_CLOCK_CTIVE_RD_MASK 0x00200000L -#define PLL_PWRMGT_CNTL__TCL_CLOCK_ACTIVE_RD 0x00200000L -#define PLL_PWRMGT_CNTL__CG_NO2_DEBUG_MASK 0xff000000L - -/* CLK_PWRMGT_CNTL */ -#define CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF_MASK 0x00000001L -#define CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF 0x00000001L -#define CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF_MASK 0x00000002L -#define CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF 0x00000002L -#define CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF_MASK 0x00000004L -#define CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF 0x00000004L -#define CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF_MASK 0x00000008L -#define CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF 0x00000008L -#define CLK_PWRMGT_CNTL__MCLK_TURNOFF_MASK 0x00000010L -#define CLK_PWRMGT_CNTL__MCLK_TURNOFF 0x00000010L -#define CLK_PWRMGT_CNTL__SCLK_TURNOFF_MASK 0x00000020L -#define CLK_PWRMGT_CNTL__SCLK_TURNOFF 0x00000020L -#define CLK_PWRMGT_CNTL__PCLK_TURNOFF_MASK 0x00000040L -#define CLK_PWRMGT_CNTL__PCLK_TURNOFF 0x00000040L -#define CLK_PWRMGT_CNTL__P2CLK_TURNOFF_MASK 0x00000080L -#define CLK_PWRMGT_CNTL__P2CLK_TURNOFF 0x00000080L -#define CLK_PWRMGT_CNTL__MC_CH_MODE_MASK 0x00000100L -#define CLK_PWRMGT_CNTL__MC_CH_MODE 0x00000100L -#define CLK_PWRMGT_CNTL__TEST_MODE_MASK 0x00000200L -#define CLK_PWRMGT_CNTL__TEST_MODE 0x00000200L -#define CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN_MASK 0x00000400L -#define CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN 0x00000400L -#define CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE_MASK 0x00001000L -#define CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE 0x00001000L -#define CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT_MASK 0x00006000L -#define CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT_MASK 0x00008000L -#define CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT 0x00008000L -#define CLK_PWRMGT_CNTL__MC_BUSY_MASK 0x00010000L -#define CLK_PWRMGT_CNTL__MC_BUSY 0x00010000L -#define CLK_PWRMGT_CNTL__MC_INT_CNTL_MASK 0x00020000L -#define CLK_PWRMGT_CNTL__MC_INT_CNTL 0x00020000L -#define CLK_PWRMGT_CNTL__MC_SWITCH_MASK 0x00040000L -#define CLK_PWRMGT_CNTL__MC_SWITCH 0x00040000L -#define CLK_PWRMGT_CNTL__DLL_READY_MASK 0x00080000L -#define CLK_PWRMGT_CNTL__DLL_READY 0x00080000L -#define CLK_PWRMGT_CNTL__DISP_PM_MASK 0x00100000L -#define CLK_PWRMGT_CNTL__DISP_PM 0x00100000L -#define CLK_PWRMGT_CNTL__DYN_STOP_MODE_MASK 0x00e00000L -#define CLK_PWRMGT_CNTL__CG_NO1_DEBUG_MASK 0x3f000000L -#define CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF_MASK 0x40000000L -#define CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF 0x40000000L -#define CLK_PWRMGT_CNTL__TVCLK_TURNOFF_MASK 0x80000000L -#define CLK_PWRMGT_CNTL__TVCLK_TURNOFF 0x80000000L - -/* BUS_CNTL1 */ -#define BUS_CNTL1__PMI_IO_DISABLE_MASK 0x00000001L -#define BUS_CNTL1__PMI_IO_DISABLE 0x00000001L -#define BUS_CNTL1__PMI_MEM_DISABLE_MASK 0x00000002L -#define BUS_CNTL1__PMI_MEM_DISABLE 0x00000002L -#define BUS_CNTL1__PMI_BM_DISABLE_MASK 0x00000004L -#define BUS_CNTL1__PMI_BM_DISABLE 0x00000004L -#define BUS_CNTL1__PMI_INT_DISABLE_MASK 0x00000008L -#define BUS_CNTL1__PMI_INT_DISABLE 0x00000008L -#define BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE_MASK 0x00000020L -#define BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE 0x00000020L -#define BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS_MASK 0x00000100L -#define BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS 0x00000100L -#define BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS_MASK 0x00000200L -#define BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS 0x00000200L -#define BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS_MASK 0x00000400L -#define BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS 0x00000400L -#define BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS_MASK 0x00000800L -#define BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS 0x00000800L -#define BUS_CNTL1__MOBILE_PLATFORM_SEL_MASK 0x0c000000L -#define BUS_CNTL1__SEND_SBA_LATENCY_MASK 0x70000000L -#define BUS_CNTL1__AGPCLK_VALID_MASK 0x80000000L -#define BUS_CNTL1__AGPCLK_VALID 0x80000000L - -/* BUS_CNTL1 */ -#define BUS_CNTL1__PMI_IO_DISABLE__SHIFT 0x00000000 -#define BUS_CNTL1__PMI_MEM_DISABLE__SHIFT 0x00000001 -#define BUS_CNTL1__PMI_BM_DISABLE__SHIFT 0x00000002 -#define BUS_CNTL1__PMI_INT_DISABLE__SHIFT 0x00000003 -#define BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE__SHIFT 0x00000005 -#define BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS__SHIFT 0x00000008 -#define BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS__SHIFT 0x00000009 -#define BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS__SHIFT 0x0000000a -#define BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS__SHIFT 0x0000000b -#define BUS_CNTL1__MOBILE_PLATFORM_SEL__SHIFT 0x0000001a -#define BUS_CNTL1__SEND_SBA_LATENCY__SHIFT 0x0000001c -#define BUS_CNTL1__AGPCLK_VALID__SHIFT 0x0000001f - -/* CRTC_OFFSET_CNTL */ -#define CRTC_OFFSET_CNTL__CRTC_TILE_LINE_MASK 0x0000000fL -#define CRTC_OFFSET_CNTL__CRTC_TILE_LINE_RIGHT_MASK 0x000000f0L -#define CRTC_OFFSET_CNTL__CRTC_TILE_EN_RIGHT_MASK 0x00004000L -#define CRTC_OFFSET_CNTL__CRTC_TILE_EN_RIGHT 0x00004000L -#define CRTC_OFFSET_CNTL__CRTC_TILE_EN_MASK 0x00008000L -#define CRTC_OFFSET_CNTL__CRTC_TILE_EN 0x00008000L -#define CRTC_OFFSET_CNTL__CRTC_OFFSET_FLIP_CNTL_MASK 0x00010000L -#define CRTC_OFFSET_CNTL__CRTC_OFFSET_FLIP_CNTL 0x00010000L -#define CRTC_OFFSET_CNTL__CRTC_STEREO_OFFSET_EN_MASK 0x00020000L -#define CRTC_OFFSET_CNTL__CRTC_STEREO_OFFSET_EN 0x00020000L -#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_EN_MASK 0x000c0000L -#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_OUT_EN_MASK 0x00100000L -#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_OUT_EN 0x00100000L -#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_MASK 0x00200000L -#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC 0x00200000L -#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_LEFT_EN_MASK 0x10000000L -#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_LEFT_EN 0x10000000L -#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_RIGHT_EN_MASK 0x20000000L -#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_RIGHT_EN 0x20000000L -#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_MASK 0x40000000L -#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET 0x40000000L -#define CRTC_OFFSET_CNTL__CRTC_OFFSET_LOCK_MASK 0x80000000L -#define CRTC_OFFSET_CNTL__CRTC_OFFSET_LOCK 0x80000000L -#define R300_CRTC_X_Y_MODE_EN_RIGHT (1 << 6) -#define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_MASK (3 << 7) -#define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_AUTO (0 << 7) -#define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_SINGLE (1 << 7) -#define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_DOUBLE (2 << 7) -#define R300_CRTC_MICRO_TILE_BUFFER_RIGHT_DIS (3 << 7) -#define R300_CRTC_X_Y_MODE_EN (1 << 9) -#define R300_CRTC_MICRO_TILE_BUFFER_MASK (3 << 10) -#define R300_CRTC_MICRO_TILE_BUFFER_AUTO (0 << 10) -#define R300_CRTC_MICRO_TILE_BUFFER_SINGLE (1 << 10) -#define R300_CRTC_MICRO_TILE_BUFFER_DOUBLE (2 << 10) -#define R300_CRTC_MICRO_TILE_BUFFER_DIS (3 << 10) -#define R300_CRTC_MICRO_TILE_EN_RIGHT (1 << 12) -#define R300_CRTC_MICRO_TILE_EN (1 << 13) -#define R300_CRTC_MACRO_TILE_EN_RIGHT (1 << 14) -#define R300_CRTC_MACRO_TILE_EN (1 << 15) - -/* CRTC_GEN_CNTL */ -#define CRTC_GEN_CNTL__CRTC_DBL_SCAN_EN_MASK 0x00000001L -#define CRTC_GEN_CNTL__CRTC_DBL_SCAN_EN 0x00000001L -#define CRTC_GEN_CNTL__CRTC_INTERLACE_EN_MASK 0x00000002L -#define CRTC_GEN_CNTL__CRTC_INTERLACE_EN 0x00000002L -#define CRTC_GEN_CNTL__CRTC_C_SYNC_EN_MASK 0x00000010L -#define CRTC_GEN_CNTL__CRTC_C_SYNC_EN 0x00000010L -#define CRTC_GEN_CNTL__CRTC_PIX_WIDTH_MASK 0x00000f00L -#define CRTC_GEN_CNTL__CRTC_ICON_EN_MASK 0x00008000L -#define CRTC_GEN_CNTL__CRTC_ICON_EN 0x00008000L -#define CRTC_GEN_CNTL__CRTC_CUR_EN_MASK 0x00010000L -#define CRTC_GEN_CNTL__CRTC_CUR_EN 0x00010000L -#define CRTC_GEN_CNTL__CRTC_VSTAT_MODE_MASK 0x00060000L -#define CRTC_GEN_CNTL__CRTC_CUR_MODE_MASK 0x00700000L -#define CRTC_GEN_CNTL__CRTC_EXT_DISP_EN_MASK 0x01000000L -#define CRTC_GEN_CNTL__CRTC_EXT_DISP_EN 0x01000000L -#define CRTC_GEN_CNTL__CRTC_EN_MASK 0x02000000L -#define CRTC_GEN_CNTL__CRTC_EN 0x02000000L -#define CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B_MASK 0x04000000L -#define CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B 0x04000000L - -/* CRTC2_GEN_CNTL */ -#define CRTC2_GEN_CNTL__CRTC2_DBL_SCAN_EN_MASK 0x00000001L -#define CRTC2_GEN_CNTL__CRTC2_DBL_SCAN_EN 0x00000001L -#define CRTC2_GEN_CNTL__CRTC2_INTERLACE_EN_MASK 0x00000002L -#define CRTC2_GEN_CNTL__CRTC2_INTERLACE_EN 0x00000002L -#define CRTC2_GEN_CNTL__CRTC2_SYNC_TRISTATE_MASK 0x00000010L -#define CRTC2_GEN_CNTL__CRTC2_SYNC_TRISTATE 0x00000010L -#define CRTC2_GEN_CNTL__CRTC2_HSYNC_TRISTATE_MASK 0x00000020L -#define CRTC2_GEN_CNTL__CRTC2_HSYNC_TRISTATE 0x00000020L -#define CRTC2_GEN_CNTL__CRTC2_VSYNC_TRISTATE_MASK 0x00000040L -#define CRTC2_GEN_CNTL__CRTC2_VSYNC_TRISTATE 0x00000040L -#define CRTC2_GEN_CNTL__CRT2_ON_MASK 0x00000080L -#define CRTC2_GEN_CNTL__CRT2_ON 0x00000080L -#define CRTC2_GEN_CNTL__CRTC2_PIX_WIDTH_MASK 0x00000f00L -#define CRTC2_GEN_CNTL__CRTC2_ICON_EN_MASK 0x00008000L -#define CRTC2_GEN_CNTL__CRTC2_ICON_EN 0x00008000L -#define CRTC2_GEN_CNTL__CRTC2_CUR_EN_MASK 0x00010000L -#define CRTC2_GEN_CNTL__CRTC2_CUR_EN 0x00010000L -#define CRTC2_GEN_CNTL__CRTC2_CUR_MODE_MASK 0x00700000L -#define CRTC2_GEN_CNTL__CRTC2_DISPLAY_DIS_MASK 0x00800000L -#define CRTC2_GEN_CNTL__CRTC2_DISPLAY_DIS 0x00800000L -#define CRTC2_GEN_CNTL__CRTC2_EN_MASK 0x02000000L -#define CRTC2_GEN_CNTL__CRTC2_EN 0x02000000L -#define CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B_MASK 0x04000000L -#define CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B 0x04000000L -#define CRTC2_GEN_CNTL__CRTC2_C_SYNC_EN_MASK 0x08000000L -#define CRTC2_GEN_CNTL__CRTC2_C_SYNC_EN 0x08000000L -#define CRTC2_GEN_CNTL__CRTC2_HSYNC_DIS_MASK 0x10000000L -#define CRTC2_GEN_CNTL__CRTC2_HSYNC_DIS 0x10000000L -#define CRTC2_GEN_CNTL__CRTC2_VSYNC_DIS_MASK 0x20000000L -#define CRTC2_GEN_CNTL__CRTC2_VSYNC_DIS 0x20000000L - -/* AGP_CNTL */ -#define AGP_CNTL__MAX_IDLE_CLK_MASK 0x000000ffL -#define AGP_CNTL__HOLD_RD_FIFO_MASK 0x00000100L -#define AGP_CNTL__HOLD_RD_FIFO 0x00000100L -#define AGP_CNTL__HOLD_RQ_FIFO_MASK 0x00000200L -#define AGP_CNTL__HOLD_RQ_FIFO 0x00000200L -#define AGP_CNTL__EN_2X_STBB_MASK 0x00000400L -#define AGP_CNTL__EN_2X_STBB 0x00000400L -#define AGP_CNTL__FORCE_FULL_SBA_MASK 0x00000800L -#define AGP_CNTL__FORCE_FULL_SBA 0x00000800L -#define AGP_CNTL__SBA_DIS_MASK 0x00001000L -#define AGP_CNTL__SBA_DIS 0x00001000L -#define AGP_CNTL__AGP_REV_ID_MASK 0x00002000L -#define AGP_CNTL__AGP_REV_ID 0x00002000L -#define AGP_CNTL__REG_CRIPPLE_AGP4X_MASK 0x00004000L -#define AGP_CNTL__REG_CRIPPLE_AGP4X 0x00004000L -#define AGP_CNTL__REG_CRIPPLE_AGP2X4X_MASK 0x00008000L -#define AGP_CNTL__REG_CRIPPLE_AGP2X4X 0x00008000L -#define AGP_CNTL__FORCE_INT_VREF_MASK 0x00010000L -#define AGP_CNTL__FORCE_INT_VREF 0x00010000L -#define AGP_CNTL__PENDING_SLOTS_VAL_MASK 0x00060000L -#define AGP_CNTL__PENDING_SLOTS_SEL_MASK 0x00080000L -#define AGP_CNTL__PENDING_SLOTS_SEL 0x00080000L -#define AGP_CNTL__EN_EXTENDED_AD_STB_2X_MASK 0x00100000L -#define AGP_CNTL__EN_EXTENDED_AD_STB_2X 0x00100000L -#define AGP_CNTL__DIS_QUEUED_GNT_FIX_MASK 0x00200000L -#define AGP_CNTL__DIS_QUEUED_GNT_FIX 0x00200000L -#define AGP_CNTL__EN_RDATA2X4X_MULTIRESET_MASK 0x00400000L -#define AGP_CNTL__EN_RDATA2X4X_MULTIRESET 0x00400000L -#define AGP_CNTL__EN_RBFCALM_MASK 0x00800000L -#define AGP_CNTL__EN_RBFCALM 0x00800000L -#define AGP_CNTL__FORCE_EXT_VREF_MASK 0x01000000L -#define AGP_CNTL__FORCE_EXT_VREF 0x01000000L -#define AGP_CNTL__DIS_RBF_MASK 0x02000000L -#define AGP_CNTL__DIS_RBF 0x02000000L -#define AGP_CNTL__DELAY_FIRST_SBA_EN_MASK 0x04000000L -#define AGP_CNTL__DELAY_FIRST_SBA_EN 0x04000000L -#define AGP_CNTL__DELAY_FIRST_SBA_VAL_MASK 0x38000000L -#define AGP_CNTL__AGP_MISC_MASK 0xc0000000L - -/* AGP_CNTL */ -#define AGP_CNTL__MAX_IDLE_CLK__SHIFT 0x00000000 -#define AGP_CNTL__HOLD_RD_FIFO__SHIFT 0x00000008 -#define AGP_CNTL__HOLD_RQ_FIFO__SHIFT 0x00000009 -#define AGP_CNTL__EN_2X_STBB__SHIFT 0x0000000a -#define AGP_CNTL__FORCE_FULL_SBA__SHIFT 0x0000000b -#define AGP_CNTL__SBA_DIS__SHIFT 0x0000000c -#define AGP_CNTL__AGP_REV_ID__SHIFT 0x0000000d -#define AGP_CNTL__REG_CRIPPLE_AGP4X__SHIFT 0x0000000e -#define AGP_CNTL__REG_CRIPPLE_AGP2X4X__SHIFT 0x0000000f -#define AGP_CNTL__FORCE_INT_VREF__SHIFT 0x00000010 -#define AGP_CNTL__PENDING_SLOTS_VAL__SHIFT 0x00000011 -#define AGP_CNTL__PENDING_SLOTS_SEL__SHIFT 0x00000013 -#define AGP_CNTL__EN_EXTENDED_AD_STB_2X__SHIFT 0x00000014 -#define AGP_CNTL__DIS_QUEUED_GNT_FIX__SHIFT 0x00000015 -#define AGP_CNTL__EN_RDATA2X4X_MULTIRESET__SHIFT 0x00000016 -#define AGP_CNTL__EN_RBFCALM__SHIFT 0x00000017 -#define AGP_CNTL__FORCE_EXT_VREF__SHIFT 0x00000018 -#define AGP_CNTL__DIS_RBF__SHIFT 0x00000019 -#define AGP_CNTL__DELAY_FIRST_SBA_EN__SHIFT 0x0000001a -#define AGP_CNTL__DELAY_FIRST_SBA_VAL__SHIFT 0x0000001b -#define AGP_CNTL__AGP_MISC__SHIFT 0x0000001e - -/* DISP_MISC_CNTL */ -#define DISP_MISC_CNTL__SOFT_RESET_GRPH_PP_MASK 0x00000001L -#define DISP_MISC_CNTL__SOFT_RESET_GRPH_PP 0x00000001L -#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_PP_MASK 0x00000002L -#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_PP 0x00000002L -#define DISP_MISC_CNTL__SOFT_RESET_OV0_PP_MASK 0x00000004L -#define DISP_MISC_CNTL__SOFT_RESET_OV0_PP 0x00000004L -#define DISP_MISC_CNTL__SOFT_RESET_GRPH_SCLK_MASK 0x00000010L -#define DISP_MISC_CNTL__SOFT_RESET_GRPH_SCLK 0x00000010L -#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_SCLK_MASK 0x00000020L -#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_SCLK 0x00000020L -#define DISP_MISC_CNTL__SOFT_RESET_OV0_SCLK_MASK 0x00000040L -#define DISP_MISC_CNTL__SOFT_RESET_OV0_SCLK 0x00000040L -#define DISP_MISC_CNTL__SYNC_STRENGTH_MASK 0x00000300L -#define DISP_MISC_CNTL__SYNC_PAD_FLOP_EN_MASK 0x00000400L -#define DISP_MISC_CNTL__SYNC_PAD_FLOP_EN 0x00000400L -#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_PP_MASK 0x00001000L -#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_PP 0x00001000L -#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_SCLK_MASK 0x00008000L -#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_SCLK 0x00008000L -#define DISP_MISC_CNTL__SOFT_RESET_LVDS_MASK 0x00010000L -#define DISP_MISC_CNTL__SOFT_RESET_LVDS 0x00010000L -#define DISP_MISC_CNTL__SOFT_RESET_TMDS_MASK 0x00020000L -#define DISP_MISC_CNTL__SOFT_RESET_TMDS 0x00020000L -#define DISP_MISC_CNTL__SOFT_RESET_DIG_TMDS_MASK 0x00040000L -#define DISP_MISC_CNTL__SOFT_RESET_DIG_TMDS 0x00040000L -#define DISP_MISC_CNTL__SOFT_RESET_TV_MASK 0x00080000L -#define DISP_MISC_CNTL__SOFT_RESET_TV 0x00080000L -#define DISP_MISC_CNTL__PALETTE2_MEM_RD_MARGIN_MASK 0x00f00000L -#define DISP_MISC_CNTL__PALETTE_MEM_RD_MARGIN_MASK 0x0f000000L -#define DISP_MISC_CNTL__RMX_BUF_MEM_RD_MARGIN_MASK 0xf0000000L - -/* DISP_PWR_MAN */ -#define DISP_PWR_MAN__DISP_PWR_MAN_D3_CRTC_EN_MASK 0x00000001L -#define DISP_PWR_MAN__DISP_PWR_MAN_D3_CRTC_EN 0x00000001L -#define DISP_PWR_MAN__DISP2_PWR_MAN_D3_CRTC2_EN_MASK 0x00000010L -#define DISP_PWR_MAN__DISP2_PWR_MAN_D3_CRTC2_EN 0x00000010L -#define DISP_PWR_MAN__DISP_PWR_MAN_DPMS_MASK 0x00000300L -#define DISP_PWR_MAN__DISP_D3_RST_MASK 0x00010000L -#define DISP_PWR_MAN__DISP_D3_RST 0x00010000L -#define DISP_PWR_MAN__DISP_D3_REG_RST_MASK 0x00020000L -#define DISP_PWR_MAN__DISP_D3_REG_RST 0x00020000L -#define DISP_PWR_MAN__DISP_D3_GRPH_RST_MASK 0x00040000L -#define DISP_PWR_MAN__DISP_D3_GRPH_RST 0x00040000L -#define DISP_PWR_MAN__DISP_D3_SUBPIC_RST_MASK 0x00080000L -#define DISP_PWR_MAN__DISP_D3_SUBPIC_RST 0x00080000L -#define DISP_PWR_MAN__DISP_D3_OV0_RST_MASK 0x00100000L -#define DISP_PWR_MAN__DISP_D3_OV0_RST 0x00100000L -#define DISP_PWR_MAN__DISP_D1D2_GRPH_RST_MASK 0x00200000L -#define DISP_PWR_MAN__DISP_D1D2_GRPH_RST 0x00200000L -#define DISP_PWR_MAN__DISP_D1D2_SUBPIC_RST_MASK 0x00400000L -#define DISP_PWR_MAN__DISP_D1D2_SUBPIC_RST 0x00400000L -#define DISP_PWR_MAN__DISP_D1D2_OV0_RST_MASK 0x00800000L -#define DISP_PWR_MAN__DISP_D1D2_OV0_RST 0x00800000L -#define DISP_PWR_MAN__DIG_TMDS_ENABLE_RST_MASK 0x01000000L -#define DISP_PWR_MAN__DIG_TMDS_ENABLE_RST 0x01000000L -#define DISP_PWR_MAN__TV_ENABLE_RST_MASK 0x02000000L -#define DISP_PWR_MAN__TV_ENABLE_RST 0x02000000L -#define DISP_PWR_MAN__AUTO_PWRUP_EN_MASK 0x04000000L -#define DISP_PWR_MAN__AUTO_PWRUP_EN 0x04000000L - -/* MC_IND_INDEX */ -#define MC_IND_INDEX__MC_IND_ADDR_MASK 0x0000001fL -#define MC_IND_INDEX__MC_IND_WR_EN_MASK 0x00000100L -#define MC_IND_INDEX__MC_IND_WR_EN 0x00000100L - -/* MC_IND_DATA */ -#define MC_IND_DATA__MC_IND_DATA_MASK 0xffffffffL - -/* MC_CHP_IO_CNTL_A1 */ -#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA__SHIFT 0x00000000 -#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA__SHIFT 0x00000001 -#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA__SHIFT 0x00000002 -#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA__SHIFT 0x00000003 -#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA__SHIFT 0x00000004 -#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA__SHIFT 0x00000005 -#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA__SHIFT 0x00000006 -#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA__SHIFT 0x00000007 -#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA__SHIFT 0x00000008 -#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA__SHIFT 0x00000009 -#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA__SHIFT 0x0000000a -#define MC_CHP_IO_CNTL_A1__MEM_IO_MODEA__SHIFT 0x0000000c -#define MC_CHP_IO_CNTL_A1__MEM_REC_CKA__SHIFT 0x0000000e -#define MC_CHP_IO_CNTL_A1__MEM_REC_AA__SHIFT 0x00000010 -#define MC_CHP_IO_CNTL_A1__MEM_REC_DQMA__SHIFT 0x00000012 -#define MC_CHP_IO_CNTL_A1__MEM_REC_DQSA__SHIFT 0x00000014 -#define MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA__SHIFT 0x00000016 -#define MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA__SHIFT 0x00000017 -#define MC_CHP_IO_CNTL_A1__MEM_SYNC_ENA__SHIFT 0x00000018 -#define MC_CHP_IO_CNTL_A1__MEM_CLK_SELA__SHIFT 0x0000001a -#define MC_CHP_IO_CNTL_A1__MEM_CLK_INVA__SHIFT 0x0000001c -#define MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A__SHIFT 0x0000001e -#define MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A__SHIFT 0x0000001f - -/* MC_CHP_IO_CNTL_B1 */ -#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB__SHIFT 0x00000000 -#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB__SHIFT 0x00000001 -#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB__SHIFT 0x00000002 -#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB__SHIFT 0x00000003 -#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB__SHIFT 0x00000004 -#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB__SHIFT 0x00000005 -#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB__SHIFT 0x00000006 -#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB__SHIFT 0x00000007 -#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB__SHIFT 0x00000008 -#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB__SHIFT 0x00000009 -#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB__SHIFT 0x0000000a -#define MC_CHP_IO_CNTL_B1__MEM_IO_MODEB__SHIFT 0x0000000c -#define MC_CHP_IO_CNTL_B1__MEM_REC_CKB__SHIFT 0x0000000e -#define MC_CHP_IO_CNTL_B1__MEM_REC_AB__SHIFT 0x00000010 -#define MC_CHP_IO_CNTL_B1__MEM_REC_DQMB__SHIFT 0x00000012 -#define MC_CHP_IO_CNTL_B1__MEM_REC_DQSB__SHIFT 0x00000014 -#define MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB__SHIFT 0x00000016 -#define MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB__SHIFT 0x00000017 -#define MC_CHP_IO_CNTL_B1__MEM_SYNC_ENB__SHIFT 0x00000018 -#define MC_CHP_IO_CNTL_B1__MEM_CLK_SELB__SHIFT 0x0000001a -#define MC_CHP_IO_CNTL_B1__MEM_CLK_INVB__SHIFT 0x0000001c -#define MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B__SHIFT 0x0000001e -#define MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B__SHIFT 0x0000001f - -/* MC_CHP_IO_CNTL_A1 */ -#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA_MASK 0x00000001L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA 0x00000001L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA_MASK 0x00000002L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA 0x00000002L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA_MASK 0x00000004L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA 0x00000004L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA_MASK 0x00000008L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA 0x00000008L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA_MASK 0x00000010L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA 0x00000010L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA_MASK 0x00000020L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA 0x00000020L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA_MASK 0x00000040L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA 0x00000040L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA_MASK 0x00000080L -#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA 0x00000080L -#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA_MASK 0x00000100L -#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA 0x00000100L -#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA_MASK 0x00000200L -#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA 0x00000200L -#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA_MASK 0x00000400L -#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA 0x00000400L -#define MC_CHP_IO_CNTL_A1__MEM_IO_MODEA_MASK 0x00003000L -#define MC_CHP_IO_CNTL_A1__MEM_REC_CKA_MASK 0x0000c000L -#define MC_CHP_IO_CNTL_A1__MEM_REC_AA_MASK 0x00030000L -#define MC_CHP_IO_CNTL_A1__MEM_REC_DQMA_MASK 0x000c0000L -#define MC_CHP_IO_CNTL_A1__MEM_REC_DQSA_MASK 0x00300000L -#define MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA_MASK 0x00400000L -#define MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA 0x00400000L -#define MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA_MASK 0x00800000L -#define MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA 0x00800000L -#define MC_CHP_IO_CNTL_A1__MEM_SYNC_ENA_MASK 0x03000000L -#define MC_CHP_IO_CNTL_A1__MEM_CLK_SELA_MASK 0x0c000000L -#define MC_CHP_IO_CNTL_A1__MEM_CLK_INVA_MASK 0x10000000L -#define MC_CHP_IO_CNTL_A1__MEM_CLK_INVA 0x10000000L -#define MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A_MASK 0x40000000L -#define MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A 0x40000000L -#define MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A_MASK 0x80000000L -#define MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A 0x80000000L - -/* MC_CHP_IO_CNTL_B1 */ -#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB_MASK 0x00000001L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB 0x00000001L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB_MASK 0x00000002L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB 0x00000002L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB_MASK 0x00000004L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB 0x00000004L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB_MASK 0x00000008L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB 0x00000008L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB_MASK 0x00000010L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB 0x00000010L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB_MASK 0x00000020L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB 0x00000020L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB_MASK 0x00000040L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB 0x00000040L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB_MASK 0x00000080L -#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB 0x00000080L -#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB_MASK 0x00000100L -#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB 0x00000100L -#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB_MASK 0x00000200L -#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB 0x00000200L -#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB_MASK 0x00000400L -#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB 0x00000400L -#define MC_CHP_IO_CNTL_B1__MEM_IO_MODEB_MASK 0x00003000L -#define MC_CHP_IO_CNTL_B1__MEM_REC_CKB_MASK 0x0000c000L -#define MC_CHP_IO_CNTL_B1__MEM_REC_AB_MASK 0x00030000L -#define MC_CHP_IO_CNTL_B1__MEM_REC_DQMB_MASK 0x000c0000L -#define MC_CHP_IO_CNTL_B1__MEM_REC_DQSB_MASK 0x00300000L -#define MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB_MASK 0x00400000L -#define MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB 0x00400000L -#define MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB_MASK 0x00800000L -#define MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB 0x00800000L -#define MC_CHP_IO_CNTL_B1__MEM_SYNC_ENB_MASK 0x03000000L -#define MC_CHP_IO_CNTL_B1__MEM_CLK_SELB_MASK 0x0c000000L -#define MC_CHP_IO_CNTL_B1__MEM_CLK_INVB_MASK 0x10000000L -#define MC_CHP_IO_CNTL_B1__MEM_CLK_INVB 0x10000000L -#define MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B_MASK 0x40000000L -#define MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B 0x40000000L -#define MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B_MASK 0x80000000L -#define MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B 0x80000000L - -/* MEM_SDRAM_MODE_REG */ -#define MEM_SDRAM_MODE_REG__MEM_MODE_REG_MASK 0x00007fffL -#define MEM_SDRAM_MODE_REG__MEM_WR_LATENCY_MASK 0x000f0000L -#define MEM_SDRAM_MODE_REG__MEM_CAS_LATENCY_MASK 0x00700000L -#define MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY_MASK 0x00800000L -#define MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY 0x00800000L -#define MEM_SDRAM_MODE_REG__MEM_STR_LATENCY_MASK 0x01000000L -#define MEM_SDRAM_MODE_REG__MEM_STR_LATENCY 0x01000000L -#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD_MASK 0x02000000L -#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD 0x02000000L -#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA_MASK 0x04000000L -#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA 0x04000000L -#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR_MASK 0x08000000L -#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR 0x08000000L -#define MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE_MASK 0x10000000L -#define MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE 0x10000000L -#define MEM_SDRAM_MODE_REG__MEM_DDR_DLL_MASK 0x20000000L -#define MEM_SDRAM_MODE_REG__MEM_DDR_DLL 0x20000000L -#define MEM_SDRAM_MODE_REG__MEM_CFG_TYPE_MASK 0x40000000L -#define MEM_SDRAM_MODE_REG__MEM_CFG_TYPE 0x40000000L -#define MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET_MASK 0x80000000L -#define MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET 0x80000000L - -/* MEM_SDRAM_MODE_REG */ -#define MEM_SDRAM_MODE_REG__MEM_MODE_REG__SHIFT 0x00000000 -#define MEM_SDRAM_MODE_REG__MEM_WR_LATENCY__SHIFT 0x00000010 -#define MEM_SDRAM_MODE_REG__MEM_CAS_LATENCY__SHIFT 0x00000014 -#define MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY__SHIFT 0x00000017 -#define MEM_SDRAM_MODE_REG__MEM_STR_LATENCY__SHIFT 0x00000018 -#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD__SHIFT 0x00000019 -#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA__SHIFT 0x0000001a -#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR__SHIFT 0x0000001b -#define MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE__SHIFT 0x0000001c -#define MEM_SDRAM_MODE_REG__MEM_DDR_DLL__SHIFT 0x0000001d -#define MEM_SDRAM_MODE_REG__MEM_CFG_TYPE__SHIFT 0x0000001e -#define MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET__SHIFT 0x0000001f - -/* MEM_REFRESH_CNTL */ -#define MEM_REFRESH_CNTL__MEM_REFRESH_RATE_MASK 0x000000ffL -#define MEM_REFRESH_CNTL__MEM_REFRESH_DIS_MASK 0x00000100L -#define MEM_REFRESH_CNTL__MEM_REFRESH_DIS 0x00000100L -#define MEM_REFRESH_CNTL__MEM_DYNAMIC_CKE_MASK 0x00000200L -#define MEM_REFRESH_CNTL__MEM_DYNAMIC_CKE 0x00000200L -#define MEM_REFRESH_CNTL__MEM_TRFC_MASK 0x0000f000L -#define MEM_REFRESH_CNTL__MEM_CLKA0_ENABLE_MASK 0x00010000L -#define MEM_REFRESH_CNTL__MEM_CLKA0_ENABLE 0x00010000L -#define MEM_REFRESH_CNTL__MEM_CLKA0b_ENABLE_MASK 0x00020000L -#define MEM_REFRESH_CNTL__MEM_CLKA0b_ENABLE 0x00020000L -#define MEM_REFRESH_CNTL__MEM_CLKA1_ENABLE_MASK 0x00040000L -#define MEM_REFRESH_CNTL__MEM_CLKA1_ENABLE 0x00040000L -#define MEM_REFRESH_CNTL__MEM_CLKA1b_ENABLE_MASK 0x00080000L -#define MEM_REFRESH_CNTL__MEM_CLKA1b_ENABLE 0x00080000L -#define MEM_REFRESH_CNTL__MEM_CLKAFB_ENABLE_MASK 0x00100000L -#define MEM_REFRESH_CNTL__MEM_CLKAFB_ENABLE 0x00100000L -#define MEM_REFRESH_CNTL__DLL_FB_SLCT_CKA_MASK 0x00c00000L -#define MEM_REFRESH_CNTL__MEM_CLKB0_ENABLE_MASK 0x01000000L -#define MEM_REFRESH_CNTL__MEM_CLKB0_ENABLE 0x01000000L -#define MEM_REFRESH_CNTL__MEM_CLKB0b_ENABLE_MASK 0x02000000L -#define MEM_REFRESH_CNTL__MEM_CLKB0b_ENABLE 0x02000000L -#define MEM_REFRESH_CNTL__MEM_CLKB1_ENABLE_MASK 0x04000000L -#define MEM_REFRESH_CNTL__MEM_CLKB1_ENABLE 0x04000000L -#define MEM_REFRESH_CNTL__MEM_CLKB1b_ENABLE_MASK 0x08000000L -#define MEM_REFRESH_CNTL__MEM_CLKB1b_ENABLE 0x08000000L -#define MEM_REFRESH_CNTL__MEM_CLKBFB_ENABLE_MASK 0x10000000L -#define MEM_REFRESH_CNTL__MEM_CLKBFB_ENABLE 0x10000000L -#define MEM_REFRESH_CNTL__DLL_FB_SLCT_CKB_MASK 0xc0000000L - -/* MC_STATUS */ -#define MC_STATUS__MEM_PWRUP_COMPL_A_MASK 0x00000001L -#define MC_STATUS__MEM_PWRUP_COMPL_A 0x00000001L -#define MC_STATUS__MEM_PWRUP_COMPL_B_MASK 0x00000002L -#define MC_STATUS__MEM_PWRUP_COMPL_B 0x00000002L -#define MC_STATUS__MC_IDLE_MASK 0x00000004L -#define MC_STATUS__MC_IDLE 0x00000004L -#define MC_STATUS__IMP_N_VALUE_R_BACK_MASK 0x00000078L -#define MC_STATUS__IMP_P_VALUE_R_BACK_MASK 0x00000780L -#define MC_STATUS__TEST_OUT_R_BACK_MASK 0x00000800L -#define MC_STATUS__TEST_OUT_R_BACK 0x00000800L -#define MC_STATUS__DUMMY_OUT_R_BACK_MASK 0x00001000L -#define MC_STATUS__DUMMY_OUT_R_BACK 0x00001000L -#define MC_STATUS__IMP_N_VALUE_A_R_BACK_MASK 0x0001e000L -#define MC_STATUS__IMP_P_VALUE_A_R_BACK_MASK 0x001e0000L -#define MC_STATUS__IMP_N_VALUE_CK_R_BACK_MASK 0x01e00000L -#define MC_STATUS__IMP_P_VALUE_CK_R_BACK_MASK 0x1e000000L - -/* MDLL_CKO */ -#define MDLL_CKO__MCKOA_SLEEP_MASK 0x00000001L -#define MDLL_CKO__MCKOA_SLEEP 0x00000001L -#define MDLL_CKO__MCKOA_RESET_MASK 0x00000002L -#define MDLL_CKO__MCKOA_RESET 0x00000002L -#define MDLL_CKO__MCKOA_RANGE_MASK 0x0000000cL -#define MDLL_CKO__ERSTA_SOUTSEL_MASK 0x00000030L -#define MDLL_CKO__MCKOA_FB_SEL_MASK 0x000000c0L -#define MDLL_CKO__MCKOA_REF_SKEW_MASK 0x00000700L -#define MDLL_CKO__MCKOA_FB_SKEW_MASK 0x00007000L -#define MDLL_CKO__MCKOA_BP_SEL_MASK 0x00008000L -#define MDLL_CKO__MCKOA_BP_SEL 0x00008000L -#define MDLL_CKO__MCKOB_SLEEP_MASK 0x00010000L -#define MDLL_CKO__MCKOB_SLEEP 0x00010000L -#define MDLL_CKO__MCKOB_RESET_MASK 0x00020000L -#define MDLL_CKO__MCKOB_RESET 0x00020000L -#define MDLL_CKO__MCKOB_RANGE_MASK 0x000c0000L -#define MDLL_CKO__ERSTB_SOUTSEL_MASK 0x00300000L -#define MDLL_CKO__MCKOB_FB_SEL_MASK 0x00c00000L -#define MDLL_CKO__MCKOB_REF_SKEW_MASK 0x07000000L -#define MDLL_CKO__MCKOB_FB_SKEW_MASK 0x70000000L -#define MDLL_CKO__MCKOB_BP_SEL_MASK 0x80000000L -#define MDLL_CKO__MCKOB_BP_SEL 0x80000000L - -/* MDLL_RDCKA */ -#define MDLL_RDCKA__MRDCKA0_SLEEP_MASK 0x00000001L -#define MDLL_RDCKA__MRDCKA0_SLEEP 0x00000001L -#define MDLL_RDCKA__MRDCKA0_RESET_MASK 0x00000002L -#define MDLL_RDCKA__MRDCKA0_RESET 0x00000002L -#define MDLL_RDCKA__MRDCKA0_RANGE_MASK 0x0000000cL -#define MDLL_RDCKA__MRDCKA0_REF_SEL_MASK 0x00000030L -#define MDLL_RDCKA__MRDCKA0_FB_SEL_MASK 0x000000c0L -#define MDLL_RDCKA__MRDCKA0_REF_SKEW_MASK 0x00000700L -#define MDLL_RDCKA__MRDCKA0_SINSEL_MASK 0x00000800L -#define MDLL_RDCKA__MRDCKA0_SINSEL 0x00000800L -#define MDLL_RDCKA__MRDCKA0_FB_SKEW_MASK 0x00007000L -#define MDLL_RDCKA__MRDCKA0_BP_SEL_MASK 0x00008000L -#define MDLL_RDCKA__MRDCKA0_BP_SEL 0x00008000L -#define MDLL_RDCKA__MRDCKA1_SLEEP_MASK 0x00010000L -#define MDLL_RDCKA__MRDCKA1_SLEEP 0x00010000L -#define MDLL_RDCKA__MRDCKA1_RESET_MASK 0x00020000L -#define MDLL_RDCKA__MRDCKA1_RESET 0x00020000L -#define MDLL_RDCKA__MRDCKA1_RANGE_MASK 0x000c0000L -#define MDLL_RDCKA__MRDCKA1_REF_SEL_MASK 0x00300000L -#define MDLL_RDCKA__MRDCKA1_FB_SEL_MASK 0x00c00000L -#define MDLL_RDCKA__MRDCKA1_REF_SKEW_MASK 0x07000000L -#define MDLL_RDCKA__MRDCKA1_SINSEL_MASK 0x08000000L -#define MDLL_RDCKA__MRDCKA1_SINSEL 0x08000000L -#define MDLL_RDCKA__MRDCKA1_FB_SKEW_MASK 0x70000000L -#define MDLL_RDCKA__MRDCKA1_BP_SEL_MASK 0x80000000L -#define MDLL_RDCKA__MRDCKA1_BP_SEL 0x80000000L - -/* MDLL_RDCKB */ -#define MDLL_RDCKB__MRDCKB0_SLEEP_MASK 0x00000001L -#define MDLL_RDCKB__MRDCKB0_SLEEP 0x00000001L -#define MDLL_RDCKB__MRDCKB0_RESET_MASK 0x00000002L -#define MDLL_RDCKB__MRDCKB0_RESET 0x00000002L -#define MDLL_RDCKB__MRDCKB0_RANGE_MASK 0x0000000cL -#define MDLL_RDCKB__MRDCKB0_REF_SEL_MASK 0x00000030L -#define MDLL_RDCKB__MRDCKB0_FB_SEL_MASK 0x000000c0L -#define MDLL_RDCKB__MRDCKB0_REF_SKEW_MASK 0x00000700L -#define MDLL_RDCKB__MRDCKB0_SINSEL_MASK 0x00000800L -#define MDLL_RDCKB__MRDCKB0_SINSEL 0x00000800L -#define MDLL_RDCKB__MRDCKB0_FB_SKEW_MASK 0x00007000L -#define MDLL_RDCKB__MRDCKB0_BP_SEL_MASK 0x00008000L -#define MDLL_RDCKB__MRDCKB0_BP_SEL 0x00008000L -#define MDLL_RDCKB__MRDCKB1_SLEEP_MASK 0x00010000L -#define MDLL_RDCKB__MRDCKB1_SLEEP 0x00010000L -#define MDLL_RDCKB__MRDCKB1_RESET_MASK 0x00020000L -#define MDLL_RDCKB__MRDCKB1_RESET 0x00020000L -#define MDLL_RDCKB__MRDCKB1_RANGE_MASK 0x000c0000L -#define MDLL_RDCKB__MRDCKB1_REF_SEL_MASK 0x00300000L -#define MDLL_RDCKB__MRDCKB1_FB_SEL_MASK 0x00c00000L -#define MDLL_RDCKB__MRDCKB1_REF_SKEW_MASK 0x07000000L -#define MDLL_RDCKB__MRDCKB1_SINSEL_MASK 0x08000000L -#define MDLL_RDCKB__MRDCKB1_SINSEL 0x08000000L -#define MDLL_RDCKB__MRDCKB1_FB_SKEW_MASK 0x70000000L -#define MDLL_RDCKB__MRDCKB1_BP_SEL_MASK 0x80000000L -#define MDLL_RDCKB__MRDCKB1_BP_SEL 0x80000000L - -#define MDLL_R300_RDCK__MRDCKA_SLEEP 0x00000001L -#define MDLL_R300_RDCK__MRDCKA_RESET 0x00000002L -#define MDLL_R300_RDCK__MRDCKB_SLEEP 0x00000004L -#define MDLL_R300_RDCK__MRDCKB_RESET 0x00000008L -#define MDLL_R300_RDCK__MRDCKC_SLEEP 0x00000010L -#define MDLL_R300_RDCK__MRDCKC_RESET 0x00000020L -#define MDLL_R300_RDCK__MRDCKD_SLEEP 0x00000040L -#define MDLL_R300_RDCK__MRDCKD_RESET 0x00000080L - -#define pllCLK_PIN_CNTL 0x0001 -#define pllPPLL_CNTL 0x0002 -#define pllPPLL_REF_DIV 0x0003 -#define pllPPLL_DIV_0 0x0004 -#define pllPPLL_DIV_1 0x0005 -#define pllPPLL_DIV_2 0x0006 -#define pllPPLL_DIV_3 0x0007 -#define pllVCLK_ECP_CNTL 0x0008 -#define pllHTOTAL_CNTL 0x0009 -#define pllM_SPLL_REF_FB_DIV 0x000A -#define pllAGP_PLL_CNTL 0x000B -#define pllSPLL_CNTL 0x000C -#define pllSCLK_CNTL 0x000D -#define pllMPLL_CNTL 0x000E -#define pllMDLL_CKO 0x000F -#define pllMDLL_RDCKA 0x0010 -#define pllMDLL_RDCKB 0x0011 -#define pllMCLK_CNTL 0x0012 -#define pllPLL_TEST_CNTL 0x0013 -#define pllCLK_PWRMGT_CNTL 0x0014 -#define pllPLL_PWRMGT_CNTL 0x0015 -#define pllCG_TEST_MACRO_RW_WRITE 0x0016 -#define pllCG_TEST_MACRO_RW_READ 0x0017 -#define pllCG_TEST_MACRO_RW_DATA 0x0018 -#define pllCG_TEST_MACRO_RW_CNTL 0x0019 -#define pllDISP_TEST_MACRO_RW_WRITE 0x001A -#define pllDISP_TEST_MACRO_RW_READ 0x001B -#define pllDISP_TEST_MACRO_RW_DATA 0x001C -#define pllDISP_TEST_MACRO_RW_CNTL 0x001D -#define pllSCLK_CNTL2 0x001E -#define pllMCLK_MISC 0x001F -#define pllTV_PLL_FINE_CNTL 0x0020 -#define pllTV_PLL_CNTL 0x0021 -#define pllTV_PLL_CNTL1 0x0022 -#define pllTV_DTO_INCREMENTS 0x0023 -#define pllSPLL_AUX_CNTL 0x0024 -#define pllMPLL_AUX_CNTL 0x0025 -#define pllP2PLL_CNTL 0x002A -#define pllP2PLL_REF_DIV 0x002B -#define pllP2PLL_DIV_0 0x002C -#define pllPIXCLKS_CNTL 0x002D -#define pllHTOTAL2_CNTL 0x002E -#define pllSSPLL_CNTL 0x0030 -#define pllSSPLL_REF_DIV 0x0031 -#define pllSSPLL_DIV_0 0x0032 -#define pllSS_INT_CNTL 0x0033 -#define pllSS_TST_CNTL 0x0034 -#define pllSCLK_MORE_CNTL 0x0035 - -#define ixMC_PERF_CNTL 0x0000 -#define ixMC_PERF_SEL 0x0001 -#define ixMC_PERF_REGION_0 0x0002 -#define ixMC_PERF_REGION_1 0x0003 -#define ixMC_PERF_COUNT_0 0x0004 -#define ixMC_PERF_COUNT_1 0x0005 -#define ixMC_PERF_COUNT_2 0x0006 -#define ixMC_PERF_COUNT_3 0x0007 -#define ixMC_PERF_COUNT_MEMCH_A 0x0008 -#define ixMC_PERF_COUNT_MEMCH_B 0x0009 -#define ixMC_IMP_CNTL 0x000A -#define ixMC_CHP_IO_CNTL_A0 0x000B -#define ixMC_CHP_IO_CNTL_A1 0x000C -#define ixMC_CHP_IO_CNTL_B0 0x000D -#define ixMC_CHP_IO_CNTL_B1 0x000E -#define ixMC_IMP_CNTL_0 0x000F -#define ixTC_MISMATCH_1 0x0010 -#define ixTC_MISMATCH_2 0x0011 -#define ixMC_BIST_CTRL 0x0012 -#define ixREG_COLLAR_WRITE 0x0013 -#define ixREG_COLLAR_READ 0x0014 -#define ixR300_MC_IMP_CNTL 0x0018 -#define ixR300_MC_CHP_IO_CNTL_A0 0x0019 -#define ixR300_MC_CHP_IO_CNTL_A1 0x001a -#define ixR300_MC_CHP_IO_CNTL_B0 0x001b -#define ixR300_MC_CHP_IO_CNTL_B1 0x001c -#define ixR300_MC_CHP_IO_CNTL_C0 0x001d -#define ixR300_MC_CHP_IO_CNTL_C1 0x001e -#define ixR300_MC_CHP_IO_CNTL_D0 0x001f -#define ixR300_MC_CHP_IO_CNTL_D1 0x0020 -#define ixR300_MC_IMP_CNTL_0 0x0021 -#define ixR300_MC_ELPIDA_CNTL 0x0022 -#define ixR300_MC_CHP_IO_OE_CNTL_CD 0x0023 -#define ixR300_MC_READ_CNTL_CD 0x0024 -#define ixR300_MC_MC_INIT_WR_LAT_TIMER 0x0025 -#define ixR300_MC_DEBUG_CNTL 0x0026 -#define ixR300_MC_BIST_CNTL_0 0x0028 -#define ixR300_MC_BIST_CNTL_1 0x0029 -#define ixR300_MC_BIST_CNTL_2 0x002a -#define ixR300_MC_BIST_CNTL_3 0x002b -#define ixR300_MC_BIST_CNTL_4 0x002c -#define ixR300_MC_BIST_CNTL_5 0x002d -#define ixR300_MC_IMP_STATUS 0x002e -#define ixR300_MC_DLL_CNTL 0x002f -#define NB_TOM 0x15C - -/****************** for VIDIX **************************/ - -/* BUS_CNTL bit constants */ -#define BUS_DBL_RESYNC 0x00000001 -#define BUS_MSTR_RESET 0x00000002 -#define BUS_FLUSH_BUF 0x00000004 -#define BUS_STOP_REQ_DIS 0x00000008 -#define BUS_ROTATION_DIS 0x00000010 -#define BUS_MASTER_DIS 0x00000040 -#define BUS_ROM_WRT_EN 0x00000080 -#define BUS_DIS_ROM 0x00001000 -#define BUS_PCI_READ_RETRY_EN 0x00002000 -#define BUS_AGP_AD_STEPPING_EN 0x00004000 -#define BUS_PCI_WRT_RETRY_EN 0x00008000 -#define BUS_MSTR_RD_MULT 0x00100000 -#define BUS_MSTR_RD_LINE 0x00200000 -#define BUS_SUSPEND 0x00400000 -#define LAT_16X 0x00800000 -#define BUS_RD_DISCARD_EN 0x01000000 -#define BUS_RD_ABORT_EN 0x02000000 -#define BUS_MSTR_WS 0x04000000 -#define BUS_PARKING_DIS 0x08000000 -#define BUS_MSTR_DISCONNECT_EN 0x10000000 -#define BUS_WRT_BURST 0x20000000 -#define BUS_READ_BURST 0x40000000 -#define BUS_RDY_READ_DLY 0x80000000 -#define HI_STAT 0x004C -#define BUS_CNTL1 0x0034 -#define BUS_WAIT_ON_LOCK_EN (1 << 4) -#define I2C_CNTL_0 0x0090 -#define I2C_DONE (1<<0) -#define I2C_NACK (1<<1) -#define I2C_HALT (1<<2) -#define I2C_SOFT_RST (1<<5) -#define I2C_DRIVE_EN (1<<6) -#define I2C_DRIVE_SEL (1<<7) -#define I2C_START (1<<8) -#define I2C_STOP (1<<9) -#define I2C_RECEIVE (1<<10) -#define I2C_ABORT (1<<11) -#define I2C_GO (1<<12) -#define I2C_SEL (1<<16) -#define I2C_EN (1<<17) -#define I2C_CNTL_1 0x0094 -#define I2C_DATA 0x0098 -#define CONFIG_CNTL 0x00E0 -/* CONFIG_CNTL bit constants */ -#define CFG_VGA_RAM_EN 0x00000100 -#define CONFIG_MEMSIZE 0x00F8 -#define CONFIG_APER_0_BASE 0x0100 -#define CONFIG_APER_1_BASE 0x0104 -#define CONFIG_APER_SIZE 0x0108 -#define CONFIG_REG_1_BASE 0x010C -#define CONFIG_REG_APER_SIZE 0x0110 -#define PAD_AGPINPUT_DELAY 0x0164 -#define PAD_CTLR_STRENGTH 0x0168 -#define PAD_CTLR_UPDATE 0x016C -#define AGP_CNTL 0x0174 -#define AGP_APER_SIZE_256MB (0x00 << 0) -#define AGP_APER_SIZE_128MB (0x20 << 0) -#define AGP_APER_SIZE_64MB (0x30 << 0) -#define AGP_APER_SIZE_32MB (0x38 << 0) -#define AGP_APER_SIZE_16MB (0x3c << 0) -#define AGP_APER_SIZE_8MB (0x3e << 0) -#define AGP_APER_SIZE_4MB (0x3f << 0) -#define AGP_APER_SIZE_MASK (0x3f << 0) -#define AMCGPIO_A_REG 0x01a0 -#define AMCGPIO_EN_REG 0x01a8 -#define AMCGPIO_MASK 0x0194 -#define AMCGPIO_Y_REG 0x01a4 -#define MPP_TB_CONFIG 0x01c0 /* ? */ -#define MPP_GP_CONFIG 0x01c8 /* ? */ -#define VENDOR_ID 0x0F00 -#define DEVICE_ID 0x0F02 -#define COMMAND 0x0F04 -#define STATUS 0x0F06 -#define REVISION_ID 0x0F08 -#define REGPROG_INF 0x0F09 -#define SUB_CLASS 0x0F0A -#define CACHE_LINE 0x0F0C -#define LATENCY 0x0F0D -#define HEADER 0x0F0E -#define BIST 0x0F0F -#define REG_MEM_BASE 0x0F10 -#define REG_IO_BASE 0x0F14 -#define REG_REG_BASE 0x0F18 -#define ADAPTER_ID 0x0F2C -#define BIOS_ROM 0x0F30 -#define CAPABILITIES_PTR 0x0F34 -#define INTERRUPT_LINE 0x0F3C -#define INTERRUPT_PIN 0x0F3D -#define MIN_GRANT 0x0F3E -#define MAX_LATENCY 0x0F3F -#define ADAPTER_ID_W 0x0F4C -#define PMI_CAP_ID 0x0F50 -#define PMI_NXT_CAP_PTR 0x0F51 -#define PMI_PMC_REG 0x0F52 -#define PM_STATUS 0x0F54 -#define PMI_DATA 0x0F57 -#define AGP_CAP_ID 0x0F58 -#define AGP_STATUS 0x0F5C -#define AGP_1X_MODE 0x01 -#define AGP_2X_MODE 0x02 -#define AGP_4X_MODE 0x04 -#define AGP_MODE_MASK 0x07 -#define AGP_COMMAND 0x0F60 - -/* Video muxer unit */ -#define VIDEOMUX_CNTL 0x0190 -#define VIPPAD_MASK 0x0198 -#define VIPPAD1_A 0x01AC -#define VIPPAD1_EN 0x01B0 -#define VIPPAD1_Y 0x01B4 - -#define AIC_CTRL 0x01D0 -#define AIC_STAT 0x01D4 -#define AIC_PT_BASE 0x01D8 -#define AIC_LO_ADDR 0x01DC -#define AIC_HI_ADDR 0x01E0 -#define AIC_TLB_ADDR 0x01E4 -#define AIC_TLB_DATA 0x01E8 -#define DAC_CNTL 0x0058 -/* DAC_CNTL bit constants */ -#define DAC_8BIT_EN 0x00000100 -#define DAC_4BPP_PIX_ORDER 0x00000200 -#define DAC_CRC_EN 0x00080000 -#define DAC_MASK_ALL (0xff << 24) -#define DAC_VGA_ADR_EN (1 << 13) -#define DAC_RANGE_CNTL (3 << 0) -#define DAC_BLANKING (1 << 2) -#define DAC_CNTL2 0x007c -/* DAC_CNTL2 bit constants */ -#define DAC2_DAC_CLK_SEL (1 << 0) -#define DAC2_DAC2_CLK_SEL (1 << 1) -#define DAC2_PALETTE_ACC_CTL (1 << 5) -#define TV_DAC_CNTL 0x088c -/* TV_DAC_CNTL bit constants */ -#define TV_DAC_STD_MASK 0x0300 -#define TV_DAC_RDACPD (1 << 24) -#define TV_DAC_GDACPD (1 << 25) -#define TV_DAC_BDACPD (1 << 26) -#define CRTC_GEN_CNTL 0x0050 -/* CRTC_GEN_CNTL bit constants */ -//#define CRTC_DBL_SCAN_EN 0x00000001 -#define CRTC_INTERLACE_EN (1 << 1) -#define CRTC_CSYNC_EN (1 << 4) -//#define CRTC_CUR_EN 0x00010000 -#define CRTC_CUR_MODE_MASK (7 << 17) -#define CRTC_ICON_EN (1 << 20) -#define CRTC_EXT_DISP_EN (1 << 24) -#define CRTC_EN (1 << 25) -#define CRTC_DISP_REQ_EN_B (1 << 26) -#define CRTC2_GEN_CNTL 0x03f8 -/* CRTC2_GEN_CNTL bit constants */ -#define CRTC2_DBL_SCAN_EN (1 << 0) -#define CRTC2_INTERLACE_EN (1 << 1) -#define CRTC2_SYNC_TRISTAT (1 << 4) -#define CRTC2_HSYNC_TRISTAT (1 << 5) -#define CRTC2_VSYNC_TRISTAT (1 << 6) -#define CRTC2_CRT2_ON (1 << 7) -#define CRTC2_ICON_EN (1 << 15) -#define CRTC2_CUR_EN (1 << 16) -#define CRTC2_CUR_MODE_MASK (7 << 20) -#define CRTC2_DISP_DIS (1 << 23) -#define CRTC2_EN (1 << 25) -#define CRTC2_DISP_REQ_EN_B (1 << 26) -#define CRTC2_HSYNC_DIS (1 << 28) -#define CRTC2_VSYNC_DIS (1 << 29) -#define MEM_CNTL 0x0140 -/* MEM_CNTL bit constants */ -#define MEM_CTLR_STATUS_IDLE 0x00000000 -#define MEM_CTLR_STATUS_BUSY 0x00100000 -#define MEM_SEQNCR_STATUS_IDLE 0x00000000 -#define MEM_SEQNCR_STATUS_BUSY 0x00200000 -#define MEM_ARBITER_STATUS_IDLE 0x00000000 -#define MEM_ARBITER_STATUS_BUSY 0x00400000 -#define MEM_REQ_UNLOCK 0x00000000 -#define MEM_REQ_LOCK 0x00800000 -#define EXT_MEM_CNTL 0x0144 -#define MC_AGP_LOCATION 0x014C -#define MEM_IO_CNTL_A0 0x0178 -#define MEM_INIT_LATENCY_TIMER 0x0154 -#define MEM_SDRAM_MODE_REG 0x0158 -#define AGP_BASE 0x0170 -#define MEM_IO_CNTL_A1 0x017C -#define MEM_IO_CNTL_B0 0x0180 -#define MEM_IO_CNTL_B1 0x0184 -#define MC_DEBUG 0x0188 -#define MC_STATUS 0x0150 -#define MEM_IO_OE_CNTL 0x018C -#define MC_FB_LOCATION 0x0148 -#define HOST_PATH_CNTL 0x0130 -#define MEM_VGA_WP_SEL 0x0038 -#define MEM_VGA_RP_SEL 0x003C -#define HDP_DEBUG 0x0138 -#define SW_SEMAPHORE 0x013C -#define SURFACE_CNTL 0x0B00 -/* SURFACE_CNTL bit constants */ -# define SURF_TRANSLATION_DIS (1 << 8) -#define SURFACE0_LOWER_BOUND 0x0B04 -#define SURFACE1_LOWER_BOUND 0x0B14 -#define SURFACE2_LOWER_BOUND 0x0B24 -#define SURFACE3_LOWER_BOUND 0x0B34 -#define SURFACE4_LOWER_BOUND 0x0B44 -#define SURFACE5_LOWER_BOUND 0x0B54 -#define SURFACE6_LOWER_BOUND 0x0B64 -#define SURFACE7_LOWER_BOUND 0x0B74 -#define SURFACE0_UPPER_BOUND 0x0B08 -#define SURFACE1_UPPER_BOUND 0x0B18 -#define SURFACE2_UPPER_BOUND 0x0B28 -#define SURFACE3_UPPER_BOUND 0x0B38 -#define SURFACE4_UPPER_BOUND 0x0B48 -#define SURFACE5_UPPER_BOUND 0x0B58 -#define SURFACE6_UPPER_BOUND 0x0B68 -#define SURFACE7_UPPER_BOUND 0x0B78 -#define SURFACE0_INFO 0x0B0C -#define SURFACE1_INFO 0x0B1C -#define SURFACE2_INFO 0x0B2C -#define SURFACE3_INFO 0x0B3C -#define SURFACE4_INFO 0x0B4C -#define SURFACE5_INFO 0x0B5C -#define SURFACE6_INFO 0x0B6C -#define SURFACE7_INFO 0x0B7C -#define SURFACE_ACCESS_FLAGS 0x0BF8 -#define SURFACE_ACCESS_CLR 0x0BFC -#define GEN_INT_CNTL 0x0040 -#define GEN_INT_STATUS 0x0044 -#define VSYNC_INT_AK (1 << 2) -#define VSYNC_INT (1 << 2) -#define CRTC_EXT_CNTL 0x0054 -/* CRTC_EXT_CNTL bit constants */ -#define CRTC_VGA_XOVERSCAN (1 << 0) -#define VGA_ATI_LINEAR 0x00000008 -#define VGA_128KAP_PAGING 0x00000010 -#define XCRT_CNT_EN (1 << 6) -#define CRTC_HSYNC_DIS (1 << 8) -#define CRTC_VSYNC_DIS (1 << 9) -#define CRTC_DISPLAY_DIS (1 << 10) -#define CRTC_SYNC_TRISTAT (1 << 11) -#define CRTC_CRT_ON (1 << 15) -#define CRTC_EXT_CNTL_DPMS_BYTE 0x0055 -#define CRTC_HSYNC_DIS_BYTE (1 << 0) -#define CRTC_VSYNC_DIS_BYTE (1 << 1) -#define CRTC_DISPLAY_DIS_BYTE (1 << 2) -#define WAIT_UNTIL 0x1720 -#define WAIT_CRTC_PFLIP (1 << 0) -#define WAIT_2D_IDLECLEAN (1 << 16) -#define WAIT_3D_IDLECLEAN (1 << 17) -#define WAIT_HOST_IDLECLEAN (1 << 18) -#define ISYNC_CNTL 0x1724 -#define RBBM_GUICNTL 0x172C -#define RBBM_STATUS 0x0E40 -#define RBBM_FIFOCNT_MASK 0x007f -#define RBBM_ACTIVE (1 << 31) -#define RBBM_STATUS_alt_1 0x1740 -#define RBBM_CNTL 0x00EC -#define RBBM_CNTL_alt_1 0x0E44 -#define RBBM_SOFT_RESET 0x00F0 -/* RBBM_SOFT_RESET bit constants */ -#define SOFT_RESET_CP (1 << 0) -#define SOFT_RESET_HI (1 << 1) -#define SOFT_RESET_SE (1 << 2) -#define SOFT_RESET_RE (1 << 3) -#define SOFT_RESET_PP (1 << 4) -#define SOFT_RESET_E2 (1 << 5) -#define SOFT_RESET_RB (1 << 6) -#define SOFT_RESET_HDP (1 << 7) -#define RBBM_SOFT_RESET_alt_1 0x0E48 -#define NQWAIT_UNTIL 0x0E50 -#define RBBM_DEBUG 0x0E6C -#define RBBM_CMDFIFO_ADDR 0x0E70 -#define RBBM_CMDFIFO_DATAL 0x0E74 -#define RBBM_CMDFIFO_DATAH 0x0E78 -#define RBBM_CMDFIFO_STAT 0x0E7C -#define CRTC_STATUS 0x005C -/* CRTC_STATUS bit constants */ -#define CRTC_VBLANK 0x00000001 -#define CRTC_VBLANK_SAVE ( 1 << 1) -#define GPIO_VGA_DDC 0x0060 -#define GPIO_DVI_DDC 0x0064 -#define GPIO_MONID 0x0068 -#define PALETTE_INDEX 0x00B0 -#define PALETTE_DATA 0x00B4 -#define PALETTE_30_DATA 0x00B8 -#define CRTC_H_TOTAL_DISP 0x0200 -#define CRTC_H_TOTAL (0x03ff << 0) -#define CRTC_H_TOTAL_SHIFT 0 -#define CRTC_H_DISP (0x01ff << 16) -#define CRTC_H_DISP_SHIFT 16 -#define CRTC2_H_TOTAL_DISP 0x0300 -#define CRTC2_H_TOTAL (0x03ff << 0) -#define CRTC2_H_TOTAL_SHIFT 0 -#define CRTC2_H_DISP (0x01ff << 16) -#define CRTC2_H_DISP_SHIFT 16 -#define CRTC_H_SYNC_STRT_WID 0x0204 -#define CRTC_H_SYNC_STRT_PIX (0x07 << 0) -#define CRTC_H_SYNC_STRT_CHAR (0x3ff << 3) -#define CRTC_H_SYNC_STRT_CHAR_SHIFT 3 -#define CRTC_H_SYNC_WID (0x3f << 16) -#define CRTC_H_SYNC_WID_SHIFT 16 -#define CRTC_H_SYNC_POL (1 << 23) -#define CRTC2_H_SYNC_STRT_WID 0x0304 -#define CRTC2_H_SYNC_STRT_PIX (0x07 << 0) -#define CRTC2_H_SYNC_STRT_CHAR (0x3ff << 3) -#define CRTC2_H_SYNC_STRT_CHAR_SHIFT 3 -#define CRTC2_H_SYNC_WID (0x3f << 16) -#define CRTC2_H_SYNC_WID_SHIFT 16 -#define CRTC2_H_SYNC_POL (1 << 23) -#define CRTC_V_TOTAL_DISP 0x0208 -#define CRTC_V_TOTAL (0x07ff << 0) -#define CRTC_V_TOTAL_SHIFT 0 -#define CRTC_V_DISP (0x07ff << 16) -#define CRTC_V_DISP_SHIFT 16 -#define CRTC2_V_TOTAL_DISP 0x0308 -#define CRTC2_V_TOTAL (0x07ff << 0) -#define CRTC2_V_TOTAL_SHIFT 0 -#define CRTC2_V_DISP (0x07ff << 16) -#define CRTC2_V_DISP_SHIFT 16 -#define CRTC_V_SYNC_STRT_WID 0x020C -#define CRTC_V_SYNC_STRT (0x7ff << 0) -#define CRTC_V_SYNC_STRT_SHIFT 0 -#define CRTC_V_SYNC_WID (0x1f << 16) -#define CRTC_V_SYNC_WID_SHIFT 16 -#define CRTC_V_SYNC_POL (1 << 23) -#define CRTC2_V_SYNC_STRT_WID 0x030C -#define CRTC2_V_SYNC_STRT (0x7ff << 0) -#define CRTC2_V_SYNC_STRT_SHIFT 0 -#define CRTC2_V_SYNC_WID (0x1f << 16) -#define CRTC2_V_SYNC_WID_SHIFT 16 -#define CRTC2_V_SYNC_POL (1 << 23) -#define CRTC_VLINE_CRNT_VLINE 0x0210 -#define CRTC_CRNT_VLINE_MASK (0x7ff << 16) -#define CRTC2_VLINE_CRNT_VLINE 0x0310 -#define CRTC_CRNT_FRAME 0x0214 -#define CRTC2_CRNT_FRAME 0x0314 -#define CRTC_GUI_TRIG_VLINE 0x0218 -#define CRTC2_GUI_TRIG_VLINE 0x0318 -#define CRTC_DEBUG 0x021C -#define CRTC2_DEBUG 0x031C -#define CRTC_OFFSET_RIGHT 0x0220 -#define CRTC_OFFSET 0x0224 -#define CRTC2_OFFSET 0x0324 -#define CRTC_OFFSET_CNTL 0x0228 -#define CRTC_TILE_EN (1 << 15) -#define CRTC2_OFFSET_CNTL 0x0328 -#define CRTC2_TILE_EN (1 << 15) -#define CRTC_PITCH 0x022C -#define CRTC2_PITCH 0x032C -#define TMDS_CRC 0x02a0 -#define OVR_CLR 0x0230 -#define OVR_WID_LEFT_RIGHT 0x0234 -#define OVR_WID_TOP_BOTTOM 0x0238 -#define DISPLAY_BASE_ADDR 0x023C -#define SNAPSHOT_VH_COUNTS 0x0240 -#define SNAPSHOT_F_COUNT 0x0244 -#define N_VIF_COUNT 0x0248 -#define SNAPSHOT_VIF_COUNT 0x024C -#define FP_CRTC_H_TOTAL_DISP 0x0250 -#define FP_CRTC2_H_TOTAL_DISP 0x0350 -#define FP_CRTC_V_TOTAL_DISP 0x0254 -#define FP_CRTC2_V_TOTAL_DISP 0x0354 -#define FP_CRTC_H_TOTAL_MASK 0x000003ff -#define FP_CRTC_H_DISP_MASK 0x01ff0000 -#define FP_CRTC_V_TOTAL_MASK 0x00000fff -#define FP_CRTC_V_DISP_MASK 0x0fff0000 -#define FP_H_SYNC_STRT_CHAR_MASK 0x00001ff8 -#define FP_H_SYNC_WID_MASK 0x003f0000 -#define FP_V_SYNC_STRT_MASK 0x00000fff -#define FP_V_SYNC_WID_MASK 0x001f0000 -#define FP_CRTC_H_TOTAL_SHIFT 0x00000000 -#define FP_CRTC_H_DISP_SHIFT 0x00000010 -#define FP_CRTC_V_TOTAL_SHIFT 0x00000000 -#define FP_CRTC_V_DISP_SHIFT 0x00000010 -#define FP_H_SYNC_STRT_CHAR_SHIFT 0x00000003 -#define FP_H_SYNC_WID_SHIFT 0x00000010 -#define FP_V_SYNC_STRT_SHIFT 0x00000000 -#define FP_V_SYNC_WID_SHIFT 0x00000010 -#define CRT_CRTC_H_SYNC_STRT_WID 0x0258 -#define CRT_CRTC_V_SYNC_STRT_WID 0x025C -#define CUR_OFFSET 0x0260 -#define CUR_HORZ_VERT_POSN 0x0264 -#define CUR_HORZ_VERT_OFF 0x0268 -/* CUR_OFFSET, CUR_HORZ_VERT_POSN, CUR_HORZ_VERT_OFF bit constants */ -#define CUR_LOCK 0x80000000 -#define CUR_CLR0 0x026C -#define CUR_CLR1 0x0270 -#define CUR2_OFFSET 0x0360 -#define CUR2_HORZ_VERT_POSN 0x0364 -#define CUR2_HORZ_VERT_OFF 0x0368 -#define CUR2_LOCK (1 << 31) -#define CUR2_CLR0 0x036c -#define CUR2_CLR1 0x0370 -#define FP_HORZ_VERT_ACTIVE 0x0278 -#define CRTC_MORE_CNTL 0x027C -#define DAC_EXT_CNTL 0x0280 -#define FP_GEN_CNTL 0x0284 -/* FP_GEN_CNTL bit constants */ -#define FP_FPON (1 << 0) -#define FP_TMDS_EN (1 << 2) -#define FP_EN_TMDS (1 << 7) -#define FP_DETECT_SENSE (1 << 8) -#define FP_SEL_CRTC2 (1 << 13) -#define FP_CRTC_DONT_SHADOW_HPAR (1 << 15) -#define FP_CRTC_DONT_SHADOW_VPAR (1 << 16) -#define FP_CRTC_DONT_SHADOW_HEND (1 << 17) -#define FP_CRTC_USE_SHADOW_VEND (1 << 18) -#define FP_RMX_HVSYNC_CONTROL_EN (1 << 20) -#define FP_DFP_SYNC_SEL (1 << 21) -#define FP_CRTC_LOCK_8DOT (1 << 22) -#define FP_CRT_SYNC_SEL (1 << 23) -#define FP_USE_SHADOW_EN (1 << 24) -#define FP_CRT_SYNC_ALT (1 << 26) -#define FP2_GEN_CNTL 0x0288 -/* FP2_GEN_CNTL bit constants */ -#define FP2_FPON (1 << 0) -#define FP2_TMDS_EN (1 << 2) -#define FP2_EN_TMDS (1 << 7) -#define FP2_DETECT_SENSE (1 << 8) -#define FP2_SEL_CRTC2 (1 << 13) -#define FP2_FP_POL (1 << 16) -#define FP2_LP_POL (1 << 17) -#define FP2_SCK_POL (1 << 18) -#define FP2_LCD_CNTL_MASK (7 << 19) -#define FP2_PAD_FLOP_EN (1 << 22) -#define FP2_CRC_EN (1 << 23) -#define FP2_CRC_READ_EN (1 << 24) -#define FP_HORZ_STRETCH 0x028C -#define FP_HORZ2_STRETCH 0x038C -#define HORZ_STRETCH_RATIO_MASK 0xffff -#define HORZ_STRETCH_RATIO_MAX 4096 -#define HORZ_PANEL_SIZE (0x1ff << 16) -#define HORZ_PANEL_SHIFT 16 -#define HORZ_STRETCH_PIXREP (0 << 25) -#define HORZ_STRETCH_BLEND (1 << 26) -#define HORZ_STRETCH_ENABLE (1 << 25) -#define HORZ_AUTO_RATIO (1 << 27) -#define HORZ_FP_LOOP_STRETCH (0x7 << 28) -#define HORZ_AUTO_RATIO_INC (1 << 31) -#define FP_VERT_STRETCH 0x0290 -#define FP_VERT2_STRETCH 0x0390 -#define VERT_PANEL_SIZE (0xfff << 12) -#define VERT_PANEL_SHIFT 12 -#define VERT_STRETCH_RATIO_MASK 0xfff -#define VERT_STRETCH_RATIO_SHIFT 0 -#define VERT_STRETCH_RATIO_MAX 4096 -#define VERT_STRETCH_ENABLE (1 << 25) -#define VERT_STRETCH_LINEREP (0 << 26) -#define VERT_STRETCH_BLEND (1 << 26) -#define VERT_AUTO_RATIO_EN (1 << 27) -#define VERT_STRETCH_RESERVED 0xf1000000 -#define FP_H_SYNC_STRT_WID 0x02C4 -#define FP_H2_SYNC_STRT_WID 0x03C4 -#define FP_V_SYNC_STRT_WID 0x02C8 -#define FP_V2_SYNC_STRT_WID 0x03C8 -#define LVDS_GEN_CNTL 0x02d0 -#define LVDS_ON (1 << 0) -#define LVDS_DISPLAY_DIS (1 << 1) -#define LVDS_PANEL_TYPE (1 << 2) -#define LVDS_PANEL_FORMAT (1 << 3) -#define LVDS_EN (1 << 7) -#define LVDS_DIGON (1 << 18) -#define LVDS_BLON (1 << 19) -#define LVDS_SEL_CRTC2 (1 << 23) -#define LVDS_PLL_CNTL 0x02d4 -#define AUX_WINDOW_HORZ_CNTL 0x02D8 -#define AUX_WINDOW_VERT_CNTL 0x02DC -#define DDA_CONFIG 0x02e0 -#define DDA_ON_OFF 0x02e4 - -#define GRPH_BUFFER_CNTL 0x02F0 -#define VGA_BUFFER_CNTL 0x02F4 - -/* first overlay unit (there is only one) */ - -#define OV0_Y_X_START 0x0400 -#define OV0_Y_X_END 0x0404 -#define OV0_PIPELINE_CNTL 0x0408 -#define OV0_EXCLUSIVE_HORZ 0x0408 -#define EXCL_HORZ_START_MASK 0x000000ff -#define EXCL_HORZ_END_MASK 0x0000ff00 -#define EXCL_HORZ_BACK_PORCH_MASK 0x00ff0000 -#define EXCL_HORZ_EXCLUSIVE_EN 0x80000000 -#define OV0_EXCLUSIVE_VERT 0x040C -#define EXCL_VERT_START_MASK 0x000003ff -#define EXCL_VERT_END_MASK 0x03ff0000 -#define OV0_REG_LOAD_CNTL 0x0410 -#define REG_LD_CTL_LOCK 0x00000001L -#define REG_LD_CTL_VBLANK_DURING_LOCK 0x00000002L -#define REG_LD_CTL_STALL_GUI_UNTIL_FLIP 0x00000004L -#define REG_LD_CTL_LOCK_READBACK 0x00000008L -#define OV0_SCALE_CNTL 0x0420 -#define SCALER_PIX_EXPAND 0x00000001L -#define SCALER_Y2R_TEMP 0x00000002L -#define SCALER_HORZ_PICK_NEAREST 0x00000004L -#define SCALER_VERT_PICK_NEAREST 0x00000008L -#define SCALER_SIGNED_UV 0x00000010L -#define SCALER_GAMMA_SEL_MASK 0x00000060L -#define SCALER_GAMMA_SEL_BRIGHT 0x00000000L -#define SCALER_GAMMA_SEL_G22 0x00000020L -#define SCALER_GAMMA_SEL_G18 0x00000040L -#define SCALER_GAMMA_SEL_G14 0x00000060L -#define SCALER_COMCORE_SHIFT_UP_ONE 0x00000080L -#define SCALER_SURFAC_FORMAT 0x00000f00L -#define SCALER_SOURCE_UNK0 0x00000000L /* 2 bpp ??? */ -#define SCALER_SOURCE_UNK1 0x00000100L /* 4 bpp ??? */ -#define SCALER_SOURCE_UNK2 0x00000200L /* 8 bpp ??? */ -#define SCALER_SOURCE_15BPP 0x00000300L -#define SCALER_SOURCE_16BPP 0x00000400L -/*# define SCALER_SOURCE_24BPP 0x00000500L*/ -#define SCALER_SOURCE_32BPP 0x00000600L -#define SCALER_SOURCE_UNK3 0x00000700L /* 8BPP_RGB332 ??? */ -#define SCALER_SOURCE_UNK4 0x00000800L /* 8BPP_Y8 ??? */ -#define SCALER_SOURCE_YUV9 0x00000900L /* 8BPP_RGB8 */ -#define SCALER_SOURCE_YUV12 0x00000A00L -#define SCALER_SOURCE_VYUY422 0x00000B00L -#define SCALER_SOURCE_YVYU422 0x00000C00L -#define SCALER_SOURCE_UNK5 0x00000D00L /* ??? */ -#define SCALER_SOURCE_UNK6 0x00000E00L /* 32BPP_AYUV444 */ -#define SCALER_SOURCE_UNK7 0x00000F00L /* 16BPP_ARGB4444 */ -#define SCALER_ADAPTIVE_DEINT 0x00001000L -#define R200_SCALER_TEMPORAL_DEINT 0x00002000L -#define SCALER_UNKNOWN_FLAG1 0x00004000L /* ??? */ -#define SCALER_SMART_SWITCH 0x00008000L -#define SCALER_BURST_PER_PLANE 0x007f0000L -#define SCALER_DOUBLE_BUFFER 0x01000000L -#define SCALER_UNKNOWN_FLAG3 0x02000000L /* ??? */ -#define SCALER_UNKNOWN_FLAG4 0x04000000L /* ??? */ -#define SCALER_DIS_LIMIT 0x08000000L -#define SCALER_PRG_LOAD_START 0x10000000L -#define SCALER_INT_EMU 0x20000000L -#define SCALER_ENABLE 0x40000000L -#define SCALER_SOFT_RESET 0x80000000L -#define OV0_V_INC 0x0424 -#define OV0_P1_V_ACCUM_INIT 0x0428 -#define OV0_P1_MAX_LN_IN_PER_LN_OUT 0x00000003L -#define OV0_P1_V_ACCUM_INIT_MASK 0x01ff8000L -#define OV0_P23_V_ACCUM_INIT 0x042C -#define OV0_P23_MAX_LN_IN_PER_LN_OUT 0x00000003L -#define OV0_P23_V_ACCUM_INIT_MASK 0x01ff8000L -#define OV0_P1_BLANK_LINES_AT_TOP 0x0430 -#define P1_BLNK_LN_AT_TOP_M1_MASK 0x00000fffL -#define P1_ACTIVE_LINES_M1 0x0fff0000L -#define OV0_P23_BLANK_LINES_AT_TOP 0x0434 -#define P23_BLNK_LN_AT_TOP_M1_MASK 0x000007ffL -#define P23_ACTIVE_LINES_M1 0x07ff0000L -#define OV0_BASE_ADDR 0x043C -#define OV0_VID_BUF0_BASE_ADRS 0x0440 -#define VIF_BUF0_PITCH_SEL 0x00000001L -#define VIF_BUF0_TILE_ADRS 0x00000002L -#define VIF_BUF0_BASE_ADRS_MASK 0xfffffff0L -#define VIF_BUF0_1ST_LINE_LSBS_MASK 0x48000000L -#define OV0_VID_BUF1_BASE_ADRS 0x0444 -#define VIF_BUF1_PITCH_SEL 0x00000001L -#define VIF_BUF1_TILE_ADRS 0x00000002L -#define VIF_BUF1_BASE_ADRS_MASK 0xfffffff0L -#define VIF_BUF1_1ST_LINE_LSBS_MASK 0x48000000L -#define OV0_VID_BUF2_BASE_ADRS 0x0448 -#define VIF_BUF2_PITCH_SEL 0x00000001L -#define VIF_BUF2_TILE_ADRS 0x00000002L -#define VIF_BUF2_BASE_ADRS_MASK 0xfffffff0L -#define VIF_BUF2_1ST_LINE_LSBS_MASK 0x48000000L -#define OV0_VID_BUF3_BASE_ADRS 0x044C -#define VIF_BUF3_PITCH_SEL 0x00000001L -#define VIF_BUF3_TILE_ADRS 0x00000002L -#define VIF_BUF3_BASE_ADRS_MASK 0xfffffff0L -#define VIF_BUF3_1ST_LINE_LSBS_MASK 0x48000000L -#define OV0_VID_BUF4_BASE_ADRS 0x0450 -#define VIF_BUF4_PITCH_SEL 0x00000001L -#define VIF_BUF4_TILE_ADRS 0x00000002L -#define VIF_BUF4_BASE_ADRS_MASK 0xfffffff0L -#define VIF_BUF4_1ST_LINE_LSBS_MASK 0x48000000L -#define OV0_VID_BUF5_BASE_ADRS 0x0454 -#define VIF_BUF5_PITCH_SEL 0x00000001L -#define VIF_BUF5_TILE_ADRS 0x00000002L -#define VIF_BUF5_BASE_ADRS_MASK 0xfffffff0L -#define VIF_BUF5_1ST_LINE_LSBS_MASK 0x48000000L -#define OV0_VID_BUF_PITCH0_VALUE 0x0460 -#define OV0_VID_BUF_PITCH1_VALUE 0x0464 -#define OV0_AUTO_FLIP_CNTL 0x0470 -#define OV0_AUTO_FLIP_CNTL_SOFT_BUF_NUM 0x00000007 -#define OV0_AUTO_FLIP_CNTL_SOFT_REPEAT_FIELD 0x00000008 -#define OV0_AUTO_FLIP_CNTL_SOFT_BUF_ODD 0x00000010 -#define OV0_AUTO_FLIP_CNTL_IGNORE_REPEAT_FIELD 0x00000020 -#define OV0_AUTO_FLIP_CNTL_SOFT_EOF_TOGGLE 0x00000040 -#define OV0_AUTO_FLIP_CNTL_VID_PORT_SELECT 0x00000300 -#define OV0_AUTO_FLIP_CNTL_P1_FIRST_LINE_EVEN 0x00010000 -#define OV0_AUTO_FLIP_CNTL_SHIFT_EVEN_DOWN 0x00040000 -#define OV0_AUTO_FLIP_CNTL_SHIFT_ODD_DOWN 0x00080000 -#define OV0_AUTO_FLIP_CNTL_FIELD_POL_SOURCE 0x00800000 -#define OV0_DEINTERLACE_PATTERN 0x0474 -#define OV0_SUBMIT_HISTORY 0x0478 -#define OV0_H_INC 0x0480 -#define OV0_STEP_BY 0x0484 -#define OV0_P1_H_ACCUM_INIT 0x0488 -#define OV0_P23_H_ACCUM_INIT 0x048C -#define OV0_P1_X_START_END 0x0494 -#define OV0_P2_X_START_END 0x0498 -#define OV0_P3_X_START_END 0x049C -#define OV0_FILTER_CNTL 0x04A0 -#define FILTER_PROGRAMMABLE_COEF 0x00000000 -#define FILTER_HARD_SCALE_HORZ_Y 0x00000001 -#define FILTER_HARD_SCALE_HORZ_UV 0x00000002 -#define FILTER_HARD_SCALE_VERT_Y 0x00000004 -#define FILTER_HARD_SCALE_VERT_UV 0x00000008 -#define FILTER_HARDCODED_COEF 0x0000000F -#define FILTER_COEF_MASK 0x0000000F -/* When bit is set hard coded coefficients are used. */ - -/* - Top quality 4x4-tap filtered vertical and horizontal scaler. - It allows up to 64:1 upscaling and downscaling without - performance or quality degradation. -*/ -#define OV0_FOUR_TAP_COEF_0 0x04B0 -#define OV0_FOUR_TAP_PHASE_0_TAP_0 0x0000000F -#define OV0_FOUR_TAP_PHASE_0_TAP_1 0x00007F00 -#define OV0_FOUR_TAP_PHASE_0_TAP_2 0x007F0000 -#define OV0_FOUR_TAP_PHASE_0_TAP_3 0x0F000000 -#define OV0_FOUR_TAP_COEF_1 0x04B4 -#define OV0_FOUR_TAP_PHASE_1_5_TAP_0 0x0000000F -#define OV0_FOUR_TAP_PHASE_1_5_TAP_1 0x00007F00 -#define OV0_FOUR_TAP_PHASE_1_5_TAP_2 0x007F0000 -#define OV0_FOUR_TAP_PHASE_1_5_TAP_3 0x0F000000 -#define OV0_FOUR_TAP_COEF_2 0x04B8 -#define OV0_FOUR_TAP_PHASE_2_6_TAP_0 0x0000000F -#define OV0_FOUR_TAP_PHASE_2_6_TAP_1 0x00007F00 -#define OV0_FOUR_TAP_PHASE_2_6_TAP_2 0x007F0000 -#define OV0_FOUR_TAP_PHASE_2_6_TAP_3 0x0F000000 -#define OV0_FOUR_TAP_COEF_3 0x04BC -#define OV0_FOUR_TAP_PHASE_3_7_TAP_0 0x0000000F -#define OV0_FOUR_TAP_PHASE_3_7_TAP_1 0x00007F00 -#define OV0_FOUR_TAP_PHASE_3_7_TAP_2 0x007F0000 -#define OV0_FOUR_TAP_PHASE_3_7_TAP_3 0x0F000000 -#define OV0_FOUR_TAP_COEF_4 0x04C0 -#define OV0_FOUR_TAP_PHASE_4_TAP_0 0x0000000F -#define OV0_FOUR_TAP_PHASE_4_TAP_1 0x00007F00 -#define OV0_FOUR_TAP_PHASE_4_TAP_2 0x007F0000 -#define OV0_FOUR_TAP_PHASE_4_TAP_3 0x0F000000 -/* 0th_tap means that the left most of top most pixel in a set of four will - be multiplied by this coefficient. */ - -#define OV0_FLAG_CNTL 0x04DC -#define OV0_SLICE_CNTL 0x04E0 -#define SLICE_CNTL_DISABLE 0x40000000 -/* Video and graphics keys allow alpha blending, color correction - and many other video effects */ -#define OV0_VID_KEY_CLR 0x04E4 -#define OV0_VID_KEY_MSK 0x04E8 -#define OV0_GRAPHICS_KEY_CLR 0x04EC -#define OV0_GRAPHICS_KEY_MSK 0x04F0 -#define OV0_KEY_CNTL 0x04F4 -#define VIDEO_KEY_FN_MASK 0x00000003L -#define VIDEO_KEY_FN_FALSE 0x00000000L -#define VIDEO_KEY_FN_TRUE 0x00000001L -#define VIDEO_KEY_FN_EQ 0x00000002L -#define VIDEO_KEY_FN_NE 0x00000003L -#define GRAPHIC_KEY_FN_MASK 0x00000030L -#define GRAPHIC_KEY_FN_FALSE 0x00000000L -#define GRAPHIC_KEY_FN_TRUE 0x00000010L -#define GRAPHIC_KEY_FN_EQ 0x00000020L -#define GRAPHIC_KEY_FN_NE 0x00000030L -#define CMP_MIX_MASK 0x00000100L -#define CMP_MIX_OR 0x00000000L -#define CMP_MIX_AND 0x00000100L -#define OV0_TEST 0x04F8 -#define OV0_SCALER_Y2R_DISABLE 0x00000001L -#define OV0_SUBPIC_ONLY 0x00000008L -#define OV0_EXTENSE 0x00000010L -#define OV0_SWAP_UV 0x00000020L -#define OV0_LIN_TRANS_A 0x0D20 -#define OV0_LIN_TRANS_B 0x0D24 -#define OV0_LIN_TRANS_C 0x0D28 -#define OV0_LIN_TRANS_D 0x0D2C -#define OV0_LIN_TRANS_E 0x0D30 -#define OV0_LIN_TRANS_F 0x0D34 -#define OV0_GAMMA_0_F 0x0D40 -#define OV0_GAMMA_10_1F 0x0D44 -#define OV0_GAMMA_20_3F 0x0D48 -#define OV0_GAMMA_40_7F 0x0D4C -/* These registers exist on R200 only */ -#define OV0_GAMMA_80_BF 0x0E00 -#define OV0_GAMMA_C0_FF 0x0E04 -#define OV0_GAMMA_100_13F 0x0E08 -#define OV0_GAMMA_140_17F 0x0E0C -#define OV0_GAMMA_180_1BF 0x0E10 -#define OV0_GAMMA_1C0_1FF 0x0E14 -#define OV0_GAMMA_200_23F 0x0E18 -#define OV0_GAMMA_240_27F 0x0E1C -#define OV0_GAMMA_280_2BF 0x0E20 -#define OV0_GAMMA_2C0_2FF 0x0E24 -#define OV0_GAMMA_300_33F 0x0E28 -#define OV0_GAMMA_340_37F 0x0E2C -/* End of R200 specific definitions */ -#define OV0_GAMMA_380_3BF 0x0D50 -#define OV0_GAMMA_3C0_3FF 0x0D54 - -/* - IDCT ENGINE: - It's MPEG-2 hardware decoder which incorporates run-level decode, de-zigzag - and IDCT into an IDCT engine to complement the motion compensation engine. -*/ -#define IDCT_RUNS 0x1F80 -#define IDCT_LEVELS 0x1F84 -#define IDCT_AUTH_CONTROL 0x1F88 -#define IDCT_AUTH 0x1F8C -#define IDCT_CONTROL 0x1FBC - -#define SE_MC_SRC2_CNTL 0x19D4 -#define SE_MC_SRC1_CNTL 0x19D8 -#define SE_MC_DST_CNTL 0x19DC -#define SE_MC_CNTL_START 0x19E0 -#define SE_MC_BUF_BASE 0x19E4 -#define PP_MC_CONTEXT 0x19E8 - -/* - SUBPICTURE UNIT: - Decompressing, scaling and alpha blending the compressed bitmap on the fly. - Provide optimal DVD subpicture qualtity. -*/ -#define SUBPIC_CNTL 0x0540 -#define SUBPIC_DEFCOLCON 0x0544 -#define SUBPIC_Y_X_START 0x054C -#define SUBPIC_Y_X_END 0x0550 -#define SUBPIC_V_INC 0x0554 -#define SUBPIC_H_INC 0x0558 -#define SUBPIC_BUF0_OFFSET 0x055C -#define SUBPIC_BUF1_OFFSET 0x0560 -#define SUBPIC_LC0_OFFSET 0x0564 -#define SUBPIC_LC1_OFFSET 0x0568 -#define SUBPIC_PITCH 0x056C -#define SUBPIC_BTN_HLI_COLCON 0x0570 -#define SUBPIC_BTN_HLI_Y_X_START 0x0574 -#define SUBPIC_BTN_HLI_Y_X_END 0x0578 -#define SUBPIC_PALETTE_INDEX 0x057C -#define SUBPIC_PALETTE_DATA 0x0580 -#define SUBPIC_H_ACCUM_INIT 0x0584 -#define SUBPIC_V_ACCUM_INIT 0x0588 - -#define CP_RB_BASE 0x0700 -#define CP_RB_CNTL 0x0704 -#define CP_RB_RPTR_ADDR 0x070C -#define CP_RB_RPTR 0x0710 -#define CP_RB_WPTR 0x0714 -#define CP_RB_WPTR_DELAY 0x0718 -#define CP_IB_BASE 0x0738 -#define CP_IB_BUFSZ 0x073C -#define CP_CSQ_CNTL 0x0740 -#define SCRATCH_UMSK 0x0770 -#define SCRATCH_ADDR 0x0774 -#define DMA_GUI_TABLE_ADDR 0x0780 -#define DMA_GUI_COMMAND__BYTE_COUNT_MASK 0x001fffff -#define DMA_GUI_COMMAND__INTDIS 0x40000000 -#define DMA_GUI_COMMAND__EOL 0x80000000 -#define DMA_GUI_SRC_ADDR 0x0784 -#define DMA_GUI_DST_ADDR 0x0788 -#define DMA_GUI_COMMAND 0x078C -#define DMA_GUI_STATUS 0x0790 -#define DMA_GUI_ACT_DSCRPTR 0x0794 -#define DMA_VID_TABLE_ADDR 0x07A0 -#define DMA_VID_SRC_ADDR 0x07A4 -#define DMA_VID_DST_ADDR 0x07A8 -#define DMA_VID_COMMAND 0x07AC -#define DMA_VID_STATUS 0x07B0 -#define DMA_VID_ACT_DSCRPTR 0x07B4 -#define CP_ME_CNTL 0x07D0 -#define CP_ME_RAM_ADDR 0x07D4 -#define CP_ME_RAM_RADDR 0x07D8 -#define CP_ME_RAM_DATAH 0x07DC -#define CP_ME_RAM_DATAL 0x07E0 -#define CP_CSQ_ADDR 0x07F0 -#define CP_CSQ_DATA 0x07F4 -#define CP_CSQ_STAT 0x07F8 - -#define DISP_MISC_CNTL 0x0D00 -#define SOFT_RESET_GRPH_PP (1 << 0) -#define DAC_MACRO_CNTL 0x0D04 -#define DISP_PWR_MAN 0x0D08 -#define DISP_TEST_DEBUG_CNTL 0x0D10 -#define DISP_HW_DEBUG 0x0D14 -#define DAC_CRC_SIG1 0x0D18 -#define DAC_CRC_SIG2 0x0D1C - -/* first capture unit */ - -#define VID_BUFFER_CONTROL 0x0900 -#define CAP_INT_CNTL 0x0908 -#define CAP_INT_STATUS 0x090C -#define FCP_CNTL 0x0910 -#define FCP0_SRC_PCICLK 0 -#define FCP0_SRC_PCLK 1 -#define FCP0_SRC_PCLKb 2 -#define FCP0_SRC_HREF 3 -#define FCP0_SRC_GND 4 -#define FCP0_SRC_HREFb 5 -#define CAP0_BUF0_OFFSET 0x0920 -#define CAP0_BUF1_OFFSET 0x0924 -#define CAP0_BUF0_EVEN_OFFSET 0x0928 -#define CAP0_BUF1_EVEN_OFFSET 0x092C -#define CAP0_BUF_PITCH 0x0930 -#define CAP0_V_WINDOW 0x0934 -#define CAP0_H_WINDOW 0x0938 -#define CAP0_VBI0_OFFSET 0x093C -#define CAP0_VBI1_OFFSET 0x0940 -#define CAP0_VBI_V_WINDOW 0x0944 -#define CAP0_VBI_H_WINDOW 0x0948 -#define CAP0_PORT_MODE_CNTL 0x094C -#define CAP0_TRIG_CNTL 0x0950 -#define CAP0_DEBUG 0x0954 -#define CAP0_CONFIG 0x0958 -#define CAP0_CONFIG_CONTINUOS 0x00000001 -#define CAP0_CONFIG_START_FIELD_EVEN 0x00000002 -#define CAP0_CONFIG_START_BUF_GET 0x00000004 -#define CAP0_CONFIG_START_BUF_SET 0x00000008 -#define CAP0_CONFIG_BUF_TYPE_ALT 0x00000010 -#define CAP0_CONFIG_BUF_TYPE_FRAME 0x00000020 -#define CAP0_CONFIG_ONESHOT_MODE_FRAME 0x00000040 -#define CAP0_CONFIG_BUF_MODE_DOUBLE 0x00000080 -#define CAP0_CONFIG_BUF_MODE_TRIPLE 0x00000100 -#define CAP0_CONFIG_MIRROR_EN 0x00000200 -#define CAP0_CONFIG_ONESHOT_MIRROR_EN 0x00000400 -#define CAP0_CONFIG_VIDEO_SIGNED_UV 0x00000800 -#define CAP0_CONFIG_ANC_DECODE_EN 0x00001000 -#define CAP0_CONFIG_VBI_EN 0x00002000 -#define CAP0_CONFIG_SOFT_PULL_DOWN_EN 0x00004000 -#define CAP0_CONFIG_VIP_EXTEND_FLAG_EN 0x00008000 -#define CAP0_CONFIG_FAKE_FIELD_EN 0x00010000 -#define CAP0_CONFIG_ODD_ONE_MORE_LINE 0x00020000 -#define CAP0_CONFIG_EVEN_ONE_MORE_LINE 0x00040000 -#define CAP0_CONFIG_HORZ_DIVIDE_2 0x00080000 -#define CAP0_CONFIG_HORZ_DIVIDE_4 0x00100000 -#define CAP0_CONFIG_VERT_DIVIDE_2 0x00200000 -#define CAP0_CONFIG_VERT_DIVIDE_4 0x00400000 -#define CAP0_CONFIG_FORMAT_BROOKTREE 0x00000000 -#define CAP0_CONFIG_FORMAT_CCIR656 0x00800000 -#define CAP0_CONFIG_FORMAT_ZV 0x01000000 -#define CAP0_CONFIG_FORMAT_VIP 0x01800000 -#define CAP0_CONFIG_FORMAT_TRANSPORT 0x02000000 -#define CAP0_CONFIG_HORZ_DECIMATOR 0x04000000 -#define CAP0_CONFIG_VIDEO_IN_YVYU422 0x00000000 -#define CAP0_CONFIG_VIDEO_IN_VYUY422 0x20000000 -#define CAP0_CONFIG_VBI_DIVIDE_2 0x40000000 -#define CAP0_CONFIG_VBI_DIVIDE_4 0x80000000 -#define CAP0_ANC_ODD_OFFSET 0x095C -#define CAP0_ANC_EVEN_OFFSET 0x0960 -#define CAP0_ANC_H_WINDOW 0x0964 -#define CAP0_VIDEO_SYNC_TEST 0x0968 -#define CAP0_ONESHOT_BUF_OFFSET 0x096C -#define CAP0_BUF_STATUS 0x0970 -/* #define CAP0_DWNSC_XRATIO 0x0978 */ -/* #define CAP0_XSHARPNESS 0x097C */ -#define CAP0_VBI2_OFFSET 0x0980 -#define CAP0_VBI3_OFFSET 0x0984 -#define CAP0_ANC2_OFFSET 0x0988 -#define CAP0_ANC3_OFFSET 0x098C - -/* second capture unit */ - -#define CAP1_BUF0_OFFSET 0x0990 -#define CAP1_BUF1_OFFSET 0x0994 -#define CAP1_BUF0_EVEN_OFFSET 0x0998 -#define CAP1_BUF1_EVEN_OFFSET 0x099C - -#define CAP1_BUF_PITCH 0x09A0 -#define CAP1_V_WINDOW 0x09A4 -#define CAP1_H_WINDOW 0x09A8 -#define CAP1_VBI_ODD_OFFSET 0x09AC -#define CAP1_VBI_EVEN_OFFSET 0x09B0 -#define CAP1_VBI_V_WINDOW 0x09B4 -#define CAP1_VBI_H_WINDOW 0x09B8 -#define CAP1_PORT_MODE_CNTL 0x09BC -#define CAP1_DEBUG 0x09C4 -#define CAP1_CONFIG 0x09C8 -#define CAP1_ANC_ODD_OFFSET 0x09CC -#define CAP1_ANC_EVEN_OFFSET 0x09D0 -#define CAP1_ANC_H_WINDOW 0x09D4 -#define CAP1_VIDEO_SYNC_TEST 0x09D8 -#define CAP1_ONESHOT_BUF_OFFSET 0x09DC -#define CAP1_BUF_STATUS 0x09E0 -#define CAP1_DWNSC_XRATIO 0x09E8 -#define CAP1_XSHARPNESS 0x09EC - -#define DISP_MERGE_CNTL 0x0D60 -#define DISP_OUTPUT_CNTL 0x0D64 -#define DISP_DAC_SOURCE_MASK 0x03 -#define DISP_DAC_SOURCE_CRTC2 0x01 -#define DISP_LIN_TRANS_GRPH_A 0x0D80 -#define DISP_LIN_TRANS_GRPH_B 0x0D84 -#define DISP_LIN_TRANS_GRPH_C 0x0D88 -#define DISP_LIN_TRANS_GRPH_D 0x0D8C -#define DISP_LIN_TRANS_GRPH_E 0x0D90 -#define DISP_LIN_TRANS_GRPH_F 0x0D94 -#define DISP_LIN_TRANS_VID_A 0x0D98 -#define DISP_LIN_TRANS_VID_B 0x0D9C -#define DISP_LIN_TRANS_VID_C 0x0DA0 -#define DISP_LIN_TRANS_VID_D 0x0DA4 -#define DISP_LIN_TRANS_VID_E 0x0DA8 -#define DISP_LIN_TRANS_VID_F 0x0DAC -#define RMX_HORZ_FILTER_0TAP_COEF 0x0DB0 -#define RMX_HORZ_FILTER_1TAP_COEF 0x0DB4 -#define RMX_HORZ_FILTER_2TAP_COEF 0x0DB8 -#define RMX_HORZ_PHASE 0x0DBC -#define DAC_EMBEDDED_SYNC_CNTL 0x0DC0 -#define DAC_BROAD_PULSE 0x0DC4 -#define DAC_SKEW_CLKS 0x0DC8 -#define DAC_INCR 0x0DCC -#define DAC_NEG_SYNC_LEVEL 0x0DD0 -#define DAC_POS_SYNC_LEVEL 0x0DD4 -#define DAC_BLANK_LEVEL 0x0DD8 -#define CLOCK_CNTL_INDEX 0x0008 -/* CLOCK_CNTL_INDEX bit constants */ -#define PLL_WR_EN 0x00000080 -#define PLL_DIV_SEL (3 << 8) -#define PLL2_DIV_SEL_MASK ~(3 << 8) -#define CLOCK_CNTL_DATA 0x000C -#define CP_RB_CNTL 0x0704 -#define CP_RB_BASE 0x0700 -#define CP_RB_RPTR_ADDR 0x070C -#define CP_RB_RPTR 0x0710 -#define CP_RB_WPTR 0x0714 -#define CP_RB_WPTR_DELAY 0x0718 -#define CP_IB_BASE 0x0738 -#define CP_IB_BUFSZ 0x073C -#define SCRATCH_REG0 0x15E0 -#define GUI_SCRATCH_REG0 0x15E0 -#define SCRATCH_REG1 0x15E4 -#define GUI_SCRATCH_REG1 0x15E4 -#define SCRATCH_REG2 0x15E8 -#define GUI_SCRATCH_REG2 0x15E8 -#define SCRATCH_REG3 0x15EC -#define GUI_SCRATCH_REG3 0x15EC -#define SCRATCH_REG4 0x15F0 -#define GUI_SCRATCH_REG4 0x15F0 -#define SCRATCH_REG5 0x15F4 -#define GUI_SCRATCH_REG5 0x15F4 -#define SCRATCH_UMSK 0x0770 -#define SCRATCH_ADDR 0x0774 -#define DP_BRUSH_FRGD_CLR 0x147C -#define DP_BRUSH_BKGD_CLR 0x1478 -#define DST_LINE_START 0x1600 -#define DST_LINE_END 0x1604 -#define SRC_OFFSET 0x15AC -#define SRC_PITCH 0x15B0 -#define SRC_TILE 0x1704 -#define SRC_PITCH_OFFSET 0x1428 -#define SRC_X 0x1414 -#define SRC_Y 0x1418 -#define DST_WIDTH_X 0x1588 -#define DST_HEIGHT_WIDTH_8 0x158C -#define SRC_X_Y 0x1590 -#define SRC_Y_X 0x1434 -#define DST_Y_X 0x1438 -#define DST_WIDTH_HEIGHT 0x1598 -#define DST_HEIGHT_WIDTH 0x143c -#define SRC_CLUT_ADDRESS 0x1780 -#define SRC_CLUT_DATA 0x1784 -#define SRC_CLUT_DATA_RD 0x1788 -#define HOST_DATA0 0x17C0 -#define HOST_DATA1 0x17C4 -#define HOST_DATA2 0x17C8 -#define HOST_DATA3 0x17CC -#define HOST_DATA4 0x17D0 -#define HOST_DATA5 0x17D4 -#define HOST_DATA6 0x17D8 -#define HOST_DATA7 0x17DC -#define HOST_DATA_LAST 0x17E0 -#define DP_SRC_ENDIAN 0x15D4 -#define DP_SRC_FRGD_CLR 0x15D8 -#define DP_SRC_BKGD_CLR 0x15DC -#define DP_WRITE_MASK 0x16cc -#define SC_LEFT 0x1640 -#define SC_RIGHT 0x1644 -#define SC_TOP 0x1648 -#define SC_BOTTOM 0x164C -#define SRC_SC_RIGHT 0x1654 -#define SRC_SC_BOTTOM 0x165C -#define DP_CNTL 0x16C0 -/* DP_CNTL bit constants */ -#define DST_X_RIGHT_TO_LEFT 0x00000000 -#define DST_X_LEFT_TO_RIGHT 0x00000001 -#define DST_Y_BOTTOM_TO_TOP 0x00000000 -#define DST_Y_TOP_TO_BOTTOM 0x00000002 -#define DST_X_MAJOR 0x00000000 -#define DST_Y_MAJOR 0x00000004 -#define DST_X_TILE 0x00000008 -#define DST_Y_TILE 0x00000010 -#define DST_LAST_PEL 0x00000020 -#define DST_TRAIL_X_RIGHT_TO_LEFT 0x00000000 -#define DST_TRAIL_X_LEFT_TO_RIGHT 0x00000040 -#define DST_TRAP_FILL_RIGHT_TO_LEFT 0x00000000 -#define DST_TRAP_FILL_LEFT_TO_RIGHT 0x00000080 -#define DST_BRES_SIGN 0x00000100 -#define DST_HOST_BIG_ENDIAN_EN 0x00000200 -#define DST_POLYLINE_NONLAST 0x00008000 -#define DST_RASTER_STALL 0x00010000 -#define DST_POLY_EDGE 0x00040000 -#define DP_CNTL_XDIR_YDIR_YMAJOR 0x16D0 -/* DP_CNTL_XDIR_YDIR_YMAJOR bit constants (short version of DP_CNTL) */ -#define DST_X_MAJOR_S 0x00000000 -#define DST_Y_MAJOR_S 0x00000001 -#define DST_Y_BOTTOM_TO_TOP_S 0x00000000 -#define DST_Y_TOP_TO_BOTTOM_S 0x00008000 -#define DST_X_RIGHT_TO_LEFT_S 0x00000000 -#define DST_X_LEFT_TO_RIGHT_S 0x80000000 -#define DP_DATATYPE 0x16C4 -/* DP_DATATYPE bit constants */ -#define DST_8BPP 0x00000002 -#define DST_15BPP 0x00000003 -#define DST_16BPP 0x00000004 -#define DST_24BPP 0x00000005 -#define DST_32BPP 0x00000006 -#define DST_8BPP_RGB332 0x00000007 -#define DST_8BPP_Y8 0x00000008 -#define DST_8BPP_RGB8 0x00000009 -#define DST_16BPP_VYUY422 0x0000000b -#define DST_16BPP_YVYU422 0x0000000c -#define DST_32BPP_AYUV444 0x0000000e -#define DST_16BPP_ARGB4444 0x0000000f -#define BRUSH_SOLIDCOLOR 0x00000d00 -#define SRC_MONO 0x00000000 -#define SRC_MONO_LBKGD 0x00010000 -#define SRC_DSTCOLOR 0x00030000 -#define BYTE_ORDER_MSB_TO_LSB 0x00000000 -#define BYTE_ORDER_LSB_TO_MSB 0x40000000 -#define DP_CONVERSION_TEMP 0x80000000 -#define HOST_BIG_ENDIAN_EN (1 << 29) -#define DP_MIX 0x16C8 -/* DP_MIX bit constants */ -#define DP_SRC_RECT 0x00000200 -#define DP_SRC_HOST 0x00000300 -#define DP_SRC_HOST_BYTEALIGN 0x00000400 -#define DP_WRITE_MSK 0x16CC -#define DP_XOP 0x17F8 -#define CLR_CMP_CLR_SRC 0x15C4 -#define CLR_CMP_CLR_DST 0x15C8 -#define CLR_CMP_CNTL 0x15C0 -/* CLR_CMP_CNTL bit constants */ -#define COMPARE_SRC_FALSE 0x00000000 -#define COMPARE_SRC_TRUE 0x00000001 -#define COMPARE_SRC_NOT_EQUAL 0x00000004 -#define COMPARE_SRC_EQUAL 0x00000005 -#define COMPARE_SRC_EQUAL_FLIP 0x00000007 -#define COMPARE_DST_FALSE 0x00000000 -#define COMPARE_DST_TRUE 0x00000100 -#define COMPARE_DST_NOT_EQUAL 0x00000400 -#define COMPARE_DST_EQUAL 0x00000500 -#define COMPARE_DESTINATION 0x00000000 -#define COMPARE_SOURCE 0x01000000 -#define COMPARE_SRC_AND_DST 0x02000000 -#define CLR_CMP_MSK 0x15CC -#define DSTCACHE_MODE 0x1710 -#define DSTCACHE_CTLSTAT 0x1714 -/* DSTCACHE_CTLSTAT bit constants */ -#define RB2D_DC_FLUSH (3 << 0) -#define RB2D_DC_FLUSH_ALL 0xf -#define RB2D_DC_BUSY (1 << 31) -#define DEFAULT_OFFSET 0x16e0 -#define DEFAULT_PITCH_OFFSET 0x16E0 -#define DEFAULT_SC_BOTTOM_RIGHT 0x16E8 -/* DEFAULT_SC_BOTTOM_RIGHT bit constants */ -#define DEFAULT_SC_RIGHT_MAX (0x1fff << 0) -#define DEFAULT_SC_BOTTOM_MAX (0x1fff << 16) -#define DP_GUI_MASTER_CNTL 0x146C -/* DP_GUI_MASTER_CNTL bit constants */ -#define GMC_SRC_PITCH_OFFSET_DEFAULT 0x00000000 -#define GMC_SRC_PITCH_OFFSET_LEAVE 0x00000001 -#define GMC_DST_PITCH_OFFSET_DEFAULT 0x00000000 -#define GMC_DST_PITCH_OFFSET_LEAVE 0x00000002 -#define GMC_SRC_CLIP_DEFAULT 0x00000000 -#define GMC_SRC_CLIP_LEAVE 0x00000004 -#define GMC_DST_CLIP_DEFAULT 0x00000000 -#define GMC_DST_CLIP_LEAVE 0x00000008 -#define GMC_BRUSH_8x8MONO 0x00000000 -#define GMC_BRUSH_8x8MONO_LBKGD 0x00000010 -#define GMC_BRUSH_8x1MONO 0x00000020 -#define GMC_BRUSH_8x1MONO_LBKGD 0x00000030 -#define GMC_BRUSH_1x8MONO 0x00000040 -#define GMC_BRUSH_1x8MONO_LBKGD 0x00000050 -#define GMC_BRUSH_32x1MONO 0x00000060 -#define GMC_BRUSH_32x1MONO_LBKGD 0x00000070 -#define GMC_BRUSH_32x32MONO 0x00000080 -#define GMC_BRUSH_32x32MONO_LBKGD 0x00000090 -#define GMC_BRUSH_8x8COLOR 0x000000a0 -#define GMC_BRUSH_8x1COLOR 0x000000b0 -#define GMC_BRUSH_1x8COLOR 0x000000c0 -//#define GMC_BRUSH_SOLID_COLOR 0x000000d0 -//#define GMC_DST_8BPP 0x00000200 -//#define GMC_DST_15BPP 0x00000300 -//#define GMC_DST_16BPP 0x00000400 -//#define GMC_DST_24BPP 0x00000500 -//#define GMC_DST_32BPP 0x00000600 -//#define GMC_DST_8BPP_RGB332 0x00000700 -//#define GMC_DST_8BPP_Y8 0x00000800 -//#define GMC_DST_8BPP_RGB8 0x00000900 -//#define GMC_DST_16BPP_VYUY422 0x00000b00 -//#define GMC_DST_16BPP_YVYU422 0x00000c00 -//#define GMC_DST_32BPP_AYUV444 0x00000e00 -//#define GMC_DST_16BPP_ARGB4444 0x00000f00 -#define GMC_SRC_MONO 0x00000000 -#define GMC_SRC_MONO_LBKGD 0x00001000 -#define GMC_SRC_DSTCOLOR 0x00003000 -#define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000 -#define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000 -#define GMC_DP_CONVERSION_TEMP_9300 0x00008000 -#define GMC_DP_CONVERSION_TEMP_6500 0x00000000 -#define GMC_DP_SRC_RECT 0x02000000 -#define GMC_DP_SRC_HOST 0x03000000 -#define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000 -#define GMC_3D_FCN_EN_CLR 0x00000000 -#define GMC_3D_FCN_EN_SET 0x08000000 -#define GMC_DST_CLR_CMP_FCN_LEAVE 0x00000000 -#define GMC_DST_CLR_CMP_FCN_CLEAR 0x10000000 -#define GMC_AUX_CLIP_LEAVE 0x00000000 -#define GMC_AUX_CLIP_CLEAR 0x20000000 -#define GMC_WRITE_MASK_LEAVE 0x00000000 -#define GMC_WRITE_MASK_SET 0x40000000 -#define GMC_CLR_CMP_CNTL_DIS (1 << 28) -#define GMC_SRC_DATATYPE_COLOR (3 << 12) -#define ROP3_S 0x00cc0000 -#define ROP3_SRCCOPY 0x00cc0000 -#define ROP3_P 0x00f00000 -#define ROP3_PATCOPY 0x00f00000 -#define DP_SRC_SOURCE_MASK (7 << 24) -#define GMC_BRUSH_NONE (15 << 4) -#define DP_SRC_SOURCE_MEMORY (2 << 24) -#define GMC_BRUSH_SOLIDCOLOR 0x000000d0 -#define SC_TOP_LEFT 0x16EC -#define SC_BOTTOM_RIGHT 0x16F0 -#define SRC_SC_BOTTOM_RIGHT 0x16F4 -#define RB2D_DSTCACHE_CTLSTAT 0x342C -#define RB2D_DSTCACHE_MODE 0x3428 - -#define RADEON_BIOS_0_SCRATCH 0x0010 -#define RADEON_BIOS_1_SCRATCH 0x0014 -#define RADEON_BIOS_2_SCRATCH 0x0018 -#define RADEON_BIOS_3_SCRATCH 0x001c -#define RADEON_BIOS_4_SCRATCH 0x0020 -#define RADEON_BIOS_5_SCRATCH 0x0024 -#define RADEON_BIOS_6_SCRATCH 0x0028 -#define RADEON_BIOS_7_SCRATCH 0x002c - -#define CLK_PIN_CNTL 0x0001 -#define PPLL_CNTL 0x0002 -//#define PPLL_RESET (1 << 0) -//#define PPLL_SLEEP (1 << 1) -//#define PPLL_ATOMIC_UPDATE_EN (1 << 16) -//#define PPLL_VGA_ATOMIC_UPDATE_EN (1 << 17) -//#define PPLL_ATOMIC_UPDATE_VSYNC (1 << 18) -//#define PPLL_REF_DIV 0x0003 -//#define PPLL_ATOMIC_UPDATE_R (1 << 15) /* same as _W */ -//#define PPLL_ATOMIC_UPDATE_W (1 << 15) /* same as _R */ -#define PPLL_DIV_0 0x0004 -#define PPLL_DIV_1 0x0005 -#define PPLL_DIV_2 0x0006 -#define PPLL_DIV_3 0x0007 -#define VCLK_ECP_CNTL 0x0008 -#define VCLK_SRC_SEL_MASK 0x03 -#define VCLK_SRC_SEL_CPUCLK 0x00 -#define VCLK_SRC_SEL_PSCANCLK 0x01 -#define VCLK_SRC_SEL_BYTECLK 0x02 -#define VCLK_SRC_SEL_PPLLCLK 0x03 -#define HTOTAL_CNTL 0x0009 -#define HTOTAL2_CNTL 0x002e /* PLL */ -#define M_SPLL_REF_FB_DIV 0x000a -#define AGP_PLL_CNTL 0x000b -#define SPLL_CNTL 0x000c -#define SCLK_CNTL 0x000d -#define DYN_STOP_LAT_MASK 0x00007ff8 -#define CP_MAX_DYN_STOP_LAT 0x0008 -#define SCLK_FORCEON_MASK 0xffff8000 -#define SCLK_MORE_CNTL 0x0035 /* PLL */ -#define SCLK_MORE_FORCEON 0x0700 -#define MPLL_CNTL 0x000e -#define MCLK_CNTL 0x0012 -/* MCLK_CNTL bit constants */ -#define FORCEON_MCLKA (1 << 16) -#define FORCEON_MCLKB (1 << 17) -#define FORCEON_YCLKA (1 << 18) -#define FORCEON_YCLKB (1 << 19) -#define FORCEON_MC (1 << 20) -#define FORCEON_AIC (1 << 21) -#define PLL_TEST_CNTL 0x0013 -#define P2PLL_CNTL 0x002a /* P2PLL */ -#define P2PLL_RESET (1 << 0) -#define P2PLL_SLEEP (1 << 1) -#define P2PLL_ATOMIC_UPDATE_EN (1 << 16) -#define P2PLL_VGA_ATOMIC_UPDATE_EN (1 << 17) -#define P2PLL_ATOMIC_UPDATE_VSYNC (1 << 18) -#define P2PLL_DIV_0 0x002c -#define P2PLL_FB0_DIV_MASK 0x07ff -#define P2PLL_POST0_DIV_MASK 0x00070000 -#define P2PLL_REF_DIV_MASK 0x03ff -#define P2PLL_ATOMIC_UPDATE_R (1 << 15) /* same as _W */ -#define P2PLL_ATOMIC_UPDATE_W (1 << 15) /* same as _R */ -#define PIXCLKS_CNTL 0x002d -#define PIX2CLK_SRC_SEL_MASK 0x03 -#define PIX2CLK_SRC_SEL_CPUCLK 0x00 -#define PIX2CLK_SRC_SEL_PSCANCLK 0x01 -#define PIX2CLK_SRC_SEL_BYTECLK 0x02 -#define PIX2CLK_SRC_SEL_P2PLLCLK 0x03 - -/* masks */ - -#define CONFIG_MEMSIZE_MASK 0x1f000000 -#define MEM_CFG_TYPE 0x40000000 -#define DST_OFFSET_MASK 0x003fffff -#define DST_PITCH_MASK 0x3fc00000 -#define DEFAULT_TILE_MASK 0xc0000000 -#define PPLL_DIV_SEL_MASK 0x00000300 -#define PPLL_FB3_DIV_MASK 0x000007ff -#define PPLL_POST3_DIV_MASK 0x00070000 - -/* Registers for 3D/TCL */ - -#define PP_BORDER_COLOR_0 0x1d40 -#define PP_BORDER_COLOR_1 0x1d44 -#define PP_BORDER_COLOR_2 0x1d48 -#define PP_CNTL 0x1c38 -#define STIPPLE_ENABLE (1 << 0) -#define SCISSOR_ENABLE (1 << 1) -#define PATTERN_ENABLE (1 << 2) -#define SHADOW_ENABLE (1 << 3) -#define TEX_ENABLE_MASK (0xf << 4) -#define TEX_0_ENABLE (1 << 4) -#define TEX_1_ENABLE (1 << 5) -#define TEX_2_ENABLE (1 << 6) -#define TEX_3_ENABLE (1 << 7) -#define TEX_BLEND_ENABLE_MASK (0xf << 12) -#define TEX_BLEND_0_ENABLE (1 << 12) -#define TEX_BLEND_1_ENABLE (1 << 13) -#define TEX_BLEND_2_ENABLE (1 << 14) -#define TEX_BLEND_3_ENABLE (1 << 15) -#define PLANAR_YUV_ENABLE (1 << 20) -#define SPECULAR_ENABLE (1 << 21) -#define FOG_ENABLE (1 << 22) -#define ALPHA_TEST_ENABLE (1 << 23) -#define ANTI_ALIAS_NONE (0 << 24) -#define ANTI_ALIAS_LINE (1 << 24) -#define ANTI_ALIAS_POLY (2 << 24) -#define ANTI_ALIAS_LINE_POLY (3 << 24) -#define BUMP_MAP_ENABLE (1 << 26) -#define BUMPED_MAP_T0 (0 << 27) -#define BUMPED_MAP_T1 (1 << 27) -#define BUMPED_MAP_T2 (2 << 27) -#define TEX_3D_ENABLE_0 (1 << 29) -#define TEX_3D_ENABLE_1 (1 << 30) -#define MC_ENABLE (1 << 31) -#define PP_FOG_COLOR 0x1c18 -#define FOG_COLOR_MASK 0x00ffffff -#define FOG_VERTEX (0 << 24) -#define FOG_TABLE (1 << 24) -#define FOG_USE_DEPTH (0 << 25) -#define FOG_USE_DIFFUSE_ALPHA (2 << 25) -#define FOG_USE_SPEC_ALPHA (3 << 25) -#define PP_LUM_MATRIX 0x1d00 -#define PP_MISC 0x1c14 -#define REF_ALPHA_MASK 0x000000ff -#define ALPHA_TEST_FAIL (0 << 8) -#define ALPHA_TEST_LESS (1 << 8) -#define ALPHA_TEST_LEQUAL (2 << 8) -#define ALPHA_TEST_EQUAL (3 << 8) -#define ALPHA_TEST_GEQUAL (4 << 8) -#define ALPHA_TEST_GREATER (5 << 8) -#define ALPHA_TEST_NEQUAL (6 << 8) -#define ALPHA_TEST_PASS (7 << 8) -#define ALPHA_TEST_OP_MASK (7 << 8) -#define CHROMA_FUNC_FAIL (0 << 16) -#define CHROMA_FUNC_PASS (1 << 16) -#define CHROMA_FUNC_NEQUAL (2 << 16) -#define CHROMA_FUNC_EQUAL (3 << 16) -#define CHROMA_KEY_NEAREST (0 << 18) -#define CHROMA_KEY_ZERO (1 << 18) -#define SHADOW_ID_AUTO_INC (1 << 20) -#define SHADOW_FUNC_EQUAL (0 << 21) -#define SHADOW_FUNC_NEQUAL (1 << 21) -#define SHADOW_PASS_1 (0 << 22) -#define SHADOW_PASS_2 (1 << 22) -#define RIGHT_HAND_CUBE_D3D (0 << 24) -#define RIGHT_HAND_CUBE_OGL (1 << 24) -#define PP_ROT_MATRIX_0 0x1d58 -#define PP_ROT_MATRIX_1 0x1d5c -#define PP_TXFILTER_0 0x1c54 -#define PP_TXFILTER_1 0x1c6c -#define PP_TXFILTER_2 0x1c84 -#define MAG_FILTER_NEAREST (0 << 0) -#define MAG_FILTER_LINEAR (1 << 0) -#define MAG_FILTER_MASK (1 << 0) -#define MIN_FILTER_NEAREST (0 << 1) -#define MIN_FILTER_LINEAR (1 << 1) -#define MIN_FILTER_NEAREST_MIP_NEAREST (2 << 1) -#define MIN_FILTER_NEAREST_MIP_LINEAR (3 << 1) -#define MIN_FILTER_LINEAR_MIP_NEAREST (6 << 1) -#define MIN_FILTER_LINEAR_MIP_LINEAR (7 << 1) -#define MIN_FILTER_ANISO_NEAREST (8 << 1) -#define MIN_FILTER_ANISO_LINEAR (9 << 1) -#define MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (10 << 1) -#define MIN_FILTER_ANISO_NEAREST_MIP_LINEAR (11 << 1) -#define MIN_FILTER_MASK (15 << 1) -#define MAX_ANISO_1_TO_1 (0 << 5) -#define MAX_ANISO_2_TO_1 (1 << 5) -#define MAX_ANISO_4_TO_1 (2 << 5) -#define MAX_ANISO_8_TO_1 (3 << 5) -#define MAX_ANISO_16_TO_1 (4 << 5) -#define MAX_ANISO_MASK (7 << 5) -#define LOD_BIAS_MASK (0xff << 8) -#define LOD_BIAS_SHIFT 8 -#define MAX_MIP_LEVEL_MASK (0x0f << 16) -#define MAX_MIP_LEVEL_SHIFT 16 -#define YUV_TO_RGB (1 << 20) -#define YUV_TEMPERATURE_COOL (0 << 21) -#define YUV_TEMPERATURE_HOT (1 << 21) -#define YUV_TEMPERATURE_MASK (1 << 21) -#define WRAPEN_S (1 << 22) -#define CLAMP_S_WRAP (0 << 23) -#define CLAMP_S_MIRROR (1 << 23) -#define CLAMP_S_CLAMP_LAST (2 << 23) -#define CLAMP_S_MIRROR_CLAMP_LAST (3 << 23) -#define CLAMP_S_CLAMP_BORDER (4 << 23) -#define CLAMP_S_MIRROR_CLAMP_BORDER (5 << 23) -#define CLAMP_S_CLAMP_GL (6 << 23) -#define CLAMP_S_MIRROR_CLAMP_GL (7 << 23) -#define CLAMP_S_MASK (7 << 23) -#define WRAPEN_T (1 << 26) -#define CLAMP_T_WRAP (0 << 27) -#define CLAMP_T_MIRROR (1 << 27) -#define CLAMP_T_CLAMP_LAST (2 << 27) -#define CLAMP_T_MIRROR_CLAMP_LAST (3 << 27) -#define CLAMP_T_CLAMP_BORDER (4 << 27) -#define CLAMP_T_MIRROR_CLAMP_BORDER (5 << 27) -#define CLAMP_T_CLAMP_GL (6 << 27) -#define CLAMP_T_MIRROR_CLAMP_GL (7 << 27) -#define CLAMP_T_MASK (7 << 27) -#define BORDER_MODE_OGL (0 << 31) -#define BORDER_MODE_D3D (1 << 31) -#define PP_TXFORMAT_0 0x1c58 -#define PP_TXFORMAT_1 0x1c70 -#define PP_TXFORMAT_2 0x1c88 -#define TXFORMAT_I8 (0 << 0) -#define TXFORMAT_AI88 (1 << 0) -#define TXFORMAT_RGB332 (2 << 0) -#define TXFORMAT_ARGB1555 (3 << 0) -#define TXFORMAT_RGB565 (4 << 0) -#define TXFORMAT_ARGB4444 (5 << 0) -#define TXFORMAT_ARGB8888 (6 << 0) -#define TXFORMAT_RGBA8888 (7 << 0) -#define TXFORMAT_Y8 (8 << 0) -#define TXFORMAT_VYUY422 (10 << 0) -#define TXFORMAT_YVYU422 (11 << 0) -#define TXFORMAT_DXT1 (12 << 0) -#define TXFORMAT_DXT23 (14 << 0) -#define TXFORMAT_DXT45 (15 << 0) -#define TXFORMAT_FORMAT_MASK (31 << 0) -#define TXFORMAT_FORMAT_SHIFT 0 -#define TXFORMAT_APPLE_YUV_MODE (1 << 5) -#define TXFORMAT_ALPHA_IN_MAP (1 << 6) -#define TXFORMAT_NON_POWER2 (1 << 7) -#define TXFORMAT_WIDTH_MASK (15 << 8) -#define TXFORMAT_WIDTH_SHIFT 8 -#define TXFORMAT_HEIGHT_MASK (15 << 12) -#define TXFORMAT_HEIGHT_SHIFT 12 -#define TXFORMAT_F5_WIDTH_MASK (15 << 16) -#define TXFORMAT_F5_WIDTH_SHIFT 16 -#define TXFORMAT_F5_HEIGHT_MASK (15 << 20) -#define TXFORMAT_F5_HEIGHT_SHIFT 20 -#define TXFORMAT_ST_ROUTE_STQ0 (0 << 24) -#define TXFORMAT_ST_ROUTE_MASK (3 << 24) -#define TXFORMAT_ST_ROUTE_STQ1 (1 << 24) -#define TXFORMAT_ST_ROUTE_STQ2 (2 << 24) -#define TXFORMAT_ENDIAN_NO_SWAP (0 << 26) -#define TXFORMAT_ENDIAN_16BPP_SWAP (1 << 26) -#define TXFORMAT_ENDIAN_32BPP_SWAP (2 << 26) -#define TXFORMAT_ENDIAN_HALFDW_SWAP (3 << 26) -#define TXFORMAT_ALPHA_MASK_ENABLE (1 << 28) -#define TXFORMAT_CHROMA_KEY_ENABLE (1 << 29) -#define TXFORMAT_CUBIC_MAP_ENABLE (1 << 30) -#define TXFORMAT_PERSPECTIVE_ENABLE (1 << 31) -#define PP_CUBIC_FACES_0 0x1d24 -#define PP_CUBIC_FACES_1 0x1d28 -#define PP_CUBIC_FACES_2 0x1d2c -#define FACE_WIDTH_1_SHIFT 0 -#define FACE_HEIGHT_1_SHIFT 4 -#define FACE_WIDTH_1_MASK (0xf << 0) -#define FACE_HEIGHT_1_MASK (0xf << 4) -#define FACE_WIDTH_2_SHIFT 8 -#define FACE_HEIGHT_2_SHIFT 12 -#define FACE_WIDTH_2_MASK (0xf << 8) -#define FACE_HEIGHT_2_MASK (0xf << 12) -#define FACE_WIDTH_3_SHIFT 16 -#define FACE_HEIGHT_3_SHIFT 20 -#define FACE_WIDTH_3_MASK (0xf << 16) -#define FACE_HEIGHT_3_MASK (0xf << 20) -#define FACE_WIDTH_4_SHIFT 24 -#define FACE_HEIGHT_4_SHIFT 28 -#define FACE_WIDTH_4_MASK (0xf << 24) -#define FACE_HEIGHT_4_MASK (0xf << 28) - -#define PP_TXOFFSET_0 0x1c5c -#define PP_TXOFFSET_1 0x1c74 -#define PP_TXOFFSET_2 0x1c8c -#define TXO_ENDIAN_NO_SWAP (0 << 0) -#define TXO_ENDIAN_BYTE_SWAP (1 << 0) -#define TXO_ENDIAN_WORD_SWAP (2 << 0) -#define TXO_ENDIAN_HALFDW_SWAP (3 << 0) -#define TXO_MACRO_LINEAR (0 << 2) -#define TXO_MACRO_TILE (1 << 2) -#define TXO_MICRO_LINEAR (0 << 3) -#define TXO_MICRO_TILE_X2 (1 << 3) -#define TXO_MICRO_TILE_OPT (2 << 3) -#define TXO_OFFSET_MASK 0xffffffe0 -#define TXO_OFFSET_SHIFT 5 - -#define PP_CUBIC_OFFSET_T0_0 0x1dd0 /* bits [31:5] */ -#define PP_CUBIC_OFFSET_T0_1 0x1dd4 -#define PP_CUBIC_OFFSET_T0_2 0x1dd8 -#define PP_CUBIC_OFFSET_T0_3 0x1ddc -#define PP_CUBIC_OFFSET_T0_4 0x1de0 -#define PP_CUBIC_OFFSET_T1_0 0x1e00 -#define PP_CUBIC_OFFSET_T1_1 0x1e04 -#define PP_CUBIC_OFFSET_T1_2 0x1e08 -#define PP_CUBIC_OFFSET_T1_3 0x1e0c -#define PP_CUBIC_OFFSET_T1_4 0x1e10 -#define PP_CUBIC_OFFSET_T2_0 0x1e14 -#define PP_CUBIC_OFFSET_T2_1 0x1e18 -#define PP_CUBIC_OFFSET_T2_2 0x1e1c -#define PP_CUBIC_OFFSET_T2_3 0x1e20 -#define PP_CUBIC_OFFSET_T2_4 0x1e24 - -#define PP_TEX_SIZE_0 0x1d04 /* NPOT */ -#define PP_TEX_SIZE_1 0x1d0c -#define PP_TEX_SIZE_2 0x1d14 -#define TEX_USIZE_MASK (0x7ff << 0) -#define TEX_USIZE_SHIFT 0 -#define TEX_VSIZE_MASK (0x7ff << 16) -#define TEX_VSIZE_SHIFT 16 -#define SIGNED_RGB_MASK (1 << 30) -#define SIGNED_RGB_SHIFT 30 -#define SIGNED_ALPHA_MASK (1 << 31) -#define SIGNED_ALPHA_SHIFT 31 -#define PP_TEX_PITCH_0 0x1d08 /* NPOT */ -#define PP_TEX_PITCH_1 0x1d10 /* NPOT */ -#define PP_TEX_PITCH_2 0x1d18 /* NPOT */ -/* note: bits 13-5: 32 byte aligned stride of texture map */ - -#define PP_TXCBLEND_0 0x1c60 -#define PP_TXCBLEND_1 0x1c78 -#define PP_TXCBLEND_2 0x1c90 -#define COLOR_ARG_A_SHIFT 0 -#define COLOR_ARG_A_MASK (0x1f << 0) -#define COLOR_ARG_A_ZERO (0 << 0) -#define COLOR_ARG_A_CURRENT_COLOR (2 << 0) -#define COLOR_ARG_A_CURRENT_ALPHA (3 << 0) -#define COLOR_ARG_A_DIFFUSE_COLOR (4 << 0) -#define COLOR_ARG_A_DIFFUSE_ALPHA (5 << 0) -#define COLOR_ARG_A_SPECULAR_COLOR (6 << 0) -#define COLOR_ARG_A_SPECULAR_ALPHA (7 << 0) -#define COLOR_ARG_A_TFACTOR_COLOR (8 << 0) -#define COLOR_ARG_A_TFACTOR_ALPHA (9 << 0) -#define COLOR_ARG_A_T0_COLOR (10 << 0) -#define COLOR_ARG_A_T0_ALPHA (11 << 0) -#define COLOR_ARG_A_T1_COLOR (12 << 0) -#define COLOR_ARG_A_T1_ALPHA (13 << 0) -#define COLOR_ARG_A_T2_COLOR (14 << 0) -#define COLOR_ARG_A_T2_ALPHA (15 << 0) -#define COLOR_ARG_A_T3_COLOR (16 << 0) -#define COLOR_ARG_A_T3_ALPHA (17 << 0) -#define COLOR_ARG_B_SHIFT 5 -#define COLOR_ARG_B_MASK (0x1f << 5) -#define COLOR_ARG_B_ZERO (0 << 5) -#define COLOR_ARG_B_CURRENT_COLOR (2 << 5) -#define COLOR_ARG_B_CURRENT_ALPHA (3 << 5) -#define COLOR_ARG_B_DIFFUSE_COLOR (4 << 5) -#define COLOR_ARG_B_DIFFUSE_ALPHA (5 << 5) -#define COLOR_ARG_B_SPECULAR_COLOR (6 << 5) -#define COLOR_ARG_B_SPECULAR_ALPHA (7 << 5) -#define COLOR_ARG_B_TFACTOR_COLOR (8 << 5) -#define COLOR_ARG_B_TFACTOR_ALPHA (9 << 5) -#define COLOR_ARG_B_T0_COLOR (10 << 5) -#define COLOR_ARG_B_T0_ALPHA (11 << 5) -#define COLOR_ARG_B_T1_COLOR (12 << 5) -#define COLOR_ARG_B_T1_ALPHA (13 << 5) -#define COLOR_ARG_B_T2_COLOR (14 << 5) -#define COLOR_ARG_B_T2_ALPHA (15 << 5) -#define COLOR_ARG_B_T3_COLOR (16 << 5) -#define COLOR_ARG_B_T3_ALPHA (17 << 5) -#define COLOR_ARG_C_SHIFT 10 -#define COLOR_ARG_C_MASK (0x1f << 10) -#define COLOR_ARG_C_ZERO (0 << 10) -#define COLOR_ARG_C_CURRENT_COLOR (2 << 10) -#define COLOR_ARG_C_CURRENT_ALPHA (3 << 10) -#define COLOR_ARG_C_DIFFUSE_COLOR (4 << 10) -#define COLOR_ARG_C_DIFFUSE_ALPHA (5 << 10) -#define COLOR_ARG_C_SPECULAR_COLOR (6 << 10) -#define COLOR_ARG_C_SPECULAR_ALPHA (7 << 10) -#define COLOR_ARG_C_TFACTOR_COLOR (8 << 10) -#define COLOR_ARG_C_TFACTOR_ALPHA (9 << 10) -#define COLOR_ARG_C_T0_COLOR (10 << 10) -#define COLOR_ARG_C_T0_ALPHA (11 << 10) -#define COLOR_ARG_C_T1_COLOR (12 << 10) -#define COLOR_ARG_C_T1_ALPHA (13 << 10) -#define COLOR_ARG_C_T2_COLOR (14 << 10) -#define COLOR_ARG_C_T2_ALPHA (15 << 10) -#define COLOR_ARG_C_T3_COLOR (16 << 10) -#define COLOR_ARG_C_T3_ALPHA (17 << 10) -#define COMP_ARG_A (1 << 15) -#define COMP_ARG_A_SHIFT 15 -#define COMP_ARG_B (1 << 16) -#define COMP_ARG_B_SHIFT 16 -#define COMP_ARG_C (1 << 17) -#define COMP_ARG_C_SHIFT 17 -#define BLEND_CTL_MASK (7 << 18) -#define BLEND_CTL_ADD (0 << 18) -#define BLEND_CTL_SUBTRACT (1 << 18) -#define BLEND_CTL_ADDSIGNED (2 << 18) -#define BLEND_CTL_BLEND (3 << 18) -#define BLEND_CTL_DOT3 (4 << 18) -#define SCALE_SHIFT 21 -#define SCALE_MASK (3 << 21) -#define SCALE_1X (0 << 21) -#define SCALE_2X (1 << 21) -#define SCALE_4X (2 << 21) -#define CLAMP_TX (1 << 23) -#define T0_EQ_TCUR (1 << 24) -#define T1_EQ_TCUR (1 << 25) -#define T2_EQ_TCUR (1 << 26) -#define T3_EQ_TCUR (1 << 27) -#define COLOR_ARG_MASK 0x1f -#define COMP_ARG_SHIFT 15 -#define PP_TXABLEND_0 0x1c64 -#define PP_TXABLEND_1 0x1c7c -#define PP_TXABLEND_2 0x1c94 -#define ALPHA_ARG_A_SHIFT 0 -#define ALPHA_ARG_A_MASK (0xf << 0) -#define ALPHA_ARG_A_ZERO (0 << 0) -#define ALPHA_ARG_A_CURRENT_ALPHA (1 << 0) -#define ALPHA_ARG_A_DIFFUSE_ALPHA (2 << 0) -#define ALPHA_ARG_A_SPECULAR_ALPHA (3 << 0) -#define ALPHA_ARG_A_TFACTOR_ALPHA (4 << 0) -#define ALPHA_ARG_A_T0_ALPHA (5 << 0) -#define ALPHA_ARG_A_T1_ALPHA (6 << 0) -#define ALPHA_ARG_A_T2_ALPHA (7 << 0) -#define ALPHA_ARG_A_T3_ALPHA (8 << 0) -#define ALPHA_ARG_B_SHIFT 4 -#define ALPHA_ARG_B_MASK (0xf << 4) -#define ALPHA_ARG_B_ZERO (0 << 4) -#define ALPHA_ARG_B_CURRENT_ALPHA (1 << 4) -#define ALPHA_ARG_B_DIFFUSE_ALPHA (2 << 4) -#define ALPHA_ARG_B_SPECULAR_ALPHA (3 << 4) -#define ALPHA_ARG_B_TFACTOR_ALPHA (4 << 4) -#define ALPHA_ARG_B_T0_ALPHA (5 << 4) -#define ALPHA_ARG_B_T1_ALPHA (6 << 4) -#define ALPHA_ARG_B_T2_ALPHA (7 << 4) -#define ALPHA_ARG_B_T3_ALPHA (8 << 4) -#define ALPHA_ARG_C_SHIFT 8 -#define ALPHA_ARG_C_MASK (0xf << 8) -#define ALPHA_ARG_C_ZERO (0 << 8) -#define ALPHA_ARG_C_CURRENT_ALPHA (1 << 8) -#define ALPHA_ARG_C_DIFFUSE_ALPHA (2 << 8) -#define ALPHA_ARG_C_SPECULAR_ALPHA (3 << 8) -#define ALPHA_ARG_C_TFACTOR_ALPHA (4 << 8) -#define ALPHA_ARG_C_T0_ALPHA (5 << 8) -#define ALPHA_ARG_C_T1_ALPHA (6 << 8) -#define ALPHA_ARG_C_T2_ALPHA (7 << 8) -#define ALPHA_ARG_C_T3_ALPHA (8 << 8) -#define DOT_ALPHA_DONT_REPLICATE (1 << 9) -#define ALPHA_ARG_MASK 0xf - -#define PP_TFACTOR_0 0x1c68 -#define PP_TFACTOR_1 0x1c80 -#define PP_TFACTOR_2 0x1c98 - -#define RB3D_BLENDCNTL 0x1c20 -#define COMB_FCN_MASK (3 << 12) -#define COMB_FCN_ADD_CLAMP (0 << 12) -#define COMB_FCN_ADD_NOCLAMP (1 << 12) -#define COMB_FCN_SUB_CLAMP (2 << 12) -#define COMB_FCN_SUB_NOCLAMP (3 << 12) -#define SRC_BLEND_GL_ZERO (32 << 16) -#define SRC_BLEND_GL_ONE (33 << 16) -#define SRC_BLEND_GL_SRC_COLOR (34 << 16) -#define SRC_BLEND_GL_ONE_MINUS_SRC_COLOR (35 << 16) -#define SRC_BLEND_GL_DST_COLOR (36 << 16) -#define SRC_BLEND_GL_ONE_MINUS_DST_COLOR (37 << 16) -#define SRC_BLEND_GL_SRC_ALPHA (38 << 16) -#define SRC_BLEND_GL_ONE_MINUS_SRC_ALPHA (39 << 16) -#define SRC_BLEND_GL_DST_ALPHA (40 << 16) -#define SRC_BLEND_GL_ONE_MINUS_DST_ALPHA (41 << 16) -#define SRC_BLEND_GL_SRC_ALPHA_SATURATE (42 << 16) -#define SRC_BLEND_MASK (63 << 16) -#define DST_BLEND_GL_ZERO (32 << 24) -#define DST_BLEND_GL_ONE (33 << 24) -#define DST_BLEND_GL_SRC_COLOR (34 << 24) -#define DST_BLEND_GL_ONE_MINUS_SRC_COLOR (35 << 24) -#define DST_BLEND_GL_DST_COLOR (36 << 24) -#define DST_BLEND_GL_ONE_MINUS_DST_COLOR (37 << 24) -#define DST_BLEND_GL_SRC_ALPHA (38 << 24) -#define DST_BLEND_GL_ONE_MINUS_SRC_ALPHA (39 << 24) -#define DST_BLEND_GL_DST_ALPHA (40 << 24) -#define DST_BLEND_GL_ONE_MINUS_DST_ALPHA (41 << 24) -#define DST_BLEND_MASK (63 << 24) -#define RB3D_CNTL 0x1C3C -#define ALPHA_BLEND_ENABLE (1 << 0) -#define PLANE_MASK_ENABLE (1 << 1) -#define DITHER_ENABLE (1 << 2) -#define ROUND_ENABLE (1 << 3) -#define SCALE_DITHER_ENABLE (1 << 4) -#define DITHER_INIT (1 << 5) -#define ROP_ENABLE (1 << 6) -#define STENCIL_ENABLE (1 << 7) -#define Z_ENABLE (1 << 8) -#define DEPTH_XZ_OFFEST_ENABLE (1 << 9) -#define COLOR_FORMAT_ARGB1555 (3 << 10) -#define COLOR_FORMAT_RGB565 (4 << 10) -#define COLOR_FORMAT_ARGB8888 (6 << 10) -#define COLOR_FORMAT_RGB332 (7 << 10) -#define COLOR_FORMAT_Y8 (8 << 10) -#define COLOR_FORMAT_RGB8 (9 << 10) -#define COLOR_FORMAT_YUV422_VYUY (11 << 10) -#define COLOR_FORMAT_YUV422_YVYU (12 << 10) -#define COLOR_FORMAT_aYUV444 (14 << 10) -#define COLOR_FORMAT_ARGB4444 (15 << 10) -#define CLRCMP_FLIP_ENABLE (1 << 14) -#define RB3D_COLOROFFSET 0x1c40 -#define COLOROFFSET_MASK 0xfffffff0 -#define RB3D_COLORPITCH 0x1c48 -#define COLORPITCH_MASK 0x000001ff8 -#define COLOR_TILE_ENABLE (1 << 16) -#define COLOR_MICROTILE_ENABLE (1 << 17) -#define COLOR_ENDIAN_NO_SWAP (0 << 18) -#define COLOR_ENDIAN_WORD_SWAP (1 << 18) -#define COLOR_ENDIAN_DWORD_SWAP (2 << 18) -#define RB3D_DEPTHOFFSET 0x1c24 -#define RB3D_DEPTHPITCH 0x1c28 -#define DEPTHPITCH_MASK 0x00001ff8 -#define DEPTH_ENDIAN_NO_SWAP (0 << 18) -#define DEPTH_ENDIAN_WORD_SWAP (1 << 18) -#define DEPTH_ENDIAN_DWORD_SWAP (2 << 18) -#define RB3D_PLANEMASK 0x1d84 -#define RB3D_ROPCNTL 0x1d80 -#define ROP_MASK (15 << 8) -#define ROP_CLEAR (0 << 8) -#define ROP_NOR (1 << 8) -#define ROP_AND_INVERTED (2 << 8) -#define ROP_COPY_INVERTED (3 << 8) -#define ROP_AND_REVERSE (4 << 8) -#define ROP_INVERT (5 << 8) -#define ROP_XOR (6 << 8) -#define ROP_NAND (7 << 8) -#define ROP_AND (8 << 8) -#define ROP_EQUIV (9 << 8) -#define ROP_NOOP (10 << 8) -#define ROP_OR_INVERTED (11 << 8) -#define ROP_COPY (12 << 8) -#define ROP_OR_REVERSE (13 << 8) -#define ROP_OR (14 << 8) -#define ROP_SET (15 << 8) -#define RB3D_STENCILREFMASK 0x1d7c -#define STENCIL_REF_SHIFT 0 -#define STENCIL_REF_MASK (0xff << 0) -#define STENCIL_MASK_SHIFT 16 -#define STENCIL_VALUE_MASK (0xff << 16) -#define STENCIL_WRITEMASK_SHIFT 24 -#define STENCIL_WRITE_MASK (0xff << 24) -#define RB3D_ZSTENCILCNTL 0x1c2c -#define DEPTH_FORMAT_MASK (0xf << 0) -#define DEPTH_FORMAT_16BIT_INT_Z (0 << 0) -#define DEPTH_FORMAT_24BIT_INT_Z (2 << 0) -#define DEPTH_FORMAT_24BIT_FLOAT_Z (3 << 0) -#define DEPTH_FORMAT_32BIT_INT_Z (4 << 0) -#define DEPTH_FORMAT_32BIT_FLOAT_Z (5 << 0) -#define DEPTH_FORMAT_16BIT_FLOAT_W (7 << 0) -#define DEPTH_FORMAT_24BIT_FLOAT_W (9 << 0) -#define DEPTH_FORMAT_32BIT_FLOAT_W (11 << 0) -#define Z_TEST_NEVER (0 << 4) -#define Z_TEST_LESS (1 << 4) -#define Z_TEST_LEQUAL (2 << 4) -#define Z_TEST_EQUAL (3 << 4) -#define Z_TEST_GEQUAL (4 << 4) -#define Z_TEST_GREATER (5 << 4) -#define Z_TEST_NEQUAL (6 << 4) -#define Z_TEST_ALWAYS (7 << 4) -#define Z_TEST_MASK (7 << 4) -#define STENCIL_TEST_NEVER (0 << 12) -#define STENCIL_TEST_LESS (1 << 12) -#define STENCIL_TEST_LEQUAL (2 << 12) -#define STENCIL_TEST_EQUAL (3 << 12) -#define STENCIL_TEST_GEQUAL (4 << 12) -#define STENCIL_TEST_GREATER (5 << 12) -#define STENCIL_TEST_NEQUAL (6 << 12) -#define STENCIL_TEST_ALWAYS (7 << 12) -#define STENCIL_TEST_MASK (0x7 << 12) -#define STENCIL_FAIL_KEEP (0 << 16) -#define STENCIL_FAIL_ZERO (1 << 16) -#define STENCIL_FAIL_REPLACE (2 << 16) -#define STENCIL_FAIL_INC (3 << 16) -#define STENCIL_FAIL_DEC (4 << 16) -#define STENCIL_FAIL_INVERT (5 << 16) -#define STENCIL_FAIL_MASK (0x7 << 16) -#define STENCIL_ZPASS_KEEP (0 << 20) -#define STENCIL_ZPASS_ZERO (1 << 20) -#define STENCIL_ZPASS_REPLACE (2 << 20) -#define STENCIL_ZPASS_INC (3 << 20) -#define STENCIL_ZPASS_DEC (4 << 20) -#define STENCIL_ZPASS_INVERT (5 << 20) -#define STENCIL_ZPASS_MASK (0x7 << 20) -#define STENCIL_ZFAIL_KEEP (0 << 24) -#define STENCIL_ZFAIL_ZERO (1 << 24) -#define STENCIL_ZFAIL_REPLACE (2 << 24) -#define STENCIL_ZFAIL_INC (3 << 24) -#define STENCIL_ZFAIL_DEC (4 << 24) -#define STENCIL_ZFAIL_INVERT (5 << 24) -#define STENCIL_ZFAIL_MASK (0x7 << 24) -#define Z_COMPRESSION_ENABLE (1 << 28) -#define FORCE_Z_DIRTY (1 << 29) -#define Z_WRITE_ENABLE (1 << 30) -#define RE_LINE_PATTERN 0x1cd0 -#define LINE_PATTERN_MASK 0x0000ffff -#define LINE_REPEAT_COUNT_SHIFT 16 -#define LINE_PATTERN_START_SHIFT 24 -#define LINE_PATTERN_LITTLE_BIT_ORDER (0 << 28) -#define LINE_PATTERN_BIG_BIT_ORDER (1 << 28) -#define LINE_PATTERN_AUTO_RESET (1 << 29) -#define RE_LINE_STATE 0x1cd4 -#define LINE_CURRENT_PTR_SHIFT 0 -#define LINE_CURRENT_COUNT_SHIFT 8 -#define RE_MISC 0x26c4 -#define STIPPLE_COORD_MASK 0x1f -#define STIPPLE_X_OFFSET_SHIFT 0 -#define STIPPLE_X_OFFSET_MASK (0x1f << 0) -#define STIPPLE_Y_OFFSET_SHIFT 8 -#define STIPPLE_Y_OFFSET_MASK (0x1f << 8) -#define STIPPLE_LITTLE_BIT_ORDER (0 << 16) -#define STIPPLE_BIG_BIT_ORDER (1 << 16) -#define RE_SOLID_COLOR 0x1c1c -#define RE_TOP_LEFT 0x26c0 -#define RE_LEFT_SHIFT 0 -#define RE_TOP_SHIFT 16 -#define RE_WIDTH_HEIGHT 0x1c44 -#define RE_WIDTH_SHIFT 0 -#define RE_HEIGHT_SHIFT 16 - -#define SE_CNTL 0x1c4c -#define FFACE_CULL_CW (0 << 0) -#define FFACE_CULL_CCW (1 << 0) -#define FFACE_CULL_DIR_MASK (1 << 0) -#define BFACE_CULL (0 << 1) -#define BFACE_SOLID (3 << 1) -#define FFACE_CULL (0 << 3) -#define FFACE_SOLID (3 << 3) -#define FFACE_CULL_MASK (3 << 3) -#define BADVTX_CULL_DISABLE (1 << 5) -#define FLAT_SHADE_VTX_0 (0 << 6) -#define FLAT_SHADE_VTX_1 (1 << 6) -#define FLAT_SHADE_VTX_2 (2 << 6) -#define FLAT_SHADE_VTX_LAST (3 << 6) -#define DIFFUSE_SHADE_SOLID (0 << 8) -#define DIFFUSE_SHADE_FLAT (1 << 8) -#define DIFFUSE_SHADE_GOURAUD (2 << 8) -#define DIFFUSE_SHADE_MASK (3 << 8) -#define ALPHA_SHADE_SOLID (0 << 10) -#define ALPHA_SHADE_FLAT (1 << 10) -#define ALPHA_SHADE_GOURAUD (2 << 10) -#define ALPHA_SHADE_MASK (3 << 10) -#define SPECULAR_SHADE_SOLID (0 << 12) -#define SPECULAR_SHADE_FLAT (1 << 12) -#define SPECULAR_SHADE_GOURAUD (2 << 12) -#define SPECULAR_SHADE_MASK (3 << 12) -#define FOG_SHADE_SOLID (0 << 14) -#define FOG_SHADE_FLAT (1 << 14) -#define FOG_SHADE_GOURAUD (2 << 14) -#define FOG_SHADE_MASK (3 << 14) -#define ZBIAS_ENABLE_POINT (1 << 16) -#define ZBIAS_ENABLE_LINE (1 << 17) -#define ZBIAS_ENABLE_TRI (1 << 18) -#define WIDELINE_ENABLE (1 << 20) -#define VPORT_XY_XFORM_ENABLE (1 << 24) -#define VPORT_Z_XFORM_ENABLE (1 << 25) -#define VTX_PIX_CENTER_D3D (0 << 27) -#define VTX_PIX_CENTER_OGL (1 << 27) -#define ROUND_MODE_TRUNC (0 << 28) -#define ROUND_MODE_ROUND (1 << 28) -#define ROUND_MODE_ROUND_EVEN (2 << 28) -#define ROUND_MODE_ROUND_ODD (3 << 28) -#define ROUND_PREC_16TH_PIX (0 << 30) -#define ROUND_PREC_8TH_PIX (1 << 30) -#define ROUND_PREC_4TH_PIX (2 << 30) -#define ROUND_PREC_HALF_PIX (3 << 30) -#define R200_RE_CNTL 0x1c50 -#define R200_STIPPLE_ENABLE 0x1 -#define R200_SCISSOR_ENABLE 0x2 -#define R200_PATTERN_ENABLE 0x4 -#define R200_PERSPECTIVE_ENABLE 0x8 -#define R200_POINT_SMOOTH 0x20 -#define R200_VTX_STQ0_D3D 0x00010000 -#define R200_VTX_STQ1_D3D 0x00040000 -#define R200_VTX_STQ2_D3D 0x00100000 -#define R200_VTX_STQ3_D3D 0x00400000 -#define R200_VTX_STQ4_D3D 0x01000000 -#define R200_VTX_STQ5_D3D 0x04000000 -#define SE_CNTL_STATUS 0x2140 -#define VC_NO_SWAP (0 << 0) -#define VC_16BIT_SWAP (1 << 0) -#define VC_32BIT_SWAP (2 << 0) -#define VC_HALF_DWORD_SWAP (3 << 0) -#define TCL_BYPASS (1 << 8) -#define SE_COORD_FMT 0x1c50 -#define VTX_XY_PRE_MULT_1_OVER_W0 (1 << 0) -#define VTX_Z_PRE_MULT_1_OVER_W0 (1 << 1) -#define VTX_ST0_NONPARAMETRIC (1 << 8) -#define VTX_ST1_NONPARAMETRIC (1 << 9) -#define VTX_ST2_NONPARAMETRIC (1 << 10) -#define VTX_ST3_NONPARAMETRIC (1 << 11) -#define VTX_W0_NORMALIZE (1 << 12) -#define VTX_W0_IS_NOT_1_OVER_W0 (1 << 16) -#define VTX_ST0_PRE_MULT_1_OVER_W0 (1 << 17) -#define VTX_ST1_PRE_MULT_1_OVER_W0 (1 << 19) -#define VTX_ST2_PRE_MULT_1_OVER_W0 (1 << 21) -#define VTX_ST3_PRE_MULT_1_OVER_W0 (1 << 23) -#define TEX1_W_ROUTING_USE_W0 (0 << 26) -#define TEX1_W_ROUTING_USE_Q1 (1 << 26) -#define SE_LINE_WIDTH 0x1db8 -#define SE_TCL_LIGHT_MODEL_CTL 0x226c -#define LIGHTING_ENABLE (1 << 0) -#define LIGHT_IN_MODELSPACE (1 << 1) -#define LOCAL_VIEWER (1 << 2) -#define NORMALIZE_NORMALS (1 << 3) -#define RESCALE_NORMALS (1 << 4) -#define SPECULAR_LIGHTS (1 << 5) -#define DIFFUSE_SPECULAR_COMBINE (1 << 6) -#define LIGHT_ALPHA (1 << 7) -#define LOCAL_LIGHT_VEC_GL (1 << 8) -#define LIGHT_NO_NORMAL_AMBIENT_ONLY (1 << 9) -#define LM_SOURCE_STATE_PREMULT 0 -#define LM_SOURCE_STATE_MULT 1 -#define LM_SOURCE_VERTEX_DIFFUSE 2 -#define LM_SOURCE_VERTEX_SPECULAR 3 -#define EMISSIVE_SOURCE_SHIFT 16 -#define AMBIENT_SOURCE_SHIFT 18 -#define DIFFUSE_SOURCE_SHIFT 20 -#define SPECULAR_SOURCE_SHIFT 22 -#define SE_TCL_MATERIAL_AMBIENT_RED 0x2220 -#define SE_TCL_MATERIAL_AMBIENT_GREEN 0x2224 -#define SE_TCL_MATERIAL_AMBIENT_BLUE 0x2228 -#define SE_TCL_MATERIAL_AMBIENT_ALPHA 0x222c -#define SE_TCL_MATERIAL_DIFFUSE_RED 0x2230 -#define SE_TCL_MATERIAL_DIFFUSE_GREEN 0x2234 -#define SE_TCL_MATERIAL_DIFFUSE_BLUE 0x2238 -#define SE_TCL_MATERIAL_DIFFUSE_ALPHA 0x223c -#define SE_TCL_MATERIAL_EMMISSIVE_RED 0x2210 -#define SE_TCL_MATERIAL_EMMISSIVE_GREEN 0x2214 -#define SE_TCL_MATERIAL_EMMISSIVE_BLUE 0x2218 -#define SE_TCL_MATERIAL_EMMISSIVE_ALPHA 0x221c -#define SE_TCL_MATERIAL_SPECULAR_RED 0x2240 -#define SE_TCL_MATERIAL_SPECULAR_GREEN 0x2244 -#define SE_TCL_MATERIAL_SPECULAR_BLUE 0x2248 -#define SE_TCL_MATERIAL_SPECULAR_ALPHA 0x224c -#define SE_TCL_MATRIX_SELECT_0 0x225c -#define MODELVIEW_0_SHIFT 0 -#define MODELVIEW_1_SHIFT 4 -#define MODELVIEW_2_SHIFT 8 -#define MODELVIEW_3_SHIFT 12 -#define IT_MODELVIEW_0_SHIFT 16 -#define IT_MODELVIEW_1_SHIFT 20 -#define IT_MODELVIEW_2_SHIFT 24 -#define IT_MODELVIEW_3_SHIFT 28 -#define SE_TCL_MATRIX_SELECT_1 0x2260 -#define MODELPROJECT_0_SHIFT 0 -#define MODELPROJECT_1_SHIFT 4 -#define MODELPROJECT_2_SHIFT 8 -#define MODELPROJECT_3_SHIFT 12 -#define TEXMAT_0_SHIFT 16 -#define TEXMAT_1_SHIFT 20 -#define TEXMAT_2_SHIFT 24 -#define TEXMAT_3_SHIFT 28 - -#define SE_TCL_OUTPUT_VTX_FMT 0x2254 -#define TCL_VTX_W0 (1 << 0) -#define TCL_VTX_FP_DIFFUSE (1 << 1) -#define TCL_VTX_FP_ALPHA (1 << 2) -#define TCL_VTX_PK_DIFFUSE (1 << 3) -#define TCL_VTX_FP_SPEC (1 << 4) -#define TCL_VTX_FP_FOG (1 << 5) -#define TCL_VTX_PK_SPEC (1 << 6) -#define TCL_VTX_ST0 (1 << 7) -#define TCL_VTX_ST1 (1 << 8) -#define TCL_VTX_Q1 (1 << 9) -#define TCL_VTX_ST2 (1 << 10) -#define TCL_VTX_Q2 (1 << 11) -#define TCL_VTX_ST3 (1 << 12) -#define TCL_VTX_Q3 (1 << 13) -#define TCL_VTX_Q0 (1 << 14) -#define TCL_VTX_WEIGHT_COUNT_SHIFT 15 -#define TCL_VTX_NORM0 (1 << 18) -#define TCL_VTX_XY1 (1 << 27) -#define TCL_VTX_Z1 (1 << 28) -#define TCL_VTX_W1 (1 << 29) -#define TCL_VTX_NORM1 (1 << 30) -#define TCL_VTX_Z0 (1 << 31) - -#define SE_TCL_OUTPUT_VTX_SEL 0x2258 -#define TCL_COMPUTE_XYZW (1 << 0) -#define TCL_COMPUTE_DIFFUSE (1 << 1) -#define TCL_COMPUTE_SPECULAR (1 << 2) -#define TCL_FORCE_NAN_IF_COLOR_NAN (1 << 3) -#define TCL_FORCE_INORDER_PROC (1 << 4) -#define TCL_TEX_INPUT_TEX_0 0 -#define TCL_TEX_INPUT_TEX_1 1 -#define TCL_TEX_INPUT_TEX_2 2 -#define TCL_TEX_INPUT_TEX_3 3 -#define TCL_TEX_COMPUTED_TEX_0 8 -#define TCL_TEX_COMPUTED_TEX_1 9 -#define TCL_TEX_COMPUTED_TEX_2 10 -#define TCL_TEX_COMPUTED_TEX_3 11 -#define TCL_TEX_0_OUTPUT_SHIFT 16 -#define TCL_TEX_1_OUTPUT_SHIFT 20 -#define TCL_TEX_2_OUTPUT_SHIFT 24 -#define TCL_TEX_3_OUTPUT_SHIFT 28 - -#define SE_TCL_PER_LIGHT_CTL_0 0x2270 -#define LIGHT_0_ENABLE (1 << 0) -#define LIGHT_0_ENABLE_AMBIENT (1 << 1) -#define LIGHT_0_ENABLE_SPECULAR (1 << 2) -#define LIGHT_0_IS_LOCAL (1 << 3) -#define LIGHT_0_IS_SPOT (1 << 4) -#define LIGHT_0_DUAL_CONE (1 << 5) -#define LIGHT_0_ENABLE_RANGE_ATTEN (1 << 6) -#define LIGHT_0_CONSTANT_RANGE_ATTEN (1 << 7) -#define LIGHT_0_SHIFT 0 -#define LIGHT_1_ENABLE (1 << 16) -#define LIGHT_1_ENABLE_AMBIENT (1 << 17) -#define LIGHT_1_ENABLE_SPECULAR (1 << 18) -#define LIGHT_1_IS_LOCAL (1 << 19) -#define LIGHT_1_IS_SPOT (1 << 20) -#define LIGHT_1_DUAL_CONE (1 << 21) -#define LIGHT_1_ENABLE_RANGE_ATTEN (1 << 22) -#define LIGHT_1_CONSTANT_RANGE_ATTEN (1 << 23) -#define LIGHT_1_SHIFT 16 -#define SE_TCL_PER_LIGHT_CTL_1 0x2274 -#define LIGHT_2_SHIFT 0 -#define LIGHT_3_SHIFT 16 -#define SE_TCL_PER_LIGHT_CTL_2 0x2278 -#define LIGHT_4_SHIFT 0 -#define LIGHT_5_SHIFT 16 -#define SE_TCL_PER_LIGHT_CTL_3 0x227c -#define LIGHT_6_SHIFT 0 -#define LIGHT_7_SHIFT 16 - -#define SE_TCL_SHININESS 0x2250 - -#define SE_TCL_TEXTURE_PROC_CTL 0x2268 -#define TEXGEN_TEXMAT_0_ENABLE (1 << 0) -#define TEXGEN_TEXMAT_1_ENABLE (1 << 1) -#define TEXGEN_TEXMAT_2_ENABLE (1 << 2) -#define TEXGEN_TEXMAT_3_ENABLE (1 << 3) -#define TEXMAT_0_ENABLE (1 << 4) -#define TEXMAT_1_ENABLE (1 << 5) -#define TEXMAT_2_ENABLE (1 << 6) -#define TEXMAT_3_ENABLE (1 << 7) -#define TEXGEN_INPUT_MASK 0xf -#define TEXGEN_INPUT_TEXCOORD_0 0 -#define TEXGEN_INPUT_TEXCOORD_1 1 -#define TEXGEN_INPUT_TEXCOORD_2 2 -#define TEXGEN_INPUT_TEXCOORD_3 3 -#define TEXGEN_INPUT_OBJ 4 -#define TEXGEN_INPUT_EYE 5 -#define TEXGEN_INPUT_EYE_NORMAL 6 -#define TEXGEN_INPUT_EYE_REFLECT 7 -#define TEXGEN_INPUT_EYE_NORMALIZED 8 -#define TEXGEN_0_INPUT_SHIFT 16 -#define TEXGEN_1_INPUT_SHIFT 20 -#define TEXGEN_2_INPUT_SHIFT 24 -#define TEXGEN_3_INPUT_SHIFT 28 - -#define SE_TCL_UCP_VERT_BLEND_CTL 0x2264 -#define UCP_IN_CLIP_SPACE (1 << 0) -#define UCP_IN_MODEL_SPACE (1 << 1) -#define UCP_ENABLE_0 (1 << 2) -#define UCP_ENABLE_1 (1 << 3) -#define UCP_ENABLE_2 (1 << 4) -#define UCP_ENABLE_3 (1 << 5) -#define UCP_ENABLE_4 (1 << 6) -#define UCP_ENABLE_5 (1 << 7) -#define TCL_FOG_MASK (3 << 8) -#define TCL_FOG_DISABLE (0 << 8) -#define TCL_FOG_EXP (1 << 8) -#define TCL_FOG_EXP2 (2 << 8) -#define TCL_FOG_LINEAR (3 << 8) -#define RNG_BASED_FOG (1 << 10) -#define LIGHT_TWOSIDE (1 << 11) -#define BLEND_OP_COUNT_MASK (7 << 12) -#define BLEND_OP_COUNT_SHIFT 12 -#define POSITION_BLEND_OP_ENABLE (1 << 16) -#define NORMAL_BLEND_OP_ENABLE (1 << 17) -#define VERTEX_BLEND_SRC_0_PRIMARY (1 << 18) -#define VERTEX_BLEND_SRC_0_SECONDARY (1 << 18) -#define VERTEX_BLEND_SRC_1_PRIMARY (1 << 19) -#define VERTEX_BLEND_SRC_1_SECONDARY (1 << 19) -#define VERTEX_BLEND_SRC_2_PRIMARY (1 << 20) -#define VERTEX_BLEND_SRC_2_SECONDARY (1 << 20) -#define VERTEX_BLEND_SRC_3_PRIMARY (1 << 21) -#define VERTEX_BLEND_SRC_3_SECONDARY (1 << 21) -#define VERTEX_BLEND_WGT_MINUS_ONE (1 << 22) -#define CULL_FRONT_IS_CW (0 << 28) -#define CULL_FRONT_IS_CCW (1 << 28) -#define CULL_FRONT (1 << 29) -#define CULL_BACK (1 << 30) -#define FORCE_W_TO_ONE (1 << 31) - -#define SE_VPORT_XSCALE 0x1d98 -#define SE_VPORT_XOFFSET 0x1d9c -#define SE_VPORT_YSCALE 0x1da0 -#define SE_VPORT_YOFFSET 0x1da4 -#define SE_VPORT_ZSCALE 0x1da8 -#define SE_VPORT_ZOFFSET 0x1dac -#define SE_ZBIAS_FACTOR 0x1db0 -#define SE_ZBIAS_CONSTANT 0x1db4 - -#define SE_VTX_FMT 0x2080 -#define SE_VTX_FMT_XY 0x00000000 -#define SE_VTX_FMT_W0 0x00000001 -#define SE_VTX_FMT_FPCOLOR 0x00000002 -#define SE_VTX_FMT_FPALPHA 0x00000004 -#define SE_VTX_FMT_PKCOLOR 0x00000008 -#define SE_VTX_FMT_FPSPEC 0x00000010 -#define SE_VTX_FMT_FPFOG 0x00000020 -#define SE_VTX_FMT_PKSPEC 0x00000040 -#define SE_VTX_FMT_ST0 0x00000080 -#define SE_VTX_FMT_ST1 0x00000100 -#define SE_VTX_FMT_Q1 0x00000200 -#define SE_VTX_FMT_ST2 0x00000400 -#define SE_VTX_FMT_Q2 0x00000800 -#define SE_VTX_FMT_ST3 0x00001000 -#define SE_VTX_FMT_Q3 0x00002000 -#define SE_VTX_FMT_Q0 0x00004000 -#define SE_VTX_FMT_BLND_WEIGHT_CNT_MASK 0x00038000 -#define SE_VTX_FMT_N0 0x00040000 -#define SE_VTX_FMT_XY1 0x08000000 -#define SE_VTX_FMT_Z1 0x10000000 -#define SE_VTX_FMT_W1 0x20000000 -#define SE_VTX_FMT_N1 0x40000000 -#define SE_VTX_FMT_Z 0x80000000 - -#define SE_VF_CNTL 0x2084 -#define VF_PRIM_TYPE_POINT_LIST 1 -#define VF_PRIM_TYPE_LINE_LIST 2 -#define VF_PRIM_TYPE_LINE_STRIP 3 -#define VF_PRIM_TYPE_TRIANGLE_LIST 4 -#define VF_PRIM_TYPE_TRIANGLE_FAN 5 -#define VF_PRIM_TYPE_TRIANGLE_STRIP 6 -#define VF_PRIM_TYPE_TRIANGLE_FLAG 7 -#define VF_PRIM_TYPE_RECTANGLE_LIST 8 -#define VF_PRIM_TYPE_POINT_LIST_3 9 -#define VF_PRIM_TYPE_LINE_LIST_3 10 -#define VF_PRIM_TYPE_SPIRIT_LIST 11 -#define VF_PRIM_TYPE_LINE_LOOP 12 -#define VF_PRIM_TYPE_QUAD_LIST 13 -#define VF_PRIM_TYPE_QUAD_STRIP 14 -#define VF_PRIM_TYPE_POLYGON 15 -#define VF_PRIM_WALK_STATE (0<<4) -#define VF_PRIM_WALK_INDEX (1<<4) -#define VF_PRIM_WALK_LIST (2<<4) -#define VF_PRIM_WALK_DATA (3<<4) -#define VF_COLOR_ORDER_RGBA (1<<6) -#define VF_RADEON_MODE (1<<8) -#define VF_TCL_OUTPUT_CTL_ENA (1<<9) -#define VF_PROG_STREAM_ENA (1<<10) -#define VF_INDEX_SIZE_SHIFT 11 -#define VF_NUM_VERTICES_SHIFT 16 - -#define SE_PORT_DATA0 0x2000 - -#define R200_SE_VAP_CNTL 0x2080 -#define R200_VAP_TCL_ENABLE 0x00000001 -#define R200_VAP_SINGLE_BUF_STATE_ENABLE 0x00000010 -#define R200_VAP_FORCE_W_TO_ONE 0x00010000 -#define R200_VAP_D3D_TEX_DEFAULT 0x00020000 -#define R200_VAP_VF_MAX_VTX_NUM__SHIFT 18 -#define R200_VAP_VF_MAX_VTX_NUM (9 << 18) -#define R200_VAP_DX_CLIP_SPACE_DEF 0x00400000 -#define R200_VF_MAX_VTX_INDX 0x210c -#define R200_VF_MIN_VTX_INDX 0x2110 -#define R200_SE_VTE_CNTL 0x20b0 -#define R200_VPORT_X_SCALE_ENA 0x00000001 -#define R200_VPORT_X_OFFSET_ENA 0x00000002 -#define R200_VPORT_Y_SCALE_ENA 0x00000004 -#define R200_VPORT_Y_OFFSET_ENA 0x00000008 -#define R200_VPORT_Z_SCALE_ENA 0x00000010 -#define R200_VPORT_Z_OFFSET_ENA 0x00000020 -#define R200_VTX_XY_FMT 0x00000100 -#define R200_VTX_Z_FMT 0x00000200 -#define R200_VTX_W0_FMT 0x00000400 -#define R200_VTX_W0_NORMALIZE 0x00000800 -#define R200_VTX_ST_DENORMALIZED 0x00001000 -#define R200_SE_VAP_CNTL_STATUS 0x2140 -#define R200_VC_NO_SWAP (0 << 0) -#define R200_VC_16BIT_SWAP (1 << 0) -#define R200_VC_32BIT_SWAP (2 << 0) -#define R200_PP_TXFILTER_0 0x2c00 -#define R200_MAG_FILTER_NEAREST (0 << 0) -#define R200_MAG_FILTER_LINEAR (1 << 0) -#define R200_MAG_FILTER_MASK (1 << 0) -#define R200_MIN_FILTER_NEAREST (0 << 1) -#define R200_MIN_FILTER_LINEAR (1 << 1) -#define R200_MIN_FILTER_NEAREST_MIP_NEAREST (2 << 1) -#define R200_MIN_FILTER_NEAREST_MIP_LINEAR (3 << 1) -#define R200_MIN_FILTER_LINEAR_MIP_NEAREST (6 << 1) -#define R200_MIN_FILTER_LINEAR_MIP_LINEAR (7 << 1) -#define R200_MIN_FILTER_ANISO_NEAREST (8 << 1) -#define R200_MIN_FILTER_ANISO_LINEAR (9 << 1) -#define R200_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (10 << 1) -#define R200_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR (11 << 1) -#define R200_MIN_FILTER_MASK (15 << 1) -#define R200_MAX_ANISO_1_TO_1 (0 << 5) -#define R200_MAX_ANISO_2_TO_1 (1 << 5) -#define R200_MAX_ANISO_4_TO_1 (2 << 5) -#define R200_MAX_ANISO_8_TO_1 (3 << 5) -#define R200_MAX_ANISO_16_TO_1 (4 << 5) -#define R200_MAX_ANISO_MASK (7 << 5) -#define R200_MAX_MIP_LEVEL_MASK (0x0f << 16) -#define R200_MAX_MIP_LEVEL_SHIFT 16 -#define R200_YUV_TO_RGB (1 << 20) -#define R200_YUV_TEMPERATURE_COOL (0 << 21) -#define R200_YUV_TEMPERATURE_HOT (1 << 21) -#define R200_YUV_TEMPERATURE_MASK (1 << 21) -#define R200_WRAPEN_S (1 << 22) -#define R200_CLAMP_S_WRAP (0 << 23) -#define R200_CLAMP_S_MIRROR (1 << 23) -#define R200_CLAMP_S_CLAMP_LAST (2 << 23) -#define R200_CLAMP_S_MIRROR_CLAMP_LAST (3 << 23) -#define R200_CLAMP_S_CLAMP_BORDER (4 << 23) -#define R200_CLAMP_S_MIRROR_CLAMP_BORDER (5 << 23) -#define R200_CLAMP_S_CLAMP_GL (6 << 23) -#define R200_CLAMP_S_MIRROR_CLAMP_GL (7 << 23) -#define R200_CLAMP_S_MASK (7 << 23) -#define R200_WRAPEN_T (1 << 26) -#define R200_CLAMP_T_WRAP (0 << 27) -#define R200_CLAMP_T_MIRROR (1 << 27) -#define R200_CLAMP_T_CLAMP_LAST (2 << 27) -#define R200_CLAMP_T_MIRROR_CLAMP_LAST (3 << 27) -#define R200_CLAMP_T_CLAMP_BORDER (4 << 27) -#define R200_CLAMP_T_MIRROR_CLAMP_BORDER (5 << 27) -#define R200_CLAMP_T_CLAMP_GL (6 << 27) -#define R200_CLAMP_T_MIRROR_CLAMP_GL (7 << 27) -#define R200_CLAMP_T_MASK (7 << 27) -#define R200_KILL_LT_ZERO (1 << 30) -#define R200_BORDER_MODE_OGL (0 << 31) -#define R200_BORDER_MODE_D3D (1 << 31) -#define R200_PP_TXFORMAT_0 0x2c04 -#define R200_TXFORMAT_I8 (0 << 0) -#define R200_TXFORMAT_AI88 (1 << 0) -#define R200_TXFORMAT_RGB332 (2 << 0) -#define R200_TXFORMAT_ARGB1555 (3 << 0) -#define R200_TXFORMAT_RGB565 (4 << 0) -#define R200_TXFORMAT_ARGB4444 (5 << 0) -#define R200_TXFORMAT_ARGB8888 (6 << 0) -#define R200_TXFORMAT_RGBA8888 (7 << 0) -#define R200_TXFORMAT_Y8 (8 << 0) -#define R200_TXFORMAT_AVYU4444 (9 << 0) -#define R200_TXFORMAT_VYUY422 (10 << 0) -#define R200_TXFORMAT_YVYU422 (11 << 0) -#define R200_TXFORMAT_DXT1 (12 << 0) -#define R200_TXFORMAT_DXT23 (14 << 0) -#define R200_TXFORMAT_DXT45 (15 << 0) -#define R200_TXFORMAT_FORMAT_MASK (31 << 0) -#define R200_TXFORMAT_FORMAT_SHIFT 0 -#define R200_TXFORMAT_ALPHA_IN_MAP (1 << 6) -#define R200_TXFORMAT_NON_POWER2 (1 << 7) -#define R200_TXFORMAT_WIDTH_MASK (15 << 8) -#define R200_TXFORMAT_WIDTH_SHIFT 8 -#define R200_TXFORMAT_HEIGHT_MASK (15 << 12) -#define R200_TXFORMAT_HEIGHT_SHIFT 12 -#define R200_TXFORMAT_F5_WIDTH_MASK (15 << 16) /* cube face 5 */ -#define R200_TXFORMAT_F5_WIDTH_SHIFT 16 -#define R200_TXFORMAT_F5_HEIGHT_MASK (15 << 20) -#define R200_TXFORMAT_F5_HEIGHT_SHIFT 20 -#define R200_TXFORMAT_ST_ROUTE_STQ0 (0 << 24) -#define R200_TXFORMAT_ST_ROUTE_STQ1 (1 << 24) -#define R200_TXFORMAT_ST_ROUTE_STQ2 (2 << 24) -#define R200_TXFORMAT_ST_ROUTE_STQ3 (3 << 24) -#define R200_TXFORMAT_ST_ROUTE_STQ4 (4 << 24) -#define R200_TXFORMAT_ST_ROUTE_STQ5 (5 << 24) -#define R200_TXFORMAT_ST_ROUTE_MASK (7 << 24) -#define R200_TXFORMAT_ST_ROUTE_SHIFT 24 -#define R200_TXFORMAT_ALPHA_MASK_ENABLE (1 << 28) -#define R200_TXFORMAT_CHROMA_KEY_ENABLE (1 << 29) -#define R200_TXFORMAT_CUBIC_MAP_ENABLE (1 << 30) -#define R200_PP_TXFORMAT_X_0 0x2c08 -#define R200_PP_TXSIZE_0 0x2c0c /* NPOT only */ -#define R200_PP_TXPITCH_0 0x2c10 /* NPOT only */ -#define R200_PP_TXOFFSET_0 0x2d00 -#define R200_TXO_ENDIAN_NO_SWAP (0 << 0) -#define R200_TXO_ENDIAN_BYTE_SWAP (1 << 0) -#define R200_TXO_ENDIAN_WORD_SWAP (2 << 0) -#define R200_TXO_ENDIAN_HALFDW_SWAP (3 << 0) -#define R200_TXO_OFFSET_MASK 0xffffffe0 -#define R200_TXO_OFFSET_SHIFT 5 - -#define R200_PP_TFACTOR_0 0x2ee0 -#define R200_PP_TFACTOR_1 0x2ee4 -#define R200_PP_TFACTOR_2 0x2ee8 -#define R200_PP_TFACTOR_3 0x2eec -#define R200_PP_TFACTOR_4 0x2ef0 -#define R200_PP_TFACTOR_5 0x2ef4 - -#define R200_PP_TXCBLEND_0 0x2f00 -#define R200_TXC_ARG_A_ZERO (0) -#define R200_TXC_ARG_A_CURRENT_COLOR (2) -#define R200_TXC_ARG_A_CURRENT_ALPHA (3) -#define R200_TXC_ARG_A_DIFFUSE_COLOR (4) -#define R200_TXC_ARG_A_DIFFUSE_ALPHA (5) -#define R200_TXC_ARG_A_SPECULAR_COLOR (6) -#define R200_TXC_ARG_A_SPECULAR_ALPHA (7) -#define R200_TXC_ARG_A_TFACTOR_COLOR (8) -#define R200_TXC_ARG_A_TFACTOR_ALPHA (9) -#define R200_TXC_ARG_A_R0_COLOR (10) -#define R200_TXC_ARG_A_R0_ALPHA (11) -#define R200_TXC_ARG_A_R1_COLOR (12) -#define R200_TXC_ARG_A_R1_ALPHA (13) -#define R200_TXC_ARG_A_R2_COLOR (14) -#define R200_TXC_ARG_A_R2_ALPHA (15) -#define R200_TXC_ARG_A_R3_COLOR (16) -#define R200_TXC_ARG_A_R3_ALPHA (17) -#define R200_TXC_ARG_A_R4_COLOR (18) -#define R200_TXC_ARG_A_R4_ALPHA (19) -#define R200_TXC_ARG_A_R5_COLOR (20) -#define R200_TXC_ARG_A_R5_ALPHA (21) -#define R200_TXC_ARG_A_TFACTOR1_COLOR (26) -#define R200_TXC_ARG_A_TFACTOR1_ALPHA (27) -#define R200_TXC_ARG_A_MASK (31 << 0) -#define R200_TXC_ARG_A_SHIFT 0 -#define R200_TXC_ARG_B_ZERO (0 << 5) -#define R200_TXC_ARG_B_CURRENT_COLOR (2 << 5) -#define R200_TXC_ARG_B_CURRENT_ALPHA (3 << 5) -#define R200_TXC_ARG_B_DIFFUSE_COLOR (4 << 5) -#define R200_TXC_ARG_B_DIFFUSE_ALPHA (5 << 5) -#define R200_TXC_ARG_B_SPECULAR_COLOR (6 << 5) -#define R200_TXC_ARG_B_SPECULAR_ALPHA (7 << 5) -#define R200_TXC_ARG_B_TFACTOR_COLOR (8 << 5) -#define R200_TXC_ARG_B_TFACTOR_ALPHA (9 << 5) -#define R200_TXC_ARG_B_R0_COLOR (10 << 5) -#define R200_TXC_ARG_B_R0_ALPHA (11 << 5) -#define R200_TXC_ARG_B_R1_COLOR (12 << 5) -#define R200_TXC_ARG_B_R1_ALPHA (13 << 5) -#define R200_TXC_ARG_B_R2_COLOR (14 << 5) -#define R200_TXC_ARG_B_R2_ALPHA (15 << 5) -#define R200_TXC_ARG_B_R3_COLOR (16 << 5) -#define R200_TXC_ARG_B_R3_ALPHA (17 << 5) -#define R200_TXC_ARG_B_R4_COLOR (18 << 5) -#define R200_TXC_ARG_B_R4_ALPHA (19 << 5) -#define R200_TXC_ARG_B_R5_COLOR (20 << 5) -#define R200_TXC_ARG_B_R5_ALPHA (21 << 5) -#define R200_TXC_ARG_B_TFACTOR1_COLOR (26 << 5) -#define R200_TXC_ARG_B_TFACTOR1_ALPHA (27 << 5) -#define R200_TXC_ARG_B_MASK (31 << 5) -#define R200_TXC_ARG_B_SHIFT 5 -#define R200_TXC_ARG_C_ZERO (0 << 10) -#define R200_TXC_ARG_C_CURRENT_COLOR (2 << 10) -#define R200_TXC_ARG_C_CURRENT_ALPHA (3 << 10) -#define R200_TXC_ARG_C_DIFFUSE_COLOR (4 << 10) -#define R200_TXC_ARG_C_DIFFUSE_ALPHA (5 << 10) -#define R200_TXC_ARG_C_SPECULAR_COLOR (6 << 10) -#define R200_TXC_ARG_C_SPECULAR_ALPHA (7 << 10) -#define R200_TXC_ARG_C_TFACTOR_COLOR (8 << 10) -#define R200_TXC_ARG_C_TFACTOR_ALPHA (9 << 10) -#define R200_TXC_ARG_C_R0_COLOR (10 << 10) -#define R200_TXC_ARG_C_R0_ALPHA (11 << 10) -#define R200_TXC_ARG_C_R1_COLOR (12 << 10) -#define R200_TXC_ARG_C_R1_ALPHA (13 << 10) -#define R200_TXC_ARG_C_R2_COLOR (14 << 10) -#define R200_TXC_ARG_C_R2_ALPHA (15 << 10) -#define R200_TXC_ARG_C_R3_COLOR (16 << 10) -#define R200_TXC_ARG_C_R3_ALPHA (17 << 10) -#define R200_TXC_ARG_C_R4_COLOR (18 << 10) -#define R200_TXC_ARG_C_R4_ALPHA (19 << 10) -#define R200_TXC_ARG_C_R5_COLOR (20 << 10) -#define R200_TXC_ARG_C_R5_ALPHA (21 << 10) -#define R200_TXC_ARG_C_TFACTOR1_COLOR (26 << 10) -#define R200_TXC_ARG_C_TFACTOR1_ALPHA (27 << 10) -#define R200_TXC_ARG_C_MASK (31 << 10) -#define R200_TXC_ARG_C_SHIFT 10 -#define R200_TXC_COMP_ARG_A (1 << 16) -#define R200_TXC_COMP_ARG_A_SHIFT (16) -#define R200_TXC_BIAS_ARG_A (1 << 17) -#define R200_TXC_SCALE_ARG_A (1 << 18) -#define R200_TXC_NEG_ARG_A (1 << 19) -#define R200_TXC_COMP_ARG_B (1 << 20) -#define R200_TXC_COMP_ARG_B_SHIFT (20) -#define R200_TXC_BIAS_ARG_B (1 << 21) -#define R200_TXC_SCALE_ARG_B (1 << 22) -#define R200_TXC_NEG_ARG_B (1 << 23) -#define R200_TXC_COMP_ARG_C (1 << 24) -#define R200_TXC_COMP_ARG_C_SHIFT (24) -#define R200_TXC_BIAS_ARG_C (1 << 25) -#define R200_TXC_SCALE_ARG_C (1 << 26) -#define R200_TXC_NEG_ARG_C (1 << 27) -#define R200_TXC_OP_MADD (0 << 28) -#define R200_TXC_OP_CND0 (2 << 28) -#define R200_TXC_OP_LERP (3 << 28) -#define R200_TXC_OP_DOT3 (4 << 28) -#define R200_TXC_OP_DOT4 (5 << 28) -#define R200_TXC_OP_CONDITIONAL (6 << 28) -#define R200_TXC_OP_DOT2_ADD (7 << 28) -#define R200_TXC_OP_MASK (7 << 28) -#define R200_PP_TXCBLEND2_0 0x2f04 -#define R200_TXC_TFACTOR_SEL_SHIFT 0 -#define R200_TXC_TFACTOR_SEL_MASK 0x7 -#define R200_TXC_TFACTOR1_SEL_SHIFT 4 -#define R200_TXC_TFACTOR1_SEL_MASK (0x7 << 4) -#define R200_TXC_SCALE_SHIFT 8 -#define R200_TXC_SCALE_MASK (7 << 8) -#define R200_TXC_SCALE_1X (0 << 8) -#define R200_TXC_SCALE_2X (1 << 8) -#define R200_TXC_SCALE_4X (2 << 8) -#define R200_TXC_SCALE_8X (3 << 8) -#define R200_TXC_SCALE_INV2 (5 << 8) -#define R200_TXC_SCALE_INV4 (6 << 8) -#define R200_TXC_SCALE_INV8 (7 << 8) -#define R200_TXC_CLAMP_SHIFT 12 -#define R200_TXC_CLAMP_MASK (3 << 12) -#define R200_TXC_CLAMP_WRAP (0 << 12) -#define R200_TXC_CLAMP_0_1 (1 << 12) -#define R200_TXC_CLAMP_8_8 (2 << 12) -#define R200_TXC_OUTPUT_REG_MASK (7 << 16) -#define R200_TXC_OUTPUT_REG_NONE (0 << 16) -#define R200_TXC_OUTPUT_REG_R0 (1 << 16) -#define R200_TXC_OUTPUT_REG_R1 (2 << 16) -#define R200_TXC_OUTPUT_REG_R2 (3 << 16) -#define R200_TXC_OUTPUT_REG_R3 (4 << 16) -#define R200_TXC_OUTPUT_REG_R4 (5 << 16) -#define R200_TXC_OUTPUT_REG_R5 (6 << 16) -#define R200_TXC_OUTPUT_MASK_MASK (7 << 20) -#define R200_TXC_OUTPUT_MASK_RGB (0 << 20) -#define R200_TXC_OUTPUT_MASK_RG (1 << 20) -#define R200_TXC_OUTPUT_MASK_RB (2 << 20) -#define R200_TXC_OUTPUT_MASK_R (3 << 20) -#define R200_TXC_OUTPUT_MASK_GB (4 << 20) -#define R200_TXC_OUTPUT_MASK_G (5 << 20) -#define R200_TXC_OUTPUT_MASK_B (6 << 20) -#define R200_TXC_OUTPUT_MASK_NONE (7 << 20) -#define R200_TXC_REPL_NORMAL 0 -#define R200_TXC_REPL_RED 1 -#define R200_TXC_REPL_GREEN 2 -#define R200_TXC_REPL_BLUE 3 -#define R200_TXC_REPL_ARG_A_SHIFT 26 -#define R200_TXC_REPL_ARG_A_MASK (3 << 26) -#define R200_TXC_REPL_ARG_B_SHIFT 28 -#define R200_TXC_REPL_ARG_B_MASK (3 << 28) -#define R200_TXC_REPL_ARG_C_SHIFT 30 -#define R200_TXC_REPL_ARG_C_MASK (3 << 30) -#define R200_PP_TXABLEND_0 0x2f08 -#define R200_TXA_ARG_A_ZERO (0) -#define R200_TXA_ARG_A_CURRENT_ALPHA (2) /* guess */ -#define R200_TXA_ARG_A_CURRENT_BLUE (3) /* guess */ -#define R200_TXA_ARG_A_DIFFUSE_ALPHA (4) -#define R200_TXA_ARG_A_DIFFUSE_BLUE (5) -#define R200_TXA_ARG_A_SPECULAR_ALPHA (6) -#define R200_TXA_ARG_A_SPECULAR_BLUE (7) -#define R200_TXA_ARG_A_TFACTOR_ALPHA (8) -#define R200_TXA_ARG_A_TFACTOR_BLUE (9) -#define R200_TXA_ARG_A_R0_ALPHA (10) -#define R200_TXA_ARG_A_R0_BLUE (11) -#define R200_TXA_ARG_A_R1_ALPHA (12) -#define R200_TXA_ARG_A_R1_BLUE (13) -#define R200_TXA_ARG_A_R2_ALPHA (14) -#define R200_TXA_ARG_A_R2_BLUE (15) -#define R200_TXA_ARG_A_R3_ALPHA (16) -#define R200_TXA_ARG_A_R3_BLUE (17) -#define R200_TXA_ARG_A_R4_ALPHA (18) -#define R200_TXA_ARG_A_R4_BLUE (19) -#define R200_TXA_ARG_A_R5_ALPHA (20) -#define R200_TXA_ARG_A_R5_BLUE (21) -#define R200_TXA_ARG_A_TFACTOR1_ALPHA (26) -#define R200_TXA_ARG_A_TFACTOR1_BLUE (27) -#define R200_TXA_ARG_A_MASK (31 << 0) -#define R200_TXA_ARG_A_SHIFT 0 -#define R200_TXA_ARG_B_ZERO (0 << 5) -#define R200_TXA_ARG_B_CURRENT_ALPHA (2 << 5) /* guess */ -#define R200_TXA_ARG_B_CURRENT_BLUE (3 << 5) /* guess */ -#define R200_TXA_ARG_B_DIFFUSE_ALPHA (4 << 5) -#define R200_TXA_ARG_B_DIFFUSE_BLUE (5 << 5) -#define R200_TXA_ARG_B_SPECULAR_ALPHA (6 << 5) -#define R200_TXA_ARG_B_SPECULAR_BLUE (7 << 5) -#define R200_TXA_ARG_B_TFACTOR_ALPHA (8 << 5) -#define R200_TXA_ARG_B_TFACTOR_BLUE (9 << 5) -#define R200_TXA_ARG_B_R0_ALPHA (10 << 5) -#define R200_TXA_ARG_B_R0_BLUE (11 << 5) -#define R200_TXA_ARG_B_R1_ALPHA (12 << 5) -#define R200_TXA_ARG_B_R1_BLUE (13 << 5) -#define R200_TXA_ARG_B_R2_ALPHA (14 << 5) -#define R200_TXA_ARG_B_R2_BLUE (15 << 5) -#define R200_TXA_ARG_B_R3_ALPHA (16 << 5) -#define R200_TXA_ARG_B_R3_BLUE (17 << 5) -#define R200_TXA_ARG_B_R4_ALPHA (18 << 5) -#define R200_TXA_ARG_B_R4_BLUE (19 << 5) -#define R200_TXA_ARG_B_R5_ALPHA (20 << 5) -#define R200_TXA_ARG_B_R5_BLUE (21 << 5) -#define R200_TXA_ARG_B_TFACTOR1_ALPHA (26 << 5) -#define R200_TXA_ARG_B_TFACTOR1_BLUE (27 << 5) -#define R200_TXA_ARG_B_MASK (31 << 5) -#define R200_TXA_ARG_B_SHIFT 5 -#define R200_TXA_ARG_C_ZERO (0 << 10) -#define R200_TXA_ARG_C_CURRENT_ALPHA (2 << 10) /* guess */ -#define R200_TXA_ARG_C_CURRENT_BLUE (3 << 10) /* guess */ -#define R200_TXA_ARG_C_DIFFUSE_ALPHA (4 << 10) -#define R200_TXA_ARG_C_DIFFUSE_BLUE (5 << 10) -#define R200_TXA_ARG_C_SPECULAR_ALPHA (6 << 10) -#define R200_TXA_ARG_C_SPECULAR_BLUE (7 << 10) -#define R200_TXA_ARG_C_TFACTOR_ALPHA (8 << 10) -#define R200_TXA_ARG_C_TFACTOR_BLUE (9 << 10) -#define R200_TXA_ARG_C_R0_ALPHA (10 << 10) -#define R200_TXA_ARG_C_R0_BLUE (11 << 10) -#define R200_TXA_ARG_C_R1_ALPHA (12 << 10) -#define R200_TXA_ARG_C_R1_BLUE (13 << 10) -#define R200_TXA_ARG_C_R2_ALPHA (14 << 10) -#define R200_TXA_ARG_C_R2_BLUE (15 << 10) -#define R200_TXA_ARG_C_R3_ALPHA (16 << 10) -#define R200_TXA_ARG_C_R3_BLUE (17 << 10) -#define R200_TXA_ARG_C_R4_ALPHA (18 << 10) -#define R200_TXA_ARG_C_R4_BLUE (19 << 10) -#define R200_TXA_ARG_C_R5_ALPHA (20 << 10) -#define R200_TXA_ARG_C_R5_BLUE (21 << 10) -#define R200_TXA_ARG_C_TFACTOR1_ALPHA (26 << 10) -#define R200_TXA_ARG_C_TFACTOR1_BLUE (27 << 10) -#define R200_TXA_ARG_C_MASK (31 << 10) -#define R200_TXA_ARG_C_SHIFT 10 -#define R200_TXA_COMP_ARG_A (1 << 16) -#define R200_TXA_COMP_ARG_A_SHIFT (16) -#define R200_TXA_BIAS_ARG_A (1 << 17) -#define R200_TXA_SCALE_ARG_A (1 << 18) -#define R200_TXA_NEG_ARG_A (1 << 19) -#define R200_TXA_COMP_ARG_B (1 << 20) -#define R200_TXA_COMP_ARG_B_SHIFT (20) -#define R200_TXA_BIAS_ARG_B (1 << 21) -#define R200_TXA_SCALE_ARG_B (1 << 22) -#define R200_TXA_NEG_ARG_B (1 << 23) -#define R200_TXA_COMP_ARG_C (1 << 24) -#define R200_TXA_COMP_ARG_C_SHIFT (24) -#define R200_TXA_BIAS_ARG_C (1 << 25) -#define R200_TXA_SCALE_ARG_C (1 << 26) -#define R200_TXA_NEG_ARG_C (1 << 27) -#define R200_TXA_OP_MADD (0 << 28) -#define R200_TXA_OP_CND0 (2 << 28) -#define R200_TXA_OP_LERP (3 << 28) -#define R200_TXA_OP_CONDITIONAL (6 << 28) -#define R200_TXA_OP_MASK (7 << 28) -#define R200_PP_TXABLEND2_0 0x2f0c -#define R200_TXA_TFACTOR_SEL_SHIFT 0 -#define R200_TXA_TFACTOR_SEL_MASK 0x7 -#define R200_TXA_TFACTOR1_SEL_SHIFT 4 -#define R200_TXA_TFACTOR1_SEL_MASK (0x7 << 4) -#define R200_TXA_SCALE_SHIFT 8 -#define R200_TXA_SCALE_MASK (7 << 8) -#define R200_TXA_SCALE_1X (0 << 8) -#define R200_TXA_SCALE_2X (1 << 8) -#define R200_TXA_SCALE_4X (2 << 8) -#define R200_TXA_SCALE_8X (3 << 8) -#define R200_TXA_SCALE_INV2 (5 << 8) -#define R200_TXA_SCALE_INV4 (6 << 8) -#define R200_TXA_SCALE_INV8 (7 << 8) -#define R200_TXA_CLAMP_SHIFT 12 -#define R200_TXA_CLAMP_MASK (3 << 12) -#define R200_TXA_CLAMP_WRAP (0 << 12) -#define R200_TXA_CLAMP_0_1 (1 << 12) -#define R200_TXA_CLAMP_8_8 (2 << 12) -#define R200_TXA_OUTPUT_REG_MASK (7 << 16) -#define R200_TXA_OUTPUT_REG_NONE (0 << 16) -#define R200_TXA_OUTPUT_REG_R0 (1 << 16) -#define R200_TXA_OUTPUT_REG_R1 (2 << 16) -#define R200_TXA_OUTPUT_REG_R2 (3 << 16) -#define R200_TXA_OUTPUT_REG_R3 (4 << 16) -#define R200_TXA_OUTPUT_REG_R4 (5 << 16) -#define R200_TXA_OUTPUT_REG_R5 (6 << 16) -#define R200_TXA_DOT_ALPHA (1 << 20) -#define R200_TXA_REPL_NORMAL 0 -#define R200_TXA_REPL_RED 1 -#define R200_TXA_REPL_GREEN 2 -#define R200_TXA_REPL_ARG_A_SHIFT 26 -#define R200_TXA_REPL_ARG_A_MASK (3 << 26) -#define R200_TXA_REPL_ARG_B_SHIFT 28 -#define R200_TXA_REPL_ARG_B_MASK (3 << 28) -#define R200_TXA_REPL_ARG_C_SHIFT 30 -#define R200_TXA_REPL_ARG_C_MASK (3 << 30) - -#define R200_SE_VTX_FMT_0 0x2088 -#define R200_VTX_XY 0 /* always have xy */ -#define R200_VTX_Z0 (1<<0) -#define R200_VTX_W0 (1<<1) -#define R200_VTX_WEIGHT_COUNT_SHIFT (2) -#define R200_VTX_PV_MATRIX_SEL (1<<5) -#define R200_VTX_N0 (1<<6) -#define R200_VTX_POINT_SIZE (1<<7) -#define R200_VTX_DISCRETE_FOG (1<<8) -#define R200_VTX_SHININESS_0 (1<<9) -#define R200_VTX_SHININESS_1 (1<<10) -#define R200_VTX_COLOR_NOT_PRESENT 0 -#define R200_VTX_PK_RGBA 1 -#define R200_VTX_FP_RGB 2 -#define R200_VTX_FP_RGBA 3 -#define R200_VTX_COLOR_MASK 3 -#define R200_VTX_COLOR_0_SHIFT 11 -#define R200_VTX_COLOR_1_SHIFT 13 -#define R200_VTX_COLOR_2_SHIFT 15 -#define R200_VTX_COLOR_3_SHIFT 17 -#define R200_VTX_COLOR_4_SHIFT 19 -#define R200_VTX_COLOR_5_SHIFT 21 -#define R200_VTX_COLOR_6_SHIFT 23 -#define R200_VTX_COLOR_7_SHIFT 25 -#define R200_VTX_XY1 (1<<28) -#define R200_VTX_Z1 (1<<29) -#define R200_VTX_W1 (1<<30) -#define R200_VTX_N1 (1<<31) -#define R200_SE_VTX_FMT_1 0x208c -#define R200_VTX_TEX0_COMP_CNT_SHIFT 0 -#define R200_VTX_TEX1_COMP_CNT_SHIFT 3 -#define R200_VTX_TEX2_COMP_CNT_SHIFT 6 -#define R200_VTX_TEX3_COMP_CNT_SHIFT 9 -#define R200_VTX_TEX4_COMP_CNT_SHIFT 12 -#define R200_VTX_TEX5_COMP_CNT_SHIFT 15 - -#define R200_SE_TCL_OUTPUT_VTX_FMT_0 0x2090 -#define R200_SE_TCL_OUTPUT_VTX_FMT_1 0x2094 -#define R200_SE_TCL_OUTPUT_VTX_COMP_SEL 0x2250 -#define R200_OUTPUT_XYZW (1<<0) -#define R200_OUTPUT_COLOR_0 (1<<8) -#define R200_OUTPUT_COLOR_1 (1<<9) -#define R200_OUTPUT_TEX_0 (1<<16) -#define R200_OUTPUT_TEX_1 (1<<17) -#define R200_OUTPUT_TEX_2 (1<<18) -#define R200_OUTPUT_TEX_3 (1<<19) -#define R200_OUTPUT_TEX_4 (1<<20) -#define R200_OUTPUT_TEX_5 (1<<21) -#define R200_OUTPUT_TEX_MASK (0x3f<<16) -#define R200_OUTPUT_DISCRETE_FOG (1<<24) -#define R200_OUTPUT_PT_SIZE (1<<25) -#define R200_FORCE_INORDER_PROC (1<<31) -#define R200_PP_CNTL_X 0x2cc4 -#define R200_PP_TXMULTI_CTL_0 0x2c1c -#define R200_SE_VTX_STATE_CNTL 0x2180 -#define R200_UPDATE_USER_COLOR_0_ENA_MASK (1<<16) - -/* BUS MASTERING */ - -#define BM_FRAME_BUF_OFFSET 0xA00 -#define BM_SYSTEM_MEM_ADDR 0xA04 -#define BM_COMMAND 0xA08 -#define BM_INTERRUPT_DIS 0x08000000 -#define BM_TRANSFER_DEST_REG 0x10000000 -#define BM_FORCE_TO_PCI 0x20000000 -#define BM_FRAME_OFFSET_HOLD 0x40000000 -#define BM_END_OF_LIST 0x80000000 -//#define BM_STATUS 0xA0c // !!!!!! already used -#define BM_QUEUE_STATUS 0xA10 -#define BM_QUEUE_FREE_STATUS 0xA14 -#define BM_CHUNK_0_VAL 0xA18 -#define BM_PTR_FORCE_TO_PCI 0x00200000 -#define BM_PM4_RD_FORCE_TO_PCI 0x00400000 -#define BM_GLOBAL_FORCE_TO_PCI 0x00800000 -#define BM_VIP3_NOCHUNK 0x10000000 -#define BM_VIP2_NOCHUNK 0x20000000 -#define BM_VIP1_NOCHUNK 0x40000000 -#define BM_VIP0_NOCHUNK 0x80000000 -#define BM_CHUNK_1_VAL 0xA1C -#define BM_VIP0_BUF 0xA20 -#define SYSTEM_TRIGGER_SYSTEM_TO_VIDEO 0x0 -#define SYSTEM_TRIGGER_VIDEO_TO_SYSTEM 0x1 -#define BM_VIP0_ACTIVE 0xA24 -#define BM_VIP1_BUF 0xA30 -#define BM_VIP1_ACTIVE 0xA34 -#define BM_VIP2_BUF 0xA40 -#define BM_VIP2_ACTIVE 0xA44 -#define BM_VIP3_BUF 0xA50 -#define BM_VIP3_ACTIVE 0xA54 -#define BM_VIDCAP_BUF0 0xA60 -#define BM_VIDCAP_BUF1 0xA64 -#define BM_VIDCAP_BUF2 0xA68 -#define BM_VIDCAP_ACTIVE 0xA6c -#define BM_GUI 0xA80 - -/* RAGE THEATER REGISTERS */ - -#define DMA_VIPH0_COMMAND 0x0A00 -#define DMA_VIPH1_COMMAND 0x0A04 -#define DMA_VIPH2_COMMAND 0x0A08 -#define DMA_VIPH3_COMMAND 0x0A0C -#define DMA_VIPH_STATUS 0x0A10 -#define DMA_VIPH_CHUNK_0 0x0A18 -#define DMA_VIPH_CHUNK_1_VAL 0x0A1C -#define DMA_VIP0_TABLE_ADDR 0x0A20 -#define DMA_VIPH0_ACTIVE 0x0A24 -#define DMA_VIP1_TABLE_ADDR 0x0A30 -#define DMA_VIPH1_ACTIVE 0x0A34 -#define DMA_VIP2_TABLE_ADDR 0x0A40 -#define DMA_VIPH2_ACTIVE 0x0A44 -#define DMA_VIP3_TABLE_ADDR 0x0A50 -#define DMA_VIPH3_ACTIVE 0x0A54 -#define DMA_VIPH_ABORT 0x0A88 - -#define VIPH_CONTROL 0x0C40 -#define VIPH_CH0_DATA 0x0C00 -#define VIPH_CH1_DATA 0x0C04 -#define VIPH_CH2_DATA 0x0C08 -#define VIPH_CH3_DATA 0x0C0C -#define VIPH_CH0_ADDR 0x0C10 -#define VIPH_CH1_ADDR 0x0C14 -#define VIPH_CH2_ADDR 0x0C18 -#define VIPH_CH3_ADDR 0x0C1C -#define VIPH_CH0_SBCNT 0x0C20 -#define VIPH_CH1_SBCNT 0x0C24 -#define VIPH_CH2_SBCNT 0x0C28 -#define VIPH_CH3_SBCNT 0x0C2C -#define VIPH_CH0_ABCNT 0x0C30 -#define VIPH_CH1_ABCNT 0x0C34 -#define VIPH_CH2_ABCNT 0x0C38 -#define VIPH_CH3_ABCNT 0x0C3C -#define VIPH_DV_LAT 0x0C44 -#define VIPH_BM_CHUNK 0x0C48 -#define VIPH_DV_INT 0x0C4C -#define VIPH_TIMEOUT_STAT 0x0C50 - -#define VIPH_REG_DATA 0x0084 -#define VIPH_REG_ADDR 0x0080 - -/* Address Space Rage Theatre Registers (VIP Access) */ -#define VIP_VIP_VENDOR_DEVICE_ID 0x0000 -#define VIP_VIP_SUB_VENDOR_DEVICE_ID 0x0004 -#define VIP_VIP_COMMAND_STATUS 0x0008 -#define VIP_VIP_REVISION_ID 0x000c -#define VIP_HW_DEBUG 0x0010 -#define VIP_SW_SCRATCH 0x0014 -#define VIP_I2C_CNTL_0 0x0020 -#define VIP_I2C_CNTL_1 0x0024 -#define VIP_I2C_DATA 0x0028 -#define VIP_INT_CNTL 0x002c -#define VIP_INT_CNTL__FB_INT0 0x02000000 -#define VIP_INT_CNTL__FB_INT0_CLR 0x02000000 -#define VIP_GPIO_INOUT 0x0030 -#define VIP_GPIO_CNTL 0x0034 -#define VIP_CLKOUT_GPIO_CNTL 0x0038 -#define VIP_RIPINTF_PORT_CNTL 0x003c -#define VIP_HOSTINTF_PORT_CNTL 0x003c -#define VIP_HOSTINTF_PORT_CNTL__HAD_HCTL_SDA_SN 0x00000008 -#define VIP_HOSTINTF_PORT_CNTL__HAD_HCTL_SDA_SP 0x00000080 -#define VIP_HOSTINTF_PORT_CNTL__HAD_HCTL_SDA_SR 0x00000100 -#define VIP_HOSTINTF_PORT_CNTL__SUB_SYS_ID_EN 0x00010000 -#define VIP_HOSTINTF_PORT_CNTL__FIFO_RW_MODE 0x00300000 -#define VIP_HOSTINTF_PORT_CNTL__FIFOA_ENDIAN_SWAP 0x00c00000 -#define VIP_HOSTINTF_PORT_CNTL__FIFOB_ENDIAN_SWAP 0x03000000 -#define VIP_HOSTINTF_PORT_CNTL__FIFOC_ENDIAN_SWAP 0x0c000000 -#define VIP_HOSTINTF_PORT_CNTL__FIFOD_ENDIAN_SWAP 0x30000000 -#define VIP_HOSTINTF_PORT_CNTL__FIFOE_ENDIAN_SWAP 0xc0000000 -#define VIP_DSP_PLL_CNTL 0x0bc -#define VIP_TC_SOURCE 0x300 -#define VIP_TC_DESTINATION 0x304 -#define VIP_TC_COMMAND 0x308 -#define VIP_TC_STATUS 0x030c -#define VIP_TC_STATUS__TC_CHAN_BUSY 0x00007fff -#define VIP_TC_STATUS__TC_WRITE_PENDING 0x00008000 -#define VIP_TC_STATUS__TC_FIFO_4_EMPTY 0x00040000 -#define VIP_TC_STATUS__TC_FIFO_6_EMPTY 0x00080000 -#define VIP_TC_STATUS__TC_FIFO_8_EMPTY 0x00100000 -#define VIP_TC_STATUS__TC_FIFO_10_EMPTY 0x00200000 -#define VIP_TC_STATUS__TC_FIFO_4_FULL 0x04000000 -#define VIP_TC_STATUS__TC_FIFO_6_FULL 0x08080000 -#define VIP_TC_STATUS__TC_FIFO_8_FULL 0x10080000 -#define VIP_TC_STATUS__TC_FIFO_10_FULL 0x20080000 -#define VIP_TC_STATUS__DSP_ILLEGAL_OP 0x80080000 -#define VIP_TC_DOWNLOAD 0x0310 -#define VIP_TC_DOWNLOAD__TC_DONE_MASK 0x00003fff -#define VIP_TC_DOWNLOAD__TC_RESET_MODE 0x00060000 -#define VIP_FB_INT 0x0314 -#define VIP_FB_INT__INT_7 0x00000080 -#define VIP_FB_SCRATCH0 0x0318 -#define VIP_FB_SCRATCH1 0x031c -#define VIP_ADC_CNTL 0x0400 -#define VIP_ADC_DEBUG 0x0404 -#define VIP_STANDARD_SELECT 0x0408 -#define VIP_THERMO2BIN_STATUS 0x040c -#define VIP_COMB_CNTL0 0x0440 -#define VIP_COMB_CNTL1 0x0444 -#define VIP_COMB_CNTL2 0x0448 -#define VIP_COMB_LINE_LENGTH 0x044c -#define VIP_NOISE_CNTL0 0x0450 -#define VIP_HS_PLINE 0x0480 -#define VIP_HS_DTOINC 0x0484 -#define VIP_HS_PLLGAIN 0x0488 -#define VIP_HS_MINMAXWIDTH 0x048c -#define VIP_HS_GENLOCKDELAY 0x0490 -#define VIP_HS_WINDOW_LIMIT 0x0494 -#define VIP_HS_WINDOW_OC_SPEED 0x0498 -#define VIP_HS_PULSE_WIDTH 0x049c -#define VIP_HS_PLL_ERROR 0x04a0 -#define VIP_HS_PLL_FS_PATH 0x04a4 -#define VIP_SG_BLACK_GATE 0x04c0 -#define VIP_SG_SYNCTIP_GATE 0x04c4 -#define VIP_SG_UVGATE_GATE 0x04c8 -#define VIP_LP_AGC_CLAMP_CNTL0 0x0500 -#define VIP_LP_AGC_CLAMP_CNTL1 0x0504 -#define VIP_LP_BRIGHTNESS 0x0508 -#define VIP_LP_CONTRAST 0x050c -#define VIP_LP_SLICE_LIMIT 0x0510 -#define VIP_LP_WPA_CNTL0 0x0514 -#define VIP_LP_WPA_CNTL1 0x0518 -#define VIP_LP_BLACK_LEVEL 0x051c -#define VIP_LP_SLICE_LEVEL 0x0520 -#define VIP_LP_SYNCTIP_LEVEL 0x0524 -#define VIP_LP_VERT_LOCKOUT 0x0528 -#define VIP_VS_DETECTOR_CNTL 0x0540 -#define VIP_VS_BLANKING_CNTL 0x0544 -#define VIP_VS_FIELD_ID_CNTL 0x0548 -#define VIP_VS_COUNTER_CNTL 0x054c -#define VIP_VS_FRAME_TOTAL 0x0550 -#define VIP_VS_LINE_COUNT 0x0554 -#define VIP_CP_PLL_CNTL0 0x0580 -#define VIP_CP_PLL_CNTL1 0x0584 -#define VIP_CP_HUE_CNTL 0x0588 -#define VIP_CP_BURST_GAIN 0x058c -#define VIP_CP_AGC_CNTL 0x0590 -#define VIP_CP_ACTIVE_GAIN 0x0594 -#define VIP_CP_PLL_STATUS0 0x0598 -#define VIP_CP_PLL_STATUS1 0x059c -#define VIP_CP_PLL_STATUS2 0x05a0 -#define VIP_CP_PLL_STATUS3 0x05a4 -#define VIP_CP_PLL_STATUS4 0x05a8 -#define VIP_CP_PLL_STATUS5 0x05ac -#define VIP_CP_PLL_STATUS6 0x05b0 -#define VIP_CP_PLL_STATUS7 0x05b4 -#define VIP_CP_DEBUG_FORCE 0x05b8 -#define VIP_CP_VERT_LOCKOUT 0x05bc -#define VIP_H_ACTIVE_WINDOW 0x05c0 -#define VIP_V_ACTIVE_WINDOW 0x05c4 -#define VIP_H_VBI_WINDOW 0x05c8 -#define VIP_V_VBI_WINDOW 0x05cc -#define VIP_VBI_CONTROL 0x05d0 -#define VIP_DECODER_DEBUG_CNTL 0x05d4 -#define VIP_SINGLE_STEP_DATA 0x05d8 -#define VIP_MASTER_CNTL 0x0040 -#define VIP_RGB_CNTL 0x0048 -#define VIP_CLKOUT_CNTL 0x004c -#define VIP_SYNC_CNTL 0x0050 -#define VIP_I2C_CNTL 0x0054 -#define VIP_HTOTAL 0x0080 -#define VIP_HDISP 0x0084 -#define VIP_HSIZE 0x0088 -#define VIP_HSTART 0x008c -#define VIP_HCOUNT 0x0090 -#define VIP_VTOTAL 0x0094 -#define VIP_VDISP 0x0098 -#define VIP_VCOUNT 0x009c -#define VIP_VFTOTAL 0x00a0 -#define VIP_DFCOUNT 0x00a4 -#define VIP_DFRESTART 0x00a8 -#define VIP_DHRESTART 0x00ac -#define VIP_DVRESTART 0x00b0 -#define VIP_SYNC_SIZE 0x00b4 -#define VIP_TV_PLL_FINE_CNTL 0x00b8 -#define VIP_CRT_PLL_FINE_CNTL 0x00bc -#define VIP_TV_PLL_CNTL 0x00c0 -#define VIP_CRT_PLL_CNTL 0x00c4 -#define VIP_PLL_CNTL0 0x00c8 -#define VIP_PLL_TEST_CNTL 0x00cc -#define VIP_CLOCK_SEL_CNTL 0x00d0 -#define VIP_VIN_PLL_CNTL 0x00d4 -#define VIP_VIN_PLL_FINE_CNTL 0x00d8 -#define VIP_AUD_PLL_CNTL 0x00e0 -#define VIP_AUD_PLL_FINE_CNTL 0x00e4 -#define VIP_AUD_CLK_DIVIDERS 0x00e8 -#define VIP_AUD_DTO_INCREMENTS 0x00ec -#define VIP_L54_PLL_CNTL 0x00f0 -#define VIP_L54_PLL_FINE_CNTL 0x00f4 -#define VIP_L54_DTO_INCREMENTS 0x00f8 -#define VIP_PLL_CNTL1 0x00fc -#define VIP_FRAME_LOCK_CNTL 0x0100 -#define VIP_SYNC_LOCK_CNTL 0x0104 -#define VIP_TVO_SYNC_PAT_ACCUM 0x0108 -#define VIP_TVO_SYNC_THRESHOLD 0x010c -#define VIP_TVO_SYNC_PAT_EXPECT 0x0110 -#define VIP_DELAY_ONE_MAP_A 0x0114 -#define VIP_DELAY_ONE_MAP_B 0x0118 -#define VIP_DELAY_ZERO_MAP_A 0x011c -#define VIP_DELAY_ZERO_MAP_B 0x0120 -#define VIP_TVO_DATA_DELAY_A 0x0140 -#define VIP_TVO_DATA_DELAY_B 0x0144 -#define VIP_HOST_READ_DATA 0x0180 -#define VIP_HOST_WRITE_DATA 0x0184 -#define VIP_HOST_RD_WT_CNTL 0x0188 -#define VIP_VSCALER_CNTL1 0x01c0 -#define VIP_TIMING_CNTL 0x01c4 -#define VIP_VSCALER_CNTL2 0x01c8 -#define VIP_Y_FALL_CNTL 0x01cc -#define VIP_Y_RISE_CNTL 0x01d0 -#define VIP_Y_SAW_TOOTH_CNTL 0x01d4 -#define VIP_UPSAMP_AND_GAIN_CNTL 0x01e0 -#define VIP_GAIN_LIMIT_SETTINGS 0x01e4 -#define VIP_LINEAR_GAIN_SETTINGS 0x01e8 -#define VIP_MODULATOR_CNTL1 0x0200 -#define VIP_MODULATOR_CNTL2 0x0204 -#define VIP_MV_MODE_CNTL 0x0208 -#define VIP_MV_STRIPE_CNTL 0x020c -#define VIP_MV_LEVEL_CNTL1 0x0210 -#define VIP_MV_LEVEL_CNTL2 0x0214 -#define VIP_PRE_DAC_MUX_CNTL 0x0240 -#define VIP_TV_DAC_CNTL 0x0280 -#define VIP_CRC_CNTL 0x02c0 -#define VIP_VIDEO_PORT_SIG 0x02c4 -#define VIP_VBI_CC_CNTL 0x02c8 -#define VIP_VBI_EDS_CNTL 0x02cc -#define VIP_VBI_20BIT_CNTL 0x02d0 -#define VIP_VBI_DTO_CNTL 0x02d4 -#define VIP_VBI_LEVEL_CNTL 0x02d8 -#define VIP_UV_ADR 0x0300 -#define VIP_MV_STATUS 0x0330 -#define VIP_UPSAMP_COEFF0_0 0x0340 -#define VIP_UPSAMP_COEFF0_1 0x0344 -#define VIP_UPSAMP_COEFF0_2 0x0348 -#define VIP_UPSAMP_COEFF1_0 0x034c -#define VIP_UPSAMP_COEFF1_1 0x0350 -#define VIP_UPSAMP_COEFF1_2 0x0354 -#define VIP_UPSAMP_COEFF2_0 0x0358 -#define VIP_UPSAMP_COEFF2_1 0x035c -#define VIP_UPSAMP_COEFF2_2 0x0360 -#define VIP_UPSAMP_COEFF3_0 0x0364 -#define VIP_UPSAMP_COEFF3_1 0x0368 -#define VIP_UPSAMP_COEFF3_2 0x036c -#define VIP_UPSAMP_COEFF4_0 0x0370 -#define VIP_UPSAMP_COEFF4_1 0x0374 -#define VIP_UPSAMP_COEFF4_2 0x0378 -#define VIP_TV_DTO_INCREMENTS 0x0390 -#define VIP_CRT_DTO_INCREMENTS 0x0394 -#define VIP_VSYNC_DIFF_CNTL 0x03a0 -#define VIP_VSYNC_DIFF_LIMITS 0x03a4 -#define VIP_VSYNC_DIFF_RD_DATA 0x03a8 -#define VIP_SCALER_IN_WINDOW 0x0618 -#define VIP_SCALER_OUT_WINDOW 0x061c -#define VIP_H_SCALER_CONTROL 0x0600 -#define VIP_V_SCALER_CONTROL 0x0604 -#define VIP_V_DEINTERLACE_CONTROL 0x0608 -#define VIP_VBI_SCALER_CONTROL 0x060c -#define VIP_DVS_PORT_CTRL 0x0610 -#define VIP_DVS_PORT_READBACK 0x0614 -#define VIP_FIFOA_CONFIG 0x0800 -#define VIP_FIFOB_CONFIG 0x0804 -#define VIP_FIFOC_CONFIG 0x0808 -#define VIP_SPDIF_PORT_CNTL 0x080c -#define VIP_SPDIF_CHANNEL_STAT 0x0810 -#define VIP_SPDIF_AC3_PREAMBLE 0x0814 -#define VIP_I2S_TRANSMIT_CNTL 0x0818 -#define VIP_I2S_RECEIVE_CNTL 0x081c -#define VIP_SPDIF_TX_CNT_REG 0x0820 -#define VIP_IIS_TX_CNT_REG 0x0824 - -/* Status defines */ -#define VIP_BUSY 0 -#define VIP_IDLE 1 -#define VIP_RESET 2 - -#define VIPH_TIMEOUT_STAT__VIPH_FIFO0_STAT 0x00000001 -#define VIPH_TIMEOUT_STAT__VIPH_FIFO0_AK 0x00000001 -#define VIPH_TIMEOUT_STAT__VIPH_FIFO1_STAT 0x00000002 -#define VIPH_TIMEOUT_STAT__VIPH_FIFO1_AK 0x00000002 -#define VIPH_TIMEOUT_STAT__VIPH_FIFO2_STAT 0x00000004 -#define VIPH_TIMEOUT_STAT__VIPH_FIFO2_AK 0x00000004 -#define VIPH_TIMEOUT_STAT__VIPH_FIFO3_STAT 0x00000008 -#define VIPH_TIMEOUT_STAT__VIPH_FIFO3_AK 0x00000008 - -#define VIPH_TIMEOUT_STAT__VIPH_REG_STAT 0x00000010 -#define VIPH_TIMEOUT_STAT__VIPH_REG_AK 0x00000010 -#define VIPH_TIMEOUT_STAT__VIPH_REGR_DIS 0x01000000 -#define TEST_DEBUG_CNTL__TEST_DEBUG_OUT_EN 0x00000001 - -#define RT100_ATI_ID 0x4D541002 -#define RT200_ATI_ID 0x4D4A1002 - -/* Register/Field values: */ -#define RT_COMP0 0x0 -#define RT_COMP1 0x1 -#define RT_COMP2 0x2 -#define RT_YF_COMP3 0x3 -#define RT_YR_COMP3 0x4 -#define RT_YCF_COMP4 0x5 -#define RT_YCR_COMP4 0x6 - -/* Video standard defines */ -#define RT_NTSC 0x0 -#define RT_PAL 0x1 -#define RT_SECAM 0x2 -#define extNONE 0x0000 -#define extNTSC 0x0100 -#define extRsvd 0x0200 -#define extPAL 0x0300 -#define extPAL_M 0x0400 -#define extPAL_N 0x0500 -#define extSECAM 0x0600 -#define extPAL_NCOMB 0x0700 -#define extNTSC_J 0x0800 -#define extNTSC_443 0x0900 -#define extPAL_BGHI 0x0A00 -#define extPAL_60 0x0B00 - /* these are used in MSP3430 */ -#define extPAL_DK1 0x0C00 -#define extPAL_AUTO 0x0D00 - /* these are used in RT200. Some are defined above */ -#define extPAL_B 0x0E00 -#define extPAL_D 0x0F00 -#define extPAL_G 0x1000 -#define extPAL_H 0x1100 -#define extPAL_I 0x1200 -#define extSECAM_B 0x1300 -#define extSECAM_D 0x1400 -#define extSECAM_G 0x1500 -#define extSECAM_H 0x1600 -#define extSECAM_K 0x1700 -#define extSECAM_K1 0x1800 -#define extSECAM_L 0x1900 -#define extSECAM_L1 0x1A00 - -#define RT_FREF_2700 6 -#define RT_FREF_2950 5 - -#define RT_COMPOSITE 0x0 -#define RT_SVIDEO 0x1 - -#define RT_NORM_SHARPNESS 0x03 -#define RT_HIGH_SHARPNESS 0x0F - -#define RT_HUE_PAL_DEF 0x00 - -#define RT_DECINTERLACED 0x1 -#define RT_DECNONINTERLACED 0x0 - -#define NTSC_LINES 525 -#define PAL_SECAM_LINES 625 - -#define RT_ASYNC_ENABLE 0x0 -#define RT_ASYNC_DISABLE 0x1 -#define RT_ASYNC_RESET 0x1 - -#define RT_VINRST_ACTIVE 0x0 -#define RT_VINRST_RESET 0x1 -#define RT_L54RST_RESET 0x1 - -#define RT_REF_CLK 0x0 -#define RT_PLL_VIN_CLK 0x1 - -#define RT_VIN_ASYNC_RST 0x20 -#define RT_DVS_ASYNC_RST 0x80 - -#define RT_ADC_ENABLE 0x0 -#define RT_ADC_DISABLE 0x1 - -#define RT_DVSDIR_IN 0x0 -#define RT_DVSDIR_OUT 0x1 - -#define RT_DVSCLK_HIGH 0x0 -#define RT_DVSCLK_LOW 0x1 - -#define RT_DVSCLK_SEL_8FS 0x0 -#define RT_DVSCLK_SEL_27MHZ 0x1 - -#define RT_DVS_CONTSTREAM 0x1 -#define RT_DVS_NONCONTSTREAM 0x0 - -#define RT_DVSDAT_HIGH 0x0 -#define RT_DVSDAT_LOW 0x1 - -#define RT_ADC_CNTL_DEFAULT 0x03252338 - -/* COMB_CNTL0 FILTER SETTINGS FOR DIFFERENT STANDARDS: */ -#define RT_NTSCM_COMB_CNTL0_COMPOSITE 0x09438090 /* was 0x09438090 */ -#define RT_NTSCM_COMB_CNTL0_SVIDEO 0x48540000 - -#define RT_PAL_COMB_CNTL0_COMPOSITE 0x09438090 -#define RT_PAL_COMB_CNTL0_SVIDEO 0x40348090 - -#define RT_SECAM_COMB_CNTL0_COMPOSITE 0xD0108090 /* instead of orig 0xD0088090 - eric*/ -#define RT_SECAM_COMB_CNTL0_SVIDEO 0x50148090 - -#define RT_PALN_COMB_CNTL0_COMPOSITE 0x09438090 -#define RT_PALN_COMB_CNTL0_SVIDEO 0x40348090 - -#define RT_PALM_COMB_CNTL0_COMPOSITE 0x09438090 -#define RT_PALM_COMB_CNTL0_SVIDEO 0x40348090 -/* End of filter settings. */ - -/* COMB_CNTL1 FILTER SETTINGS FOR DIFFERENT STANDARDS: */ -#define RT_NTSCM_COMB_CNTL1_COMPOSITE 0x00000010 -#define RT_NTSCM_COMB_CNTL1_SVIDEO 0x00000081 - -#define RT_PAL_COMB_CNTL1_COMPOSITE 0x00000010 -#define RT_PAL_COMB_CNTL1_SVIDEO 0x000000A1 - -#define RT_SECAM_COMB_CNTL1_COMPOSITE 0x00000091 -#define RT_SECAM_COMB_CNTL1_SVIDEO 0x00000081 - -#define RT_PALN_COMB_CNTL1_COMPOSITE 0x00000010 -#define RT_PALN_COMB_CNTL1_SVIDEO 0x000000A1 - -#define RT_PALM_COMB_CNTL1_COMPOSITE 0x00000010 -#define RT_PALM_COMB_CNTL1_SVIDEO 0x000000A1 -/* End of filter settings. */ - -/* COMB_CNTL2 FILTER SETTINGS FOR DIFFERENT STANDARDS: */ -#define RT_NTSCM_COMB_CNTL2_COMPOSITE 0x16161010 -#define RT_NTSCM_COMB_CNTL2_SVIDEO 0xFFFFFFFF - -#define RT_PAL_COMB_CNTL2_COMPOSITE 0x06080102 /* instead of 0x16161010 - Ivo */ -#define RT_PAL_COMB_CNTL2_SVIDEO 0x06080102 - -#define RT_SECAM_COMB_CNTL2_COMPOSITE 0xffffffff /* instead of 0x06080102 - eric */ -#define RT_SECAM_COMB_CNTL2_SVIDEO 0x06080102 - -#define RT_PALN_COMB_CNTL2_COMPOSITE 0x06080102 -#define RT_PALN_COMB_CNTL2_SVIDEO 0x06080102 - -#define RT_PALM_COMB_CNTL2_COMPOSITE 0x06080102 -#define RT_PALM_COMB_CNTL2_SVIDEO 0x06080102 -/* End of filter settings. */ - -/* COMB_LINE_LENGTH FILTER SETTINGS FOR DIFFERENT STANDARDS: */ -#define RT_NTSCM_COMB_LENGTH_COMPOSITE 0x0718038A -#define RT_NTSCM_COMB_LENGTH_SVIDEO 0x0718038A - -#define RT_PAL_COMB_LENGTH_COMPOSITE 0x08DA046B -#define RT_PAL_COMB_LENGTH_SVIDEO 0x08DA046B - -#define RT_SECAM_COMB_LENGTH_COMPOSITE 0x08DA046A -#define RT_SECAM_COMB_LENGTH_SVIDEO 0x08DA046A - -#define RT_PALN_COMB_LENGTH_COMPOSITE 0x07260391 -#define RT_PALN_COMB_LENGTH_SVIDEO 0x07260391 - -#define RT_PALM_COMB_LENGTH_COMPOSITE 0x07160389 -#define RT_PALM_COMB_LENGTH_SVIDEO 0x07160389 -/* End of filter settings. */ - -/* LP_AGC_CLAMP_CNTL0 */ -#define RT_NTSCM_SYNCTIP_REF0 0x00000037 -#define RT_NTSCM_SYNCTIP_REF1 0x00000029 -#define RT_NTSCM_CLAMP_REF 0x0000003B -#define RT_NTSCM_PEAKWHITE 0x000000FF -#define RT_NTSCM_VBI_PEAKWHITE 0x000000D2 /* was 0xc2 - docs say d2 */ - -#define RT_NTSCM_WPA_THRESHOLD 0x00000406 -#define RT_NTSCM_WPA_TRIGGER_LO 0x000000B3 - -#define RT_NTSCM_WPA_TRIGGER_HIGH 0x0000021B - -#define RT_NTSCM_LP_LOCKOUT_START 0x00000206 -#define RT_NTSCM_LP_LOCKOUT_END 0x00000021 -#define RT_NTSCM_CH_DTO_INC 0x00400000 -#define RT_NTSCM_CH_PLL_SGAIN 0x00000001 -#define RT_NTSCM_CH_PLL_FGAIN 0x00000002 - -#define RT_NTSCM_CR_BURST_GAIN 0x0000007A -#define RT_NTSCM_CB_BURST_GAIN 0x000000AC - -#define RT_NTSCM_CH_HEIGHT 0x000000CD -#define RT_NTSCM_CH_KILL_LEVEL 0x000000C0 -#define RT_NTSCM_CH_AGC_ERROR_LIM 0x00000002 -#define RT_NTSCM_CH_AGC_FILTER_EN 0x00000000 -#define RT_NTSCM_CH_AGC_LOOP_SPEED 0x00000000 - -#define RT_NTSCM_CRDR_ACTIVE_GAIN 0x0000007A -#define RT_NTSCM_CBDB_ACTIVE_GAIN 0x000000AC - -#define RT_NTSCM_VERT_LOCKOUT_START 0x00000207 -#define RT_NTSCM_VERT_LOCKOUT_END 0x0000000E - -#define RT_NTSCJ_SYNCTIP_REF0 0x00000004 -#define RT_NTSCJ_SYNCTIP_REF1 0x00000012 -#define RT_NTSCJ_CLAMP_REF 0x0000003B -#define RT_NTSCJ_PEAKWHITE 0x000000CB -#define RT_NTSCJ_VBI_PEAKWHITE 0x000000C2 -#define RT_NTSCJ_WPA_THRESHOLD 0x000004B0 -#define RT_NTSCJ_WPA_TRIGGER_LO 0x000000B4 -#define RT_NTSCJ_WPA_TRIGGER_HIGH 0x0000021C -#define RT_NTSCJ_LP_LOCKOUT_START 0x00000206 -#define RT_NTSCJ_LP_LOCKOUT_END 0x00000021 - -#define RT_NTSCJ_CR_BURST_GAIN 0x00000071 -#define RT_NTSCJ_CB_BURST_GAIN 0x0000009F -#define RT_NTSCJ_CH_HEIGHT 0x000000CD -#define RT_NTSCJ_CH_KILL_LEVEL 0x000000C0 -#define RT_NTSCJ_CH_AGC_ERROR_LIM 0x00000002 -#define RT_NTSCJ_CH_AGC_FILTER_EN 0x00000000 -#define RT_NTSCJ_CH_AGC_LOOP_SPEED 0x00000000 - -#define RT_NTSCJ_CRDR_ACTIVE_GAIN 0x00000071 -#define RT_NTSCJ_CBDB_ACTIVE_GAIN 0x0000009F -#define RT_NTSCJ_VERT_LOCKOUT_START 0x00000207 -#define RT_NTSCJ_VERT_LOCKOUT_END 0x0000000E - -#define RT_PAL_SYNCTIP_REF0 0x37 /* instead of 0x00000004 - Ivo */ -#define RT_PAL_SYNCTIP_REF1 0x26 /* instead of 0x0000000F - Ivo */ -#define RT_PAL_CLAMP_REF 0x0000003B -#define RT_PAL_PEAKWHITE 0xFF /* instead of 0x000000C1 - Ivo */ -#define RT_PAL_VBI_PEAKWHITE 0xC6 /* instead of 0x000000C7 - Ivo */ -#define RT_PAL_WPA_THRESHOLD 0x59C /* instead of 0x000006A4 - Ivo */ - -#define RT_PAL_WPA_TRIGGER_LO 0x00000096 -#define RT_PAL_WPA_TRIGGER_HIGH 0x000001C2 -#define RT_PAL_LP_LOCKOUT_START 0x00000263 -#define RT_PAL_LP_LOCKOUT_END 0x0000002C - -#define RT_PAL_CH_DTO_INC 0x00400000 -#define RT_PAL_CH_PLL_SGAIN 1 /* instead of 0x00000002 - Ivo */ -#define RT_PAL_CH_PLL_FGAIN 2 /* instead of 0x00000001 - Ivo */ -#define RT_PAL_CR_BURST_GAIN 0x0000007A -#define RT_PAL_CB_BURST_GAIN 0x000000AB -#define RT_PAL_CH_HEIGHT 0x0000009C -#define RT_PAL_CH_KILL_LEVEL 4 /* instead of 0x00000090 - Ivo */ -#define RT_PAL_CH_AGC_ERROR_LIM 1 /* instead of 0x00000002 - Ivo */ -#define RT_PAL_CH_AGC_FILTER_EN 1 /* instead of 0x00000000 - Ivo */ -#define RT_PAL_CH_AGC_LOOP_SPEED 0x00000000 - -#define RT_PAL_CRDR_ACTIVE_GAIN 0x9E /* instead of 0x0000007A - Ivo */ -#define RT_PAL_CBDB_ACTIVE_GAIN 0xDF /* instead of 0x000000AB - Ivo */ -#define RT_PAL_VERT_LOCKOUT_START 0x00000269 -#define RT_PAL_VERT_LOCKOUT_END 0x00000012 - -#define RT_SECAM_SYNCTIP_REF0 0x37 /* instead of 0x00000004 - Ivo */ -#define RT_SECAM_SYNCTIP_REF1 0x26 /* instead of 0x0000000F - Ivo */ -#define RT_SECAM_CLAMP_REF 0x0000003B -#define RT_SECAM_PEAKWHITE 0xFF /* instead of 0x000000C1 - Ivo */ -#define RT_SECAM_VBI_PEAKWHITE 0xC6 /* instead of 0x000000C7 - Ivo */ -#define RT_SECAM_WPA_THRESHOLD 0x57A /* instead of 0x6A4, instead of 0x0000059C is Ivo's value , -eric*/ - -#define RT_SECAM_WPA_TRIGGER_LO 0x96 /* instead of 0x0000026B - eric */ -#define RT_SECAM_WPA_TRIGGER_HIGH 0x000001C2 -#define RT_SECAM_LP_LOCKOUT_START 0x263 /* instead of 0x0000026B - eric */ -#define RT_SECAM_LP_LOCKOUT_END 0x2b /* instead of 0x0000002C -eric */ - -#define RT_SECAM_CH_DTO_INC 0x003E7A28 -#define RT_SECAM_CH_PLL_SGAIN 0x4 /* instead of 0x00000006 - Volodya */ -#define RT_SECAM_CH_PLL_FGAIN 0x7 /* instead of 0x00000006 -Volodya */ - -#define RT_SECAM_CR_BURST_GAIN 0x1FF /* instead of 0x00000200 -Volodya */ -#define RT_SECAM_CB_BURST_GAIN 0x1FF /* instead of 0x00000200 -Volodya */ -#define RT_SECAM_CH_HEIGHT 0x00000066 -#define RT_SECAM_CH_KILL_LEVEL 0x00000060 -#define RT_SECAM_CH_AGC_ERROR_LIM 0x00000003 -#define RT_SECAM_CH_AGC_FILTER_EN 0x00000000 -#define RT_SECAM_CH_AGC_LOOP_SPEED 0x00000000 - -#define RT_SECAM_CRDR_ACTIVE_GAIN 0x11B /* instead of 0x00000200 - eric */ -#define RT_SECAM_CBDB_ACTIVE_GAIN 0x15A /* instead of 0x00000200 - eric */ -#define RT_SECAM_VERT_LOCKOUT_START 0x00000269 -#define RT_SECAM_VERT_LOCKOUT_END 0x00000012 - -#define RT_PAL_VS_FIELD_BLANK_END 0x2A /* instead of 0x0000002C - Ivo*/ -#define RT_NTSCM_VS_FIELD_BLANK_END 0x0000000a - -#define RT_NTSCM_FIELD_IDLOCATION 0x00000105 -#define RT_PAL_FIELD_IDLOCATION 0x00000137 - -#define RT_NTSCM_H_ACTIVE_START 0x00000070 -#define RT_NTSCM_H_ACTIVE_END 0x00000363 - -#define RT_PAL_H_ACTIVE_START 0x0000009A -#define RT_PAL_H_ACTIVE_END 0x00000439 - -#define RT_NTSCM_V_ACTIVE_START ((22-4)*2+1) -#define RT_NTSCM_V_ACTIVE_END ((22+240-4)*2+1) - -#define RT_PAL_V_ACTIVE_START 0x2E /* instead of 0x00000023 (Same as SECAM) - Ivo */ -#define RT_PAL_V_ACTIVE_END 0x269 /* instead of 0x00000262 - Ivo */ - -/* VBI */ -#define RT_NTSCM_H_VBI_WIND_START 0x32 /* instead of 0x00000049 - V.D. */ -#define RT_NTSCM_H_VBI_WIND_END 0x367 /* instead of 0x00000366 - V.D. */ - -#define RT_PAL_H_VBI_WIND_START 0x00000084 -#define RT_PAL_H_VBI_WIND_END 0x0000041F - -#define RT_NTSCM_V_VBI_WIND_START fld_V_VBI_WIND_START_def -#define RT_NTSCM_V_VBI_WIND_END fld_V_VBI_WIND_END_def - -#define RT_PAL_V_VBI_WIND_START 0x8 /* instead of 0x0000000B - Ivo */ -#define RT_PAL_V_VBI_WIND_END 0x2D /* instead of 0x00000022 - Ivo */ - -#define RT_VBI_CAPTURE_EN 0x00000001 /* Enable */ -#define RT_VBI_CAPTURE_DIS 0x00000000 /* Disable */ -#define RT_RAW_CAPTURE 0x00000002 /* Use raw Video Capture. */ - -#define RT_NTSCM_VSYNC_INT_TRIGGER 0x2AA -#define RT_PALSEM_VSYNC_INT_TRIGGER 0x353 - -#define RT_NTSCM_VSYNC_INT_HOLD 0x17 -#define RT_PALSEM_VSYNC_INT_HOLD 0x1C - -#define RT_NTSCM_VS_FIELD_BLANK_START 0x206 -#define RT_PALSEM_VS_FIELD_BLANK_START 0x26D /* instead of 0x26C - Ivo */ - -#define RT_FIELD_FLIP_EN 0x4 -#define RT_V_FIELD_FLIP_INVERTED 0x2000 - -#define RT_NTSCM_H_IN_START 0x70 -#define RT_PAL_H_IN_START 154 /* instead of 144 - Ivo */ -#define RT_SECAM_H_IN_START 0x91 /* instead of 0x9A, Ivo value is 154, instead of 144 - Volodya, - eric */ -#define RT_NTSC_H_ACTIVE_SIZE 744 -#define RT_PAL_H_ACTIVE_SIZE 928 /* instead of 927 - Ivo */ -#define RT_SECAM_H_ACTIVE_SIZE 932 /* instead of 928, instead of 927 - Ivo, - eric */ -#define RT_NTSCM_V_IN_START (0x23) -#define RT_PAL_V_IN_START 44 /* instead of (45-6) - Ivo */ -#define RT_SECAM_V_IN_START 0x2C /* instead of (45-6) - Volodya */ -#define RT_NTSCM_V_ACTIVE_SIZE 480 -#define RT_PAL_V_ACTIVE_SIZE 572 /* instead of 575 - Ivo */ -#define RT_SECAM_V_ACTIVE_SIZE 570 /* instead of 572, instead of 575 - Ivo, - eric */ - -#define RT_NTSCM_WIN_CLOSE_LIMIT 0x4D -#define RT_NTSCJ_WIN_CLOSE_LIMIT 0x4D -#define RT_NTSC443_WIN_CLOSE_LIMIT 0x5F -#define RT_PALM_WIN_CLOSE_LIMIT 0x4D -#define RT_PALN_WIN_CLOSE_LIMIT 0x5F -#define RT_SECAM_WIN_CLOSE_LIMIT 0xC7 /* instead of 0x5F - eric */ - -#define RT_NTSCM_VS_FIELD_BLANK_START 0x206 - -#define RT_NTSCM_HS_PLL_SGAIN 0x5 -#define RT_NTSCM_HS_PLL_FGAIN 0x7 - -#define RT_NTSCM_H_OUT_WIND_WIDTH 0x2F4 -#define RT_NTSCM_V_OUT_WIND_HEIGHT 0xF0 - -#define TV 0x1 -#define LINEIN 0x2 -#define MUTE 0x3 - -#define DEC_COMPOSITE 0 -#define DEC_SVIDEO 1 -#define DEC_TUNER 2 - -#define DEC_NTSC 0 -#define DEC_PAL 1 -#define DEC_SECAM 2 -#define DEC_NTSC_J 8 - -#define DEC_SMOOTH 0 -#define DEC_SHARP 1 - -/* RT Register Field Defaults: */ -#define fld_tmpReg1_def (unsigned long) 0x00000000 -#define fld_tmpReg2_def (unsigned long) 0x00000001 -#define fld_tmpReg3_def (unsigned long) 0x00000002 - -#define fld_LP_CONTRAST_def (unsigned long) 0x0000006e -#define fld_LP_BRIGHTNESS_def (unsigned long) 0x00003ff0 -#define fld_CP_HUE_CNTL_def (unsigned long) 0x00000000 -#define fld_LUMA_FILTER_def (unsigned long) 0x00000001 -#define fld_H_SCALE_RATIO_def (unsigned long) 0x00010000 -#define fld_H_SHARPNESS_def (unsigned long) 0x00000000 - -#define fld_V_SCALE_RATIO_def (unsigned long) 0x00000800 -#define fld_V_DEINTERLACE_ON_def (unsigned long) 0x00000001 -#define fld_V_BYPSS_def (unsigned long) 0x00000000 -#define fld_V_DITHER_ON_def (unsigned long) 0x00000001 -#define fld_EVENF_OFFSET_def (unsigned long) 0x00000000 -#define fld_ODDF_OFFSET_def (unsigned long) 0x00000000 - -#define fld_INTERLACE_DETECTED_def (unsigned long) 0x00000000 - -#define fld_VS_LINE_COUNT_def (unsigned long) 0x00000000 -#define fld_VS_DETECTED_LINES_def (unsigned long) 0x00000000 -#define fld_VS_ITU656_VB_def (unsigned long) 0x00000000 - -#define fld_VBI_CC_DATA_def (unsigned long) 0x00000000 -#define fld_VBI_CC_WT_def (unsigned long) 0x00000000 -#define fld_VBI_CC_WT_ACK_def (unsigned long) 0x00000000 -#define fld_VBI_CC_HOLD_def (unsigned long) 0x00000000 -#define fld_VBI_DECODE_EN_def (unsigned long) 0x00000000 - -#define fld_VBI_CC_DTO_P_def (unsigned long) 0x00001802 -#define fld_VBI_20BIT_DTO_P_def (unsigned long) 0x0000155c - -#define fld_VBI_CC_LEVEL_def (unsigned long) 0x0000003f -#define fld_VBI_20BIT_LEVEL_def (unsigned long) 0x00000059 -#define fld_VBI_CLK_RUNIN_GAIN_def (unsigned long) 0x0000010f - -#define fld_H_VBI_WIND_START_def (unsigned long) 0x00000041 -#define fld_H_VBI_WIND_END_def (unsigned long) 0x00000366 - -#define fld_V_VBI_WIND_START_def (unsigned long) 0x0B /* instead of 0x0D - V.D. */ -#define fld_V_VBI_WIND_END_def (unsigned long) 0x24 - -#define fld_VBI_20BIT_DATA0_def (unsigned long) 0x00000000 -#define fld_VBI_20BIT_DATA1_def (unsigned long) 0x00000000 -#define fld_VBI_20BIT_WT_def (unsigned long) 0x00000000 -#define fld_VBI_20BIT_WT_ACK_def (unsigned long) 0x00000000 -#define fld_VBI_20BIT_HOLD_def (unsigned long) 0x00000000 - -#define fld_VBI_CAPTURE_ENABLE_def (unsigned long) 0x00000000 - -#define fld_VBI_EDS_DATA_def (unsigned long) 0x00000000 -#define fld_VBI_EDS_WT_def (unsigned long) 0x00000000 -#define fld_VBI_EDS_WT_ACK_def (unsigned long) 0x00000000 -#define fld_VBI_EDS_HOLD_def (unsigned long) 0x00000000 - -#define fld_VBI_SCALING_RATIO_def (unsigned long) 0x00010000 -#define fld_VBI_ALIGNER_ENABLE_def (unsigned long) 0x00000000 - -#define fld_H_ACTIVE_START_def (unsigned long) 0x00000070 -#define fld_H_ACTIVE_END_def (unsigned long) 0x000002f0 - -#define fld_V_ACTIVE_START_def (unsigned long) ((22-4)*2+1) -#define fld_V_ACTIVE_END_def (unsigned long) ((22+240-4)*2+2) - -#define fld_CH_HEIGHT_def (unsigned long) 0x000000CD -#define fld_CH_KILL_LEVEL_def (unsigned long) 0x000000C0 -#define fld_CH_AGC_ERROR_LIM_def (unsigned long) 0x00000002 -#define fld_CH_AGC_FILTER_EN_def (unsigned long) 0x00000000 -#define fld_CH_AGC_LOOP_SPEED_def (unsigned long) 0x00000000 - -#define fld_HUE_ADJ_def (unsigned long) 0x00000000 - -#define fld_STANDARD_SEL_def (unsigned long) 0x00000000 -#define fld_STANDARD_YC_def (unsigned long) 0x00000000 - -#define fld_ADC_PDWN_def (unsigned long) 0x00000001 -#define fld_INPUT_SELECT_def (unsigned long) 0x00000000 - -#define fld_ADC_PREFLO_def (unsigned long) 0x00000003 -#define fld_H_SYNC_PULSE_WIDTH_def (unsigned long) 0x00000000 -#define fld_HS_GENLOCKED_def (unsigned long) 0x00000000 -#define fld_HS_SYNC_IN_WIN_def (unsigned long) 0x00000000 - -#define fld_VIN_ASYNC_RST_def (unsigned long) 0x00000001 -#define fld_DVS_ASYNC_RST_def (unsigned long) 0x00000001 - -/* Vendor IDs: */ -#define fld_VIP_VENDOR_ID_def (unsigned long) 0x00001002 -#define fld_VIP_DEVICE_ID_def (unsigned long) 0x00004d54 -#define fld_VIP_REVISION_ID_def (unsigned long) 0x00000001 - -/* AGC Delay Register */ -#define fld_BLACK_INT_START_def (unsigned long) 0x00000031 -#define fld_BLACK_INT_LENGTH_def (unsigned long) 0x0000000f - -#define fld_UV_INT_START_def (unsigned long) 0x0000003b -#define fld_U_INT_LENGTH_def (unsigned long) 0x0000000f -#define fld_V_INT_LENGTH_def (unsigned long) 0x0000000f -#define fld_CRDR_ACTIVE_GAIN_def (unsigned long) 0x0000007a -#define fld_CBDB_ACTIVE_GAIN_def (unsigned long) 0x000000ac - -#define fld_DVS_DIRECTION_def (unsigned long) 0x00000000 -#define fld_DVS_VBI_CARD8_SWAP_def (unsigned long) 0x00000000 -#define fld_DVS_CLK_SELECT_def (unsigned long) 0x00000000 -#define fld_CONTINUOUS_STREAM_def (unsigned long) 0x00000000 -#define fld_DVSOUT_CLK_DRV_def (unsigned long) 0x00000001 -#define fld_DVSOUT_DATA_DRV_def (unsigned long) 0x00000001 - -#define fld_COMB_CNTL0_def (unsigned long) 0x09438090 -#define fld_COMB_CNTL1_def (unsigned long) 0x00000010 - -#define fld_COMB_CNTL2_def (unsigned long) 0x16161010 -#define fld_COMB_LENGTH_def (unsigned long) 0x0718038A - -#define fld_SYNCTIP_REF0_def (unsigned long) 0x00000037 -#define fld_SYNCTIP_REF1_def (unsigned long) 0x00000029 -#define fld_CLAMP_REF_def (unsigned long) 0x0000003B -#define fld_AGC_PEAKWHITE_def (unsigned long) 0x000000FF -#define fld_VBI_PEAKWHITE_def (unsigned long) 0x000000D2 - -#define fld_WPA_THRESHOLD_def (unsigned long) 0x000003B0 - -#define fld_WPA_TRIGGER_LO_def (unsigned long) 0x000000B4 -#define fld_WPA_TRIGGER_HIGH_def (unsigned long) 0x0000021C - -#define fld_LOCKOUT_START_def (unsigned long) 0x00000206 -#define fld_LOCKOUT_END_def (unsigned long) 0x00000021 - -#define fld_CH_DTO_INC_def (unsigned long) 0x00400000 -#define fld_PLL_SGAIN_def (unsigned long) 0x00000001 -#define fld_PLL_FGAIN_def (unsigned long) 0x00000002 - -#define fld_CR_BURST_GAIN_def (unsigned long) 0x0000007a -#define fld_CB_BURST_GAIN_def (unsigned long) 0x000000ac - -#define fld_VERT_LOCKOUT_START_def (unsigned long) 0x00000207 -#define fld_VERT_LOCKOUT_END_def (unsigned long) 0x0000000E - -#define fld_H_IN_WIND_START_def (unsigned long) 0x00000070 -#define fld_V_IN_WIND_START_def (unsigned long) 0x00000027 - -#define fld_H_OUT_WIND_WIDTH_def (unsigned long) 0x000002f4 - -#define fld_V_OUT_WIND_WIDTH_def (unsigned long) 0x000000f0 - -#define fld_HS_LINE_TOTAL_def (unsigned long) 0x0000038E - -#define fld_MIN_PULSE_WIDTH_def (unsigned long) 0x0000002F -#define fld_MAX_PULSE_WIDTH_def (unsigned long) 0x00000046 - -#define fld_WIN_CLOSE_LIMIT_def (unsigned long) 0x0000004D -#define fld_WIN_OPEN_LIMIT_def (unsigned long) 0x000001B7 - -#define fld_VSYNC_INT_TRIGGER_def (unsigned long) 0x000002AA - -#define fld_VSYNC_INT_HOLD_def (unsigned long) 0x0000001D - -#define fld_VIN_M0_def (unsigned long) 0x00000039 -#define fld_VIN_N0_def (unsigned long) 0x0000014c -#define fld_MNFLIP_EN_def (unsigned long) 0x00000000 -#define fld_VIN_P_def (unsigned long) 0x00000006 -#define fld_REG_CLK_SEL_def (unsigned long) 0x00000000 - -#define fld_VIN_M1_def (unsigned long) 0x00000000 -#define fld_VIN_N1_def (unsigned long) 0x00000000 -#define fld_VIN_DRIVER_SEL_def (unsigned long) 0x00000000 -#define fld_VIN_MNFLIP_REQ_def (unsigned long) 0x00000000 -#define fld_VIN_MNFLIP_DONE_def (unsigned long) 0x00000000 -#define fld_TV_LOCK_TO_VIN_def (unsigned long) 0x00000000 -#define fld_TV_P_FOR_WINCLK_def (unsigned long) 0x00000004 - -#define fld_VINRST_def (unsigned long) 0x00000001 -#define fld_VIN_CLK_SEL_def (unsigned long) 0x00000000 - -#define fld_VS_FIELD_BLANK_START_def (unsigned long) 0x00000206 - -#define fld_VS_FIELD_BLANK_END_def (unsigned long) 0x0000000A - -/*#define fld_VS_FIELD_IDLOCATION_def (unsigned long) 0x00000105 */ -#define fld_VS_FIELD_IDLOCATION_def (unsigned long) 0x00000001 -#define fld_VS_FRAME_TOTAL_def (unsigned long) 0x00000217 - -#define fld_SYNC_TIP_START_def (unsigned long) 0x00000372 -#define fld_SYNC_TIP_LENGTH_def (unsigned long) 0x0000000F - -#define fld_GAIN_FORCE_DATA_def (unsigned long) 0x00000000 -#define fld_GAIN_FORCE_EN_def (unsigned long) 0x00000000 -#define fld_I_CLAMP_SEL_def (unsigned long) 0x00000003 -#define fld_I_AGC_SEL_def (unsigned long) 0x00000001 -#define fld_EXT_CLAMP_CAP_def (unsigned long) 0x00000001 -#define fld_EXT_AGC_CAP_def (unsigned long) 0x00000001 -#define fld_DECI_DITHER_EN_def (unsigned long) 0x00000001 -#define fld_ADC_PREFHI_def (unsigned long) 0x00000000 -#define fld_ADC_CH_GAIN_SEL_def (unsigned long) 0x00000001 - -#define fld_HS_PLL_SGAIN_def (unsigned long) 0x00000003 - -#define fld_NREn_def (unsigned long) 0x00000000 -#define fld_NRGainCntl_def (unsigned long) 0x00000000 -#define fld_NRBWTresh_def (unsigned long) 0x00000000 -#define fld_NRGCTresh_def (unsigned long) 0x00000000 -#define fld_NRCoefDespeclMode_def (unsigned long) 0x00000000 - -#define fld_GPIO_5_OE_def (unsigned long) 0x00000000 -#define fld_GPIO_6_OE_def (unsigned long) 0x00000000 - -#define fld_GPIO_5_OUT_def (unsigned long) 0x00000000 -#define fld_GPIO_6_OUT_def (unsigned long) 0x00000000 -/* End of field default values. */ - -#endif /* _RADEON_H */ - diff --git a/include/radeonfb.h b/include/radeonfb.h deleted file mode 100644 index 287cff6..0000000 --- a/include/radeonfb.h +++ /dev/null @@ -1,673 +0,0 @@ -#ifndef __RADEONFB_H__ -#define __RADEONFB_H__ - -#include -#include "pci.h" -#include "mod_devicetable.h" -#include "pci_ids.h" -#include "fb.h" -#include "i2c.h" -#include "i2c-algo-bit.h" -#include "util.h" /* for swpX() */ -#include "wait.h" - -//#include "radeon_theatre.h" - -#include "radeon_reg.h" - -/* Buffer are aligned on 4096 byte boundaries */ -#define RADEON_BUFFER_ALIGN 0x00000fff - -#define RADEON_IDLE_RETRY 16 /* Fall out of idle loops after this count */ -#define RADEON_TIMEOUT 2000000 /* Fall out of wait loops after this count */ -#define RADEON_MMIOSIZE 0x80000 - -#define RADEON_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1)) - -#define ATY_RADEON_LCD_ON 0x00000001 -#define ATY_RADEON_CRT_ON 0x00000002 - -#define FBIO_RADEON_GET_MIRROR 0x80044003 -#define FBIO_RADEON_SET_MIRROR 0xC0044004 - -/*************************************************************** - * Most of the definitions here are adapted right from XFree86 * - ***************************************************************/ - -/* - * Chip families. Must fit in the low 16 bits of a int32_t word - */ -enum radeon_family -{ - CHIP_FAMILY_UNKNOW, - CHIP_FAMILY_LEGACY, - CHIP_FAMILY_RADEON, - CHIP_FAMILY_RV100, - CHIP_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/ - CHIP_FAMILY_RV200, - CHIP_FAMILY_RS200, /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), RS250 (IGP 7000) */ - CHIP_FAMILY_R200, - CHIP_FAMILY_RV250, - CHIP_FAMILY_RS300, /* Radeon 9000 IGP */ - CHIP_FAMILY_RV280, - CHIP_FAMILY_R300, - CHIP_FAMILY_R350, - CHIP_FAMILY_RV350, - CHIP_FAMILY_RV380, /* RV370/RV380/M22/M24 */ - CHIP_FAMILY_R420, /* R420/R423/M18 */ - CHIP_FAMILY_LAST, -}; - -#define IS_RV100_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_RV100) || \ - ((rinfo)->family == CHIP_FAMILY_RV200) || \ - ((rinfo)->family == CHIP_FAMILY_RS100) || \ - ((rinfo)->family == CHIP_FAMILY_RS200) || \ - ((rinfo)->family == CHIP_FAMILY_RV250) || \ - ((rinfo)->family == CHIP_FAMILY_RV280) || \ - ((rinfo)->family == CHIP_FAMILY_RS300)) - - -#define IS_R300_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_R300) || \ - ((rinfo)->family == CHIP_FAMILY_RV350) || \ - ((rinfo)->family == CHIP_FAMILY_R350) || \ - ((rinfo)->family == CHIP_FAMILY_RV380) || \ - ((rinfo)->family == CHIP_FAMILY_R420)) - -/* - * Chip flags - */ -enum radeon_chip_flags -{ - CHIP_FAMILY_MASK = 0x0000ffffUL, - CHIP_FLAGS_MASK = 0xffff0000UL, - CHIP_IS_MOBILITY = 0x00010000UL, - CHIP_IS_IGP = 0x00020000UL, - CHIP_HAS_CRTC2 = 0x00040000UL, -}; - -/* - * Errata workarounds - */ -enum radeon_errata -{ - CHIP_ERRATA_R300_CG = 0x00000001, - CHIP_ERRATA_PLL_DUMMYREADS = 0x00000002, - CHIP_ERRATA_PLL_DELAY = 0x00000004, -}; - - -/* - * Monitor types - */ -enum radeon_montype -{ - MT_NONE = 0, - MT_CRT, /* CRT */ - MT_LCD, /* LCD */ - MT_DFP, /* DVI */ - MT_CTV, /* composite TV */ - MT_STV /* S-Video out */ -}; - -/* - * DDC i2c ports - */ -enum ddc_type -{ - ddc_none, - ddc_monid, - ddc_dvi, - ddc_vga, - ddc_crt2, -}; - -/* - * Connector types - */ -enum conn_type -{ - conn_none, - conn_proprietary, - conn_crt, - conn_DVI_I, - conn_DVI_D, -}; - - -/* - * PLL infos - */ -struct pll_info -{ - int32_t ppll_max; - int32_t ppll_min; - int32_t sclk, mclk; - int32_t ref_div; - int32_t ref_clk; -}; - - -/* - * This structure contains the various registers manipulated by this - * driver for setting or restoring a mode. It's mostly copied from - * XFree's RADEONSaveRec structure. A few chip settings might still be - * tweaked without beeing reflected or saved in these registers though - */ -struct radeon_regs -{ - /* Common registers */ - uint32_t ovr_clr; - uint32_t ovr_wid_left_right; - uint32_t ovr_wid_top_bottom; - uint32_t ov0_scale_cntl; - uint32_t mpp_tb_config; - uint32_t mpp_gp_config; - uint32_t subpic_cntl; - uint32_t viph_control; - uint32_t i2c_cntl_1; - uint32_t gen_int32_t_cntl; - uint32_t cap0_trig_cntl; - uint32_t cap1_trig_cntl; - uint32_t bus_cntl; - uint32_t surface_cntl; - uint32_t bios_5_scratch; - - /* Other registers to save for VT switches or driver load/unload */ - uint32_t dp_datatype; - uint32_t rbbm_soft_reset; - uint32_t clock_cntl_index; - uint32_t amcgpio_en_reg; - uint32_t amcgpio_mask; - - /* Surface/tiling registers */ - uint32_t surf_lower_bound[8]; - uint32_t surf_upper_bound[8]; - uint32_t surf_info[8]; - - /* CRTC registers */ - uint32_t crtc_gen_cntl; - uint32_t crtc_ext_cntl; - uint32_t dac_cntl; - uint32_t crtc_h_total_disp; - uint32_t crtc_h_sync_strt_wid; - uint32_t crtc_v_total_disp; - uint32_t crtc_v_sync_strt_wid; - uint32_t crtc_offset; - uint32_t crtc_offset_cntl; - uint32_t crtc_pitch; - uint32_t disp_merge_cntl; - uint32_t grph_buffer_cntl; - uint32_t crtc_more_cntl; - - /* CRTC2 registers */ - uint32_t crtc2_gen_cntl; - uint32_t dac2_cntl; - uint32_t disp_output_cntl; - uint32_t disp_hw_debug; - uint32_t disp2_merge_cntl; - uint32_t grph2_buffer_cntl; - uint32_t crtc2_h_total_disp; - uint32_t crtc2_h_sync_strt_wid; - uint32_t crtc2_v_total_disp; - uint32_t crtc2_v_sync_strt_wid; - uint32_t crtc2_offset; - uint32_t crtc2_offset_cntl; - uint32_t crtc2_pitch; - - /* Flat panel regs */ - uint32_t fp_crtc_h_total_disp; - uint32_t fp_crtc_v_total_disp; - uint32_t fp_gen_cntl; - uint32_t fp2_gen_cntl; - uint32_t fp_h_sync_strt_wid; - uint32_t fp2_h_sync_strt_wid; - uint32_t fp_horz_stretch; - uint32_t fp_panel_cntl; - uint32_t fp_v_sync_strt_wid; - uint32_t fp2_v_sync_strt_wid; - uint32_t fp_vert_stretch; - uint32_t lvds_gen_cntl; - uint32_t lvds_pll_cntl; - uint32_t tmds_crc; - uint32_t tmds_transmitter_cntl; - - /* Computed values for PLL */ - uint32_t dot_clock_freq; - uint32_t pll_output_freq; - int32_t feedback_div; - int32_t post_div; - - /* PLL registers */ - uint32_t ppll_div_3; - uint32_t ppll_ref_div; - uint32_t vclk_ecp_cntl; - uint32_t clk_cntl_index; - uint32_t htotal_cntl; - - /* Computed values for PLL2 */ - uint32_t dot_clock_freq_2; - uint32_t pll_output_freq_2; - int32_t feedback_div_2; - int32_t post_div_2; - - /* PLL2 registers */ - uint32_t p2pll_ref_div; - uint32_t p2pll_div_0; - uint32_t htotal_cntl2; -}; - -struct panel_info -{ - int32_t xres, yres; - int32_t valid; - int32_t clock; - int32_t hOver_plus, hSync_width, hblank; - int32_t vOver_plus, vSync_width, vblank; - int32_t hAct_high, vAct_high, int32_terlaced; - int32_t pwr_delay; - int32_t use_bios_dividers; - int32_t ref_divider; - int32_t post_divider; - int32_t fbk_divider; -}; - -struct radeonfb_info; - -#ifdef CONFIG_FB_RADEON_I2C -struct radeon_i2c_chan -{ - struct radeonfb_info *rinfo; - uint32_t ddc_reg; - struct i2c_adapter adapter; - struct i2c_algo_bit_data algo; -}; -#endif - -enum radeon_pm_mode -{ - radeon_pm_none = 0, /* Nothing supported */ - radeon_pm_d2 = 0x00000001, /* Can do D2 state */ - radeon_pm_off = 0x00000002, /* Can resume from D3 cold */ -}; - -typedef struct -{ - uint8_t table_revision; - uint8_t table_size; - uint8_t tuner_type; - uint8_t audio_chip; - uint8_t product_id; - uint8_t tuner_voltage_teletext_fm; - uint8_t i2s_config; /* configuration of the sound chip */ - uint8_t video_decoder_type; - uint8_t video_decoder_host_config; - uint8_t input[5]; -} _MM_TABLE; - -struct radeonfb_info -{ - int32_t handle; /* PCI BIOS, must be 1st place */ - int32_t big_endian; /* PCI BIOS */ - - uint32_t cursor_x; - uint32_t cursor_y; - int32_t cursor_show; - uint32_t cursor_start; - uint32_t cursor_end; - int32_t cursor_fg; - int32_t cursor_bg; - - int32_t fifo_slots; /* Free slots in the FIFO (64 max) */ - - /* Computed values for Radeon */ - uint32_t dp_gui_master_cntl_clip; - uint32_t trans_color; - - /* Saved values for ScreenToScreenCopy */ - int32_t xdir; - int32_t ydir; - - /* ScanlineScreenToScreenColorExpand support */ - int32_t scanline_h; - int32_t scanline_words; - int32_t scanline_bpp; /* Only used for ImageWrite */ - - /* Saved values for DashedTwoPoint32_tLine */ - int32_t dashLen; - uint32_t dashPattern; - int32_t dash_fg; - int32_t dash_bg; - - struct fb_info *info; - - struct radeon_regs state; - struct radeon_regs init_state; - - uint8_t name[50]; - - uint32_t io_base_phys; - uint32_t mmio_base_phys; - uint32_t fb_base_phys; - - void *io_base; - void *mmio_base; - void *fb_base; - - uint32_t fb_local_base; - uint32_t fb_offset; - - uint32_t bios_seg_phys; - void *bios_seg; - int32_t fp_bios_start; - - struct - { - uint8_t red; - uint8_t green; - uint8_t blue; - uint8_t pad; - } palette[256]; - - int32_t chipset; - uint8_t family; - uint8_t rev; - int32_t errata; - uint32_t video_ram; - uint32_t mapped_vram; - int32_t vram_width; - int32_t vram_ddr; - - int32_t pitch, bpp, depth; - - int32_t has_CRTC2; - int32_t is_mobility; - int32_t is_IGP; - int32_t reversed_DAC; - int32_t reversed_TMDS; - struct panel_info panel_info; - int32_t mon1_type; - uint8_t *mon1_EDID; - struct fb_videomode *mon1_modedb; - int32_t mon1_dbsize; - int32_t mon2_type; - uint8_t *mon2_EDID; - - uint32_t dp_gui_master_cntl; - - struct pll_info bios_pll; - struct pll_info pll; - - uint32_t save_regs[100]; - int32_t asleep; - int32_t lock_blank; - int32_t dynclk; - int32_t no_schedule; - enum radeon_pm_mode pm_mode; - - /* Timer used for delayed LVDS operations */ - int32_t lvds_timer; - uint32_t pending_lvds_gen_cntl; - -#ifdef CONFIG_FB_RADEON_I2C - struct radeon_i2c_chan i2c[4]; -#endif - - /* Texture */ - - int32_t RenderInited3D; - int32_t tilingEnabled; - void *RenderTex; - uint32_t RenderTexOffset; - int32_t RenderTexSize; - void (*RenderCallback)(struct radeonfb_info *rinfo); - uint32_t RenderTimeout; - uint32_t dst_pitch_offset; - - -#ifdef _NOT_USED_ - /* Video & theatre */ - - TheatrePtr theatre; - - int32_t MM_TABLE_valid; - _MM_TABLE MM_TABLE; - - int32_t RageTheatreCrystal; - int32_t RageTheatreTunerPort; - int32_t RageTheatreCompositePort; - int32_t RageTheatreSVideoPort; - int32_t tunerType; - - int32_t videoStatus; - int32_t encoding; - int32_t overlay_deint32_terlacing_method; - int32_t video_stream_active; - int32_t capture_vbi_data; - int32_t v; - void *videoLinear; - int32_t videoLinearSize; - struct - { - uint32_t y,u,v; - } videoLinearOffset; -#endif /* _NOT_USED_ */ - - int32_t dec_hue; - int32_t dec_saturation; - int32_t dec_contrast; - int32_t dec_brightness; -}; - -#define PRIMARY_MONITOR(rinfo) (rinfo->mon1_type) - -/* - * IO macros - */ - -/* - * Note about this function: we have some rare cases where we must not schedule, - * this typically happen with our special "wake up early" hook which allows us to - * wake up the graphic chip (and thus get the console back) before everything else - * on some machines that support that mecanism. At this point, intterrupts are off - * and scheduling is not permitted - */ -static inline void _radeon_msleep(struct radeonfb_info *rinfo, uint32_t ms) -{ - wait_ms(ms); -} - -#define radeon_msleep(ms) _radeon_msleep(rinfo,ms) - -extern void _OUTREGP(struct radeonfb_info *rinfo, uint32_t addr, uint32_t val, uint32_t mask); -extern void radeon_pll_errata_after_index(struct radeonfb_info *rinfo); -extern void radeon_pll_errata_after_data(struct radeonfb_info *rinfo); -extern uint32_t __INPLL(struct radeonfb_info *rinfo, uint32_t addr); -extern void __OUTPLL(struct radeonfb_info *rinfo, uint32_t index, uint32_t val); -extern void __OUTPLLP(struct radeonfb_info *rinfo, uint32_t index, uint32_t val, uint32_t mask); - -#define INREG8(addr) *((uint8_t *)(rinfo->mmio_base + addr)) -#define INREG16(addr) swpw(*(uint16_t *)(rinfo->mmio_base + addr)) -#define INREG(addr) swpl(*(uint32_t *)(rinfo->mmio_base + addr)) -#define OUTREG8(addr, val) (*((uint8_t *)(rinfo->mmio_base + addr)) = val) -#define OUTREG16(addr, val) (*((uint16_t *)(rinfo->mmio_base + addr)) = swpw(val)) -#define OUTREG(addr, val) (*((uint32_t *)(rinfo->mmio_base + addr)) = swpl(val)) - -extern int32_t *tab_funcs_pci; -#define BIOS_IN8(v) (* ((uint8_t *) rinfo->bios_seg_phys + v)) -#define BIOS_IN16(v) (swpw(*(uint16_t *) ((uint8_t *) rinfo->bios_seg_phys + v))) -#define BIOS_IN32(v) (swpl(*(uint32_t *) ((uint8_t *) rinfo->bios_seg_phys + v))) - -#define ADDRREG(addr) ((volatile uint32_t *)(rinfo->mmio_base + (addr))) -#define OUTREGP(addr, val, mask) _OUTREGP(rinfo, addr, val, mask) -#define INPLL(addr) __INPLL(rinfo, addr) -#define OUTPLL(index, val) __OUTPLL(rinfo, index, val) -#define OUTPLLP(index, val, mask) __OUTPLLP(rinfo, index, val, mask) - -/* - * Inline utilities - */ - -static inline uint32_t radeon_get_dstbpp(uint16_t depth) -{ - switch(depth) - { - case 8: return DST_8BPP; - case 15: return DST_15BPP; - case 16: return DST_16BPP; - case 32: return DST_32BPP; - default: return 0; - } -} - -/* I2C Functions */ -extern void radeon_create_i2c_busses(struct radeonfb_info *rinfo); -extern void radeon_delete_i2c_busses(struct radeonfb_info *rinfo); -extern int32_t radeon_probe_i2c_connector(struct radeonfb_info *rinfo, int32_t conn, uint8_t **out_edid); - -/* PM Functions */ -/* extern int32_t radeonfb_pci_suspend(struct pci_dev *pdev, uint32_t state); -extern int32_t radeonfb_pci_resume(struct pci_dev *pdev); */ -extern void radeonfb_pm_init(struct radeonfb_info *rinfo, int32_t dynclk); -extern void radeonfb_pm_exit(struct radeonfb_info *rinfo); - -/* Monitor probe functions */ -extern void radeon_probe_screens(struct radeonfb_info *rinfo, - const char *monitor_layout, int ignore_edid); -extern void radeon_check_modes(struct radeonfb_info *rinfo, struct mode_option *resolution); -extern int radeon_match_mode(struct radeonfb_info *rinfo, - struct fb_var_screeninfo *dest, - const struct fb_var_screeninfo *src); - -/* Video functions */ -void RADEONResetVideo(struct radeonfb_info *rinfo); -int32_t RADEONVIP_read(struct radeonfb_info *rinfo, uint32_t address, uint32_t count, uint8_t *buffer); -int32_t RADEONVIP_fifo_read(struct radeonfb_info *rinfo, uint32_t address, uint32_t count, uint8_t *buffer); -int32_t RADEONVIP_write(struct radeonfb_info *rinfo, uint32_t address, uint32_t count, uint8_t *buffer); -int32_t RADEONVIP_fifo_write(struct radeonfb_info *rinfo, uint32_t address, uint32_t count, uint8_t *buffer); -void RADEONVIP_reset(struct radeonfb_info *rinfo); - -void RADEONInitVideo(struct radeonfb_info *rinfo); -void RADEONShutdownVideo(struct radeonfb_info *rinfo); -int32_t RADEONPutVideo(struct radeonfb_info *rinfo, int32_t src_x, int32_t src_y, int32_t src_w, int32_t src_h, - int32_t drw_x, int32_t drw_y, int32_t drw_w, int32_t drw_h); -void RADEONStopVideo(struct radeonfb_info *rinfo, int32_t cleanup); - -/* Theatre functions */ -//extern TheatrePtr DetectTheatre(struct radeonfb_info *rinfo); -//extern void RT_SetTint32_t(TheatrePtr t, int32_t hue); -//extern void RT_SetSaturation(TheatrePtr t, int32_t Saturation); -//extern void RT_SetBrightness(TheatrePtr t, int32_t Brightness); -//extern void RT_SetSharpness(TheatrePtr t, uint16_t wSharpness); -//extern void RT_SetContrast(TheatrePtr t, int32_t Contrast); -//extern void RT_SetInterlace(TheatrePtr t, uint8_t bInterlace); -//extern void RT_SetStandard(TheatrePtr t, uint16_t wStandard); -//extern void RT_SetCombFilter(TheatrePtr t, uint16_t wStandard, uint16_t wConnector); -//extern void RT_SetOutputVideoSize(TheatrePtr t, uint16_t wHorzSize, uint16_t wVertSize, uint8_t fCC_On, uint8_t fVBICap_On); -//extern void RT_SetConnector(TheatrePtr t, uint16_t wConnector, int32_t tunerFlag); -//extern void InitTheatre(TheatrePtr t); -//extern void ShutdownTheatre(TheatrePtr t); -//extern void ResetTheatreRegsForNoTVout(TheatrePtr t); -//extern void ResetTheatreRegsForTVout(TheatrePtr t); -extern void RADEONVIP_reset(struct radeonfb_info *rinfo); - -/* Accel functions */ - -extern void radeon_wait_for_fifo_function(struct radeonfb_info *rinfo, int entries); -extern void radeon_engine_flush(struct radeonfb_info *rinfo); -extern void radeon_engine_reset(struct radeonfb_info *rinfo); -extern void radeon_engine_restore(struct radeonfb_info *rinfo); -extern void radeon_engine_init(struct radeonfb_info *rinfo); -extern void radeon_wait_for_idle_mmio(struct radeonfb_info *rinfo); - -#define radeon_engine_idle() radeon_wait_for_idle_mmio(rinfo) - -#define radeon_wait_for_fifo(rinfo, entries) \ -do \ -{ \ - if (rinfo->fifo_slots < entries) \ - radeon_wait_for_fifo_function(rinfo, entries); \ - rinfo->fifo_slots -= entries; \ -} while (0) - -static inline int radeonfb_sync(struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; - radeon_engine_idle(); - return 0; -} - -extern void radeon_restore_accel_state_mmio(struct fb_info *info); -extern void radeon_setup_for_solid_fill(struct fb_info *info, int color, int rop, unsigned int planemask); -extern void radeon_subsequent_solid_fill_rect_mmio(struct fb_info *info, int x, int y, int w, int h); -extern void radeon_setup_for_solid_line_mmio(struct fb_info *info, int color, int rop, unsigned int planemask); -extern void radeon_subsequent_solid_hor_vert_line_mmio(struct fb_info *info, int x, int y, int len, int dir); -extern void radeon_subsequent_solid_two_point_line_mmio(struct fb_info *info, int xa, int ya, int xb, - int yb, int flags); -extern void radeon_setup_for_dashed_line_mmio(struct fb_info *info, int fg, int bg, - int rop, unsigned int planemask, int length, unsigned char *pattern); -extern void radeon_subsequent_dashed_two_point_line_mmio(struct fb_info *info, - int xa, int ya, int xb, int yb, int flags, int phase); -extern void radeon_setup_for_screen_to_screen_copy_mmio(struct fb_info *info, - int xdir, int ydir, int rop, unsigned int planemask, int trans_color); -extern void radeon_subsequent_screen_to_screen_copy_mmio(struct fb_info *info, - int xa, int ya, int xb, int yb, int w, int h); -extern void radeon_screen_to_screen_copy_mmio(struct fb_info *info, - int xa, int ya, int xb, int yb, int w, int h, int rop); -extern void radeon_setup_for_mono_8x8_pattern_fill_mmio(struct fb_info *info, - int patternx, int patterny, int fg, int bg, int rop, unsigned int planemask); -extern void radeon_subsequent_mono_8x8_pattern_fill_rect_mmio(struct fb_info *info, - int patternx, int patterny, int x, int y, int w, int h); -extern void radeon_setup_for_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info, - int fg, int bg, int rop, unsigned int planemask); -extern void radeon_subsequent_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info, - int x, int y, int w, int h, int skipleft); -extern void radeon_subsequent_scanline_mmio(struct fb_info *info, unsigned long *buf); -extern void radeon_setup_for_scanline_image_write_mmio(struct fb_info *info, - int rop, unsigned int planemask, int trans_color, int bpp); -extern void radeon_subsequent_scanline_image_write_rect_mmio(struct fb_info *info, - int x, int y, int w, int h, int skipleft); -extern void radeon_set_clipping_rectangle_mmio(struct fb_info *info, - int xa, int ya, int xb, int yb); -extern void radeon_disable_clipping_mmio(struct fb_info *info); - -extern int32_t radeon_setup_for_cpu_to_screen_alpha_texture_mmio(struct fb_info *info, - int op, int red, int green, int blue, - int alpha, int maskFormat, int dstFormat, - uint8_t *alphaPtr, int alphaPitch, - int width, int height, int32_t flags); -extern int32_t radeon_setup_for_cpu_to_screen_texture_mmio(struct fb_info *info, int32_t op, - uint32_t srcFormat, uint32_t dstFormat, - uint8_t *texPtr, int32_t texPitch, - int32_t width, int32_t height, int32_t flags); -extern void radeon_subsequent_cpu_to_screen_texture_mmio(struct fb_info *info, - int32_t dstx, int32_t dsty, - int32_t srcx, int32_t srcy, - int32_t width, int32_t height); -/* Cursor functions */ -extern void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg); -extern void radeon_set_cursor_position(struct fb_info *info, int x, int y); -extern void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom); -extern void radeon_hide_cursor(struct fb_info *info); -extern void radeon_show_cursor(struct fb_info *info); -extern long radeon_cursor_init(struct fb_info *info); - -/* Other functions */ -extern int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t mode_switch); -extern void radeon_write_mode(struct radeonfb_info *rinfo, struct radeon_regs *mode, int32_t reg_only); -int radeonfb_setcolreg(unsigned regno, unsigned red, unsigned green, - unsigned blue, unsigned transp, struct fb_info *info); -extern int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent); -extern void radeonfb_pci_unregister(void); - -/* global */ -extern const char monitor_layout[]; -extern int16_t default_dynclk; -extern int16_t ignore_edid; -extern int16_t mirror; -extern int16_t virtual; -extern int16_t force_measure_pll; -extern int16_t zoom_mouse; - -extern struct pci_device_id radeonfb_pci_table[]; - -#endif /* __RADEONFB_H__ */ diff --git a/include/s19reader.h b/include/s19reader.h deleted file mode 100644 index af0c3ec..0000000 --- a/include/s19reader.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * s19reader.h - * - * Created on: 17.11.2012 - * Author: mfro - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2012 M. Froeschle - * - */ - -#ifndef _S19READER_H_ -#define _S19READER_H_ - -typedef enum -{ - OK, /* no error */ - FAIL, /* general error aka "I don't know what went wrong" */ - FILE_OPEN, /* file open failed */ - FILE_READ, /* file read failed */ - SREC_CORRUPT, /* file doesn't seem to contain valid S-records */ - MEMCPY_FAILED, /* could not copy buffer to destination */ - CODE_OVERLAPS, /* copying would overwrite ourself */ - VERIFY_FAILED, /* destination does not read as we've written to */ - ILLEGAL_SECTOR /* flash sector number invalid */ -} err_t; - -typedef err_t (*memcpy_callback_t)(uint8_t *dst, uint8_t *src, size_t length); - -extern void srec_execute(char *filename); -extern err_t read_srecords(char *filename, void **start_address, uint32_t *actual_length, memcpy_callback_t callback); - -#endif /* _S19READER_H_ */ diff --git a/include/screen.h b/include/screen.h deleted file mode 100644 index 0b53e56..0000000 --- a/include/screen.h +++ /dev/null @@ -1,122 +0,0 @@ -/* - * screen.h - low-level screen routines - * - * Copyright (c) 2001-2013 The EmuTOS development team - * - * Authors: - * LVL Laurent Vogel - * THH Thomas Huth - * - * This file is distributed under the GPL, version 2 or at your - * option any later version. See doc/license.txt for details. - */ - -#ifndef SCREEN_H -#define SCREEN_H - -#define ST_VRAM_SIZE 32000UL -#define TT_VRAM_SIZE 153600UL -#define FALCON_VRAM_SIZE 307200UL - -#define VIDEOBASE_ADDR_HI 0xffff8201L -#define VIDEOBASE_ADDR_MID 0xffff8203L -#define VIDEOBASE_ADDR_LOW 0xffff820dL - -#define SYNCMODE 0xffff820aL - -#define ST_SHIFTER 0xffff8260L -#define TT_SHIFTER 0xffff8262L -#define SPSHIFT 0xffff8266L - -#define TT_SHIFTER_BITMASK 0x970f /* valid bits in TT_SHIFTER */ - -#define ST_PALETTE_REGS 0xffff8240L -#define FALCON_PALETTE_REGS 0xffff9800L - -#define TT_PALETTE_BITMASK 0x0fff /* valid bits in TT_PALETTE_REGS */ - -/* misc routines */ -int16_t check_moderez(int16_t moderez); -void initialise_palette_registers(int16_t rez,int16_t mode); - -/* hardware dependant xbios routines */ - -int16_t esetshift(int16_t mode); -int16_t egetshift(void); -int16_t esetbank(int16_t bank); -int16_t esetcolor(int16_t index,int16_t color); -void esetpalette(int16_t index,int16_t count,int16_t *rgb); -void egetpalette(int16_t index,int16_t count,int16_t *rgb); -int16_t esetgray(int16_t mode); -int16_t esetsmear(int16_t mode); - -/* pallette color definitions */ - -#define RGB_BLACK 0x0000 /* ST(e) palette */ -#define RGB_BLUE 0x000f -#define RGB_GREEN 0x00f0 -#define RGB_CYAN 0x00ff -#define RGB_RED 0x0f00 -#define RGB_MAGENTA 0x0f0f -#define RGB_LTGRAY 0x0555 -#define RGB_GRAY 0x0333 -#define RGB_LTBLUE 0x033f -#define RGB_LTGREEN 0x03f3 -#define RGB_LTCYAN 0x03ff -#define RGB_LTRED 0x0f33 -#define RGB_LTMAGENTA 0x0f3f -#define RGB_YELLOW 0x0ff0 -#define RGB_LTYELLOW 0x0ff3 -#define RGB_WHITE 0x0fff - -#define TTRGB_BLACK 0x0000 /* TT Palette */ -#define TTRGB_BLUE 0x000f -#define TTRGB_GREEN 0x00f0 -#define TTRGB_CYAN 0x00ff -#define TTRGB_RED 0x0f00 -#define TTRGB_MAGENTA 0x0f0f -#define TTRGB_LTGRAY 0x0aaa -#define TTRGB_GRAY 0x0666 -#define TTRGB_LTBLUE 0x099f -#define TTRGB_LTGREEN 0x09f9 -#define TTRGB_LTCYAN 0x09ff -#define TTRGB_LTRED 0x0f99 -#define TTRGB_LTMAGENTA 0x0f9f -#define TTRGB_YELLOW 0x0ff0 -#define TTRGB_LTYELLOW 0x0ff9 -#define TTRGB_WHITE 0x0fff - -/* TT resolutions */ -#define TT_HIGH 6 -#define TT_MEDIUM 4 -#define TT_LOW 7 - -/* ST(e) resolutions */ -#define ST_HIGH 2 -#define ST_MEDIUM 1 -#define ST_LOW 0 - -/* monitor types (from VgetMonitor()) */ -#define MON_MONO 0 /* ST monochrome */ -#define MON_COLOR 1 /* ST colour */ -#define MON_VGA 2 /* VGA */ -#define MON_TV 3 /* TV via RF modulator */ - -/* determine monitor type, ... */ -void screen_init(void); -void set_rez_hacked(void); -int rez_changeable(void); -int16_t get_monitor_type(void); -void screen_get_current_mode_info(uint16_t *planes, uint16_t *hz_rez, uint16_t *vt_rez); - -/* hardware independant xbios routines */ - -int32_t physbase(void); -int32_t logbase(void); -int16_t getrez(void); -void setscreen(int32_t logLoc, int32_t physLoc, int16_t rez, int16_t videlmode); -void setpalette(int32_t palettePtr); -int16_t setcolor(int16_t colorNum, int16_t color); -void vsync(void); - -#endif /* SCREEN_H */ diff --git a/include/sd_card.h b/include/sd_card.h deleted file mode 100644 index e8bba09..0000000 --- a/include/sd_card.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * sd_card.h - * - * Exported sd-card access routines for the FireBee BaS - * - * Created on: 19.11.2012 - * Author: mfro - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - * - */ - -#ifndef _SD_CARD_H_ -#define _SD_CARD_H_ - -#include -#include - -extern void sd_card_init(void); - -/* MMC card type flags (MMC_GET_TYPE) */ -#define CT_MMC 0x01 /* MMC ver 3 */ -#define CT_SD1 0x02 /* SD ver 1 */ -#define CT_SD2 0x04 /* SD ver 2 */ -#define CT_SDC (CT_SD1|CT_SD2) /* SD */ -#define CT_BLOCK 0x08 /* Block addressing */ - -#endif /* _SD_CARD_H_ */ diff --git a/include/startcf.h b/include/startcf.h deleted file mode 100644 index b8dc311..0000000 --- a/include/startcf.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef _STARTCF_H_ -#define _STARTCF_H_ - -/* - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#define cf_stack - -#define DIP_SWITCH (*(volatile uint8_t *)(&_MBAR[0xA2C])) -#define DIP_SWITCHa __MBAR + 0xA2C - -#define sca_page_ID 6 - -#endif /* _STARTCF_H_ */ diff --git a/include/sysinit.h b/include/sysinit.h deleted file mode 100644 index 2447f00..0000000 --- a/include/sysinit.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * File: sysinit.h - * Purpose: Firebee Power-on Reset configuration - * - * Notes: - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - * - */ - -#ifndef __SYSINIT_H__ -#define __SYSINIT_H__ - -#include - -/* function(s) from init_fpga.c */ -extern bool init_fpga(void); -extern void init_usb(void); - -/* fault_vectors */ -extern void setup_vectors(void); - -extern bool fpga_configured; - -#endif /* __SYSINIT_H__ */ - - diff --git a/include/tftp.h b/include/tftp.h deleted file mode 100644 index a3f72d1..0000000 --- a/include/tftp.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * File: tftp.h - * Purpose: Data definitions for TFTP - * - * Notes: - */ - -#ifndef _TFTP_H_ -#define _TFTP_H_ - -#define TFTP_RRQ (1) -#define TFTP_WRQ (2) -#define TFTP_DATA (3) -#define TFTP_ACK (4) -#define TFTP_ERROR (5) - -#define TFTP_ERR_FNF 1 -#define TFTP_ERR_AV 2 -#define TFTP_ERR_DF 3 -#define TFTP_ERR_ILL 4 -#define TFTP_ERR_TID 5 -#define TFTP_FE 6 -#define TFTP_NSU 7 -#define TFTP_ERR_UD 0 - -#define OCTET "octet" -#define NETASCII "netascii" - -/* Protocol Header information */ -#define TFTP_HDR_OFFSET (ETH_HDR_LEN + IP_HDR_SIZE + UDP_HDR_SIZE) - -/* Timeout in seconds */ -#define TFTP_TIMEOUT 2 - -/* Maximum TFTP Packet Size (payload only - no header) */ -#define TFTP_PKTSIZE 512 - -/* Number of TFTP Data Buffers */ -#define NUM_TFTPBD 6 - - -/* Data Buffer Pointer Structure */ -typedef struct -{ - uint8_t data[TFTP_PKTSIZE]; - uint16_t bytes; -} DATA_BUF; - -/* TFTP RRQ/WRQ Packet */ -typedef struct -{ - uint16_t opcode; - char filename_mode[TFTP_PKTSIZE - 2]; -} RWRQ; - -/* TFTP DATA Packet */ -typedef struct -{ - uint16_t opcode; - uint16_t blocknum; - uint8_t data[TFTP_PKTSIZE - 4]; -} DATA; - -/* TFTP Acknowledge Packet */ -typedef struct -{ - uint16_t opcode; - uint16_t blocknum; -} ACK; - -/* TFTP Error Packet */ -typedef struct -{ - uint16_t opcode; - uint16_t code; - char msg[TFTP_PKTSIZE - 4]; -} ERROR; - -/* TFTP Generic Packet */ -typedef struct -{ - uint16_t opcode; -} GEN; - -union TFTPpacket -{ - RWRQ rwrq; - DATA data; - ACK ack; - ERROR error; - GEN generic; -}; - -/* TFTP Connection Status */ -typedef struct -{ - /* Pointer to next character in buffer ring */ - uint8_t *next_char; - - /* Direction of current connection, read or write */ - uint8_t dir; - - /* Connection established flag */ - uint8_t open; - - /* Pointer to our Network InterFace */ - NIF *nif; - - /* File being transferred */ - char *file; - - /* Server IP address */ - IP_ADDR server_ip; - - /* Queue to hold the TFTP packets */ - QUEUE queue; - - /* Bytes received counter */ - uint32_t bytes_recv; - - /* Bytes sent counter */ - uint32_t bytes_sent; - - /* Bytes remaining in current Rx buffer */ - uint32_t rem_bytes; - - /* Server UDP port */ - uint16_t server_port; - - /* My UDP port */ - uint16_t my_port; - - /* Expected TFTP block number */ - uint16_t exp_blocknum; - - /* Keep track of the last packet acknowledged */ - uint16_t last_ack; - - /* Error Flag */ - uint8_t error; - -} TFTP_Connection; - - -extern void tftp_handler(NIF *, NBUF *) ; -extern int tftp_write (NIF *, char *, IP_ADDR_P, uint32_t, uint32_t); -extern int tftp_read(NIF *, char *, IP_ADDR_P); -extern void tftp_end(int); -extern int tftp_in_char(void); - - -#endif /* _TFTP_H_ */ diff --git a/include/udp.h b/include/udp.h deleted file mode 100644 index de87dc3..0000000 --- a/include/udp.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * File: udp.h - * Purpose: User Datagram Protocol, UDP, data definitions - * - * Notes: - */ - -#ifndef _UDP_H -#define _UDP_H - -/********************************************************************/ - -typedef struct -{ - uint16_t src_port; - uint16_t dest_port; - uint16_t length; - uint16_t chksum; -} udp_frame_hdr; - -#define UDP_SOURCE(a) (a->src_port) -#define UDP_DEST(a) (a->dest_port) -#define UDP_LENGTH(a) (a->length) -#define UDP_CHKSUM(a) (a->chksum) - -#define DEFAULT_UDP_PORT (0x4321) -#define UDP_PORT_TELNET (23) -#define UDP_PORT_FTP (21) -#define UDP_PORT_TFTP (69) - -/* Protocol Header information */ -#define UDP_HDR_OFFSET (ETH_HDR_LEN + IP_HDR_SIZE) -#define UDP_HDR_SIZE 8 - - -/********************************************************************/ - -extern void udp_init(void); -extern void udp_prime_port(uint16_t); -extern uint16_t udp_obtain_free_port(void); -extern void udp_bind_port( uint16_t, void (*)(NIF *,NBUF *)); -extern void udp_free_port(uint16_t); -extern int udp_send(NIF *, uint8_t *, int, int, NBUF *); -extern void udp_handler(NIF *, NBUF *); - -/********************************************************************/ - -#endif /* _UDP_H */ diff --git a/include/usb.h b/include/usb.h deleted file mode 100644 index 041376f..0000000 --- a/include/usb.h +++ /dev/null @@ -1,430 +0,0 @@ -/* - * (C) Copyright 2001 - * Denis Peter, MPL AG Switzerland - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Note: Part of this code has been derived from linux - * - */ -#ifndef _USB_H_ -#define _USB_H_ - -#include -#include "driver_mem.h" -#include "pci.h" -#include "mod_devicetable.h" -#include "pci_ids.h" -#include "part.h" - - -extern long *tab_funcs_pci; - -#define __u8 uint8_t -#define __u16 uint16_t -#define __u32 uint32_t -//#define u8 uint8_t -#define u16 uint16_t -#define u32 uint32_t -#define uint8_t uint8_t -#define uint32_t uint32_t -#define uint16_t uint16_t - -extern void kprint(const char *fmt, ...); -extern int sprintD(char *s, const char *fmt, ...); - -#include "usb_defs.h" - -/* Everything is aribtrary */ -#define USB_ALTSETTINGALLOC 4 -#define USB_MAXALTSETTING 128 /* Hard limit */ - -#define USB_MAX_BUS 3 -#define USB_MAX_DEVICE 16 -#define USB_MAXCONFIG 8 -#define USB_MAXINTERFACES 8 -#define USB_MAXENDPOINTS 16 -#define USB_MAXCHILDREN 8 /* This is arbitrary */ -#define USB_MAX_HUB 16 - -#define USB_CNTL_TIMEOUT 100 /* 100 ms timeout */ - -#define USB_BUFSIZ 512 - -/* String descriptor */ -struct usb_string_descriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t wData[1]; -} __attribute__ ((packed)); - -/* device request (setup) */ -struct devrequest -{ - uint8_t requesttype; - uint8_t request; - uint16_t value; - uint16_t index; - uint16_t length; -} __attribute__ ((packed)); - -/* All standard descriptors have these 2 fields in common */ -struct usb_descriptor_header -{ - uint8_t bLength; - uint8_t bDescriptorType; -} __attribute__ ((packed)); - -/* Device descriptor */ -struct usb_device_descriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t bcdUSB; - uint8_t bDeviceClass; - uint8_t bDeviceSubClass; - uint8_t bDeviceProtocol; - uint8_t bMaxPacketSize0; - uint16_t idVendor; - uint16_t idProduct; - uint16_t bcdDevice; - uint8_t iManufacturer; - uint8_t iProduct; - uint8_t iSerialNumber; - uint8_t bNumConfigurations; -} __attribute__ ((packed)); - -/* Endpoint descriptor */ -struct usb_endpoint_descriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bEndpointAddress; - uint8_t bmAttributes; - uint16_t wMaxPacketSize; - uint8_t bInterval; - uint8_t bRefresh; - uint8_t bSynchAddress; -} __attribute__ ((packed)) __attribute__ ((aligned(2))); - -/* Interface descriptor */ -struct usb_interface_descriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bInterfaceNumber; - uint8_t bAlternateSetting; - uint8_t bNumEndpoints; - uint8_t bInterfaceClass; - uint8_t bInterfaceSubClass; - uint8_t bInterfaceProtocol; - uint8_t iInterface; - - uint8_t no_of_ep; - uint8_t num_altsetting; - uint8_t act_altsetting; - - struct usb_endpoint_descriptor ep_desc[USB_MAXENDPOINTS]; -} __attribute__ ((packed)); - - -/* Configuration descriptor information.. */ -struct usb_config_descriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t wTotalLength; - uint8_t bNumInterfaces; - uint8_t bConfigurationValue; - uint8_t iConfiguration; - uint8_t bmAttributes; - uint8_t MaxPower; - - uint8_t no_of_if; /* number of interfaces */ - struct usb_interface_descriptor if_desc[USB_MAXINTERFACES]; -} __attribute__ ((packed)); - -enum -{ - /* Maximum packet size; encoded as 0,1,2,3 = 8,16,32,64 */ - PACKET_SIZE_8 = 0, - PACKET_SIZE_16 = 1, - PACKET_SIZE_32 = 2, - PACKET_SIZE_64 = 3, -}; - -struct usb_device -{ - int devnum; /* Device number on USB bus */ - int speed; /* full/low/high */ - char mf[32]; /* manufacturer */ - char prod[32]; /* product */ - char serial[32]; /* serial number */ - - /* Maximum packet size; one of: PACKET_SIZE_* */ - int maxpacketsize; - - /* one bit for each endpoint ([0] = IN, [1] = OUT) */ - unsigned int toggle[2]; - - /* endpoint halts; one bit per endpoint # & direction; - * [0] = IN, [1] = OUT - */ - unsigned int halted[2]; - int epmaxpacketin[16]; /* INput endpoint specific maximums */ - int epmaxpacketout[16]; /* OUTput endpoint specific maximums */ - - int configno; /* selected config number */ - struct usb_device_descriptor descriptor; /* Device Descriptor */ - struct usb_config_descriptor config; /* config descriptor */ - - int have_langid; /* whether string_langid is valid yet */ - int string_langid; /* language ID for strings */ - int (*irq_handle)(struct usb_device *dev); - uint32_t irq_status; - int irq_act_len; /* transfered bytes */ - void *privptr; - - /* - * Child devices - if this is a hub device - * Each instance needs its own set of data structures. - */ - uint32_t status; - int act_len; /* transfered bytes */ - int maxchild; /* Number of ports if hub */ - int portnr; - struct usb_device *parent; - struct usb_device *children[USB_MAXCHILDREN]; - void *priv_hcd; - int (*deregister)(struct usb_device *dev); - - struct usb_hub_device *hub; - int usbnum; -}; - -typedef struct -{ - long ident; - union - { - long l; - short i[2]; - char c[4]; - } v; -} USB_COOKIE; - -/* - * this is how the lowlevel part communicate with the outer world - */ - -extern int ohci_usb_lowlevel_init(int32_t handle, const struct pci_device_id *ent, void **priv); -extern int ohci_usb_lowlevel_stop(void *priv); -extern int ohci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len); -extern int ohci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup); -extern int ohci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval); -extern void ohci_usb_enable_interrupt(int enable); - -extern int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **priv); -extern int ehci_usb_lowlevel_stop(void *priv); -extern int ehci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len); -extern int ehci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup); -extern int ehci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval); -extern void ehci_usb_enable_interrupt(int enable); - -extern void usb_enable_interrupt(int enable); - -extern int usb_new_device(struct usb_device *dev); -extern struct usb_device *usb_alloc_new_device(int bus_index, void *priv); -extern void usb_disconnect(struct usb_device **pdev); - -#define USB_MAX_STOR_DEV 5 - -extern block_dev_desc_t *usb_stor_get_dev(int index); -extern int usb_stor_scan(void); -extern int usb_stor_info(void); -extern int usb_stor_register(struct usb_device *dev); -extern int usb_stor_deregister(struct usb_device *dev); - -extern int drv_usb_kbd_init(void); -extern int usb_kbd_register(struct usb_device *dev); -extern int usb_kbd_deregister(struct usb_device *dev); - -extern int drv_usb_mouse_init(void); -extern int usb_mouse_register(struct usb_device *dev); -extern int usb_mouse_deregister(struct usb_device *dev); - -/* routines */ -extern int usb_init(int32_t handle, const struct pci_device_id *ent); /* initialize the USB Controller */ -extern int usb_stop(void); /* stop the USB Controller */ - -extern int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol); -extern int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id); -extern struct usb_device *usb_get_dev_index(int index, int bus); -extern int usb_control_msg(struct usb_device *dev, unsigned int pipe, uint8_t request, uint8_t requesttype, - uint16_t value, uint16_t index, void *data, uint16_t size, int timeout); -extern int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout); -extern int usb_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval); -extern void usb_disable_asynch(int disable); -extern int usb_maxpacket(struct usb_device *dev, uint32_t pipe); - -extern int usb_get_configuration_no(struct usb_device *dev, uint8_t *buffer, int cfgno); -extern int usb_get_report(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size); -extern int usb_get_class_descriptor(struct usb_device *dev, int ifnum, uint8_t type, uint8_t id, void *buf, int size); -extern int usb_clear_halt(struct usb_device *dev, int pipe); -extern int usb_string(struct usb_device *dev, int index, char *buf, size_t size); -extern int usb_set_interface(struct usb_device *dev, int interface, int alternate); - -/* - * Calling this entity a "pipe" is glorifying it. A USB pipe - * is something embarrassingly simple: it basically consists - * of the following information: - * - device number (7 bits) - * - endpoint number (4 bits) - * - current Data0/1 state (1 bit) - * - direction (1 bit) - * - speed (2 bits) - * - max packet size (2 bits: 8, 16, 32 or 64) - * - pipe type (2 bits: control, interrupt, bulk, isochronous) - * - * That's 18 bits. Really. Nothing more. And the USB people have - * documented these eighteen bits as some kind of glorious - * virtual data structure. - * - * Let's not fall in that trap. We'll just encode it as a simple - * unsigned int. The encoding is: - * - * - max size: bits 0-1 (00 = 8, 01 = 16, 10 = 32, 11 = 64) - * - direction: bit 7 (0 = Host-to-Device [Out], - * (1 = Device-to-Host [In]) - * - device: bits 8-14 - * - endpoint: bits 15-18 - * - Data0/1: bit 19 - * - speed: bit 26 (0 = Full, 1 = Low Speed, 2 = High) - * - pipe type: bits 30-31 (00 = isochronous, 01 = interrupt, - * 10 = control, 11 = bulk) - * - * Why? Because it's arbitrary, and whatever encoding we select is really - * up to us. This one happens to share a lot of bit positions with the UHCI - * specification, so that much of the uhci driver can just mask the bits - * appropriately. - */ - -/* Create various pipes... */ -#define create_pipe(dev, endpoint) \ - (((dev)->devnum << 8) | (endpoint << 15) | \ - ((dev)->speed << 26) | (dev)->maxpacketsize) -#define default_pipe(dev) ((dev)->speed << 26) - -#define usb_sndctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \ - create_pipe(dev, endpoint)) -#define usb_rcvctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \ - create_pipe(dev, endpoint) | \ - USB_DIR_IN) -#define usb_sndisocpipe(dev, endpoint) ((PIPE_ISOCHRONOUS << 30) | \ - create_pipe(dev, endpoint)) -#define usb_rcvisocpipe(dev, endpoint) ((PIPE_ISOCHRONOUS << 30) | \ - create_pipe(dev, endpoint) | \ - USB_DIR_IN) -#define usb_sndbulkpipe(dev, endpoint) ((PIPE_BULK << 30) | \ - create_pipe(dev, endpoint)) -#define usb_rcvbulkpipe(dev, endpoint) ((PIPE_BULK << 30) | \ - create_pipe(dev, endpoint) | \ - USB_DIR_IN) -#define usb_sndintpipe(dev, endpoint) ((PIPE_INTERRUPT << 30) | \ - create_pipe(dev, endpoint)) -#define usb_rcvintpipe(dev, endpoint) ((PIPE_INTERRUPT << 30) | \ - create_pipe(dev, endpoint) | \ - USB_DIR_IN) -#define usb_snddefctrl(dev) ((PIPE_CONTROL << 30) | \ - default_pipe(dev)) -#define usb_rcvdefctrl(dev) ((PIPE_CONTROL << 30) | \ - default_pipe(dev) | \ - USB_DIR_IN) - -/* The D0/D1 toggle bits */ -#define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> ep) & 1) -#define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << ep)) -#define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = \ - ((dev)->toggle[out] & \ - ~(1 << ep)) | ((bit) << ep)) - -/* Endpoint halt control/status */ -#define usb_endpoint_out(ep_dir) (((ep_dir >> 7) & 1) ^ 1) -#define usb_endpoint_halt(dev, ep, out) ((dev)->halted[out] |= (1 << (ep))) -#define usb_endpoint_running(dev, ep, out) ((dev)->halted[out] &= ~(1 << (ep))) -#define usb_endpoint_halted(dev, ep, out) ((dev)->halted[out] & (1 << (ep))) - -#define usb_packetid(pipe) (((pipe) & USB_DIR_IN) ? USB_PID_IN : \ - USB_PID_OUT) - -#define usb_pipeout(pipe) ((((pipe) >> 7) & 1) ^ 1) -#define usb_pipein(pipe) (((pipe) >> 7) & 1) -#define usb_pipedevice(pipe) (((pipe) >> 8) & 0x7f) -#define usb_pipe_endpdev(pipe) (((pipe) >> 8) & 0x7ff) -#define usb_pipeendpoint(pipe) (((pipe) >> 15) & 0xf) -#define usb_pipedata(pipe) (((pipe) >> 19) & 1) -#define usb_pipespeed(pipe) (((pipe) >> 26) & 3) -#define usb_pipeslow(pipe) (usb_pipespeed(pipe) == USB_SPEED_LOW) -#define usb_pipetype(pipe) (((pipe) >> 30) & 3) -#define usb_pipeisoc(pipe) (usb_pipetype((pipe)) == PIPE_ISOCHRONOUS) -#define usb_pipeint(pipe) (usb_pipetype((pipe)) == PIPE_INTERRUPT) -#define usb_pipecontrol(pipe) (usb_pipetype((pipe)) == PIPE_CONTROL) -#define usb_pipebulk(pipe) (usb_pipetype((pipe)) == PIPE_BULK) - - -/************************************************************************* - * Hub Stuff - */ -struct usb_port_status -{ - uint16_t wPortStatus; - uint16_t wPortChange; -} __attribute__ ((packed)); - -struct usb_hub_status -{ - uint16_t wHubStatus; - uint16_t wHubChange; -} __attribute__ ((packed)); - - -/* Hub descriptor */ -struct usb_hub_descriptor -{ - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bNbrPorts; - uint16_t wHubCharacteristics; - uint8_t bPwrOn2PwrGood; - uint8_t bHubContrCurrent; - uint8_t DeviceRemovable[(USB_MAXCHILDREN+1+7)/8]; - uint8_t PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8]; - /* DeviceRemovable and PortPwrCtrlMask want to be variable-length - bitmaps that hold max 255 entries. (bit0 is ignored) */ -} __attribute__ ((packed)); - - -struct usb_hub_device -{ - struct usb_device *pusb_dev; - struct usb_hub_descriptor desc; -}; - -#endif /*_USB_H_ */ diff --git a/include/usb_defs.h b/include/usb_defs.h deleted file mode 100644 index 8032e57..0000000 --- a/include/usb_defs.h +++ /dev/null @@ -1,251 +0,0 @@ -/* - * (C) Copyright 2001 - * Denis Peter, MPL AG Switzerland - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Note: Part of this code has been derived from linux - * - */ -#ifndef _USB_DEFS_H_ -#define _USB_DEFS_H_ - -/* USB constants */ - -/* Device and/or Interface Class codes */ -#define USB_CLASS_PER_INTERFACE 0 /* for DeviceClass */ -#define USB_CLASS_AUDIO 1 -#define USB_CLASS_COMM 2 -#define USB_CLASS_HID 3 -#define USB_CLASS_PRINTER 7 -#define USB_CLASS_MASS_STORAGE 8 -#define USB_CLASS_HUB 9 -#define USB_CLASS_DATA 10 -#define USB_CLASS_VENDOR_SPEC 0xff - -/* some HID sub classes */ -#define USB_SUB_HID_NONE 0 -#define USB_SUB_HID_BOOT 1 - -/* some UID Protocols */ -#define USB_PROT_HID_NONE 0 -#define USB_PROT_HID_KEYBOARD 1 -#define USB_PROT_HID_MOUSE 2 - - -/* Sub STORAGE Classes */ -#define US_SC_RBC 1 /* Typically, flash devices */ -#define US_SC_8020 2 /* CD-ROM */ -#define US_SC_QIC 3 /* QIC-157 Tapes */ -#define US_SC_UFI 4 /* Floppy */ -#define US_SC_8070 5 /* Removable media */ -#define US_SC_SCSI 6 /* Transparent */ -#define US_SC_MIN US_SC_RBC -#define US_SC_MAX US_SC_SCSI - -/* STORAGE Protocols */ -#define US_PR_CB 1 /* Control/Bulk w/o interrupt */ -#define US_PR_CBI 0 /* Control/Bulk/Interrupt */ -#define US_PR_BULK 0x50 /* bulk only */ - -/* USB types */ -#define USB_TYPE_STANDARD (0x00 << 5) -#define USB_TYPE_CLASS (0x01 << 5) -#define USB_TYPE_VENDOR (0x02 << 5) -#define USB_TYPE_RESERVED (0x03 << 5) - -/* USB recipients */ -#define USB_RECIP_DEVICE 0x00 -#define USB_RECIP_INTERFACE 0x01 -#define USB_RECIP_ENDPOINT 0x02 -#define USB_RECIP_OTHER 0x03 - -/* USB directions */ -#define USB_DIR_OUT 0 -#define USB_DIR_IN 0x80 - -/* USB device speeds */ -#define USB_SPEED_FULL 0x0 /* 12Mbps */ -#define USB_SPEED_LOW 0x1 /* 1.5Mbps */ -#define USB_SPEED_HIGH 0x2 /* 480Mbps */ -#define USB_SPEED_RESERVED 0x3 - -/* Descriptor types */ -#define USB_DT_DEVICE 0x01 -#define USB_DT_CONFIG 0x02 -#define USB_DT_STRING 0x03 -#define USB_DT_INTERFACE 0x04 -#define USB_DT_ENDPOINT 0x05 - -#define USB_DT_HID (USB_TYPE_CLASS | 0x01) -#define USB_DT_REPORT (USB_TYPE_CLASS | 0x02) -#define USB_DT_PHYSICAL (USB_TYPE_CLASS | 0x03) -#define USB_DT_HUB (USB_TYPE_CLASS | 0x09) - -/* Descriptor sizes per descriptor type */ -#define USB_DT_DEVICE_SIZE 18 -#define USB_DT_CONFIG_SIZE 9 -#define USB_DT_INTERFACE_SIZE 9 -#define USB_DT_ENDPOINT_SIZE 7 -#define USB_DT_ENDPOINT_AUDIO_SIZE 9 /* Audio extension */ -#define USB_DT_HUB_NONVAR_SIZE 7 -#define USB_DT_HID_SIZE 9 - -/* Endpoints */ -#define USB_ENDPOINT_NUMBER_MASK 0x0f /* in bEndpointAddress */ -#define USB_ENDPOINT_DIR_MASK 0x80 - -#define USB_ENDPOINT_XFERTYPE_MASK 0x03 /* in bmAttributes */ -#define USB_ENDPOINT_XFER_CONTROL 0 -#define USB_ENDPOINT_XFER_ISOC 1 -#define USB_ENDPOINT_XFER_BULK 2 -#define USB_ENDPOINT_XFER_INT 3 - -/* USB Packet IDs (PIDs) */ -#define USB_PID_UNDEF_0 0xf0 -#define USB_PID_OUT 0xe1 -#define USB_PID_ACK 0xd2 -#define USB_PID_DATA0 0xc3 -#define USB_PID_UNDEF_4 0xb4 -#define USB_PID_SOF 0xa5 -#define USB_PID_UNDEF_6 0x96 -#define USB_PID_UNDEF_7 0x87 -#define USB_PID_UNDEF_8 0x78 -#define USB_PID_IN 0x69 -#define USB_PID_NAK 0x5a -#define USB_PID_DATA1 0x4b -#define USB_PID_PREAMBLE 0x3c -#define USB_PID_SETUP 0x2d -#define USB_PID_STALL 0x1e -#define USB_PID_UNDEF_F 0x0f - -/* Standard requests */ -#define USB_REQ_GET_STATUS 0x00 -#define USB_REQ_CLEAR_FEATURE 0x01 -#define USB_REQ_SET_FEATURE 0x03 -#define USB_REQ_SET_ADDRESS 0x05 -#define USB_REQ_GET_DESCRIPTOR 0x06 -#define USB_REQ_SET_DESCRIPTOR 0x07 -#define USB_REQ_GET_CONFIGURATION 0x08 -#define USB_REQ_SET_CONFIGURATION 0x09 -#define USB_REQ_GET_INTERFACE 0x0A -#define USB_REQ_SET_INTERFACE 0x0B -#define USB_REQ_SYNCH_FRAME 0x0C - -/* HID requests */ -#define USB_REQ_GET_REPORT 0x01 -#define USB_REQ_GET_IDLE 0x02 -#define USB_REQ_GET_PROTOCOL 0x03 -#define USB_REQ_SET_REPORT 0x09 -#define USB_REQ_SET_IDLE 0x0A -#define USB_REQ_SET_PROTOCOL 0x0B - - -/* "pipe" definitions */ - -#define PIPE_ISOCHRONOUS 0 -#define PIPE_INTERRUPT 1 -#define PIPE_CONTROL 2 -#define PIPE_BULK 3 -#define PIPE_DEVEP_MASK 0x0007ff00 - -#define USB_ISOCHRONOUS 0 -#define USB_INTERRUPT 1 -#define USB_CONTROL 2 -#define USB_BULK 3 - -/* USB-status codes: */ -#define USB_ST_ACTIVE 0x1 /* TD is active */ -#define USB_ST_STALLED 0x2 /* TD is stalled */ -#define USB_ST_BUF_ERR 0x4 /* buffer error */ -#define USB_ST_BABBLE_DET 0x8 /* Babble detected */ -#define USB_ST_NAK_REC 0x10 /* NAK Received*/ -#define USB_ST_CRC_ERR 0x20 /* CRC/timeout Error */ -#define USB_ST_BIT_ERR 0x40 /* Bitstuff error */ -#define USB_ST_NOT_PROC 0x80000000L /* Not yet processed */ - - -/************************************************************************* - * Hub defines - */ - -/* - * Hub request types - */ - -#define USB_RT_HUB (USB_TYPE_CLASS | USB_RECIP_DEVICE) -#define USB_RT_PORT (USB_TYPE_CLASS | USB_RECIP_OTHER) - -/* - * Hub Class feature numbers - */ -#define C_HUB_LOCAL_POWER 0 -#define C_HUB_OVER_CURRENT 1 - -/* - * Port feature numbers - */ -#define USB_PORT_FEAT_CONNECTION 0 -#define USB_PORT_FEAT_ENABLE 1 -#define USB_PORT_FEAT_SUSPEND 2 -#define USB_PORT_FEAT_OVER_CURRENT 3 -#define USB_PORT_FEAT_RESET 4 -#define USB_PORT_FEAT_POWER 8 -#define USB_PORT_FEAT_LOWSPEED 9 -#define USB_PORT_FEAT_HIGHSPEED 10 -#define USB_PORT_FEAT_C_CONNECTION 16 -#define USB_PORT_FEAT_C_ENABLE 17 -#define USB_PORT_FEAT_C_SUSPEND 18 -#define USB_PORT_FEAT_C_OVER_CURRENT 19 -#define USB_PORT_FEAT_C_RESET 20 - -/* wPortStatus bits */ -#define USB_PORT_STAT_CONNECTION 0x0001 -#define USB_PORT_STAT_ENABLE 0x0002 -#define USB_PORT_STAT_SUSPEND 0x0004 -#define USB_PORT_STAT_OVERCURRENT 0x0008 -#define USB_PORT_STAT_RESET 0x0010 -#define USB_PORT_STAT_POWER 0x0100 -#define USB_PORT_STAT_LOW_SPEED 0x0200 -#define USB_PORT_STAT_HIGH_SPEED 0x0400 /* support for EHCI */ -#define USB_PORT_STAT_SPEED \ - (USB_PORT_STAT_LOW_SPEED | USB_PORT_STAT_HIGH_SPEED) - -/* wPortChange bits */ -#define USB_PORT_STAT_C_CONNECTION 0x0001 -#define USB_PORT_STAT_C_ENABLE 0x0002 -#define USB_PORT_STAT_C_SUSPEND 0x0004 -#define USB_PORT_STAT_C_OVERCURRENT 0x0008 -#define USB_PORT_STAT_C_RESET 0x0010 - -/* wHubCharacteristics (masks) */ -#define HUB_CHAR_LPSM 0x0003 -#define HUB_CHAR_COMPOUND 0x0004 -#define HUB_CHAR_OCPM 0x0018 - -/* - *Hub Status & Hub Change bit masks - */ -#define HUB_STATUS_LOCAL_POWER 0x0001 -#define HUB_STATUS_OVERCURRENT 0x0002 - -#define HUB_CHANGE_LOCAL_POWER 0x0001 -#define HUB_CHANGE_OVERCURRENT 0x0002 - -#endif /*_USB_DEFS_H_ */ diff --git a/include/usb_hub.h b/include/usb_hub.h deleted file mode 100644 index f26a3f4..0000000 --- a/include/usb_hub.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef USB_HUB_H -#define USB_HUB_H - -extern int bus_index; - -extern void usb_hub_reset(int bus_index); -extern int usb_hub_probe(struct usb_device *dev, int ifnum); -extern int hub_port_reset(struct usb_device *dev, int port, unsigned short *portstat); - -#endif // USB_HUB_H diff --git a/include/user_io.h b/include/user_io.h deleted file mode 100644 index cc3ba04..0000000 --- a/include/user_io.h +++ /dev/null @@ -1,57 +0,0 @@ -/* -* user_io.h -* -*/ - -#ifndef _USER_IO_H_ -#define _USER_IO_H_ - -#define UIO_STATUS 0x00 -#define UIO_BUT_SW 0x01 - -// codes as used by minimig (amiga) -#define UIO_JOYSTICK0 0x02 -#define UIO_JOYSTICK1 0x03 -#define UIO_MOUSE 0x04 -#define UIO_KEYBOARD 0x05 -#define UIO_KBD_OSD 0x06 // keycodes used by OSD only - -// codes as used by MiST (atari) -#define UIO_IKBD_OUT 0x02 -#define UIO_IKBD_IN 0x03 -#define UIO_SERIAL_OUT 0x04 -#define UIO_SERIAL_IN 0x05 - -#define JOY_RIGHT 0x01 -#define JOY_LEFT 0x02 -#define JOY_DOWN 0x04 -#define JOY_UP 0x08 -#define JOY_BTN1 0x10 -#define JOY_BTN2 0x20 -#define JOY_MOVE (JOY_RIGHT|JOY_LEFT|JOY_UP|JOY_DOWN) - -#define BUTTON1 0x01 -#define BUTTON2 0x02 -#define SWITCH1 0x04 -#define SWITCH2 0x08 - -// core type value should be unlikely to be returned by broken cores -#define CORE_TYPE_UNKNOWN 0x55 -#define CORE_TYPE_DUMB 0xa0 -#define CORE_TYPE_MINIMIG 0xa1 -#define CORE_TYPE_PACE 0xa2 -#define CORE_TYPE_MIST 0xa3 - -void user_io_init(); -void user_io_detect_core_type(); -unsigned char user_io_core_type(); -void user_io_poll(); -int user_io_button_pressed(); -void user_io_osd_key_enable(char); - -// hooks from the usb layer -void user_io_mouse(unsigned char b, char x, char y); -void user_io_kbd(unsigned char m, unsigned char *k); - -#endif /* _USER_IO_H_ */ - diff --git a/include/util.h b/include/util.h deleted file mode 100644 index 004c4c4..0000000 --- a/include/util.h +++ /dev/null @@ -1,154 +0,0 @@ -/* - * util.h - * - * Byteswapping macros lend from EmuTOS sources - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 27.10.2013 - * Author: mfro - */ - -#ifndef UTIL_H_ -#define UTIL_H_ - -#include - -#define NOP() __asm__ __volatile__("nop\n\t" : : : "memory") - -/* - * uint16_t swpw(uint16_t val); - * swap endianess of val, 16 bits only. - */ -static inline uint16_t swpw(uint16_t w) -{ - register uint32_t result asm("d0"); - __asm__ __volatile__ - ( - "lea %[input],a0\n\t" \ - "mvz.b 1(a0),%[output]\n\t" \ - "lsl.l #8,%[output]\n\t" \ - "move.b (a0),%[output]\n\t" \ - : [output] "=d" (result) /* output */ - : [input] "o" (w) /* input */ - : "cc", "a0", "memory" /* clobbered */ - ); - return result; -} - -/* - * uint32_t swpl(uint32_t val); - * swap endianess of val, 32 bits only. - * e.g. ABCD => DCBA - */ -static inline uint32_t swpl(uint32_t l) -{ - register uint32_t result asm("d0"); - - __asm__ __volatile__ - ( - "lea %[input],a0\n\t" \ - "mvz.b 3(a0),%[output]\n\t" \ - "lsl.l #8,%[output]\n\t" \ - "move.b 2(a0),%[output]\n\t" \ - "lsl.l #8,%[output]\n\t" \ - "move.b 1(a0),%[output]\n\t" \ - "lsl.l #8,%[output]\n\t" \ - "move.b (a0),%[output]\n\t" \ - : [output] "=d" (result) /* output */ - : [input] "o" (l) /* input */ - : "cc", "a0", "memory" /* clobbered */ - ); - return result; -} - - -/* - * WORD swpw2(ULONG val); - * swap endianness of val, treated as two 16-bit words. - * e.g. ABCD => BADC - */ - -#define swpw2(a) \ - __extension__ \ - ({unsigned long _tmp; \ - __asm__ __volatile__ \ - ("move.b (%1),%0\n\t" \ - "move.b 1(%1),(%1)\n\t" \ - "move.b %0,1(%1)\n\t" \ - "move.b 2(%1),%0\n\t" \ - "move.b 3(%1),2(%1)\n\t" \ - "move.b %0,3(%1)" \ - : "=d"(_tmp) /* outputs */ \ - : "a"(&a) /* inputs */ \ - : "cc", "memory" /* clobbered */ \ - ); \ - }) - -/* - * WORD set_sr(WORD new); - * sets sr to the new value, and return the old sr value - */ - -#define set_sr(a) \ -__extension__ \ -({short _r, _a = (a); \ - __asm__ __volatile__ \ - ("move.w sr,%0\n\t" \ - "move.w %1,sr" \ - : "=&d"(_r) /* outputs */ \ - : "nd"(_a) /* inputs */ \ - : "cc", "memory" /* clobbered */ \ - ); \ - _r; \ -}) - - -/* - * WORD get_sr(void); - * returns the current value of sr. - */ - -#define get_sr() \ -__extension__ \ -({short _r; \ - __asm__ volatile \ - ("move.w sr,%0" \ - : "=dm"(_r) /* outputs */ \ - : /* inputs */ \ - : "cc", "memory" /* clobbered */ \ - ); \ - _r; \ -}) - - - -/* - * void regsafe_call(void *addr) - * Saves all registers to the stack, calls the function - * that addr points to, and restores the registers afterwards. - */ -#define regsafe_call(addr) \ -__extension__ \ -({__asm__ volatile ("lea -60(sp),sp\n\t" \ - "movem.l d0-d7/a0-a6,(sp)"); \ - ((void (*) (void)) addr)(); \ - __asm__ volatile ("movem.l (sp),d0-d7/a0-a6\n\t" \ - "lea 60(sp),sp"); \ -}) - - -#endif /* UTIL_H_ */ diff --git a/include/version.h b/include/version.h deleted file mode 100644 index 53f03ab..0000000 --- a/include/version.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * version.h - * - * Created on: 21.10.2013 - * Author: Markus Fröschle - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - */ - -#ifndef VERSION_H_ -#define VERSION_H_ - -/* - * increment version number for release - */ - -#define MAJOR_VERSION 0 -#define MINOR_VERSION 87 - - -#endif /* VERSION_H_ */ diff --git a/include/videl.h b/include/videl.h deleted file mode 100644 index 61b2063..0000000 --- a/include/videl.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * screen.h - low-level screen routines - * - * Copyright (c) 2013 The EmuTOS development team - * - * Authors: - * PES Petr Stehlik - * RFB Roger Burrows - * - * This file is distributed under the GPL, version 2 or at your - * option any later version. See doc/license.txt for details. - */ - -#ifndef VIDEL_H -#define VIDEL_H - -#define SPSHIFT 0xffff8266L - -#define FRGB_BLACK 0x00000000 /* Falcon palette */ -#define FRGB_BLUE 0x000000ff -#define FRGB_GREEN 0x00ff0000 -#define FRGB_CYAN 0x00ff00ff -#define FRGB_RED 0xff000000 -#define FRGB_MAGENTA 0xff0000ff -#define FRGB_LTGRAY 0xbbbb00bb -#define FRGB_GRAY 0x88880088 -#define FRGB_LTBLUE 0x000000aa -#define FRGB_LTGREEN 0x00aa0000 -#define FRGB_LTCYAN 0x00aa00aa -#define FRGB_LTRED 0xaa000000 -#define FRGB_LTMAGENTA 0xaa0000aa -#define FRGB_YELLOW 0xffff0000 -#define FRGB_LTYELLOW 0xaaaa0000 -#define FRGB_WHITE 0xffff00ff - -/* bit settings for Falcon videomodes */ -#define VIDEL_VALID 0x01ff /* the only bits allowed in a videomode */ -#define VIDEL_VERTICAL 0x0100 /* if set, use interlace (TV), double line (VGA) */ -#define VIDEL_COMPAT 0x0080 /* ST-compatible if set */ -#define VIDEL_OVERSCAN 0x0040 /* overscan if set (not used with VGA) */ -#define VIDEL_PAL 0x0020 /* PAL if set; otherwise NTSC */ -#define VIDEL_VGA 0x0010 /* VGA if set; otherwise TV */ -#define VIDEL_80COL 0x0008 /* 80-column mode if set; otherwise 40 */ -#define VIDEL_BPPMASK 0x0007 /* mask for bits/pixel encoding */ -#define VIDEL_1BPP 0 /* 2 colours */ -#define VIDEL_2BPP 1 /* 4 colours */ -#define VIDEL_4BPP 2 /* 16 colours */ -#define VIDEL_8BPP 3 /* 256 colours */ -#define VIDEL_TRUECOLOR 4 /* 65536 colours */ - -/* test for VDI support of videomode */ -#define VALID_VDI_BPP(mode) ((mode&VIDEL_BPPMASK)<=VIDEL_8BPP) - -/* selected Falcon videomodes */ -#define FALCON_ST_HIGH (VIDEL_COMPAT|VIDEL_VGA|VIDEL_80COL|VIDEL_1BPP) - -#define FALCON_DEFAULT_BOOT (VIDEL_VERTICAL|VIDEL_80COL|VIDEL_8BPP) /* 640x480x256 colours, TV, NTSC */ - -#define FALCON_REZ 3 /* used as a Falcon indicator */ - -typedef struct { - int16_t vmode; /* video mode (-1 => end marker) */ - int16_t monitor; /* applicable monitors */ - uint16_t hht; /* H hold timer */ - uint16_t hbb; /* H border begin */ - uint16_t hbe; /* H border end */ - uint16_t hdb; /* H display begin */ - uint16_t hde; /* H display end */ - uint16_t hss; /* H SS */ - uint16_t vft; /* V freq timer */ - uint16_t vbb; /* V border begin */ - uint16_t vbe; /* V border end */ - uint16_t vdb; /* V display begin */ - uint16_t vde; /* V display end */ - uint16_t vss; /* V SS */ -} VMODE_ENTRY; - -extern void initialise_falcon_palette(int16_t mode); -extern const VMODE_ENTRY *lookup_videl_mode(int16_t mode,int16_t monitor); - -/* Public XBIOS functions */ -extern int16_t vsetmode(int16_t mode); -extern int16_t vmontype(void); -extern int16_t vsetsync(int16_t external); -extern int32_t vgetsize(int16_t mode); -extern int16_t vsetrgb(int16_t index,int16_t count,int32_t *rgb); -extern int16_t vgetrgb(int16_t index,int16_t count,int32_t *rgb); - -/* misc routines */ -extern int16_t get_videl_mode(void); -extern int16_t vfixmode(int16_t mode); -extern int16_t videl_check_moderez(int16_t moderez); -extern uint32_t videl_vram_size(void); -extern void videl_get_current_mode_info(uint16_t *planes, uint16_t *hz_rez, uint16_t *vt_rez); - -extern int16_t current_video_mode; - -#endif /* VIDEL_H */ diff --git a/include/video.h b/include/video.h deleted file mode 100644 index 636a225..0000000 --- a/include/video.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef _VIDEO_H_ -#define _VIDEO_H_ - -#include -#include "bas_printf.h" - -extern void video_init(void); - -#endif /* _VIDEO_H_ */ diff --git a/include/wait.h b/include/wait.h deleted file mode 100644 index 90b2736..0000000 --- a/include/wait.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * wait.h - * - * Author: mfro - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - * - */ - -#ifndef _WAIT_H_ -#define _WAIT_H_ - -#include - -#if defined(MACHINE_FIREBEE) -#include "firebee.h" -#elif defined(MACHINE_M5484LITE) -#include "m5484l.h" -#elif defined(MACHINE_M54455) -#include "m54455.h" -#else -#error "unknown machine" -#endif /* MACHINE_FIREBEE */ - -#include "MCF5475.h" - -typedef bool (*checker_func)(void); - -extern void wait(uint32_t); -extern void wait_us(uint32_t); /* this is just an alias to the above */ - -inline static void udelay(long us) -{ - wait((uint32_t) us); -} - -extern bool waitfor(uint32_t us, checker_func condition); -extern uint32_t get_timer(void); -extern void wait_ms(uint32_t ms); - -#endif /* _WAIT_H_ */ diff --git a/include/x86debug.h b/include/x86debug.h deleted file mode 100644 index f2fbea1..0000000 --- a/include/x86debug.h +++ /dev/null @@ -1,241 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for debug definitions. -* -****************************************************************************/ -/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/debug.h,v 1.4 2000/11/21 23:10:27 tsi Exp $ */ - -#include -#include "bas_printf.h" - -/* - * for the X86 emulator, debug cannot be enabled and disabled on a per-file mode - * as with all the other modules. It must be centrally enabled here. - */ - -#define DBG_X86EMU - -#ifdef DBG_X86EMU -#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_X86EMU */ - -#ifndef __X86EMU_DEBUG_H -#define __X86EMU_DEBUG_H - -/*---------------------- Macros and type definitions ----------------------*/ - -/* checks to be enabled for "runtime" */ - -#define CHECK_IP_FETCH_F 0x1 -#define CHECK_SP_ACCESS_F 0x2 -#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */ -#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset*/ - -#ifdef DBG_X86EMU -# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F) -# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F) -# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F) -# define CHECK_DATA_ACCESS() (M.x86.check & CHECK_DATA_ACCESS_F) -#else -# define CHECK_IP_FETCH() -# define CHECK_SP_ACCESS() -# define CHECK_MEM_ACCESS() -# define CHECK_DATA_ACCESS() -#endif - -#ifdef DBG_X86EMU -# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F) -# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F) -# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F) -# define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F) -# define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F) -# define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F) -# define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F) -# define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_IP_CS_F) - -# define DEBUG_FS() (M.x86.debug & DEBUG_FS_F) -# define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F) -# define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F) -# define DEBUG_TRACECALL() (M.x86.debug & DEBUG_TRACECALL_F) -# define DEBUG_TRACECALLREGS() (M.x86.debug & DEBUG_TRACECALL_REGS_F) -# define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F) -# define DEBUG_MEM_TRACE() (M.x86.debug & DEBUG_MEM_TRACE_F) -# define DEBUG_IO_TRACE() (M.x86.debug & DEBUG_IO_TRACE_F) -# define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F) -#else -# define DEBUG_INSTRUMENT() 0 -# define DEBUG_DECODE() 0 -# define DEBUG_TRACE() 0 -# define DEBUG_STEP() 0 -# define DEBUG_DISASSEMBLE() 0 -# define DEBUG_BREAK() 0 -# define DEBUG_SVC() 0 -# define DEBUG_SAVE_IP_CS() 0 -# define DEBUG_FS() 0 -# define DEBUG_PROC() 0 -# define DEBUG_SYSINT() 0 -# define DEBUG_TRACECALL() 0 -# define DEBUG_TRACECALLREGS() 0 -# define DEBUG_SYS() 0 -# define DEBUG_MEM_TRACE() 0 -# define DEBUG_IO_TRACE() 0 -# define DEBUG_DECODE_NOPRINT() 0 -#endif - -#ifdef DBG_X86EMU - -# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \ - x86emu_decode_printf(x) -# define DECODE_PRINTF2(x,y) if (DEBUG_DECODE()) \ - x86emu_decode_printf2(x,y) - -/* - * The following allow us to look at the bytes of an instruction. The - * first INCR_INSTRN_LEN, is called everytime bytes are consumed in - * the decoding process. The SAVE_IP_CS is called initially when the - * major opcode of the instruction is accessed. - */ -#define INC_DECODED_INST_LEN(x) \ - if (DEBUG_DECODE()) \ - x86emu_inc_decoded_inst_len(x) - -#define SAVE_IP_CS(x,y) \ - if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \ - | DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \ - M.x86.saved_cs = x; \ - M.x86.saved_ip = y; \ - } -#else -# define INC_DECODED_INST_LEN(x) -# define DECODE_PRINTF(x) -# define DECODE_PRINTF2(x,y) -# define SAVE_IP_CS(x,y) -#endif - -#ifdef DBG_X86EMU -#define TRACE_REGS() \ - if (DEBUG_DISASSEMBLE()) { \ - x86emu_just_disassemble(); \ - goto EndOfTheInstructionProcedure; \ - } \ - if (DEBUG_TRACE() || DEBUG_DECODE()) X86EMU_trace_regs() -#else -# define TRACE_REGS() -#endif - -#ifdef DBG_X86EMU -# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step() -#else -# define SINGLE_STEP() -#endif - -#define TRACE_AND_STEP() \ - TRACE_REGS(); \ - SINGLE_STEP() - -#ifdef DBG_X86EMU -# define START_OF_INSTR() -# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr(); -# define END_OF_INSTR_NO_TRACE() x86emu_end_instr(); -#else -# define START_OF_INSTR() -# define END_OF_INSTR() -# define END_OF_INSTR_NO_TRACE() -#endif - -#ifdef DBG_X86EMU -# define CALL_TRACE(u,v,w,x,s) \ - if (DEBUG_TRACECALLREGS()) \ - x86emu_dump_regs(); \ - if (DEBUG_TRACECALL()) { \ - xprintf("%x", u); \ - xprintf(":%x", v); \ - xprintf(": CALL "); \ - xprintf("%x", s); \ - xprintf(" %x", w); \ - xprintf(":%x", x); \ - xprintf("%s", "\r\n"); \ - } - -# define RETURN_TRACE(n,u,v) \ - if (DEBUG_TRACECALLREGS()) \ - x86emu_dump_regs(); \ - if (DEBUG_TRACECALL()) \ - { \ - xprintf("%x", (unsigned long)u); \ - xprintf(":%x", (unsigned long)v); \ - xprintf(": CALL "); \ - xprintf("%x", n); \ - xprintf("\r\n"); \ - } -#else -# define CALL_TRACE(u,v,w,x,s) -# define RETURN_TRACE(n,u,v) -#endif - -#ifdef DBG_X86EMU -#define DB(x) x -#else -#define DB(x) -#endif - -/*-------------------------- Function Prototypes --------------------------*/ - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -extern void x86emu_inc_decoded_inst_len (int x); -extern void x86emu_decode_printf (char *x); -extern void x86emu_decode_printf2 (char *x, int y); -extern void x86emu_just_disassemble (void); -extern void x86emu_single_step (void); -extern void x86emu_end_instr (void); -extern void x86emu_dump_regs (void); -extern void x86emu_dump_xregs (void); -extern void x86emu_print_int_vect (uint16_t iv); -extern void x86emu_instrument_instruction (void); -extern void x86emu_check_ip_access (void); -extern void x86emu_check_sp_access (void); -extern void x86emu_check_mem_access (uint32_t p); -extern void x86emu_check_data_access (unsigned int s, unsigned int o); - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_DEBUG_H */ diff --git a/include/x86decode.h b/include/x86decode.h deleted file mode 100644 index d3ce488..0000000 --- a/include/x86decode.h +++ /dev/null @@ -1,89 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for instruction decoding logic. -* -****************************************************************************/ - -#ifndef __X86EMU_DECODE_H -#define __X86EMU_DECODE_H - -/*---------------------- Macros and type definitions ----------------------*/ - -/* Instruction Decoding Stuff */ - -#define FETCH_DECODE_MODRM(mod,rh,rl) fetch_decode_modrm(&mod,&rh,&rl) -#define DECODE_RM_BYTE_REGISTER(r) decode_rm_byte_register(r) -#define DECODE_RM_WORD_REGISTER(r) decode_rm_word_register(r) -#define DECODE_RM_LONG_REGISTER(r) decode_rm_long_register(r) -#define DECODE_CLEAR_SEGOVR() M.x86.mode &= ~SYSMODE_CLRMASK - -/*-------------------------- Function Prototypes --------------------------*/ - -#include "bas_types.h" - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -void x86emu_intr_raise(uint8_t type); -void fetch_decode_modrm(int *mod, int *regh, int *regl); -uint8_t fetch_byte_imm(void); -uint16_t fetch_word_imm(void); -uint32_t fetch_long_imm(void); -uint8_t fetch_data_byte(unsigned int offset); -uint8_t fetch_data_byte_abs(unsigned int segment, unsigned int offset); -uint16_t fetch_data_word(unsigned int offset); -uint16_t fetch_data_word_abs(unsigned int segment, unsigned int offset); -uint32_t fetch_data_long(unsigned int offset); -uint32_t fetch_data_long_abs(unsigned int segment, unsigned int offset); -void store_data_byte(unsigned int offset, uint8_t val); -void store_data_byte_abs(unsigned int segment, unsigned int offset, uint8_t val); -void store_data_word(unsigned int offset, uint16_t val); -void store_data_word_abs(unsigned int segment, unsigned int offset, uint16_t val); -void store_data_long(unsigned int offset, uint32_t val); -void store_data_long_abs(unsigned int segment, unsigned int offset, uint32_t val); -uint8_t *decode_rm_byte_register(int reg); -uint16_t *decode_rm_word_register(int reg); -uint32_t *decode_rm_long_register(int reg); -uint16_t *decode_rm_seg_register(int reg); -unsigned decode_rm00_address(int rm); -unsigned decode_rm01_address(int rm); -unsigned decode_rm10_address(int rm); - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_DECODE_H */ diff --git a/include/x86emu.h b/include/x86emu.h deleted file mode 100644 index 7bd2f1d..0000000 --- a/include/x86emu.h +++ /dev/null @@ -1,192 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1996-1999 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: Header file for public specific functions. - * Any application linking against us should only - * include this header - * - ****************************************************************************/ -/* $XFree86: xc/extras/x86emu/include/x86emu.h,v 1.2 2000/11/21 23:10:25 tsi Exp $ */ - -#ifndef __X86EMU_X86EMU_H -#define __X86EMU_X86EMU_H - -#include "bas_types.h" -#define X86API -#define X86APIP * -#include "x86regs.h" - -typedef uint16_t X86EMU_pioAddr; - -/*---------------------- Macros and type definitions ----------------------*/ - -//#pragma pack(1) - -/**************************************************************************** -REMARKS: -Data structure containing ponters to programmed I/O functions used by the -emulator. This is used so that the user program can hook all programmed -I/O for the emulator to handled as necessary by the user program. By -default the emulator contains simple functions that do not do access the -hardware in any way. To allow the emualtor access the hardware, you will -need to override the programmed I/O functions using the X86EMU_setupPioFuncs -function. - -HEADER: -x86emu.h - -MEMBERS: -inb - Function to read a byte from an I/O port -inw - Function to read a word from an I/O port -inl - Function to read a dword from an I/O port -outb - Function to write a byte to an I/O port -outw - Function to write a word to an I/O port -outl - Function to write a dword to an I/O port - ****************************************************************************/ -typedef struct -{ - uint8_t (X86APIP inb)(X86EMU_pioAddr addr); - uint16_t (X86APIP inw)(X86EMU_pioAddr addr); - uint32_t (X86APIP inl)(X86EMU_pioAddr addr); - void (X86APIP outb)(X86EMU_pioAddr addr, uint8_t val); - void (X86APIP outw)(X86EMU_pioAddr addr, uint16_t val); - void (X86APIP outl)(X86EMU_pioAddr addr, uint32_t val); -} X86EMU_pioFuncs; - -/**************************************************************************** -REMARKS: -Data structure containing ponters to memory access functions used by the -emulator. This is used so that the user program can hook all memory -access functions as necessary for the emulator. By default the emulator -contains simple functions that only access the internal memory of the -emulator. If you need specialised functions to handle access to different -types of memory (ie: hardware framebuffer accesses and BIOS memory access -etc), you will need to override this using the X86EMU_setupMemFuncs -function. - -HEADER: -x86emu.h - -MEMBERS: -rdb - Function to read a byte from an address -rdw - Function to read a word from an address -rdl - Function to read a dword from an address -wrb - Function to write a byte to an address -wrw - Function to write a word to an address -wrl - Function to write a dword to an address - ****************************************************************************/ -typedef struct { - uint8_t (X86APIP rdb)(uint32_t addr); - uint16_t (X86APIP rdw)(uint32_t addr); - uint32_t (X86APIP rdl)(uint32_t addr); - void (X86APIP wrb)(uint32_t addr, uint8_t val); - void (X86APIP wrw)(uint32_t addr, uint16_t val); - void (X86APIP wrl)(uint32_t addr, uint32_t val); -} X86EMU_memFuncs; - -/**************************************************************************** - Here are the default memory read and write - function in case they are needed as fallbacks. - ***************************************************************************/ -extern uint8_t X86API rdb(uint32_t addr); -extern uint16_t X86API rdw(uint32_t addr); -extern uint32_t X86API rdl(uint32_t addr); -extern void X86API wrb(uint32_t addr, uint8_t val); -extern void X86API wrw(uint32_t addr, uint16_t val); -extern void X86API wrl(uint32_t addr, uint32_t val); - -//#pragma pack() - -/*--------------------- type definitions -----------------------------------*/ - -typedef void (X86APIP X86EMU_intrFuncs)(int num); -extern X86EMU_intrFuncs _X86EMU_intrTab[256]; - -/*-------------------------- Function Prototypes --------------------------*/ - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - - void X86EMU_setupMemFuncs(X86EMU_memFuncs *funcs); - void X86EMU_setupPioFuncs(X86EMU_pioFuncs *funcs); - void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]); - void X86EMU_prepareForInt(int num); - - /* decode.c */ - - void X86EMU_exec(void); - void X86EMU_halt_sys(void); - -#ifdef DBG_X86EMU -#define HALT_SYS() \ - dbg("%s: halt_sys: file %s line %d\r\n", __FUNCTION__, __FILE__, __LINE__);\ - X86EMU_halt_sys(); -#else -#define HALT_SYS() X86EMU_halt_sys() -#endif - - /* Debug options */ - -#define DEBUG_DECODE_F 0x000001 /* print decoded instruction */ -#define DEBUG_TRACE_F 0x000002 /* dump regs before/after execution */ -#define DEBUG_STEP_F 0x000004 -#define DEBUG_DISASSEMBLE_F 0x000008 -#define DEBUG_BREAK_F 0x000010 -#define DEBUG_SVC_F 0x000020 -#define DEBUG_FS_F 0x000080 -#define DEBUG_PROC_F 0x000100 -#define DEBUG_SYSINT_F 0x000200 /* bios system interrupts. */ -#define DEBUG_TRACECALL_F 0x000400 -#define DEBUG_INSTRUMENT_F 0x000800 -#define DEBUG_MEM_TRACE_F 0x001000 -#define DEBUG_IO_TRACE_F 0x002000 -#define DEBUG_TRACECALL_REGS_F 0x004000 -#define DEBUG_DECODE_NOPRINT_F 0x008000 -#define DEBUG_SAVE_IP_CS_F 0x010000 -#define DEBUG_SYS_F (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F) - - void X86EMU_trace_regs(void); - void X86EMU_trace_xregs(void); - void X86EMU_dump_memory(uint16_t seg, uint16_t off, uint32_t amt); - int X86EMU_trace_on(void); - int X86EMU_trace_off(void); - int X86EMU_set_debug(int debug); - void X86EMU_setMemBase(void *base, unsigned long size); - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_X86EMU_H */ diff --git a/include/x86emui.h b/include/x86emui.h deleted file mode 100644 index 33d8e82..0000000 --- a/include/x86emui.h +++ /dev/null @@ -1,99 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for system specific functions. These functions -* are always compiled and linked in the OS depedent libraries, -* and never in a binary portable driver. -* -****************************************************************************/ - -/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/x86emui.h,v 1.4 2001/04/01 13:59:58 tsi Exp $ */ - -#ifndef __X86EMU_X86EMUI_H -#define __X86EMU_X86EMUI_H - -/* - * If we are compiling in C++ mode, we can compile some functions as - * inline to increase performance (however the code size increases quite - * dramatically in this case). - */ - -#if defined(__cplusplus) && !defined(_NO_INLINE) -#define _INLINE inline -#else -#define _INLINE static -#endif - -/* Get rid of unused parameters in C++ compilation mode */ - -#ifdef __cplusplus -#define X86EMU_UNUSED(v) -#else -#define X86EMU_UNUSED(v) v -#endif - -#include "radeonfb.h" - -#include "x86emu.h" -#include "x86regs.h" -#include "x86decode.h" -#include "x86ops.h" -#include "x86prim_ops.h" -#include "x86fpu.h" - -/*--------------------------- Inline Functions ----------------------------*/ - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -extern uint8_t (X86APIP sys_rdb)(uint32_t addr); -extern uint16_t (X86APIP sys_rdw)(uint32_t addr); -extern uint32_t (X86APIP sys_rdl)(uint32_t addr); -extern void (X86APIP sys_wrb)(uint32_t addr,uint8_t val); -extern void (X86APIP sys_wrw)(uint32_t addr,uint16_t val); -extern void (X86APIP sys_wrl)(uint32_t addr,uint32_t val); - -extern uint8_t (X86APIP sys_inb)(X86EMU_pioAddr addr); -extern uint16_t (X86APIP sys_inw)(X86EMU_pioAddr addr); -extern uint32_t (X86APIP sys_inl)(X86EMU_pioAddr addr); -extern void (X86APIP sys_outb)(X86EMU_pioAddr addr,uint8_t val); -extern void (X86APIP sys_outw)(X86EMU_pioAddr addr,uint16_t val); -extern void (X86APIP sys_outl)(X86EMU_pioAddr addr,uint32_t val); - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_X86EMUI_H */ diff --git a/include/x86fpu.h b/include/x86fpu.h deleted file mode 100644 index 8bf98e1..0000000 --- a/include/x86fpu.h +++ /dev/null @@ -1,61 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for FPU instruction decoding. -* -****************************************************************************/ - -#ifndef __X86EMU_FPU_H -#define __X86EMU_FPU_H - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -/* these have to be defined, whether 8087 support compiled in or not. */ - -extern void x86emuOp_esc_coprocess_d8 (uint8_t op1); -extern void x86emuOp_esc_coprocess_d9 (uint8_t op1); -extern void x86emuOp_esc_coprocess_da (uint8_t op1); -extern void x86emuOp_esc_coprocess_db (uint8_t op1); -extern void x86emuOp_esc_coprocess_dc (uint8_t op1); -extern void x86emuOp_esc_coprocess_dd (uint8_t op1); -extern void x86emuOp_esc_coprocess_de (uint8_t op1); -extern void x86emuOp_esc_coprocess_df (uint8_t op1); - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_FPU_H */ diff --git a/include/x86fpu_regs.h b/include/x86fpu_regs.h deleted file mode 100644 index 89402c4..0000000 --- a/include/x86fpu_regs.h +++ /dev/null @@ -1,116 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for FPU register definitions. -* -****************************************************************************/ - -#ifndef __X86EMU_FPU_REGS_H -#define __X86EMU_FPU_REGS_H - -#ifdef X86_FPU_SUPPORT - -#pragma pack(1) - -/* Basic 8087 register can hold any of the following values: */ - -union x86_fpu_reg_u { - s8 tenbytes[10]; - double dval; - float fval; - s16 sval; - s32 lval; - }; - -struct x86_fpu_reg { - union x86_fpu_reg_u reg; - char tag; - }; - -/* - * Since we are not going to worry about the problems of aliasing - * registers, every time a register is modified, its result type is - * set in the tag fields for that register. If some operation - * attempts to access the type in a way inconsistent with its current - * storage format, then we flag the operation. If common, we'll - * attempt the conversion. - */ - -#define X86_FPU_VALID 0x80 -#define X86_FPU_REGTYP(r) ((r) & 0x7F) - -#define X86_FPU_WORD 0x0 -#define X86_FPU_SHORT 0x1 -#define X86_FPU_LONG 0x2 -#define X86_FPU_FLOAT 0x3 -#define X86_FPU_DOUBLE 0x4 -#define X86_FPU_LDBL 0x5 -#define X86_FPU_BSD 0x6 - -#define X86_FPU_STKTOP 0 - -struct x86_fpu_registers -{ - struct x86_fpu_reg x86_fpu_stack[8]; - int x86_fpu_flags; - int x86_fpu_config; /* rounding modes, etc. */ - short x86_fpu_tos, x86_fpu_bos; -}; - -#pragma pack() - -/* - * There are two versions of the following macro. - * - * One version is for opcode D9, for which there are more than 32 - * instructions encoded in the second byte of the opcode. - * - * The other version, deals with all the other 7 i87 opcodes, for - * which there are only 32 strings needed to describe the - * instructions. - */ - -#endif /* X86_FPU_SUPPORT */ - -#ifdef DBG_X86EMU -#define DECODE_PRINTINSTR32(t, mod, rh, rl) \ - DECODE_PRINTF(t[(mod << 3) + (rh)]); -#define DECODE_PRINTINSTR256(t, mod, rh, rl) \ - DECODE_PRINTF(t[(mod << 6) + (rh << 3) + (rl)]); -#else -#define DECODE_PRINTINSTR32(t,mod,rh,rl) -#define DECODE_PRINTINSTR256(t,mod,rh,rl) -#endif - -#endif /* __X86EMU_FPU_REGS_H */ diff --git a/include/x86ops.h b/include/x86ops.h deleted file mode 100644 index 85e30cc..0000000 --- a/include/x86ops.h +++ /dev/null @@ -1,45 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for operand decoding functions. -* -****************************************************************************/ - -#ifndef __X86EMU_OPS_H -#define __X86EMU_OPS_H - -extern void (*x86emu_optab[0x100])(uint8_t op1); -extern void (*x86emu_optab2[0x100])(uint8_t op2); - -#endif /* __X86EMU_OPS_H */ diff --git a/include/x86pcibios.h b/include/x86pcibios.h deleted file mode 100644 index 5445c73..0000000 --- a/include/x86pcibios.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef PCI_BIOS_H -#define PCI_BIOS_H - -enum { - PCI_BIOS_PRESENT = 0xB101, - FIND_PCI_DEVICE = 0xB102, - FIND_PCI_CLASS_CODE = 0xB103, - GENERATE_SPECIAL_CYCLE = 0xB106, - READ_CONFIG_BYTE = 0xB108, - READ_CONFIG_WORD = 0xB109, - READ_CONFIG_DWORD = 0xB10A, - WRITE_CONFIG_BYTE = 0xB10B, - WRITE_CONFIG_WORD = 0xB10C, - WRITE_CONFIG_DWORD = 0xB10D, - GET_IRQ_ROUTING_OPTIONS = 0xB10E, - SET_PCI_IRQ = 0xB10F -}; - -enum { - SUCCESSFUL = 0x00, - FUNC_NOT_SUPPORTED = 0x81, - BAD_VENDOR_ID = 0x83, - DEVICE_NOT_FOUND = 0x86, - BAD_REGISTER_NUMBER = 0x87, - SET_FAILED = 0x88, - BUFFER_TOO_SMALL = 0x89 -}; -#endif /* PCI_BIOS_H */ - diff --git a/include/x86prim_asm.h b/include/x86prim_asm.h deleted file mode 100644 index 4fa8d55..0000000 --- a/include/x86prim_asm.h +++ /dev/null @@ -1,971 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: Watcom C++ 10.6 or later -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Inline assembler versions of the primitive operand -* functions for faster performance. At the moment this is -* x86 inline assembler, but these functions could be replaced -* with native inline assembler for each supported processor -* platform. -* -****************************************************************************/ -/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/prim_asm.h,v 1.3 2000/04/19 15:48:15 tsi Exp $ */ - -#ifndef __X86EMU_PRIM_ASM_H -#define __X86EMU_PRIM_ASM_H - -#ifdef __WATCOMC__ - -#ifndef VALIDATE -#define __HAVE_INLINE_ASSEMBLER__ -#endif - -u32 get_flags_asm(void); -#pragma aux get_flags_asm = \ - "pushf" \ - "pop eax" \ - value [eax] \ - modify exact [eax]; - -u16 aaa_word_asm(u32 *flags,u16 d); -#pragma aux aaa_word_asm = \ - "push [edi]" \ - "popf" \ - "aaa" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u16 aas_word_asm(u32 *flags,u16 d); -#pragma aux aas_word_asm = \ - "push [edi]" \ - "popf" \ - "aas" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u16 aad_word_asm(u32 *flags,u16 d); -#pragma aux aad_word_asm = \ - "push [edi]" \ - "popf" \ - "aad" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u16 aam_word_asm(u32 *flags,u8 d); -#pragma aux aam_word_asm = \ - "push [edi]" \ - "popf" \ - "aam" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [ax] \ - modify exact [ax]; - -u8 adc_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux adc_byte_asm = \ - "push [edi]" \ - "popf" \ - "adc al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 adc_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux adc_word_asm = \ - "push [edi]" \ - "popf" \ - "adc ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 adc_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux adc_long_asm = \ - "push [edi]" \ - "popf" \ - "adc eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -u8 add_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux add_byte_asm = \ - "push [edi]" \ - "popf" \ - "add al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 add_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux add_word_asm = \ - "push [edi]" \ - "popf" \ - "add ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 add_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux add_long_asm = \ - "push [edi]" \ - "popf" \ - "add eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -u8 and_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux and_byte_asm = \ - "push [edi]" \ - "popf" \ - "and al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 and_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux and_word_asm = \ - "push [edi]" \ - "popf" \ - "and ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 and_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux and_long_asm = \ - "push [edi]" \ - "popf" \ - "and eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -u8 cmp_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux cmp_byte_asm = \ - "push [edi]" \ - "popf" \ - "cmp al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 cmp_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux cmp_word_asm = \ - "push [edi]" \ - "popf" \ - "cmp ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 cmp_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux cmp_long_asm = \ - "push [edi]" \ - "popf" \ - "cmp eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -u8 daa_byte_asm(u32 *flags,u8 d); -#pragma aux daa_byte_asm = \ - "push [edi]" \ - "popf" \ - "daa" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [al] \ - modify exact [al]; - -u8 das_byte_asm(u32 *flags,u8 d); -#pragma aux das_byte_asm = \ - "push [edi]" \ - "popf" \ - "das" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [al] \ - modify exact [al]; - -u8 dec_byte_asm(u32 *flags,u8 d); -#pragma aux dec_byte_asm = \ - "push [edi]" \ - "popf" \ - "dec al" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [al] \ - modify exact [al]; - -u16 dec_word_asm(u32 *flags,u16 d); -#pragma aux dec_word_asm = \ - "push [edi]" \ - "popf" \ - "dec ax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u32 dec_long_asm(u32 *flags,u32 d); -#pragma aux dec_long_asm = \ - "push [edi]" \ - "popf" \ - "dec eax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] \ - value [eax] \ - modify exact [eax]; - -u8 inc_byte_asm(u32 *flags,u8 d); -#pragma aux inc_byte_asm = \ - "push [edi]" \ - "popf" \ - "inc al" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [al] \ - modify exact [al]; - -u16 inc_word_asm(u32 *flags,u16 d); -#pragma aux inc_word_asm = \ - "push [edi]" \ - "popf" \ - "inc ax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u32 inc_long_asm(u32 *flags,u32 d); -#pragma aux inc_long_asm = \ - "push [edi]" \ - "popf" \ - "inc eax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] \ - value [eax] \ - modify exact [eax]; - -u8 or_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux or_byte_asm = \ - "push [edi]" \ - "popf" \ - "or al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 or_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux or_word_asm = \ - "push [edi]" \ - "popf" \ - "or ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 or_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux or_long_asm = \ - "push [edi]" \ - "popf" \ - "or eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -u8 neg_byte_asm(u32 *flags,u8 d); -#pragma aux neg_byte_asm = \ - "push [edi]" \ - "popf" \ - "neg al" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [al] \ - modify exact [al]; - -u16 neg_word_asm(u32 *flags,u16 d); -#pragma aux neg_word_asm = \ - "push [edi]" \ - "popf" \ - "neg ax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u32 neg_long_asm(u32 *flags,u32 d); -#pragma aux neg_long_asm = \ - "push [edi]" \ - "popf" \ - "neg eax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] \ - value [eax] \ - modify exact [eax]; - -u8 not_byte_asm(u32 *flags,u8 d); -#pragma aux not_byte_asm = \ - "push [edi]" \ - "popf" \ - "not al" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [al] \ - modify exact [al]; - -u16 not_word_asm(u32 *flags,u16 d); -#pragma aux not_word_asm = \ - "push [edi]" \ - "popf" \ - "not ax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u32 not_long_asm(u32 *flags,u32 d); -#pragma aux not_long_asm = \ - "push [edi]" \ - "popf" \ - "not eax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] \ - value [eax] \ - modify exact [eax]; - -u8 rcl_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux rcl_byte_asm = \ - "push [edi]" \ - "popf" \ - "rcl al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 rcl_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux rcl_word_asm = \ - "push [edi]" \ - "popf" \ - "rcl ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 rcl_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux rcl_long_asm = \ - "push [edi]" \ - "popf" \ - "rcl eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u8 rcr_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux rcr_byte_asm = \ - "push [edi]" \ - "popf" \ - "rcr al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 rcr_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux rcr_word_asm = \ - "push [edi]" \ - "popf" \ - "rcr ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 rcr_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux rcr_long_asm = \ - "push [edi]" \ - "popf" \ - "rcr eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u8 rol_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux rol_byte_asm = \ - "push [edi]" \ - "popf" \ - "rol al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 rol_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux rol_word_asm = \ - "push [edi]" \ - "popf" \ - "rol ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 rol_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux rol_long_asm = \ - "push [edi]" \ - "popf" \ - "rol eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u8 ror_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux ror_byte_asm = \ - "push [edi]" \ - "popf" \ - "ror al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 ror_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux ror_word_asm = \ - "push [edi]" \ - "popf" \ - "ror ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 ror_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux ror_long_asm = \ - "push [edi]" \ - "popf" \ - "ror eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u8 shl_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux shl_byte_asm = \ - "push [edi]" \ - "popf" \ - "shl al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 shl_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux shl_word_asm = \ - "push [edi]" \ - "popf" \ - "shl ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 shl_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux shl_long_asm = \ - "push [edi]" \ - "popf" \ - "shl eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u8 shr_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux shr_byte_asm = \ - "push [edi]" \ - "popf" \ - "shr al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 shr_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux shr_word_asm = \ - "push [edi]" \ - "popf" \ - "shr ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 shr_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux shr_long_asm = \ - "push [edi]" \ - "popf" \ - "shr eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u8 sar_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux sar_byte_asm = \ - "push [edi]" \ - "popf" \ - "sar al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 sar_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux sar_word_asm = \ - "push [edi]" \ - "popf" \ - "sar ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 sar_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux sar_long_asm = \ - "push [edi]" \ - "popf" \ - "sar eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u16 shld_word_asm(u32 *flags,u16 d, u16 fill, u8 s); -#pragma aux shld_word_asm = \ - "push [edi]" \ - "popf" \ - "shld ax,dx,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [dx] [cl] \ - value [ax] \ - modify exact [ax dx cl]; - -u32 shld_long_asm(u32 *flags,u32 d, u32 fill, u8 s); -#pragma aux shld_long_asm = \ - "push [edi]" \ - "popf" \ - "shld eax,edx,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [edx] [cl] \ - value [eax] \ - modify exact [eax edx cl]; - -u16 shrd_word_asm(u32 *flags,u16 d, u16 fill, u8 s); -#pragma aux shrd_word_asm = \ - "push [edi]" \ - "popf" \ - "shrd ax,dx,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [dx] [cl] \ - value [ax] \ - modify exact [ax dx cl]; - -u32 shrd_long_asm(u32 *flags,u32 d, u32 fill, u8 s); -#pragma aux shrd_long_asm = \ - "push [edi]" \ - "popf" \ - "shrd eax,edx,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [edx] [cl] \ - value [eax] \ - modify exact [eax edx cl]; - -u8 sbb_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux sbb_byte_asm = \ - "push [edi]" \ - "popf" \ - "sbb al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 sbb_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux sbb_word_asm = \ - "push [edi]" \ - "popf" \ - "sbb ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 sbb_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux sbb_long_asm = \ - "push [edi]" \ - "popf" \ - "sbb eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -u8 sub_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux sub_byte_asm = \ - "push [edi]" \ - "popf" \ - "sub al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 sub_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux sub_word_asm = \ - "push [edi]" \ - "popf" \ - "sub ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 sub_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux sub_long_asm = \ - "push [edi]" \ - "popf" \ - "sub eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -void test_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux test_byte_asm = \ - "push [edi]" \ - "popf" \ - "test al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - modify exact [al bl]; - -void test_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux test_word_asm = \ - "push [edi]" \ - "popf" \ - "test ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - modify exact [ax bx]; - -void test_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux test_long_asm = \ - "push [edi]" \ - "popf" \ - "test eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - modify exact [eax ebx]; - -u8 xor_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux xor_byte_asm = \ - "push [edi]" \ - "popf" \ - "xor al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 xor_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux xor_word_asm = \ - "push [edi]" \ - "popf" \ - "xor ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 xor_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux xor_long_asm = \ - "push [edi]" \ - "popf" \ - "xor eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -void imul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s); -#pragma aux imul_byte_asm = \ - "push [edi]" \ - "popf" \ - "imul bl" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],ax" \ - parm [edi] [esi] [al] [bl] \ - modify exact [esi ax bl]; - -void imul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s); -#pragma aux imul_word_asm = \ - "push [edi]" \ - "popf" \ - "imul bx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],ax" \ - "mov [ecx],dx" \ - parm [edi] [esi] [ecx] [ax] [bx]\ - modify exact [esi edi ax bx dx]; - -void imul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s); -#pragma aux imul_long_asm = \ - "push [edi]" \ - "popf" \ - "imul ebx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],eax" \ - "mov [ecx],edx" \ - parm [edi] [esi] [ecx] [eax] [ebx] \ - modify exact [esi edi eax ebx edx]; - -void mul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s); -#pragma aux mul_byte_asm = \ - "push [edi]" \ - "popf" \ - "mul bl" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],ax" \ - parm [edi] [esi] [al] [bl] \ - modify exact [esi ax bl]; - -void mul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s); -#pragma aux mul_word_asm = \ - "push [edi]" \ - "popf" \ - "mul bx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],ax" \ - "mov [ecx],dx" \ - parm [edi] [esi] [ecx] [ax] [bx]\ - modify exact [esi edi ax bx dx]; - -void mul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s); -#pragma aux mul_long_asm = \ - "push [edi]" \ - "popf" \ - "mul ebx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],eax" \ - "mov [ecx],edx" \ - parm [edi] [esi] [ecx] [eax] [ebx] \ - modify exact [esi edi eax ebx edx]; - -void idiv_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s); -#pragma aux idiv_byte_asm = \ - "push [edi]" \ - "popf" \ - "idiv bl" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],al" \ - "mov [ecx],ah" \ - parm [edi] [esi] [ecx] [ax] [bl]\ - modify exact [esi edi ax bl]; - -void idiv_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s); -#pragma aux idiv_word_asm = \ - "push [edi]" \ - "popf" \ - "idiv bx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],ax" \ - "mov [ecx],dx" \ - parm [edi] [esi] [ecx] [ax] [dx] [bx]\ - modify exact [esi edi ax dx bx]; - -void idiv_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s); -#pragma aux idiv_long_asm = \ - "push [edi]" \ - "popf" \ - "idiv ebx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],eax" \ - "mov [ecx],edx" \ - parm [edi] [esi] [ecx] [eax] [edx] [ebx]\ - modify exact [esi edi eax edx ebx]; - -void div_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s); -#pragma aux div_byte_asm = \ - "push [edi]" \ - "popf" \ - "div bl" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],al" \ - "mov [ecx],ah" \ - parm [edi] [esi] [ecx] [ax] [bl]\ - modify exact [esi edi ax bl]; - -void div_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s); -#pragma aux div_word_asm = \ - "push [edi]" \ - "popf" \ - "div bx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],ax" \ - "mov [ecx],dx" \ - parm [edi] [esi] [ecx] [ax] [dx] [bx]\ - modify exact [esi edi ax dx bx]; - -void div_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s); -#pragma aux div_long_asm = \ - "push [edi]" \ - "popf" \ - "div ebx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],eax" \ - "mov [ecx],edx" \ - parm [edi] [esi] [ecx] [eax] [edx] [ebx]\ - modify exact [esi edi eax edx ebx]; - -#endif - -#endif /* __X86EMU_PRIM_ASM_H */ diff --git a/include/x86prim_ops.h b/include/x86prim_ops.h deleted file mode 100644 index 09d04a2..0000000 --- a/include/x86prim_ops.h +++ /dev/null @@ -1,232 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for primitive operation functions. -* -****************************************************************************/ - -#ifndef __X86EMU_PRIM_OPS_H -#define __X86EMU_PRIM_OPS_H - -#include "x86prim_asm.h" - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -uint16_t aaa_word (uint16_t d); -uint16_t aas_word (uint16_t d); -uint16_t aad_word (uint16_t d); -uint16_t aam_word (uint8_t d); -uint8_t adc_byte (uint8_t d, uint8_t s); -uint16_t adc_word (uint16_t d, uint16_t s); -uint32_t adc_long (uint32_t d, uint32_t s); -uint8_t add_byte (uint8_t d, uint8_t s); -uint16_t add_word (uint16_t d, uint16_t s); -uint32_t add_long (uint32_t d, uint32_t s); -uint8_t and_byte (uint8_t d, uint8_t s); -uint16_t and_word (uint16_t d, uint16_t s); -uint32_t and_long (uint32_t d, uint32_t s); -uint8_t cmp_byte (uint8_t d, uint8_t s); -uint16_t cmp_word (uint16_t d, uint16_t s); -uint32_t cmp_long (uint32_t d, uint32_t s); -uint8_t daa_byte (uint8_t d); -uint8_t das_byte (uint8_t d); -uint8_t dec_byte (uint8_t d); -uint16_t dec_word (uint16_t d); -uint32_t dec_long (uint32_t d); -uint8_t inc_byte (uint8_t d); -uint16_t inc_word (uint16_t d); -uint32_t inc_long (uint32_t d); -uint8_t or_byte (uint8_t d, uint8_t s); -uint16_t or_word (uint16_t d, uint16_t s); -uint32_t or_long (uint32_t d, uint32_t s); -uint8_t neg_byte (uint8_t s); -uint16_t neg_word (uint16_t s); -uint32_t neg_long (uint32_t s); -uint8_t not_byte (uint8_t s); -uint16_t not_word (uint16_t s); -uint32_t not_long (uint32_t s); -uint8_t rcl_byte (uint8_t d, uint8_t s); -uint16_t rcl_word (uint16_t d, uint8_t s); -uint32_t rcl_long (uint32_t d, uint8_t s); -uint8_t rcr_byte (uint8_t d, uint8_t s); -uint16_t rcr_word (uint16_t d, uint8_t s); -uint32_t rcr_long (uint32_t d, uint8_t s); -uint8_t rol_byte (uint8_t d, uint8_t s); -uint16_t rol_word (uint16_t d, uint8_t s); -uint32_t rol_long (uint32_t d, uint8_t s); -uint8_t ror_byte (uint8_t d, uint8_t s); -uint16_t ror_word (uint16_t d, uint8_t s); -uint32_t ror_long (uint32_t d, uint8_t s); -uint8_t shl_byte (uint8_t d, uint8_t s); -uint16_t shl_word (uint16_t d, uint8_t s); -uint32_t shl_long (uint32_t d, uint8_t s); -uint8_t shr_byte (uint8_t d, uint8_t s); -uint16_t shr_word (uint16_t d, uint8_t s); -uint32_t shr_long (uint32_t d, uint8_t s); -uint8_t sar_byte (uint8_t d, uint8_t s); -uint16_t sar_word (uint16_t d, uint8_t s); -uint32_t sar_long (uint32_t d, uint8_t s); -uint16_t shld_word (uint16_t d, uint16_t fill, uint8_t s); -uint32_t shld_long (uint32_t d, uint32_t fill, uint8_t s); -uint16_t shrd_word (uint16_t d, uint16_t fill, uint8_t s); -uint32_t shrd_long (uint32_t d, uint32_t fill, uint8_t s); -uint8_t sbb_byte (uint8_t d, uint8_t s); -uint16_t sbb_word (uint16_t d, uint16_t s); -uint32_t sbb_long (uint32_t d, uint32_t s); -uint8_t sub_byte (uint8_t d, uint8_t s); -uint16_t sub_word (uint16_t d, uint16_t s); -uint32_t sub_long (uint32_t d, uint32_t s); -void test_byte (uint8_t d, uint8_t s); -void test_word (uint16_t d, uint16_t s); -void test_long (uint32_t d, uint32_t s); -uint8_t xor_byte (uint8_t d, uint8_t s); -uint16_t xor_word (uint16_t d, uint16_t s); -uint32_t xor_long (uint32_t d, uint32_t s); -void imul_byte (uint8_t s); -void imul_word (uint16_t s); -void imul_long (uint32_t s); -void imul_long_direct(uint32_t *res_lo, uint32_t* res_hi,uint32_t d, uint32_t s); -void mul_byte (uint8_t s); -void mul_word (uint16_t s); -void mul_long (uint32_t s); -void idiv_byte (uint8_t s); -void idiv_word (uint16_t s); -void idiv_long (uint32_t s); -void div_byte (uint8_t s); -void div_word (uint16_t s); -void div_long (uint32_t s); -void ins (int size); -void outs (int size); -uint16_t mem_access_word (int addr); -void push_word (uint16_t w); -void push_long (uint32_t w); -uint16_t pop_word (void); -uint32_t pop_long (void); - - -#if defined(__HAVE_INLINE_ASSEMBLER__) && !defined(PRIM_OPS_NO_REDEFINE_ASM) - -#define aaa_word(d) aaa_word_asm(&M.x86.R_EFLG,d) -#define aas_word(d) aas_word_asm(&M.x86.R_EFLG,d) -#define aad_word(d) aad_word_asm(&M.x86.R_EFLG,d) -#define aam_word(d) aam_word_asm(&M.x86.R_EFLG,d) -#define adc_byte(d,s) adc_byte_asm(&M.x86.R_EFLG,d,s) -#define adc_word(d,s) adc_word_asm(&M.x86.R_EFLG,d,s) -#define adc_long(d,s) adc_long_asm(&M.x86.R_EFLG,d,s) -#define add_byte(d,s) add_byte_asm(&M.x86.R_EFLG,d,s) -#define add_word(d,s) add_word_asm(&M.x86.R_EFLG,d,s) -#define add_long(d,s) add_long_asm(&M.x86.R_EFLG,d,s) -#define and_byte(d,s) and_byte_asm(&M.x86.R_EFLG,d,s) -#define and_word(d,s) and_word_asm(&M.x86.R_EFLG,d,s) -#define and_long(d,s) and_long_asm(&M.x86.R_EFLG,d,s) -#define cmp_byte(d,s) cmp_byte_asm(&M.x86.R_EFLG,d,s) -#define cmp_word(d,s) cmp_word_asm(&M.x86.R_EFLG,d,s) -#define cmp_long(d,s) cmp_long_asm(&M.x86.R_EFLG,d,s) -#define daa_byte(d) daa_byte_asm(&M.x86.R_EFLG,d) -#define das_byte(d) das_byte_asm(&M.x86.R_EFLG,d) -#define dec_byte(d) dec_byte_asm(&M.x86.R_EFLG,d) -#define dec_word(d) dec_word_asm(&M.x86.R_EFLG,d) -#define dec_long(d) dec_long_asm(&M.x86.R_EFLG,d) -#define inc_byte(d) inc_byte_asm(&M.x86.R_EFLG,d) -#define inc_word(d) inc_word_asm(&M.x86.R_EFLG,d) -#define inc_long(d) inc_long_asm(&M.x86.R_EFLG,d) -#define or_byte(d,s) or_byte_asm(&M.x86.R_EFLG,d,s) -#define or_word(d,s) or_word_asm(&M.x86.R_EFLG,d,s) -#define or_long(d,s) or_long_asm(&M.x86.R_EFLG,d,s) -#define neg_byte(s) neg_byte_asm(&M.x86.R_EFLG,s) -#define neg_word(s) neg_word_asm(&M.x86.R_EFLG,s) -#define neg_long(s) neg_long_asm(&M.x86.R_EFLG,s) -#define not_byte(s) not_byte_asm(&M.x86.R_EFLG,s) -#define not_word(s) not_word_asm(&M.x86.R_EFLG,s) -#define not_long(s) not_long_asm(&M.x86.R_EFLG,s) -#define rcl_byte(d,s) rcl_byte_asm(&M.x86.R_EFLG,d,s) -#define rcl_word(d,s) rcl_word_asm(&M.x86.R_EFLG,d,s) -#define rcl_long(d,s) rcl_long_asm(&M.x86.R_EFLG,d,s) -#define rcr_byte(d,s) rcr_byte_asm(&M.x86.R_EFLG,d,s) -#define rcr_word(d,s) rcr_word_asm(&M.x86.R_EFLG,d,s) -#define rcr_long(d,s) rcr_long_asm(&M.x86.R_EFLG,d,s) -#define rol_byte(d,s) rol_byte_asm(&M.x86.R_EFLG,d,s) -#define rol_word(d,s) rol_word_asm(&M.x86.R_EFLG,d,s) -#define rol_long(d,s) rol_long_asm(&M.x86.R_EFLG,d,s) -#define ror_byte(d,s) ror_byte_asm(&M.x86.R_EFLG,d,s) -#define ror_word(d,s) ror_word_asm(&M.x86.R_EFLG,d,s) -#define ror_long(d,s) ror_long_asm(&M.x86.R_EFLG,d,s) -#define shl_byte(d,s) shl_byte_asm(&M.x86.R_EFLG,d,s) -#define shl_word(d,s) shl_word_asm(&M.x86.R_EFLG,d,s) -#define shl_long(d,s) shl_long_asm(&M.x86.R_EFLG,d,s) -#define shr_byte(d,s) shr_byte_asm(&M.x86.R_EFLG,d,s) -#define shr_word(d,s) shr_word_asm(&M.x86.R_EFLG,d,s) -#define shr_long(d,s) shr_long_asm(&M.x86.R_EFLG,d,s) -#define sar_byte(d,s) sar_byte_asm(&M.x86.R_EFLG,d,s) -#define sar_word(d,s) sar_word_asm(&M.x86.R_EFLG,d,s) -#define sar_long(d,s) sar_long_asm(&M.x86.R_EFLG,d,s) -#define shld_word(d,fill,s) shld_word_asm(&M.x86.R_EFLG,d,fill,s) -#define shld_long(d,fill,s) shld_long_asm(&M.x86.R_EFLG,d,fill,s) -#define shrd_word(d,fill,s) shrd_word_asm(&M.x86.R_EFLG,d,fill,s) -#define shrd_long(d,fill,s) shrd_long_asm(&M.x86.R_EFLG,d,fill,s) -#define sbb_byte(d,s) sbb_byte_asm(&M.x86.R_EFLG,d,s) -#define sbb_word(d,s) sbb_word_asm(&M.x86.R_EFLG,d,s) -#define sbb_long(d,s) sbb_long_asm(&M.x86.R_EFLG,d,s) -#define sub_byte(d,s) sub_byte_asm(&M.x86.R_EFLG,d,s) -#define sub_word(d,s) sub_word_asm(&M.x86.R_EFLG,d,s) -#define sub_long(d,s) sub_long_asm(&M.x86.R_EFLG,d,s) -#define test_byte(d,s) test_byte_asm(&M.x86.R_EFLG,d,s) -#define test_word(d,s) test_word_asm(&M.x86.R_EFLG,d,s) -#define test_long(d,s) test_long_asm(&M.x86.R_EFLG,d,s) -#define xor_byte(d,s) xor_byte_asm(&M.x86.R_EFLG,d,s) -#define xor_word(d,s) xor_word_asm(&M.x86.R_EFLG,d,s) -#define xor_long(d,s) xor_long_asm(&M.x86.R_EFLG,d,s) -#define imul_byte(s) imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s) -#define imul_word(s) imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s) -#define imul_long(s) imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s) -#define imul_long_direct(res_lo,res_hi,d,s) imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s) -#define mul_byte(s) mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s) -#define mul_word(s) mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s) -#define mul_long(s) mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s) -#define idiv_byte(s) idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s) -#define idiv_word(s) idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s) -#define idiv_long(s) idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s) -#define div_byte(s) div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s) -#define div_word(s) div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s) -#define div_long(s) div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s) - -#endif - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_PRIM_OPS_H */ diff --git a/include/x86regs.h b/include/x86regs.h deleted file mode 100644 index 4e1ef37..0000000 --- a/include/x86regs.h +++ /dev/null @@ -1,358 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1996-1999 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: Header file for x86 register definitions. - * - ****************************************************************************/ -/* $XFree86: xc/extras/x86emu/include/x86emu/regs.h,v 1.3 2001/10/28 03:32:25 tsi Exp $ */ - -#ifndef __X86EMU_REGS_H -#define __X86EMU_REGS_H -#include "x86debug.h" - -/*---------------------- Macros and type definitions ----------------------*/ - -//#pragma pack(1) - -/* - * General EAX, EBX, ECX, EDX type registers. Note that for - * portability, and speed, the issue of byte swapping is not addressed - * in the registers. All registers are stored in the default format - * available on the host machine. The only critical issue is that the - * registers should line up EXACTLY in the same manner as they do in - * the 386. That is: - * - * EAX & 0xff === AL - * EAX & 0xffff == AX - * - * etc. The result is that alot of the calculations can then be - * done using the native instruction set fully. - */ - -typedef struct { - uint32_t e_reg; -} I32_reg_t; - -typedef struct { - uint16_t filler0, x_reg; -} I16_reg_t; - -typedef struct { - uint8_t filler0, filler1, h_reg, l_reg; -} I8_reg_t; - -typedef union { - I32_reg_t I32_reg; - I16_reg_t I16_reg; - I8_reg_t I8_reg; -} i386_general_register; - -struct i386_general_regs { - i386_general_register A, B, C, D; -}; - -typedef struct i386_general_regs Gen_reg_t; - -struct i386_special_regs { - i386_general_register SP, BP, SI, DI, IP; - uint32_t FLAGS; -}; - -/* - * Segment registers here represent the 16 bit quantities - * CS, DS, ES, SS. - */ - -struct i386_segment_regs { - uint16_t CS, DS, SS, ES, FS, GS; -}; - -/* 8 bit registers */ -#define R_AH gen.A.I8_reg.h_reg -#define R_AL gen.A.I8_reg.l_reg -#define R_BH gen.B.I8_reg.h_reg -#define R_BL gen.B.I8_reg.l_reg -#define R_CH gen.C.I8_reg.h_reg -#define R_CL gen.C.I8_reg.l_reg -#define R_DH gen.D.I8_reg.h_reg -#define R_DL gen.D.I8_reg.l_reg - -/* 16 bit registers */ -#define R_AX gen.A.I16_reg.x_reg -#define R_BX gen.B.I16_reg.x_reg -#define R_CX gen.C.I16_reg.x_reg -#define R_DX gen.D.I16_reg.x_reg - -/* 32 bit extended registers */ -#define R_EAX gen.A.I32_reg.e_reg -#define R_EBX gen.B.I32_reg.e_reg -#define R_ECX gen.C.I32_reg.e_reg -#define R_EDX gen.D.I32_reg.e_reg - -/* special registers */ -#define R_SP spc.SP.I16_reg.x_reg -#define R_BP spc.BP.I16_reg.x_reg -#define R_SI spc.SI.I16_reg.x_reg -#define R_DI spc.DI.I16_reg.x_reg -#define R_IP spc.IP.I16_reg.x_reg -#define R_FLG spc.FLAGS - -/* special registers */ -#define R_SP spc.SP.I16_reg.x_reg -#define R_BP spc.BP.I16_reg.x_reg -#define R_SI spc.SI.I16_reg.x_reg -#define R_DI spc.DI.I16_reg.x_reg -#define R_IP spc.IP.I16_reg.x_reg -#define R_FLG spc.FLAGS - -/* special registers */ -#define R_ESP spc.SP.I32_reg.e_reg -#define R_EBP spc.BP.I32_reg.e_reg -#define R_ESI spc.SI.I32_reg.e_reg -#define R_EDI spc.DI.I32_reg.e_reg -#define R_EIP spc.IP.I32_reg.e_reg -#define R_EFLG spc.FLAGS - -/* segment registers */ -#define R_CS seg.CS -#define R_DS seg.DS -#define R_SS seg.SS -#define R_ES seg.ES -#define R_FS seg.FS -#define R_GS seg.GS - -/* flag conditions */ -#define FB_CF 0x0001 /* CARRY flag */ -#define FB_PF 0x0004 /* PARITY flag */ -#define FB_AF 0x0010 /* AUX flag */ -#define FB_ZF 0x0040 /* ZERO flag */ -#define FB_SF 0x0080 /* SIGN flag */ -#define FB_TF 0x0100 /* TRAP flag */ -#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */ -#define FB_DF 0x0400 /* DIR flag */ -#define FB_OF 0x0800 /* OVERFLOW flag */ - -/* 80286 and above always have bit#1 set */ -#define F_ALWAYS_ON (0x0002) /* flag bits always on */ - -/* - * Define a mask for only those flag bits we will ever pass back - * (via PUSHF) - */ -#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF) - -/* following bits masked in to a 16bit quantity */ - -#define F_CF 0x0001 /* CARRY flag */ -#define F_PF 0x0004 /* PARITY flag */ -#define F_AF 0x0010 /* AUX flag */ -#define F_ZF 0x0040 /* ZERO flag */ -#define F_SF 0x0080 /* SIGN flag */ -#define F_TF 0x0100 /* TRAP flag */ -#define F_IF 0x0200 /* INTERRUPT ENABLE flag */ -#define F_DF 0x0400 /* DIR flag */ -#define F_OF 0x0800 /* OVERFLOW flag */ - -#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag)) -#define SET_FLAG(flag) (M.x86.R_FLG |= (flag)) -#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag)) -#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag)) -#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0) - -#define CONDITIONAL_SET_FLAG(COND,FLAG) \ - if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG) - -#define F_PF_CALC 0x010000 /* PARITY flag has been calced */ -#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */ -#define F_SF_CALC 0x040000 /* SIGN flag has been calced */ - -#define F_ALL_CALC 0xff0000 /* All have been calced */ - -/* - * Emulator machine state. - * Segment usage control. - */ -#define SYSMODE_SEG_DS_SS 0x00000001 -#define SYSMODE_SEGOVR_CS 0x00000002 -#define SYSMODE_SEGOVR_DS 0x00000004 -#define SYSMODE_SEGOVR_ES 0x00000008 -#define SYSMODE_SEGOVR_FS 0x00000010 -#define SYSMODE_SEGOVR_GS 0x00000020 -#define SYSMODE_SEGOVR_SS 0x00000040 -#define SYSMODE_PREFIX_REPE 0x00000080 -#define SYSMODE_PREFIX_REPNE 0x00000100 -#define SYSMODE_PREFIX_DATA 0x00000200 -#define SYSMODE_PREFIX_ADDR 0x00000400 -#define SYSMODE_INTR_PENDING 0x10000000 -#define SYSMODE_EXTRN_INTR 0x20000000 -#define SYSMODE_HALTED 0x40000000 - -#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \ - SYSMODE_SEGOVR_CS | \ - SYSMODE_SEGOVR_DS | \ - SYSMODE_SEGOVR_ES | \ - SYSMODE_SEGOVR_FS | \ - SYSMODE_SEGOVR_GS | \ - SYSMODE_SEGOVR_SS) -#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \ - SYSMODE_SEGOVR_CS | \ - SYSMODE_SEGOVR_DS | \ - SYSMODE_SEGOVR_ES | \ - SYSMODE_SEGOVR_FS | \ - SYSMODE_SEGOVR_GS | \ - SYSMODE_SEGOVR_SS | \ - SYSMODE_PREFIX_DATA | \ - SYSMODE_PREFIX_ADDR) - -#define INTR_SYNCH 0x1 -#define INTR_ASYNCH 0x2 -#define INTR_HALTED 0x4 - -typedef struct { - struct i386_general_regs gen; - struct i386_special_regs spc; - struct i386_segment_regs seg; - /* - * MODE contains information on: - * REPE prefix 2 bits repe,repne - * SEGMENT overrides 5 bits normal,DS,SS,CS,ES - * Delayed flag set 3 bits (zero, signed, parity) - * reserved 6 bits - * interrupt # 8 bits instruction raised interrupt - * BIOS video segregs 4 bits - * Interrupt Pending 1 bits - * Extern interrupt 1 bits - * Halted 1 bits - */ - uint32_t mode; - volatile int intr; /* mask of pending interrupts */ - int debug; -#ifdef DBG_X86EMU - int check; - uint16_t saved_ip; - uint16_t saved_cs; - int enc_pos; - int enc_str_pos; - // char decode_buf[32]; /* encoded byte stream */ - char decoded_buf[256]; /* disassembled strings */ -#endif - uint8_t intno; - uint8_t __pad[3]; -} X86EMU_regs; - -/**************************************************************************** -REMARKS: -Structure maintaining the emulator machine state. - -MEMBERS: -mem_base - Base real mode memory for the emulator -abseg - Base for the absegment -mem_size - Size of the real mode memory block for the emulator -private - private data pointer -x86 - X86 registers - ****************************************************************************/ -typedef struct -{ - unsigned long mem_base; - unsigned long mem_size; - unsigned long abseg; - void* private; - X86EMU_regs x86; -} X86EMU_sysEnv; - -//#pragma pack() - -/*----------------------------- Global Variables --------------------------*/ - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -/* Global emulator machine state. - * - * We keep it global to avoid pointer dereferences in the code for speed. - */ - -extern X86EMU_sysEnv _X86EMU_env; - -#define M _X86EMU_env - -#define X86_EAX M.x86.R_EAX -#define X86_EBX M.x86.R_EBX -#define X86_ECX M.x86.R_ECX -#define X86_EDX M.x86.R_EDX -#define X86_ESI M.x86.R_ESI -#define X86_EDI M.x86.R_EDI -#define X86_EBP M.x86.R_EBP -#define X86_EIP M.x86.R_EIP -#define X86_ESP M.x86.R_ESP -#define X86_EFLAGS M.x86.R_EFLG - -#define X86_FLAGS M.x86.R_FLG -#define X86_AX M.x86.R_AX -#define X86_BX M.x86.R_BX -#define X86_CX M.x86.R_CX -#define X86_DX M.x86.R_DX -#define X86_SI M.x86.R_SI -#define X86_DI M.x86.R_DI -#define X86_BP M.x86.R_BP -#define X86_IP M.x86.R_IP -#define X86_SP M.x86.R_SP -#define X86_CS M.x86.R_CS -#define X86_DS M.x86.R_DS -#define X86_ES M.x86.R_ES -#define X86_SS M.x86.R_SS -#define X86_FS M.x86.R_FS -#define X86_GS M.x86.R_GS - -#define X86_AL M.x86.R_AL -#define X86_BL M.x86.R_BL -#define X86_CL M.x86.R_CL -#define X86_DL M.x86.R_DL - -#define X86_AH M.x86.R_AH -#define X86_BH M.x86.R_BH -#define X86_CH M.x86.R_CH -#define X86_DH M.x86.R_DH - - -/*-------------------------- Function Prototypes --------------------------*/ - -/* Function to log information at runtime */ - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_REGS_H */ diff --git a/include/xhdi_sd.h b/include/xhdi_sd.h deleted file mode 100644 index e855ea6..0000000 --- a/include/xhdi_sd.h +++ /dev/null @@ -1,138 +0,0 @@ -/* - * xhdi_sd.h - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 01.05.2013 - * Copyright 2012 M. Fröschle - */ - -#ifndef _XHDI_SD_H_ -#define _XHDI_SD_H_ - -/* XHDI function numbers */ - -#define XHDI_VERSION 0 -#define XHDI_INQUIRE_TARGET 1 -#define XHDI_RESERVE 2 -#define XHDI_LOCK 3 -#define XHDI_STOP 4 -#define XHDI_EJECT 5 -#define XHDI_DRIVEMAP 6 -#define XHDI_INQUIRE_DEVICE 7 -#define XHDI_INQUIRE_DRIVER 8 -#define XHDI_NEW_COOKIE 9 -#define XHDI_READ_WRITE 10 -#define XHDI_INQUIRE_TARGET2 11 -#define XHDI_INQUIRE_DEVICE2 12 -#define XHDI_DRIVER_SPECIAL 13 -#define XHDI_GET_CAPACITY 14 -#define XHDI_MEDIUM_CHANGED 15 -#define XHDI_MINT_INFO 16 -#define XHDI_DOS_LIMITS 17 -#define XHDI_LAST_ACCESS 18 -#define XHDI_REACCESS 19 - -/* XHDI error codes */ - -#define E_OK 0 /* OK */ -#define ERROR -1 /* unspecified error */ -#define EDRVNR -2 /* drive not ready */ -#define EUNDEV -15 /* invalid device/target number */ -#define EINVFN -32 /* invalid function number */ -#define EACCDN -36 /* access denied (device currently reserved) */ -#define EDRIVE -46 /* BIOS device not served by driver */ - -/* XHDI device capabilities */ - -#define XH_TARGET_STOPPABLE (1 << 0) -#define XH_TARGET_REMOVABLE (1 << 1) -#define XH_TARGET_LOCKABLE (1 << 2) -#define XH_TARGET_EJECTABLE (1 << 3) -#define XH_TARGET_LOCKED (1 << 29) -#define XH_TARGET_STOPPED (1 << 30) -#define XH_TARGET_RESERVED (1 << 31) - -typedef struct _BPB -{ - uint16_t recsiz; /* Bytes per sector */ - uint16_t clsiz; /* Sectors per cluster */ - uint16_t clsizb; /* Bytes per cluster */ - uint16_t rdlen; /* Directory length */ - uint16_t fsiz; /* Length of the FAT */ - uint16_t fatrec; /* Start of the 2nd FAT */ - uint16_t datrec; /* 1st free sector */ - uint16_t numcl; /* Total numbr of clusters */ - uint16_t bflags; /* Flags as bit-vector */ - /* Bit 0: 0 (12-Bit-FAT), 1 16-Bit-FAT */ - /* Bit 1: 0 (two FATs), 1 (one FAT) */ - /* only available since TOS 2.06 */ -} BPB; - -/* a riddle: how do you typedef a function pointer to a function that returns its own type? ;) */ -typedef void* (*xhdi_call_fun)(int xhdi_fun, ...); - -extern uint32_t xhdi_call(uint16_t *stack); - -extern xhdi_call_fun xhdi_sd_install(xhdi_call_fun old_vector) __attribute__((__interrupt__)); - -extern uint16_t xhdi_version(void); /* XHDI 0 */ - -extern uint32_t xhdi_inquire_target(uint16_t major, uint16_t minor, uint32_t *block_size, uint32_t *flags, - char *product_name); /* XHDI 1 */ - -extern uint32_t xhdi_reserve(uint16_t major, uint16_t minor, uint16_t do_reserve, uint16_t key); /* XHDI 2 */ - -extern uint32_t xhdi_lock(uint16_t major, uint16_t minor, uint16_t do_lock, uint16_t key); /* XHDI 3 */ - -extern uint32_t xhdi_stop(uint16_t major, uint16_t minor, uint16_t do_stop, uint16_t key); /* XHDI 4 */ - -extern uint32_t xhdi_eject(uint16_t major, uint16_t minor, uint16_t do_eject, uint16_t key); /* XHDI 5 */ - -extern uint32_t xhdi_drivemap(void); /* XHDI 6 */ - -extern uint32_t xhdi_inquire_device(uint16_t bios_device, uint16_t *major, uint16_t *minor, - uint32_t *start_sector, /* BPB */ void *bpb); /* XHDI 7 */ - -extern uint32_t xhdi_inquire_driver(uint16_t bios_device, char *name, char *version, - char *company, uint16_t *ahdi_version, uint16_t *maxIPL); /* XHDI 8 */ - -extern uint32_t xhdi_new_cookie(uint32_t newcookie); /* XHDI 9 */ - -extern uint32_t xhdi_read_write(uint16_t major, uint16_t minor, uint16_t rwflag, - uint32_t recno, uint16_t count, void *buf); /* XHDI 10 */ - -extern uint32_t xhdi_inquire_target2(uint16_t major, uint16_t minor, uint32_t *block_size, - uint32_t *device_flags, char *product_name, uint16_t stringlen); /* XHDI 11 */ - -extern uint32_t xhdi_inquire_device2(uint16_t bios_device, uint16_t *major, uint16_t *minor, - uint32_t *start_sector, BPB *bpb, uint32_t *blocks, char *partid); /* XHDI 12 */ - -extern uint32_t xhdi_driver_special(uint32_t key1, uint32_t key2, uint16_t subopcode, void *data); /* XHDI 13 */ - -extern uint32_t xhdi_get_capacity(uint16_t major, uint16_t minor, uint32_t *blocks, uint32_t *bs); /* XHDI 14 */ - -extern uint32_t xhdi_medium_changed(uint16_t major, uint16_t minor); /* XHDI 15 */ - -extern uint32_t xhdi_mint_info(uint16_t opcode, void *data); /* XHDI 16 */ - -extern uint32_t xhdi_dos_limits(uint16_t which, uint32_t limit); /* XHDI 17 */ - -extern uint32_t xhdi_last_access(uint16_t major, uint16_t minor, uint32_t *ms); /* XHDI 18 */ - -extern uint32_t xhdi_reaccess(uint16_t major, uint16_t minor); /* XHDI 19 */ - -#endif /* _XHDI_SD_H_ */ diff --git a/kbd/ikbd.c b/kbd/ikbd.c deleted file mode 100644 index e49146f..0000000 --- a/kbd/ikbd.c +++ /dev/null @@ -1,339 +0,0 @@ -/* - - https://www.kernel.org/doc/Documentation/input/atarikbd.txt - - ikbd ToDo: - - Feature Example using/needing it impl. tested - --------------------------------------------------------------------- - mouse y at bottom Bolo X X - mouse button key events Goldrunner/A_008 X X - joystick interrogation mode Xevious/A_004 X X - Absolute mouse mode Backlash/A_008, A-Ball/A50 - disable mouse ? X - disable joystick ? X - Joysticks also generate Goldrunner X X - mouse button events! - Pause (cmd 0x13) Wings of Death/A_427 - - */ - -#include -#include "bas_printf.h" -#include "bas_string.h" - -#include "user_io.h" -//#include "hardware.h" -#include "ikbd.h" - -// atari ikbd stuff -#define IKBD_STATE_JOYSTICK_EVENT_REPORTING 0x01 -#define IKBD_STATE_MOUSE_Y_BOTTOM 0x02 -#define IKBD_STATE_MOUSE_BUTTON_AS_KEY 0x04 // mouse buttons act like keys -#define IKBD_STATE_MOUSE_DISABLED 0x08 -#define IKBD_STATE_MOUSE_ABSOLUTE 0x10 - -#define IKBD_DEFAULT IKBD_STATE_JOYSTICK_EVENT_REPORTING - -#define QUEUE_LEN 16 // power of 2! -static unsigned char tx_queue[QUEUE_LEN]; -static unsigned char wptr = 0, rptr = 0; - -// structure to keep track of ikbd state -static struct -{ - unsigned char cmd; - unsigned char state; - unsigned char expect; - - // joystick state - unsigned char joystick[2]; - - // mouse state - unsigned short mouse_pos_x, mouse_pos_y; - unsigned char mouse_buttons; -} ikbd; - -// #define IKBD_DEBUG - -void ikbd_init() -{ - // reset ikbd state - memset(&ikbd, 0, sizeof(ikbd)); - ikbd.state = IKBD_DEFAULT; -} - -static void enqueue(unsigned char b) -{ - if (((wptr + 1)&(QUEUE_LEN-1)) == rptr) - { - xprintf("IKBD: !!!!!!! tx queue overflow !!!!!!!!!\n"); - return; - } - - tx_queue[wptr] = b; - wptr = (wptr + 1) & (QUEUE_LEN - 1); -} - -// convert internal joystick format into atari ikbd format -static unsigned char joystick_map2ikbd(unsigned in) -{ - unsigned char out = 0; - - if (in & JOY_UP) out |= 0x01; - if (in & JOY_DOWN) out |= 0x02; - if (in & JOY_LEFT) out |= 0x04; - if (in & JOY_RIGHT) out |= 0x08; - if (in & JOY_BTN1) out |= 0x80; - - return out; -} - -// process inout from atari core into ikbd -void ikbd_handle_input(unsigned char cmd) -{ - // expecting a second byte for command - if (ikbd.expect) - { - ikbd.expect--; - - // last byte of command received - if (!ikbd.expect) - { - switch(ikbd.cmd) - { - case 0x07: // set mouse button action - xprintf("IKBD: mouse button action = %x\n", cmd); - - // bit 2: Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75) - if(cmd & 0x04) ikbd.state |= IKBD_STATE_MOUSE_BUTTON_AS_KEY; - else ikbd.state &= ~IKBD_STATE_MOUSE_BUTTON_AS_KEY; - - break; - - case 0x80: // ibkd reset - // reply "everything is ok" - enqueue(0xf0); - break; - - default: - break; - } - } - - return; - } - - ikbd.cmd = cmd; - - switch(cmd) - { - case 0x07: - xprintf("IKBD: Set mouse button action"); - ikbd.expect = 1; - break; - - case 0x08: - xprintf("IKBD: Set relative mouse positioning"); - ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED; - ikbd.state &= ~IKBD_STATE_MOUSE_ABSOLUTE; - break; - - case 0x09: - xprintf("IKBD: Set absolute mouse positioning"); - ikbd.state &= ~IKBD_STATE_MOUSE_DISABLED; - ikbd.state |= IKBD_STATE_MOUSE_ABSOLUTE; - ikbd.expect = 4; - break; - - case 0x0b: - xprintf("IKBD: Set Mouse threshold"); - ikbd.expect = 2; - break; - - case 0x0f: - xprintf("IKBD: Set Y at bottom"); - ikbd.state |= IKBD_STATE_MOUSE_Y_BOTTOM; - break; - - case 0x10: - xprintf("IKBD: Set Y at top"); - ikbd.state &= ~IKBD_STATE_MOUSE_Y_BOTTOM; - break; - - case 0x12: - xprintf("IKBD: Disable mouse"); - ikbd.state |= IKBD_STATE_MOUSE_DISABLED; - break; - - case 0x14: - xprintf("IKBD: Set Joystick event reporting"); - ikbd.state |= IKBD_STATE_JOYSTICK_EVENT_REPORTING; - break; - - case 0x15: - xprintf("IKBD: Set Joystick interrogation mode"); - ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING; - break; - - case 0x16: // interrogate joystick - // send reply - enqueue(0xfd); - enqueue(joystick_map2ikbd(ikbd.joystick[0])); - enqueue(joystick_map2ikbd(ikbd.joystick[1])); - break; - - case 0x1a: - xprintf("IKBD: Disable joysticks"); - ikbd.state &= ~IKBD_STATE_JOYSTICK_EVENT_REPORTING; - break; - - case 0x1c: - xprintf("IKBD: Interrogate time of day"); - - enqueue(0xfc); - enqueue(0x13); // year bcd - enqueue(0x03); // month bcd - enqueue(0x07); // day bcd - enqueue(0x20); // hour bcd - enqueue(0x58); // minute bcd - enqueue(0x00); // second bcd - break; - - - case 0x80: - xprintf("IKBD: Reset"); - ikbd.expect = 1; - ikbd.state = IKBD_DEFAULT; - break; - - default: - xprintf("IKBD: unknown command: %x\n", cmd); - break; - } -} - -void ikbd_poll(void) { - static int mtimer = 0; - if (CheckTimer(mtimer)) - { - mtimer = GetTimer(10); - - // check for incoming ikbd data - EnableIO(); - SPI(UIO_IKBD_IN); - - while(SPI(0)) - ikbd_handle_input(SPI(0)); - - DisableIO(); - } - - // send data from queue if present - if(rptr == wptr) return; - - // transmit data from queue - EnableIO(); - SPI(UIO_IKBD_OUT); - SPI(tx_queue[rptr]); - DisableIO(); - - rptr = (rptr + 1) & (QUEUE_LEN - 1); -} - -void ikbd_joystick(unsigned char joystick, unsigned char map) -{ - // todo: suppress events for joystick 0 as long as mouse - // is enabled? - - if (ikbd.state & IKBD_STATE_JOYSTICK_EVENT_REPORTING) - { -#ifdef IKBD_DEBUG - xprintf("IKBD: joy %d %x\n", joystick, map); -#endif - - // only report joystick data for joystick 0 if the mouse is disabled - if ((ikbd.state & IKBD_STATE_MOUSE_DISABLED) || (joystick == 1)) - { - enqueue(0xfe + joystick); - enqueue(joystick_map2ikbd(map)); - } - - if (!(ikbd.state & IKBD_STATE_MOUSE_DISABLED)) - { - // the fire button also generates a mouse event if - // mouse reporting is enabled - if ((map & JOY_BTN1) != (ikbd.joystick[joystick] & JOY_BTN1)) - { - // generate mouse event (ikbd_joystick_buttons is evaluated inside - // user_io_mouse) - ikbd.joystick[joystick] = map; - ikbd_mouse(0, 0, 0); - } - } - } -#ifdef IKBD_DEBUG - else - xprintf("IKBD: no monitor, drop joy %d %x\n", joystick, map); -#endif - - // save state of joystick for interrogation mode - ikbd.joystick[joystick] = map; -} - -void ikbd_keyboard(unsigned char code) -{ -#ifdef IKBD_DEBUG - xprintf("IKBD: send keycode %x%s\n", code&0x7f, (code&0x80)?" BREAK":""); -#endif - enqueue(code); -} - -void ikbd_mouse(uint8_t b, int8_t x, int8_t y) -{ - if (ikbd.state & IKBD_STATE_MOUSE_DISABLED) - return; - - // joystick and mouse buttons are wired together in - // atari st - b |= (ikbd.joystick[0] & JOY_BTN1)?1:0; - b |= (ikbd.joystick[1] & JOY_BTN1)?2:0; - - static unsigned char b_old = 0; - // monitor state of two mouse buttons - if (b != b_old) - { - // check if mouse buttons are supposed to be treated like keys - if (ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY) - { - // Mouse buttons act like keys (LEFT=0x74 & RIGHT=0x75) - - // handle left mouse button - if((b ^ b_old) & 1) ikbd_keyboard(0x74 | ((b&1)?0x00:0x80)); - // handle right mouse button - if((b ^ b_old) & 2) ikbd_keyboard(0x75 | ((b&2)?0x00:0x80)); - } - b_old = b; - } - -#if 0 - if(ikbd.state & IKBD_STATE_MOUSE_BUTTON_AS_KEY) - { - b = 0; - // if mouse position is 0/0 quit here - if(!x && !y) return; - } -#endif - - if (ikbd.state & IKBD_STATE_MOUSE_ABSOLUTE) - { - } - else - { - // atari has mouse button bits swapped - enqueue(0xf8|((b&1)?2:0)|((b&2)?1:0)); - enqueue(x); - enqueue((ikbd.state & IKBD_STATE_MOUSE_Y_BOTTOM)?-y:y); - } -} - diff --git a/mcf5474.gdb b/mcf5474.gdb deleted file mode 100644 index 976da57..0000000 --- a/mcf5474.gdb +++ /dev/null @@ -1,71 +0,0 @@ -# -# GDB Init script for the Coldfire 5474 processor (firebee). -# - -define addresses -set $vbr = 0x00000000 -#monitor bdm-ctl-set 0x0801 0x00000000 - -set $mbar = 0xFF000000 -#monitor bdm-ctl-set 0x0C0F 0xFF000000 - -set $rambar0 = 0xFF100000 -#monitor bdm-ctl-set 0x0C04 0xFF100007 - -set $rambar1 = 0xFF101000 -#monitor bdm-ctl-set 0x0C05 0xFF101001 -end - -# -# Setup the DRAM controller. -# - -define setup-dram -# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) -set *((long *) 0xFF000500) = 0xE0000000 -set *((long *) 0xFF000508) = 0x00041180 -set *((long *) 0xFF000504) = 0x007F0001 - -# set *((long *) 0xFF00050C) = 0xFFF00000 # ATARI I/O address - -# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes -set *((long *) 0xFF000004) = 0x000002AA -set *((long *) 0xFF000020) = 0x0000001A -set *((long *) 0xFF000024) = 0x0800001A -set *((long *) 0xFF000028) = 0x1000001A -set *((long *) 0xFF00002C) = 0x1800001A -set *((long *) 0xFF000108) = 0x73622830 -set *((long *) 0xFF00010C) = 0x46770000 - - -set *((long *) 0xFF000104) = 0xE10D0002 -set *((long *) 0xFF000100) = 0x40010000 -set *((long *) 0xFF000100) = 0x048D0000 -set *((long *) 0xFF000104) = 0xE10D0002 -set *((long *) 0xFF000104) = 0xE10D0004 -set *((long *) 0xFF000104) = 0xE10D0004 -set *((long *) 0xFF000100) = 0x008D0000 -set *((long *) 0xFF000104) = 0x710D0F00 -end - -define cu -!killall m68k-bdm-gdbserver -end - -# -# Wake up the board -# - -define ib - addresses - setup-dram -end - -define run - continue -end - -tr -ib -add-symbol-file ../emutos/emutos2.img 0xe00000 -load firebee/ram.elf diff --git a/net/am79c874.c b/net/am79c874.c deleted file mode 100644 index 946c71f..0000000 --- a/net/am79c874.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * File: am79c874.c - * Purpose: Driver for the AMD AM79C874 10/100 Ethernet PHY - */ - -#include "net.h" -#include "fec.h" -#include "am79c874.h" - -#include "bas_printf.h" - -#if defined(MACHINE_FIREBEE) -#include "firebee.h" -#elif defined(MACHINE_M5484LITE) -#include "m5484l.h" -#elif defined(MACHINE_M54455) -#include "m54455.h" -#else -#error "unknown machine!" -#endif - -//#define DBG_AM79 -#ifdef DBG_AM79 -#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_AM79 */ - - -/* Initialize the AM79C874 PHY - * - * This function sets up the Auto-Negotiate Advertisement register - * within the PHY and then forces the PHY to auto-negotiate for - * it's settings. - * - * Params: - * fec_ch FEC channel - * phy_addr Address of the PHY. - * speed Desired speed (10BaseT or 100BaseTX) - * duplex Desired duplex (Full or Half) - * - * Return Value: - * 0 if MII commands fail - * 1 otherwise - */ -int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex) -{ - int timeout; - uint16_t settings; - if (speed); /* to do */ - if (duplex); /* to do */ - - /* Initialize the MII interface */ - fec_mii_init(fec_ch, SYSCLK / 1000); - dbg("%s: PHY reset\r\n", __FUNCTION__); - - /* Reset the PHY */ - if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_RESET)) - return 0; - - /* Wait for the PHY to reset */ - for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++) - { - fec_mii_read(fec_ch, phy_addr, MII_AM79C874_CR, &settings); - if (!(settings & MII_AM79C874_CR_RESET)) - break; - } - - if (timeout >= FEC_MII_TIMEOUT) - { - dbg("%s: PHY reset failed\r\n", __FUNCTION__); - return 0; - }; - dbg("%s: PHY reset OK\r\n", __FUNCTION__); - dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__); - - /* Enable Auto-Negotiation */ - if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_AUTON | MII_AM79C874_CR_RST_NEG)) - return 0; - - dbg("%s:PHY Wait for auto-negotiation to complete\r\n", __FUNCTION__); - - /* Wait for auto-negotiation to complete */ - for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++) - { - settings = 0; - fec_mii_read(fec_ch, phy_addr, MII_AM79C874_SR, &settings); - if ((settings & AUTONEGLINK) == AUTONEGLINK) - break; - } - - if (timeout >= FEC_MII_TIMEOUT) - { - dbg("%s: Auto-negotiation failed (timeout). Set default mode (100Mbps, full duplex)\r\n", __FUNCTION__); - - /* Set the default mode (Full duplex, 100 Mbps) */ - if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_100MB | MII_AM79C874_CR_DPLX)) - { - dbg("%s: forced setting 100Mbps/full failed.\r\n", __FUNCTION__); - return 0; - } - } - -#ifdef DBG_AM79 - settings = 0; - - fec_mii_read(fec_ch, phy_addr, MII_AM79C874_DR, &settings); - - dbg("%s: PHY Mode:\r\n", __FUNCTION__); - if (settings & MII_AM79C874_DR_DATA_RATE) - dbg("%s: 100Mbps", __FUNCTION__); - else - dbg("%s: 10Mbps ", __FUNCTION__); - - if (settings & MII_AM79C874_DR_DPLX) - dbg("%s: Full-duplex\r\n", __FUNCTION__); - else - dbg("%s: Half-duplex\r\n", __FUNCTION__); - - dbg("%s:PHY auto-negotiation complete\r\n", __FUNCTION__); -#endif /* DBG_AM79 */ - - return 1; -} diff --git a/net/arp.c b/net/arp.c deleted file mode 100644 index 87c48c3..0000000 --- a/net/arp.c +++ /dev/null @@ -1,490 +0,0 @@ -/* - * File: arp.c - * Purpose: Address Resolution Protocol routines. - * - * Notes: - */ - -#include "net.h" -#include "net_timer.h" -#include "bas_printf.h" -#include -#include - -//#define DBG_ARP -#ifdef DBG_ARP -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_ARP */ - -#define TIMER_NETWORK 3 - -static uint8_t *arp_find_pair(ARP_INFO *arptab, uint16_t protocol, uint8_t *hwa, uint8_t *pa) -{ - /* - * This function searches through the ARP table for the - * specified or address pair. - * If it is found, then a a pointer to the non-specified - * address is returned. Otherwise NULL is returned. - * If you pass in then you get out. - * If you pass in then you get out. - */ - int slot, i, match = false; - uint8_t *rvalue; - - if (((hwa == 0) && (pa == 0)) || (arptab == 0)) - return NULL; - - rvalue = NULL; - - /* - * Check each protocol address for a match - */ - for (slot = 0; slot < arptab->tab_size; slot++) - { - if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) && - (arptab->table[slot].protocol == protocol)) - { - match = true; - if (hwa != 0) - { - /* - * Check the Hardware Address field - */ - rvalue = &arptab->table[slot].pa[0]; - for (i = 0; i < arptab->table[slot].hwa_size; i++) - { - if (arptab->table[slot].hwa[i] != hwa[i]) - { - match = false; - break; - } - } - } - else - { - /* - * Check the Protocol Address field - */ - rvalue = &arptab->table[slot].hwa[0]; - for (i = 0; i < arptab->table[slot].pa_size; i++) - { - if (arptab->table[slot].pa[i] != pa[i]) - { - match = false; - break; - } - } - } - if (match) - { - break; - } - } - } - - if (match) - return rvalue; - else - return NULL; -} - -void arp_merge(ARP_INFO *arptab, uint16_t protocol, int hwa_size, uint8_t *hwa, - int pa_size, uint8_t *pa, int longevity) -{ - /* - * This function merges an entry into the ARP table. If - * either piece is NULL, the function exits, otherwise - * the entry is merged or added, provided there is space. - */ - int i, slot; - uint8_t *ta; - - if ((hwa == NULL) || (pa == NULL) || (arptab == NULL) || - ((longevity != ARP_ENTRY_TEMP) && - (longevity != ARP_ENTRY_PERM))) - { - return; - } - - /* First search ARP table for existing entry */ - if ((ta = arp_find_pair(arptab,protocol,NULL,pa)) != 0) - { - /* Update hardware address */ - for (i = 0; i < hwa_size; i++) - ta[i] = hwa[i]; - return; - } - - /* Next try to find an empty slot */ - slot = -1; - for (i = 0; i < MAX_ARP_ENTRY; i++) - { - if (arptab->table[i].longevity == ARP_ENTRY_EMPTY) - { - slot = i; - break; - } - } - - /* if no empty slot was found, pick a temp slot */ - if (slot == -1) - { - for (i = 0; i < MAX_ARP_ENTRY; i++) - { - if (arptab->table[i].longevity == ARP_ENTRY_TEMP) - { - slot = i; - break; - } - } - } - - /* if after all this, still no slot found, add in last slot */ - if (slot == -1) - slot = (MAX_ARP_ENTRY - 1); - - /* add the entry into the slot */ - arptab->table[slot].protocol = protocol; - - arptab->table[slot].hwa_size = (uint8_t) hwa_size; - for (i = 0; i < hwa_size; i++) - arptab->table[slot].hwa[i] = hwa[i]; - - arptab->table[slot].pa_size = (uint8_t) pa_size; - for (i = 0; i < pa_size; i++) - arptab->table[slot].pa[i] = pa[i]; - - arptab->table[slot].longevity = longevity; -} - - -void arp_remove(ARP_INFO *arptab, uint16_t protocol, uint8_t *hwa, uint8_t *pa) -{ - /* - * This function removes an entry from the ARP table. The - * ARP table is searched according to the non-NULL address - * that is provided. - */ - int slot, i, match; - - if (((hwa == 0) && (pa == 0)) || (arptab == 0)) - return; - - /* check each hardware adress for a match */ - for (slot = 0; slot < arptab->tab_size; slot++) - { - if ((arptab->table[slot].longevity != ARP_ENTRY_EMPTY) && - (arptab->table[slot].protocol == protocol)) - { - match = true; - if (hwa != 0) - { - /* Check Hardware Address field */ - for (i = 0; i < arptab->table[slot].hwa_size; i++) - { - if (arptab->table[slot].hwa[i] != hwa[i]) - { - match = false; - break; - } - } - } - else - { - /* Check Protocol Address field */ - for (i = 0; i < arptab->table[slot].pa_size; i++) - { - if (arptab->table[slot].pa[i] != pa[i]) - { - match = false; - break; - } - } - } - if (match) - { - for (i = 0; i < arptab->table[slot].hwa_size; i++) - arptab->table[slot].hwa[i] = 0; - for (i = 0; i < arptab->table[slot].pa_size; i++) - arptab->table[slot].pa[i] = 0; - arptab->table[slot].longevity = ARP_ENTRY_EMPTY; - break; - } - } - } -} - -void arp_request(NIF *nif, uint8_t *pa) -{ - /* - * This function broadcasts an ARP request for the protocol - * address "pa" - */ - uint8_t *addr; - NBUF *pNbuf; - arp_frame_hdr *arpframe; - int i, result; - - pNbuf = nbuf_alloc(); - if (pNbuf == NULL) - { - dbg("could not allocate Tx buffer\n"); - return; - } - - arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET]; - - /* Build the ARP request packet */ - arpframe->ar_hrd = ETHERNET; - arpframe->ar_pro = ETH_FRM_IP; - arpframe->ar_hln = 6; - arpframe->ar_pln = 4; - arpframe->opcode = ARP_REQUEST; - - addr = &nif->hwa[0]; - for (i = 0; i < 6; i++) - arpframe->ar_sha[i] = addr[i]; - - addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP)); - for (i = 0; i < 4; i++) - arpframe->ar_spa[i] = addr[i]; - - for (i = 0; i < 6; i++) - arpframe->ar_tha[i] = 0x00; - - for (i = 0; i < 4; i++) - arpframe->ar_tpa[i] = pa[i]; - - pNbuf->length = ARP_HDR_LEN; - - /* Send the ARP request */ - dbg("sending ARP request\r\n"); - result = nif->send(nif, nif->broadcast, nif->hwa, ETH_FRM_ARP, pNbuf); - - if (result == 0) - nbuf_free(pNbuf); -} - -static int arp_resolve_pa(NIF *nif, uint16_t protocol, uint8_t *pa, uint8_t **ha) -{ - /* - * This function accepts a pointer to a protocol address and - * searches the ARP table for a hardware address match. If no - * no match found, false is returned. - */ - ARP_INFO *arptab; - - if ((pa == NULL) || (nif == NULL) || (protocol == 0)) - return 0; - - arptab = nif_get_protocol_info (nif,ETH_FRM_ARP); - *ha = arp_find_pair(arptab,protocol,0,pa); - - if (*ha == NULL) - return 0; - else - return 1; -} - -uint8_t *arp_resolve(NIF *nif, uint16_t protocol, uint8_t *pa) -{ - int i; - uint8_t *hwa; - - /* - * Check to see if the necessary MAC-to-IP translation information - * is in table already - */ - if (arp_resolve_pa(nif, protocol, pa, &hwa)) - return hwa; - - /* - * Ok, it's not, so we need to try to obtain it by broadcasting - * an ARP request. Hopefully the desired host is listening and - * will respond with it's MAC address - */ - for (i = 0; i < 3; i++) - { - arp_request(nif, pa); - - timer_set_secs(TIMER_NETWORK, ARP_TIMEOUT); - while (timer_get_reference(TIMER_NETWORK)) - { - dbg("try to resolve %d.%d.%d.%d\r\n", - pa[0], pa[1], pa[2], pa[3], pa[4]); - if (arp_resolve_pa(nif, protocol, pa, &hwa)) - { - dbg("resolved to %02x:%02x:%02x:%02x:%02x:%02x.\r\n", - hwa[0], hwa[1], hwa[2], hwa[3], hwa[4], hwa[5], hwa[6]); - - return hwa; - } - } - } - - return NULL; -} - -void arp_init(ARP_INFO *arptab) -{ - int slot, i; - - arptab->tab_size = MAX_ARP_ENTRY; - for (slot = 0; slot < arptab->tab_size; slot++) - { - for (i = 0; i < MAX_HWA_SIZE; i++) - arptab->table[slot].hwa[i] = 0; - for (i = 0; i < MAX_PA_SIZE; i++) - arptab->table[slot].pa[i] = 0; - arptab->table[slot].longevity = ARP_ENTRY_EMPTY; - arptab->table[slot].hwa_size = 0; - arptab->table[slot].pa_size = 0; - } -} - -void arp_handler(NIF *nif, NBUF *pNbuf) -{ - /* - * ARP protocol handler - */ - uint8_t *addr; - ARP_INFO *arptab; - int longevity; - arp_frame_hdr *rx_arpframe, *tx_arpframe; - - arptab = nif_get_protocol_info(nif, ETH_FRM_ARP); - rx_arpframe = (arp_frame_hdr *) &pNbuf->data[pNbuf->offset]; - - /* - * Check for an appropriate ARP packet - */ - if ((pNbuf->length < ARP_HDR_LEN) || - (rx_arpframe->ar_hrd != ETHERNET) || - (rx_arpframe->ar_hln != 6) || - (rx_arpframe->ar_pro != ETH_FRM_IP) || - (rx_arpframe->ar_pln != 4)) - { - dbg("received packet is not an ARP packet, discard it\r\n"); - nbuf_free(pNbuf); - return; - } - - /* - * Check to see if it was addressed to me - if it was, keep this - * ARP entry in the table permanently; if not, mark it so that it - * can be displaced later if necessary - */ - addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP)); - if ((rx_arpframe->ar_tpa[0] == addr[0]) && - (rx_arpframe->ar_tpa[1] == addr[1]) && - (rx_arpframe->ar_tpa[2] == addr[2]) && - (rx_arpframe->ar_tpa[3] == addr[3]) ) - { - dbg("received ARP packet is a permanent one, store it\r\n"); - longevity = ARP_ENTRY_PERM; - } - else - { - dbg("received ARP packet was not addressed to us, keep only temporarily\r\n"); - longevity = ARP_ENTRY_TEMP; - } - - /* - * Add ARP info into the table - */ - arp_merge(arptab, - rx_arpframe->ar_pro, - rx_arpframe->ar_hln, - &rx_arpframe->ar_sha[0], - rx_arpframe->ar_pln, - &rx_arpframe->ar_spa[0], - longevity - ); - - switch (rx_arpframe->opcode) - { - case ARP_REQUEST: - /* - * Check to see if request is directed to me - */ - if ((rx_arpframe->ar_tpa[0] == addr[0]) && - (rx_arpframe->ar_tpa[1] == addr[1]) && - (rx_arpframe->ar_tpa[2] == addr[2]) && - (rx_arpframe->ar_tpa[3] == addr[3]) ) - { - dbg("received arp request directed to us, replying\r\n"); - /* - * Reuse the current network buffer to assemble an ARP reply - */ - tx_arpframe = (arp_frame_hdr *)&pNbuf->data[ARP_HDR_OFFSET]; - - /* - * Build new ARP frame from the received data - */ - tx_arpframe->ar_hrd = ETHERNET; - tx_arpframe->ar_pro = ETH_FRM_IP; - tx_arpframe->ar_hln = 6; - tx_arpframe->ar_pln = 4; - tx_arpframe->opcode = ARP_REPLY; - tx_arpframe->ar_tha[0] = rx_arpframe->ar_sha[0]; - tx_arpframe->ar_tha[1] = rx_arpframe->ar_sha[1]; - tx_arpframe->ar_tha[2] = rx_arpframe->ar_sha[2]; - tx_arpframe->ar_tha[3] = rx_arpframe->ar_sha[3]; - tx_arpframe->ar_tha[4] = rx_arpframe->ar_sha[4]; - tx_arpframe->ar_tha[5] = rx_arpframe->ar_sha[5]; - tx_arpframe->ar_tpa[0] = rx_arpframe->ar_spa[0]; - tx_arpframe->ar_tpa[1] = rx_arpframe->ar_spa[1]; - tx_arpframe->ar_tpa[2] = rx_arpframe->ar_spa[2]; - tx_arpframe->ar_tpa[3] = rx_arpframe->ar_spa[3]; - - /* - * Now copy in the new information - */ - addr = &nif->hwa[0]; - tx_arpframe->ar_sha[0] = addr[0]; - tx_arpframe->ar_sha[1] = addr[1]; - tx_arpframe->ar_sha[2] = addr[2]; - tx_arpframe->ar_sha[3] = addr[3]; - tx_arpframe->ar_sha[4] = addr[4]; - tx_arpframe->ar_sha[5] = addr[5]; - - addr = ip_get_myip(nif_get_protocol_info(nif,ETH_FRM_IP)); - tx_arpframe->ar_spa[0] = addr[0]; - tx_arpframe->ar_spa[1] = addr[1]; - tx_arpframe->ar_spa[2] = addr[2]; - tx_arpframe->ar_spa[3] = addr[3]; - - /* - * Save the length of my packet in the buffer structure - */ - pNbuf->length = ARP_HDR_LEN; - - nif->send(nif, - &tx_arpframe->ar_tha[0], - &tx_arpframe->ar_sha[0], - ETH_FRM_ARP, - pNbuf); - } - else - { - dbg("ARP request not addressed to us, discarding\r\n"); - nbuf_free(pNbuf); - } - break; - - case ARP_REPLY: - /* - * The ARP Reply case is already taken care of - */ - - /* missing break is intentional */ - - default: - nbuf_free(pNbuf); - break; - } - - return; -} diff --git a/net/bcm5222.c b/net/bcm5222.c deleted file mode 100644 index 6f4e77d..0000000 --- a/net/bcm5222.c +++ /dev/null @@ -1,182 +0,0 @@ -/* - * File: bcm5222.c - * Purpose: Driver for the Micrel BCM5222 10/100 Ethernet PHY - * - * Notes: This driver was written specifically for the M5475EVB - * and M5485EVB. These boards use the MII signals from - * FEC0 to control the PHY. Therefore the fec_ch parameter - * is ignored when doing MII reads and writes. - */ - -#include "net.h" -#include "fec.h" -#include "bcm5222.h" - -#include "bas_printf.h" - -#if defined(MACHINE_FIREBEE) -#include "firebee.h" -#elif defined(MACHINE_M5484LITE) -#include "m5484l.h" -#elif defined(MACHINE_M54455) -#include "m54455.h" -#else -#error "Unknown machine!" -#endif - -#define DBG_BCM -#ifdef DBG_BCM -#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_BCM */ - -/* - * Initialize the BCM5222 PHY - * - * This function sets up the Auto-Negotiate Advertisement register - * within the PHY and then forces the PHY to auto-negotiate for - * it's settings. - * - * Params: - * fec_ch FEC channel - * phy_addr Address of the PHY. - * speed Desired speed (10BaseT or 100BaseTX) - * duplex Desired duplex (Full or Half) - * - * Return Value: - * 0 if MII commands fail - * 1 otherwise - */ -int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex) -{ - int timeout; - uint16_t settings; - - /* Initialize the MII interface */ - fec_mii_init(fec_ch, SYSCLK / 1000); - dbg("PHY reset\r\n"); - - /* Reset the PHY */ - if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, BCM5222_CTRL_RESET | BCM5222_CTRL_ANE)) - return 0; - - /* Wait for the PHY to reset */ - for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++) - { - fec_mii_read(fec_ch, phy_addr, BCM5222_CTRL, &settings); - if (!(settings & BCM5222_CTRL_RESET)) - break; - } - if(timeout >= FEC_MII_TIMEOUT) - return 0; - - dbg("PHY reset OK\r\n"); - - settings = (BCM5222_AN_ADV_NEXT_PAGE | BCM5222_AN_ADV_PAUSE); - - if (speed == FEC_MII_10BASE_T) - settings |= (uint16_t)((duplex == FEC_MII_FULL_DUPLEX) - ? (BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT) - : BCM5222_AN_ADV_10BT); - else /* (speed == FEC_MII_100BASE_TX) */ - settings = (uint16_t)((duplex == FEC_MII_FULL_DUPLEX) - ? (BCM5222_AN_ADV_100BTX_FDX | BCM5222_AN_ADV_100BTX - | BCM5222_AN_ADV_10BT_FDX | BCM5222_AN_ADV_10BT) - : (BCM5222_AN_ADV_100BTX | BCM5222_AN_ADV_10BT)); - - /* Set the Auto-Negotiation Advertisement Register */ - if (!fec_mii_write(fec_ch, phy_addr, BCM5222_AN_ADV, settings)) - return 0; - - dbg("PHY Enable Auto-Negotiation\r\n"); - - /* Enable Auto-Negotiation */ - if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, (BCM5222_CTRL_ANE | BCM5222_CTRL_RESTART_AN))) - return 0; - - dbg("PHY Wait for auto-negotiation to complete\r\n"); - - /* Wait for auto-negotiation to complete */ - for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++) - { - if (!fec_mii_read(fec_ch, phy_addr, BCM5222_STAT, &settings)) - return 0; - if (settings & BCM5222_STAT_AN_COMPLETE) - break; - } - - if (timeout < FEC_MII_TIMEOUT) - { - dbg("PHY auto-negociation complete\r\n"); - - /* Read Auxiliary Control/Status Register */ - if (!fec_mii_read(fec_ch, phy_addr, BCM5222_ACSR, &settings)) - return 0; - } - else - { - dbg("auto negotiation failed, PHY Set the default mode\r\n"); - - /* Set the default mode (Full duplex, 100 Mbps) */ - if (!fec_mii_write(fec_ch, phy_addr, BCM5222_ACSR, settings = (BCM5222_ACSR_100BTX | BCM5222_ACSR_FDX))) - return 0; - } - - /* Set the proper duplex in the FEC now that we have auto-negotiated */ - if (settings & BCM5222_ACSR_FDX) - fec_duplex(fec_ch, FEC_MII_FULL_DUPLEX); - else - fec_duplex(fec_ch, FEC_MII_HALF_DUPLEX); - - dbg("PHY Mode: "); - - if (settings & BCM5222_ACSR_100BTX) - dbg("100Mbps\r\n"); - else - dbg("10Mbps\r\n"); - - if (settings & BCM5222_ACSR_FDX) - dbg("Full-duplex\r\n"); - else - dbg("Half-duplex\r\n"); - - return 1; -} - -void bcm5222_get_reg(uint16_t* status0, uint16_t* status1) -{ - fec_mii_read(0, 0x00, 0x00000000, &status0[0]); - fec_mii_read(0, 0x00, 0x00000001, &status0[1]); - fec_mii_read(0, 0x00, 0x00000004, &status0[4]); - fec_mii_read(0, 0x00, 0x00000005, &status0[5]); - fec_mii_read(0, 0x00, 0x00000006, &status0[6]); - fec_mii_read(0, 0x00, 0x00000007, &status0[7]); - fec_mii_read(0, 0x00, 0x00000008, &status0[8]); - fec_mii_read(0, 0x00, 0x00000010, &status0[16]); - fec_mii_read(0, 0x00, 0x00000011, &status0[17]); - fec_mii_read(0, 0x00, 0x00000012, &status0[18]); - fec_mii_read(0, 0x00, 0x00000013, &status0[19]); - fec_mii_read(0, 0x00, 0x00000018, &status0[24]); - fec_mii_read(0, 0x00, 0x00000019, &status0[25]); - fec_mii_read(0, 0x00, 0x0000001B, &status0[27]); - fec_mii_read(0, 0x00, 0x0000001C, &status0[28]); - fec_mii_read(0, 0x00, 0x0000001E, &status0[30]); - fec_mii_read(0, 0x01, 0x00000000, &status1[0]); - fec_mii_read(0, 0x01, 0x00000001, &status1[1]); - fec_mii_read(0, 0x01, 0x00000004, &status1[4]); - fec_mii_read(0, 0x01, 0x00000005, &status1[5]); - fec_mii_read(0, 0x01, 0x00000006, &status1[6]); - fec_mii_read(0, 0x01, 0x00000007, &status1[7]); - fec_mii_read(0, 0x01, 0x00000008, &status1[8]); - fec_mii_read(0, 0x01, 0x00000010, &status1[16]); - fec_mii_read(0, 0x01, 0x00000011, &status1[17]); - fec_mii_read(0, 0x01, 0x00000012, &status1[18]); - fec_mii_read(0, 0x01, 0x00000013, &status1[19]); - fec_mii_read(0, 0x01, 0x00000018, &status1[24]); - fec_mii_read(0, 0x01, 0x00000019, &status1[25]); - fec_mii_read(0, 0x01, 0x0000001B, &status1[27]); - fec_mii_read(0, 0x01, 0x0000001C, &status1[28]); - fec_mii_read(0, 0x01, 0x0000001E, &status1[30]); -} - diff --git a/net/bootp.c b/net/bootp.c deleted file mode 100644 index 45a8245..0000000 --- a/net/bootp.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * File: bootp.c - * Purpose: Address Resolution Protocol routines. - * - * Notes: - */ - -#include "net.h" -#include "bootp.h" -#include -#include -#include "bas_printf.h" - -#define DBG_BOOTP -#ifdef DBG_BOOTP -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_BOOTP */ - -#define TIMER_NETWORK 3 /* defines GPT3 as timer for this function */ - -static struct bootp_connection connection; -#define XID 0x1234 /* this is arbitrary */ -#define MAX_TRIES 5 /* since UDP can fail */ - -void bootp_request(NIF *nif, uint8_t *pa) -{ - /* - * This function broadcasts a BOOTP request for the protocol - * address "pa" - */ - uint8_t *addr; - IP_ADDR broadcast = {255, 255, 255, 255}; - NBUF *nbuf; - struct bootp_packet *p; - int i, result; - - nbuf = nbuf_alloc(); - if (nbuf == NULL) - { - xprintf("%s: couldn't allocate Tx buffer\r\n", __FUNCTION__); - return; - } - - p = (struct bootp_packet *) &nbuf->data[BOOTP_HDR_OFFSET]; - - /* Build the BOOTP request packet */ - p->type = BOOTP_TYPE_BOOTREQUEST; - p->htype = BOOTP_HTYPE_ETHERNET; - p->hlen = BOOTP_HLEN_ETHERNET; - p->hops = 0; - p->xid = XID; - p->secs = 1; - p->flags = BOOTP_FLAGS_BROADCAST; - p->cl_addr = 0x0; - p->yi_addr = 0x0; - p->gi_addr = 0x0; - - connection.nif = nif; - addr = &nif->hwa[0]; - - for (i = 0; i < 6; i++) - p->ch_addr[i] = addr[i]; - - nbuf->length = BOOTP_PACKET_LEN; - - /* setup reply handler */ - udp_bind_port(BOOTP_CLIENT_PORT, bootp_handler); - - for (i = 0; i < MAX_TRIES; i++) - { - /* Send the BOOTP request */ - result = udp_send(connection.nif, broadcast, BOOTP_CLIENT_PORT, - BOOTP_SERVER_PORT, nbuf); - dbg("sent bootp request\r\n"); - if (result == true) - break; - } - - /* release handler */ - udp_free_port(BOOTP_CLIENT_PORT); - - if (result == 0) - nbuf_free(nbuf); -} - -void bootp_handler(NIF *nif, NBUF *nbuf) -{ - /* - * BOOTP protocol handler - */ - uint8_t *addr; - struct bootp_packet *rx_p; - udp_frame_hdr *udpframe; - - dbg("\r\n"); - - rx_p = (struct bootp_packet *) &nbuf->data[nbuf->offset]; - udpframe = (udp_frame_hdr *) &nbuf->data[nbuf->offset - UDP_HDR_SIZE]; - - /* - * check packet if it is valid and if it is really intended for us - */ - - if (rx_p->type == BOOTP_TYPE_BOOTREPLY && rx_p->xid == XID) - { - dbg("received bootp reply\r\n"); - /* seems to be valid */ - - } - else - { - dbg("received invalid bootp reply\r\n"); - /* not valid */ - return; - } -} diff --git a/net/fec.c b/net/fec.c deleted file mode 100644 index 576c6d6..0000000 --- a/net/fec.c +++ /dev/null @@ -1,1446 +0,0 @@ -/* - * File: fec.c - * Purpose: Driver for the Fast Ethernet Controller (FEC) - * - * Notes: - */ - -#include "net.h" -#include "fec.h" -#include "fecbd.h" -#include "exceptions.h" -#include "interrupts.h" -#include "MCF5475.h" -#include "MCD_dma.h" -#include "mcd_initiators.h" -#include "dma.h" -#include "bas_string.h" -#include "bas_printf.h" -#include "util.h" -#include "wait.h" -#include "am79c874.h" -//#include "bcm5222.h" -#include - -#if defined(MACHINE_FIREBEE) -#include "firebee.h" -#elif defined(MACHINE_M5484LITE) -#include "m5484l.h" -#elif defined(MACHINE_M54455) -#include "m54455.h" -#else -#error Unknown machine! -#endif - -//#define DBG_FEC -#ifdef DBG_FEC -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_FEC */ - - -FEC_EVENT_LOG fec_log[2]; - -/* - * Write a value to a PHY's MII register. - * - * Parameters: - * ch FEC channel - * phy_addr Address of the PHY. - * reg_addr Address of the register in the PHY. - * data Data to be written to the PHY register. - * - * Return Values: - * 1 on failure - * 0 on success. - * - * Please refer to your PHY manual for registers and their meanings. - * mii_write() polls for the FEC's MII interrupt event (which should - * be masked from the interrupt handler) and clears it. If after a - * suitable amount of time the event isn't triggered, a value of 0 - * is returned. - */ -int fec_mii_write(uint8_t ch, uint8_t phy_addr, uint8_t reg_addr, uint16_t data) -{ - int timeout; - uint32_t eimr; - - /* - * Clear the MII interrupt bit - */ - MCF_FEC_EIR(ch) = MCF_FEC_EIR_MII; - - /* - * Write to the MII Management Frame Register to kick-off - * the MII write - */ - MCF_FEC_MMFR(ch) = 0 - | MCF_FEC_MMFR_ST_01 - | MCF_FEC_MMFR_OP_WRITE - | MCF_FEC_MMFR_PA(phy_addr) - | MCF_FEC_MMFR_RA(reg_addr) - | MCF_FEC_MMFR_TA_10 - | MCF_FEC_MMFR_DATA(data); - - /* - * Mask the MII interrupt - */ - eimr = MCF_FEC_EIMR(ch); - MCF_FEC_EIMR(ch) &= ~MCF_FEC_EIMR_MII; - - /* - * Poll for the MII interrupt (interrupt should be masked) - */ - for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++) - { - wait(1); - if (MCF_FEC_EIR(ch) & MCF_FEC_EIR_MII) - break; - } - - if (timeout == FEC_MII_TIMEOUT) - return 0; - - /* - * Clear the MII interrupt bit - */ - MCF_FEC_EIR(ch) = MCF_FEC_EIR_MII; - - /* - * Restore the EIMR - */ - MCF_FEC_EIMR(ch) = eimr; - - return 1; -} - -/* - * Read a value from a PHY's MII register. - * - * Parameters: - * ch FEC channel - * phy_addr Address of the PHY. - * reg_addr Address of the register in the PHY. - * data Pointer to storage for the Data to be read - * from the PHY register (passed by reference) - * - * Return Values: - * 1 on failure - * 0 on success. - * - * Please refer to your PHY manual for registers and their meanings. - * mii_read() polls for the FEC's MII interrupt event (which should - * be masked from the interrupt handler) and clears it. If after a - * suitable amount of time the event isn't triggered, a value of 0 - * is returned. - */ -int fec_mii_read(uint8_t ch, uint8_t phy_addr, uint8_t reg_addr, uint16_t *data) -{ - int timeout; - - /* - * Clear the MII interrupt bit - */ - MCF_FEC_EIR(ch) = MCF_FEC_EIR_MII; - - /* - * Write to the MII Management Frame Register to kick-off - * the MII read - */ - MCF_FEC_MMFR(ch) = 0 - | MCF_FEC_MMFR_ST_01 - | MCF_FEC_MMFR_OP_READ - | MCF_FEC_MMFR_PA(phy_addr) - | MCF_FEC_MMFR_RA(reg_addr) - | MCF_FEC_MMFR_TA_10; - - /* - * Poll for the MII interrupt (interrupt should be masked) - */ - for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++) - { - wait(1); - if (MCF_FEC_EIR(ch) & MCF_FEC_EIR_MII) - break; - } - - if (timeout == FEC_MII_TIMEOUT) - return 0; - - /* - * Clear the MII interrupt bit - */ - MCF_FEC_EIR(ch) = MCF_FEC_EIR_MII; - - *data = (uint16_t)(MCF_FEC_MMFR(ch) & 0x0000FFFF); - - return 1; -} - -/* - * Initialize the MII interface controller - * - * Parameters: - * ch FEC channel - * sys_clk System Clock Frequency (in MHz) - */ -void fec_mii_init(uint8_t ch, uint32_t sys_clk) -{ - /* - * Initialize the MII clock (EMDC) frequency - * - * Desired MII clock is 2.5MHz - * MII Speed Setting = System_Clock / (2.5MHz * 2) - * (plus 1 to make sure we round up) - */ - MCF_FEC_MSCR(ch) = MCF_FEC_MSCR_MII_SPEED((sys_clk / 5) + 1); -} - -/* Initialize the MIB counters - * - * Parameters: - * ch FEC channel - */ -void fec_mib_init(uint8_t ch) -{ - //To do -} - -/* - * Display the MIB counters - * - * Parameters: - * ch FEC channel - */ -void fec_mib_dump(uint8_t ch) -{ - //To do -} - -/* - * Initialize the FEC log - * - * Parameters: - * ch FEC channel - */ -void fec_log_init(uint8_t ch) -{ - memset(&fec_log[ch], 0, sizeof(FEC_EVENT_LOG)); -} - -/* - * Display the FEC log - * - * Parameters: - * ch FEC channel - */ -void fec_log_dump(uint8_t ch) -{ - dbg("\r\n FEC%d Log\r\n", __FUNCTION__, ch); - dbg(" ---------------\r\n", __FUNCTION__); - dbg(" Total: %4d\r\n", fec_log[ch].total); - dbg(" hberr: %4d\r\n", fec_log[ch].hberr); - dbg(" babr: %4d\r\n", fec_log[ch].babr); - dbg(" babt: %4d\r\n", fec_log[ch].babt); - dbg(" gra: %4d\r\n", fec_log[ch].gra); - dbg(" txf: %4d\r\n", fec_log[ch].txf); - dbg(" mii: %4d\r\n", fec_log[ch].mii); - dbg(" lc: %4d\r\n", fec_log[ch].lc); - dbg(" rl: %4d\r\n", fec_log[ch].rl); - dbg(" xfun: %4d\r\n", fec_log[ch].xfun); - dbg(" xferr: %4d\r\n", fec_log[ch].xferr); - dbg(" rferr: %4d\r\n", fec_log[ch].rferr); - dbg(" dtxf: %4d\r\n", fec_log[ch].dtxf); - dbg(" drxf: %4d\r\n", fec_log[ch].drxf); - dbg(" \r\nRFSW:\r\n"); - dbg(" inv: %4d\r\n", fec_log[ch].rfsw_inv); - dbg(" m: %4d\r\n", fec_log[ch].rfsw_m); - dbg(" bc: %4d\r\n", fec_log[ch].rfsw_bc); - dbg(" mc: %4d\r\n", fec_log[ch].rfsw_mc); - dbg(" lg: %4d\r\n", fec_log[ch].rfsw_lg); - dbg(" no: %4d\r\n", fec_log[ch].rfsw_no); - dbg(" cr: %4d\r\n", fec_log[ch].rfsw_cr); - dbg(" ov: %4d\r\n", fec_log[ch].rfsw_ov); - dbg(" tr: %4d\r\n", fec_log[ch].rfsw_tr); - dbg(" ---------------\r\n\r\n"); -} - -/* - * Display some of the registers for debugging - * - * Parameters: - * ch FEC channel - */ -void fec_debug_dump(uint8_t ch) -{ - dbg("\r\n------------- FEC%d -------------\r\n",ch); - dbg("EIR %08x \r\n", MCF_FEC_EIR(ch)); - dbg("EIMR %08x \r\n", MCF_FEC_EIMR(ch)); - dbg("ECR %08x \r\n", MCF_FEC_ECR(ch)); - dbg("RCR %08x \r\n", MCF_FEC_RCR(ch)); - dbg("R_HASH %08x \r\n", MCF_FEC_RHR_HASH(ch)); - dbg("TCR %08x \r\n", MCF_FEC_TCR(ch)); - dbg("FECTFWR %08x \r\n", MCF_FEC_FECTFWR(ch)); - dbg("FECRFSR %08x \r\n", MCF_FEC_FECRFSR(ch)); - dbg("FECRFCR %08x \r\n", MCF_FEC_FECRFCR(ch)); - dbg("FECRLRFP %08x \r\n", MCF_FEC_FECRLRFP(ch)); - dbg("FECRLWFP %08x \r\n", MCF_FEC_FECRLWFP(ch)); - dbg("FECRFAR %08x \r\n", MCF_FEC_FECRFAR(ch)); - dbg("FECRFRP %08x \r\n", MCF_FEC_FECRFRP(ch)); - dbg("FECRFWP %08x \r\n", MCF_FEC_FECRFWP(ch)); - dbg("FECTFSR %08x \r\n", MCF_FEC_FECTFSR(ch)); - dbg("FECTFCR %08x \r\n", MCF_FEC_FECTFCR(ch)); - dbg("FECTLRFP %08x \r\n", MCF_FEC_FECTLRFP(ch)); - dbg("FECTLWFP %08x \r\n", MCF_FEC_FECTLWFP(ch)); - dbg("FECTFAR %08x \r\n", MCF_FEC_FECTFAR(ch)); - dbg("FECTFRP %08x \r\n", MCF_FEC_FECTFRP(ch)); - dbg("FECTFWP %08x \r\n", MCF_FEC_FECTFWP(ch)); - dbg("FRST %08x \r\n", MCF_FEC_FECFRST(ch)); - dbg("--------------------------------\r\n\r\n"); -} - -/* - * Set the duplex on the selected FEC controller - * - * Parameters: - * ch FEC channel - * duplex FEC_MII_FULL_DUPLEX or FEC_MII_HALF_DUPLEX - */ -void fec_duplex(uint8_t ch, uint8_t duplex) -{ - switch (duplex) - { - case FEC_MII_HALF_DUPLEX: - MCF_FEC_RCR(ch) |= MCF_FEC_RCR_DRT; - MCF_FEC_TCR(ch) &= (uint32_t) ~MCF_FEC_TCR_FDEN; - break; - case FEC_MII_FULL_DUPLEX: - default: - MCF_FEC_RCR(ch) &= (uint32_t) ~MCF_FEC_RCR_DRT; - MCF_FEC_TCR(ch) |= MCF_FEC_TCR_FDEN; - break; - } -} - -/* - * Generate the hash table settings for the given address - * - * Parameters: - * addr 48-bit (6 byte) Address to generate the hash for - * - * Return Value: - * The 6 most significant bits of the 32-bit CRC result - */ -uint8_t fec_hash_address(const uint8_t *addr) -{ - uint32_t crc; - uint8_t byte; - int i, j; - - crc = 0xFFFFFFFF; - for (i = 0; i < 6; ++i) - { - byte = addr[i]; - for (j = 0; j < 8; ++j) - { - if ((byte & 0x01) ^ (crc & 0x01)) - { - crc >>= 1; - crc = crc ^ 0xEDB88320; - } - else - crc >>= 1; - byte >>= 1; - } - } - return (uint8_t)(crc >> 26); -} - -/* - * Set the Physical (Hardware) Address and the Individual Address - * Hash in the selected FEC - * - * Parameters: - * ch FEC channel - * pa Physical (Hardware) Address for the selected FEC - */ -void fec_set_address(uint8_t ch, const uint8_t *pa) -{ - uint8_t crc; - - /* - * Set the Physical Address - */ - MCF_FEC_PALR(ch) = (uint32_t) ((pa[0] << 24) | (pa[1] << 16) | (pa[2] << 8) | pa[3]); - MCF_FEC_PAHR(ch) = (uint32_t) ((pa[4] << 24) | (pa[5] << 16)); - - /* - * Calculate and set the hash for given Physical Address - * in the Individual Address Hash registers - */ - crc = fec_hash_address(pa); - if(crc >= 32) - MCF_FEC_IAUR(ch) |= (uint32_t) (1 << (crc - 32)); - else - MCF_FEC_IALR(ch) |= (uint32_t) (1 << crc); -} - -/* - * Reset the selected FEC controller - * - * Parameters: - * ch FEC channel - */ -void fec_reset(uint8_t ch) -{ - int i; - - /* Clear any events in the FIFO status registers */ - MCF_FEC_FECRFSR(ch) = (0 - | MCF_FEC_FECRFSR_OF - | MCF_FEC_FECRFSR_UF - | MCF_FEC_FECRFSR_RXW - | MCF_FEC_FECRFSR_FAE - | MCF_FEC_FECRFSR_IP); - MCF_FEC_FECTFSR(ch) = (0 - | MCF_FEC_FECTFSR_OF - | MCF_FEC_FECTFSR_UF - | MCF_FEC_FECTFSR_TXW - | MCF_FEC_FECTFSR_FAE - | MCF_FEC_FECTFSR_IP); - - /* Reset the FIFOs */ - MCF_FEC_FECFRST(ch) |= MCF_FEC_FECFRST_SW_RST; - MCF_FEC_FECFRST(ch) &= ~MCF_FEC_FECFRST_SW_RST; - - /* Set the Reset bit and clear the Enable bit */ - MCF_FEC_ECR(ch) = MCF_FEC_ECR_RESET; - - /* Wait at least 8 clock cycles */ - for (i = 0; i < 10; ++i) - NOP(); -} - -/* - * Initialize the selected FEC - * - * Parameters: - * ch FEC channel - * mode External interface mode (MII, 7-wire, or internal loopback) - * pa Physical (Hardware) Address for the selected FEC - */ -void fec_init(uint8_t ch, uint8_t mode, const uint8_t *pa) -{ - /* - * Enable all the external interface signals - */ - if (mode == FEC_MODE_7WIRE) - { - if (ch == 1) - MCF_PAD_PAR_FECI2CIRQ |= MCF_PAD_PAR_FECI2CIRQ_PAR_E17; - else - MCF_PAD_PAR_FECI2CIRQ |= MCF_PAD_PAR_FECI2CIRQ_PAR_E07; - } - else if (mode == FEC_MODE_MII) - { - if (ch == 1) - MCF_PAD_PAR_FECI2CIRQ |= 0 - | MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDC_E1MDC - | MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDIO_E1MDIO - | MCF_PAD_PAR_FECI2CIRQ_PAR_E1MII - | MCF_PAD_PAR_FECI2CIRQ_PAR_E17; - else - MCF_PAD_PAR_FECI2CIRQ |= 0 - | MCF_PAD_PAR_FECI2CIRQ_PAR_E0MDC - | MCF_PAD_PAR_FECI2CIRQ_PAR_E0MDIO - | MCF_PAD_PAR_FECI2CIRQ_PAR_E0MII - | MCF_PAD_PAR_FECI2CIRQ_PAR_E07; - } - - /* - * Clear the Individual and Group Address Hash registers - */ - MCF_FEC_IALR(ch) = 0; - MCF_FEC_IAUR(ch) = 0; - MCF_FEC_GALR(ch) = 0; - MCF_FEC_GAUR(ch) = 0; - - /* - * Set the Physical Address for the selected FEC - */ - fec_set_address(ch, pa); - - /* - * Mask all FEC interrupts - */ - MCF_FEC_EIMR(ch) = MCF_FEC_EIMR_MASK_ALL; - - /* - * Clear all FEC interrupt events - */ - MCF_FEC_EIR(ch) = MCF_FEC_EIR_CLEAR_ALL; - - /* - * Initialize the Receive Control Register - */ - MCF_FEC_RCR(ch) = 0 - | MCF_FEC_RCR_MAX_FL(ETH_MAX_FRM) - | MCF_FEC_RCR_PROM - | MCF_FEC_RCR_FCE; - - if (mode == FEC_MODE_MII) - MCF_FEC_RCR(ch) |= MCF_FEC_RCR_MII_MODE; - - else if (mode == FEC_MODE_LOOPBACK) - MCF_FEC_RCR(ch) |= MCF_FEC_RCR_LOOP; - - /* - * Initialize the Transmit Control Register - */ - MCF_FEC_TCR(ch) = MCF_FEC_TCR_FDEN; - - /* - * Set Rx FIFO alarm and granularity - */ - MCF_FEC_FECRFCR(ch) = 0 - | MCF_FEC_FECRFCR_FRMEN - | MCF_FEC_FECRFCR_RXW_MSK - | MCF_FEC_FECRFCR_GR(7); - MCF_FEC_FECRFAR(ch) = MCF_FEC_FECRFAR_ALARM(768); - - /* - * Set Tx FIFO watermark, alarm and granularity - */ - MCF_FEC_FECTFCR(ch) = 0 - | MCF_FEC_FECTFCR_FRMEN - | MCF_FEC_FECTFCR_TXW_MASK - | MCF_FEC_FECTFCR_GR(7); - MCF_FEC_FECTFAR(ch) = MCF_FEC_FECTFAR_ALARM(256); - MCF_FEC_FECTFWR(ch) = MCF_FEC_FECTFWR_X_WMRK_256; - - /* - * Enable the transmitter to append the CRC - */ - MCF_FEC_FECCTCWR(ch) = 0 - | MCF_FEC_FECCTCWR_TFCW - | MCF_FEC_FECCTCWR_CRC; -} - -/* - * Start the FEC Rx DMA task - * - * Parameters: - * ch FEC channel - * rxbd First Rx buffer descriptor in the chain - */ -void fec_rx_start(uint8_t ch, int8_t *rxbd) -{ - uint32_t initiator; - int channel; -#ifdef DBG_FEC - int res; -#endif - - /* - * Make the initiator assignment - */ -#if defined(DBG_FEC) - res = -#else - (void) -#endif - dma_set_initiator(DMA_FEC_RX(ch)); - dbg("dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", ch, res); - - /* - * Grab the initiator number - */ - initiator = dma_get_initiator(DMA_FEC_RX(ch)); - dbg("dma_get_initiator(DMA_FEC_RX(%d)) = %d\r\n", ch, initiator); - - /* - * Determine the DMA channel running the task for the - * selected FEC - */ - channel = dma_set_channel(DMA_FEC_RX(ch), - (ch == 0) ? fec0_rx_frame : fec1_rx_frame); - dbg("DMA channel for FEC%1d: %d\r\n", ch, channel); - - /* - * Start the Rx DMA task - */ - MCD_startDma(channel, - (s8 *) rxbd, - 0, - (s8 *) MCF_FEC_FECRFDR(ch), - 0, - RX_BUF_SZ, - 0, - initiator, - FECRX_DMA_PRI(ch), - 0 - | MCD_FECRX_DMA - | MCD_INTERRUPT - | MCD_TT_FLAGS_CW - | MCD_TT_FLAGS_RL - | MCD_TT_FLAGS_SP - , - 0 - | MCD_NO_CSUM - | MCD_NO_BYTE_SWAP - ); - dbg("Rx DMA task for FEC%1d started\r\n", ch); -} - -/* - * Continue the Rx DMA task - * - * This routine is called after the DMA task has halted after - * encountering an Rx buffer descriptor that wasn't marked as - * ready. There is no harm in calling the DMA continue routine - * if the DMA is not halted. - * - * Parameters: - * ch FEC channel - */ -void fec_rx_continue(uint8_t ch) -{ - int channel; - - /* - * Determine the DMA channel running the task for the - * selected FEC - */ - channel = dma_get_channel(DMA_FEC_RX(ch)); - - dbg("RX DMA channel for FEC%1d is %d\r\n", ch, channel); - - /* - * Continue/restart the DMA task - */ - MCD_continDma(channel); - dbg("RX dma on channel %d continued\r\n", channel); -} - -/* - * Stop all frame receptions on the selected FEC - * - * Parameters: - * ch FEC channel - */ -void fec_rx_stop (uint8_t ch) -{ - uint32_t mask; - int channel; - - /* Save off the EIMR value */ - mask = MCF_FEC_EIMR(ch); - - /* Mask all interrupts */ - MCF_FEC_EIMR(ch) = 0; - - /* - * Determine the DMA channel running the task for the - * selected FEC - */ - channel = dma_get_channel(DMA_FEC_RX(ch)); - - /* Kill the FEC Rx DMA task */ - MCD_killDma(channel); - - /* - * Free up the FEC requestor from the software maintained - * initiator list - */ - dma_free_initiator(DMA_FEC_RX(ch)); - - /* Free up the DMA channel */ - dma_free_channel(DMA_FEC_RX(ch)); - - /* Restore the interrupt mask register value */ - MCF_FEC_EIMR(ch) = mask; -} - -/* - * Receive Frame interrupt handler - this handler is called by the - * DMA interrupt handler indicating that a packet was successfully - * transferred out of the Rx FIFO. - * - * Parameters: - * nif Pointer to Network Interface structure - * ch FEC channel - */ -void fec_rx_frame(uint8_t ch, NIF *nif) -{ - ETH_HDR *eth_hdr; - FECBD *pRxBD; - NBUF *cur_nbuf, *new_nbuf; - int keep; - - dbg("started\r\n"); - - while ((pRxBD = fecbd_rx_alloc(ch)) != NULL) - { - fec_log[ch].drxf++; - keep = true; - - /* - * Check the Receive Frame Status Word for errors - * - The L bit should always be set - * - No undefined bits should be set - * - The upper 5 bits of the length should be cleared - */ - if (!(pRxBD->status & RX_BD_L) || (pRxBD->status & 0x0608) - || (pRxBD->length & 0xF800)) - { - keep = false; - fec_log[ch].rfsw_inv++; - } - else if (pRxBD->status & RX_BD_ERROR) - { - keep = false; - if (pRxBD->status & RX_BD_NO) - fec_log[ch].rfsw_no++; - if (pRxBD->status & RX_BD_CR) - fec_log[ch].rfsw_cr++; - if (pRxBD->status & RX_BD_OV) - fec_log[ch].rfsw_ov++; - if (pRxBD->status & RX_BD_TR) - fec_log[ch].rfsw_tr++; - } - else - { - if (pRxBD->status & RX_BD_LG) - fec_log[ch].rfsw_lg++; - if (pRxBD->status & RX_BD_M) - fec_log[ch].rfsw_m++; - if (pRxBD->status & RX_BD_BC) - fec_log[ch].rfsw_bc++; - if (pRxBD->status & RX_BD_MC) - fec_log[ch].rfsw_mc++; - } - - if (keep) - { - /* - * Pull the network buffer off the Rx ring queue - */ - cur_nbuf = nbuf_remove(NBUF_RX_RING); - - /* - * Copy the buffer descriptor information to the network buffer - */ - cur_nbuf->length = (pRxBD->length - (ETH_HDR_LEN + ETH_CRC_LEN)); - cur_nbuf->offset = ETH_HDR_LEN; - - /* - * Get a new buffer pointer for this buffer descriptor - */ - new_nbuf = nbuf_alloc(); - if (new_nbuf == NULL) - { - dbg("nbuf_alloc() failed\n"); - - /* - * Can't allocate a new network buffer, so we - * have to trash the received data and reuse the buffer - * hoping that some buffers will free up in the system - * and this frame will be re-transmitted by the host - */ - pRxBD->length = RX_BUF_SZ; - pRxBD->status &= (RX_BD_W | RX_BD_INTERRUPT); - pRxBD->status |= RX_BD_E; - nbuf_add(NBUF_RX_RING, cur_nbuf); - fec_rx_continue(ch); - - continue; - } - - /* - * Add the new network buffer to the Rx ring queue - */ - nbuf_add(NBUF_RX_RING, new_nbuf); - - /* - * Re-initialize the buffer descriptor - pointing it - * to the new data buffer. The previous data buffer - * will be passed up the stack - */ - pRxBD->data = new_nbuf->data; - pRxBD->length = RX_BUF_SZ; - pRxBD->status &= (RX_BD_W | RX_BD_INTERRUPT); - pRxBD->status |= RX_BD_E; - - - /* - * Let the DMA know that there is a new Rx BD (in case the - * ring was full and the DMA was waiting for an empty one) - */ - fec_rx_continue(ch); - - /* - * Get pointer to the frame data inside the network buffer - */ - eth_hdr = (ETH_HDR *) cur_nbuf->data; - - /* - * Pass the received packet up the network stack if the - * protocol is supported in our network interface (NIF) - */ - if (nif_protocol_exist(nif, eth_hdr->type)) - { - hexdump((uint8_t *) eth_hdr, ETH_MAX_FRM); - nif_protocol_handler(nif, eth_hdr->type, cur_nbuf); - } - else - { - nbuf_free(cur_nbuf); - dbg("got unsupported packet %d, trashed it\r\n", eth_hdr->type); - } - } - else - { - /* - * This frame isn't a keeper - * Reset the status and length, but don't need to get another - * buffer since we are trashing the data in the current one - */ - pRxBD->length = RX_BUF_SZ; - pRxBD->status &= (RX_BD_W | RX_BD_INTERRUPT); - pRxBD->status |= RX_BD_E; - - /* - * Move the current buffer from the beginning to the end of the - * Rx ring queue - */ - cur_nbuf = nbuf_remove(NBUF_RX_RING); - nbuf_add(NBUF_RX_RING, cur_nbuf); - - /* - * Let the DMA know that there are new Rx BDs (in case - * it is waiting for an empty one) - */ - fec_rx_continue(ch); - } - } -} - -void fec0_rx_frame(void) -{ - extern NIF nif1; - - fec_rx_frame(0, &nif1); -} - -void fec1_rx_frame(void) -{ - extern NIF nif1; - - fec_rx_frame(1, &nif1); -} - -/* - * Start the FEC Tx DMA task - * - * Parameters: - * ch FEC channel - * txbd First Tx buffer descriptor in the chain - */ -void fec_tx_start(uint8_t ch, int8_t *txbd) -{ - uint32_t initiator; - int channel; - void fec0_tx_frame(void); - void fec1_tx_frame(void); -#ifdef DBG_FEC - int res; -#endif - - /* - * Make the initiator assignment - */ -#ifdef DBG_FEC - res = -#else - (void) -#endif - dma_set_initiator(DMA_FEC_TX(ch)); - dbg("dma_set_initiator(%d) = %d\r\n", ch, res); - - /* - * Grab the initiator number - */ - initiator = dma_get_initiator(DMA_FEC_TX(ch)); - dbg("dma_get_initiator(%d) = %d\r\n", ch, initiator); - - - /* - * Determine the DMA channel running the task for the - * selected FEC - */ - channel = dma_set_channel(DMA_FEC_TX(ch), - (ch == 0) ? fec0_tx_frame : fec1_tx_frame); - dbg("dma_set_channel(%d, ...) = %d\r\n", ch, channel); - - /* - * Start the Tx DMA task - */ - MCD_startDma(channel, - (s8 *) txbd, - 0, - (s8 *) MCF_FEC_FECTFDR(ch), - 0, - ETH_MTU, - 0, - initiator, - FECTX_DMA_PRI(ch), - 0 - | MCD_FECTX_DMA - | MCD_INTERRUPT - | MCD_TT_FLAGS_CW - | MCD_TT_FLAGS_RL - | MCD_TT_FLAGS_SP - , - 0 - | MCD_NO_CSUM - | MCD_NO_BYTE_SWAP - ); - dbg("DMA tx task started\r\n"); -} - -/* - * Continue the Tx DMA task - * - * This routine is called after the DMA task has halted after - * encountering an Tx buffer descriptor that wasn't marked as - * ready. There is no harm in calling the continue DMA routine - * if the DMA was not paused. - * - * Parameters: - * ch FEC channel - */ -void fec_tx_continue(uint8_t ch) -{ - int channel; - - /* - * Determine the DMA channel running the task for the - * selected FEC - */ - channel = dma_get_channel(DMA_FEC_TX(ch)); - dbg("dma_get_channel(DMA_FEC_TX(%d)) = %d\r\n", ch, channel); - - /* - * Continue/restart the DMA task - */ - MCD_continDma(channel); - dbg("DMA TX task continue\r\n"); -} - -/* - * Stop all transmissions on the selected FEC and kill the DMA task - * - * Parameters: - * ch FEC channel - */ -void fec_tx_stop(uint8_t ch) -{ - uint32_t mask; - int channel; - - - /* Save off the EIMR value */ - mask = MCF_FEC_EIMR(ch); - - /* Mask all interrupts */ - MCF_FEC_EIMR(ch) = 0; - - /* If the Ethernet is still enabled... */ - if (MCF_FEC_ECR(ch) & MCF_FEC_ECR_ETHER_EN) - { - /* Issue the Graceful Transmit Stop */ - MCF_FEC_TCR(ch) |= MCF_FEC_TCR_GTS; - - /* Wait for the Graceful Stop Complete interrupt */ - while (!(MCF_FEC_EIR(ch) & MCF_FEC_EIR_GRA)) - { - if (!(MCF_FEC_ECR(ch) & MCF_FEC_ECR_ETHER_EN)) - break; - } - - /* Clear the Graceful Stop Complete interrupt */ - MCF_FEC_EIR(ch) = MCF_FEC_EIR_GRA; - } - - /* - * Determine the DMA channel running the task for the - * selected FEC - */ - channel = dma_get_channel(DMA_FEC_TX(ch)); - - /* Kill the FEC Tx DMA task */ - MCD_killDma(channel); - - /* - * Free up the FEC requestor from the software maintained - * initiator list - */ - dma_free_initiator(DMA_FEC_TX(ch)); - - /* Free up the DMA channel */ - dma_free_channel(DMA_FEC_TX(ch)); - - /* Restore the interrupt mask register value */ - MCF_FEC_EIMR(ch) = mask; -} - -/* - * Trasmit Frame interrupt handler - this handler is called by the - * DMA interrupt handler indicating that a packet was successfully - * transferred to the Tx FIFO. - * - * Parameters: - * ch FEC channel - */ -void fec_tx_frame(uint8_t ch) -{ - FECBD *pTxBD; - NBUF *pNbuf; - bool is_empty = true; - - dbg("\r\n"); - while ((pTxBD = fecbd_tx_free(ch)) != NULL) - { - fec_log[ch].dtxf++; - - /* - * Grab the network buffer associated with this buffer descriptor - */ - pNbuf = nbuf_remove(NBUF_TX_RING); - - /* - * Free up the network buffer that was just transmitted - */ - nbuf_free(pNbuf); - dbg("free buffer %p from TX ring\r\n", pNbuf); - - /* - * Re-initialize the Tx BD - */ - pTxBD->data = NULL; - pTxBD->length = 0; - is_empty = false; - - } - if (is_empty) - dbg("transmit queue was empty!\r\n"); -} - -void fec0_tx_frame(void) -{ - fec_tx_frame(0); -} - -void fec1_tx_frame(void) -{ - fec_tx_frame(1); -} - -/* - * Send a packet out the selected FEC - * - * Parameters: - * ch FEC channel - * nif Pointer to Network Interface (NIF) structure - * dst Destination MAC Address - * src Source MAC Address - * type Ethernet Frame Type - * length Number of bytes to be transmitted (doesn't include type, - * src, or dest byte count) - * pkt Pointer packet network buffer - * - * Return Value: - * 1 success - * 0 otherwise - */ -int fec_send(uint8_t ch, NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NBUF *nbuf) -{ - FECBD *pTxBD; - - /* Check the length */ - if ((nbuf->length + ETH_HDR_LEN) > ETH_MTU) - { - dbg("nbuf->length (%d) + ETH_HDR_LEN (%d) exceeds ETH_MTU (%d)\r\n", - nbuf->length, ETH_HDR_LEN, ETH_MTU); - return 0; - } - - /* - * Copy the destination address, source address, and Ethernet - * type into the packet - */ - memcpy(&nbuf->data[0], dst, 6); - memcpy(&nbuf->data[6], src, 6); - memcpy(&nbuf->data[12], &type, 2); - - /* - * Grab the next available Tx Buffer Descriptor - */ - while ((pTxBD = fecbd_tx_alloc(ch)) == NULL) {}; - - /* - * Put the network buffer into the Tx waiting queue - */ - nbuf_add(NBUF_TX_RING, nbuf); - - /* - * Setup the buffer descriptor for transmission - */ - pTxBD->data = nbuf->data; - pTxBD->length = nbuf->length + ETH_HDR_LEN; - pTxBD->status |= (TX_BD_R | TX_BD_L); - - /* - * Continue the Tx DMA task (in case it was waiting for a new - * TxBD to be ready - */ - fec_tx_continue(ch); - - return 1; -} - -int fec0_send(NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NBUF *nbuf) -{ - return fec_send(0, nif, dst, src, type, nbuf); -} - -int fec1_send(NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NBUF *nbuf) -{ - return fec_send(1, nif, dst, src, type, nbuf); -} - -/* - * Enable interrupts on the selected FEC - * - * Parameters: - * ch FEC channel - * pri Interrupt Priority - * lvl Interrupt Level - */ -void fec_irq_enable(uint8_t ch, uint8_t lvl, uint8_t pri) -{ - /* - * Setup the appropriate ICR - */ - MCF_INTC_ICR((ch == 0) ? 39 : 38) = MCF_INTC_ICR_IP(pri) | - MCF_INTC_ICR_IL(lvl); - - /* - * Clear any pending FEC interrupt events - */ - MCF_FEC_EIR(ch) = MCF_FEC_EIR_CLEAR_ALL; - - /* - * Unmask all FEC interrupts - */ - MCF_FEC_EIMR(ch) = MCF_FEC_EIMR_UNMASK_ALL; - - /* - * Unmask the FEC interrupt in the interrupt controller - */ - if (ch == 0) - MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK39; - else - MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK38; -} - - -/* - * Disable interrupts on the selected FEC - * - * Parameters: - * ch FEC channel - */ -void fec_irq_disable(uint8_t ch) -{ - - /* - * Mask all FEC interrupts - */ - MCF_FEC_EIMR(ch) = MCF_FEC_EIMR_MASK_ALL; - - /* - * Mask the FEC interrupt in the interrupt controller - */ - if (ch == 0) - MCF_INTC_IMRH |= MCF_INTC_IMRH_INT_MASK39; - else - MCF_INTC_IMRH |= MCF_INTC_IMRH_INT_MASK38; -} - -/* - * FEC interrupt handler - * All interrupts are multiplexed into a single vector for each - * FEC module. The lower level interrupt handler passes in the - * channel to this handler. Note that the receive interrupt is - * generated by the Multi-channel DMA FEC Rx task. - * - * Parameters: - * ch FEC channel - */ -static bool fec_irq_handler(uint8_t ch) -{ - uint32_t event, eir; - - /* - * Determine which interrupt(s) asserted by AND'ing the - * pending interrupts with those that aren't masked. - */ - eir = MCF_FEC_EIR(ch); - event = eir & MCF_FEC_EIMR(ch); - - if (event != eir) - dbg("pending but not enabled: 0x%08x\r\n", (event ^ eir)); - - /* - * Clear the event(s) in the EIR immediately - */ - MCF_FEC_EIR(ch) = event; - - if (event & MCF_FEC_EIR_RFERR) - { - fec_log[ch].total++; - fec_log[ch].rferr++; - dbg("RFERR\r\n"); - dbg("FECRFSR%d = 0x%08x\r\n", ch, MCF_FEC_FECRFSR(ch)); - //fec_eth_stop(ch); - } - - if (event & MCF_FEC_EIR_XFERR) - { - fec_log[ch].total++; - fec_log[ch].xferr++; - dbg("XFERR\r\n"); - } - - if (event & MCF_FEC_EIR_XFUN) - { - fec_log[ch].total++; - fec_log[ch].xfun++; - dbg("XFUN\r\n"); - //fec_eth_stop(ch); - } - - if (event & MCF_FEC_EIR_RL) - { - fec_log[ch].total++; - fec_log[ch].rl++; - dbg("RL\r\n"); - } - - if (event & MCF_FEC_EIR_LC) - { - fec_log[ch].total++; - fec_log[ch].lc++; - dbg("LC\r\n"); - } - - if (event & MCF_FEC_EIR_MII) - { - fec_log[ch].mii++; - dbg("MII\r\n"); - } - - if (event & MCF_FEC_EIR_TXF) - { - fec_log[ch].txf++; - dbg("TXF\r\n"); - } - - if (event & MCF_FEC_EIR_GRA) - { - fec_log[ch].gra++; - dbg("GRA\r\n"); - } - - if (event & MCF_FEC_EIR_BABT) - { - fec_log[ch].total++; - fec_log[ch].babt++; - dbg("BABT\r\n"); - } - - if (event & MCF_FEC_EIR_BABR) - { - fec_log[ch].total++; - fec_log[ch].babr++; - dbg("BABR\r\n"); - } - - if (event & MCF_FEC_EIR_HBERR) - { - fec_log[ch].total++; - fec_log[ch].hberr++; - dbg("HBERR\r\n"); - } - - return true; -} - -/* - * handler for FEC interrupts - * arg2 is a pointer to the nif in this case - */ -bool fec0_interrupt_handler(void* arg1, void* arg2) -{ - bool res; - - (void) arg1; /* not used */ - (void) arg2; - - res = fec_irq_handler(0); - - return res; -} - -bool fec1_interrupt_handler(void* arg1, void* arg2) -{ - bool res; - - (void) arg1; /* not used */ - (void) arg2; - - res = fec_irq_handler(1); - - return res; -} - -/* - * Configure the selected Ethernet port and enable all operations - * - * Parameters: - * ch FEC channel - * trcvr Transceiver mode (MII, 7-Wire or internal loopback) - * speed Maximum operating speed (MII only) - * duplex Full or Half-duplex (MII only) - * mac Physical (MAC) Address - */ -void fec_eth_setup(uint8_t ch, uint8_t trcvr, uint8_t speed, uint8_t duplex, const uint8_t *mac) -{ - /* - * Disable FEC interrupts - */ - fec_irq_disable(ch); - - /* - * Initialize the event log - */ - fec_log_init(ch); - - /* - * Initialize the network buffers and fec buffer descriptors - */ - nbuf_init(); - fecbd_init(ch); - - /* - * Initialize the FEC - */ - fec_reset(ch); - fec_init(ch, trcvr, mac); - - if (trcvr == FEC_MODE_MII) - { - /* - * Initialize the MII interface - */ -#if defined(MACHINE_FIREBEE) - if (am79c874_init(0, 0, speed, duplex)) - dbg("PHY init completed\r\n"); - else - dbg("PHY init failed\r\n"); -#elif defined(MACHINE_M548X) - bcm_5222_init(0, 0, speed, duplex); -#else - fec_mii_init(ch, SYSCLK / 1000); -#endif /* MACHINE_FIREBEE */ - } - - /* - * Initialize and enable FEC interrupts - */ - fec_irq_enable(ch, FEC_INTC_LVL(ch), FEC_INTC_PRI(ch)); - - /* - * Enable the multi-channel DMA tasks - */ - fec_rx_start(ch, (int8_t*) fecbd_get_start(ch, Rx)); - fec_tx_start(ch, (int8_t*) fecbd_get_start(ch, Tx)); - - /* - * Enable the FEC channel - */ - MCF_FEC_ECR(ch) |= MCF_FEC_ECR_ETHER_EN; -} - -/* - * Reset the selected Ethernet port - * - * Parameters: - * ch FEC channel - */ -void fec_eth_reset(uint8_t ch) -{ - // To do -} - - -/* - * Stop the selected Ethernet port - * - * Parameters: - * ch FEC channel - */ -void fec_eth_stop(uint8_t ch) -{ - int level; - - /* - * Disable interrupts - */ - level = set_ipl(7); - - dbg("fec %d stopped\r\n", ch); - /* - * Gracefully disable the receiver and transmitter - */ - fec_tx_stop(ch); - fec_rx_stop(ch); - - /* - * Disable FEC interrupts - */ - fec_irq_disable(ch); - - /* - * Disable the FEC channel - */ - MCF_FEC_ECR(ch) &= ~MCF_FEC_ECR_ETHER_EN; - -#ifdef DBG_FEC - nbuf_debug_dump(); - fec_log_dump(ch); -#endif - - /* - * Flush the network buffers - */ - nbuf_flush(); - - /* - * Restore interrupt level - */ - set_ipl(level); -} - diff --git a/net/fecbd.c b/net/fecbd.c deleted file mode 100644 index c309c5b..0000000 --- a/net/fecbd.c +++ /dev/null @@ -1,239 +0,0 @@ -/* - * File: fecbd.c - * Purpose: Provide a simple buffer management driver - * - * Notes: - */ -#include "MCD_dma.h" -#include "fecbd.h" -#include "nbuf.h" -#include "eth.h" -#include "bas_printf.h" -#include - -//#define DBG_FECBD -#ifdef DBG_FECBD -#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_FECBD */ - -/* - * This implements a simple static buffer descriptor - * ring for each channel and each direction - * - * FEC Buffer Descriptors need to be aligned to a 4-byte boundary. - * In order to accomplish this, data is over-allocated and manually - * aligned at runtime - * - * Enough space is allocated for each of the two FEC channels to have - * NRXBD Rx BDs and NTXBD Tx BDs - * - */ - -static FECBD unaligned_bds[(2 * NRXBD) + (2 * NTXBD) + 1]; - -/* - * These pointers are used to reference into the chunck of data set - * aside for buffer descriptors - */ -static FECBD *RxBD; -static FECBD *TxBD; - -/* - * Macros to easier access to the BD ring - */ -#define RxBD(ch,i) RxBD[(ch * NRXBD) + i] -#define TxBD(ch,i) TxBD[(ch * NTXBD) + i] - -/* - * Buffer descriptor indexes - */ -static int iTxbd_new; -static int iTxbd_old; -static int iRxbd; - -/* - * Initialize the FEC Buffer Descriptor ring - * Buffer Descriptor format is defined by the MCDAPI - * - * Parameters: - * ch FEC channel - */ -void fecbd_init(uint8_t ch) -{ - NBUF *nbuf; - int i; - - dbg("\r\n"); - - /* - * Align Buffer Descriptors to 4-byte boundary - */ - RxBD = (FECBD *)(((int) unaligned_bds + 3) & 0xFFFFFFFC); - TxBD = (FECBD *)((int) RxBD + (sizeof(FECBD) * 2 * NRXBD)); - - dbg("initialise RX buffer descriptor ring\r\n"); - - /* - * Initialize the Rx Buffer Descriptor ring - */ - for (i = 0; i < NRXBD; ++i) - { - /* Grab a network buffer from the free list */ - nbuf = nbuf_alloc(); - if (nbuf == NULL) - { - dbg("could not allocate network buffer\r\n"); - return; - } - - /* Initialize the BD */ - RxBD(ch,i).status = RX_BD_E | RX_BD_INTERRUPT; - RxBD(ch,i).length = RX_BUF_SZ; - RxBD(ch,i).data = nbuf->data; - - /* Add the network buffer to the Rx queue */ - nbuf_add(NBUF_RX_RING, nbuf); - } - - /* - * Set the WRAP bit on the last one - */ - RxBD(ch, i - 1).status |= RX_BD_W; - - dbg("initialise TX buffer descriptor ring\r\n"); - - /* - * Initialize the Tx Buffer Descriptor ring - */ - for (i = 0; i < NTXBD; ++i) - { - TxBD(ch, i).status = TX_BD_INTERRUPT; - TxBD(ch, i).length = 0; - TxBD(ch, i).data = NULL; - } - - /* - * Set the WRAP bit on the last one - */ - TxBD(ch, i - 1).status |= TX_BD_W; - - /* - * Initialize the buffer descriptor indexes - */ - iTxbd_new = iTxbd_old = iRxbd = 0; -} - -void fecbd_dump(uint8_t ch) -{ -#ifdef DBG_FECBD - int i; - - xprintf("\n------------ FEC%d BDs -----------\n",ch); - xprintf("RxBD Ring\n"); - for (i = 0; i < NRXBD; i++) - { - xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n", - i, &RxBD(ch, i), - RxBD(ch, i).status, - RxBD(ch, i).length, - RxBD(ch, i).data); - } - xprintf("TxBD Ring\n"); - for (i = 0; i < NTXBD; i++) - { - xprintf("%02d: BD Addr=0x%08x, Ctrl=0x%04x, Lgth=%04d, DataPtr=0x%08x\n", - i, &TxBD(ch, i), - TxBD(ch, i).status, - TxBD(ch, i).length, - TxBD(ch, i).data); - } - xprintf("--------------------------------\n\n"); -#endif /* DBG_FECBD */ -} - -/* - * Return the address of the first buffer descriptor in the ring. - * - * Parameters: - * ch FEC channel - * direction Rx or Tx Macro - * - * Return Value: - * The start address of the selected Buffer Descriptor ring - */ -uint32_t fecbd_get_start(uint8_t ch, uint8_t direction) -{ - switch (direction) - { - case Rx: - return (uint32_t)((int)RxBD + (ch * sizeof(FECBD) * NRXBD)); - case Tx: - default: - return (uint32_t)((int)TxBD + (ch * sizeof(FECBD) * NTXBD)); - } -} - -FECBD *fecbd_rx_alloc(uint8_t ch) -{ - int i = iRxbd; - - /* Check to see if the ring of BDs is full */ - if (RxBD(ch, i).status & RX_BD_E) - return NULL; - - /* Increment the circular index */ - iRxbd = (uint8_t)((iRxbd + 1) % NRXBD); - - return &RxBD(ch, i); -} - -/* - * This function keeps track of the next available Tx BD in the ring - * - * Parameters: - * ch FEC channel - * - * Return Value: - * Pointer to next available buffer descriptor. - * NULL if the BD ring is full - */ -FECBD *fecbd_tx_alloc(uint8_t ch) -{ - int i = iTxbd_new; - - /* Check to see if the ring of BDs is full */ - if (TxBD(ch, i).status & TX_BD_R) - return NULL; - - /* Increment the circular index */ - iTxbd_new = (uint8_t)((iTxbd_new + 1) % NTXBD); - - return &TxBD(ch, i); -} - -/* - * This function keeps track of the Tx BDs that have already been - * processed by the FEC - * - * Parameters: - * ch FEC channel - * - * Return Value: - * Pointer to the oldest buffer descriptor that has already been sent - * by the FEC, NULL if the BD ring is empty - */ -FECBD *fecbd_tx_free(uint8_t ch) -{ - int i = iTxbd_old; - - /* Check to see if the ring of BDs is empty */ - if ((TxBD(ch, i).data == NULL) || (TxBD(ch, i).status & TX_BD_R)) - return NULL; - - /* Increment the circular index */ - iTxbd_old = (uint8_t)((iTxbd_old + 1) % NTXBD); - - return &TxBD(ch, i); -} diff --git a/net/ip.c b/net/ip.c deleted file mode 100644 index b3951ce..0000000 --- a/net/ip.c +++ /dev/null @@ -1,317 +0,0 @@ -/* - * File: ip.c - * Purpose: Internet Protcol device driver - * - * Notes: - * - * Modifications: - */ -#include -#include "net.h" -#include "bas_printf.h" -#include "bas_string.h" - - -//#define IP_DEBUG -#if defined(IP_DEBUG) -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif - -void ip_init(IP_INFO *info, IP_ADDR_P myip, IP_ADDR_P gateway, IP_ADDR_P netmask) -{ - int index; - - for (index = 0; index < sizeof(IP_ADDR); index++) - { - info->myip[index] = myip[index]; - info->gateway[index] = gateway[index]; - info->netmask[index] = netmask[index]; - info->broadcast[index] = 0xFF; - } - - info->rx = 0; - info->rx_unsup = 0; - info->tx = 0; - info->err = 0; -} - -uint8_t *ip_get_myip(IP_INFO *info) -{ - if (info != 0) - { - return (uint8_t *) &info->myip[0]; - } - dbg("info is NULL!\n\t"); - return 0; -} - -int ip_addr_compare(IP_ADDR_P addr1, IP_ADDR_P addr2) -{ - int i; - - for (i = 0; i < sizeof(IP_ADDR); i++) - { - if (addr1[i] != addr2[i]) - return 0; - } - return 1; -} - -uint8_t *ip_resolve_route(NIF *nif, IP_ADDR_P destip) -{ - /* - * This function determines whether or not an outgoing IP - * packet needs to be transmitted on the local net or sent - * to the router for transmission. - */ - IP_INFO *info; - IP_ADDR mask, result; - IP_ADDR bc = { 255, 255, 255, 255 }; - int i; - - info = nif_get_protocol_info(nif, ETH_FRM_IP); - - if (memcmp(destip, bc, 4) == 0) - { - dbg("destip is broadcast address, no gateway needed\r\n"); - return destip; - } - - /* create mask for local IP */ - for (i = 0; i < sizeof(IP_ADDR); i++) - { - mask[i] = info->myip[i] & info->netmask[i]; - } - - /* apply mask to the destination IP */ - for (i = 0; i < sizeof(IP_ADDR); i++) - { - result[i] = mask[i] & destip[i]; - } - - /* See if destination IP is local or not */ - if (ip_addr_compare(mask, result)) - { - /* The destination IP is on the local net */ - return arp_resolve(nif, ETH_FRM_IP, destip); - } - else - { - /* The destination IP is not on the local net */ - return arp_resolve(nif, ETH_FRM_IP, info->gateway); - } -} - -int ip_send(NIF *nif, uint8_t *dest, uint8_t *src, uint8_t protocol, NBUF *pNbuf) -{ - /* - * This function assembles an IP datagram and passes it - * onto the hardware to be sent over the network. - */ - uint8_t *route; - ip_frame_hdr *ipframe; - - /* - * Construct the IP header - */ - ipframe = (ip_frame_hdr*) &pNbuf->data[IP_HDR_OFFSET]; - - /* IP version 4, Internet Header Length of 5 32-bit words */ - ipframe->version_ihl = 0x45; - - /* Type of Service == 0, normal and routine */ - ipframe->service_type = 0x00; - - /* Total length of data */ - ipframe->total_length = (uint16_t) (pNbuf->length + IP_HDR_SIZE); - - /* User defined identification */ - ipframe->identification = 0x0000; - - /* Fragment Flags and Offset -- Don't fragment, last frag */ - ipframe->flags_frag_offset = 0x0000; - - /* Time To Live */ - ipframe->ttl = 0xFF; - - /* Protocol */ - ipframe->protocol = protocol; - - /* Checksum, computed later, zeroed for computation */ - ipframe->checksum = 0x0000; - - /* source IP address */ - ipframe->source_addr[0] = src[0]; - ipframe->source_addr[1] = src[1]; - ipframe->source_addr[2] = src[2]; - ipframe->source_addr[3] = src[3]; - - /* dest IP address */ - ipframe->dest_addr[0] = dest[0]; - ipframe->dest_addr[1] = dest[1]; - ipframe->dest_addr[2] = dest[2]; - ipframe->dest_addr[3] = dest[3]; - - /* Compute checksum */ - ipframe->checksum = ip_chksum((uint16_t *) ipframe, IP_HDR_SIZE); - - /* Increment the packet length by the size of the IP header */ - pNbuf->length += IP_HDR_SIZE; - - /* - * Determine the hardware address of the recipient - */ - IP_ADDR bc = { 255, 255, 255, 255}; - if (memcmp(bc, dest, 4) != 0) - { - route = ip_resolve_route(nif, dest); - if (route == NULL) - { - dbg("Unable to locate %d.%d.%d.%d\r\n", - dest[0], dest[1], dest[2], dest[3]); - return 0; - } - } - else - { - route = bc; - dbg("route = broadcast\r\n"); - dbg("nif = %p\r\n", nif); - dbg("nif->send = %p\r\n", nif->send); - } - - return nif->send(nif, route, &nif->hwa[0], ETH_FRM_IP, pNbuf); -} - -#if defined(DEBUG_PRINT) -void dump_ip_frame(ip_frame_hdr *ipframe) -{ - xprintf("Version: %02X\n", ((ipframe->version_ihl & 0x00f0) >> 4)); - xprintf("IHL: %02X\n", ipframe->version_ihl & 0x000f); - xprintf("Service: %02X\n", ipframe->service_type); - xprintf("Length: %04X\n", ipframe->total_length); - xprintf("Ident: %04X\n", ipframe->identification); - xprintf("Flags: %02X\n", ((ipframe->flags_frag_offset & 0xC000) >> 14)); - xprintf("Frag: %04X\n", ipframe->flags_frag_offset & 0x3FFF); - xprintf("TTL: %02X\n", ipframe->ttl); - xprintf("Protocol: %02X\n", ipframe->protocol); - xprintf("Chksum: %04X\n", ipframe->checksum); - xprintf("Source : %d.%d.%d.%d\n", - ipframe->source_addr[0], - ipframe->source_addr[1], - ipframe->source_addr[2], - ipframe->source_addr[3]); - xprintf("Dest : %d.%d.%d.%d\n", - ipframe->dest_addr[0], - ipframe->dest_addr[1], - ipframe->dest_addr[2], - ipframe->dest_addr[3]); - xprintf("Options: %08X\n", ipframe->options); -} -#endif - - -uint16_t ip_chksum(uint16_t *data, int num) -{ - int chksum, ichksum; - uint16_t temp; - - chksum = 0; - num = num >> 1; /* from bytes to words */ - for (; num; num--, data++) - { - temp = *data; - ichksum = chksum + temp; - ichksum = ichksum & 0x0000FFFF; - if ((ichksum < temp) || (ichksum < chksum)) - { - ichksum += 1; - ichksum = ichksum & 0x0000FFFF; - } - chksum = ichksum; - } - return (uint16_t) ~chksum; -} - -static int validate_ip_hdr(NIF *nif, ip_frame_hdr *ipframe) -{ - int index, chksum; - IP_INFO *info; - - /* - * Check the IP Version - */ - if (IP_VERSION(ipframe) != 4) - return 0; - - /* - * Check Internet Header Length - */ - if (IP_IHL(ipframe) < 5) - return 0; - - /* - * Check the destination IP address - */ - info = nif_get_protocol_info(nif,ETH_FRM_IP); - for (index = 0; index < sizeof(IP_ADDR); index++) - if (info->myip[index] != ipframe->dest_addr[index]) - return 0; - - /* - * Check the checksum - */ - chksum = (int)((uint16_t) IP_CHKSUM(ipframe)); - IP_CHKSUM(ipframe) = 0; - - if (ip_chksum((uint16_t *) ipframe, IP_IHL(ipframe) * 4) != chksum) - return 0; - - IP_CHKSUM(ipframe) = (uint16_t) chksum; - - return 1; -} - -void ip_handler(NIF *nif, NBUF *pNbuf) -{ - /* - * IP packet handler - */ - ip_frame_hdr *ipframe; - - dbg("packet received\r\n"); - - ipframe = (ip_frame_hdr *) &pNbuf->data[pNbuf->offset]; - - /* - * Verify valid IP header and destination IP - */ - if (!validate_ip_hdr(nif, ipframe)) - { - dbg("not a valid IP packet!\r\n"); - - nbuf_free(pNbuf); - return; - } - - /* - * Call the appriopriate handler - */ - switch (IP_PROTOCOL(ipframe)) - { - case IP_PROTO_ICMP: - // FIXME: icmp_handler(nif, pNbuf); - break; - case IP_PROTO_UDP: - udp_handler(nif,pNbuf); - break; - default: - dbg("no protocol handler registered for protocol %d\r\n", - __FUNCTION__, IP_PROTOCOL(ipframe)); - nbuf_free(pNbuf); - break; - } - return; -} diff --git a/net/nbuf.c b/net/nbuf.c deleted file mode 100644 index 0398136..0000000 --- a/net/nbuf.c +++ /dev/null @@ -1,224 +0,0 @@ -/* - * File: nbuf.c - * Purpose: Implementation of network buffer scheme. - * - * Notes: - */ -#include "queue.h" -#include "net.h" -#include "driver_mem.h" -#include "exceptions.h" -#include "bas_types.h" -#include "bas_printf.h" - - -#define DBG_NBUF -#if defined(DBG_NBUF) -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_NBUF */ -/* - * Queues used for network buffer storage - */ -QUEUE nbuf_queue[NBUF_MAXQ]; - -/* - * Some devices require line-aligned buffers. In order to accomplish - * this, the nbuf data is over-allocated and adjusted. The following - * array keeps track of the original data pointer returned by malloc - */ -uint8_t *unaligned_buffers[NBUF_MAX]; - -/* - * Initialize all the network buffer queues - * - * Return Value: - * 0 success - * 1 failure - */ -int nbuf_init(void) -{ - int i; - NBUF *nbuf; - - for (i = 0; i < NBUF_MAXQ; ++i) - { - /* Initialize all the queues */ - queue_init(&nbuf_queue[i]); - } - - dbg("Creating %d net buffers of %d bytes\r\n", NBUF_MAX, NBUF_SZ); - - for (i = 0; i < NBUF_MAX; ++i) - { - /* Allocate memory for the network buffer structure */ - nbuf = (NBUF *) driver_mem_alloc(sizeof(NBUF)); - if (!nbuf) - { - xprintf("failed to allocate nbuf\r\n"); - return 1; - } - - /* Allocate memory for the actual data */ - unaligned_buffers[i] = driver_mem_alloc(NBUF_SZ + 16); - nbuf->data = (uint8_t *)((uint32_t)(unaligned_buffers[i] + 15) & 0xFFFFFFF0); - if (!nbuf->data) - { - return 1; - } - - /* Initialize the network buffer */ - nbuf->offset = 0; - nbuf->length = 0; - - /* Add the network buffer to the free list */ - queue_add(&nbuf_queue[NBUF_FREE], (QNODE *)nbuf); - } - - dbg("NBUF allocation complete\r\n"); - - return 0; -} - -/* - * Return all the allocated memory to the heap - */ -void nbuf_flush(void) -{ - NBUF *nbuf; - int i; - int level = set_ipl(7); - int n = 0; - - for (i = 0; i < NBUF_MAX; ++i) - driver_mem_free((uint8_t *) unaligned_buffers[i]); - - for (i = 0; i < NBUF_MAXQ; ++i) - { - while ((nbuf = (NBUF *) queue_remove(&nbuf_queue[i])) != NULL) - { - driver_mem_free(nbuf); - ++n; - } - } - set_ipl(level); -} - -/* - * Allocate a network buffer from the free list - * - * Return Value: - * Pointer to a free network buffer - * NULL if none are available - */ -NBUF *nbuf_alloc(void) -{ - NBUF *nbuf; - int level = set_ipl(7); - - nbuf = (NBUF *) queue_remove(&nbuf_queue[NBUF_FREE]); - set_ipl(level); - - return nbuf; -} - -/* - * Add the specified network buffer back to the free list - * - * Parameters: - * nbuf Buffer to add back to the free list - */ -void nbuf_free(NBUF *nbuf) -{ - int level = set_ipl(7); - - nbuf->offset = 0; - nbuf->length = NBUF_SZ; - queue_add(&nbuf_queue[NBUF_FREE],(QNODE *) nbuf); - - set_ipl(level); -} - -/* - * Remove a network buffer from the specified queue - * - * Parameters: - * q The index that identifies the queue to pull the buffer from - */ -NBUF *nbuf_remove(int q) -{ - NBUF *nbuf; - int level = set_ipl(7); - - nbuf = (NBUF *) queue_remove(&nbuf_queue[q]); - set_ipl(level); - - return nbuf; -} - -/* - * Add a network buffer to the specified queue - * - * Parameters: - * q The index that identifies the queue to add the buffer to - */ -void nbuf_add(int q, NBUF *nbuf) -{ - int level = set_ipl(7); - - queue_add(&nbuf_queue[q], (QNODE *) nbuf); - set_ipl(level); -} - -/* - * Put all the network buffers back into the free list - */ -void nbuf_reset(void) -{ - NBUF *nbuf; - int i; - int level = set_ipl(7); - - for (i = 1; i < NBUF_MAXQ; ++i) - { - while ((nbuf = nbuf_remove(i)) != NULL) - nbuf_free(nbuf); - } - set_ipl(level); -} - -/* - * Display all the nbuf queues - */ -void nbuf_debug_dump(void) -{ -#ifdef DBG_NBUF - NBUF *nbuf; - int i; - int j; - int level; - - level = set_ipl(7); - - for (i = 0; i < NBUF_MAXQ; ++i) - { - dbg("\r\n\r\nQueue #%d\r\n\r\n", i); - dbg("\tBuffer Location\tOffset\tLength\r\n"); - dbg("--------------------------------------\r\n"); - j = 0; - nbuf = (NBUF *) queue_peek(&nbuf_queue[i]); - - while (nbuf != NULL) - { - dbg("%d\t0x%08x\t0x%04x\t0x%04x\r\n", j++, nbuf->data, - nbuf->offset, - nbuf->length); - nbuf = (NBUF *) nbuf->node.next; - } - } - dbg("\r\n"); - - set_ipl(level); -#endif /* DBG_NBUF */ -} diff --git a/net/net_timer.c b/net/net_timer.c deleted file mode 100644 index 747b0a0..0000000 --- a/net/net_timer.c +++ /dev/null @@ -1,202 +0,0 @@ -/* - * File: net_timer.c - * Purpose: Provide a timer use by the BaS network as a timeout - * indicator - * - * Notes: - */ - -#include "net_timer.h" -#include "bas_printf.h" -#include "MCF5475.h" -#include "interrupts.h" - -//#define DBG_TMR -#ifdef DBG_TMR -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_TMR */ - - -#if defined(MACHINE_FIREBEE) -#include "firebee.h" -#elif defined(MACHINE_M5484LITE) -#include "m5484l.h" -#elif defined(MACHINE_M54455) -#include "m54455.h" -#else -#error unknown machine! -#endif - -static NET_TIMER net_timer[4] = -{ - {0, 0, 0, 0, 0, 0, 0}, - {0, 0, 0, 0, 0, 0, 0}, - {0, 0, 0, 0, 0, 0, 0}, - {0, 0, 0, 0, 0, 0, 0} -}; - - -bool timer_default_isr(void *not_used, NET_TIMER *t) -{ - (void) not_used; - - /* - * Clear the pending event - */ - MCF_GPT_GMS(t->ch) = 0; - - dbg("timer isr called for timer channel %d\r\n"); - - /* - * Clear the reference - the desired seconds have expired - */ - t->reference = 0; - - return 1; -} - -void timer_irq_enable(uint8_t ch) -{ - /* - * Setup the appropriate ICR - */ - MCF_INTC_ICR(TIMER_VECTOR(ch) - 64) = MCF_INTC_ICR_IP(net_timer[ch].pri) | - MCF_INTC_ICR_IL(net_timer[ch].lvl); - - /* - * Unmask the FEC interrupt in the interrupt controller - */ - if (ch == 3) - { - MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK59; - } - else if (ch == 2) - { - MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK60; - } - else if (ch == 1) - { - MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK61; - } - else - { - MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK62; - } -} - -bool timer_set_secs(uint8_t ch, uint32_t secs) -{ - uint16_t timeout; - - /* - * Reset the timer - */ - MCF_GPT_GMS(ch) = 0; - - /* - * Get the timeout in seconds - */ - timeout = (uint16_t)(secs * net_timer[ch].cnt); - - /* - * Set the reference indicating that we have not yet reached the - * desired timeout - */ - net_timer[ch].reference = 1; - - /* - * Enable timer interrupt to the processor - */ - timer_irq_enable(ch); - - /* - * Enable the timer using the pre-calculated values - */ - MCF_GPT_GCIR(ch) = (0 - | MCF_GPT_GCIR_CNT(timeout) - | MCF_GPT_GCIR_PRE(net_timer[ch].pre) - ); - MCF_GPT_GMS(ch) = net_timer[ch].gms; - - return true; -} - -uint32_t timer_get_reference(uint8_t ch) -{ - return (uint32_t) net_timer[ch].reference; -} - -bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri) -{ - /* - * Initialize the timer to expire after one second - * - * This routine should only be called by the project (board) specific - * initialization code. - */ - if (!((ch <= 3) && (lvl <= 7) && (lvl >= 1) && (pri <= 7))) - { - dbg("illegal parameters (ch=%d, lvl=%d, pri=%d)\r\n", ch, lvl, pri); - - return false; - } - - /* - * Reset the timer - */ - MCF_GPT_GMS(ch) = 0; - - /* - * Save off the channel, and interrupt lvl/pri information - */ - net_timer[ch].ch = ch; - net_timer[ch].lvl = lvl; - net_timer[ch].pri = pri; - - /* - * Register the timer interrupt handler - */ - if (!isr_register_handler(TIMER_VECTOR(ch), 3, 0, - (bool (*)(void *,void *)) timer_default_isr, - NULL, - (void *) &net_timer[ch]) - ) - { - dbg("could not register timer interrupt handler\r\n"); - return false; - } - dbg("timer handler registered\r\n", __FUNCTION__); - - /* - * Calculate the require CNT value to get a 1 second timeout - * - * 1 sec = CNT * Clk Period * PRE - * CNT = 1 sec / (Clk Period * PRE) - * CNT = Clk Freq / PRE - * - * The system clock frequency is defined as SYSTEM_CLOCK and - * is given in MHz. We need to multiple it by 1000000 to get the - * true value. If we assume PRE to be the maximum of 0xFFFF, - * then the CNT value needed to achieve a 1 second timeout is - * given by: - * - * CNT = SYSTEM_CLOCK * (1000000/0xFFFF) - */ - net_timer[ch].pre = 0xFFFF; - net_timer[ch].cnt = (uint16_t) ((SYSCLK / 1000) * (1000000 / 0xFFFF)); - - /* - * Save off the appropriate mode select register value - */ - net_timer[ch].gms = (0 - | MCF_GPT_GMS_TMS_GPIO - | MCF_GPT_GMS_IEN - | MCF_GPT_GMS_SC - | MCF_GPT_GMS_CE - ); - - return true; -} - diff --git a/net/nif.c b/net/nif.c deleted file mode 100644 index 767895c..0000000 --- a/net/nif.c +++ /dev/null @@ -1,130 +0,0 @@ -/* - * File: nif.c - * Purpose: Network InterFace routines - * - * Notes: - * - * Modifications: - * - */ -#include "net.h" -#include "bas_types.h" -#include "bas_printf.h" - -#define DBG_NIF -#ifdef DBG_NIF -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_NIF */ - -int nif_protocol_exist(NIF *nif, uint16_t protocol) -{ - /* - * This function searches the list of supported protocols - * on the particular NIF and if a protocol handler exists, - * true is returned. This function is useful for network cards - * that needn't read in the entire frame but can discard frames - * arbitrarily. - */ - int index; - - for (index = 0; index < nif->num_protocol; ++index) - { - if (nif->protocol[index].protocol == protocol) - { - return true; - } - } - return false; -} - -void nif_protocol_handler(NIF *nif, uint16_t protocol, NBUF *pNbuf) -{ - /* - * This function searches the list of supported protocols - * on the particular NIF and if a protocol handler exists, - * the protocol handler is invoked. This routine called by - * network device driver after receiving a frame. - */ - int index; - - for (index = 0; index < nif->num_protocol; ++index) - { - if (nif->protocol[index].protocol == protocol) - { - dbg("call protocol handler for protocol %d at %p\r\n", protocol, - nif->protocol[index].handler); - nif->protocol[index].handler(nif,pNbuf); - return; - } - } - dbg("no protocol handler found for protocol %d\r\n", protocol); -} - -void *nif_get_protocol_info(NIF *nif, uint16_t protocol) -{ - /* - * This function searches the list of supported protocols - * on the particular NIF and returns a pointer to the - * config info for 'protocol', otherwise NULL is returned. - */ - int index; - - for (index = 0; index < nif->num_protocol; ++index) - { - if (nif->protocol[index].protocol == protocol) - return (void *)nif->protocol[index].info; - } - return (void *)0; -} - -int nif_bind_protocol(NIF *nif, uint16_t protocol, void (*handler)(NIF *,NBUF *), - void *info) -{ - /* - * This function registers 'protocol' as a supported - * protocol in 'nif'. - */ - if (nif->num_protocol < (MAX_SUP_PROTO - 1)) - { - nif->protocol[nif->num_protocol].protocol = protocol; - nif->protocol[nif->num_protocol].handler = (void(*)(NIF *, NBUF *)) handler; - nif->protocol[nif->num_protocol].info = info; - ++nif->num_protocol; - - return true; - } - return false; -} - -NIF *nif_init (NIF *nif) -{ - int i; - - for (i = 0; i < ETH_ADDR_LEN; ++i) - { - nif->hwa[i] = 0; - nif->broadcast[i] = 0xFF; - } - - for (i = 0; i < MAX_SUP_PROTO; ++i) - { - nif->protocol[i].protocol = 0; - nif->protocol[i].handler = 0; - nif->protocol[i].info = 0; - } - nif->num_protocol = 0; - - nif->mtu = 0; - nif->ch = 0; - nif->send = 0; - - nif->f_rx = 0; - nif->f_tx = 0; - nif->f_rx_err = 0; - nif->f_tx_err = 0; - nif->f_err = 0; - - return nif; -} diff --git a/net/queue.c b/net/queue.c deleted file mode 100644 index 756a9a7..0000000 --- a/net/queue.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * File: queue.c - * Purpose: Implement a first in, first out linked list - * - * Notes: - */ -#include "bas_string.h" -#include "queue.h" - -/* - * Initialize the specified queue to an empty state - * - * Parameters: - * q Pointer to queue structure - */ -void queue_init(QUEUE *q) -{ - q->head = NULL; -} - -/* - * Check for an empty queue - * - * Parameters: - * q Pointer to queue structure - * - * Return Value: - * 1 if Queue is empty - * 0 otherwise - */ -int queue_isempty(QUEUE *q) -{ - return (q->head == NULL); -} - -/* - * Add an item to the end of the queue - * - * Parameters: - * q Pointer to queue structure - * node New node to add to the queue - */ -void queue_add(QUEUE *q, QNODE *node) -{ - if (queue_isempty(q)) - { - q->head = q->tail = node; - } - else - { - q->tail->next = node; - q->tail = node; - } - - node->next = NULL; -} - -/* - * Remove and return first (oldest) entry from the specified queue - * - * Parameters: - * q Pointer to queue structure - * - * Return Value: - * Node at head of queue - NULL if queue is empty - */ -QNODE *queue_remove(QUEUE *q) -{ - QNODE *oldest; - - if (queue_isempty(q)) - return NULL; - - oldest = q->head; - q->head = oldest->next; - return oldest; -} - -/* - * Peek into the queue and return pointer to first (oldest) entry. - * The queue is not modified - * - * Parameters: - * q Pointer to queue structure - * - * Return Value: - * Node at head of queue - NULL if queue is empty - */ -QNODE *queue_peek(QUEUE *q) -{ - return q->head; -} - -/* - * Move entire contents of one queue to the other - * - * Parameters: - * src Pointer to source queue - * dst Pointer to destination queue - */ -void queue_move(QUEUE *dst, QUEUE *src) -{ - if (queue_isempty(src)) - return; - - if (queue_isempty(dst)) - dst->head = src->head; - else - dst->tail->next = src->head; - - dst->tail = src->tail; - src->head = NULL; - return; -} diff --git a/net/tftp.c b/net/tftp.c deleted file mode 100644 index f44d958..0000000 --- a/net/tftp.c +++ /dev/null @@ -1,659 +0,0 @@ -/* - * File: tftp.c - * Purpose: Trivial File Transfer Protocol driver for reading a file - * from a remote host. - * - * Notes: See RFC 1350 - * - * Modifications: - * - */ - -#include "bas_types.h" -#include "bas_printf.h" -#include "bas_string.h" -#include "net.h" -#include "net_timer.h" - -#define TIMER_NETWORK 3 - -/* The one and only TFTP connection */ -static TFTP_Connection tcxn; - -/* Progress Indicators */ -static char hash[] = {'-','\\','|','/'}; -static int ihash = 0; - -static int tftp_rwrq(void) -{ - NBUF *pNbuf; - RWRQ *rwrq; - int i, j, result; - - pNbuf = nbuf_alloc(); - if (pNbuf == NULL) - { - xprintf("TFTP: tftp_rwrq() couldn't allocate Tx buffer\n"); - return 0; - } - - rwrq = (RWRQ *)&pNbuf->data[TFTP_HDR_OFFSET]; - - /* Indicate a R/WRQ */ - rwrq->opcode = tcxn.dir; - - /* Copy in filename */ - strcpy(&rwrq->filename_mode[0], tcxn.file); - i = strlen(tcxn.file) + 1; - - /* Indicate transfer type */ - strcpy (&rwrq->filename_mode[i], OCTET); - - for (j = 0; j < 3; ++j) - { - pNbuf->length = (uint16_t)(i + strlen(OCTET) + 1 + 2); - result = udp_send(tcxn.nif, - tcxn.server_ip, - tcxn.my_port, - tcxn.server_port, - pNbuf); - if (result == 1) - break; - } - - if (result == 0) - nbuf_free(pNbuf); - - return result; -} - -static int tftp_ack(uint16_t blocknum) -{ - ACK *ack; - NBUF *pNbuf; - int i, result; - - pNbuf = nbuf_alloc(); - if (pNbuf == NULL) - { - xprintf("TFTP: tftp_ack() couldn't allocate Tx buffer\n"); - return 0; - } - - ack = (ACK *)&pNbuf->data[TFTP_HDR_OFFSET]; - ack->opcode = TFTP_ACK; - ack->blocknum = blocknum; - - for (i = 0; i < 3; ++i) - { - pNbuf->length = 4; - result = udp_send(tcxn.nif, - tcxn.server_ip, - tcxn.my_port, - tcxn.server_port, - pNbuf); - if (result == 1) - break; - } - - if (result == 0) - nbuf_free(pNbuf); - - return result; -} - -static int tftp_error(uint16_t error_code, uint16_t server_port) -{ - ERROR *err; - NBUF *pNbuf; - int i, result; - - pNbuf = nbuf_alloc(); - if (pNbuf == NULL) - { - xprintf("TFTP: tftp_error() couldn't allocate Tx buffer\n"); - return 0; - } - - err = (ERROR *)&pNbuf->data[TFTP_HDR_OFFSET]; - err->opcode = TFTP_ERROR; - err->code = error_code; - err->msg[0] = '\0'; - - for (i = 0; i < 3; ++i) - { - pNbuf->length = 5; - result = udp_send(tcxn.nif, - tcxn.server_ip, - tcxn.my_port, - server_port, - pNbuf); - if (result == 1) - break; - } - - if (result == 0) - nbuf_free(pNbuf); - - return result; -} - - -void tftp_handler(NIF *nif, NBUF *pNbuf) -{ - union TFTPpacket *tftp_pkt; - udp_frame_hdr *udpframe; - static int cnt; - (void) nif; - - tftp_pkt = (union TFTPpacket *)&pNbuf->data[pNbuf->offset]; - udpframe = (udp_frame_hdr *)&pNbuf->data[pNbuf->offset - UDP_HDR_SIZE]; - - switch (tftp_pkt->generic.opcode) - { - case TFTP_DATA: - /* Is this the expected block number? */ - if (tftp_pkt->data.blocknum == tcxn.exp_blocknum) - { - /* Is this is the first data block received? */ - if (tftp_pkt->data.blocknum == 1) - { - /* Save the server's transfer ID */ - tcxn.server_port = UDP_SOURCE(udpframe); - - /* Mark the connection as open */ - tcxn.open = true; - - /* Start progress indicator */ - xprintf("%c", hash[0]); - cnt = 0; - } - else - { - /* Check the server's transfer ID */ - if (tcxn.server_port != UDP_SOURCE(udpframe)) - { - xprintf("TFTP: Invalid server port: %d\n", \ - UDP_SOURCE(udpframe)); - - /* Send ERROR packet to source */ - tftp_error(TFTP_ERR_TID, UDP_SOURCE(udpframe)); - break; - } - } - - /* Add the buffer to the TFTP queue */ - queue_add(&tcxn.queue, (QNODE *)pNbuf); - - /* Update number of the next block expected */ - tcxn.exp_blocknum++; - - /* Increment number of bytes received counter */ - tcxn.bytes_recv += (pNbuf->length - 4); - - /* Update progress indicator */ - if (++cnt == 50) - { - ihash = (ihash + 1) % 4; - xprintf("\r"); - xprintf("%c", hash[ihash]); - cnt = 0; - } - } - else - { - if (tftp_pkt->data.blocknum < tcxn.exp_blocknum) - { - /* Re-ACK this packet */ - tftp_ack(tftp_pkt->data.blocknum); - } - - /* This is NOT the block expected */ - xprintf("Exp: %d, ", tcxn.exp_blocknum); - xprintf("Rcv: %d\n", tftp_pkt->data.blocknum); - - /* Free the network buffer */ - nbuf_free(pNbuf); - } - break; - case TFTP_ERROR: - xprintf("\nTFTP Error #%d: ",tftp_pkt->error.code); - xprintf("%s\n",tftp_pkt->error.msg); - tcxn.error = true; - /* Free the network buffer */ - nbuf_free(pNbuf); - break; - case TFTP_ACK: - if (tftp_pkt->ack.blocknum == tcxn.exp_blocknum) - { - if (tftp_pkt->data.blocknum == 0) - { /* This is the first ACK received */ - - /* Save the server's transfer ID */ - tcxn.server_port = UDP_SOURCE(udpframe); - - /* Mark the connection as open */ - tcxn.open = true; - } - else - { /* Check the server's transfer ID */ - if (tcxn.server_port != UDP_SOURCE(udpframe)) - { - xprintf("TFTP: Invalid server port: %d\n", \ - UDP_SOURCE(udpframe)); - - /*Send ERROR packet to source */ - tftp_error(TFTP_ERR_TID, UDP_SOURCE(udpframe)); - break; - } - } - - tcxn.exp_blocknum++; - } - else - { - /* This is NOT the block number expected */ - xprintf("ACK Exp: %d, ", tcxn.exp_blocknum); - xprintf("ACK Rcv: %d\n", tftp_pkt->ack.blocknum); - } - - /* Free the network buffer */ - nbuf_free(pNbuf); - break; - case TFTP_RRQ: - case TFTP_WRQ: - default: - /* Free the network buffer */ - nbuf_free(pNbuf); - break; - } -} - -void tftp_end(int success) -{ - /* - * Following a successful transfer the caller should pass in - * true, there should have been no ERROR packets received, and - * the connection should have been marked as closed by the - * tftp_in_char() routine. - */ - if (success && !tcxn.error && (tcxn.open == false)) - { - xprintf("\bTFTP transfer completed \n"); - xprintf("Read %d bytes (%d blocks)\n", \ - tcxn.bytes_recv, tcxn.exp_blocknum - 1); - } - else - { - /* Send error packet to stifle the server */ - tftp_error(TFTP_ERR_ILL, tcxn.server_port); - - xprintf("\bErrors in TFTP transfer.\n"); - xprintf("Read %d bytes (%d blocks)\n", \ - tcxn.bytes_recv, tcxn.exp_blocknum - 1); - } - - /* Free up any buffers left in the queue */ - while (!queue_isempty(&tcxn.queue)) - nbuf_free((NBUF *)queue_remove(&tcxn.queue)); - - /* Free the UDP port */ - udp_free_port(tcxn.my_port); -} - -int tftp_write(NIF *nif, char *fn, IP_ADDR_P server, uint32_t begin, uint32_t end) -{ - DATA *data; - NBUF *pNbuf; - - uint32_t i, retries, bytes_to_send; - uint16_t blocknum, this_size; - uint8_t success, *current; - int result; - - if (fn == 0 || server == 0 || end < begin) - return 0; - - /* Setup initial connection status */ - tcxn.nif = nif; - tcxn.file = fn; - tcxn.server_ip[0] = server[0]; - tcxn.server_ip[1] = server[1]; - tcxn.server_ip[2] = server[2]; - tcxn.server_ip[3] = server[3]; - tcxn.server_port = UDP_PORT_TFTP; - tcxn.exp_blocknum = 0; - tcxn.dir = TFTP_WRQ; - tcxn.open = false; - tcxn.bytes_sent = 0; - tcxn.error = false; - - /* Use Mac address as pseudo-random port */ - udp_prime_port((uint16_t)((nif->hwa[4] << 8) | nif->hwa[5])); - tcxn.my_port = udp_obtain_free_port(); - udp_bind_port(tcxn.my_port,&tftp_handler); - - retries = 4; - success = false; - - while (--retries) - { - /* Make the TFTP Read/Write Request */ - if (!tftp_rwrq()) - { - xprintf("Error: Couldn't send TFTP Write Request\n"); - udp_free_port(tcxn.my_port); - return false; - } - - timer_set_secs(TIMER_NETWORK, TFTP_TIMEOUT); - while (timer_get_reference(TIMER_NETWORK)) - { - /* Has the server responded */ - if (tcxn.open) - { - success = true; - break; - } - } - - /* If the connection is open, we are done here */ - if (success || tcxn.error) - break; - } - if (!retries) - { - xprintf("TFTP could not make connection to server.\n"); - udp_free_port(tcxn.my_port); - return false; - } - else if (tcxn.error) - { - xprintf("\bErrors in TFTP upload.\n"); - udp_free_port(tcxn.my_port); - return false; - } - - bytes_to_send = end - begin; - current = (uint8_t *)begin; - blocknum = 1; - retries = 4; - success = false; - - while (--retries) - { - pNbuf = nbuf_alloc(); - if (pNbuf == NULL) - { - xprintf("TFTP: tftp_write() couldn't allocate Tx buffer\n"); - return false; - } - - /* Build the packet */ - data = (DATA *)&pNbuf->data[TFTP_HDR_OFFSET]; - data->blocknum = blocknum; - data->opcode = TFTP_DATA; - - this_size = (bytes_to_send > TFTP_PKTSIZE) ? \ - TFTP_PKTSIZE : (uint16_t)bytes_to_send; - - for (i = 0; i < this_size; i++) - { - data->data[i] = current[i]; - } - - /* Set the packet length */ - pNbuf->length = (uint16_t)(4 + this_size); - - /* Attempt to send the packet */ - for (i = 0; i < 3; ++i) - { - result = udp_send(tcxn.nif, - tcxn.server_ip, - tcxn.my_port, - tcxn.server_port, - pNbuf); - - if (result == 1) - break; - } - - if (result == 0) - nbuf_free(pNbuf); - - timer_set_secs(TIMER_NETWORK, TFTP_TIMEOUT); - while (timer_get_reference(TIMER_NETWORK)) - { - /* Has the server responded */ - if ((tcxn.exp_blocknum - 1) == blocknum) - { - success = true; - break; - } - } - - /* TFTP Write Compeleted successfully */ - if (success && (this_size < TFTP_PKTSIZE)) - { - tcxn.bytes_sent += this_size; - break; - } - - if (tcxn.error) - break; - - /* If an ACK was received, keep sending packets */ - if (success) - { - tcxn.bytes_sent += TFTP_PKTSIZE; - bytes_to_send -= TFTP_PKTSIZE; - current += TFTP_PKTSIZE; - blocknum++; - retries = 4; - success = false; - } - } - if (tcxn.error) - { - xprintf("TFTP lost connection to server.\n"); - xprintf("Sent %d bytes (%d blocks)\n", \ - tcxn.bytes_sent, tcxn.exp_blocknum - 1); - udp_free_port(tcxn.my_port); - return false; - } - else - { - xprintf("\bTFTP upload successful\n"); - xprintf("Sent %d bytes (%d blocks)\n", \ - tcxn.bytes_sent, tcxn.exp_blocknum - 1); - udp_free_port(tcxn.my_port); - return true; - } -} - -int tftp_read(NIF *nif, char *fn, IP_ADDR_P server) -{ - uint32_t retries; - - if (fn == 0 || server == 0) - return 0; - - /* Setup initial connection status */ - tcxn.nif = nif; - tcxn.file = fn; - tcxn.server_ip[0] = server[0]; - tcxn.server_ip[1] = server[1]; - tcxn.server_ip[2] = server[2]; - tcxn.server_ip[3] = server[3]; - tcxn.server_port = UDP_PORT_TFTP; - tcxn.exp_blocknum = 1; - tcxn.last_ack = 0; - tcxn.dir = TFTP_RRQ; - tcxn.open = false; - tcxn.bytes_recv = 0; - tcxn.rem_bytes = 0; - tcxn.next_char = NULL; - tcxn.error = false; - queue_init(&tcxn.queue); - - /* Use Mac address as pseudo-random port */ - udp_prime_port((uint16_t)((nif->hwa[4] << 8) | nif->hwa[5])); - tcxn.my_port = udp_obtain_free_port(); - udp_bind_port(tcxn.my_port,&tftp_handler); - - retries = 4; - - while (--retries) - { - /* Make the TFTP Read/Write Request */ - if (!tftp_rwrq()) - { - xprintf("Error: Couldn't send TFTP Read Request\n"); - udp_free_port(tcxn.my_port); - return false; - } - - timer_set_secs(TIMER_NETWORK, TFTP_TIMEOUT); - while (timer_get_reference(TIMER_NETWORK)) - { - /* Has the server responded */ - if (tcxn.open == true) - break; - } - - /* If the connection is open, we are done here */ - if ((tcxn.open == true) || tcxn.error) - break; - } - if (!retries) - { - xprintf("TFTP could not make connection to server.\n"); - udp_free_port(tcxn.my_port); - return false; - } - else if (tcxn.error) - { - xprintf("\bErrors in TFTP download.\n"); - udp_free_port(tcxn.my_port); - return false; - } - else - return true; -} - -int tftp_in_char(void) -{ - union TFTPpacket *tftp_pkt; - int retval; - NBUF *pNbuf; - - if (tcxn.next_char != NULL) - { - /* - * A buffer is already being worked on - grab next - * byte from it - */ - retval = *tcxn.next_char++; - if (--tcxn.rem_bytes <= 0) - { - /* The buffer is depleted; add it back to the free queue */ - pNbuf = (NBUF *)queue_remove(&tcxn.queue); - - nbuf_free(pNbuf); - tcxn.next_char = NULL; - } - } - else - { - /* Is the connection still open? */ - if (tcxn.open == false) - { - /* - * The last packet has been received and the last data - * buffer has been exhausted - */ - retval = -1; - } - else - { - /* Get pointer to the next buffer */ - pNbuf = (NBUF *)queue_peek(&tcxn.queue); - - if (pNbuf == NULL) - { - int i; - - /* There was no buffer in the queue */ - for (i = 0; i < 3; ++i) - { - timer_set_secs(TIMER_NETWORK, 1); - while (timer_get_reference(TIMER_NETWORK)) - { - /* Has the server sent another DATA packet? */ - if (!queue_isempty(&tcxn.queue)) - { - pNbuf = (NBUF *)queue_peek(&tcxn.queue); - break; - } - } - if (pNbuf != NULL) - break; - - /* Ack the last packet again */ - xprintf("Re-acking %d\n",tcxn.last_ack - 1); - retval = tftp_ack(tcxn.last_ack - 1); - } - } - if (pNbuf == NULL) - { - /* The server didn't respond with the expected packet */ - tcxn.open = false; - tcxn.error = true; - xprintf("TFTP lost connection to server.\n"); - retval = -1; - } - else - { - tftp_pkt = (union TFTPpacket *)&pNbuf->data[pNbuf->offset]; - - /* Subtract the TFTP header from the data length */ - tcxn.rem_bytes = pNbuf->length - 4; - - /* Point to first data byte in the packet */ - tcxn.next_char = tftp_pkt->data.data; - - /* Save off the block number */ - tcxn.last_ack = tftp_pkt->data.blocknum; - - /* Check to see if this is the last packet of the transfer */ - if (tcxn.rem_bytes < TFTP_PKTSIZE) - tcxn.open = false; - - /* Check for empty termination packet */ - if (tcxn.rem_bytes == 0) - { - pNbuf = (NBUF *)queue_remove(&tcxn.queue); - nbuf_free(pNbuf); - tcxn.next_char = NULL; - retval = tftp_ack(tcxn.last_ack++); - retval = -1; - } - else - { - retval = tftp_ack(tcxn.last_ack++); - retval = *tcxn.next_char++; - - /* Check for a single byte packet */ - if (--tcxn.rem_bytes == 0) - { - /* The buffer is depleted; add it back to the free queue */ - pNbuf = (NBUF *)queue_remove(&tcxn.queue); - nbuf_free(pNbuf); - tcxn.next_char = NULL; - } - } - } - } - } - return retval; -} diff --git a/net/udp.c b/net/udp.c deleted file mode 100644 index cd84c4e..0000000 --- a/net/udp.c +++ /dev/null @@ -1,184 +0,0 @@ -/* - * File: udp.c - * Purpose: User Datagram Protocol driver - * - * Notes: - * - * Modifications: - * - */ -#include "bas_types.h" -#include "bas_printf.h" -#include "net.h" -#include - -//#define DBG_UDP -#if defined(DBG_UDP) -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_UDP */ - -typedef struct -{ - uint16_t port; - void (*handler)(NIF *, NBUF *); -} UDP_BOUND_PORT; - -#define UDP_MAX_PORTS (5) /* plenty for this implementation */ - - -static UDP_BOUND_PORT udp_port_table[UDP_MAX_PORTS]; - -static uint16_t udp_port; - -void udp_init(void) -{ - int index; - - for (index = 0; index < UDP_MAX_PORTS; ++index) - { - udp_port_table[index].port = 0; - udp_port_table[index].handler = 0; - } - - udp_port = DEFAULT_UDP_PORT; /* next free port */ -} - -void udp_prime_port(uint16_t init_port) -{ - udp_port = init_port; -} - -void udp_bind_port(uint16_t port, void (*handler)(NIF *, NBUF *)) -{ - int index; - - for (index = 0; index < UDP_MAX_PORTS; ++index) - { - if (udp_port_table[index].port == 0) - { - udp_port_table[index].port = port; - udp_port_table[index].handler = handler; - - return; - } - } -} - -void udp_free_port(uint16_t port) -{ - int index; - - for (index = 0; index < UDP_MAX_PORTS; ++index) - { - if (udp_port_table[index].port == port) - { - udp_port_table[index].port = 0; - - return; - } - } -} - -static void *udp_port_handler(uint16_t port) -{ - int index; - - for (index = 0; index < UDP_MAX_PORTS; ++index) - { - if (udp_port_table[index].port == port) - { - return (void *) udp_port_table[index].handler; - } - } - return NULL; -} - -uint16_t udp_obtain_free_port(void) -{ - uint16_t port; - - port = udp_port; - if (--udp_port <= 255) - udp_port = DEFAULT_UDP_PORT; - - return port; -} - -int udp_send(NIF *nif, uint8_t *dest, int sport, int dport, NBUF *pNbuf) -{ - uint8_t *myip; - - if (nif == NULL) - { - dbg("nif is NULL\r\n"); - return 0; - } - - /* - * This function takes data, creates a UDP frame from it and - * passes it onto the IP layer - */ - udp_frame_hdr *udpframe; - - udpframe = (udp_frame_hdr *) &pNbuf->data[UDP_HDR_OFFSET]; - - /* Set UDP source port */ - udpframe->src_port = (uint16_t) sport; - - /* Set UDP destination port */ - udpframe->dest_port = (uint16_t) dport; - - /* Set length */ - udpframe->length = (uint16_t) (pNbuf->length + UDP_HDR_SIZE); - - /* No checksum calcualation needed */ - udpframe->chksum = (uint16_t) 0; - - /* Add the length of the UDP packet to the total length of the packet */ - pNbuf->length += 8; - - myip = ip_get_myip(nif_get_protocol_info(nif, ETH_FRM_IP)); - - dbg("sent UDP request to %d.%d.%d.%d from %d.%d.%d.%d\r\n", - dest[0], dest[1], dest[2], dest[3], - myip[0], myip[1], myip[2], myip[3]); - - return (ip_send(nif, dest, myip, IP_PROTO_UDP, pNbuf)); - -} - -void udp_handler(NIF *nif, NBUF *pNbuf) -{ - /* - * This function handles incoming UDP packets - */ - udp_frame_hdr *udpframe; - void (*handler)(NIF *, NBUF *); - - udpframe = (udp_frame_hdr *) &pNbuf->data[pNbuf->offset]; - - dbg("packet received\r\n",); - - /* - * Adjust the length and valid data offset of the packet we are - * passing on - */ - pNbuf->length -= UDP_HDR_SIZE; - pNbuf->offset += UDP_HDR_SIZE; - - /* - * Traverse the list of bound ports to see if there is a higher - * level protocol to pass the packet on to - */ - if ((handler = (void(*)(NIF*, NBUF*)) udp_port_handler(UDP_DEST(udpframe))) != NULL) - handler(nif, pNbuf); - else - { - dbg("received UDP packet for non-supported port\n"); - nbuf_free(pNbuf); - } - - return; -} diff --git a/nutil/s19header.c b/nutil/s19header.c deleted file mode 100644 index 1832545..0000000 --- a/nutil/s19header.c +++ /dev/null @@ -1,385 +0,0 @@ -/* - * s19header.c - * - * Created on: 17.12.2012 - * Author: mfro - * The ACP Firebee project - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2012 M. Froeschle - */ - -#include -#include -#include -#include -#include - -#include "s19reader.h" - -/* - * Yes, I know. The following doesn't really look like code should look like... - * - * I did try to map structures over the S-records with (packed) which didn't work reliably due to - * gcc _not_ packing them appropiate and finally ended up with this. Not nice, put paid (and working). - * - */ -#define SREC_TYPE(a) (a)[0] /* type of record */ -#define SREC_COUNT(a) (a)[1] /* length of valid bytes to follow */ -#define SREC_ADDR16(a) (256 * (a)[2] + (a)[3]) /* 2 byte address field */ -#define SREC_ADDR24(a) (0x10000 * (a)[2] + 0x100 * \ - (a)[3] + (a)[4]) /* 3 byte address field */ -#define SREC_ADDR32(a) (0x1000000 * a[2] + 0x10000 * \ - a[3] + 0x100 * (a)[4] + (a)[5]) /* 4 byte address field */ -#define SREC_DATA16(a) ((uint8_t *)&((a)[4])) /* address of first byte of data in a record */ -#define SREC_DATA24(a) ((uint8_t *)&((a)[5])) /* address of first data byte in 24 bit record */ -#define SREC_DATA32(a) ((uint8_t *)&((a)[6])) /* adress of first byte of a record with 32 bit address field */ -#define SREC_DATA16_SIZE(a) (SREC_COUNT((a)) - 3) /* length of the data[] array without the checksum field */ -#define SREC_DATA24_SIZE(a) (SREC_COUNT((a)) - 4) /* length of the data[] array without the checksum field */ -#define SREC_DATA32_SIZE(a) (SREC_COUNT((a)) - 5) /* length of the data[] array without the checksum field */ -#define SREC_CHECKSUM(a) (a)[SREC_COUNT(a) + 2 - 1] /* record's checksum (two's complement of the sum of all bytes) */ - -#define SREC_MODULENAME(a) &((a)[4]) /* module name in an S0 record */ -#define SREC_MODULENAME_LENGTH 20 -#define SREC_VERSION(a) &((a)[24]) /* version info in an S0 record */ -#define SREC_VERSION_LENGTH 2 -#define SREC_REVISION(a) &((a)[26]) /* revision info in an S0 record */ -#define SREC_REVISIION_LENGTH 2 -#define SREC_DESCRIPTION(a) &((a)[28]) /* description field in an S0 record */ -#define SREC_DESCRIPTION_LENGTH 36 - -/* - * convert a single hex character into byte - */ -static uint8_t nibble_to_byte(uint8_t nibble) -{ - if ((nibble >= '0') && (nibble <= '9')) - return nibble - '0'; - else if ((nibble >= 'A' && nibble <= 'F')) - return 10 + nibble - 'A'; - else if ((nibble >= 'a' && nibble <= 'f')) - return 10 + nibble - 'a'; - return 0; -} - -/* - * convert two hex characters into byte - */ -static uint8_t hex_to_byte(uint8_t hex[2]) -{ - return 16 * (nibble_to_byte(hex[0])) + (nibble_to_byte(hex[1])); -} - -#ifdef _NOT_USED_ -/* - * convert four hex characters into a 16 bit word - */ -static uint16_t hex_to_word(uint8_t hex[4]) -{ - return 256 * hex_to_byte(&hex[0]) + hex_to_byte(&hex[2]); -} - -/* - * convert eight hex characters into a 32 bit word - */ -static uint32_t hex_to_long(uint8_t hex[8]) -{ - return 65536 * hex_to_word(&hex[0]) + hex_to_word(&hex[4]); -} -#endif /* _NOT_USED_ */ - -/* - * compute the record checksum - * - * it consists of the one's complement of the byte sum of the data from the count field until the end - */ -static uint8_t checksum(uint8_t arr[]) -{ - int i; - uint8_t checksum = SREC_COUNT(arr); - - for (i = 0; i < SREC_COUNT(arr) - 1; i++) - { - checksum += arr[i + 2]; - } - return ~checksum; -} - -void print_record(uint8_t *arr) -{ - switch (SREC_TYPE(arr)) - { - case 0: - { - printf("type 0x%x ", SREC_TYPE(arr)); - printf("count 0x%x ", SREC_COUNT(arr)); - printf("addr 0x%x ", SREC_ADDR16(arr)); - printf("module %11.11s ", SREC_DATA16(arr)); - printf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr)); - } - break; - - case 3: - case 7: - { - printf("type 0x%x ", SREC_TYPE(arr)); - printf("count 0x%x ", SREC_COUNT(arr)); - printf("addr 0x%x ", SREC_ADDR32(arr)); - printf("data %02x,%02x,%02x,%02x,... ", - SREC_DATA32(arr)[0], SREC_DATA32(arr)[1], SREC_DATA32(arr)[3], SREC_DATA32(arr)[4]); - printf("chk 0x%x 0x%x\r\n", SREC_CHECKSUM(arr), checksum(arr)); - } - break; - - default: - printf("unsupported report type %d in print_record\r\n", arr[0]); - break; - } -} - -/* - * convert an S-record line into its corresponding byte vector (ASCII->binary) - */ -static void line_to_vector(uint8_t *buff, uint8_t *vector) -{ - int i; - int length; - uint8_t *vp = vector; - - length = hex_to_byte(buff + 2); - - buff++; - *vp++ = nibble_to_byte(*buff); /* record type. Only one single nibble */ - buff++; - - for (i = 0; i <= length; i++) - { - *vp++ = hex_to_byte(buff); - buff += 2; - } -} - -static void vector_to_line(uint8_t *vector, uint8_t *buff) -{ - sprintf(buff, "S"); -} - -/* - * read and parse a Motorola S-record file and copy contents to dst. The theory of operation is to read and parse the S-record file - * and to use the supplied callback routine to copy the buffer to the destination once the S-record line is converted. - * The memcpy callback can be anything (as long as it conforms parameter-wise) - a basically empty function to just let - * read_srecords validate the file, a standard memcpy() to copy file contents to destination RAM or a more sophisticated - * routine that does write/erase flash - * - * FIXME: Currently only records that the gcc toolchain emits are supported. - * - * Parameters: - * IN - * filename - the filename that contains the S-records - * callback - the memcpy() routine discussed above - * OUT - * start_address - the execution address of the code as read from the file. Can be used to jump into and execute it - * actual_length - the overall length of the binary code read from the file - * returns - * OK or an err_t error code if anything failed - */ -int main(int argc, char *argv[]) -{ - int fres; - int set; - char *filename = NULL; - FILE *file; - int ret = OK; - int i; - - - for (i = 1; i < argc; i++) - { - if (argv[i][0] == '-') - { - /* option */ - if (strcmp(argv[i], "-s") == 0) - { - set = 1; - } - } - else - { - filename = argv[i]; - } - } - - if (filename == NULL) - { - fprintf(stderr, "no filename given\n"); - exit(1); - } - - if ((file = fopen(filename, "r")) != NULL) - { - uint8_t line[80]; - int lineno = 0; - int data_records = 0; - bool found_block_header = false; - bool found_block_end = false; - bool found_block_data = false; - - while (ret == OK && (uint8_t *) fgets((char *) line, sizeof(line), file) != NULL) - { - lineno++; - uint8_t vector[80]; - char str[255]; - int length; - - - - line_to_vector(line, vector); /* vector now contains the decoded contents of line, from line[1] on */ - - if (line[0] == 'S') - { - char header[256]; - - if (SREC_CHECKSUM(vector) != checksum(vector)) - { - printf("invalid checksum 0x%x (should be 0x%x) in line %d\r\n", - SREC_CHECKSUM(vector), checksum(vector), lineno); - ret = FAIL; - } - - switch (vector[0]) - { - case 0: /* block header */ - found_block_header = true; - if (found_block_data || found_block_end) - { - printf("S7 or S3 record found before S0: S-records corrupt?\r\n"); - ret = FAIL; - } - printf("address: 0x%04x\n", SREC_ADDR16(vector)); - printf("length of record: %d\n", SREC_COUNT(vector)); - length = SREC_DATA16_SIZE(vector) - (SREC_DATA16(vector) - vector); - printf("length: %d\n", length); - strncpy(str, SREC_DATA16(vector), length); - str[length] = '\0'; - printf("Name: %s\n", str); - printf("version: %d, revision %d\n", - * (unsigned short *)((char *) SREC_DATA16(vector) + length), - * (unsigned short *)((char *) SREC_DATA16(vector) + length + 1)); - print_record(vector); - - break; - - case 2: /* three byte address field data record */ - if (!found_block_header || found_block_end) - { - printf("S3 record found before S0 or after S7: S-records corrupt?\r\n"); - ret = FAIL; - } - // ret = callback((uint8_t *) SREC_ADDR24(vector), SREC_DATA24(vector), SREC_DATA24_SIZE(vector)); - data_records++; - break; - - case 3: /* four byte address field data record */ - if (!found_block_header || found_block_end) - { - printf("S3 record found before S0 or after S7: S-records corrupt?\r\n"); - ret = FAIL; - } - // ret = callback((uint8_t *) SREC_ADDR32(vector), SREC_DATA32(vector), SREC_DATA32_SIZE(vector)); - data_records++; - break; - - case 7: /* four byte address field end record */ - if (!found_block_header || found_block_end) - { - printf("S7 record found before S0 or after S7: S-records corrupt?\r\n"); - } - else - { - // printf("S7 record (end) found after %d valid data blocks\r\n", data_records); - //*start_address = (void *) SREC_ADDR32(vector); - } - break; - - case 8: /* three byte address field end record */ - if (!found_block_header || found_block_end) - { - printf("S8 record found before S0 or after S8: S-records corrupt?\r\n"); - } - else - { - // printf("S7 record (end) found after %d valid data blocks\r\n", data_records); - //*start_address = (void *) SREC_ADDR24(vector); - } - break; - - default: - printf("unsupported record type (%d) found in line %d\r\n", vector[0], lineno); - printf("offending line: \r\n"); - printf("%s\r\n", line); - ret = FAIL; - break; - } - } - else - { - printf("illegal character ('%c') found on line %d: S-records corrupt?\r\n", line[0], lineno); - ret = FAIL; - break; - } - } - fclose(file); - } - else - { - printf("could not open file %s\r\n", filename); - ret = FILE_OPEN; - } - return ret; -} - -/* - * this callback just does nothing besides returning OK. Meant to do a dry run over the file to check its integrity - */ -static err_t simulate() -{ - err_t ret = OK; - - return ret; -} - - -/* - * this callback verifies the data against the S-record file contents after a write to destination - */ -static err_t verify(uint8_t *dst, uint8_t *src, uint32_t length) -{ - uint8_t *end = src + length; - - do - { - if (*src++ != *dst++) - return FAIL; - } while (src < end); - - return OK; -} - -void srec_execute(char *flasher_filename) -{ -} - diff --git a/pci/ehci-hcd.c b/pci/ehci-hcd.c deleted file mode 100644 index ca0780f..0000000 --- a/pci/ehci-hcd.c +++ /dev/null @@ -1,1181 +0,0 @@ -/* - * Copyright (c) 2007-2008, Juniper Networks, Inc. - * Copyright (c) 2008, Excito Elektronik i SkÃ¥ne AB - * Copyright (c) 2008, Michael Trimarchi - * - * All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include "util.h" /* for endian conversions */ -#include "bas_printf.h" /* for diagnostics */ -#include "wait.h" -#include "cache.h" -#include "usb.h" -#include "ehci.h" -#include "pci.h" - -#define DBG_EHCI -#ifdef DBG_EHCI -#define dbg(format, arg...) xprintf("DEBUG %s(): " format, __FUNCTION__, ## arg) -#else -#define dbg(format, arg...) do {} while (0) -#endif /* DBG_EHCI */ -#define err(format, arg...) xprintf("ERROR %s(): " format, __FUNCTION__, ## arg) -#define info(format, arg...) xprintf("INFO %s(): " format, __FUNCTION__, ## arg) - - -static char ehci_inited; -static int rootdev; - -static uint16_t portreset; -static uint16_t companion; - -struct descriptor -{ - struct usb_hub_descriptor hub; - struct usb_device_descriptor device; - struct usb_linux_config_descriptor config; - struct usb_linux_interface_descriptor interface; - struct usb_endpoint_descriptor endpoint; -} __attribute__ ((packed)); - -static struct descriptor rom_descriptor = -{ - { - 0x8, /* bDescLength */ - 0x29, /* bDescriptorType: hub descriptor */ - 2, /* bNrPorts -- runtime modified */ - 0, /* wHubCharacteristics */ - 0xff, /* bPwrOn2PwrGood */ - 0, /* bHubCntrCurrent */ - {}, /* Device removable */ - {} /* at most 7 ports! XXX */ - }, - { - 0x12, /* bLength */ - 1, /* bDescriptorType: UDESC_DEVICE */ - 0x0002, /* bcdUSB: v2.0 */ - 9, /* bDeviceClass: UDCLASS_HUB */ - 0, /* bDeviceSubClass: UDSUBCLASS_HUB */ - 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */ - 64, /* bMaxPacketSize: 64 bytes */ - 0x0000, /* idVendor */ - 0x0000, /* idProduct */ - 0x0001, /* bcdDevice */ - 1, /* iManufacturer */ - 2, /* iProduct */ - 0, /* iSerialNumber */ - 1 /* bNumConfigurations: 1 */ - }, - { - 0x9, - 2, /* bDescriptorType: UDESC_CONFIG */ - (0x19 << 8), /* cpu_to_le16(0x19), */ - 1, /* bNumInterface */ - 1, /* bConfigurationValue */ - 0, /* iConfiguration */ - 0x40, /* bmAttributes: UC_SELF_POWER */ - 0 /* bMaxPower */ - }, - { - 0x9, /* bLength */ - 4, /* bDescriptorType: UDESC_INTERFACE */ - 0, /* bInterfaceNumber */ - 0, /* bAlternateSetting */ - 1, /* bNumEndpoints */ - 9, /* bInterfaceClass: UICLASS_HUB */ - 0, /* bInterfaceSubClass: UISUBCLASS_HUB */ - 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */ - 0 /* iInterface */ - }, - { - 0x7, /* bLength */ - 5, /* bDescriptorType: UDESC_ENDPOINT */ - 0x81, /* bEndpointAddress: UE_DIR_IN | EHCI_INTR_ENDPT */ - 3, /* bmAttributes: UE_INTERRUPT */ - 8, 0, /* wMaxPacketSize */ - 255 /* bInterval */ - }, -}; - -struct pci_device_id ehci_usb_pci_table[] = -{ - { - PCI_VENDOR_ID_NEC, - PCI_DEVICE_ID_NEC_USB_2, - PCI_ANY_ID, - PCI_ANY_ID, - PCI_CLASS_SERIAL_USB_EHCI, - 0, - 0 - }, /* NEC PCI OHCI module ids */ - { - PCI_VENDOR_ID_NEC, - PCI_DEVICE_ID_NEC_USB_3, - PCI_ANY_ID, - PCI_ANY_ID, - PCI_CLASS_SERIAL_USB_EHCI, - 0, - 0 - }, - { - PCI_VENDOR_ID_PHILIPS, - PCI_DEVICE_ID_PHILIPS_ISP1561_2, - PCI_ANY_ID, - PCI_ANY_ID, - PCI_CLASS_SERIAL_USB_EHCI, - 0, - 0 - }, /* Philips 1561 PCI OHCI module ids */ - /* Please add supported PCI OHCI controller ids here */ - { - 0, - 0, - 0, - 0, - 0, - 0, - 0 - } -}; - -static struct ehci -{ - /* ------- common part -------- */ - long handle; /* PCI BIOS */ - const struct pci_device_id *ent; - int usbnum; - /* ---- end of common part ---- */ - int big_endian; /* PCI BIOS */ - struct ehci_hccr *hccr; /* R/O registers, not need for volatile */ - volatile struct ehci_hcor *hcor; - struct QH *qh_list_unaligned; - struct QH *qh_list; - struct QH *qh_unaligned; - struct QH *qh; - struct qTD *td_unaligned[3]; - struct qTD *td[3]; - struct descriptor *descriptor; - int irq; - uint32_t dma_offset; - const char *slot_name; -} gehci; - -static void cache_qtd(struct qTD *qtd, int flush) -{ - /* - * not needed - */ - //flush_and_invalidate_caches(); -} - -static inline struct QH *qh_addr(struct QH *qh) -{ - return (struct QH *)((uint32_t) qh & 0xffffffe0); -} - -static void cache_qh(struct QH *qh, int flush) -{ - struct qTD *qtd; - struct qTD *next; - static struct qTD *first_qtd; - - /* Walk the QH list and flush/invalidate all entries */ - while(1) - { - flush_and_invalidate_caches(); - if ((uint32_t) qh & QH_LINK_TYPE_QH) - break; - qh = qh_addr(qh); - qh = (struct QH *)(swpl(qh->qh_link) + gehci.dma_offset); - } - qh = qh_addr(qh); - - /* Save first qTD pointer, needed for invalidating pass on this QH */ - if (flush) - { - qtd = (struct qTD *)(swpl(*(uint32_t *)&qh->qh_overlay) & 0xffffffe0); - if (qtd != NULL) - qtd = (struct qTD *)(gehci.dma_offset + (uint32_t)qtd); - first_qtd = qtd; - } - else - qtd = first_qtd; - - /* Walk the qTD list and flush/invalidate all entries */ - while(1) - { - if (qtd == NULL) - break; - cache_qtd(qtd, flush); - next = (struct qTD *)((uint32_t)swpl(qtd->qt_next) & 0xffffffe0); - if (next != NULL) - next = (struct qTD *)(gehci.dma_offset + (uint32_t)next); - if (next == qtd) - break; - qtd = next; - } -} - -static inline void ehci_flush_dcache(struct QH *qh) -{ - cache_qh(qh, 1); -} - -static inline void ehci_invalidate_dcache(struct QH *qh) -{ - cache_qh(qh, 0); -} - -static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec) -{ - uint32_t result; - - do - { - result = ehci_readl(ptr); - if (result == ~ (uint32_t) 0) - { - return -1; - } - result &= mask; - if (result == done) - { - return 0; - } - wait(1); - usec--; - } while (usec > 0); - - return -1; -} - -static void ehci_free(void *p, size_t sz) -{ -} - -static int ehci_reset(void) -{ - uint32_t cmd; - int ret = 0; - - if ((gehci.ent->vendor == PCI_VENDOR_ID_NEC) && (gehci.ent->device == PCI_DEVICE_ID_NEC_USB_2)) - { - dbg("ehci_reset set 48MHz clock\r\n"); - pci_write_config_longword(gehci.handle, 0xE4, 0x20); // oscillator - wait(5); - } - - cmd = ehci_readl(&gehci.hcor->or_usbcmd); - dbg("%s cmd: 0x%08x\r\n", __FUNCTION__, cmd); - - cmd |= CMD_RESET; - ehci_writel(&gehci.hcor->or_usbcmd, cmd); - ret = handshake((uint32_t *) &gehci.hcor->or_usbcmd, CMD_RESET, 0, 250); - if (ret < 0) - { - err("*** EHCI fail to reset! ***\r\n"); - goto out; - } - -out: - return ret; -} - -static void *ehci_alloc(size_t sz, size_t align) -{ - static int ntds; - void *p; - switch(sz) - { - case sizeof(struct QH): - p = gehci.qh; - ntds = 0; - break; - - case sizeof(struct qTD): - if (ntds == 3) - { - dbg("out of TDs\r\n"); - return NULL; - } - p = gehci.td[ntds]; - ntds++; - break; - - default: - dbg("unknown allocation size\r\n"); - return NULL; - } - memset(p, sz, 0); - return p; -} - -static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz) -{ - uint32_t addr; - uint32_t delta; - uint32_t next; - int idx; - - addr = (uint32_t)buf; - idx = 0; - - while (idx < 5) - { - td->qt_buffer[idx] = swpl(addr - gehci.dma_offset); - next = (addr + 4096) & ~4095; - delta = next - addr; - if (delta >= sz) - break; - sz -= delta; - addr = next; - idx++; - } - - if (idx == 5) - { - dbg("out of buffer pointers (%u bytes left)\r\n", sz); - return -1; - } - return 0; -} - -static int ehci_submit_async(struct usb_device *dev, uint32_t pipe, void *buffer, int length, struct devrequest *req) -{ - struct QH *qh; - struct qTD *td; - volatile struct qTD *vtd; - uint32_t ts; - uint32_t *tdp; - uint32_t endpt; - uint32_t token; - uint32_t usbsts; - uint32_t c; - uint32_t toggle; - uint32_t cmd; - int ret = 0; - - dbg("%s: dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\r\n", __FUNCTION__, dev, pipe, buffer, length, req); - -#ifdef DBG_EHCI - if (req != NULL) - dbg("ehci_submit_async req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\r\n", - req->request, req->request, - req->requesttype, req->requesttype, - swpw(req->value), swpw(req->value), swpw(req->index)); -#endif /* DBG_EHCI */ - - qh = ehci_alloc(sizeof(struct QH), 32); - if (qh == NULL) - { - dbg("unable to allocate QH\r\n"); - return -1; - } - qh->qh_link = swpl(((uint32_t) gehci.qh_list - gehci.dma_offset) | QH_LINK_TYPE_QH); - - c = (usb_pipespeed(pipe) != USB_SPEED_HIGH && usb_pipeendpoint(pipe) == 0) ? 1 : 0; - endpt = (8 << 28) | - (c << 27) | - (usb_maxpacket(dev, pipe) << 16) | - (0 << 15) | - (1 << 14) | - (usb_pipespeed(pipe) << 12) | - (usb_pipeendpoint(pipe) << 8) | - (0 << 7) | - (usb_pipedevice(pipe) << 0); - qh->qh_endpt1 = swpl(endpt); - endpt = (1 << 30) | - (dev->portnr << 23) | - (dev->parent->devnum << 16) | - (0 << 8) | - (0 << 0); - qh->qh_endpt2 = swpl(endpt); - qh->qh_overlay.qt_next = swpl(QT_NEXT_TERMINATE); - qh->qh_overlay.qt_altnext = swpl(QT_NEXT_TERMINATE); - td = NULL; - tdp = &qh->qh_overlay.qt_next; - toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)); - - if (req != NULL) - { - td = ehci_alloc(sizeof(struct qTD), 32); - if (td == NULL) - { - dbg("unable to allocate SETUP td\r\n"); - goto fail; - } - td->qt_next = swpl(QT_NEXT_TERMINATE); - td->qt_altnext = swpl(QT_NEXT_TERMINATE); - token = (0 << 31) | (sizeof(*req) << 16) | (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0); - td->qt_token = swpl(token); - if (ehci_td_buffer(td, req, sizeof(*req)) != 0) - { - dbg("unable construct SETUP td\r\n"); - ehci_free(td, sizeof(*td)); - goto fail; - } - *tdp = swpl((uint32_t)td - gehci.dma_offset); - tdp = &td->qt_next; - toggle = 1; - } - - if (length > 0 || req == NULL) - { - td = ehci_alloc(sizeof(struct qTD), 32); - if (td == NULL) - { - dbg("unable to allocate DATA td\r\n"); - goto fail; - } - td->qt_next = swpl(QT_NEXT_TERMINATE); - td->qt_altnext = swpl(QT_NEXT_TERMINATE); - token = (toggle << 31) | (length << 16) | ((req == NULL ? 1 : 0) << 15) | (0 << 12) | (3 << 10) | ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0); - td->qt_token = swpl(token); - if (ehci_td_buffer(td, buffer, length) != 0) - { - dbg("unable construct DATA td\r\n"); - ehci_free(td, sizeof(*td)); - goto fail; - } - *tdp = swpl((uint32_t)td - gehci.dma_offset); - tdp = &td->qt_next; - } - - if (req != NULL) - { - td = ehci_alloc(sizeof(struct qTD), 32); - if (td == NULL) - { - dbg("unable to allocate ACK td\r\n"); - goto fail; - } - td->qt_next = swpl(QT_NEXT_TERMINATE); - td->qt_altnext = swpl(QT_NEXT_TERMINATE); - token = (toggle << 31) | (0 << 16) | (1 << 15) | (0 << 12) | (3 << 10) | ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0); - td->qt_token = swpl(token); - *tdp = swpl((uint32_t)td - gehci.dma_offset); - tdp = &td->qt_next; - } - - gehci.qh_list->qh_link = swpl(((uint32_t)qh - gehci.dma_offset) | QH_LINK_TYPE_QH); - - /* Flush dcache */ - ehci_flush_dcache(gehci.qh_list); - usbsts = ehci_readl(&gehci.hcor->or_usbsts); - ehci_writel(&gehci.hcor->or_usbsts, (usbsts & 0x3f)); - - /* Enable async. schedule. */ - cmd = ehci_readl(&gehci.hcor->or_usbcmd); - cmd |= CMD_ASE; - ehci_writel(&gehci.hcor->or_usbcmd, cmd); - - ret = handshake((uint32_t *) &gehci.hcor->or_usbsts, STD_ASS, STD_ASS, 100 * 1000); - if (ret < 0) - { - err("EHCI fail timeout STD_ASS set (usbsts=%#x)", ehci_readl(&gehci.hcor->or_usbsts)); - goto fail; - } - - /* Wait for TDs to be processed. */ - ts = 0; - vtd = td; - do - { - /* Invalidate dcache */ - ehci_invalidate_dcache(gehci.qh_list); - token = swpl(vtd->qt_token); - if (!(token & 0x80)) - { - break; - } - wait(1 * 1000); - ts++; - } while (ts < 1000); - - /* Disable async schedule. */ - cmd = ehci_readl(&gehci.hcor->or_usbcmd); - cmd &= ~CMD_ASE; - ehci_writel(&gehci.hcor->or_usbcmd, cmd); - ret = handshake((uint32_t *) &gehci.hcor->or_usbsts, STD_ASS, 0, 100 * 1000); - if (ret < 0) - { - err("EHCI fail timeout STD_ASS reset (usbsts=%#x)", ehci_readl(&gehci.hcor->or_usbsts)); - goto fail; - } - gehci.qh_list->qh_link = swpl(((uint32_t)gehci.qh_list - gehci.dma_offset) | QH_LINK_TYPE_QH); - - token = swpl(qh->qh_overlay.qt_token); - if (!(token & 0x80)) - { - dbg("TOKEN=%#x\r\n", token); - switch(token & 0xfc) - { - case 0: - toggle = token >> 31; - usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle); - dev->status = 0; - break; - - case 0x40: - dev->status = USB_ST_STALLED; - break; - - case 0xa0: - case 0x20: - dev->status = USB_ST_BUF_ERR; - break; - - case 0x50: - case 0x10: - dev->status = USB_ST_BABBLE_DET; - break; - - default: - dev->status = USB_ST_CRC_ERR; - break; - } - dev->act_len = length - ((token >> 16) & 0x7fff); - } - else - { - dev->act_len = 0; - dbg("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\r\n", - dev->devnum, ehci_readl(&gehci.hcor->or_usbsts), - ehci_readl(&gehci.hcor->or_portsc[0]), ehci_readl(&gehci.hcor->or_portsc[1])); - } - return (dev->status != USB_ST_NOT_PROC) ? 0 : -1; -fail: - td = (void *) swpl(qh->qh_overlay.qt_next); - if (td != (void *)QT_NEXT_TERMINATE) - td = (struct qTD *)(gehci.dma_offset + (uint32_t)td); - while(td != (void *)QT_NEXT_TERMINATE) - { - qh->qh_overlay.qt_next = td->qt_next; - ehci_free(td, sizeof(*td)); - td = (void *)swpl(qh->qh_overlay.qt_next); - if (td != (void *)QT_NEXT_TERMINATE) - td = (struct qTD *)(gehci.dma_offset + (uint32_t)td); - } - ehci_free(qh, sizeof(*qh)); - if (ehci_readl(&gehci.hcor->or_usbsts) & STS_HSE) /* Host System Error */ - { - unsigned short status = pci_read_config_word(gehci.handle, PCISR); - err("EHCI Host System Error, controller usb-%s disabled\r\n(SR:0x%04X%s%s%s%s%s%s)", - gehci.slot_name, status & 0xFFFF, status & 0x8000 ? ", Parity error" : "", - status & 0x4000 ? ", Signaled system error" : "", - status & 0x2000 ? ", Received master abort" : "", - status & 0x1000 ? ", Received target abort" : "", - status & 0x800 ? ", Signaled target abort" : "", - status & 0x100 ? ", Data parity error" : ""); - } - return -1; -} - -static inline int min3(int a, int b, int c) -{ - if (b < a) - a = b; - if (c < a) - a = c; - return a; -} - -static int ehci_submit_root(struct usb_device *dev, uint32_t pipe, void *buffer, int length, struct devrequest *req) -{ - uint8_t tmpbuf[4]; - u16 typeReq; - void *srcptr = NULL; - int len, srclen; - uint32_t reg; - uint32_t *status_reg; - - if (swpw(req->index) > CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) - { - err("the requested port(%d) is not configured\r\n", swpw(req->index) - 1); - return -1; - } - - status_reg = (uint32_t *) &gehci.hcor->or_portsc[swpw(req->index) - 1]; - srclen = 0; - dbg("ehci_submit_root req=%u (%#x), type=%u (%#x), value=%u, index=%u\r\n", - req->request, req->request, req->requesttype, req->requesttype, swpw(req->value), swpw(req->index)); - typeReq = req->request | req->requesttype << 8; - - switch(typeReq) - { - case DeviceRequest | USB_REQ_GET_DESCRIPTOR: - switch(swpw(req->value) >> 8) - { - case USB_DT_DEVICE: - dbg("USB_DT_DEVICE request\r\n"); - srcptr = &gehci.descriptor->device; - srclen = 0x12; - break; - - case USB_DT_CONFIG: - dbg("USB_DT_CONFIG config\r\n"); - srcptr = &gehci.descriptor->config; - srclen = 0x19; - break; - - case USB_DT_STRING: - dbg("USB_DT_STRING config\r\n"); - switch(swpw(req->value) & 0xff) - { - case 0: /* Language */ - srcptr = "\4\3\1\0"; - srclen = 4; - break; - - case 1: /* Vendor */ - srcptr = "\2\3"; - srclen = 2; - break; - - case 2: /* Product */ - srcptr = "\34\3E\0H\0C\0I\0 \0R\0o\0o\0t\0 \0H\0u\0b\0"; - srclen = 28; - break; - - default: - dbg("unknown value DT_STRING %x\r\n", - swpw(req->value)); - goto unknown; - } - break; - default: - dbg("unknown value %x\r\n", swpw(req->value)); - goto unknown; - } - break; - - case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8): - switch(swpw(req->value) >> 8) - { - case USB_DT_HUB: - dbg("USB_DT_HUB config\r\n"); - srcptr = &gehci.descriptor->hub; - srclen = 0x8; - break; - - default: - dbg("unknown value %x\r\n", swpw(req->value)); - goto unknown; - } - break; - - case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8): - dbg("USB_REQ_SET_ADDRESS\r\n"); - rootdev = swpw(req->value); - break; - - case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: - dbg("USB_REQ_SET_CONFIGURATION\r\n"); - /* Nothing to do */ - break; - - case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8): - tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */ - tmpbuf[1] = 0; - srcptr = tmpbuf; - srclen = 2; - break; - - case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8): - memset(tmpbuf, 0, 4); - reg = ehci_readl(status_reg); - - if ((reg & EHCI_PS_PR) && (portreset & (1 << swpw(req->index)))) - { - int ret; - /* force reset to complete */ - reg = reg & ~(EHCI_PS_PR | EHCI_PS_CLEAR); - ehci_writel(status_reg, reg); - ret = handshake(status_reg, EHCI_PS_PR, 0, 2 * 1000); - if (!ret) - { - tmpbuf[0] |= USB_PORT_STAT_RESET; - reg = ehci_readl(status_reg); - } - else - err("port(%d) reset error", swpw(req->index) - 1); - } - - if (reg & EHCI_PS_CS) - tmpbuf[0] |= USB_PORT_STAT_CONNECTION; - if (reg & EHCI_PS_PE) - tmpbuf[0] |= USB_PORT_STAT_ENABLE; - if (reg & EHCI_PS_SUSP) - tmpbuf[0] |= USB_PORT_STAT_SUSPEND; - if (reg & EHCI_PS_OCA) - tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT; - if (reg & EHCI_PS_PP) - tmpbuf[1] |= USB_PORT_STAT_POWER >> 8; - - tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8; - - if (reg & EHCI_PS_CSC) - tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION; - if (reg & EHCI_PS_PEC) - tmpbuf[2] |= USB_PORT_STAT_C_ENABLE; - if (reg & EHCI_PS_OCC) - tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT; - if (portreset & (1 << swpw(req->index))) - tmpbuf[2] |= USB_PORT_STAT_C_RESET; - - srcptr = tmpbuf; - srclen = 4; - break; - - case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): - reg = ehci_readl(status_reg); - reg &= ~EHCI_PS_CLEAR; - switch(swpw(req->value)) - { - case USB_PORT_FEAT_ENABLE: - reg |= EHCI_PS_PE; - ehci_writel(status_reg, reg); - break; - - case USB_PORT_FEAT_POWER: - if (HCS_PPC(ehci_readl(&gehci.hccr->cr_hcsparams))) - { - reg |= EHCI_PS_PP; - ehci_writel(status_reg, reg); - } - break; - - case USB_PORT_FEAT_RESET: - if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS && EHCI_PS_IS_LOWSPEED(reg)) - { - /* Low speed device, give up ownership. */ - dbg("port %d low speed --> companion\r\n", swpw(req->index)); - reg |= EHCI_PS_PO; - ehci_writel(status_reg, reg); - companion |= (1 << swpw(req->index)); - break; - } - else - { - reg |= EHCI_PS_PR; - reg &= ~EHCI_PS_PE; - ehci_writel(status_reg, reg); - /* - * caller must wait, then call GetPortStatus - * usb 2.0 specification say 50 ms resets on root - */ - wait(50 * 1000); - portreset |= (1 << swpw(req->index)); - } - break; - - default: - dbg("unknown feature %x\r\n", swpw(req->value)); - goto unknown; - } - /* unblock posted writes */ - (void) ehci_readl(&gehci.hcor->or_usbcmd); - break; - - case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): - reg = ehci_readl(status_reg); - switch(swpw(req->value)) - { - case USB_PORT_FEAT_ENABLE: - reg &= ~EHCI_PS_PE; - break; - - case USB_PORT_FEAT_C_ENABLE: - reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE; - break; - - case USB_PORT_FEAT_POWER: - if (HCS_PPC(ehci_readl(&gehci.hccr->cr_hcsparams))) - reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP); - case USB_PORT_FEAT_C_CONNECTION: - reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC; - break; - - case USB_PORT_FEAT_OVER_CURRENT: - reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC; - break; - - case USB_PORT_FEAT_C_RESET: - portreset &= ~(1 << swpw(req->index)); - break; - - default: - dbg("unknown feature %x\r\n", swpw(req->value)); - goto unknown; - } - ehci_writel(status_reg, reg); - /* unblock posted write */ - (void) ehci_readl(&gehci.hcor->or_usbcmd); - break; - - default: - dbg("Unknown request\r\n"); - goto unknown; - } - wait(1 * 1000); - len = min3(srclen, swpw(req->length), length); - if (srcptr != NULL && len > 0) - memcpy(buffer, srcptr, len); - else - dbg("Len is 0\r\n"); - dev->act_len = len; - dev->status = 0; - return 0; -unknown: - dbg("Unknown: requesttype=%x, request=%x, value=%x, index=%x, length=%x\r\n", - req->requesttype, req->request, swpw(req->value), swpw(req->index), swpw(req->length)); - dev->act_len = 0; - dev->status = USB_ST_STALLED; - return -1; -} - -/* an interrupt happens */ -static int hc_interrupt(struct ehci *ehci) -{ - uint32_t status = ehci_readl(&ehci->hcor->or_usbsts); - - dbg("\r\n"); - - if (status & STS_PCD) /* port change detect */ - { - uint32_t reg = ehci_readl(&ehci->hccr->cr_hcsparams); - uint32_t i = HCS_N_PORTS(reg); - - while(i) - { - uint32_t pstatus = ehci_readl(&ehci->hcor->or_portsc[i-1]); - if (pstatus & EHCI_PS_PO) - { - i--; - continue; - } - - if (companion & (1 << i)) - { - /* Low speed device, give up ownership. */ - pstatus |= EHCI_PS_PO; - ehci_writel(&ehci->hcor->or_portsc[i - 1], pstatus); - } - i--; - } - } - ehci_writel(&ehci->hcor->or_usbsts, status); - - return 1; /* interrupt was from this card */ -} - -void ehci_usb_enable_interrupt(int enable) -{ - if (enable); -} - -static int handle_usb_interrupt(struct ehci *ehci) -{ - return hc_interrupt(ehci); -} - -static void hc_free_buffers(struct ehci *ehci) -{ - int i; - - if (ehci->descriptor != NULL) - { - driver_mem_free(ehci->descriptor); - ehci->descriptor = NULL; - } - - for (i = 0; i < 3; i++) - { - if (ehci->td_unaligned[i] != NULL) - { - driver_mem_free(ehci->td_unaligned[i]); - ehci->td_unaligned[i] = NULL; - } - } - - if (ehci->qh_unaligned != NULL) - { - driver_mem_free(ehci->qh_unaligned); - ehci->qh_unaligned = NULL; - } - - if (ehci->qh_list_unaligned != NULL) - { - driver_mem_free(ehci->qh_list_unaligned); - ehci->qh_list_unaligned = NULL; - } -} - -int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **priv) -{ - int i; - uint32_t reg; - uint32_t cmd; - uint32_t usb_base_addr = 0xFFFFFFFF; - struct pci_rd *pci_rsc_desc; - - pci_rsc_desc = pci_get_resource(handle); /* USB EHCI */ - if (handle && (ent != NULL)) - { - memset(&gehci, 0, sizeof(struct ehci)); - gehci.handle = handle; - gehci.ent = ent; - } - else if (!gehci.handle) /* for restart USB cmd */ - { - dbg("!gehci.handle\r\n"); - return -1; - } - - gehci.qh_list_unaligned = (struct QH *) driver_mem_alloc(sizeof(struct QH) + 32); - if (gehci.qh_list_unaligned == NULL) - { - dbg("QHs malloc failed\r\n"); - hc_free_buffers(&gehci); - return -1; - } - - gehci.qh_list = (struct QH *)(((uint32_t)gehci.qh_list_unaligned + 31) & ~31); - memset(gehci.qh_list, 0, sizeof(struct QH)); - gehci.qh_unaligned = (struct QH *)driver_mem_alloc(sizeof(struct QH) + 32); - - if (gehci.qh_unaligned == NULL) - { - dbg("QHs malloc failed\r\n"); - hc_free_buffers(&gehci); - - return -1; - } - gehci.qh = (struct QH *)(((uint32_t) gehci.qh_unaligned + 31) & ~31); - memset(gehci.qh, 0, sizeof(struct QH)); - - for (i = 0; i < 3; i++) - { - gehci.td_unaligned[i] = (struct qTD *) driver_mem_alloc(sizeof(struct qTD) + 32); - if (gehci.td_unaligned[i] == NULL) - { - dbg("TDs malloc failed\r\n"); - hc_free_buffers(&gehci); - - return -1; - } - gehci.td[i] = (struct qTD *)(((uint32_t) gehci.td_unaligned[i] + 31) & ~31); - memset(gehci.td[i], 0, sizeof(struct qTD)); - } - - gehci.descriptor = (struct descriptor *) driver_mem_alloc(sizeof(struct descriptor)); - if (gehci.descriptor == NULL) - { - dbg("decriptor malloc failed\r\n"); - hc_free_buffers(&gehci); - - return -1; - } - memcpy(gehci.descriptor, &rom_descriptor, sizeof(struct descriptor)); - - if ((long) pci_rsc_desc >= 0) - { - unsigned short flags; - do - { - dbg("PCI USB descriptors (at %p): flags 0x%04x start 0x%08lx \r\n offset 0x%08lx dmaoffset 0x%08lx length 0x%08lx\r\n", pci_rsc_desc, - pci_rsc_desc->flags, pci_rsc_desc->start, pci_rsc_desc->offset, pci_rsc_desc->dmaoffset, pci_rsc_desc->length); - if (!(pci_rsc_desc->flags & FLG_IO)) - { - if (usb_base_addr == 0xFFFFFFFF) - { - usb_base_addr = pci_rsc_desc->start; - gehci.hccr = (struct ehci_hccr *) (pci_rsc_desc->offset + pci_rsc_desc->start); - gehci.dma_offset = pci_rsc_desc->dmaoffset; - if ((pci_rsc_desc->flags & FLG_ENDMASK) == ORD_MOTOROLA) - gehci.big_endian = 0; /* host bridge make swapping intel -> motorola */ - else - gehci.big_endian = 1; /* driver must swapping intel -> motorola */ - } - } - flags = pci_rsc_desc->flags; - pci_rsc_desc = (struct pci_rd *)((uint32_t) pci_rsc_desc->next + (uint32_t) pci_rsc_desc); - } - while (!(flags & FLG_LAST)); - } - else - { - hc_free_buffers(&gehci); - dbg("pci_get_resource() error\r\n"); - - return -1; - } - - if (usb_base_addr == 0xFFFFFFFF) - { - hc_free_buffers(&gehci); - return(-1); - } - - if (handle && (ent != NULL)) - { - switch(ent->vendor) - { - case PCI_VENDOR_ID_NEC: gehci.slot_name = "uPD720101"; break; - case PCI_VENDOR_ID_PHILIPS: gehci.slot_name = "isp1561"; break; - default: gehci.slot_name = "generic"; break; - } - } - gehci.hcor = (struct ehci_hcor *)((uint32_t) gehci.hccr + HC_LENGTH(ehci_readl(&gehci.hccr->cr_capbase))); - xprintf("EHCI usb-%s, regs address 0x%08X, PCI handle 0x%X\r\n", gehci.slot_name, gehci.hccr, handle); - - /* EHCI spec section 4.1 */ - if (ehci_reset() != 0) - { - hc_free_buffers(&gehci); - - dbg("ehci_reset() failed\r\n"); - - return -1; - } - - /* Set head of reclaim list */ - gehci.qh_list->qh_link = swpl(((uint32_t) gehci.qh_list - gehci.dma_offset) | QH_LINK_TYPE_QH); - gehci.qh_list->qh_endpt1 = swpl((1 << 15) | (USB_SPEED_HIGH << 12)); - gehci.qh_list->qh_curtd = swpl(QT_NEXT_TERMINATE); - gehci.qh_list->qh_overlay.qt_next = swpl(QT_NEXT_TERMINATE); - gehci.qh_list->qh_overlay.qt_altnext = swpl(QT_NEXT_TERMINATE); - gehci.qh_list->qh_overlay.qt_token = swpl(0x40); - - /* Set async. queue head pointer. */ - ehci_writel(&gehci.hcor->or_asynclistaddr, (uint32_t) gehci.qh_list - gehci.dma_offset); - reg = ehci_readl(&gehci.hccr->cr_hcsparams); - gehci.descriptor->hub.bNbrPorts = HCS_N_PORTS(reg); - info("Register %x NbrPorts %d\r\n", reg, gehci.descriptor->hub.bNbrPorts); - - /* Port Indicators */ - if (HCS_INDICATOR(reg)) - { - gehci.descriptor->hub.wHubCharacteristics |= 0x80; - } - - /* Port Power Control */ - if (HCS_PPC(reg)) - { - gehci.descriptor->hub.wHubCharacteristics |= 0x01; - } - - /* Start the host controller. */ - cmd = ehci_readl(&gehci.hcor->or_usbcmd); - - /* - * Philips, Intel, and maybe others need CMD_RUN before the - * root hub will detect new devices (why?); NEC doesn't - */ - cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); - cmd |= CMD_RUN; - ehci_writel(&gehci.hcor->or_usbcmd, cmd); - - /* take control over the ports */ - ehci_writel(&gehci.hcor->or_configflag, FLAG_CF); - - /* unblock posted write */ - cmd = ehci_readl(&gehci.hcor->or_usbcmd); - wait(5 * 1000); - - reg = HC_VERSION(ehci_readl(&gehci.hccr->cr_capbase)); - info("USB EHCI host controller version %x.%02x\r\n", reg >> 8, reg & 0xff); - - /* turn on interrupts */ - pci_hook_interrupt(handle, handle_usb_interrupt, &gehci); - ehci_writel(&gehci.hcor->or_usbintr, INTR_PCDE); - - rootdev = 0; - if (priv != NULL) - { - *priv = (void *) &gehci; - } - ehci_inited = 1; - - return 0; -} - -int ehci_usb_lowlevel_stop(void *priv) -{ - uint32_t cmd; - - if (priv); - if (!ehci_inited) - return(0); - - /* turn off interrupts */ - ehci_writel(&gehci.hcor->or_usbintr, 0); - pci_unhook_interrupt(gehci.handle); - - /* stop the controller */ - cmd = ehci_readl(&gehci.hcor->or_usbcmd); - cmd &= ~CMD_RUN; - ehci_writel(&gehci.hcor->or_usbcmd, cmd); - - /* turn off all ports => todo */ - /* use the companions */ - ehci_writel(&gehci.hcor->or_configflag, 0); - - /* unblock posted write */ - cmd = ehci_readl(&gehci.hcor->or_usbcmd); - ehci_reset(); - hc_free_buffers(&gehci); - ehci_inited = 0; - return(0); -} - -int ehci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int length) -{ - if (usb_pipetype(pipe) != PIPE_BULK) - { - dbg("non-bulk pipe (type=%lu)", usb_pipetype(pipe)); - return -1; - } - return ehci_submit_async(dev, pipe, buffer, length, NULL); -} - -int ehci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int length, struct devrequest *setup) -{ - if (usb_pipetype(pipe) != PIPE_CONTROL) - { - dbg("non-control pipe (type=%lu)", usb_pipetype(pipe)); - return -1; - } - - if (usb_pipedevice(pipe) == rootdev) - { - if (rootdev == 0) - dev->speed = USB_SPEED_HIGH; - return ehci_submit_root(dev, pipe, buffer, length, setup); - } - return ehci_submit_async(dev, pipe, buffer, length, setup); -} - -int ehci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int length, int interval) -{ - dbg("submit_int_msg dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d", dev, pipe, buffer, length, interval); - return -1; -} - diff --git a/pci/ohci-hcd.c b/pci/ohci-hcd.c deleted file mode 100644 index 6805ac0..0000000 --- a/pci/ohci-hcd.c +++ /dev/null @@ -1,2387 +0,0 @@ -/* - * URB OHCI HCD (Host Controller Driver) for USB and PCI bus. - * - * Interrupt support is added. Now, it has been tested - * on ULI1575.cpu and works well with USB keyboard. - * - * (C) Copyright 2007 - * Zhang Wei, Freescale Semiconductor, Inc. - * - * (C) Copyright 2003 - * Gary Jennejohn, DENX Software Engineering - * - * Note: Much of this code has been derived from Linux 2.4 - * (C) Copyright 1999 Roman Weissgaerber - * (C) Copyright 2000-2002 David Brownell - * - * Modified for the MP2USB by (C) Copyright 2005 Eric Benard - * ebenard@eukrea.com - based on s3c24x0's driver - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ -/* - * IMPORTANT NOTE - * this driver is intended for use with USB Mass Storage Devices - * (BBB) and USB keyboard. There is NO support for Isochronous pipes! - */ - - -#include "wait.h" /* for wait_ms routines */ -#include "bas_printf.h" -#include "bas_string.h" /* for memset() */ -#include "pci.h" -#include "interrupts.h" - -#undef OHCI_USE_NPS /* force NoPowerSwitching mode */ - -#undef OHCI_VERBOSE_DEBUG /* not always helpful */ -#undef OHCI_FILL_TRACE - -#define DEBUG_OHCI -#ifdef DEBUG_OHCI -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DEBUG_OHCI */ -#define err(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) - -#include "usb.h" -#include "ohci.h" -#include "util.h" /* for endian conversions */ - -/* For initializing controller (mask in an HCFS mode too) */ -#define OHCI_CONTROL_INIT (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE - -/* - * e.g. PCI controllers need this - */ - -#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS -#ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS - -/* - * do a longword read from addr and byteswap the result - */ -inline uint32_t readl(volatile uint32_t *addr) -{ - uint32_t res; - - res = swpl(*addr); - //chip_errata_135(); - //dbg("reading from 0x%08x = 0x%08x\r\n", addr, res); - return res; -} - -/* - * byteswap value and write it to address - */ -inline void writel(uint32_t value, uint32_t *address) -{ - // dbg("writing %08x to %08x\r\n", value, address); - * (volatile uint32_t *) address = swpl(value); -} -#else -/* -#define readl(a) (*((volatile uint32_t *)(a))) -#define writel(a, b) (*((volatile uint32_t *)(b)) = ((volatile uint32_t)a)) -*/ -#error CONFIG_SYS_OHCI_SWAP_REG_ACESS must be defined -#endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */ - -#define min_t(type, x, y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; }) - -struct pci_device_id ohci_usb_pci_table[] = -{ - { - PCI_VENDOR_ID_AL, - PCI_DEVICE_ID_AL_M5237, - PCI_ANY_ID, - PCI_ANY_ID, - PCI_CLASS_SERIAL_USB_OHCI, - 0, - 0 - }, /* ULI1575 PCI OHCI module ids */ - { - PCI_VENDOR_ID_NEC, - PCI_DEVICE_ID_NEC_USB, - PCI_ANY_ID, - PCI_ANY_ID, - PCI_CLASS_SERIAL_USB_OHCI, - 0, - 0 - }, /* NEC PCI OHCI module ids */ - { - PCI_VENDOR_ID_NEC, - PCI_DEVICE_ID_NEC_USB_A, - PCI_ANY_ID, - PCI_ANY_ID, - PCI_CLASS_SERIAL_USB_OHCI, - 0, - 0 - }, /* NEC PCI OHCI module ids */ - { - PCI_VENDOR_ID_PHILIPS, - PCI_DEVICE_ID_PHILIPS_ISP1561, - PCI_ANY_ID, - PCI_ANY_ID, - PCI_CLASS_SERIAL_USB_OHCI, - 0, - 0 - }, /* Philips 1561 PCI OHCI module ids */ - /* Please add supported PCI OHCI controller ids here */ - { - 0, - 0, - 0, - 0, - 0, - 0, - 0 - } -}; - -/* global ohci_t */ -static ohci_t gohci[10]; -int ohci_inited; - -static inline uint32_t roothub_a(ohci_t *ohci) { return readl(&ohci->regs->roothub.a); } -static inline uint32_t roothub_b(ohci_t *ohci) { return readl(&ohci->regs->roothub.b); } -static inline uint32_t roothub_status(ohci_t *ohci) { return readl(&ohci->regs->roothub.status); } -static inline uint32_t roothub_portstatus(ohci_t *ohci, int i) { return readl(&ohci->regs->roothub.portstatus[i]); } - -/* forward declaration */ -static int hc_interrupt(ohci_t *ohci); -static void td_submit_job(ohci_t *ohci, struct usb_device *dev, uint32_t pipe, - void *buffer, int transfer_len, struct devrequest *setup, - urb_priv_t *urb, int interval); - - -static struct td *ptd; - -/* TDs ... */ -static struct td *td_alloc(struct usb_device *usb_dev) -{ - int i; - struct td *td; - - td = NULL; - - for (i = 0; i < NUM_TD; i++) - { - if (ptd[i].usb_dev == NULL) - { - td = &ptd[i]; - td->usb_dev = usb_dev; - break; - } - } - return td; -} - -/*-------------------------------------------------------------------------* - * URB support functions - *-------------------------------------------------------------------------*/ - -/* free HCD-private data associated with this URB */ - -static void urb_free_priv(urb_priv_t *urb) -{ - int i; - struct td *td; - int last = urb->length - 1; - - if (last >= 0) - { - for (i = 0; i <= last; i++) - { - td = urb->td[i]; - if (td) - { - td->usb_dev = NULL; - urb->td[i] = NULL; - } - } - } - /* FIXME: driver_mem_free(urb); */ -} - -/*-------------------------------------------------------------------------*/ - -#ifdef DEBUG_OHCI -static int sohci_get_current_frame_number(ohci_t *ohci, struct usb_device *dev); - -/* debug| print the main components of an URB - * small: 0) header + data packets 1) just header */ - -static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev, - uint32_t pipe, void *buffer, int transfer_len, - struct devrequest *setup, char *str, int small) -{ - dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx\r\n", - str, - sohci_get_current_frame_number(ohci, dev), - usb_pipedevice(pipe), - usb_pipeendpoint(pipe), - usb_pipeout(pipe)? 'O': 'I', - usb_pipetype(pipe) < 2 ? \ - (usb_pipeint(pipe)? "INTR": "ISOC"): \ - (usb_pipecontrol(pipe)? "CTRL": "BULK"), - (purb ? purb->actual_length : 0), - transfer_len, dev->status); -#ifdef OHCI_VERBOSE_DEBUG - if (!small) - { - int i; - int len; - - if (usb_pipecontrol(pipe)) - { - dbg(__FILE__ ": cmd(8):"); - for (i = 0; i < 8 ; i++) - dbg(" %02x", ((uint8_t *)setup)[i]); - dbg("\r\n"); - } - - if (transfer_len > 0 && buffer) - { - dbg(__FILE__ ": data(%d/%d):", (purb ? purb->actual_length : 0), transfer_len); - len = usb_pipeout(pipe)? transfer_len : (purb ? purb->actual_length : 0); - - for (i = 0; i < 16 && i < len; i++) - dbg(" %02x", ((uint8_t *)buffer)[i]); - dbg("%s\r\n", i < len? "...": ""); - } - } -#endif -} - -/* - * just for debugging; prints non-empty branches of the int ed tree - * inclusive iso eds - */ -static void ep_print_int_eds(ohci_t *ohci, char *str) -{ - int i, j; - uint32_t *ed_p; - - for (i = 0; i < 32; i++) - { - j = 5; - ed_p = &(ohci->hcca->int_table[i]); - if (*ed_p == 0) - continue; - - dbg("%s branch int %2d(%2x):\r\n", str, i, i); - while (*ed_p != 0 && j--) - { - ed_t *ed = (ed_t *) swpl((uint32_t) ed_p); - dbg(" ed: %4x;", ed->hwINFO); - ed_p = &ed->hwNextED; - } - dbg("\r\n"); - } -} - -static void ohci_dump_intr_mask(char *label, uint32_t mask) -{ - dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s\r\n", - label, - mask, - (mask & OHCI_INTR_MIE) ? " MIE" : "", - (mask & OHCI_INTR_OC) ? " OC" : "", - (mask & OHCI_INTR_RHSC) ? " RHSC" : "", - (mask & OHCI_INTR_FNO) ? " FNO" : "", - (mask & OHCI_INTR_UE) ? " UE" : "", - (mask & OHCI_INTR_RD) ? " RD" : "", - (mask & OHCI_INTR_SF) ? " SF" : "", - (mask & OHCI_INTR_WDH) ? " WDH" : "", - (mask & OHCI_INTR_SO) ? " SO" : "" - ); -} - -static void maybe_print_eds(ohci_t *controller, char *label, uint32_t value) -{ - ed_t *edp; - - value += controller->dma_offset; - edp = (ed_t *) value; - (void) edp; - - if (value && (value < 0xDFFFF0)) /* STRAM */ - { - dbg("%s %08x\r\n", label, value); - dbg("%08x\r\n", edp->hwINFO); - dbg("%08x\r\n", edp->hwTailP); - dbg("%08x\r\n", edp->hwHeadP); - dbg("%08x\r\n", edp->hwNextED); - } -} - -static char *hcfs2string(int state) -{ - switch (state) - { - case OHCI_USB_RESET: return "reset"; - case OHCI_USB_RESUME: return "resume"; - case OHCI_USB_OPER: return "operational"; - case OHCI_USB_SUSPEND: return "suspend"; - } - return "?"; -} - -/* dump control and status registers */ -static void ohci_dump_status(ohci_t *controller) -{ - struct ohci_regs *regs = controller->regs; - uint32_t temp = readl(®s->revision) & 0xff; - - if (temp != 0x10) - dbg("spec %d.%d\r\n", (temp >> 4), (temp & 0x0f)); - - temp = readl(®s->control); - dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d\r\n", temp, - (temp & OHCI_CTRL_RWE) ? " RWE" : "", - (temp & OHCI_CTRL_RWC) ? " RWC" : "", - (temp & OHCI_CTRL_IR) ? " IR" : "", - hcfs2string(temp & OHCI_CTRL_HCFS), - (temp & OHCI_CTRL_BLE) ? " BLE" : "", - (temp & OHCI_CTRL_CLE) ? " CLE" : "", - (temp & OHCI_CTRL_IE) ? " IE" : "", - (temp & OHCI_CTRL_PLE) ? " PLE" : "", - temp & OHCI_CTRL_CBSR - ); - - temp = readl(®s->cmdstatus); - dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s\r\n", temp, - (temp & OHCI_SOC) >> 16, - (temp & OHCI_OCR) ? " OCR" : "", - (temp & OHCI_BLF) ? " BLF" : "", - (temp & OHCI_CLF) ? " CLF" : "", - (temp & OHCI_HCR) ? " HCR" : "" - ); - ohci_dump_intr_mask("intrstatus", readl(®s->intrstatus)); - ohci_dump_intr_mask("intrenable", readl(®s->intrenable)); - maybe_print_eds(controller, "ed_periodcurrent", readl(®s->ed_periodcurrent)); - maybe_print_eds(controller, "ed_controlhead", readl(®s->ed_controlhead)); - maybe_print_eds(controller, "ed_controlcurrent", readl(®s->ed_controlcurrent)); - maybe_print_eds(controller, "ed_bulkhead", readl(®s->ed_bulkhead)); - maybe_print_eds(controller, "ed_bulkcurrent", readl(®s->ed_bulkcurrent)); - maybe_print_eds(controller, "donehead", readl(®s->donehead)); -} - -static void ohci_dump_roothub(ohci_t *controller, int verbose) -{ - uint32_t temp; - uint32_t ndp; - uint32_t i; - - temp = roothub_a(controller); - (void) temp; - -// ndp = (temp & RH_A_NDP); - ndp = controller->ndp; - if (verbose) - { - dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d\r\n", temp, - ((temp & RH_A_POTPGT) >> 24) & 0xff, - (temp & RH_A_NOCP) ? " NOCP" : "", - (temp & RH_A_OCPM) ? " OCPM" : "", - (temp & RH_A_DT) ? " DT" : "", - (temp & RH_A_NPS) ? " NPS" : "", - (temp & RH_A_PSM) ? " PSM" : "", - ndp - ); - temp = roothub_b(controller); - dbg("roothub.b: %08x PPCM=%04x DR=%04x\r\n", - temp, - (temp & RH_B_PPCM) >> 16, - (temp & RH_B_DR) - ); - temp = roothub_status(controller); - dbg("roothub.status: %08x%s%s%s%s%s%s\r\n", - temp, - (temp & RH_HS_CRWE) ? " CRWE" : "", - (temp & RH_HS_OCIC) ? " OCIC" : "", - (temp & RH_HS_LPSC) ? " LPSC" : "", - (temp & RH_HS_DRWE) ? " DRWE" : "", - (temp & RH_HS_OCI) ? " OCI" : "", - (temp & RH_HS_LPS) ? " LPS" : "" - ); - } - - for (i = 0; i < ndp; i++) - { - temp = roothub_portstatus(controller, i); - dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\r\n", - i, - temp, - (temp & RH_PS_PRSC) ? " PRSC" : "", - (temp & RH_PS_OCIC) ? " OCIC" : "", - (temp & RH_PS_PSSC) ? " PSSC" : "", - (temp & RH_PS_PESC) ? " PESC" : "", - (temp & RH_PS_CSC) ? " CSC" : "", - - (temp & RH_PS_LSDA) ? " LSDA" : "", - (temp & RH_PS_PPS) ? " PPS" : "", - (temp & RH_PS_PRS) ? " PRS" : "", - (temp & RH_PS_POCI) ? " POCI" : "", - (temp & RH_PS_PSS) ? " PSS" : "", - - (temp & RH_PS_PES) ? " PES" : "", - (temp & RH_PS_CCS) ? " CCS" : "" - ); - } -} - -static void ohci_dump(ohci_t *ohci, int verbose) -{ - dbg("OHCI controller usb-%s-%c state\r\n", ohci->slot_name, (char)ohci->controller + '0'); - /* dumps some of the state we know about */ - ohci_dump_status(ohci); - if (verbose) - ep_print_int_eds(ohci, "hcca"); - dbg("hcca frame #%04x\r\n", ohci->hcca->frame_no); - ohci_dump_roothub(ohci, 1); -} -#endif /* DEBUG_OHCI */ - -/* - * Interface functions (URB) - */ - -/* get a transfer request */ - -static int sohci_submit_job(ohci_t *ohci, urb_priv_t *urb, struct devrequest *setup) -{ - ed_t *ed; - urb_priv_t *purb_priv = urb; - int i; - int size = 0; - struct usb_device *dev = urb->dev; - uint32_t pipe = urb->pipe; - void *buffer = urb->transfer_buffer; - int transfer_len = urb->transfer_buffer_length; - int interval = urb->interval; - - /* - * when controller's hung, permit only roothub cleanup attempts - * such as powering down ports - */ - if (ohci->disabled) - { - urb_free_priv(purb_priv); // added - err("sohci_submit_job: EPIPE\r\n"); - - return -1; - } - - /* - * we're about to begin a new transaction here so mark the - * URB unfinished - */ - urb->finished = 0; - - /* every endpoint has an ed, locate and fill it */ - ed = ep_add_ed(ohci, dev, pipe, interval, 1); - if (!ed) - { - urb_free_priv(purb_priv); // added - err("sohci_submit_job: ENOMEM"); - return -1; - } - - /* for the private part of the URB we need the number of TDs (size) */ - switch (usb_pipetype(pipe)) - { - case PIPE_BULK: /* one TD for every 4096 Byte */ - size = (transfer_len - 1) / 4096 + 1; - break; - - case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */ - size = (transfer_len == 0) ? 2 : (transfer_len - 1) / 4096 + 3; - break; - - case PIPE_INTERRUPT: /* 1 TD */ - size = 1; - break; - } - ed->purb = urb; - if (size >= (N_URB_TD - 1)) - { - urb_free_priv(purb_priv); // added - err("need %d TDs, only have %d", size, N_URB_TD); - return -1; - } - purb_priv->pipe = pipe; - - /* fill the private part of the URB */ - purb_priv->length = size; - purb_priv->ed = ed; - purb_priv->actual_length = 0; - - /* allocate the TDs */ - /* note that td[0] was allocated in ep_add_ed */ - for (i = 0; i < size; i++) - { - purb_priv->td[i] = td_alloc(dev); - if (!purb_priv->td[i]) - { - purb_priv->length = i; - urb_free_priv(purb_priv); - err("sohci_submit_job: ENOMEM\r\n"); - return -1; - } - } - - if (ed->state == ED_NEW || (ed->state & ED_DEL)) - { - urb_free_priv(purb_priv); - err("sohci_submit_job: EINVAL\r\n"); - return -1; - } - - /* link the ed into a chain if is not already */ - if (ed->state != ED_OPER) - { - ep_link(ohci, ed); - } - - /* fill the TDs and link it to the ed */ - td_submit_job(ohci, dev, pipe, buffer, transfer_len, setup, purb_priv, interval); - - return 0; -} - -static inline int sohci_return_job(ohci_t *ohci, urb_priv_t *urb) -{ - struct ohci_regs *regs = ohci->regs; - - switch (usb_pipetype(urb->pipe)) - { - case PIPE_INTERRUPT: - /* implicitly requeued */ - if ((urb->dev->irq_handle != NULL) && (urb->dev->irq_act_len = urb->actual_length)) - { - writel(OHCI_INTR_WDH, ®s->intrenable); - readl(®s->intrenable); /* PCI posting flush */ - - /* call interrupt device routine */ - dbg("irq_handle device %d", urb->dev->devnum); - urb->dev->irq_handle(urb->dev); - - writel(OHCI_INTR_WDH, ®s->intrdisable); - readl(®s->intrdisable); /* PCI posting flush */ - } - urb->actual_length = 0; - td_submit_job(ohci, urb->dev, urb->pipe, urb->transfer_buffer, urb->transfer_buffer_length, NULL, urb, urb->interval); - break; - - case PIPE_CONTROL: - case PIPE_BULK: - break; - - default: - return 0; - } - return 1; -} - -/*-------------------------------------------------------------------------*/ - -#ifdef DEBUG_OHCI -/* tell us the current USB frame number */ - -static int sohci_get_current_frame_number(ohci_t *ohci, struct usb_device *usb_dev) -{ - return swpw(ohci->hcca->frame_no); -} -#endif - -/*-------------------------------------------------------------------------* - * ED handling functions - *-------------------------------------------------------------------------*/ - -/* - * search for the right branch to insert an interrupt ed into the int tree - * do some load balancing; - * returns the branch and - * sets the interval to interval = 2^integer (ld (interval)) - */ - -static int ep_int_balance(ohci_t *ohci, int interval, int load) -{ - int i; - int branch = 0; - - /* - * search for the least loaded interrupt endpoint - * branch of all 32 branches - */ - for (i = 0; i < 32; i++) - { - if (ohci->ohci_int_load[branch] > ohci->ohci_int_load[i]) - branch = i; - } - branch = branch % interval; - for (i = branch; i < 32; i += interval) - ohci->ohci_int_load[i] += load; - return branch; -} - -/*-------------------------------------------------------------------------*/ - -/* 2^int( ld (inter)) */ - -static int ep_2_n_interval(int inter) -{ - int i; - - for (i = 0; ((inter >> i) > 1) && (i < 5); i++); - return 1 << i; -} - -/*-------------------------------------------------------------------------*/ - -/* - * the int tree is a binary tree - * in order to process it sequentially the indexes of the branches have to - * be mapped the mapping reverses the bits of a word of num_bits length - */ -static int ep_rev(int num_bits, int word) -{ - int i; - int wout = 0; - - for (i = 0; i < num_bits; i++) - wout |= (((word >> i) & 1) << (num_bits - i - 1)); - - return wout; -} - -/*-------------------------------------------------------------------------* - * ED handling functions - *-------------------------------------------------------------------------*/ - -/* link an ed into one of the HC chains */ - -static int ep_link(ohci_t *ohci, ed_t *edi) -{ - volatile ed_t *ed = edi; - int int_branch; - int i; - int inter; - int interval; - int load; - uint32_t *ed_p; - - ed->state = ED_OPER; - ed->int_interval = 0; - switch (ed->type) - { - case PIPE_CONTROL: - ed->hwNextED = 0; - if (ohci->ed_controltail == NULL) - writel((uint32_t) ed - ohci->dma_offset, &ohci->regs->ed_controlhead); - else - ohci->ed_controltail->hwNextED = swpl((uint32_t)ed - ohci->dma_offset); - - ed->ed_prev = ohci->ed_controltail; - if (!ohci->ed_controltail && !ohci->ed_rm_list[0] && !ohci->ed_rm_list[1] && !ohci->sleeping) - { - ohci->hc_control |= OHCI_CTRL_CLE; - writel(ohci->hc_control, &ohci->regs->control); - } - ohci->ed_controltail = edi; - break; - - case PIPE_BULK: - ed->hwNextED = 0; - if (ohci->ed_bulktail == NULL) - writel((uint32_t) ed - ohci->dma_offset, &ohci->regs->ed_bulkhead); - else - ohci->ed_bulktail->hwNextED = swpl((uint32_t)ed - ohci->dma_offset); - ed->ed_prev = ohci->ed_bulktail; - if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] && !ohci->ed_rm_list[1] && !ohci->sleeping) - { - ohci->hc_control |= OHCI_CTRL_BLE; - writel(ohci->hc_control, &ohci->regs->control); - } - ohci->ed_bulktail = edi; - break; - - case PIPE_INTERRUPT: - load = ed->int_load; - interval = ep_2_n_interval(ed->int_period); - ed->int_interval = interval; - int_branch = ep_int_balance(ohci, interval, load); - ed->int_branch = int_branch; - for (i = 0; i < ep_rev(6, interval); i += inter) - { - inter = 1; - for (ed_p = &(ohci->hcca->int_table[ep_rev(5, i) + int_branch]); - (*ed_p != 0) && (((ed_t *)ed_p)->int_interval >= interval); - ed_p = &(((ed_t *)ed_p)->hwNextED)) - inter = ep_rev(6, ((ed_t *)ed_p)->int_interval); - ed->hwNextED = *ed_p; - *ed_p = swpl((uint32_t)ed - ohci->dma_offset); - } - break; - } - return 0; -} - -/*-------------------------------------------------------------------------*/ - -/* scan the periodic table to find and unlink this ED */ -static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed, unsigned index, unsigned period) -{ - for ( ;index < NUM_INTS; index += period) - { - uint32_t *ed_p = &ohci->hcca->int_table[index]; - - /* ED might have been unlinked through another path */ - while (*ed_p != 0) - { - if ((uint32_t)*ed_p == swpl((uint32_t)ed - ohci->dma_offset)) /* changed */ - { - *ed_p = ed->hwNextED; - break; - } - ed_p = &(((struct ed *)ed_p)->hwNextED); /* changed */ - } - } -} - -/* - * unlink an ed from one of the HC chains. - * just the link to the ed is unlinked. - * the link from the ed still points to another operational ed or 0 - * so the HC can eventually finish the processing of the unlinked ed - */ - -static int ep_unlink(ohci_t *ohci, ed_t *edi) -{ - volatile ed_t *ed = edi; - int i; - - ed->hwINFO |= swpl(OHCI_ED_SKIP); - switch (ed->type) - { - case PIPE_CONTROL: - if (ed->ed_prev == NULL) - { - if (!ed->hwNextED) - { - ohci->hc_control &= ~OHCI_CTRL_CLE; - writel(ohci->hc_control, &ohci->regs->control); - } - writel(swpl(*((uint32_t *)&ed->hwNextED)), &ohci->regs->ed_controlhead); - } - else - ed->ed_prev->hwNextED = ed->hwNextED; - if (ohci->ed_controltail == ed) - ohci->ed_controltail = ed->ed_prev; - else - ((ed_t *)(swpl(*((uint32_t *)&ed->hwNextED)) + ohci->dma_offset))->ed_prev = ed->ed_prev; - break; - - case PIPE_BULK: - if (ed->ed_prev == NULL) - { - if (!ed->hwNextED) - { - ohci->hc_control &= ~OHCI_CTRL_BLE; - writel(ohci->hc_control, &ohci->regs->control); - } - writel(swpl(*((uint32_t *) &ed->hwNextED)), &ohci->regs->ed_bulkhead); - } - else - ed->ed_prev->hwNextED = ed->hwNextED; - - if (ohci->ed_bulktail == ed) - ohci->ed_bulktail = ed->ed_prev; - else - ((ed_t *)(swpl(*((uint32_t *) &ed->hwNextED)) + ohci->dma_offset))->ed_prev = ed->ed_prev; - break; - - case PIPE_INTERRUPT: - periodic_unlink(ohci, ed, 0, 1); - for (i = ed->int_branch; i < 32; i += ed->int_interval) - ohci->ohci_int_load[i] -= ed->int_load; - break; - } - ed->state = ED_UNLINK; - return 0; -} - -/*-------------------------------------------------------------------------*/ - -/* - * add/reinit an endpoint; this should be done once at the - * usb_set_configuration command, but the USB stack is a little bit - * stateless so we do it at every transaction if the state of the ed - * is ED_NEW then a dummy td is added and the state is changed to - * ED_UNLINK in all other cases the state is left unchanged the ed - * info fields are setted anyway even though most of them should not - * change - */ -static ed_t *ep_add_ed(ohci_t *ohci, struct usb_device *usb_dev, uint32_t pipe, int interval, int load) -{ - td_t *td; - ed_t *ed_ret; - volatile ed_t *ed; - struct ohci_device *ohci_dev = ohci->ohci_dev; - - ed = ed_ret = &ohci_dev->ed[(usb_pipeendpoint(pipe) << 1) | (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))]; - if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) - { - err("ep_add_ed: pending delete"); - /* pending delete request */ - return NULL; - } - - if (ed->state == ED_NEW) - { - /* dummy td; end of td list for ed */ - td = td_alloc(usb_dev); - ed->hwTailP = swpl((uint32_t)td - ohci->dma_offset); - ed->hwHeadP = ed->hwTailP; - ed->state = ED_UNLINK; - ed->type = usb_pipetype(pipe); - ohci_dev->ed_cnt++; - } - - ed->hwINFO = swpl(usb_pipedevice(pipe) - | usb_pipeendpoint(pipe) << 7 - | (usb_pipeisoc(pipe)? 0x8000: 0) - | (usb_pipecontrol(pipe)? 0: (usb_pipeout(pipe)? 0x800: 0x1000)) - | usb_pipeslow(pipe) << 13 - | usb_maxpacket(usb_dev, pipe) << 16); - - if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) - { - ed->int_period = interval; - ed->int_load = load; - } - return ed_ret; -} - -/*-------------------------------------------------------------------------* - * TD handling functions - *-------------------------------------------------------------------------*/ - -/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */ - -static void td_fill(ohci_t *ohci, unsigned int info, void *data, int len, - struct usb_device *dev, int index, urb_priv_t *urb_priv) -{ - volatile td_t *td; - volatile td_t *td_pt; - -#ifdef OHCI_FILL_TRACE - int i; -#endif - if (index > urb_priv->length) - { - err("index > length"); - return; - } - /* use this td as the next dummy */ - td_pt = urb_priv->td[index]; - td_pt->hwNextTD = 0; - - /* fill the old dummy TD */ - td = urb_priv->td[index] = (td_t *)((swpl(urb_priv->ed->hwTailP) & ~0xf) + ohci->dma_offset); - td->ed = urb_priv->ed; - td->next_dl_td = NULL; - td->index = index; - td->data = (uint32_t)data; -#ifdef OHCI_FILL_TRACE - if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) - { - for (i = 0; i < len; i++) - dbg("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]); - dbg("\r\n"); - } -#endif - if (!len) - data = NULL; - td->hwINFO = swpl(info); - if (data != NULL) - { - td->hwCBP = swpl((uint32_t)data - ohci->dma_offset); - td->hwBE = swpl((uint32_t)(data + len - 1 - ohci->dma_offset)); - } - else - { - td->hwCBP = 0; - td->hwBE = 0; - } - td->hwNextTD = swpl((uint32_t)td_pt - ohci->dma_offset); - /* append to queue */ - td->ed->hwTailP = td->hwNextTD; - -#if 0 - if (data) - { - int i; - dbg("td_fill: %08x %08x %08X %08X at 0x%08X\r\n", - swpl(td->hwINFO), swpl(td->hwCBP), swpl(td->hwNextTD), swpl(td->hwBE), td); - for (i = 0; i < len; i++) - dbg("%02X ", *(unsigned char *)(data + i) & 0xff); - dbg("\r\n"); - } - else - dbg("td_fill: %08x %08x %08X %08X at 0x%08X\r\n", - swpl(td->hwINFO), swpl(td->hwCBP), swpl(td->hwNextTD), swpl(td->hwBE), td); -#endif -} - -/*-------------------------------------------------------------------------*/ - -/* prepare all TDs of a transfer */ - -static void td_submit_job(ohci_t *ohci, struct usb_device *dev, uint32_t pipe, - void *buffer, int transfer_len, struct devrequest *setup, - urb_priv_t *urb, int interval) -{ - int data_len = transfer_len; - void *data; - int cnt = 0; - uint32_t info = 0; - unsigned int toggle = 0; - - /* OHCI handles the DATA-toggles itself, we just use the USB-toggle - * bits for reseting */ - if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) - toggle = TD_T_TOGGLE; - else - { - toggle = TD_T_DATA0; - usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1); - } - - urb->td_cnt = 0; - if (data_len) - data = buffer; - else - data = NULL; - - switch (usb_pipetype(pipe)) - { - case PIPE_BULK: - info = usb_pipeout(pipe) ? TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ; - while (data_len > 4096) - { - td_fill(ohci, info | (cnt? TD_T_TOGGLE : toggle), data, 4096, dev, cnt, urb); - data += 4096; data_len -= 4096; cnt++; - } - info = usb_pipeout(pipe) ? TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ; - td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb); - cnt++; - if (!ohci->sleeping) /* start bulk list */ - writel(OHCI_BLF, &ohci->regs->cmdstatus); - break; - - case PIPE_CONTROL: - /* Setup phase */ - info = TD_CC | TD_DP_SETUP | TD_T_DATA0; - td_fill(ohci, info, setup, 8, dev, cnt++, urb); - /* Optional Data phase */ - if (data_len > 0) - { - info = usb_pipeout(pipe) ? TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1; - /* NOTE: mishandles transfers >8K, some >4K */ - td_fill(ohci, info, data, data_len, dev, cnt++, urb); - } - /* Status phase */ - info = usb_pipeout(pipe) ? TD_CC | TD_DP_IN | TD_T_DATA1 : TD_CC | TD_DP_OUT | TD_T_DATA1; - td_fill(ohci, info, data, 0, dev, cnt++, urb); - if (!ohci->sleeping) /* start Control list */ - writel(OHCI_CLF, &ohci->regs->cmdstatus); - break; - - case PIPE_INTERRUPT: - info = usb_pipeout(urb->pipe) ? TD_CC | TD_DP_OUT | toggle : TD_CC | TD_R | TD_DP_IN | toggle; - td_fill(ohci, info, data, data_len, dev, cnt++, urb); - break; - } - if (urb->length != cnt) - dbg("TD LENGTH %d != CNT %d", urb->length, cnt); -} - -/*-------------------------------------------------------------------------* - * Done List handling functions - *-------------------------------------------------------------------------*/ - -/* calculate the transfer length and update the urb */ - -static void dl_transfer_length(ohci_t *ohci, td_t *td) -{ - uint32_t tdBE; - uint32_t tdCBP; - - urb_priv_t *lurb_priv = td->ed->purb; - - tdBE = swpl(td->hwBE); - tdCBP = swpl(td->hwCBP); - - if (tdBE) - tdBE += ohci->dma_offset; - if (tdCBP) - tdCBP += ohci->dma_offset; - - if (!(usb_pipecontrol(lurb_priv->pipe) && ((td->index == 0) || (td->index == lurb_priv->length - 1)))) - { - if (tdBE != 0) - { - if (td->hwCBP == 0) - lurb_priv->actual_length += (tdBE - td->data + 1); - else - lurb_priv->actual_length += (tdCBP - td->data); - } - } -} - -/*-------------------------------------------------------------------------*/ -static void check_status(ohci_t *ohci, td_t *td_list) -{ - urb_priv_t *lurb_priv = td_list->ed->purb; - int urb_len = lurb_priv->length; - uint32_t *phwHeadP = &td_list->ed->hwHeadP; - int cc = TD_CC_GET(swpl(td_list->hwINFO)); - - if (cc) - { - err("OHCI usb-%s-%c error: %s (%x)\r\n", ohci->slot_name, (char) ohci->controller + '0', cc_to_string[cc], cc); - if (*phwHeadP & swpl(0x1)) - { - if (lurb_priv && ((td_list->index + 1) < urb_len)) - { - *phwHeadP = (lurb_priv->td[urb_len - 1]->hwNextTD & swpl(0xfffffff0)) | (*phwHeadP & swpl(0x2)); - lurb_priv->td_cnt += urb_len - td_list->index - 1; - } - else - *phwHeadP &= swpl(0xfffffff2); - } -#ifdef CONFIG_MPC5200 - td_list->hwNextTD = 0; -#endif - } -} - -/* - * replies to the request have to be on a FIFO basis so - * we reverse the reversed done-list - */ -static td_t *dl_reverse_done_list(ohci_t *ohci) -{ - uint32_t td_list_hc; - td_t *td_rev = NULL; - td_t *td_list = NULL; - - td_list_hc = swpl(ohci->hcca->done_head) & ~0xf; - - if (td_list_hc) - { - td_list_hc += ohci->dma_offset; - } - - ohci->hcca->done_head = 0; - while (td_list_hc) - { - td_list = (td_t *) td_list_hc; - check_status(ohci, td_list); - td_list->next_dl_td = td_rev; - td_rev = td_list; - td_list_hc = swpl(td_list->hwNextTD) & ~0xf; - if (td_list_hc) - { - td_list_hc += ohci->dma_offset; - } - } - return td_list; -} - -/*-------------------------------------------------------------------------*/ - -static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status) -{ - if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL)) - { - urb->finished = sohci_return_job(ohci, urb); - } - else - { - dbg("finish_urb: strange.., ED state %x, \r\n", status); - } -} - -/* - * Used to take back a TD from the host controller. This would normally be - * called from within dl_done_list, however it may be called directly if the - * HC no longer sees the TD and it has not appeared on the donelist (after - * two frames). This bug has been observed on ZF Micro systems. - */ -static int takeback_td(ohci_t *ohci, td_t *td_list) -{ - ed_t *ed; - int cc; - int stat = 0; - urb_priv_t *lurb_priv; - uint32_t tdINFO; - uint32_t edHeadP; - uint32_t edTailP; - - tdINFO = swpl(td_list->hwINFO); - - ed = td_list->ed; - if (ed == NULL) - { - err("OHCI usb-%s-%c cannot get error code ED is null\r\n", ohci->slot_name, (char) ohci->controller + '0'); - - return stat; - } - - lurb_priv = ed->purb; - dl_transfer_length(ohci, td_list); - lurb_priv->td_cnt++; - - /* error code of transfer */ - cc = TD_CC_GET(tdINFO); - if (cc) - { - err("OHCI usb-%s-%c error: %s (%x)\r\n", ohci->slot_name, (char) ohci->controller + '0', cc_to_string[cc], cc); - stat = cc_to_error[cc]; - } - - /* - * see if this done list makes for all TD's of current URB, - * and mark the URB finished if so - */ - if (lurb_priv->td_cnt == lurb_priv->length) - { - finish_urb(ohci, lurb_priv, ed->state); - } - - if (ohci->irq) - { - dbg("dl_done_list: processing TD %x, len %x\r\n", lurb_priv->td_cnt, lurb_priv->length); - } - - if (ed->state != ED_NEW && (!usb_pipeint(lurb_priv->pipe))) - { - edHeadP = swpl(ed->hwHeadP) & ~0xf; - edTailP = swpl(ed->hwTailP); - - /* unlink eds if they are not busy */ - if ((edHeadP == edTailP) && (ed->state == ED_OPER)) - { - ep_unlink(ohci, ed); - } - } - - if (cc && (ed->type == PIPE_INTERRUPT)) /* added, but it's not the better method */ - { - ep_unlink(ohci, ed); - } - return stat; -} - -static int dl_done_list(ohci_t *ohci) -{ - int stat = 0; - td_t *td_list = dl_reverse_done_list(ohci); - - while (td_list) - { - td_t *td_next = td_list->next_dl_td; - - stat = takeback_td(ohci, td_list); - td_list = td_next; - } - return stat; -} - -/*-------------------------------------------------------------------------* - * Virtual Root Hub - *-------------------------------------------------------------------------*/ - -/* Device descriptor */ -static uint8_t root_hub_dev_des[] = -{ - 0x12, /* uint8_t bLength; */ - 0x01, /* uint8_t bDescriptorType; Device */ - 0x10, /* uint16_t bcdUSB; v1.1 */ - 0x01, - 0x09, /* uint8_t bDeviceClass; HUB_CLASSCODE */ - 0x00, /* uint8_t bDeviceSubClass; */ - 0x00, /* uint8_t bDeviceProtocol; */ - 0x08, /* uint8_t bMaxPacketSize0; 8 Bytes */ - 0x00, /* uint16_t idVendor; */ - 0x00, - 0x00, /* uint16_t idProduct; */ - 0x00, - 0x00, /* uint16_t bcdDevice; */ - 0x00, - 0x00, /* uint8_t iManufacturer; */ - 0x01, /* uint8_t iProduct; */ - 0x00, /* uint8_t iSerialNumber; */ - 0x01 /* uint8_t bNumConfigurations; */ -}; - -/* Configuration descriptor */ -static uint8_t root_hub_config_des[] = -{ - 0x09, /* uint8_t bLength; */ - 0x02, /* uint8_t bDescriptorType; Configuration */ - 0x19, /* uint16_t wTotalLength; */ - 0x00, - 0x01, /* uint8_t bNumInterfaces; */ - 0x01, /* uint8_t bConfigurationValue; */ - 0x00, /* uint8_t iConfiguration; */ - 0x40, /* uint8_t bmAttributes; - Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */ - 0x00, /* uint8_t MaxPower; */ - - /* interface */ - 0x09, /* uint8_t if_bLength; */ - 0x04, /* uint8_t if_bDescriptorType; Interface */ - 0x00, /* uint8_t if_bInterfaceNumber; */ - 0x00, /* uint8_t if_bAlternateSetting; */ - 0x01, /* uint8_t if_bNumEndpoints; */ - 0x09, /* uint8_t if_bInterfaceClass; HUB_CLASSCODE */ - 0x00, /* uint8_t if_bInterfaceSubClass; */ - 0x00, /* uint8_t if_bInterfaceProtocol; */ - 0x00, /* uint8_t if_iInterface; */ - - /* endpoint */ - 0x07, /* uint8_t ep_bLength; */ - 0x05, /* uint8_t ep_bDescriptorType; Endpoint */ - 0x81, /* uint8_t ep_bEndpointAddress; IN Endpoint 1 */ - 0x03, /* uint8_t ep_bmAttributes; Interrupt */ - 0x02, /* uint16_t ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */ - 0x00, - 0xff /* uint8_t ep_bInterval; 255 ms */ -}; - -static unsigned char root_hub_str_index0[] = -{ - 0x04, /* uint8_t bLength; */ - 0x03, /* uint8_t bDescriptorType; String-descriptor */ - 0x09, /* uint8_t lang ID */ - 0x04, /* uint8_t lang ID */ -}; - -static unsigned char root_hub_str_index1[] = -{ - 28, /* uint8_t bLength; */ - 0x03, /* uint8_t bDescriptorType; String-descriptor */ - 'O', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ - 'H', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ - 'C', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ - 'I', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ - ' ', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ - 'R', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ - 'o', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ - 'o', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ - 't', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ - ' ', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ - 'H', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ - 'u', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ - 'b', /* uint8_t Unicode */ - 0, /* uint8_t Unicode */ -}; - -/* Hub class-specific descriptor is constructed dynamically */ - -/*-------------------------------------------------------------------------*/ - -#define OK(x) len = (x); break -#ifdef DEBUG_OHCI -#define WR_RH_STAT(x) { err("WR:status %#8x", (x)); writel((x), &ohci->regs->roothub.status); } -#define WR_RH_PORTSTAT(x) { err("WR:portstatus[%d] %#8x", wIndex - 1, (x)); writel((x), &ohci->regs->roothub.portstatus[wIndex - 1]); } -#else -#define WR_RH_STAT(x) { writel((x), &ohci->regs->roothub.status); } -#define WR_RH_PORTSTAT(x) { writel((x), &ohci->regs->roothub.portstatus[wIndex - 1]); } -#endif -#define RD_RH_STAT roothub_status(ohci) -#define RD_RH_PORTSTAT roothub_portstatus(ohci, wIndex-1) - -/* request to virtual root hub */ - -int rh_check_port_status(ohci_t *controller) -{ - uint32_t temp, ndp, i; - int res = -1; - temp = roothub_a(controller); -// ndp = (temp & RH_A_NDP); - ndp = controller->ndp; - for (i = 0; i < ndp; i++) - { - temp = roothub_portstatus(controller, i); - - /* check for a device disconnect */ - if (((temp & (RH_PS_PESC | RH_PS_CSC)) == (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) - { - res = i; - break; - } - - /* check for a device connect */ - if ((temp & RH_PS_CSC) && (temp & RH_PS_CCS)) - { - res = i; - break; - } - } - return res; -} - -static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev, uint32_t pipe, - void *buffer, int transfer_len, struct devrequest *cmd) -{ - void *data = buffer; - int leni = transfer_len; - int len = 0; - int stat = 0; - uint32_t datab[4]; - uint8_t *data_buf = (uint8_t *)datab; - uint16_t bmRType_bReq; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; - -#ifdef DEBUG_OHCI - pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe)); -#else - if (ohci->irq) - { - wait_ms(10); - } -#endif - - if (usb_pipeint(pipe)) - { - err("Root-Hub submit IRQ: NOT implemented\r\n"); - - return 0; - } - - bmRType_bReq = cmd->requesttype | (cmd->request << 8); - wValue = swpw(cmd->value); - wIndex = swpw(cmd->index); - wLength = swpw(cmd->length); - dbg("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x\r\n", dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength); - - switch (bmRType_bReq) - { - /* - * Request Destination: - * without flags: Device, - * RH_INTERFACE: interface, - * RH_ENDPOINT: endpoint, - * RH_CLASS means HUB here, - * RH_OTHER | RH_CLASS almost ever means HUB_PORT here - */ - case RH_GET_STATUS: - *(uint16_t *) data_buf = swpw(1); - OK(2); - - case RH_GET_STATUS | RH_INTERFACE: - *(uint16_t *) data_buf = swpw(0); - OK(2); - - case RH_GET_STATUS | RH_ENDPOINT: - *(uint16_t *) data_buf = swpw(0); - OK(2); - - case RH_GET_STATUS | RH_CLASS: - *(uint32_t *) data_buf = swpl(RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE)); - OK(4); - - case RH_GET_STATUS | RH_OTHER | RH_CLASS: - *(uint32_t *) data_buf = swpl(RD_RH_PORTSTAT); - OK(4); - - case RH_CLEAR_FEATURE | RH_ENDPOINT: - switch (wValue) - { - case (RH_ENDPOINT_STALL): OK(0); - } - break; - - case RH_CLEAR_FEATURE | RH_CLASS: - switch (wValue) - { - case RH_C_HUB_LOCAL_POWER: OK(0); - case (RH_C_HUB_OVER_CURRENT): WR_RH_STAT(RH_HS_OCIC); OK(0); - } - break; - - case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS: - switch (wValue) - { - case (RH_PORT_ENABLE): WR_RH_PORTSTAT(RH_PS_CCS); OK(0); - case (RH_PORT_SUSPEND): WR_RH_PORTSTAT(RH_PS_POCI); OK(0); - case (RH_PORT_POWER): WR_RH_PORTSTAT(RH_PS_LSDA); OK(0); - case (RH_C_PORT_CONNECTION): WR_RH_PORTSTAT(RH_PS_CSC); OK(0); - case (RH_C_PORT_ENABLE): WR_RH_PORTSTAT(RH_PS_PESC); OK(0); - case (RH_C_PORT_SUSPEND): WR_RH_PORTSTAT(RH_PS_PSSC); OK(0); - case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0); - case (RH_C_PORT_RESET): WR_RH_PORTSTAT(RH_PS_PRSC); OK(0); - } - break; - - case RH_SET_FEATURE | RH_OTHER | RH_CLASS: - switch (wValue) - { - case (RH_PORT_SUSPEND): - WR_RH_PORTSTAT(RH_PS_PSS); - OK(0); - case (RH_PORT_RESET): /* BUG IN HUP CODE *********/ - if (RD_RH_PORTSTAT & RH_PS_CCS) - WR_RH_PORTSTAT(RH_PS_PRS); - OK(0); - case (RH_PORT_POWER): - WR_RH_PORTSTAT(RH_PS_PPS); - wait_ms(100); - OK(0); - case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/ - if (RD_RH_PORTSTAT & RH_PS_CCS) - WR_RH_PORTSTAT(RH_PS_PES); - OK(0); - } - break; - - case RH_SET_ADDRESS: - ohci->rh.devnum = wValue; - OK(0); - - case RH_GET_DESCRIPTOR: - switch ((wValue & 0xff00) >> 8) - { - case(0x01): /* device descriptor */ - len = min_t(unsigned int, leni, min_t(unsigned int, sizeof(root_hub_dev_des), wLength)); - data_buf = root_hub_dev_des; - OK(len); - - case(0x02): /* configuration descriptor */ - len = min_t(unsigned int, leni, min_t(unsigned int, sizeof(root_hub_config_des), wLength)); - data_buf = root_hub_config_des; - OK(len); - - case(0x03): /* string descriptors */ - if (wValue == 0x0300) - { - len = min_t(unsigned int, leni, min_t(unsigned int, sizeof(root_hub_str_index0), wLength)); - data_buf = root_hub_str_index0; - OK(len); - } - if (wValue == 0x0301) - { - len = min_t(unsigned int, leni, min_t(unsigned int, sizeof(root_hub_str_index1), wLength)); - data_buf = root_hub_str_index1; - OK(len); - } - - default: - stat = USB_ST_STALLED; - } - break; - - case RH_GET_DESCRIPTOR | RH_CLASS: - { - uint32_t temp = roothub_a(ohci); - data_buf[0] = 9; /* min length; */ - data_buf[1] = 0x29; -// data_buf[2] = temp & RH_A_NDP; - data_buf[2] = (uint8_t)ohci->ndp; - data_buf[3] = 0; - - if (temp & RH_A_PSM) /* per-port power switching? */ - { - data_buf[3] |= 0x1; - } - - if (temp & RH_A_NOCP) /* no overcurrent reporting? */ - { - data_buf[3] |= 0x10; - } - else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */ - { - data_buf[3] |= 0x8; - } - - /* corresponds to data_buf[4-7] */ - datab[1] = 0; - data_buf[5] = (temp & RH_A_POTPGT) >> 24; - temp = roothub_b(ohci); - data_buf[7] = temp & RH_B_DR; - if (data_buf[2] < 7) - { - data_buf[8] = 0xff; - } - else - { - data_buf[0] += 2; - data_buf[8] = (temp & RH_B_DR) >> 8; - data_buf[10] = data_buf[9] = 0xff; - } - len = min_t(unsigned int, leni, min_t(unsigned int, data_buf[0], wLength)); - OK(len); - } - - case RH_GET_CONFIGURATION: *(uint8_t *) data_buf = 0x01; OK(1); - - case RH_SET_CONFIGURATION: WR_RH_STAT(0x10000); OK(0); - - default: - dbg("unsupported root hub command"); - stat = USB_ST_STALLED; - } -#ifdef DEBUG_OHCI - ohci_dump_roothub(ohci, 1); -#else - if (ohci->irq) - { - wait_ms(10); - } -#endif - - len = min_t(int, len, leni); - - if (data != data_buf) - { - memcpy(data, data_buf, len); - } - - dev->act_len = len; - dev->status = stat; - -#ifdef DEBUG_OHCI - pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/); -#else - - if (ohci->irq) - { - wait_ms(10); - } -#endif - - return stat; -} - - -/* - * common code for handling submit messages - used for all but root hub accesses. - */ - -static int submit_common_msg(ohci_t *ohci, struct usb_device *dev, uint32_t pipe, void *buffer, - int transfer_len, struct devrequest *setup, int interval) -{ - int stat = 0; - int maxsize = usb_maxpacket(dev, pipe); - int timeout; - urb_priv_t *urb = driver_mem_alloc(sizeof(urb_priv_t)); - - if (urb == NULL) - { - err("submit_common_msg driver_mem_alloc() failed\r\n"); - - return -1; - } - memset(urb, 0, sizeof(urb_priv_t)); - - urb->dev = dev; - urb->pipe = pipe; - urb->transfer_buffer = buffer; - urb->transfer_buffer_length = transfer_len; - urb->interval = interval; - - /* device pulled? Shortcut the action. */ - if (ohci->devgone == dev) - { - dev->status = USB_ST_CRC_ERR; - dbg("device is gone...\r\n"); - return 0; - } -#ifdef DEBUG_OHCI - urb->actual_length = 0; - pkt_print(ohci, urb, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe)); -#else - if (ohci->irq) - { - wait_ms(10); - } -#endif - - if (!maxsize) - { - err("submit_common_message: pipesize for pipe %lx is zero\r\n", pipe); - return -1; - } - - if (sohci_submit_job(ohci, urb, setup) < 0) - { - err("sohci_submit_job failed\r\n"); - return -1; - } - -#if 0 - wait_ms(10); - /* ohci_dump_status(ohci); */ -#endif - - /* allow more time for a BULK device to react - some are slow */ - -#define BULK_TO 5000 /* timeout in milliseconds */ - - if (usb_pipebulk(pipe)) - { - timeout = BULK_TO; - } - else - { - timeout = 1000; - } - - /* wait_ms for it to complete */ - while (ohci->irq) - { - /* check whether the controller is done */ - // flush_data_cache(ohci); no need to do that, PCI is uncached, as well as USB memory - -#ifndef CONFIG_USB_INTERRUPT_POLLING - if (ohci->irq_enabled) - { - stat = ohci->stat_irq; - } - else -#endif - stat = hc_interrupt(ohci); - if (stat < 0) - { - dbg("USB CRC error\r\n"); - stat = USB_ST_CRC_ERR; - break; - } - /* - * NOTE: since we are not interrupt driven in U-Boot and always - * handle only one URB at a time, we cannot assume the - * transaction finished on the first successful return from - * hc_interrupt().. unless the flag for current URB is set, - * meaning that all TD's to/from device got actually - * transferred and processed. If the current URB is not - * finished we need to re-iterate this loop so as - * hc_interrupt() gets called again as there needs to be some - * more TD's to process still - */ - if ((stat >= 0) && (stat != 0xff) && (urb->finished)) - { - /* 0xff is returned for an SF-interrupt */ - break; - } - - if (--timeout) - { - wait_ms(10); - if (!urb->finished) - xprintf("*\r\n"); - } - else - { - err("OHCI usb-%s-%c CTL:TIMEOUT", ohci->slot_name, (char) ohci->controller + '0'); - dbg("submit_common_msg: TO status %x\r\n", stat); - urb->finished = 1; - stat = USB_ST_CRC_ERR; - break; - } - } - dbg("\n"); - dev->status = stat; - dev->act_len = transfer_len; -#ifdef DEBUG_OHCI - pkt_print(ohci, urb, dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe)); -#else - if (ohci->irq) - wait_ms(10); -#endif - /* free TDs in urb_priv */ - if (!usb_pipeint(pipe)) - urb_free_priv(urb); - return 0; -} - -/* submit routines called from usb.c */ -int ohci_submit_bulk_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len) -{ - err("submit_bulk_msg dev 0x%p ohci 0x%p buffer 0x%p len %d", dev, dev->priv_hcd, buffer, transfer_len); - return submit_common_msg((ohci_t *)dev->priv_hcd, dev, pipe, buffer, transfer_len, NULL, 0); -} - -int ohci_submit_control_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, struct devrequest *setup) -{ - ohci_t *ohci = (ohci_t *)dev->priv_hcd; - int maxsize = usb_maxpacket(dev, pipe); - - dbg("submit_control_msg dev 0x%p ohci 0x%p\r\n", dev, ohci); - -#ifdef DEBUG_OHCI - pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe)); -#else - if (ohci->irq) - { - wait_ms(10); - } -#endif - - if (!maxsize) - { - err("submit_control_message: pipesize for pipe %lx is zero", pipe); - return -1; - } - - if (((pipe >> 8) & 0x7f) == ohci->rh.devnum) - { - ohci->rh.dev = dev; - - /* root hub - redirect */ - return ohci_submit_rh_msg(ohci, dev, pipe, buffer, transfer_len, setup); - } - return submit_common_msg(ohci, dev, pipe, buffer, transfer_len, setup, 0); -} - -int ohci_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval) -{ - err("submit_int_msg dev 0x%p ohci 0x%p buffer 0x%p len %d", dev, dev->priv_hcd, buffer, transfer_len); - return submit_common_msg((ohci_t *)dev->priv_hcd, dev, pipe, buffer, transfer_len, NULL, interval); -} - -/*-------------------------------------------------------------------------* - * HC functions - *-------------------------------------------------------------------------*/ - -/* reset the HC and BUS */ - -static int hc_reset(ohci_t *ohci) -{ - int timeout = 30; - int smm_timeout = 50; /* 0,5 sec */ - - if ((ohci->ent->vendor == PCI_VENDOR_ID_PHILIPS) - && (ohci->ent->device == PCI_DEVICE_ID_PHILIPS_ISP1561)) - { -#define EHCI_USBCMD_OFF 0x20 -#define EHCI_USBCMD_HCRESET (1 << 1) - - /* - * Some multi-function controllers (e.g. ISP1562) allow root hub - * resetting via EHCI registers only. - */ - int index = 0; - long handle; - - do - { - handle = pci_find_device(0x0, 0xffff, index++); - - if (handle >= 0) - { - uint32_t id = 0; - id = pci_read_config_longword(handle, PCIIDR); - if ((PCI_VENDOR_ID_PHILIPS == (id & 0xFFFF)) && (PCI_DEVICE_ID_PHILIPS_ISP1561_2 == (id >> 16))) - { - int timeout = 1000; - uint32_t usb_base_addr = 0xFFFFFFFF; - struct pci_rd *pci_rsc_desc; - pci_rsc_desc = pci_get_resource(handle); /* USB OHCI */ - if ((long)pci_rsc_desc >= 0) - { - unsigned short flags; - do - { - if (!(pci_rsc_desc->flags & FLG_IO)) - { - if (usb_base_addr == 0xFFFFFFFF) - { - uint32_t base = pci_rsc_desc->offset + pci_rsc_desc->start; - writel((uint32_t) readl((uint32_t *) base + EHCI_USBCMD_OFF) | EHCI_USBCMD_HCRESET, (uint32_t *) base + EHCI_USBCMD_OFF); - while (readl((uint32_t *) base + EHCI_USBCMD_OFF) & EHCI_USBCMD_HCRESET) - { - if (timeout-- <= 0) - { - err("USB RootHub reset timed out!\r\n"); - break; - } - wait_ms(1); - } - } - } - flags = pci_rsc_desc->flags; - pci_rsc_desc = (struct pci_rd *) ((uint32_t) pci_rsc_desc->next + (uint32_t) pci_rsc_desc); - } - while (!(flags & FLG_LAST)); - } - } - } - } - while (handle >= 0); - } - - if ((ohci->controller == 0) && (ohci->ent->vendor == PCI_VENDOR_ID_NEC) - && (ohci->ent->device == PCI_DEVICE_ID_NEC_USB)) - { - //if (ohci->handle == 1) /* NEC on motherboard has FPGA clock */ -#if defined(MACHINE_FIREBEE) - { - dbg("USB OHCI set 48MHz clock\r\n"); - pci_write_config_longword(ohci->handle, 0xE4, 0x21); // oscillator & disable ehci - wait_us(1); - } - //else -#else - { - pci_write_config_longword(ohci->handle, 0xE4, pci_read_config_longword(ohci->handle, 0xE4) | 0x01); // disable ehci - wait_us(1); - } -#endif - } - - dbg("control: %x\r\n", readl(&ohci->regs->control)); - - if (readl(&ohci->regs->control) & OHCI_CTRL_IR) - { - /* SMM owns the HC */ - writel(OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */ - - err("USB HC TakeOver from SMM"); - while (readl(&ohci->regs->control) & OHCI_CTRL_IR) - { - wait_us(10); - if (--smm_timeout == 0) - { - err("USB HC TakeOver failed!"); - return -1; - } - } - } - - /* Disable HC interrupts */ - writel(OHCI_INTR_MIE, &ohci->regs->intrdisable); - - dbg("USB OHCI HC reset_hc usb-%s-%c: ctrl = 0x%X\r\n", ohci->slot_name, - (char) ohci->controller + '0', readl(&ohci->regs->control)); - - /* Reset USB (needed by some controllers) */ - ohci->hc_control = 0; - writel(ohci->hc_control, &ohci->regs->control); - - /* HC Reset requires max 10 us delay */ - writel(OHCI_HCR, &ohci->regs->cmdstatus); - while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) - { - if (--timeout == 0) - { - err("USB HC reset timed out!"); -#ifdef DEBUG_OHCI - ohci_dump_status(ohci); -#endif /* DEBUG_OHCI */ - return -1; - } - wait_us(1); - } - return 0; -} - - -/* - * Start an OHCI controller, set the BUS operational - * enable interrupts - * connect the virtual root hub - */ - -static int hc_start(ohci_t *ohci) -{ - uint32_t mask; - unsigned int fminterval; - - ohci->disabled = 1; - - /* - * Tell the controller where the control and bulk lists are - * The lists are empty now. - */ - writel(0, &ohci->regs->ed_controlhead); - writel(0, &ohci->regs->ed_bulkhead); - - writel((uint32_t) ohci->hcca, &ohci->regs->hcca); /* a reset clears this */ - - fminterval = 0x2edf; - writel((fminterval * 9) / 10, &ohci->regs->periodicstart); - - fminterval |= ((((fminterval - 210) * 6) / 7) << 16); - writel(fminterval, &ohci->regs->fminterval); - writel(0x628, &ohci->regs->lsthresh); - - /* start controller operations */ - ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER; - ohci->disabled = 0; - writel(ohci->hc_control, &ohci->regs->control); - - /* disable all interrupts */ - mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD | - OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC | - OHCI_INTR_OC | OHCI_INTR_MIE); - writel(mask, &ohci->regs->intrdisable); - - /* clear all interrupts */ - mask &= ~OHCI_INTR_MIE; - writel(mask, &ohci->regs->intrstatus); - - /* Choose the interrupts we care about now - but w/o MIE */ - mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO; - writel(mask, &ohci->regs->intrenable); - ohci->ndp = roothub_a(ohci); - -#ifdef OHCI_USE_NPS - /* required for AMD-756 and some Mac platforms */ - writel((ohci->ndp | RH_A_NPS) & ~RH_A_PSM, &ohci->regs->roothub.a); - writel(RH_HS_LPSC, &ohci->regs->roothub.status); -#endif /* OHCI_USE_NPS */ - - /* POTPGT delay is bits 24-31, in 2 ms units. */ -#define mdelay(n) ({unsigned long msec = (n); while (msec--) wait_ms(1); }) - - dbg("wait_ms(0x%x)\r\n", (ohci->ndp >> 23) & 0x1fe); - mdelay((ohci->ndp >> 23) & 0x1fe); - - // ohci->ndp &= RH_A_NDP; - - /* connect the virtual root hub */ - ohci->rh.devnum = 0; - - return 0; -} - - - - -/* - * an interrupt happens - */ -static int hc_interrupt(ohci_t *ohci) -{ - struct ohci_regs *regs = ohci->regs; - int ints; - int stat = -1; - - dbg("\r\n"); - if ((ohci->hcca->done_head != 0) && !(swpl(ohci->hcca->done_head) & 0x01)) - { - ints = OHCI_INTR_WDH; - } - else - { - ints = readl(®s->intrstatus); - if (ints == ~ 0UL) - { - ohci->disabled++; - err("OHCI usb-%s-%c device removed!\r\n", ohci->slot_name, (char) ohci->controller + '0'); - return -1; - } - else - { - ints &= readl(®s->intrenable); - if (ints == 0) - { - dbg("no interrupt...\r\n"); - - return 0xff; - } - } - } - - if (ohci->irq) - { - dbg("Interrupt: 0x%x frame: 0x%x bus: %d\r\n", ints, swpw(ohci->hcca->frame_no), ohci->controller); - } - - if (ints & OHCI_INTR_RHSC) /* root hub status change */ - { - stat = 0xff; - } - - if (ints & OHCI_INTR_UE) /* e.g. due to PCI Master/Target Abort */ - { - unsigned short status = pci_read_config_word(ohci->handle, PCISR); - - (void) status; - - err("OHCI Unrecoverable Error, controller usb-%s-%c disabled\r\n(SR:0x%04X%s%s%s%s%s%s)", - ohci->slot_name, (char) ohci->controller + '0', status & 0xFFFF, - status & 0x8000 ? ", Parity error" : "", - status & 0x4000 ? ", Signaled system error" : "", - status & 0x2000 ? ", Received master abort" : "", - status & 0x1000 ? ", Received target abort" : "", - status & 0x800 ? ", Signaled target abort" : "", - status & 0x100 ? ", Data parity error" : ""); - ohci->disabled++; -#ifdef DEBUG_OHCI - ohci_dump(ohci, 1); -#else - if (ohci->irq) - { - wait_ms(1); - } -#endif - /* HC Reset */ - ohci->hc_control = 0; - writel(ohci->hc_control, &ohci->regs->control); - - return -1; - } - - if (ints & OHCI_INTR_WDH) - { - if (ohci->irq) - { - wait_ms(1); - } - - writel(OHCI_INTR_WDH, ®s->intrdisable); - (void) readl(®s->intrdisable); /* flush */ - stat = dl_done_list(ohci); - - writel(OHCI_INTR_WDH, ®s->intrenable); - (void) readl(®s->intrdisable); /* flush */ - } - - if (ints & OHCI_INTR_SO) - { - dbg("USB Schedule overrun\r\n"); - writel(OHCI_INTR_SO, ®s->intrenable); - stat = -1; - } - - /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */ - if (ints & OHCI_INTR_SF) - { - unsigned int frame = swpw(ohci->hcca->frame_no) & 1; - - wait_ms(1); - writel(OHCI_INTR_SF, ®s->intrdisable); - if (ohci->ed_rm_list[frame] != NULL) - { - writel(OHCI_INTR_SF, ®s->intrenable); - } - stat = 0xff; - } - writel(ints, ®s->intrstatus); - - return stat; -} - -static int handle_usb_interrupt(ohci_t *ohci) -{ - if(!ohci->irq_enabled) - { - return 0; - } - - ohci->irq = 0; - ohci->stat_irq = hc_interrupt(ohci); - ohci->irq = -1; - - return 1; /* clear interrupt, 0: disable interrupt */ -} - -void ohci_usb_enable_interrupt(int enable) -{ - int i; - - dbg("usb_enable_interrupt(%d)", enable); - - for(i = 0; i < (sizeof(gohci) / sizeof(ohci_t)); i++) - { - ohci_t *ohci = &gohci[i]; - if(!ohci->handle) - { - continue; - } - ohci->irq_enabled = enable; - if (enable) - writel(OHCI_INTR_MIE, &ohci->regs->intrenable); - else - writel(OHCI_INTR_MIE, &ohci->regs->intrdisable); - } -} - -/* De-allocate all resources.. */ - -static void hc_release_ohci(ohci_t *ohci) -{ - dbg("USB HC release OHCI usb-%s-%c", ohci->slot_name, (char) ohci->controller + '0'); - if (!ohci->disabled) - { - hc_reset(ohci); - } -} - -static void hc_free_buffers(ohci_t *ohci) -{ - if (ohci->td_unaligned != NULL) - { - /* FIXME: driver_mem_free(ohci->td_unaligned); */ - ohci->td_unaligned = NULL; - } - if (ohci->ohci_dev_unaligned != NULL) - { - /* FIXME: driver_mem_free(ohci->ohci_dev_unaligned); */ - ohci->ohci_dev_unaligned = NULL; - } - if (ohci->hcca_unaligned != NULL) - { - /* FIXME: driver_mem_free(ohci->hcca_unaligned); */ - ohci->hcca_unaligned = NULL; - } -} - -/* - * low level initalisation routine, called from usb.c - */ -int ohci_usb_lowlevel_init(int32_t handle, const struct pci_device_id *ent, void **priv) -{ - uint32_t usb_base_addr = 0xFFFFFFFF; - ohci_t *ohci = &gohci[pci_handle2index(handle)]; - struct pci_rd *pci_rsc_desc = pci_get_resource(handle); /* USB OHCI */ - - if (handle && (ent != NULL)) - { - memset(ohci, 0, sizeof(ohci_t)); - ohci->handle = handle; - ohci->ent = ent; - } - else if (!ohci->handle) /* for restart USB cmd */ - { - return -1; - } - - err("ohci %p, handle = 0x%x, fctn = 0x%x\r\n", ohci, handle, PCI_FUNCTION_FROM_HANDLE(handle)); - - ohci->controller = PCI_FUNCTION_FROM_HANDLE(ohci->handle); - - dbg("handle = 0x%x, function = 0x%x\r\n", ohci->handle, ohci->controller); - // ohci->controller = (ohci->handle >> 16) & 3; /* PCI function */ - - /* this must be aligned to a 256 byte boundary */ - ohci->hcca_unaligned = driver_mem_alloc(sizeof(struct ohci_hcca) + 256); - if (ohci->hcca_unaligned == NULL) - { - err("HCCA malloc failed\r\n"); - return -1; - } - - /* align the storage */ - ohci->hcca = (struct ohci_hcca *) (((uint32_t) ohci->hcca_unaligned + 255) & ~255); - memset(ohci->hcca, 0, sizeof(struct ohci_hcca)); - err("aligned ghcca %p\r\n", ohci->hcca); - ohci->ohci_dev_unaligned = driver_mem_alloc(sizeof(struct ohci_device) + 8); - if (ohci->ohci_dev_unaligned == NULL) - { - err("EDs malloc failed\r\n"); - hc_free_buffers(ohci); - - return -1; - } - ohci->ohci_dev = (struct ohci_device *) (((uint32_t) ohci->ohci_dev_unaligned + 7) & ~7); - memset(ohci->ohci_dev, 0, sizeof(struct ohci_device)); - err("aligned EDs %p\r\n", ohci->ohci_dev); - - ohci->td_unaligned = driver_mem_alloc(sizeof(struct td) * (NUM_TD + 1)); - if (ohci->td_unaligned == NULL) - { - err("TDs malloc failed\r\n"); - hc_free_buffers(ohci); - - return -1; - } - - ptd = (struct td *) (((uint32_t) ohci->td_unaligned + 7) & ~7); - - dbg("memset from %p to %p\r\n", ptd, ptd + sizeof(td_t) * NUM_TD); - memset(ptd, 0, sizeof(td_t) * NUM_TD); - dbg("aligned TDs %p\r\n", ptd); - - ohci->disabled = 1; - ohci->sleeping = 0; - ohci->irq = -1; - - if (pci_rsc_desc != NULL) - { - unsigned short flags; - do - { - dbg("\r\nPCI USB descriptors (at %p): flags 0x%04x start 0x%08lx \r\n offset 0x%08lx dmaoffset 0x%08lx length 0x%08lx\r\n", - pci_rsc_desc, - pci_rsc_desc->flags, - pci_rsc_desc->start, - pci_rsc_desc->offset, - pci_rsc_desc->dmaoffset, - pci_rsc_desc->length); - - if (!(pci_rsc_desc->flags & FLG_IO)) - { - /* if this is a memory-mapped resource */ - - if (usb_base_addr == 0xFFFFFFFF) - { - /* and if its not initialized yet */ - - usb_base_addr = pci_rsc_desc->start; - ohci->offset = pci_rsc_desc->offset; - ohci->regs = (void *) (pci_rsc_desc->offset + pci_rsc_desc->start); - ohci->dma_offset = pci_rsc_desc->dmaoffset; - - /* big_endian unused actually */ - if ((pci_rsc_desc->flags & FLG_ENDMASK) == ORD_MOTOROLA) - ohci->big_endian = 0; /* host bridge make swapping intel -> motorola */ - else - ohci->big_endian = 1; /* driver must do swapping intel -> motorola */ - } - } - flags = pci_rsc_desc->flags; - pci_rsc_desc = (struct pci_rd *) ((uint32_t) pci_rsc_desc->next + (uint32_t) pci_rsc_desc); - } - while (!(flags & FLG_LAST)); - } - else - { - hc_free_buffers(ohci); - dbg("pci_get_resource() failed\r\n"); - - return -1; /* get_resource error */ - } - - if (usb_base_addr == 0xFFFFFFFF) - { - hc_free_buffers(ohci); - return -1; - } - - if (handle && (ent != NULL)) - { - ohci->flags = 0; - switch (ent->vendor) - { - case PCI_VENDOR_ID_AL: - ohci->slot_name = "uli1575"; - break; - - case PCI_VENDOR_ID_NEC: - ohci->slot_name = "uPD720101"; - ohci->flags |= OHCI_FLAGS_NEC; - break; - - case PCI_VENDOR_ID_PHILIPS: - ohci->slot_name = "isp1561"; - break; - - default: - ohci->slot_name = "generic"; - break; - } - } - - dbg("OHCI usb-%s-%c, regs address 0x%08X, PCI handle 0x%X\r\n", - ohci->slot_name, - (char) ohci->controller + '0', - ohci->regs, handle); - - if (hc_reset(ohci) < 0) - { - err("Can't reset OHCI usb-%s-%c", ohci->slot_name, (char) ohci->controller + '0'); - hc_release_ohci(ohci); - hc_free_buffers(ohci); - return -1; - } - - if (hc_start(ohci) < 0) - { - err("Can't start OHCI usb-%s-%c", ohci->slot_name, (char) ohci->controller + '0'); - hc_release_ohci(ohci); - hc_free_buffers(ohci); - - /* Initialization failed */ - return -1; - } - -#ifdef DEBUG_OHCI - ohci_dump(ohci, 1); -#endif - pci_hook_interrupt(handle, (pci_interrupt_handler) handle_usb_interrupt, ohci); - if (priv != NULL) - { - *priv = (void *) ohci; - } - - ohci_inited = 1; - - return 0; -} - -int ohci_usb_lowlevel_stop(void *priv) -{ - /* this gets called really early - before the controller has */ - /* even been initialized! */ - - ohci_t *ohci = (ohci_t *) priv; - - if (!ohci_inited) - return 0; - - if (ohci == NULL) - ohci = &gohci[0]; - - pci_unhook_interrupt(ohci->handle); - - hc_reset(ohci); - hc_free_buffers(ohci); - - /* This driver is no longer initialised. It needs a new low-level - * init (board/cpu) before it can be used again. */ - - ohci_inited = 0; - - return 0; -} - diff --git a/pci/pci.c b/pci/pci.c deleted file mode 100644 index 664c790..0000000 --- a/pci/pci.c +++ /dev/null @@ -1,1322 +0,0 @@ -/* - * pci.c - * - * Purpose: PCI configuration for the Coldfire builtin PCI bridge. - * - * Notes: - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 08.01.2013 - * Author: Markus Froeschle - */ - -#include -#include "pci.h" -#include "bas_types.h" -#include "bas_printf.h" -#include "bas_string.h" -#include "util.h" -#include "interrupts.h" -#include "wait.h" - -//#define DEBUG_PCI -#ifdef DEBUG_PCI -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DEBUG_PCI */ -#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0) - -#define pci_config_wait() do { __asm__ __volatile("tpf" ::: "memory"); } while (0) - -/* - * PCI device class descriptions displayed during PCI bus scan - */ -static struct pci_class -{ - int classcode; - char *description; -} pci_classes[] = -{ - { 0x00, "device was built prior definition of the class code field" }, - { 0x01, "Mass Storage Controller" }, - { 0x02, "Network Controller" }, - { 0x03, "Display Controller" }, - { 0x04, "Multimedia Controller" }, - { 0x05, "Memory Controller" }, - { 0x06, "Bridge Device" }, - { 0x07, "Simple Communication Controller" }, - { 0x08, "Base System Peripherial" }, - { 0x09, "Input Device" }, - { 0x0a, "Docking Station" }, - { 0x0b, "Processor" }, - { 0x0c, "Serial Bus Controller" }, - { 0x0d, "Wireless Controller" }, - { 0x0e, "Intelligent I/O Controller" }, - { 0x0f, "Satellite Communication Controller" }, - { 0x10, "Encryption/Decryption Controller" }, - { 0x11, "Data Acquisition and Signal Processing Controller" }, - { 0xff, "Device does not fit any defined class" }, -}; -static int num_pci_classes = sizeof(pci_classes) / sizeof(struct pci_class); - -#define NUM_CARDS 10 -#define NUM_RESOURCES 7 -/* holds the handle of a card at position = array index */ -static int32_t handles[NUM_CARDS]; - -/* holds the card's resource descriptors; filled in pci_device_config() */ -static struct pci_rd resource_descriptors[NUM_CARDS][NUM_RESOURCES]; - -typedef int (*pci_interrupt_handler)(int param); - -/* - * holds the interrupt handler addresses (see pci_hook_interrupt() - * and pci_unhook_interrupt()) of the PCI cards - */ -struct pci_interrupt -{ - int32_t handle; - int irq; - pci_interrupt_handler handler; - int32_t parameter; - struct pci_interrupt *next; -}; - -#define MAX_INTERRUPTS (NUM_CARDS * 3) -static struct pci_interrupt interrupts[MAX_INTERRUPTS]; - -static inline __attribute__((aligned(16))) void chip_errata_135(void) -{ - /* - * Errata type: Silicon - * Affected component: PCI - * Description: When core PCI transactions that involve writes to configuration or I/O space - * are followed by a core line access to line addresses 0x4 and 0xC, core access - * to the XL bus can hang. - * Workaround: Prevent PCI configuration and I/O writes from being followed by the described - * line access by the core by generating a known good XL bus transaction after - * the PCI transaction. - * Create a dummy function which is called immediately after each of the affected - * transactions. There are three requirements for this dummy function. - * 1. The function must be aligned to a 16-byte boundary. - * 2. The function must contain a dummy write to a location on the XL bus, - * preferably one with no side effects. - * 3. The function must be longer than 32 bytes. If it is not, the function should - * be padded with 16- or 48-bit TPF instructions placed after the end of - * the function (after the RTS instruction) such that the length is longer - * than 32 bytes. - */ - - __asm__ __volatile( - " .extern __MBAR \n\t" - " clr.l d0 \n\t" - " move.l d0,__MBAR+0xF0C \n\t" /* Must use direct addressing. write to EPORT module */ - /* xlbus -> slavebus -> eport, writing '0' to register */ - /* has no effect */ - " rts \n\t" - " tpf.l #0x0 \n\t" - " tpf.l #0x0 \n\t" - " tpf.l #0x0 \n\t" - " tpf.l #0x0 \n\t" - " tpf.l #0x0 \n\t" - ::: "memory"); -} - -static inline void chip_errata_055(int32_t handle) -{ - uint32_t dummy; - - return; /* test */ - - /* initiate PCI configuration access to device */ - MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration access special cycle */ - MCF_PCI_PCICAR_BUSNUM(3) | /* note: invalid bus number */ - MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | /* device number, devices 0 - 9 are reserved */ - MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */ - MCF_PCI_PCICAR_DWORD(0); - - /* issue a dummy read to an unsupported bus number (will fail) */ - dummy = * (volatile uint32_t *) PCI_IO_OFFSET; /* access device */ - - /* silently clear the PCI errors we produced just now */ - MCF_PCI_PCIISR = 0xffffffff; /* clear all errors */ - MCF_PCI_PCIGSCR = MCF_PCI_PCIGSCR_PE | MCF_PCI_PCIGSCR_SE; - - (void) dummy; -} - -/* - * Although this pragma stuff should work according to the GCC docs, it doesn't seem to - * with m68k-atari-mint-gcc. At least not currently. - * I nevertheless keep it here for future reference - */ -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wunused-function" - -int32_t pci_get_interrupt_cause(void) -{ - int32_t handle; - int32_t *hdl = &handles[0]; - /* - * loop through all PCI devices... - */ - while ((handle = *hdl++) != -1) - { - uint16_t command_register = swpw(pci_read_config_word(handle, PCICR)); - uint16_t status_register = swpw(pci_read_config_word(handle, PCISR)); - - /* - * ...to see which device caused the interrupt - */ - if ((status_register & PCICSR_INTERRUPT) && !(command_register & PCICSR_INT_DISABLE)) - { - /* device has interrupts enabled and has an active interrupt, so its probably ours */ - - return handle; - } - } - dbg("no interrupt cause found\r\n"); - return -1; -} - -int32_t pci_call_interrupt_chain(int32_t handle, int32_t data) -{ - int i; - - for (i = 0; i < MAX_INTERRUPTS; i++) - { - if (interrupts[i].handle == handle) - { - interrupts[i].handler(data); - - return 1; - } - } - return data; /* unmodified - means: not handled */ -} -#pragma GCC diagnostic pop - - - -/* - * retrieve handle for i'th device - */ -int pci_handle2index(int32_t handle) -{ - int i; - - for (i = 0; i < NUM_CARDS; i++) - { - if (handles[i] == handle) - { - return i; - } - } - return -1; -} - -/* - * retrieve device class (in cleartext) for a PCI classcode - */ -static char *device_class(int classcode) -{ - int i; - - for (i = 0; i < num_pci_classes; i++) - { - if (pci_classes[i].classcode == classcode) - { - return pci_classes[i].description; - } - } - return "not found"; -} - -/* - * do error checking after a PCI transaction - */ -static int pci_check_status(void) -{ - uint32_t pcisr; - uint32_t pcigscr; - - int ret = 0; - - pcisr = MCF_PCI_PCIISR; /* retrieve initiator status register */ - - if (pcisr & MCF_PCI_PCIISR_RE) - { - dbg("PCI initiator retry error. Cleared.\r\n"); - MCF_PCI_PCIISR |= MCF_PCI_PCIISR_RE; - - ret = 1; - } - - if (pcisr & MCF_PCI_PCIISR_IA) - { - dbg("PCI initiator abort. Error cleared\r\n"); - MCF_PCI_PCIISR |= MCF_PCI_PCIISR_IA; - - ret = 1; - } - - if (pcisr & MCF_PCI_PCIISR_TA) - { - dbg("PCI initiator target abort error. Error cleared\r\n"); - MCF_PCI_PCIISR |= MCF_PCI_PCIISR_TA; - - ret = 1; - } - - pcigscr = MCF_PCI_PCIGSCR; - - if (pcigscr & MCF_PCI_PCIGSCR_PE) - { - dbg("PCI parity error. Error cleared\r\n"); - MCF_PCI_PCIGSCR |= MCF_PCI_PCIGSCR_PE; - - ret = 1; - } - - if (pcigscr & MCF_PCI_PCIGSCR_SE) - { - dbg("PCI system error. Error cleared\r\n"); - MCF_PCI_PCIGSCR |= MCF_PCI_PCIGSCR_SE; - - ret = 1; - } - - if (!ret) - { - dbg("no error\r\n"); - } - return ret; -} - -/* - * read an uint32_t from configuration space of card with handle and offset - * - * The returned value is in little endian format. - */ -uint32_t pci_read_config_longword(int32_t handle, int offset) -{ - uint32_t value; - - /* initiate PCI configuration access to device */ - MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration access special cycle */ - MCF_PCI_PCICAR_BUSNUM(PCI_BUS_FROM_HANDLE(handle)) | - MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | /* device number, devices 0 - 9 are reserved */ - MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */ - MCF_PCI_PCICAR_DWORD(offset / 4); - - NOP(); - - value = * (volatile uint32_t *) PCI_IO_OFFSET; /* access device */ - - NOP(); - - /* finish PCI configuration access special cycle (allow regular PCI accesses) */ - MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E; - - pci_check_status(); - - return value; -} - -uint16_t pci_read_config_word(int32_t handle, int offset) -{ - uint16_t value; - - /* - * initiate PCI configuration space access to device - */ - MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration space special cycle */ - MCF_PCI_PCICAR_BUSNUM(PCI_BUS_FROM_HANDLE(handle)) | - MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | - MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | - MCF_PCI_PCICAR_DWORD(offset / 4); - - NOP(); - - value = * (volatile uint16_t *) PCI_IO_OFFSET + (offset & 2); - - NOP(); - - /* finish PCI configuration access special cycle */ - MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E; - - pci_check_status(); - - return value; -} - -uint8_t pci_read_config_byte(int32_t handle, int offset) -{ - uint8_t value; - - /* initiate PCI configuration access to device */ - MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration access special cycle */ - MCF_PCI_PCICAR_BUSNUM(PCI_BUS_FROM_HANDLE(handle)) | - MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | /* device number, devices 0 - 9 are reserved */ - MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */ - MCF_PCI_PCICAR_DWORD(offset / 4); - - NOP(); - - value = * (volatile uint8_t *) (PCI_IO_OFFSET + (offset & 3)); - - NOP(); - - MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E; - - pci_check_status(); - - return value; -} - -/* - * pci_write_config_longword() - * - * write an uint32_t value (must be in little endian format) to the configuration space of a PCI device - */ -int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t value) -{ - /* initiate PCI configuration access to device */ - MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration access special cycle */ - MCF_PCI_PCICAR_BUSNUM(PCI_BUS_FROM_HANDLE(handle)) | - MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | /* device number, devices 0 - 9 are reserved */ - MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | /* function number */ - MCF_PCI_PCICAR_DWORD(offset / 4); - - NOP(); - - * (volatile uint32_t *) PCI_IO_OFFSET = value; /* access device */ - chip_errata_135(); - - NOP(); - - /* finish configuration space access cycle */ - MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E; - - pci_check_status(); - - return PCI_SUCCESSFUL; -} - -/* - * write a 16-bit value to config space. Must be in little-endian format - */ -int32_t pci_write_config_word(int32_t handle, int offset, uint16_t value) -{ - /* initiate PCI configuration access to device */ - MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration access special cycle */ - MCF_PCI_PCICAR_BUSNUM(PCI_BUS_FROM_HANDLE(handle)) | - MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | - MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | - MCF_PCI_PCICAR_DWORD(offset / 4); - chip_errata_135(); - - NOP(); - - * (volatile uint16_t *) (PCI_IO_OFFSET + (offset & 2)) = value; - chip_errata_135(); - - /* finish configuration space access cycle */ - MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E; - - pci_check_status(); - - return PCI_SUCCESSFUL; -} - -/* - * write a single byte to config space - */ -int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value) -{ - MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | - MCF_PCI_PCICAR_BUSNUM(PCI_BUS_FROM_HANDLE(handle)) | - MCF_PCI_PCICAR_DEVNUM(PCI_DEVICE_FROM_HANDLE(handle)) | - MCF_PCI_PCICAR_FUNCNUM(PCI_FUNCTION_FROM_HANDLE(handle)) | - MCF_PCI_PCICAR_DWORD(offset / 4); - chip_errata_135(); - - NOP(); - - * (volatile uint8_t *) (PCI_IO_OFFSET + (offset & 3)) = value; - chip_errata_135(); - - __asm__ __volatile__("tpf" ::: "memory"); - - /* finish configuration space access cycle */ - MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E; - - pci_check_status(); - - return PCI_SUCCESSFUL; -} -/* - * pci_get_resource - * - * get resource descriptor chain for handle - */ -struct pci_rd *pci_get_resource(int32_t handle) -{ - int index = -1; - struct pci_rd *ret; - - index = pci_handle2index(handle); - if (index == -1) - { - ret = NULL; - } - else - { - ret = &resource_descriptors[index][0]; - } - - dbg("pci_get_resource: resource struct for handle %lx (index %d) is at %p\r\n", handle, index, ret); - - return ret; -} - -/* - * pci_find_device() - * - * find index'th device by device_id and vendor_id. Special case: vendor id -1 (0xffff) - * matches all devices. You can search the whole bus by repeatedly calling this function - */ -int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index) -{ - uint16_t bus; - uint16_t device; - uint16_t function = 0; - uint16_t n = 0; - int32_t handle; - - for (bus = 0; bus < 1; bus++) - { - for (device = 10; device < 31; device++) - { - uint32_t value; - uint8_t htr; - - handle = PCI_HANDLE(bus, device, 0); - value = pci_read_config_longword(handle, PCIIDR); - if (value != 0xffffffff) /* we have a device at this position */ - { - if (vendor_id == 0xffff || - (PCI_VENDOR_ID(value) == vendor_id && PCI_DEVICE_ID(value) == device_id)) - { - if (n == index) - { - return handle; - } - n++; - } - - /* - * There is a device at this position, but not the one we are looking for. - * Check to see if it is a multi-function device. We need to look "behind" it - * for the other functions in that case. - */ - if ((htr = pci_read_config_byte(handle, PCIHTR)) & 0x80) - { - /* yes, this is a multi-function device, look for more functions */ - - for (function = 1; function < 8; function++) - { - handle = PCI_HANDLE(bus, device, function); - value = pci_read_config_longword(handle, PCIIDR); - if (value != 0xffffffff) /* device found */ - { - if (vendor_id == 0xffff || - (PCI_VENDOR_ID(value) == vendor_id && PCI_DEVICE_ID(value) == device_id)) - { - if (n == index) - { - return handle; - } - n++; - } - } - } - } - } - } - } - return PCI_DEVICE_NOT_FOUND; -} - -/* - * pci_find_classcode(uint32_t classcode, int index) - * - * Find the index'th pci device with a specific classcode. Bits 0-23 describe this classcode. - * Bits 24 - 26 describe what needs to match: 24: prog interface, 25: PCI subclass, 26: PCI base class. - * If no bits are set, there is a match for each device. - */ -int32_t pci_find_classcode(uint32_t classcode, int index) -{ - uint16_t bus; - uint16_t device; - uint16_t function = 0; - uint16_t n = 0; - int32_t handle; - - for (bus = 0; bus < 2; bus++) - { - for (device = 10; device < 31; device++) - { - uint32_t value; - uint8_t htr; - - handle = PCI_HANDLE(bus, device, 0); - - value = pci_read_config_longword(handle, PCIIDR); - - if (value != 0xffffffff) /* device found */ - { - value = pci_read_config_longword(handle, PCICCR); - - if ((classcode & (1 << 26) ? ((PCI_CLASS_CODE(value) == (classcode & 0xff))) : true) && - (classcode & (1 << 25) ? ((PCI_SUBCLASS(value) == ((classcode & 0xff00) >> 8))) : true) && - (classcode & (1 << 24) ? ((PCI_PROG_IF(value) == ((classcode & 0xff0000) >> 16))) : true)) - { - if (n == index) - { - return handle; - } - n++; - } - - /* - * there is a device at this position, but not the one we are looking for. - * Check to see if it is a multi-function device. We need to look "behind" it - * for the other functions in that case. - */ - if ((htr = pci_read_config_byte(handle, PCIHTR)) & 0x80) - { - /* yes, this is a multi-function device, look for more functions */ - - for (function = 1; function < 8; function++) - { - handle = PCI_HANDLE(bus, device, function); - value = pci_read_config_longword(handle, PCIIDR); - - if (value != 0xffffffff) /* device found */ - { - value = pci_read_config_longword(handle, PCICCR); - - if ((classcode & (1 << 26) ? ((PCI_CLASS_CODE(value) == (classcode & 0xff))) : true) && - (classcode & (1 << 25) ? ((PCI_SUBCLASS(value) == ((classcode & 0xff00) >> 8))) : true) && - (classcode & (1 << 24) ? ((PCI_PROG_IF(value) == ((classcode & 0xff0000) >> 16))) : true)) - { - if (n == index) - { - return handle; - } - n++; - } - } - } - } - } - } - } - return PCI_DEVICE_NOT_FOUND; -} - -int32_t pci_hook_interrupt(int32_t handle, void *handler, void *parameter) -{ - int i; - - pci_interrupt_handler h = handler; - - /* - * find empty slot - */ - for (i = 0; i < MAX_INTERRUPTS; i++) - { - if (interrupts[i].handle == 0) - { - interrupts[i].handle = handle; - interrupts[i].handler = handler; - interrupts[i].parameter = (int32_t) parameter; - - return PCI_SUCCESSFUL; - } - } - return PCI_BUFFER_TOO_SMALL; -} - -int32_t pci_unhook_interrupt(int32_t handle) -{ - int i; - - for (i = 0; i < MAX_INTERRUPTS; i++) - { - if (interrupts[i].handle == handle) - { - memset(&interrupts[i], 0, sizeof(struct pci_interrupt)); - - return PCI_SUCCESSFUL; - } - } - return PCI_DEVICE_NOT_FOUND; -} - -/* - * Not implemented PCI_BIOS functions - */ - -uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_special_cycle(uint16_t bus, uint32_t data) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_get_routing(int32_t handle) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_set_interrupt(int32_t handle) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_get_card_used(int32_t handle, uint32_t *address) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_set_card_used(int32_t handle, uint32_t *callback) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_get_machine_id(void) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_get_pagesize(void) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer) -{ - return PCI_FUNC_NOT_SUPPORTED; -} -int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer) -{ - return PCI_FUNC_NOT_SUPPORTED; -} - -/* - * pci_device_config() - * - * Map card resources, adjust BARs and fill resource descriptors - */ -static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function) -{ - uint32_t address; - int32_t handle; - int16_t index = - 1; - uint8_t il; - struct pci_rd *descriptors; - int i; - uint32_t value; - static uint32_t mem_address = PCI_MEMORY_OFFSET; - static uint32_t io_address = PCI_IO_OFFSET; - uint16_t cr; - - /* - * should make compiler happy (these are used only in debug builds) - */ - (void) value; - (void) il; - - /* determine pci handle from bus, device + function number */ - handle = PCI_HANDLE(bus, device, function); - - /* find index into resource descriptor table for handle */ - index = pci_handle2index(handle); - - if (index == -1) - { - dbg("cannot find index for handle %d\r\n", handle); - return; - } - - /* - * disable device - */ - - cr = swpw(pci_read_config_word(handle, PCICSR)); - cr &= ~3; /* disable device response to address */ - pci_write_config_word(handle, PCICSR, swpw(cr)); - - int barnum = 0; - - descriptors = resource_descriptors[index]; - for (i = 0; i < 6 * 4; i += 4) /* for all bars */ - { - /* - * write all bits of BAR[i] - */ - pci_write_config_longword(handle, PCIBAR0 + i, 0xffffffff); - - /* - * read back value to see which bits have been set - */ - address = swpl(pci_read_config_longword(handle, PCIBAR0 + i)); - - if (address) /* is bar in use? */ - { - /* - * resource descriptor for this device - */ - struct pci_rd *rd = &descriptors[barnum]; - - dbg("address = %08x\r\n", address); - if (IS_PCI_MEM_BAR(address)) - { - /* adjust base address to card's alignment requirements */ - int size = ~(address & 0xfffffff0) + 1; - dbg("device 0x%x: BAR[%d] requests %d bytes of memory\r\n", handle, i / 4, size); - - /* calculate a valid map adress with alignment requirements */ - address = (mem_address + size - 1) & ~(size - 1); - - /* write it to the BAR */ - pci_write_config_longword(handle, PCIBAR0 + i, swpl(address)); - - /* read it back, just to be sure */ - value = swpl(pci_read_config_longword(handle, PCIBAR0 + i)) & ~1; - - dbg("set PCIBAR%d on device 0x%02x to 0x%08x\r\n", - i / 4, handle, value); - - /* fill resource descriptor */ - rd->next = sizeof(struct pci_rd); - rd->flags = 0 | FLG_32BIT | FLG_16BIT | FLG_8BIT | 2; /* little endian, lane swapped */ - rd->start = address; - rd->length = size; - rd->offset = 0; - rd->dmaoffset = 0; - - /* adjust memory adress for next turn */ - mem_address += size; - - cr |= 2; - - /* index to next unused resource descriptor */ - barnum++; - } - else if (IS_PCI_IO_BAR(address)) /* same as above for I/O resources */ - { - int size = ~(address & 0xfffffffc) + 1; - dbg("device 0x%x: BAR[%d] requests %d bytes of I/O space\r\n", handle, i, size); - - address = (io_address + size - 1) & ~(size - 1); - pci_write_config_longword(handle, PCIBAR0 + i, swpl(address | 1)); - value = swpl(pci_read_config_longword(handle, PCIBAR0 + i)); - - dbg("set PCIBAR%d on device 0x%02x to 0x%08x\r\n", - i / 4, handle, value); - - rd->next = sizeof(struct pci_rd); - rd->flags = FLG_IO | FLG_8BIT | FLG_16BIT | FLG_32BIT | 2; - rd->start = address; - rd->offset = 0; - rd->length = size; - rd->dmaoffset = 0; - - io_address += size; - - cr |= 1; - - barnum++; - } - } - } - - /* - * check if we have an expansion ROM - */ - value = swpl(pci_read_config_longword(handle, PCIERBAR)); - - /* - * write all bits of PCIERBAR - */ - pci_write_config_longword(handle, PCIERBAR, 0xffffffff); - - /* - * read back value to see which bits have been set - */ - address = swpl(pci_read_config_longword(handle, PCIERBAR)); - if (address & 1) - { - struct pci_rd *rd = &descriptors[barnum]; - int size = ~(address & ~0x7ff); - - /* expansion ROM active and mapped */ - - /* calculate a valid map adress with alignment requirements */ - address = (mem_address + size - 1) & ~(size - 1); - - /* write it to PCIERBAR and enable ROM */ - pci_write_config_longword(handle, PCIERBAR, swpl(address | 1)); - dbg("set PCIERBAR on device 0x%02x to 0x%08x\r\n", handle, address | 1); - - /* read value back just to be sure */ - dbg("PCIERBAR = %p\r\n", swpl(pci_read_config_longword(handle, PCIERBAR))); - - - rd->next = sizeof(struct pci_rd); - rd->flags = FLG_ROM | FLG_8BIT | FLG_16BIT | FLG_32BIT | 2; - rd->start = address; - rd->offset = 0; - rd->length = size; - rd->dmaoffset = 0; - - mem_address += size; - barnum++; - } - - /* mark end of resource chain */ - if (barnum > 0) - descriptors[barnum - 1].flags |= FLG_LAST; - - /* check if device requests an interrupt */ - il = pci_read_config_byte(handle, PCIIPR); - dbg("device requests interrupts on interrupt pin %d\r\n", il); - - /* enable interrupt on PCI device */ - - il = pci_read_config_byte(handle, PCICR); - il &= ~PCICSR_INT_DISABLE; - pci_write_config_byte(handle, PCICR, il); - - /* - * enable device memory or I/O access - */ - pci_write_config_word(handle, PCICSR, swpw(cr)); -} - -static void pci_bridge_config(uint16_t bus, uint16_t device, uint16_t function) -{ - int32_t handle; - - if (function != 0) - { - dbg("trying to configure a multi-function bridge. Cancelled\r\n"); - return; - } - handle = PCI_HANDLE(bus, device, function); - - pci_write_config_longword(handle, PCIBAR0, 0x40000000); - pci_write_config_longword(handle, PCIBAR1, 0x0); - pci_write_config_longword(handle, PCICSR, 0x146); -} - -/* - * scan PCI bus and display devices found. Create a handle for each device and call pci_device_config() for it - */ -void pci_scan(void) -{ - int16_t handle; - int16_t index = 0; - - xprintf("\r\nPCI bus scan...\r\n\r\n"); - xprintf(" Bus| Dev|Func|Vndr|D-ID|Hndl|\r\n"); - xprintf("----+----+----+----+----+----+\r\n"); - - handle = pci_find_device(0x0, 0xFFFF, index); - while (handle > 0) - { - uint32_t value; - - value = pci_read_config_longword(handle, PCIIDR); - xprintf(" %02x | %02x | %02x |%04x|%04x|%04x| %s (0x%02x)\r\n", - PCI_BUS_FROM_HANDLE(handle), - PCI_DEVICE_FROM_HANDLE(handle), - PCI_FUNCTION_FROM_HANDLE(handle), - PCI_VENDOR_ID(value), PCI_DEVICE_ID(value), - handle, - device_class(pci_read_config_byte(handle, PCICCR)), - pci_read_config_byte(handle, PCICCR)); - - /* save handle to index value so that we'll be able to later find our resources */ - handles[index] = handle; - if (PCI_VENDOR_ID(value) != 0x1057 && PCI_DEVICE_ID(value) != 0x5806) /* do not configure bridge */ - { - /* configure memory and I/O for card */ - pci_device_config(PCI_BUS_FROM_HANDLE(handle), - PCI_DEVICE_FROM_HANDLE(handle), - PCI_FUNCTION_FROM_HANDLE(handle)); - } - else - { - pci_bridge_config(PCI_BUS_FROM_HANDLE(handle), - PCI_DEVICE_FROM_HANDLE(handle), - PCI_FUNCTION_FROM_HANDLE(handle)); - } - handle = pci_find_device(0x0, 0xFFFF, ++index); - } - xprintf("\r\n...finished\r\n"); -} - -/* start of PCI initialization code */ -void init_eport(void) -{ - /* configure IRQ1-7 pins on EPORT falling edge triggered */ - MCF_EPORT_EPPAR = MCF_EPORT_EPPAR_EPPA7(MCF_EPORT_EPPAR_FALLING) | - MCF_EPORT_EPPAR_EPPA6(MCF_EPORT_EPPAR_FALLING) | -#if MACHINE_FIREBEE /* irq5 level triggered on FireBee */ - MCF_EPORT_EPPAR_EPPA5(MCF_EPORT_EPPAR_LEVEL) | -#elif MACHINE_M5484LITE - MCF_EPORT_EPPAR_EPPA5(MCF_EPORT_EPPAR_FALLING) | -#endif /* MACHINE_FIREBEE */ - MCF_EPORT_EPPAR_EPPA4(MCF_EPORT_EPPAR_FALLING) | - MCF_EPORT_EPPAR_EPPA3(MCF_EPORT_EPPAR_FALLING) | - MCF_EPORT_EPPAR_EPPA2(MCF_EPORT_EPPAR_FALLING) | - MCF_EPORT_EPPAR_EPPA1(MCF_EPORT_EPPAR_FALLING); - MCF_EPORT_EPDDR = 0; /* clear data direction register. All pins as input */ - MCF_EPORT_EPFR = -1; /* clear all EPORT interrupt flags */ - MCF_EPORT_EPIER = 0xfe; /* enable all EPORT interrupts (for now) */ -} - -void init_xlbus_arbiter(void) -{ - uint8_t clock_ratio; - - /* setup XL bus arbiter */ - clock_ratio = (MCF_PCI_PCIGSCR >> 24) & 0x07; - if (clock_ratio == 4) - { - MCF_XLB_XARB_CFG = MCF_XLB_XARB_CFG_BA | - MCF_XLB_XARB_CFG_DT | - MCF_XLB_XARB_CFG_AT | - MCF_XLB_XARB_CFG_PLDIS; - } - else - { - MCF_XLB_XARB_CFG = MCF_XLB_XARB_CFG_BA | - MCF_XLB_XARB_CFG_DT | - MCF_XLB_XARB_CFG_AT; - } - - MCF_XLB_XARB_ADRTO = 0x1fffff; - MCF_XLB_XARB_DATTO = 0x1fffff; - MCF_XLB_XARB_BUSTO = 0xffffff; - - /* - * set arbitration priorities for XL bus masters - * - * M0 = ColdFire core - * M2 = Multichannel DMA - * M3 = PCI target interface - */ - - MCF_XLB_XARB_PRIEN = MCF_XLB_XARB_PRIEN_M0 | /* activate programmed priority for Coldfire core */ - MCF_XLB_XARB_PRIEN_M2 | /* activate programmed priority for Multichannel DMA */ - MCF_XLB_XARB_PRIEN_M3; /* activate programmed priority for PCI target interface */ - MCF_XLB_XARB_PRI = MCF_XLB_XARB_PRI_M0P(7) | /* Coldfire core gets lowest */ - MCF_XLB_XARB_PRI_M2P(5) | /* Multichannel DMA mid priority */ - MCF_XLB_XARB_PRI_M3P(3); /* PCI target interface is highest priority */ -} - -void init_pci(void) -{ - int res; - - xprintf("initializing PCI bridge:\r\n"); - - (void) res; /* for now */ - - init_eport(); - init_xlbus_arbiter(); - - MCF_PCI_PCIGSCR = 1; /* reset PCI */ - - /* - * setup the PCI arbiter - */ - MCF_PCIARB_PACR = MCF_PCIARB_PACR_INTMPRI /* internal master priority: high */ - | MCF_PCIARB_PACR_EXTMPRI(0xf) /* external master priority: high */ - | MCF_PCIARB_PACR_INTMINTEN /* enable "internal master broken" interrupt */ - | MCF_PCIARB_PACR_EXTMINTEN(0x0f); /* enable "external master broken" interrupt */ - -#if defined(MACHINE_FIREBEE) - MCF_PAD_PAR_PCIBG = MCF_PAD_PAR_PCIBG_PAR_PCIBG4_TBST | - MCF_PAD_PAR_PCIBG_PAR_PCIBG3_GPIO | - MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 | - MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 | - MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0; - MCF_PAD_PAR_PCIBR = MCF_PAD_PAR_PCIBR_PAR_PCIBR4_IRQ4 | - MCF_PAD_PAR_PCIBR_PAR_PCIBR3_GPIO | - MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 | - MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 | - MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0; -#elif MACHINE_M5484LITE - MCF_PAD_PAR_PCIBG = 0x3ff; /* enable all PCI bus grant and bus requests on the LITE board */ - MCF_PAD_PAR_PCIBR = 0x3ff; -#endif /* MACHINE_FIREBEE */ - - MCF_PCI_PCISCR = MCF_PCI_PCISCR_M | /* memory access control enabled */ - MCF_PCI_PCISCR_B | /* bus master enabled */ - MCF_PCI_PCISCR_M | /* mem access enable */ - MCF_PCI_PCISCR_MA | /* clear master abort error */ - MCF_PCI_PCISCR_MW; /* memory write and invalidate enabled */ - - - /* Setup burst parameters */ - MCF_PCI_PCICR1 = MCF_PCI_PCICR1_CACHELINESIZE(0) | - MCF_PCI_PCICR1_LATTIMER(0x20); /* TODO: test increased latency timer */ - - MCF_PCI_PCICR2 = MCF_PCI_PCICR2_MINGNT(1) | - MCF_PCI_PCICR2_MAXLAT(32); - - // MCF_PCI_PCICR2 = 0; /* this is what Linux does */ - - /* error signaling */ - - MCF_PCI_PCIICR = MCF_PCI_PCIICR_TAE | /* target abort enable */ - MCF_PCI_PCIICR_IAE; /* initiator abort enable */ - - // MCF_PCI_PCIICR = 0; /* this is what Linux does */ - - MCF_PCI_PCIGSCR |= MCF_PCI_PCIGSCR_SEE; /* system error interrupt enable */ - - /* Configure Initiator Windows */ - - /* initiator window 0 base / translation adress register */ - MCF_PCI_PCIIW0BTAR = (PCI_MEMORY_OFFSET | (((PCI_MEMORY_SIZE - 1) >> 8) & 0xffff0000)) - | ((PCI_MEMORY_OFFSET >> 16) & 0xff00); - - NOP(); - dbg("PCIIW0BTAR=0x%08x\r\n", MCF_PCI_PCIIW0BTAR); - - /* initiator window 1 base / translation adress register */ - MCF_PCI_PCIIW1BTAR = (PCI_IO_OFFSET | ((PCI_IO_SIZE - 1) >> 8)) & 0xffff0000; - NOP(); - /* initiator window 2 base / translation address register */ - MCF_PCI_PCIIW2BTAR = 0L; /* not used */ - NOP(); - /* initiator window configuration register */ - MCF_PCI_PCIIWCR = MCF_PCI_PCIIWCR_WINCTRL0_MEMRDLINE | - MCF_PCI_PCIIWCR_WINCTRL1_IO | - MCF_PCI_PCIIWCR_WINCTRL0_E | - MCF_PCI_PCIIWCR_WINCTRL1_E; - NOP(); - /* - * Initialize target control register. - * Used when an external bus master accesses the Coldfire PCI as target - */ - MCF_PCI_PCIBAR0 = 0x40000000; /* 256 kB window */ - MCF_PCI_PCITBATR0 = (uint32_t) &_MBAR[0] | MCF_PCI_PCITBATR0_EN; /* target base address translation register 0 */ - MCF_PCI_PCIBAR1 = 0; /* 1GB window */ - MCF_PCI_PCITBATR1 = MCF_PCI_PCITBATR1_EN; - - /* reset PCI devices */ - MCF_PCI_PCIGSCR &= ~MCF_PCI_PCIGSCR_PR; - do { NOP(); } while (MCF_PCI_PCIGSCR & MCF_PCI_PCIGSCR_PR); /* wait until reset finished */ - xprintf("finished\r\n"); - - /* initialize/clear resource descriptor table */ - memset(&resource_descriptors, 0, NUM_CARDS * NUM_RESOURCES * sizeof(struct pci_rd)); - - /* initialize/clear handles array */ - memset(handles, 0, NUM_CARDS * sizeof(int32_t)); - - /* initialize/clear interrupts array */ - memset(interrupts, 0, MAX_INTERRUPTS * sizeof(struct pci_interrupt)); - - /* - * give devices a chance to come up befor attempting to configure them, - * necessary to properly detect the FireBee USB chip - */ - wait_ms(400); - - /* - * do normal initialization - */ - pci_scan(); -} - - -#ifdef DEBUG_PCI -void pci_print_device_abilities(int32_t handle) -{ - uint16_t value; - uint16_t saved_value; - - saved_value = pci_read_config_word(handle, PCICSR); - pci_write_config_word(handle, PCICSR, 0xffff); - value = swpw(pci_read_config_word(handle, PCICSR)); - dbg("IO: %1d MEM: %1d MSTR:%1d SPCC: %1d MEMW: %1d VGAS: %1d PERR: %1d STEP: %1d SERR: %1d FBTB: %1d\r\n", - value & PCICSR_IO ? 1 : 0, - value & PCICSR_MEMORY ? 1 : 0, - value & PCICSR_MASTER ? 1 : 0, - value & PCICSR_SPECIAL ? 1 : 0, - value & PCICSR_MEMWI ? 1 : 0, - value & PCICSR_VGA_SNOOP ? 1 : 0, - value & PCICSR_PERR ? 1 : 0, - value & PCICSR_STEPPING ? 1 : 0, - value & PCICSR_SERR ? 1 : 0, - value & PCICSR_FAST_BTOB_E ? 1 : 0); - pci_write_config_word(handle, PCICSR, saved_value); -} - - -void pci_print_device_config(int32_t handle) -{ - uint16_t value; - - value = swpw(pci_read_config_word(handle, PCICSR + 2)); - dbg("66M: %1d UDF: %1d FB2B:%1d PERR: %1d TABR: %1d DABR: %1d SERR: %1d PPER: %1d\r\n", - value & PCICSR_66MHZ ? 1 : 0, - value & PCICSR_UDF ? 1 : 0, - value & PCICSR_FAST_BTOB ? 1 : 0, - value & PCICSR_DPARITY_ERROR ? 1 : 0, - value & PCICSR_T_ABORT_S ? 1 : 0, - value & PCICSR_T_ABORT_R ? 1 : 0, - value & PCICSR_M_ABORT_R ? 1 : 0, - value & PCICSR_S_ERROR_S ? 1 : 0, - value & PCICSR_PARITY_ERR ? 1 : 0); -} -#endif /* DEBUG_PCI */ - - diff --git a/pci/pci_wrappers.S b/pci/pci_wrappers.S deleted file mode 100644 index faf166e..0000000 --- a/pci/pci_wrappers.S +++ /dev/null @@ -1,469 +0,0 @@ -/* - * pci.S - * - * Purpose: PCI configuration for the Coldfire builtin PCI bridge. - * - * Notes: - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 08.05.2014 - * Author: David Galvez - */ - -.global _wrapper_find_pci_device -.global _wrapper_find_pci_classcode - -.global _wrapper_read_config_longword -.global _wrapper_read_config_word -.global _wrapper_read_config_byte - -.global _wrapper_fast_read_config_byte -.global _wrapper_fast_read_config_word -.global _wrapper_fast_read_config_longword - -.global _wrapper_write_config_longword -.global _wrapper_write_config_word -.global _wrapper_write_config_byte - -.global _wrapper_get_resource -.global _wrapper_hook_interrupt -.global _wrapper_unhook_interrupt - -.global _wrapper_special_cycle -.global _wrapper_get_routing -.global _wrapper_set_interrupt -.global _wrapper_get_resource -.global _wrapper_get_card_used -.global _wrapper_set_card_used - -.global _wrapper_read_mem_byte -.global _wrapper_read_mem_word -.global _wrapper_read_mem_longword - -.global _wrapper_fast_read_mem_byte -.global _wrapper_fast_read_mem_word -.global _wrapper_fast_read_mem_longword - -.global _wrapper_write_mem_byte -.global _wrapper_write_mem_word -.global _wrapper_write_mem_longword - -.global _wrapper_read_io_byte -.global _wrapper_read_io_word -.global _wrapper_read_io_longword - -.global _wrapper_fast_read_io_byte -.global _wrapper_fast_read_io_word -.global _wrapper_fast_read_io_longword - -.global _wrapper_write_io_byte -.global _wrapper_write_io_word -.global _wrapper_write_io_longword - -.global _wrapper_get_machine_id -.global _wrapper_get_pagesize - -.global _wrapper_virt_to_bus -.global _wrapper_bus_to_virt -.global _wrapper_virt_to_phys -.global _wrapper_phys_to_virt - - -_wrapper_find_pci_device: - move.l D1,-(SP) // index - move.l D0,-(SP) // Vendor ID - move.l #16,D1 - lsr.l D1,D0 - move.l D0,-(SP) // Device ID - jsr _pci_find_device - add.l #12,SP - rts - -_wrapper_find_pci_classcode: - move.l D1,-(SP) // index - move.l D0,-(SP) // ID - jsr _pci_find_classcode - addq.l #8,SP - rts - -_wrapper_read_config_byte: - move.l A0,-(SP) // pointer to space for read data - move.l D1,-(SP) // PCI register - move.l D0,-(SP) // handle - jsr _pci_read_config_byte - move.l 8(SP),A0 // PCI_BIOS expects value in memory - move.l D0,(A0) - add.l #12,SP - move.l #0,D0 - rts - -_wrapper_read_config_word: - move.l A0,-(SP) // pointer to space for read data - move.l D1,-(SP) // PCI register - move.l D0,-(SP) // handle - jsr _pci_read_config_word - move.l 8(SP),A0 // little to big endian - move.l D0,(A0) - mvz.b 1(A0),D0 - lsl.l #8,D0 - move.b (A0),D0 - move.l D0,(A0) // PCI_BIOS expects value in memory, not in D0 - add.l #12,SP - move.l #0,D0 - rts - -_wrapper_read_config_longword: - move.l A0,-(SP) // pointer to space for read data - move.l D1,-(SP) // PCI register - move.l D0,-(SP) // handle - jsr _pci_read_config_longword - move.l 8(SP),A0 // little to big endian - move.l D0,(A0) - mvz.b 3(A0),D0 - lsl.l #8,D0 - move.b 2(A0),D0 - lsl.l #8,D0 - move.b 1(A0),D0 - lsl.l #8,D0 - move.b (A0),D0 - move.l D0,(A0) // PCI_BIOS expects value in memory, not in D0 - add.l #12,SP - move.l #0,D0 - rts - -/* Not implemented */ -_wrapper_fast_read_config_byte: - move.l D1,-(SP) // PCI register - move.l D0,-(SP) // handle - jsr _pci_fast_read_config_byte - addq.l #8,SP - rts - -/* Not implemented */ -_wrapper_fast_read_config_word: - move.l D1,-(SP) // PCI register - move.l D0,-(SP) // handle - jsr _pci_fast_read_config_word - addq.l #8,SP - rts - -/* Not implemented */ -_wrapper_fast_read_config_longword: - move.l D1,-(SP) // PCI register - move.l D0,-(SP) // handle - jsr _pci_fast_read_config_longword - addq.l #8,SP - rts - -_wrapper_write_config_byte: - move.l D2,-(SP) // data to write - move.l D1,-(SP) // PCI register - move.l D0,-(SP) // handle - jsr _pci_write_config_byte - add.l #12,SP - rts - -_wrapper_write_config_word: - move.l D0,-(SP) // make data little endian - moveq #0,D1 - move.w D2,D1 - lsr.l #8,D1 - asl.l #8,D2 - or.l D1,D2 - move.l (SP)+,D0 - move.l D2,-(SP) // data to write - move.l D1,-(SP) // PCI register - move.l D0,-(SP) // handle - jsr _pci_write_config_word - add.l #12,SP - rts - -_wrapper_write_config_longword: - move.l D0,-(SP) - move.l D2,D0 // make data little endian - lsr.l #8,D0 - asl.l #8,D2 - and.l #0x00FF00FF,D0 - and.l #0xFF00FF00,D2 - or.l D0,D2 - swap D2 - move.l (SP)+,D0 - move.l D2,-(SP) // data to write - move.l D1,-(SP) // PCI register - move.l D0,-(SP) // handle - jsr _pci_write_config_longword - add.l #12,SP - rts - -_wrapper_hook_interrupt: - move.l A1,-(SP) // parameter for interrupt handler - move.l A0,-(SP) // pointer to interrupt handler - move.l D0,-(SP) // handle - jsr _pci_hook_interrupt - add.l #12,SP - rts - -_wrapper_unhook_interrupt: - move.l D0,-(SP) // handle - jsr _pci_unhook_interrupt - addq.l #4,SP - rts - -/* Not implemented */ -_wrapper_special_cycle: - move.l D1,-(SP) // special cycle data - move.l D0,-(SP) // bus number - jsr _pci_special_cycle - addq.l #8,SP - rts - -/* Not implemented */ -_wrapper_get_routing: - move.l D0,-(SP) // handle - jsr _pci_get_routing - addq.l #4,SP - rts - -/* Not implemented */ -_wrapper_set_interrupt: - move.l D1,-(SP) // mode - move.l D0,-(SP) // handle - jsr _pci_set_interrupt - addq.l #8,SP - rts - -_wrapper_get_resource: - move.l D0,-(SP) // handle - jsr _pci_get_resource - addq.l #4,SP - rts - -/* Not implemented */ -_wrapper_get_card_used: - move.l D1,-(SP) // address - move.l D0,-(SP) // handle - jsr _pci_get_card_used - addq.l #8,SP - rts - -/* Not implemented */ -_wrapper_set_card_used: - move.l A0,-(SP) // callback - move.l D0,-(SP) // handle - jsr _pci_set_card_used - addq.l #8,SP - rts - -/* Not implemented */ -_wrapper_read_mem_byte: - move.l A0,-(SP) // pointer to data in memory - move.l D1,-(SP) // address to access (in PCI memory address space) - move.l D0,-(SP) // handle - jsr _pci_read_mem_byte - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_read_mem_word: - move.l A0,-(SP) // pointer to data in memory - move.l D1,-(SP) // address to access (in PCI memory address space) - move.l D0,-(SP) // handle - jsr _pci_read_mem_word - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_read_mem_longword: - move.l A0,-(SP) // pointer to data in memory - move.l D1,-(SP) // address to access (in PCI memory address space) - move.l D0,-(SP) // handle - jsr _pci_read_mem_longword - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_fast_read_mem_byte: - move.l D1,-(SP) // address to access (in PCI memory address space) - move.l D0,-(SP) // handle - jsr _pci_read_mem_byte - addq.l #8,SP - rts - -/* Not implemented */ -_wrapper_fast_read_mem_word: - move.l D1,-(SP) // address to access (in PCI memory address space) - move.l D0,-(SP) // handle - jsr _pci_read_mem_word - addq.l #8,SP - rts - -/* Not implemented */ -_wrapper_fast_read_mem_longword: - move.l D1,-(SP) // address to access (in PCI memory address space) - move.l D0,-(SP) // handle - jsr _pci_read_mem_longword - addq.l #8,SP - rts - -/* Not implemented */ -_wrapper_write_mem_byte: - move.l D2,-(SP) // data to write - move.l D1,-(SP) // address to access (in PCI memory address space) - move.l D0,-(SP) // handle - jsr _pci_write_mem_byte - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_write_mem_word: - move.l D2,-(SP) // data to write - move.l D1,-(SP) // address to access (in PCI memory address space) - move.l D0,-(SP) // handle - jsr _pci_write_mem_word - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_write_mem_longword: - move.l D2,-(SP) // data to write - move.l D1,-(SP) // address to access (in PCI memory address space) - move.l D0,-(SP) // handle - jsr _pci_write_mem_longword - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_read_io_byte: - move.l A0,-(SP) // pointer to data in memory - move.l D1,-(SP) // address to access (in PCI I/O address space) - move.l D0,-(SP) // handle - jsr _pci_read_io_byte - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_read_io_word: - move.l A0,-(SP) // pointer to data in memory - move.l D1,-(SP) // address to access (in PCI I/O address space) - move.l D0,-(SP) // handle - jsr _pci_read_io_word - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_read_io_longword: - move.l A0,-(SP) // pointer to data in memory - move.l D1,-(SP) // address to access (in PCI I/O address space) - move.l D0,-(SP) // handle - jsr _pci_read_io_longword - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_fast_read_io_byte: - move.l D1,-(SP) // address to access (in PCI I/O address space) - move.l D0,-(SP) // handle - jsr _pci_read_io_byte - addq.l #8,SP - rts - -/* Not implemented */ -_wrapper_fast_read_io_word: - move.l D1,-(SP) // address to access (in PCI I/O address space) - move.l D0,-(SP) // handle - jsr _pci_read_io_word - addq.l #8,SP - rts - -/* Not implemented */ -_wrapper_fast_read_io_longword: - move.l D1,-(SP) // address to access (in PCI I/O address space) - move.l D0,-(SP) // handle - jsr _pci_read_io_longword - addq.l #8,SP - rts - -/* Not implemented */ -_wrapper_write_io_byte: - move.l D2,-(SP) // data to write - move.l D1,-(SP) // address to access (in PCI I/O address space) - move.l D0,-(SP) // handle - jsr _pci_write_io_byte - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_write_io_word: - move.l D2,-(SP) // data to write - move.l D1,-(SP) // address to access (in PCI I/O address space) - move.l D0,-(SP) // handle - jsr _pci_write_io_word - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_write_io_longword: - move.l D2,-(SP) // data to write - move.l D1,-(SP) // address to access (in PCI I/O address space) - move.l D0,-(SP) // handle - jsr _pci_write_io_longword - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_get_machine_id: - jsr _pci_get_machine_id - rts - -/* Not implemented */ -_wrapper_get_pagesize: - jsr _pci_get_pagesize - rts - -/* Not implemented */ -_wrapper_virt_to_bus: - move.l A0,-(SP) // ptr - move.l D1,-(SP) // address in virtual CPU space - move.l D0,-(SP) // handle - jsr _pci_virt_to_bus - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_bus_to_virt: - move.l A0,-(SP) // ptr - move.l D1,-(SP) // PCI bus address - move.l D0,-(SP) // handle - jsr _pci_bus_to_virt - add.l #12,SP - rts - -/* Not implemented */ -_wrapper_virt_to_phys: - move.l A0,-(SP) // ptr - move.l D0,-(SP) // address in virtual CPU space - jsr _pci_virt_to_phys - addq.l #8,SP - rts - -/* Not implemented */ -_wrapper_phys_to_virt: - move.l A0,-(SP) // ptr - move.l D0,-(SP) // physical CPU address - jsr _pci_phys_to_virt - addq.l #8,SP - rts diff --git a/radeon/radeon_accel.c b/radeon/radeon_accel.c deleted file mode 100644 index 7af4583..0000000 --- a/radeon/radeon_accel.c +++ /dev/null @@ -1,1007 +0,0 @@ -/* - * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and - * VA Linux Systems Inc., Fremont, California. - * - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation on the rights to use, copy, modify, merge, - * publish, distribute, sublicense, and/or sell copies of the Software, - * and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR - * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/* - * Authors: - * Kevin E. Martin - * Rickard E. Faith - * Alan Hourihane - * - * Credits: - * - * Thanks to Ani Joshi for providing source - * code to his Radeon driver. Portions of this file are based on the - * initialization code for that driver. - * - * References: - * - * !!!! FIXME !!!! - * RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical - * Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April - * 1999. - * - * RAGE 128 Software Development Manual (Technical Reference Manual P/N - * SDK-G04000 Rev. 0.01), ATI Technologies: June 1999. - * - * Notes on unimplemented XAA optimizations: - * - * SetClipping: This has been removed as XAA expects 16bit registers - * for full clipping. - * TwoPointLine: The Radeon supports this. Not Bresenham. - * DashedLine with non-power-of-two pattern length: Apparently, there is - * no way to set the length of the pattern -- it is always - * assumed to be 8 or 32 (or 1024?). - * ScreenToScreenColorExpandFill: See p. 4-17 of the Technical Reference - * Manual where it states that monochrome expansion of frame - * buffer data is not supported. - * Color8x8PatternFill: Apparently, an 8x8 color brush cannot take an 8x8 - * pattern from frame buffer memory. - * - */ - -#include "fb.h" -#include "radeonfb.h" - -static struct { - int rop; - int pattern; -} RADEON_ROP[] = { - { ROP3_ZERO, ROP3_ZERO }, /* GXclear */ - { ROP3_DSa, ROP3_DPa }, /* Gxand */ - { ROP3_SDna, ROP3_PDna }, /* GXandReverse */ - { ROP3_S, ROP3_P }, /* GXcopy */ - { ROP3_DSna, ROP3_DPna }, /* GXandInverted */ - { ROP3_D, ROP3_D }, /* GXnoop */ - { ROP3_DSx, ROP3_DPx }, /* GXxor */ - { ROP3_DSo, ROP3_DPo }, /* GXor */ - { ROP3_DSon, ROP3_DPon }, /* GXnor */ - { ROP3_DSxn, ROP3_PDxn }, /* GXequiv */ - { ROP3_Dn, ROP3_Dn }, /* GXinvert */ - { ROP3_SDno, ROP3_PDno }, /* GXorReverse */ - { ROP3_Sn, ROP3_Pn }, /* GXcopyInverted */ - { ROP3_DSno, ROP3_DPno }, /* GXorInverted */ - { ROP3_DSan, ROP3_DPan }, /* GXnand */ - { ROP3_ONE, ROP3_ONE } /* GXset */ -}; - -#define ACCEL_MMIO -#define ACCEL_PREAMBLE() -#define BEGIN_ACCEL(n) radeon_wait_for_fifo(rinfo, (n)) -#define OUT_ACCEL_REG(reg, val) OUTREG(reg, val) -#define FINISH_ACCEL() - -/* MMIO: - * - * Wait for the graphics engine to be completely idle: the FIFO has - * drained, the Pixel Cache is flushed, and the engine is idle. This is - * a standard "sync" function that will make the hardware "quiescent". - */ -void radeon_wait_for_idle_mmio(struct radeonfb_info *rinfo) -{ - int i = 0; - /* Wait for the engine to go idle */ - radeon_wait_for_fifo_function(rinfo, 64); - while(1) - { - for(i = 0; i < RADEON_TIMEOUT; i++) - { - if (!(INREG(RBBM_STATUS) & RBBM_ACTIVE)) - { - radeon_engine_flush(rinfo); - return; - } - } - radeon_engine_reset(rinfo); - radeon_engine_restore(rinfo); - } -} - -#if 0 - -/* This callback is required for multiheader cards using XAA */ -void RADEONRestoreAccelStateMMIO(struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; -// unsigned long pitch64 = ((info->var.xres * (rinfo->bpp / 8) + 0x3f)) >> 6; - OUTREG(DEFAULT_OFFSET, (((INREG(DISPLAY_BASE_ADDR) + rinfo->fb_local_base) >> 10) | (rinfo->pitch << 22))); - /* FIXME: May need to restore other things, like BKGD_CLK FG_CLK... */ - RADEONWaitForIdleMMIO(rinfo); -} - -#endif - -/* Setup for XAA SolidFill */ -void radeon_setup_for_solid_fill(struct fb_info *info, int color, int rop, unsigned int planemask) -{ - struct radeonfb_info *rinfo = info->par; - ACCEL_PREAMBLE(); - /* Save for later clipping */ - rinfo->dp_gui_master_cntl_clip = (rinfo->dp_gui_master_cntl - | GMC_BRUSH_SOLID_COLOR | GMC_SRC_DATATYPE_COLOR | RADEON_ROP[rop].pattern); - BEGIN_ACCEL(4); - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_master_cntl_clip); - OUT_ACCEL_REG(DP_BRUSH_FRGD_CLR, color); - OUT_ACCEL_REG(DP_WRITE_MSK, planemask); - OUT_ACCEL_REG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM)); - FINISH_ACCEL(); -} - -/* Subsequent XAA SolidFillRect */ -void radeon_subsequent_solid_fill_rect_mmio(struct fb_info *info, int x, int y, int w, int h) -{ - struct radeonfb_info *rinfo = info->par; - ACCEL_PREAMBLE(); -#ifdef RADEON_TILING - BEGIN_ACCEL(3); - OUT_ACCEL_REG(DST_PITCH_OFFSET, rinfo->dst_pitch_offset - | ((rinfo->tilingEnabled && (y <= info->var.yres_virtual)) ? DST_TILE_MACRO : 0)); -#else - BEGIN_ACCEL(2); -#endif - OUT_ACCEL_REG(DST_Y_X, (y << 16) | x); - OUT_ACCEL_REG(DST_WIDTH_HEIGHT, (w << 16) | h); - FINISH_ACCEL(); -} - -/* Setup for XAA solid lines */ -void radeon_setup_for_solid_line_mmio(struct fb_info *info, int color, int rop, unsigned int planemask) -{ - struct radeonfb_info *rinfo = info->par; - ACCEL_PREAMBLE(); - /* Save for later clipping */ - rinfo->dp_gui_master_cntl_clip = (rinfo->dp_gui_master_cntl - | GMC_BRUSH_SOLID_COLOR | GMC_SRC_DATATYPE_COLOR | RADEON_ROP[rop].pattern); - if (rinfo->family >= CHIP_FAMILY_RV200) - { - BEGIN_ACCEL(1); - OUT_ACCEL_REG(DST_LINE_PATCOUNT, 0x55 << BRES_CNTL_SHIFT); - } - BEGIN_ACCEL(3); - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_master_cntl_clip); - OUT_ACCEL_REG(DP_BRUSH_FRGD_CLR, color); - OUT_ACCEL_REG(DP_WRITE_MSK, planemask); - FINISH_ACCEL(); -} - -/* Subsequent XAA solid horizontal and vertical lines */ -void radeon_subsequent_solid_hor_vert_line_mmio(struct fb_info *info, int x, int y, int len, int dir) -{ - struct radeonfb_info *rinfo = info->par; - int w = 1; - int h = 1; - ACCEL_PREAMBLE(); - if (dir == DEGREES_0) - w = len; - else - h = len; -#ifdef RADEON_TILING - BEGIN_ACCEL(4); - OUT_ACCEL_REG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM)); - OUT_ACCEL_REG(DST_PITCH_OFFSET, rinfo->dst_pitch_offset - | ((rinfo->tilingEnabled && (y <= info->var.xres_virtual)) ? DST_TILE_MACRO : 0)); -#else - BEGIN_ACCEL(3); - OUT_ACCEL_REG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM)); -#endif - OUT_ACCEL_REG(DST_Y_X, (y << 16) | x); - OUT_ACCEL_REG(DST_WIDTH_HEIGHT, (w << 16) | h); - FINISH_ACCEL(); -} - -/* Subsequent XAA solid TwoPointLine line */ -void radeon_subsequent_solid_two_point_line_mmio(struct fb_info *info, - int xa, int ya, int xb, int yb, int flags) -{ - struct radeonfb_info *rinfo = info->par; - - ACCEL_PREAMBLE(); - - /* TODO: Check bounds -- RADEON only has 14 bits */ - if (!(flags & OMIT_LAST)) - radeon_subsequent_solid_hor_vert_line_mmio(info, xb, yb, 1, DEGREES_0); -#ifdef RADEON_TILING - BEGIN_ACCEL(3); - OUT_ACCEL_REG(DST_PITCH_OFFSET, rinfo->dst_pitch_offset - | ((rinfo->tilingEnabled && (ya <= info->var.yres_virtual)) ? DST_TILE_MACRO : 0)); -#else - BEGIN_ACCEL(2); -#endif - OUT_ACCEL_REG(DST_LINE_START, (ya << 16) | xa); - OUT_ACCEL_REG(DST_LINE_END, (yb << 16) | xb); - FINISH_ACCEL(); -} - -/* Setup for XAA dashed lines - * NOTE: Since we can only accelerate lines with power-of-2 patterns of * length <= 32 - */ -void radeon_setup_for_dashed_line_mmio(struct fb_info *info, int fg, int bg, - int rop, unsigned int planemask, int length, unsigned char *pattern) -{ - struct radeonfb_info *rinfo = info->par; - unsigned long pat = *(unsigned long *) pattern; - - ACCEL_PREAMBLE(); - /* Save for determining whether or not to draw last pixel */ - rinfo->dashLen = length; - rinfo->dashPattern = pat; - if (rinfo->big_endian) - { - switch (length) - { - case 2: pat |= (pat >> 2); /* fall through */ - case 4: pat |= (pat >> 4); /* fall through */ - case 8: pat |= (pat >> 8); /* fall through */ - case 16: pat |= (pat >> 16); - } - } - else - { - switch (length) - { - case 2: pat |= (pat << 2); /* fall through */ - case 4: pat |= (pat << 4); /* fall through */ - case 8: pat |= (pat << 8); /* fall through */ - case 16: pat |= (pat << 16); - } - } - /* Save for later clipping */ - rinfo->dp_gui_master_cntl_clip = (rinfo->dp_gui_master_cntl - | (bg == -1 ? GMC_BRUSH_32X1_MONO_FG_LA : GMC_BRUSH_32X1_MONO_FG_BG) - | RADEON_ROP[rop].pattern | GMC_BYTE_LSB_TO_MSB); - rinfo->dash_fg = fg; - rinfo->dash_bg = bg; - BEGIN_ACCEL((bg == -1) ? 4 : 5); - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_master_cntl_clip); - OUT_ACCEL_REG(DP_WRITE_MSK, planemask); - OUT_ACCEL_REG(DP_BRUSH_FRGD_CLR, fg); - if (bg != -1) - OUT_ACCEL_REG(DP_BRUSH_BKGD_CLR, bg); - OUT_ACCEL_REG(BRUSH_DATA0, pat); - FINISH_ACCEL(); -} - -/* Helper function to draw last point for dashed lines */ -static void RADEONDashedLastPelMMIO(struct fb_info *info, - int x, int y, int fg) -{ - struct radeonfb_info *rinfo = info->par; - unsigned long dp_gui_master_cntl = rinfo->dp_gui_master_cntl_clip; - ACCEL_PREAMBLE(); - dp_gui_master_cntl &= ~GMC_BRUSH_DATATYPE_MASK; - dp_gui_master_cntl |= GMC_BRUSH_SOLID_COLOR; - dp_gui_master_cntl &= ~GMC_SRC_DATATYPE_MASK; - dp_gui_master_cntl |= GMC_SRC_DATATYPE_COLOR; -#ifdef RADEON_TILING - BEGIN_ACCEL(8); - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, dp_gui_master_cntl); - OUT_ACCEL_REG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM)); - OUT_ACCEL_REG(DST_PITCH_OFFSET, rinfo->dst_pitch_offset - | ((rinfo->tilingEnabled && (y <= info->var.yres_virtual)) ? DST_TILE_MACRO : 0)); -#else - BEGIN_ACCEL(7); - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, dp_gui_master_cntl); - OUT_ACCEL_REG(DP_CNTL, (DST_X_LEFT_TO_RIGHT | DST_Y_TOP_TO_BOTTOM)); -#endif - OUT_ACCEL_REG(DP_BRUSH_FRGD_CLR, fg); - OUT_ACCEL_REG(DST_Y_X, (y << 16) | x); - OUT_ACCEL_REG(DST_WIDTH_HEIGHT, (1 << 16) | 1); - /* Restore old values */ - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_master_cntl_clip); - OUT_ACCEL_REG(DP_BRUSH_FRGD_CLR, rinfo->dash_fg); - FINISH_ACCEL(); -} - -/* Subsequent XAA dashed line */ -void radeon_subsequent_dashed_two_point_line_mmio(struct fb_info *info, int xa, int ya, int xb, int yb, int flags, int phase) -{ - struct radeonfb_info *rinfo = info->par; - - ACCEL_PREAMBLE(); - - /* TODO: Check bounds -- RADEON only has 14 bits */ - if (!(flags & OMIT_LAST)) - { - int deltax = xa - xb; - int deltay = ya - yb; - int shift; - if (deltax < 0) - deltax = -deltax; - if (deltay < 0) - deltay = -deltay; - if (deltax > deltay) - shift = deltax; - else - shift = deltay; - shift += phase; - shift %= rinfo->dashLen; - if ((rinfo->dashPattern >> shift) & 1) - RADEONDashedLastPelMMIO(info, xb, yb, rinfo->dash_fg); - else if (rinfo->dash_bg != -1) - RADEONDashedLastPelMMIO(info, xb, yb, rinfo->dash_bg); - } -#ifdef RADEON_TILING - BEGIN_ACCEL(4); - OUT_ACCEL_REG(DST_PITCH_OFFSET, rinfo->dst_pitch_offset - | ((rinfo->tilingEnabled && (ya <= info->var.yres_virtual)) ? DST_TILE_MACRO : 0)); -#else - BEGIN_ACCEL(3); -#endif - OUT_ACCEL_REG(DST_LINE_START, (ya << 16) | xa); - OUT_ACCEL_REG(DST_LINE_PATCOUNT, phase); - OUT_ACCEL_REG(DST_LINE_END, (yb << 16) | xb); - FINISH_ACCEL(); -} - -/* Set up for transparency - * - * Mmmm, Seems as though the transparency compare is opposite to r128. - * It should only draw when source != trans_color, this is the opposite - * of that. - */ -static void radeon_set_transparency_mmio(struct radeonfb_info *rinfo, int trans_color) -{ - if (trans_color != -1) - { - ACCEL_PREAMBLE(); - BEGIN_ACCEL(3); - OUT_ACCEL_REG(CLR_CMP_CLR_SRC, trans_color); - OUT_ACCEL_REG(CLR_CMP_MSK, 0xffffffff); - OUT_ACCEL_REG(CLR_CMP_CNTL, (SRC_CMP_EQ_COLOR | CLR_CMP_SRC_SOURCE)); - FINISH_ACCEL(); - } -} - -/* Setup for XAA screen-to-screen copy */ -void radeon_setup_for_screen_to_screen_copy_mmio(struct fb_info *info, - int xdir, int ydir, int rop, unsigned int planemask, int trans_color) -{ - struct radeonfb_info *rinfo = info->par; - - ACCEL_PREAMBLE(); - rinfo->xdir = xdir; - rinfo->ydir = ydir; - /* Save for later clipping */ -#ifdef RADEON_TILING - rinfo->dp_gui_master_cntl_clip = (rinfo->dp_gui_master_cntl - | GMC_BRUSH_NONE | GMC_SRC_DATATYPE_COLOR | RADEON_ROP[rop].rop - | DP_SRC_SOURCE_MEMORY | GMC_SRC_PITCH_OFFSET_CNTL); -#else - rinfo->dp_gui_master_cntl_clip = (rinfo->dp_gui_master_cntl - | GMC_BRUSH_NONE | GMC_SRC_DATATYPE_COLOR | RADEON_ROP[rop].rop | DP_SRC_SOURCE_MEMORY); -#endif - BEGIN_ACCEL(3); - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_master_cntl_clip); - OUT_ACCEL_REG(DP_WRITE_MSK, planemask); - OUT_ACCEL_REG(DP_CNTL, ((xdir >= 0 ? DST_X_LEFT_TO_RIGHT : 0) | (ydir >= 0 ? DST_Y_TOP_TO_BOTTOM : 0))); - FINISH_ACCEL(); - rinfo->trans_color = trans_color; - if (trans_color != -1) - radeon_set_transparency_mmio(rinfo, trans_color); -} - -/* Subsequent XAA screen-to-screen copy */ -void radeon_subsequent_screen_to_screen_copy_mmio(struct fb_info *info, int xa, int ya, int xb, int yb, int w, int h) -{ - struct radeonfb_info *rinfo = info->par; - - ACCEL_PREAMBLE(); - if (rinfo->xdir < 0) - xa += w - 1, xb += w - 1; - - if (rinfo->ydir < 0) - ya += h - 1, yb += h - 1; - -#ifdef RADEON_TILING - BEGIN_ACCEL(5); - OUT_ACCEL_REG(SRC_PITCH_OFFSET, rinfo->dst_pitch_offset - | ((rinfo->tilingEnabled && (ya <= info->var.yres_virtual)) ? DST_TILE_MACRO : 0)); - OUT_ACCEL_REG(DST_PITCH_OFFSET, rinfo->dst_pitch_offset - | ((rinfo->tilingEnabled && (yb <= info->var.yres_virtual)) ? DST_TILE_MACRO : 0)); -#else - BEGIN_ACCEL(3); -#endif - OUT_ACCEL_REG(SRC_Y_X, (ya << 16) | xa); - OUT_ACCEL_REG(DST_Y_X, (yb << 16) | xb); - OUT_ACCEL_REG(DST_HEIGHT_WIDTH, (h << 16) | w); - FINISH_ACCEL(); -} - -/* XAA screen-to-screen copy */ -void radeon_screen_to_screen_copy_mmio(struct fb_info *info, int xa, int ya, int xb, int yb, int w, int h, int rop) -{ - struct radeonfb_info *rinfo = info->par; - - int xdir = xa - xb; - int ydir = ya - yb; - ACCEL_PREAMBLE(); - if (xdir < 0) - xa += w - 1, xb += w - 1; - if (ydir < 0) - ya += h - 1, yb += h - 1; -#ifdef RADEON_TILING - /* Save for later clipping */ - rinfo->dp_gui_master_cntl_clip = (rinfo->dp_gui_master_cntl - | GMC_BRUSH_NONE | GMC_SRC_DATATYPE_COLOR | RADEON_ROP[rop].rop - | DP_SRC_SOURCE_MEMORY | GMC_SRC_PITCH_OFFSET_CNTL); - BEGIN_ACCEL(8); - - OUT_ACCEL_REG(SRC_PITCH_OFFSET, rinfo->dst_pitch_offset - | ((rinfo->tilingEnabled && (ya <= info->var.yres_virtual)) ? DST_TILE_MACRO : 0)); - OUT_ACCEL_REG(DST_PITCH_OFFSET, rinfo->dst_pitch_offset - | ((rinfo->tilingEnabled && (yb <= info->var.yres_virtual)) ? DST_TILE_MACRO : 0)); -#else - /* Save for later clipping */ - rinfo->dp_gui_master_cntl_clip = (rinfo->dp_gui_master_cntl - | GMC_BRUSH_NONE | GMC_SRC_DATATYPE_COLOR | RADEON_ROP[rop].rop | DP_SRC_SOURCE_MEMORY); - BEGIN_ACCEL(6); -#endif - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_master_cntl_clip); - OUT_ACCEL_REG(DP_WRITE_MSK, -1); - OUT_ACCEL_REG(DP_CNTL, ((xdir >= 0 ? DST_X_LEFT_TO_RIGHT : 0) | (ydir >= 0 ? DST_Y_TOP_TO_BOTTOM : 0))); - OUT_ACCEL_REG(SRC_Y_X, (ya << 16) | xa); - OUT_ACCEL_REG(DST_Y_X, (yb << 16) | xb); - OUT_ACCEL_REG(DST_HEIGHT_WIDTH, (h << 16) | w); - FINISH_ACCEL(); -} - -/* Setup for XAA mono 8x8 pattern color expansion. Patterns with - * transparency use `bg == -1'. This routine is only used if the XAA - * pixmap cache is turned on. - */ -void radeon_setup_for_mono_8x8_pattern_fill_mmio(struct fb_info *info, int patternx, int patterny, - int fg, int bg, int rop, unsigned int planemask) -{ - struct radeonfb_info *rinfo = info->par; - unsigned char pattern[8]; - - ACCEL_PREAMBLE(); - if (rinfo->big_endian) - { - /* Take care of endianness */ - pattern[0] = (patternx & 0x000000ff); - pattern[1] = (patternx & 0x0000ff00) >> 8; - pattern[2] = (patternx & 0x00ff0000) >> 16; - pattern[3] = (patternx & 0xff000000) >> 24; - pattern[4] = (patterny & 0x000000ff); - pattern[5] = (patterny & 0x0000ff00) >> 8; - pattern[6] = (patterny & 0x00ff0000) >> 16; - pattern[7] = (patterny & 0xff000000) >> 24; - /* Save for later clipping */ - rinfo->dp_gui_master_cntl_clip = (rinfo->dp_gui_master_cntl - | (bg == -1 ? GMC_BRUSH_8X8_MONO_FG_LA : GMC_BRUSH_8X8_MONO_FG_BG) - | RADEON_ROP[rop].pattern | GMC_BYTE_MSB_TO_LSB); - } - else - /* Save for later clipping */ - rinfo->dp_gui_master_cntl_clip = (rinfo->dp_gui_master_cntl - | (bg == -1 ? GMC_BRUSH_8X8_MONO_FG_LA : GMC_BRUSH_8X8_MONO_FG_BG) - | RADEON_ROP[rop].pattern); - BEGIN_ACCEL((bg == -1) ? 5 : 6); - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_master_cntl_clip); - OUT_ACCEL_REG(DP_WRITE_MSK, planemask); - OUT_ACCEL_REG(DP_BRUSH_FRGD_CLR, fg); - if (bg != -1) - OUT_ACCEL_REG(DP_BRUSH_BKGD_CLR, bg); - if (rinfo->big_endian) - { - OUT_ACCEL_REG(BRUSH_DATA0, *(unsigned long *) &pattern[0]); - OUT_ACCEL_REG(BRUSH_DATA1, *(unsigned long *) &pattern[4]); - } - else - { - OUT_ACCEL_REG(BRUSH_DATA0, patternx); - OUT_ACCEL_REG(BRUSH_DATA1, patterny); - } - FINISH_ACCEL(); -} - -/* Subsequent XAA 8x8 pattern color expansion. Because they are used in - * the setup function, `patternx' and `patterny' are not used here. - */ -void radeon_subsequent_mono_8x8_pattern_fill_rect_mmio(struct fb_info *info, int patternx, int patterny, - int x, int y, int w, int h) -{ - struct radeonfb_info *rinfo = info->par; - - ACCEL_PREAMBLE(); -#ifdef RADEON_TILING - BEGIN_ACCEL(4); - OUT_ACCEL_REG(DST_PITCH_OFFSET, rinfo->dst_pitch_offset - | ((rinfo->tilingEnabled && (y <= info->var.yres_virtual)) ? DST_TILE_MACRO : 0)); -#else - BEGIN_ACCEL(3); -#endif - OUT_ACCEL_REG(BRUSH_Y_X, (patterny << 8) | patternx); - OUT_ACCEL_REG(DST_Y_X, (y << 16) | x); - OUT_ACCEL_REG(DST_HEIGHT_WIDTH, (h << 16) | w); - FINISH_ACCEL(); -} - -/* Setup for XAA indirect CPU-to-screen color expansion (indirect). - * Because of how the scratch buffer is initialized, this is really a - * mainstore-to-screen color expansion. Transparency is supported when - * `bg == -1'. - */ -void radeon_setup_for_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info, - int fg, int bg, int rop, unsigned int planemask) -{ - struct radeonfb_info *rinfo = info->par; - - ACCEL_PREAMBLE(); - /* Save for later clipping */ - if (rinfo->big_endian) - rinfo->dp_gui_master_cntl_clip = (rinfo->dp_gui_master_cntl - | GMC_DST_CLIPPING | GMC_BRUSH_NONE - | (bg == -1 ? GMC_SRC_DATATYPE_MONO_FG_LA : GMC_SRC_DATATYPE_MONO_FG_BG) - | RADEON_ROP[rop].rop | GMC_BYTE_MSB_TO_LSB | DP_SRC_SOURCE_HOST_DATA); - else - rinfo->dp_gui_master_cntl_clip = (rinfo->dp_gui_master_cntl - | GMC_DST_CLIPPING | GMC_BRUSH_NONE - | (bg == -1 ? GMC_SRC_DATATYPE_MONO_FG_LA : GMC_SRC_DATATYPE_MONO_FG_BG) - | RADEON_ROP[rop].rop | GMC_BYTE_LSB_TO_MSB | DP_SRC_SOURCE_HOST_DATA); - if (rinfo->big_endian) - { - BEGIN_ACCEL(5); - OUT_ACCEL_REG(RBBM_GUICNTL, HOST_DATA_SWAP_NONE); - } - else - BEGIN_ACCEL(4); - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_master_cntl_clip); - OUT_ACCEL_REG(DP_WRITE_MSK, planemask); - OUT_ACCEL_REG(DP_SRC_FRGD_CLR, fg); - OUT_ACCEL_REG(DP_SRC_BKGD_CLR, bg); - FINISH_ACCEL(); -} - -/* Subsequent XAA indirect CPU-to-screen color expansion. This is only - * called once for each rectangle. - */ -void radeon_subsequent_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info, - int x, int y, int w, int h, int skipleft) -{ - struct radeonfb_info *rinfo = info->par; - ACCEL_PREAMBLE(); - rinfo->scanline_h = h; - rinfo->scanline_words = (w + 31) >> 5; -#ifdef RADEON_TILING - BEGIN_ACCEL(5); - OUT_ACCEL_REG(DST_PITCH_OFFSET, rinfo->dst_pitch_offset - | ((rinfo->tilingEnabled && (y <= info->var.yres_virtual)) ? DST_TILE_MACRO : 0)); -#else - BEGIN_ACCEL(4); -#endif - OUT_ACCEL_REG(SC_TOP_LEFT, (y << 16) | ((x+skipleft) & 0xffff)); - OUT_ACCEL_REG(SC_BOTTOM_RIGHT, ((y+h) << 16) | ((x+w) & 0xffff)); - OUT_ACCEL_REG(DST_Y_X, (y << 16) | (x & 0xffff)); - /* Have to pad the width here and use clipping engine */ - OUT_ACCEL_REG(DST_HEIGHT_WIDTH, (h << 16) | ((w + 31) & ~31)); - FINISH_ACCEL(); -} - -/* Subsequent XAA indirect CPU-to-screen color expansion and indirect - * image write. This is called once for each scanline. - */ -void radeon_subsequent_scanline_mmio(struct fb_info *info, unsigned long *src) -{ - struct radeonfb_info *rinfo = info->par; - int left = rinfo->scanline_words; - volatile unsigned long *d; - ACCEL_PREAMBLE(); - --rinfo->scanline_h; - while(left) - { - if (left <= 8) - { - /* Last scanline - finish write to DATA_LAST */ - if (rinfo->scanline_h == 0) - { - BEGIN_ACCEL(left); - /* Unrolling doesn't improve performance */ - for(d = ADDRREG(HOST_DATA_LAST) - (left - 1); left; --left) - *d++ = *src++; - return; - } - else - { - BEGIN_ACCEL(left); - /* Unrolling doesn't improve performance */ - for(d = ADDRREG(HOST_DATA7) - (left - 1); left; --left) - *d++ = *src++; - } - } - else - { - BEGIN_ACCEL(8); - /* Unrolling doesn't improve performance */ - d = ADDRREG(HOST_DATA0); - *d++ = *src++; - *d++ = *src++; - *d++ = *src++; - *d++ = *src++; - *d++ = *src++; - *d++ = *src++; - *d++ = *src++; - *d++ = *src++; - left -= 8; - } - } - FINISH_ACCEL(); -} - -/* Setup for XAA indirect image write */ -void radeon_setup_for_scanline_image_write_mmio(struct fb_info *info, int rop, unsigned int planemask, - int trans_color, int bpp) -{ - struct radeonfb_info *rinfo = info->par; - - ACCEL_PREAMBLE(); - rinfo->scanline_bpp = bpp; - /* Save for later clipping */ - rinfo->dp_gui_master_cntl_clip = (rinfo->dp_gui_master_cntl - | GMC_DST_CLIPPING | GMC_BRUSH_NONE | GMC_SRC_DATATYPE_COLOR | RADEON_ROP[rop].rop - | GMC_BYTE_MSB_TO_LSB | DP_SRC_SOURCE_HOST_DATA); - if (rinfo->big_endian) - { - BEGIN_ACCEL(3); - if (bpp == 16) - OUT_ACCEL_REG(RBBM_GUICNTL, HOST_DATA_SWAP_16BIT); - else if (bpp == 32) - OUT_ACCEL_REG(RBBM_GUICNTL, HOST_DATA_SWAP_32BIT); - else - OUT_ACCEL_REG(RBBM_GUICNTL, HOST_DATA_SWAP_NONE); - } - else - BEGIN_ACCEL(2); - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_master_cntl_clip); - OUT_ACCEL_REG(DP_WRITE_MSK, planemask); - FINISH_ACCEL(); - rinfo->trans_color = trans_color; - if (trans_color != -1) - radeon_set_transparency_mmio(rinfo, trans_color); -} - -/* Subsequent XAA indirect image write. This is only called once for each rectangle. */ -void radeon_subsequent_scanline_image_write_rect_mmio(struct fb_info *info, int x, int y, int w, int h, int skipleft) -{ - struct radeonfb_info *rinfo = info->par; - int shift = 0; /* 32bpp */ - ACCEL_PREAMBLE(); - if (rinfo->bpp == 8) - shift = 3; - else if (rinfo->bpp == 16) - shift = 1; - rinfo->scanline_h = h; - rinfo->scanline_words = (w * rinfo->scanline_bpp + 31) >> 5; -#ifdef RADEON_TILING - BEGIN_ACCEL(5); - OUT_ACCEL_REG(DST_PITCH_OFFSET, rinfo->dst_pitch_offset - | ((rinfo->tilingEnabled && (y <= info->var.yres_virtual)) ? DST_TILE_MACRO : 0)); -#else - BEGIN_ACCEL(4); -#endif - OUT_ACCEL_REG(SC_TOP_LEFT, (y << 16) | ((x+skipleft) & 0xffff)); - OUT_ACCEL_REG(SC_BOTTOM_RIGHT, ((y+h) << 16) | ((x+w) & 0xffff)); - OUT_ACCEL_REG(DST_Y_X, (y << 16) | (x & 0xffff)); - /* Have to pad the width here and use clipping engine */ - OUT_ACCEL_REG(DST_HEIGHT_WIDTH, (h << 16) | ((w + shift) & ~shift)); - FINISH_ACCEL(); -} - -/* Set up the clipping rectangle */ -void radeon_set_clipping_rectangle_mmio(struct fb_info *info, int xa, int ya, int xb, int yb) -{ - struct radeonfb_info *rinfo = info->par; - - unsigned long tmp1 = 0; - unsigned long tmp2 = 0; - ACCEL_PREAMBLE(); - if (xa < 0) - { - tmp1 = (-xa) & 0x3fff; - tmp1 |= SC_SIGN_MASK_LO; - } - else - tmp1 = xa; - if (ya < 0) - { - tmp1 |= (((-ya) & 0x3fff) << 16); - tmp1 |= SC_SIGN_MASK_HI; - } - else - tmp1 |= (ya << 16); - xb++; yb++; - if (xb < 0) - { - tmp2 = (-xb) & 0x3fff; - tmp2 |= SC_SIGN_MASK_LO; - } - else - tmp2 = xb; - if (yb < 0) - { - tmp2 |= (((-yb) & 0x3fff) << 16); - tmp2 |= SC_SIGN_MASK_HI; - } - else - tmp2 |= (yb << 16); - BEGIN_ACCEL(3); - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, (rinfo->dp_gui_master_cntl_clip | GMC_DST_CLIPPING)); - OUT_ACCEL_REG(SC_TOP_LEFT, tmp1); - OUT_ACCEL_REG(SC_BOTTOM_RIGHT, tmp2); - FINISH_ACCEL(); - if (rinfo->trans_color != -1) - radeon_set_transparency_mmio(rinfo, rinfo->trans_color); -} - -/* Disable the clipping rectangle */ -void radeon_disable_clipping_mmio(struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; - - ACCEL_PREAMBLE(); - BEGIN_ACCEL(3); - OUT_ACCEL_REG(DP_GUI_MASTER_CNTL, rinfo->dp_gui_master_cntl_clip); - OUT_ACCEL_REG(SC_TOP_LEFT, 0); - OUT_ACCEL_REG(SC_BOTTOM_RIGHT, (DEFAULT_SC_RIGHT_MAX | DEFAULT_SC_BOTTOM_MAX)); - FINISH_ACCEL(); - if (rinfo->trans_color != -1) - radeon_set_transparency_mmio(rinfo, rinfo->trans_color); -} - -#if 0 - -/* Change surfaces - The idea here is to only set up front buffer as tiled, and back/depth buffer when needed. - Everything else is left as untiled. This means we need to use eplicit src/dst pitch control - when blitting, based on the src/target address, and can no longer use a default offset. - But OTOH we don't need to dynamically change surfaces (for xv for instance), and some - ugly offset / fb reservation (cursor) is gone. And as a bonus, everything actually works... - All surface addresses are relative to MC_FB_LOCATION - */ -void RADEONChangeSurfaces(struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; - int cpp = rinfo->bpp >> 3; - /* depth/front/back pitch must be identical (and the same as displayWidth) */ - int width_bytes = info->var.xres_virtual * cpp; - int bufferSize = (((((info->var.yres_virtual + 15) & ~15) * width_bytes) + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN); - unsigned int depth_pattern, color_pattern, swap_pattern, surf_info; - if (rinfo->big_endian) - { - switch(rinfo->bpp) - { - case 16: - swap_pattern = SURF_AP0_SWP_16BPP | SURF_AP1_SWP_16BPP; - break; - case 32: - swap_pattern = SURF_AP0_SWP_32BPP | SURF_AP1_SWP_32BPP; - break; - default: - swap_pattern = 0; - } - } - else - swap_pattern = 0; - if (rinfo->family < CHIP_FAMILY_R200) - { - color_pattern = SURF_TILE_COLOR_MACRO; - if (cpp == 2) - depth_pattern = SURF_TILE_DEPTH_16BPP; - else - depth_pattern = SURF_TILE_DEPTH_32BPP; - } - else if (rinfo->family >= CHIP_FAMILY_R300) - { - color_pattern = R300_SURF_TILE_COLOR_MACRO; - if (cpp == 2) - depth_pattern = R300_SURF_TILE_COLOR_MACRO; - else - depth_pattern = R300_SURF_TILE_COLOR_MACRO | R300_SURF_TILE_DEPTH_32BPP; - } - else - { - color_pattern = R200_SURF_TILE_COLOR_MACRO; - if (cpp == 2) - depth_pattern = R200_SURF_TILE_DEPTH_16BPP; - else - depth_pattern = R200_SURF_TILE_DEPTH_32BPP; - } - /* we don't need anything like WaitForFifo, no? */ -#ifdef RADEON_TILING - if (rinfo->tilingEnabled) - { - if (rinfo->family >= CHIP_FAMILY_R300) - surf_info = swap_pattern | (width_bytes / 8) | color_pattern; - else - surf_info = swap_pattern | (width_bytes / 16) | color_pattern; - } - else -#endif - surf_info = 0; - OUTREG(SURFACE0_INFO, surf_info); - OUTREG(SURFACE0_LOWER_BOUND, 0); - OUTREG(SURFACE0_UPPER_BOUND, bufferSize - 1); -} - -#endif - -/* The FIFO has 64 slots. This routines waits until at least `entries' - * of these slots are empty. - */ -void radeon_wait_for_fifo_function(struct radeonfb_info *rinfo, int entries) -{ - int i; - while(1) - { - for(i = 0; i < RADEON_TIMEOUT; i++) - { - rinfo->fifo_slots = INREG(RBBM_STATUS) & RBBM_FIFOCNT_MASK; - if (rinfo->fifo_slots >= entries) - return; - } - radeon_engine_reset(rinfo); - radeon_engine_restore(rinfo); - } -} - -/* Flush all dirty data in the Pixel Cache to memory */ -void radeon_engine_flush(struct radeonfb_info *rinfo) -{ - int i; - OUTREGP(RB2D_DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL, ~RB2D_DC_FLUSH_ALL); - for(i = 0; i < RADEON_TIMEOUT; i++) - { - if (!(INREG(RB2D_DSTCACHE_CTLSTAT) & RB2D_DC_BUSY)) - break; - } -} - -/* Reset graphics card to known state */ -void radeon_engine_reset(struct radeonfb_info *rinfo) -{ - unsigned long clock_cntl_index; - unsigned long mclk_cntl; - unsigned long rbbm_soft_reset; - unsigned long host_path_cntl; - - radeon_engine_flush(rinfo); - clock_cntl_index = INREG(CLOCK_CNTL_INDEX); - /* Some ASICs have bugs with dynamic-on feature, which are - * ASIC-version dependent, so we force all blocks on for now - */ - if (rinfo->has_CRTC2) - { - unsigned long tmp; - tmp = INPLL(SCLK_CNTL); - OUTPLL(SCLK_CNTL, ((tmp & ~DYN_STOP_LAT_MASK) | CP_MAX_DYN_STOP_LAT | SCLK_FORCEON_MASK)); - if (rinfo->family == CHIP_FAMILY_RV200) - { - tmp = INPLL(SCLK_MORE_CNTL); - OUTPLL(SCLK_MORE_CNTL, tmp | SCLK_MORE_FORCEON); - } - } - mclk_cntl = INPLL(MCLK_CNTL); - OUTPLL(MCLK_CNTL, (mclk_cntl | FORCEON_MCLKA | FORCEON_MCLKB - | FORCEON_YCLKA | FORCEON_YCLKB | FORCEON_MC | FORCEON_AIC)); - /* Soft resetting HDP thru RBBM_SOFT_RESET register can cause some - * unexpected behaviour on some machines. Here we use - * HOST_PATH_CNTL to reset it. - */ - host_path_cntl = INREG(HOST_PATH_CNTL); - rbbm_soft_reset = INREG(RBBM_SOFT_RESET); - if ((rinfo->family == CHIP_FAMILY_R300) - || (rinfo->family == CHIP_FAMILY_R350) - || (rinfo->family == CHIP_FAMILY_RV350)) - { - unsigned long tmp; - OUTREG(RBBM_SOFT_RESET, (rbbm_soft_reset - | SOFT_RESET_CP | SOFT_RESET_HI | SOFT_RESET_E2)); - INREG(RBBM_SOFT_RESET); - OUTREG(RBBM_SOFT_RESET, 0); - tmp = INREG(RB2D_DSTCACHE_MODE); - OUTREG(RB2D_DSTCACHE_MODE, tmp | (1 << 17)); /* FIXME */ - } - else - { - OUTREG(RBBM_SOFT_RESET, (rbbm_soft_reset | SOFT_RESET_CP - | SOFT_RESET_HI | SOFT_RESET_SE | SOFT_RESET_RE - | SOFT_RESET_PP | SOFT_RESET_E2 | SOFT_RESET_RB)); - INREG(RBBM_SOFT_RESET); - OUTREG(RBBM_SOFT_RESET, (rbbm_soft_reset - & (unsigned long) ~(SOFT_RESET_CP | SOFT_RESET_HI | SOFT_RESET_SE - | SOFT_RESET_RE | SOFT_RESET_PP | SOFT_RESET_E2 | SOFT_RESET_RB))); - INREG(RBBM_SOFT_RESET); - } - OUTREG(HOST_PATH_CNTL, host_path_cntl | HDP_SOFT_RESET); - INREG(HOST_PATH_CNTL); - OUTREG(HOST_PATH_CNTL, host_path_cntl); - if ((rinfo->family != CHIP_FAMILY_R300) - && (rinfo->family != CHIP_FAMILY_R350) - && (rinfo->family != CHIP_FAMILY_RV350)) - OUTREG(RBBM_SOFT_RESET, rbbm_soft_reset); - OUTREG(CLOCK_CNTL_INDEX, clock_cntl_index); - OUTPLL(MCLK_CNTL, mclk_cntl); -} - -/* Restore the acceleration hardware to its previous state */ -void radeon_engine_restore(struct radeonfb_info *rinfo) -{ - BEGIN_ACCEL(1); - /* NOTE: The following RB2D_DSTCACHE_MODE setting will cause the - * R300 to hang. ATI does not see a reason to change it from the - * default BIOS settings (even on non-R300 cards). This setting - * might be removed in future versions of the Radeon driver. - */ - /* Turn of all automatic flushing - we'll do it all */ - if ((rinfo->family != CHIP_FAMILY_R300) - && (rinfo->family != CHIP_FAMILY_R350) - && (rinfo->family != CHIP_FAMILY_RV350)) - OUTREG(RB2D_DSTCACHE_MODE, 0); - rinfo->fb_local_base = INREG(MC_FB_LOCATION) << 16; - BEGIN_ACCEL(3); - OUTREG(DEFAULT_PITCH_OFFSET, rinfo->dst_pitch_offset); - OUTREG(DST_PITCH_OFFSET, rinfo->dst_pitch_offset); - OUTREG(SRC_PITCH_OFFSET, rinfo->dst_pitch_offset); - BEGIN_ACCEL(1); - if (rinfo->big_endian) - OUTREGP(DP_DATATYPE, HOST_BIG_ENDIAN_EN, ~HOST_BIG_ENDIAN_EN); - else - OUTREGP(DP_DATATYPE, 0, ~HOST_BIG_ENDIAN_EN); - /* Restore SURFACE_CNTL - only the first head contains valid data */ - OUTREG(SURFACE_CNTL, rinfo->state.surface_cntl); - BEGIN_ACCEL(2); - OUTREG(DEFAULT_SC_TOP_LEFT, 0); - OUTREG(DEFAULT_SC_BOTTOM_RIGHT, (DEFAULT_SC_RIGHT_MAX | DEFAULT_SC_BOTTOM_MAX)); - BEGIN_ACCEL(1); - OUTREG(DP_GUI_MASTER_CNTL, (rinfo->dp_gui_master_cntl | GMC_BRUSH_SOLID_COLOR | GMC_SRC_DATATYPE_COLOR)); - BEGIN_ACCEL(7); - OUTREG(DST_LINE_START, 0); - OUTREG(DST_LINE_END, 0); - OUTREG(DP_BRUSH_FRGD_CLR, 0xffffffff); - OUTREG(DP_BRUSH_BKGD_CLR, 0x00000000); - OUTREG(DP_SRC_FRGD_CLR, 0xffffffff); - OUTREG(DP_SRC_BKGD_CLR, 0x00000000); - OUTREG(DP_WRITE_MSK, 0xffffffff); - radeon_wait_for_idle_mmio(rinfo); -} - -/* Initialize the acceleration hardware */ -void radeon_engine_init(struct radeonfb_info *rinfo) -{ - unsigned long temp; - OUTREG(RB3D_CNTL, 0); - radeon_engine_reset(rinfo); - temp = radeon_get_dstbpp(rinfo->depth); -#ifdef RADEON_TILING - rinfo->dp_gui_master_cntl = ((temp << GMC_DST_DATATYPE_SHIFT) | GMC_CLR_CMP_CNTL_DIS | GMC_DST_PITCH_OFFSET_CNTL); -#else - rinfo->dp_gui_master_cntl = ((temp << GMC_DST_DATATYPE_SHIFT) | GMC_CLR_CMP_CNTL_DIS); -#endif - radeon_engine_restore(rinfo); -} - diff --git a/radeon/radeon_base.c b/radeon/radeon_base.c deleted file mode 100644 index e86a1fd..0000000 --- a/radeon/radeon_base.c +++ /dev/null @@ -1,2369 +0,0 @@ -/* - * radeon_base.c - * - * framebuffer driver for ATI Radeon chipset video boards - * - * Copyright 2003 Ben. Herrenschmidt - * Copyright 2000 Ani Joshi - * - * i2c bits from Luca Tettamanti - * - * Special thanks to ATI DevRel team for their hardware donations. - * - * ...Insert GPL boilerplate here... - * - * Significant portions of this driver apdated from XFree86 Radeon - * driver which has the following copyright notice: - * - * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and - * VA Linux Systems Inc., Fremont, California. - * - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation on the rights to use, copy, modify, merge, - * publish, distribute, sublicense, and/or sell copies of the Software, - * and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR - * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * XFree86 driver authors: - * - * Kevin E. Martin - * Rickard E. Faith - * Alan Hourihane - * - */ - -#define RADEON_VERSION "0.2.0" - -#include "fb.h" -#include "i2c.h" -#include "pci.h" -#include "radeonfb.h" -#include "edid.h" -#include "ati_ids.h" -#include "driver_mem.h" -#include "bas_printf.h" -#include "exceptions.h" /* for set_ipl() */ - -#define DBG_RADEON -#ifdef DBG_RADEON -#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_RADEON */ - -extern void run_bios(struct radeonfb_info *rinfo); - -#define MAX_MAPPED_VRAM (2048*2048*4) -#define MIN_MAPPED_VRAM (1024*768*4) - -#define CHIP_DEF(id, family, flags) \ -{ \ - PCI_VENDOR_ID_ATI, \ - id, \ - PCI_ANY_ID, \ - PCI_ANY_ID, \ - 0, \ - 0, \ - (flags) | (CHIP_FAMILY_##family) \ -} - -struct pci_device_id radeonfb_pci_table[] = -{ - /* Mobility M6 */ - CHIP_DEF(PCI_CHIP_RADEON_LY, RV100, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RADEON_LZ, RV100, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - /* Radeon VE/7000 */ - CHIP_DEF(PCI_CHIP_RV100_QY, RV100, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV100_QZ, RV100, CHIP_HAS_CRTC2), - /* Radeon IGP320M (U1) */ - CHIP_DEF(PCI_CHIP_RS100_4336, RS100, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY), - /* Radeon IGP320 (A3) */ - CHIP_DEF(PCI_CHIP_RS100_4136, RS100, CHIP_HAS_CRTC2 | CHIP_IS_IGP), - /* IGP330M/340M/350M (U2) */ - CHIP_DEF(PCI_CHIP_RS200_4337, RS200, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY), - /* IGP330/340/350 (A4) */ - CHIP_DEF(PCI_CHIP_RS200_4137, RS200, CHIP_HAS_CRTC2 | CHIP_IS_IGP), - /* Mobility 7000 IGP */ - CHIP_DEF(PCI_CHIP_RS250_4437, RS200, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY), - /* 7000 IGP (A4+) */ - CHIP_DEF(PCI_CHIP_RS250_4237, RS200, CHIP_HAS_CRTC2 | CHIP_IS_IGP), - /* 8500 AIW */ - CHIP_DEF(PCI_CHIP_R200_BB, R200, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R200_BC, R200, CHIP_HAS_CRTC2), - /* 8700/8800 */ - CHIP_DEF(PCI_CHIP_R200_QH, R200, CHIP_HAS_CRTC2), - /* 8500 */ - CHIP_DEF(PCI_CHIP_R200_QL, R200, CHIP_HAS_CRTC2), - /* 9100 */ - CHIP_DEF(PCI_CHIP_R200_QM, R200, CHIP_HAS_CRTC2), - /* Mobility M7 */ - CHIP_DEF(PCI_CHIP_RADEON_LW, RV200, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RADEON_LX, RV200, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - /* 7500 */ - CHIP_DEF(PCI_CHIP_RV200_QW, RV200, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV200_QX, RV200, CHIP_HAS_CRTC2), - /* Mobility M9 */ - CHIP_DEF(PCI_CHIP_RV250_Ld, RV250, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RV250_Le, RV250, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RV250_Lf, RV250, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RV250_Lg, RV250, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - /* 9000/Pro */ - CHIP_DEF(PCI_CHIP_RV250_If, RV250, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV250_Ig, RV250, CHIP_HAS_CRTC2), - /* Mobility 9100 IGP (U3) */ - CHIP_DEF(PCI_CHIP_RS300_5835, RS300, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RS350_7835, RS300, CHIP_HAS_CRTC2 | CHIP_IS_IGP | CHIP_IS_MOBILITY), - /* 9100 IGP (A5) */ - CHIP_DEF(PCI_CHIP_RS300_5834, RS300, CHIP_HAS_CRTC2 | CHIP_IS_IGP), - CHIP_DEF(PCI_CHIP_RS350_7834, RS300, CHIP_HAS_CRTC2 | CHIP_IS_IGP), - /* Mobility 9200 (M9+) */ - CHIP_DEF(PCI_CHIP_RV280_5C61, RV280, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RV280_5C63, RV280, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - /* 9200 */ - CHIP_DEF(PCI_CHIP_RV280_5960, RV280, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV280_5961, RV280, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV280_5962, RV280, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV280_5964, RV280, CHIP_HAS_CRTC2), - /* 9500 */ - CHIP_DEF(PCI_CHIP_R300_AD, R300, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R300_AE, R300, CHIP_HAS_CRTC2), - /* 9600TX / FireGL Z1 */ - CHIP_DEF(PCI_CHIP_R300_AF, R300, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R300_AG, R300, CHIP_HAS_CRTC2), - /* 9700/9500/Pro/FireGL X1 */ - CHIP_DEF(PCI_CHIP_R300_ND, R300, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R300_NE, R300, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R300_NF, R300, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R300_NG, R300, CHIP_HAS_CRTC2), - /* Mobility M10/M11 */ - CHIP_DEF(PCI_CHIP_RV350_NP, RV350, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RV350_NQ, RV350, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RV350_NR, RV350, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RV350_NS, RV350, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RV350_NT, RV350, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RV350_NV, RV350, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - /* 9600/FireGL T2 */ - CHIP_DEF(PCI_CHIP_RV350_AP, RV350, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV350_AQ, RV350, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV360_AR, RV350, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV350_AS, RV350, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV350_AT, RV350, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV350_AV, RV350, CHIP_HAS_CRTC2), - /* 9800/Pro/FileGL X2 */ - CHIP_DEF(PCI_CHIP_R350_AH, R350, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R350_AI, R350, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R350_AJ, R350, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R350_AK, R350, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R350_NH, R350, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R350_NI, R350, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R360_NJ, R350, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R350_NK, R350, CHIP_HAS_CRTC2), - /* Newer stuff */ - CHIP_DEF(PCI_CHIP_RV380_3E50, RV380, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV380_3E54, RV380, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV380_3150, RV380, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RV380_3154, RV380, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RV370_5B60, RV380, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV370_5B62, RV380, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV370_5B64, RV380, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV370_5B65, RV380, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_RV370_5460, RV380, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_RV370_5464, RV380, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_R420_JH, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R420_JI, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R420_JJ, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R420_JK, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R420_JL, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R420_JM, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R420_JN, R420, CHIP_HAS_CRTC2 | CHIP_IS_MOBILITY), - CHIP_DEF(PCI_CHIP_R420_JP, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R423_UH, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R423_UI, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R423_UJ, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R423_UK, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R423_UQ, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R423_UR, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R423_UT, R420, CHIP_HAS_CRTC2), - CHIP_DEF(PCI_CHIP_R423_5D57, R420, CHIP_HAS_CRTC2), - /* Original Radeon/7200 */ - CHIP_DEF(PCI_CHIP_RADEON_QD, RADEON, 0), - CHIP_DEF(PCI_CHIP_RADEON_QE, RADEON, 0), - CHIP_DEF(PCI_CHIP_RADEON_QF, RADEON, 0), - CHIP_DEF(PCI_CHIP_RADEON_QG, RADEON, 0), - { 0, 0, 0, 0, 0, 0, 0 } -}; - - -typedef struct -{ - uint16_t reg; - uint32_t val; -} reg_val; - - -/* these common regs are cleared before mode setting so they do not - * interfere with anything - */ -static reg_val common_regs[] = -{ - { OVR_CLR, 0 }, - { OVR_WID_LEFT_RIGHT, 0 }, - { OVR_WID_TOP_BOTTOM, 0 }, - { OV0_SCALE_CNTL, 0 }, - { SUBPIC_CNTL, 0 }, - { VIPH_CONTROL, 0 }, - { I2C_CNTL_1, 0 }, - { GEN_INT_CNTL, 0 }, - { CAP0_TRIG_CNTL, 0 }, - { CAP1_TRIG_CNTL, 0 }, -}; - -extern struct fb_info *info_fb; -#define rinfo ((struct radeonfb_info *) info_fb->par) -static uint32_t inreg(uint32_t addr) -{ - return INREG(addr); -} - -static void outreg(uint32_t addr, uint32_t val) -{ - OUTREG(addr, val); -} - -#undef rinfo -#undef INREG -#define INREG inreg -#undef OUTREG -#define OUTREG outreg - -void _OUTREGP(struct radeonfb_info *rinfo, uint32_t addr, uint32_t val, uint32_t mask) -{ - uint32_t tmp; - tmp = INREG(addr); - tmp &= (mask); - tmp |= (val); - OUTREG(addr, tmp); -} - -/* - * Note about PLL register accesses: - * - * I have removed the spinlock on them on purpose. The driver now - * expects that it will only manipulate the PLL registers in normal - * task environment, where radeon_msleep() will be called, protected - * by a semaphore (currently the console semaphore) so that no conflict - * will happen on the PLL register index. - * - * With the latest changes to the VT layer, this is guaranteed for all - * calls except the actual drawing/blits which aren't supposed to use - * the PLL registers anyway - * - * This is very important for the workarounds to work properly. The only - * possible exception to this rule is the call to unblank(), which may - * be done at irq time if an oops is in progress. - */ -void radeon_pll_errata_after_index(struct radeonfb_info *rinfo) -{ - if (!(rinfo->errata & CHIP_ERRATA_PLL_DUMMYREADS)) - return; - (void)INREG(CLOCK_CNTL_DATA); - (void)INREG(CRTC_GEN_CNTL); -} - -void radeon_pll_errata_after_data(struct radeonfb_info *rinfo) -{ - if (rinfo->errata & CHIP_ERRATA_PLL_DELAY) - { - /* we can't deal with posted writes here ... */ - radeon_msleep(5); - } - - if (rinfo->errata & CHIP_ERRATA_R300_CG) - { - uint32_t save, tmp; - save = INREG(CLOCK_CNTL_INDEX); - tmp = save & ~(0x3f | PLL_WR_EN); - OUTREG(CLOCK_CNTL_INDEX, tmp); - tmp = INREG(CLOCK_CNTL_DATA); - OUTREG(CLOCK_CNTL_INDEX, save); - } -} - -uint32_t __INPLL(struct radeonfb_info *rinfo, uint32_t addr) -{ - uint32_t data; - - OUTREG8(CLOCK_CNTL_INDEX, addr & 0x0000003f); - radeon_pll_errata_after_index(rinfo); - data = INREG(CLOCK_CNTL_DATA); - radeon_pll_errata_after_data(rinfo); - return data; -} - -void __OUTPLL(struct radeonfb_info *rinfo, uint32_t index, uint32_t val) -{ - OUTREG8(CLOCK_CNTL_INDEX, (index & 0x0000003f) | 0x00000080); - radeon_pll_errata_after_index(rinfo); - OUTREG(CLOCK_CNTL_DATA, val); - radeon_pll_errata_after_data(rinfo); -} - -void __OUTPLLP(struct radeonfb_info *rinfo, uint32_t index, uint32_t val, uint32_t mask) -{ - uint32_t tmp; - - tmp = __INPLL(rinfo, index); - tmp &= (mask); - tmp |= (val); - __OUTPLL(rinfo, index, tmp); -} - -static int round_div(int num, int den) -{ - return(num + (den / 2)) / den; -} - -static uint32_t read_vline_crnt(struct radeonfb_info *rinfo) -{ - return((INREG(CRTC_VLINE_CRNT_VLINE) >> 16) & 0x3FF); -} - -static int radeon_map_ROM(struct radeonfb_info *rinfo) -{ - uint16_t dptr; - uint8_t rom_type; - - /* - * If this is a primary card, there is a shadow copy of the - * ROM somewhere in the first meg. We will just ignore the copy - * and use the ROM directly. - */ - - /* Fix from ATI for problem with Radeon hardware not leaving ROM enabled */ - - uint32_t temp; - - temp = INREG(MPP_TB_CONFIG); - temp &= 0x00ffffffu; - temp |= 0x04 << 24; - OUTREG(MPP_TB_CONFIG, temp); - temp = INREG(MPP_TB_CONFIG); - - if (rinfo->bios_seg == NULL) - { - dbg("%s: ROM failed to map\r\n", __FUNCTION__); - return -1; - } - - /* Very simple test to make sure it appeared */ - if (BIOS_IN16(0) != 0xaa55) - { - dbg("%s: Invalid ROM signature", __FUNCTION__); - goto failed; - } - - /* Look for the PCI data to check the ROM type */ - dptr = BIOS_IN16(0x18); - - /* Check the PCI data signature. If it's wrong, we still assume a normal x86 ROM - * for now, until I've verified this works everywhere. The goal here is more - * to phase out Open Firmware images. - * - * Currently, we only look at the first PCI data, we could iteratre and deal with - * them all, and we should use fb_bios_start relative to start of image and not - * relative start of ROM, but so far, I never found a dual-image ATI card - * - * typedef struct { - * u32 signature; + 0x00 - * u16 vendor; + 0x04 - * u16 device; + 0x06 - * u16 reserved_1; + 0x08 - * u16 dlen; + 0x0a - * u8 drevision; + 0x0c - * u8 class_hi; + 0x0d - * u16 class_lo; + 0x0e - * u16 ilen; + 0x10 - * u16 irevision; + 0x12 - * u8 type; + 0x14 - * u8 indicator; + 0x15 - * u16 reserved_2; + 0x16 - * } pci_data_t; - */ - if (BIOS_IN32(dptr) != (('R' << 24) | ('I' << 16) | ('C' << 8) | 'P')) - { - dbg("%s: PCI DATA signature in ROM incorrect: %p\r\n", __FUNCTION__, BIOS_IN32(dptr)); - goto anyway; - } - rom_type = BIOS_IN8(dptr + 0x14); - switch(rom_type) - { - case 0: - dbg("%s: Found Intel x86 BIOS ROM Image\r\n", __FUNCTION__); - break; - case 1: - dbg("%s: Found Open Firmware ROM Image\r\n", __FUNCTION__); - goto failed; - case 2: - dbg("%s: Found HP PA-RISC ROM Image\r\n", __FUNCTION__); - goto failed; - default: - dbg("%s: Found unknown type %d ROM Image\r\n", rom_type, __FUNCTION__); - goto failed; - } -anyway: - /* Locate the flat panel infos, do some sanity checking !!! */ - rinfo->fp_bios_start = BIOS_IN16(0x48); - dbg("%s: BIOS start offset: %p\r\n", __FUNCTION__, BIOS_IN16(0x48)); - - /* Save BIOS PLL informations */ - { - uint16_t pll_info_block = BIOS_IN16(rinfo->fp_bios_start + 0x30); - - dbg("%s: BIOS PLL info block offset: %p\r\n", __FUNCTION__, BIOS_IN16(rinfo->fp_bios_start + 0x30)); - rinfo->bios_pll.sclk = BIOS_IN16(pll_info_block + 0x08); - rinfo->bios_pll.mclk = BIOS_IN16(pll_info_block + 0x0a); - rinfo->bios_pll.ref_clk = BIOS_IN16(pll_info_block + 0x0e); - rinfo->bios_pll.ref_div = BIOS_IN16(pll_info_block + 0x10); - rinfo->bios_pll.ppll_min = BIOS_IN32(pll_info_block + 0x12); - rinfo->bios_pll.ppll_max = BIOS_IN32(pll_info_block + 0x16); - } - return 0; - -failed: - rinfo->bios_seg = NULL; - return -1; //-ENXIO; -} - -/* - * Read PLL infos from chip registers - */ -static int radeon_probe_pll_params(struct radeonfb_info *rinfo) -{ - uint8_t ppll_div_sel; - unsigned Ns, Nm, M; - unsigned sclk, mclk, tmp, ref_div; - int hTotal, vTotal, num, denom, m, n; - double hz, vclk; - int32_t xtal; - uint32_t start_tv, stop_tv; - int timeout = 0; - int ipl; - - /* - * Ugh, we cut interrupts, bad bad bad, but we want some precision - * here, so... --BenH - */ - dbg("%s: radeon_probe_pll_params\r\n", __FUNCTION__); - - /* Flush PCI buffers ? */ - tmp = INREG16(DEVICE_ID); - - ipl = set_ipl(0); - - start_tv = get_timer(); - while (read_vline_crnt(rinfo) != 0) - { - if ((get_timer() - start_tv) > US_TO_TIMER(10000000UL)) /* 10 sec */ - { - timeout=1; - break; - } - } - - if (!timeout) - { - start_tv = get_timer(); - while (read_vline_crnt(rinfo) == 0) - { - if ((get_timer() - start_tv) > US_TO_TIMER(1000000UL)) /* 1 sec */ - { - timeout=1; - break; - } - } - if (!timeout) - { - while (read_vline_crnt(rinfo) != 0) - { - if ((get_timer() - start_tv) > US_TO_TIMER(10000000UL)) /* 10 sec */ - { - timeout=1; - break; - } - } - } - } - stop_tv = get_timer(); - - set_ipl(ipl); - - hz = US_TO_TIMER(1000000.0) / (double)(stop_tv - start_tv); - dbg("%s:hz %d\r\n", __FUNCTION__, (int32_t) hz); - - hTotal = ((INREG(CRTC_H_TOTAL_DISP) & 0x1ff) + 1) * 8; - vTotal = ((INREG(CRTC_V_TOTAL_DISP) & 0x3ff) + 1); - dbg("%s:hTotal=%d\r\n", __FUNCTION__, hTotal); - dbg("%s:vTotal=%d\r\n", __FUNCTION__, vTotal); - - vclk = (double) hTotal * (double) vTotal * hz; - dbg("%s:vclk=%d\r\n", __FUNCTION__, (int) vclk); - - switch ((INPLL(PPLL_REF_DIV) & 0x30000) >> 16) - { - case 1: - n = ((INPLL(M_SPLL_REF_FB_DIV) >> 16) & 0xff); - m = (INPLL(M_SPLL_REF_FB_DIV) & 0xff); - num = 2 * n; - denom = 2 * m; - break; - - case 2: - n = ((INPLL(M_SPLL_REF_FB_DIV) >> 8) & 0xff); - m = (INPLL(M_SPLL_REF_FB_DIV) & 0xff); - num = 2 * n; - denom = 2 * m; - break; - - case 0: - default: - num = 1; - denom = 1; - break; - } - - ppll_div_sel = INREG8(CLOCK_CNTL_INDEX + 1) & 0x3; - radeon_pll_errata_after_index(rinfo); - - n = (INPLL(PPLL_DIV_0 + ppll_div_sel) & 0x7ff); - m = (INPLL(PPLL_REF_DIV) & 0x3ff); - - num *= n; - denom *= m; - - switch((INPLL(PPLL_DIV_0 + ppll_div_sel) >> 16) & 0x7) - { - case 1: - denom *= 2; - break; - - case 2: - denom *= 4; - break; - - case 3: - denom *= 8; - break; - - case 4: - denom *= 3; - break; - - case 6: - denom *= 6; - break; - - case 7: - denom *= 12; - break; - } - vclk *= (double) denom; - vclk /= (double) (1000 * num); - xtal = (int32_t) vclk; - - if ((xtal > 26900) && (xtal < 27100)) - xtal = 2700; /* 27 MHz */ - else if ((xtal > 14200) && (xtal < 14400)) - xtal = 1432; - else if ((xtal > 29400) && (xtal < 29600)) - xtal = 2950; - else - { - dbg("%s: xtal calculation failed: %d\r\n", __FUNCTION__, xtal); - return -1; /* error */ - } - - tmp = INPLL(M_SPLL_REF_FB_DIV); - ref_div = INPLL(PPLL_REF_DIV) & 0x3ff; - - Ns = (tmp & 0xff0000) >> 16; - Nm = (tmp & 0xff00) >> 8; - M = (tmp & 0xff); - - sclk = round_div((2 * Ns * xtal), (2 * M)); - mclk = round_div((2 * Nm * xtal), (2 * M)); - - /* we're done, hopefully these are sane values */ - rinfo->pll.ref_clk = xtal; - rinfo->pll.ref_div = ref_div; - rinfo->pll.sclk = sclk; - rinfo->pll.mclk = mclk; - - return 0; -} - -/* - * Retreive PLL infos by register probing... - */ -static void radeon_get_pllinfo(struct radeonfb_info *rinfo) -{ - /* - * In the case nothing works, these are defaults; they are mostly - * incomplete, however. It does provide ppll_max and _min values - * even for most other methods, however. - */ - dbg("%s:\r\n", __FUNCTION__); - - switch(rinfo->chipset) - { - case PCI_DEVICE_ID_ATI_RADEON_QW: - case PCI_DEVICE_ID_ATI_RADEON_QX: - rinfo->pll.ppll_max = 35000; - rinfo->pll.ppll_min = 12000; - rinfo->pll.mclk = 23000; - rinfo->pll.sclk = 23000; - rinfo->pll.ref_clk = 2700; - break; - - case PCI_DEVICE_ID_ATI_RADEON_QL: - case PCI_DEVICE_ID_ATI_RADEON_QN: - case PCI_DEVICE_ID_ATI_RADEON_QO: - case PCI_DEVICE_ID_ATI_RADEON_Ql: - case PCI_DEVICE_ID_ATI_RADEON_BB: - rinfo->pll.ppll_max = 35000; - rinfo->pll.ppll_min = 12000; - rinfo->pll.mclk = 27500; - rinfo->pll.sclk = 27500; - rinfo->pll.ref_clk = 2700; - break; - - case PCI_DEVICE_ID_ATI_RADEON_Id: - case PCI_DEVICE_ID_ATI_RADEON_Ie: - case PCI_DEVICE_ID_ATI_RADEON_If: - case PCI_DEVICE_ID_ATI_RADEON_Ig: - rinfo->pll.ppll_max = 35000; - rinfo->pll.ppll_min = 12000; - rinfo->pll.mclk = 25000; - rinfo->pll.sclk = 25000; - rinfo->pll.ref_clk = 2700; - break; - - case PCI_DEVICE_ID_ATI_RADEON_ND: - case PCI_DEVICE_ID_ATI_RADEON_NE: - case PCI_DEVICE_ID_ATI_RADEON_NF: - case PCI_DEVICE_ID_ATI_RADEON_NG: - rinfo->pll.ppll_max = 40000; - rinfo->pll.ppll_min = 20000; - rinfo->pll.mclk = 27000; - rinfo->pll.sclk = 27000; - rinfo->pll.ref_clk = 2700; - break; - - case PCI_DEVICE_ID_ATI_RADEON_QD: - case PCI_DEVICE_ID_ATI_RADEON_QE: - case PCI_DEVICE_ID_ATI_RADEON_QF: - case PCI_DEVICE_ID_ATI_RADEON_QG: - default: - rinfo->pll.ppll_max = 35000; - rinfo->pll.ppll_min = 12000; - rinfo->pll.mclk = 16600; - rinfo->pll.sclk = 16600; - rinfo->pll.ref_clk = 2700; - break; - } - rinfo->pll.ref_div = INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK; - - /* - * Check out if we have an X86 which gave us some PLL informations - * and if yes, retreive them - */ - if (!force_measure_pll && (rinfo->bios_seg != NULL)) - { - rinfo->pll.sclk = rinfo->bios_pll.sclk; - rinfo->pll.mclk = rinfo->bios_pll.mclk; - rinfo->pll.ref_clk = rinfo->bios_pll.ref_clk; - rinfo->pll.ref_div = rinfo->bios_pll.ref_div; - rinfo->pll.ppll_min = rinfo->bios_pll.ppll_min; - rinfo->pll.ppll_max = rinfo->bios_pll.ppll_max; - dbg("%s: Retreived PLL infos from BIOS\r\n", __FUNCTION__); - - goto found; - } - - /* - * We didn't get PLL parameters from either OF or BIOS, we try to - * probe them - */ - if (radeon_probe_pll_params(rinfo) == 0) - { - dbg("%s: Retreived PLL infos from registers\r\n", __FUNCTION__); - goto found; - } - - /* - * Fall back to already-set defaults... - */ - dbg("%s: Used default PLL infos\r\n", __FUNCTION__); - -found: - /* - * Some methods fail to retreive SCLK and MCLK values, we apply default - * settings in this case (200Mhz). If that really happne often, we could - * fetch from registers instead... - */ - if (rinfo->pll.mclk == 0) - rinfo->pll.mclk = 20000; - if (rinfo->pll.sclk == 0) - rinfo->pll.sclk = 20000; - - dbg("%s: Reference=%d MHz (RefDiv=0x%x) Memory=%d MHz\r\n", __FUNCTION__, - rinfo->pll.ref_clk / 100, rinfo->pll.ref_div, rinfo->pll.mclk / 100); - dbg("%s: System=%d MHz PLL min %d, max %d\r\n", __FUNCTION__, - rinfo->pll.sclk / 100, rinfo->pll.ppll_min, rinfo->pll.ppll_max); -} - -static int var_to_depth(const struct fb_var_screeninfo *var) -{ - if (var->bits_per_pixel != 16) - return var->bits_per_pixel; - - return(var->green.length == 5) ? 15 : 16; -} - -int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; - struct fb_var_screeninfo v; - int nom, den; - uint32_t pitch; - - dbg("%s:\r\n", __FUNCTION__); - - /* clocks over 135 MHz have heat isues with DVI on RV100 */ - if ((rinfo->mon1_type == MT_DFP) && (rinfo->family == CHIP_FAMILY_RV100) && ((100000000 / var->pixclock) > 13500)) - { - dbg("%s: mode %d x %d x %d", __FUNCTION__, var->xres, var->yres, var->bits_per_pixel); - dbg("%s: rejected, RV100 DVI clock over 135 MHz\r\n", __FUNCTION__); - - return -1; //-EINVAL; - } - - if (radeon_match_mode(rinfo, &v, var)) - return -1; //-EINVAL; - - switch (v.bits_per_pixel) - { - case 0 ... 8: - v.bits_per_pixel = 8; - break; - - case 9 ... 16: - v.bits_per_pixel = 16; - break; - -#if 0 /* Doesn't seem to work */ - case 17 ... 24: - v.bits_per_pixel = 24; - break; -#endif - case 25 ... 32: - v.bits_per_pixel = 32; - break; - - default: - return -1; //-EINVAL; - } - - switch (var_to_depth(&v)) - { - case 8: - nom = den = 1; - v.red.offset = v.green.offset = v.blue.offset = 0; - v.red.length = v.green.length = v.blue.length = 8; - v.transp.offset = v.transp.length = 0; - break; - - case 15: - nom = 2; - den = 1; - v.red.offset = 10; - v.green.offset = 5; - v.blue.offset = 0; - v.red.length = v.green.length = v.blue.length = 5; - v.transp.offset = v.transp.length = 0; - break; - - case 16: - nom = 2; - den = 1; - v.red.offset = 11; - v.green.offset = 5; - v.blue.offset = 0; - v.red.length = 5; - v.green.length = 6; - v.blue.length = 5; - v.transp.offset = v.transp.length = 0; - break; - - case 24: - nom = 4; - den = 1; - v.red.offset = 16; - v.green.offset = 8; - v.blue.offset = 0; - v.red.length = v.blue.length = v.green.length = 8; - v.transp.offset = v.transp.length = 0; - break; - - case 32: - nom = 4; - den = 1; - v.red.offset = 16; - v.green.offset = 8; - v.blue.offset = 0; - v.red.length = v.blue.length = v.green.length = 8; - v.transp.offset = 24; - v.transp.length = 8; - break; - - default: - dbg("radeonfb: mode %d x %d x %d rejected, color depth invalid\r\n ", - var->xres, var->yres, var->bits_per_pixel); - return -1; //-EINVAL; - } - - if (v.yres_virtual < v.yres) - v.yres_virtual = v.yres; - if (v.xres_virtual < v.xres) - v.xres_virtual = v.xres; - - /* - * XXX I'm adjusting xres_virtual to the pitch, that may help XFree - * with some panels, though I don't quite like this solution - */ - pitch = ((v.xres_virtual * ((v.bits_per_pixel + 1) / 8) + 0x3f) & ~(0x3f)) >> 6; - v.xres_virtual = (pitch << 6) / ((v.bits_per_pixel + 1) / 8); - - if (((v.xres_virtual * v.yres_virtual * nom) / den) > info->screen_size) - { - dbg("%s: mode %d x %d rejected (screen size too small)\r\n", __FUNCTION__, v.xres_virtual, v.yres_virtual); - return -1; //-EINVAL; - } - - if (v.xres_virtual < v.xres) - v.xres = v.xres_virtual; - - if (v.xoffset < 0) - v.xoffset = 0; - - if (v.yoffset < 0) - v.yoffset = 0; - - if (v.xoffset > v.xres_virtual - v.xres) - v.xoffset = v.xres_virtual - v.xres - 1; - - if (v.yoffset > v.yres_virtual - v.yres) - v.yoffset = v.yres_virtual - v.yres - 1; - - v.red.msb_right = v.green.msb_right = v.blue.msb_right = 0; - v.transp.offset = v.transp.length = v.transp.msb_right = 0; - - dbg("%s: using mode %d x %d \r\n", __FUNCTION__, v.xres, v.yres); - - memcpy(var, &v, sizeof(v)); - - return 0; -} - -int radeonfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; -// DPRINT("radeonfb: radeonfb_pan_display\r\n"); - if ((var->xoffset + var->xres) > var->xres_virtual) - return -1; //-EINVAL; - - if (((var->yoffset * var->xres_virtual) + var->xoffset) >= - (rinfo->mapped_vram - (var->yres * var->xres * (var->bits_per_pixel / 8)))) - return -1; //-EINVAL; - - if (rinfo->asleep) - return 0; - - radeon_wait_for_fifo(rinfo, 2); - rinfo->fb_offset = ((var->yoffset * var->xres_virtual + var->xoffset) * var->bits_per_pixel / 8) & ~7; - rinfo->dst_pitch_offset = (rinfo->pitch << 22) | ((rinfo->fb_local_base + rinfo->fb_offset) >> 10); - OUTREG(CRTC_OFFSET, rinfo->fb_offset); - - return 0; -} - -short mirror; - -int radeonfb_ioctl(unsigned int cmd, unsigned long arg, struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; - uint32_t tmp; - uint32_t value = 0; - - switch(cmd) - { - /* - * TODO: set mirror accordingly for non-Mobility chipsets with 2 CRTC's - * and do something better using 2nd CRTC instead of just hackish - * routing to second output - */ - case FBIO_RADEON_SET_MIRROR: - if (!rinfo->is_mobility) - return -1; //-EINVAL; - radeon_wait_for_fifo(rinfo, 2); - - if (value & 0x01) - { - tmp = INREG(LVDS_GEN_CNTL); - tmp |= (LVDS_ON | LVDS_BLON); - } - else - { - tmp = INREG(LVDS_GEN_CNTL); - tmp &= ~(LVDS_ON | LVDS_BLON); - } - OUTREG(LVDS_GEN_CNTL, tmp); - - if (value & 0x02) - { - tmp = INREG(CRTC_EXT_CNTL); - tmp |= CRTC_CRT_ON; - mirror = 1; - } - else - { - tmp = INREG(CRTC_EXT_CNTL); - tmp &= ~CRTC_CRT_ON; - mirror = 0; - } - OUTREG(CRTC_EXT_CNTL, tmp); - return 0; - - case FBIO_RADEON_GET_MIRROR: - if (!rinfo->is_mobility) - return -1; //-EINVAL; - tmp = INREG(LVDS_GEN_CNTL); - if ((LVDS_ON | LVDS_BLON) & tmp) - value |= 0x01; - tmp = INREG(CRTC_EXT_CNTL); - if (CRTC_CRT_ON & tmp) - value |= 0x02; - return 0; - - default: - return -1; //-EINVAL; - } - return -1; //-EINVAL; -} - -int32_t radeon_screen_blank(struct radeonfb_info *rinfo, int32_t blank, int32_t mode_switch) -{ - uint32_t val; - uint32_t tmp_pix_clks; - int unblank = 0; - - if (rinfo->lock_blank) - return 0; - - dbg("radeonfb: radeon_screen_blank\r\n"); - radeon_engine_idle(); - val = INREG(CRTC_EXT_CNTL); - val &= ~(CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS | CRTC_VSYNC_DIS); - - switch(blank) - { - case FB_BLANK_VSYNC_SUSPEND: - val |= (CRTC_DISPLAY_DIS | CRTC_VSYNC_DIS); - break; - - case FB_BLANK_HSYNC_SUSPEND: - val |= (CRTC_DISPLAY_DIS | CRTC_HSYNC_DIS); - break; - - case FB_BLANK_POWERDOWN: - val |= (CRTC_DISPLAY_DIS | CRTC_VSYNC_DIS | CRTC_HSYNC_DIS); - break; - - case FB_BLANK_NORMAL: - val |= CRTC_DISPLAY_DIS; - break; - - case FB_BLANK_UNBLANK: - default: - unblank = 1; - break; - } - OUTREG(CRTC_EXT_CNTL, val); - - switch(rinfo->mon1_type) - { - case MT_DFP: - if (unblank) - OUTREGP(FP_GEN_CNTL, (FP_FPON | FP_TMDS_EN), ~(FP_FPON | FP_TMDS_EN)); - else - { - if (mode_switch || blank == FB_BLANK_NORMAL) - break; - OUTREGP(FP_GEN_CNTL, 0, ~(FP_FPON | FP_TMDS_EN)); - } - break; - - case MT_LCD: - rinfo->lvds_timer = 0; - val = INREG(LVDS_GEN_CNTL); - if (unblank) - { - uint32_t target_val = (val & ~LVDS_DISPLAY_DIS) | LVDS_BLON | LVDS_ON - | LVDS_EN | (rinfo->init_state.lvds_gen_cntl & (LVDS_DIGON | LVDS_BL_MOD_EN)); - if ((val ^ target_val) == LVDS_DISPLAY_DIS) - OUTREG(LVDS_GEN_CNTL, target_val); - else if ((val ^ target_val) != 0) - { - OUTREG(LVDS_GEN_CNTL, target_val & ~(LVDS_ON | LVDS_BL_MOD_EN)); - rinfo->init_state.lvds_gen_cntl &= ~LVDS_STATE_MASK; - rinfo->init_state.lvds_gen_cntl |= target_val & LVDS_STATE_MASK; - if (mode_switch) - { - radeon_msleep(rinfo->panel_info.pwr_delay); - OUTREG(LVDS_GEN_CNTL, target_val); - } - else - { - rinfo->pending_lvds_gen_cntl = target_val; - rinfo->lvds_timer = (int32_t)rinfo->panel_info.pwr_delay; - } - } - } - else - { - val |= LVDS_DISPLAY_DIS; - OUTREG(LVDS_GEN_CNTL, val); - /* We don't do a full switch-off on a simple mode switch */ - if (mode_switch || blank == FB_BLANK_NORMAL) - break; - - /* Asic bug, when turning off LVDS_ON, we have to make sure - * RADEON_PIXCLK_LVDS_ALWAYS_ON bit is off - */ - tmp_pix_clks = INPLL(PIXCLKS_CNTL); - if (rinfo->is_mobility || rinfo->is_IGP) - OUTPLLP(PIXCLKS_CNTL, 0, ~PIXCLK_LVDS_ALWAYS_ONb); - - val &= ~(LVDS_BL_MOD_EN); - OUTREG(LVDS_GEN_CNTL, val); - - wait(100); - - val &= ~(LVDS_ON | LVDS_EN); - OUTREG(LVDS_GEN_CNTL, val); - val &= ~LVDS_DIGON; - rinfo->pending_lvds_gen_cntl = val; - rinfo->lvds_timer = (int32_t)rinfo->panel_info.pwr_delay; - rinfo->init_state.lvds_gen_cntl &= ~LVDS_STATE_MASK; - rinfo->init_state.lvds_gen_cntl |= val & LVDS_STATE_MASK; - - if (rinfo->is_mobility || rinfo->is_IGP) - OUTPLL(PIXCLKS_CNTL, tmp_pix_clks); - } - break; - case MT_CRT: - // todo: powerdown DAC - default: - break; - } - /* let fbcon do a soft blank for us */ - return(blank == FB_BLANK_NORMAL) ? -1 /* -EINVAL */ : 0; -} - -int radeonfb_blank(int blank, struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; - - if (rinfo->asleep) - return 0; - - return radeon_screen_blank(rinfo, blank, 0); -} - -static int radeon_setcolreg(unsigned regno, unsigned red, unsigned green, - unsigned blue, unsigned transp, struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; - uint32_t pindex; - - if (regno > 255) - return 1; - - red >>= 8; - green >>= 8; - blue >>= 8; - - rinfo->palette[regno].red = red; - rinfo->palette[regno].green = green; - rinfo->palette[regno].blue = blue; - - /* default */ - pindex = regno; - if (!rinfo->asleep) - { - radeon_wait_for_fifo(rinfo, 9); - if (rinfo->bpp == 16) - { - pindex = regno * 8; - if (rinfo->depth == 16 && regno > 63) - return 1; - if (rinfo->depth == 15 && regno > 31) - return 1; - - /* - * For 565, the green component is mixed one order - * below - */ - if (rinfo->depth == 16) - { - OUTREG(PALETTE_INDEX, pindex>>1); - OUTREG(PALETTE_DATA,(rinfo->palette[regno>>1].red << 16) - | (green << 8) | (rinfo->palette[regno>>1].blue)); - green = rinfo->palette[regno<<1].green; - } - } - if (rinfo->depth != 16 || regno < 32) - { - OUTREG(PALETTE_INDEX, pindex); - OUTREG(PALETTE_DATA, (red << 16) | (green << 8) | blue); - } - } - return 0; -} - -int radeonfb_setcolreg(unsigned regno, unsigned red, unsigned green, - unsigned blue, unsigned transp, struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; - uint32_t dac_cntl2, vclk_cntl = 0; - int rc; - - if (!rinfo->asleep) - { - if (rinfo->is_mobility) - { - vclk_cntl = INPLL(VCLK_ECP_CNTL); - OUTPLL(VCLK_ECP_CNTL, vclk_cntl & ~PIXCLK_DAC_ALWAYS_ONb); - } - - /* Make sure we are on first palette */ - if (rinfo->has_CRTC2) - { - dac_cntl2 = INREG(DAC_CNTL2); - dac_cntl2 &= ~DAC2_PALETTE_ACCESS_CNTL; - OUTREG(DAC_CNTL2, dac_cntl2); - } - } - rc = radeon_setcolreg(regno, red, green, blue, transp, info); - if (!rinfo->asleep && rinfo->is_mobility) - OUTPLL(VCLK_ECP_CNTL, vclk_cntl); - - return rc; -} - -static void radeon_save_state(struct radeonfb_info *rinfo, struct radeon_regs *save) -{ - /* CRTC regs */ - save->crtc_gen_cntl = INREG(CRTC_GEN_CNTL); - save->crtc_ext_cntl = INREG(CRTC_EXT_CNTL); - save->crtc_more_cntl = INREG(CRTC_MORE_CNTL); - save->dac_cntl = INREG(DAC_CNTL); - save->crtc_h_total_disp = INREG(CRTC_H_TOTAL_DISP); - save->crtc_h_sync_strt_wid = INREG(CRTC_H_SYNC_STRT_WID); - save->crtc_v_total_disp = INREG(CRTC_V_TOTAL_DISP); - save->crtc_v_sync_strt_wid = INREG(CRTC_V_SYNC_STRT_WID); - save->crtc_pitch = INREG(CRTC_PITCH); - save->surface_cntl = INREG(SURFACE_CNTL); - - /* FP regs */ - save->fp_crtc_h_total_disp = INREG(FP_CRTC_H_TOTAL_DISP); - save->fp_crtc_v_total_disp = INREG(FP_CRTC_V_TOTAL_DISP); - save->fp_gen_cntl = INREG(FP_GEN_CNTL); - save->fp_h_sync_strt_wid = INREG(FP_H_SYNC_STRT_WID); - save->fp_horz_stretch = INREG(FP_HORZ_STRETCH); - save->fp_v_sync_strt_wid = INREG(FP_V_SYNC_STRT_WID); - save->fp_vert_stretch = INREG(FP_VERT_STRETCH); - save->lvds_gen_cntl = INREG(LVDS_GEN_CNTL); - save->lvds_pll_cntl = INREG(LVDS_PLL_CNTL); - save->tmds_crc = INREG(TMDS_CRC); - save->tmds_transmitter_cntl = INREG(TMDS_TRANSMITTER_CNTL); - save->vclk_ecp_cntl = INPLL(VCLK_ECP_CNTL); - /* PLL regs */ - - save->clk_cntl_index = INREG(CLOCK_CNTL_INDEX) & ~0x3f; - radeon_pll_errata_after_index(rinfo); - save->ppll_div_3 = INPLL(PPLL_DIV_3); - save->ppll_ref_div = INPLL(PPLL_REF_DIV); -} - -static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs *mode) -{ - int i; - - dbg("radeonfb: radeon_write_pll_regs\r\n"); - radeon_wait_for_fifo(rinfo, 20); - -#if 0 - /* Workaround from XFree */ - if (rinfo->is_mobility) - { - /* A temporal workaround for the occational blanking on certain laptop - * panels. This appears to related to the PLL divider registers - * (fail to lock?). It occurs even when all dividers are the same - * with their old settings. In this case we really don't need to - * fiddle with PLL registers. By doing this we can avoid the blanking - * problem with some panels. - */ - if ((mode->ppll_ref_div == (INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK)) - && (mode->ppll_div_3 == (INPLL(PPLL_DIV_3) & (PPLL_POST3_DIV_MASK | PPLL_FB3_DIV_MASK)))) - { - /* We still have to force a switch to selected PPLL div thanks to - * an XFree86 driver bug which will switch it away in some cases - * even when using UseFDev */ - OUTREGP(CLOCK_CNTL_INDEX, - mode->clk_cntl_index & PPLL_DIV_SEL_MASK, - ~PPLL_DIV_SEL_MASK); - radeon_pll_errata_after_index(rinfo); - radeon_pll_errata_after_data(rinfo); - return; - } - } -#endif - - /* Swich VCKL clock input to CPUCLK so it stays fed while PPLL updates*/ - OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_CPUCLK, ~VCLK_SRC_SEL_MASK); - - /* Reset PPLL & enable atomic update */ - OUTPLLP(PPLL_CNTL, PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN, - ~(PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN)); - - /* Switch to selected PPLL divider */ - OUTREGP(CLOCK_CNTL_INDEX, mode->clk_cntl_index & PPLL_DIV_SEL_MASK, ~PPLL_DIV_SEL_MASK); - radeon_pll_errata_after_index(rinfo); - radeon_pll_errata_after_data(rinfo); - - /* Set PPLL ref. div */ - if (rinfo->family == CHIP_FAMILY_R300 || rinfo->family == CHIP_FAMILY_RS300 - || rinfo->family == CHIP_FAMILY_R350 || rinfo->family == CHIP_FAMILY_RV350) - { - if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) - { - /* - * When restoring console mode, use saved PPLL_REF_DIV - * setting. - */ - OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, 0); - } - else - { - /* R300 uses ref_div_acc field as real ref divider */ - OUTPLLP(PPLL_REF_DIV,(mode->ppll_ref_div << R300_PPLL_REF_DIV_ACC_SHIFT),~R300_PPLL_REF_DIV_ACC_MASK); - } - } - else - OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, ~PPLL_REF_DIV_MASK); - - /* Set PPLL divider 3 & post divider*/ - OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_FB3_DIV_MASK); - OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK); - - /* Write update */ - while (INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R); - OUTPLLP(PPLL_REF_DIV, PPLL_ATOMIC_UPDATE_W, ~PPLL_ATOMIC_UPDATE_W); - - /* Wait read update complete */ - /* FIXME: Certain revisions of R300 can't recover here. Not sure of - the cause yet, but this workaround will mask the problem for now. - Other chips usually will pass at the very first test, so the - workaround shouldn't have any effect on them. */ - - for (i = 0; (i < 10000 && INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R); i++); - OUTPLL(HTOTAL_CNTL, 0); - - /* Clear reset & atomic update */ - OUTPLLP(PPLL_CNTL, 0, ~(PPLL_RESET | PPLL_SLEEP | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN)); - - /* We may want some locking ... oh well */ - radeon_msleep(5); - - /* Switch back VCLK source to PPLL */ - OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_PPLLCLK, ~VCLK_SRC_SEL_MASK); -} - -static void radeon_wait_vbl(struct fb_info *info) -{ - uint32_t cnt = INREG(CRTC_CRNT_FRAME); - - while (cnt == INREG(CRTC_CRNT_FRAME)); -} - -static void radeon_timer_func(void) -{ - struct fb_info *info = info_fb; - struct radeonfb_info *rinfo = info->par; - struct fb_var_screeninfo var; - uint32_t x, y; - int chg, disp; - -#ifdef FIXME_LATER - static int32_t start_timer; - - /* delayed LVDS panel power up/down */ - if (rinfo->lvds_timer) - { - if (!start_timer) - start_timer = *_hz_200; - - if (((*_hz_200 - start_timer) * 5) >= (int32_t)rinfo->lvds_timer) - { - rinfo->lvds_timer = 0; - radeon_engine_idle(); - OUTREG(LVDS_GEN_CNTL, rinfo->pending_lvds_gen_cntl); - } - } - else - start_timer = 0; -#endif /* FIXME_LATER */ - - if (rinfo->RenderCallback != NULL) - rinfo->RenderCallback(rinfo); - - if ((info->screen_mono != NULL) && info->update_mono) - { - int32_t foreground = 255, background = 0; - uint8_t *src_buf = (uint8_t *)info->screen_mono; - int skipleft = ((int)src_buf & 3) << 3; - int dst_x = 0; - int w = (int)info->var.xres_virtual; - int h = (int)info->var.yres_virtual; - -// info->fbops->SetClippingRectangle(info,0,0,w-1,h-1); - src_buf = (uint8_t*)((int32_t)src_buf & ~3); - dst_x -= (int32_t)skipleft; - w += (int32_t)skipleft; - info->fbops->SetupForScanlineCPUToScreenColorExpandFill(info,(int)foreground,(int)background,3,0xffffffff); - info->fbops->SubsequentScanlineCPUToScreenColorExpandFill(info,(int)dst_x,0,w,h,skipleft); - - while (--h >= 0) - { - info->fbops->SubsequentScanline(info, (unsigned long *) src_buf); - src_buf += (info->var.xres_virtual >> 3); - } - -// info->fbops->DisableClipping(info); - if (info->update_mono > 0) - info->update_mono = 0; - } - - if ((info->var.xres_virtual != info->var.xres) - || (info->var.yres_virtual != info->var.yres)) - { - int ipl; - ipl = set_ipl(0); - - chg = 0; - x = info->var.xoffset; - y = info->var.yoffset; - - if (((x + info->var.xres) < info->var.xres_virtual) && (rinfo->cursor_x >= (info->var.xres - 8))) - { - x += 8; - chg = 1; - } - else if ((x >= 8) && (rinfo->cursor_x <= 8)) - { - x -= 8; - chg = 1; - } - - if (((y + info->var.yres) < info->var.yres_virtual) && (rinfo->cursor_y >= (info->var.yres - 8))) - { - y += 8; - chg = 1; - } - else if ((y >=8) && (rinfo->cursor_y <= 8)) - { - y -= 8; - chg = 1; - } - - if (chg) - { - memcpy(&var, &info->var, sizeof(struct fb_var_screeninfo)); - var.xoffset = x; - var.yoffset = y; - disp = rinfo->cursor_show; - if (disp) - info->fbops->HideCursor(info); - - fb_pan_display(info,&var); - - if (disp) - info->fbops->ShowCursor(info); - } - set_ipl(ipl); - } -} - -/* - * Apply a video mode. This will apply the whole register set, including - * the PLL registers, to the card - */ -void radeon_write_mode(struct radeonfb_info *rinfo, struct radeon_regs *mode, int32_t regs_only) -{ - int i; - int primary_mon = PRIMARY_MONITOR(rinfo); - - dbg("radeonfb: radeon_write_mode\r\n"); - - if (!regs_only) - radeon_screen_blank(rinfo, FB_BLANK_NORMAL, 0); - - radeon_wait_for_fifo(rinfo, 31); - - for (i = 0; i < 10; i++) - OUTREG(common_regs[i].reg, common_regs[i].val); - - /* Apply surface registers */ - for (i = 0; i < 8; i++) - { - OUTREG(SURFACE0_LOWER_BOUND + 0x10*i, mode->surf_lower_bound[i]); - OUTREG(SURFACE0_UPPER_BOUND + 0x10*i, mode->surf_upper_bound[i]); - OUTREG(SURFACE0_INFO + 0x10*i, mode->surf_info[i]); - } - OUTREG(CRTC_GEN_CNTL, mode->crtc_gen_cntl); - OUTREGP(CRTC_EXT_CNTL, mode->crtc_ext_cntl, ~(CRTC_HSYNC_DIS | CRTC_VSYNC_DIS | CRTC_DISPLAY_DIS)); - OUTREG(CRTC_MORE_CNTL, mode->crtc_more_cntl); - OUTREGP(DAC_CNTL, mode->dac_cntl, DAC_RANGE_CNTL | DAC_BLANKING); - OUTREG(CRTC_H_TOTAL_DISP, mode->crtc_h_total_disp); - OUTREG(CRTC_H_SYNC_STRT_WID, mode->crtc_h_sync_strt_wid); - OUTREG(CRTC_V_TOTAL_DISP, mode->crtc_v_total_disp); - OUTREG(CRTC_V_SYNC_STRT_WID, mode->crtc_v_sync_strt_wid); - rinfo->fb_offset = 0; - rinfo->dst_pitch_offset = (rinfo->pitch << 22) | ((rinfo->fb_local_base + rinfo->fb_offset) >> 10); - OUTREG(CRTC_OFFSET, rinfo->fb_offset); -#ifdef RADEON_TILING - if (rinfo->tilingEnabled) - { - if (rinfo->family >= CHIP_FAMILY_R300) - OUTREG(CRTC_OFFSET_CNTL, R300_CRTC_X_Y_MODE_EN | R300_CRTC_MICRO_TILE_BUFFER_DIS | R300_CRTC_MACRO_TILE_EN); - else - OUTREG(CRTC_OFFSET_CNTL, CRTC_OFFSET_CNTL__CRTC_TILE_EN); - } - else -#endif - OUTREG(CRTC_OFFSET_CNTL, 0); - - OUTREG(CRTC_PITCH, mode->crtc_pitch); - OUTREG(SURFACE_CNTL, mode->surface_cntl); - radeon_write_pll_regs(rinfo, mode); - - if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) - { - radeon_wait_for_fifo(rinfo, 10); - OUTREG(FP_CRTC_H_TOTAL_DISP, mode->fp_crtc_h_total_disp); - OUTREG(FP_CRTC_V_TOTAL_DISP, mode->fp_crtc_v_total_disp); - OUTREG(FP_H_SYNC_STRT_WID, mode->fp_h_sync_strt_wid); - OUTREG(FP_V_SYNC_STRT_WID, mode->fp_v_sync_strt_wid); - OUTREG(FP_HORZ_STRETCH, mode->fp_horz_stretch); - OUTREG(FP_VERT_STRETCH, mode->fp_vert_stretch); - OUTREG(FP_GEN_CNTL, mode->fp_gen_cntl); - OUTREG(TMDS_CRC, mode->tmds_crc); - OUTREG(TMDS_TRANSMITTER_CNTL, mode->tmds_transmitter_cntl); - } - - if (!regs_only) - radeon_screen_blank(rinfo, FB_BLANK_UNBLANK, 0); - radeon_wait_for_fifo(rinfo, 2); - OUTPLL(VCLK_ECP_CNTL, mode->vclk_ecp_cntl); -} - -/* - * Calculate the PLL values for a given mode - */ -static void radeon_calc_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs *regs, uint32_t freq) -{ - static const struct - { - int divider; - int bitvalue; - } *post_div, - post_divs[] = - { - { 1, 0 }, - { 2, 1 }, - { 4, 2 }, - { 8, 3 }, - { 3, 4 }, - { 16, 5 }, - { 6, 6 }, - { 12, 7 }, - { 0, 0 }, - }; - int fb_div, pll_output_freq = 0; - int uses_dvo = 0; - - /* Check if the DVO port is enabled and sourced from the primary CRTC. I'm - * not sure which model starts having FP2_GEN_CNTL, I assume anything more - * recent than an r(v)100... - */ -#if 1 - /* XXX I had reports of flicker happening with the cinema display - * on TMDS1 that seem to be fixed if I also forbit odd dividers in - * this case. This could just be a bandwidth calculation issue, I - * haven't implemented the bandwidth code yet, but in the meantime, - * forcing uses_dvo to 1 fixes it and shouln't have bad side effects, - * I haven't seen a case were were absolutely needed an odd PLL - * divider. I'll find a better fix once I have more infos on the - * real cause of the problem. - */ - while (rinfo->has_CRTC2) - { - uint32_t fp2_gen_cntl = INREG(FP2_GEN_CNTL); - uint32_t disp_output_cntl; - int source; - - /* FP2 path not enabled */ - if ((fp2_gen_cntl & FP2_ON) == 0) - break; - - /* Not all chip revs have the same format for this register, - * extract the source selection - */ - if (rinfo->family == CHIP_FAMILY_R200 || rinfo->family == CHIP_FAMILY_R300 - || rinfo->family == CHIP_FAMILY_R350 || rinfo->family == CHIP_FAMILY_RV350) - { - source = (fp2_gen_cntl >> 10) & 0x3; - /* sourced from transform unit, check for transform unit - * own source - */ - if (source == 3) - { - disp_output_cntl = INREG(DISP_OUTPUT_CNTL); - source = (disp_output_cntl >> 12) & 0x3; - } - } - else - source = (fp2_gen_cntl >> 13) & 0x1; - - /* sourced from CRTC2 -> exit */ - if (source == 1) - break; - - /* so we end up on CRTC1, let's set uses_dvo to 1 now */ - uses_dvo = 1; - break; - } -#else - uses_dvo = 1; -#endif - if (freq > rinfo->pll.ppll_max) - freq = rinfo->pll.ppll_max; - if (freq * 12 < rinfo->pll.ppll_min) - freq = rinfo->pll.ppll_min / 12; - for (post_div = &post_divs[0]; post_div->divider; ++post_div) - { - pll_output_freq = post_div->divider * freq; - - /* - * If we output to the DVO port (external TMDS), we don't allow an - * odd PLL divider as those aren't supported on this path - */ - if (uses_dvo && (post_div->divider & 1)) - continue; - - if (pll_output_freq >= rinfo->pll.ppll_min && - pll_output_freq <= rinfo->pll.ppll_max) - break; - } - - /* If we fall through the bottom, try the "default value" - given by the terminal post_div->bitvalue */ - if (!post_div->divider) - { - post_div = &post_divs[post_div->bitvalue]; - pll_output_freq = post_div->divider * freq; - } - - /* If we fall through the bottom, try the "default value" - given by the terminal post_div->bitvalue */ - if ( !post_div->divider ) - { - post_div = &post_divs[post_div->bitvalue]; - pll_output_freq = post_div->divider * freq; - } - fb_div = round_div(rinfo->pll.ref_div*pll_output_freq,rinfo->pll.ref_clk); - regs->ppll_ref_div = rinfo->pll.ref_div; - regs->ppll_div_3 = fb_div | (post_div->bitvalue << 16); -} - -int radeonfb_set_par(struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; - struct fb_var_screeninfo *mode = &info->var; - struct radeon_regs *newmode; - int hTotal, vTotal, hSyncStart, hSyncEnd, vSyncStart, vSyncEnd; - // FIXME: int hSyncPol; this is not used anywhere - // FIXME: int vSyncPol; this is not used anywhere - // FIXME: int cSync; this is not used anywhere - static uint8_t hsync_adj_tab[] = {0, 0x12, 9, 9, 6, 5}; - static uint8_t hsync_fudge_fp[] = {2, 2, 0, 0, 5, 5}; - uint32_t sync, h_sync_pol, v_sync_pol, dotClock, pixClock; - int i, freq; - int format = 0; - int nopllcalc = 0; - int hsync_start; - int hsync_fudge; - // int bytpp; FIXME: this doesn't seem to be used anywhere - int hsync_wid, vsync_wid; - int primary_mon = PRIMARY_MONITOR(rinfo); - int depth = var_to_depth(mode); - int use_rmx = 0; - - newmode = (struct radeon_regs *) driver_mem_alloc(sizeof(struct radeon_regs)); - if (!newmode) - return -1; //-ENOMEM; - - /* We always want engine to be idle on a mode switch, even - * if we won't actually change the mode - */ - dbg("radeonfb: radeonfb_set_par\r\n"); - radeon_engine_idle(); - hSyncStart = mode->xres + mode->right_margin; - hSyncEnd = hSyncStart + mode->hsync_len; - hTotal = hSyncEnd + mode->left_margin; - - vSyncStart = mode->yres + mode->lower_margin; - vSyncEnd = vSyncStart + mode->vsync_len; - vTotal = vSyncEnd + mode->upper_margin; - - pixClock = mode->pixclock; - sync = mode->sync; - - h_sync_pol = sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1; - v_sync_pol = sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1; - - if (primary_mon == MT_DFP || primary_mon == MT_LCD) - { - if (rinfo->panel_info.xres < mode->xres) - mode->xres = rinfo->panel_info.xres; - - if (rinfo->panel_info.yres < mode->yres) - mode->yres = rinfo->panel_info.yres; - - hTotal = mode->xres + rinfo->panel_info.hblank; - hSyncStart = mode->xres + rinfo->panel_info.hOver_plus; - hSyncEnd = hSyncStart + rinfo->panel_info.hSync_width; - - vTotal = mode->yres + rinfo->panel_info.vblank; - vSyncStart = mode->yres + rinfo->panel_info.vOver_plus; - vSyncEnd = vSyncStart + rinfo->panel_info.vSync_width; - - h_sync_pol = !rinfo->panel_info.hAct_high; - v_sync_pol = !rinfo->panel_info.vAct_high; - - pixClock = 100000000 / rinfo->panel_info.clock; - - if (rinfo->panel_info.use_bios_dividers) - { - nopllcalc = 1; - newmode->ppll_div_3 = rinfo->panel_info.fbk_divider | (rinfo->panel_info.post_divider << 16); - newmode->ppll_ref_div = rinfo->panel_info.ref_divider; - } - } - - dotClock = 1000000000 / pixClock; - freq = dotClock / 10; /* x100 */ - hsync_wid = (hSyncEnd - hSyncStart) / 8; - - if (hsync_wid == 0) - hsync_wid = 1; - else if (hsync_wid > 0x3f) /* max */ - hsync_wid = 0x3f; - - if (mode->vmode & FB_VMODE_DOUBLE) - { - vSyncStart <<= 1; - vSyncEnd <<= 1; - vTotal <<= 1; - } - - vsync_wid = vSyncEnd - vSyncStart; - if (vsync_wid == 0) - vsync_wid = 1; - else if (vsync_wid > 0x1f) /* max */ - vsync_wid = 0x1f; - - // FIXME: this doesn't seem to be used anywhere hSyncPol = mode->sync & FB_SYNC_HOR_HIGH_ACT ? 0 : 1; - // FIXME: this doesn't seem to be used anywhere vSyncPol = mode->sync & FB_SYNC_VERT_HIGH_ACT ? 0 : 1; - // FIXME: this doesn't seem to be used anywhere cSync = mode->sync & FB_SYNC_COMP_HIGH_ACT ? (1 << 4) : 0; - format = radeon_get_dstbpp(depth); - // FIXME: this doesn't seem to be used anywhere bytpp = mode->bits_per_pixel >> 3; - - if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) - hsync_fudge = hsync_fudge_fp[format-1]; - else - hsync_fudge = hsync_adj_tab[format-1]; - - if (mode->vmode & FB_VMODE_DOUBLE) - hsync_fudge = 0; /* todo: need adjust */ - - hsync_start = hSyncStart - 8 + hsync_fudge; - newmode->crtc_gen_cntl = CRTC_EXT_DISP_EN | CRTC_EN | (format << 8); - if (mode->vmode & FB_VMODE_DOUBLE) - newmode->crtc_gen_cntl |= CRTC_DBL_SCAN_EN; - if (mode->vmode & FB_VMODE_INTERLACED) - newmode->crtc_gen_cntl |= CRTC_INTERLACE_EN; - - /* Clear auto-center etc... */ - newmode->crtc_more_cntl = rinfo->init_state.crtc_more_cntl; - newmode->crtc_more_cntl &= 0xfffffff0; - - if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) - { - newmode->crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN; - if (mirror) - newmode->crtc_ext_cntl |= CRTC_CRT_ON; - newmode->crtc_gen_cntl &= ~(CRTC_DBL_SCAN_EN | CRTC_INTERLACE_EN); - } - else - newmode->crtc_ext_cntl = VGA_ATI_LINEAR | XCRT_CNT_EN | CRTC_CRT_ON; - - newmode->dac_cntl = /* INREG(DAC_CNTL) | */ DAC_MASK_ALL | DAC_VGA_ADR_EN | DAC_8BIT_EN; - newmode->crtc_h_total_disp = ((((hTotal / 8) - 1) & 0x3ff) | (((mode->xres / 8) - 1) << 16)); - newmode->crtc_h_sync_strt_wid = ((hsync_start & 0x1fff) | (hsync_wid << 16) | (h_sync_pol << 23)); - - if (mode->vmode & FB_VMODE_DOUBLE) - newmode->crtc_v_total_disp = ((vTotal - 1) & 0xffff) | (((mode->yres << 1) - 1) << 16); - else - newmode->crtc_v_total_disp = ((vTotal - 1) & 0xffff) | ((mode->yres - 1) << 16); - - newmode->crtc_v_sync_strt_wid = (((vSyncStart - 1) & 0xfff) | (vsync_wid << 16) | (v_sync_pol << 23)); - /* We first calculate the engine pitch */ - rinfo->pitch = ((mode->xres_virtual * ((mode->bits_per_pixel + 1) / 8) + 0x3f) & ~(0x3f)) >> 6; - /* Then, re-multiply it to get the CRTC pitch */ - newmode->crtc_pitch = (rinfo->pitch << 3) / ((mode->bits_per_pixel + 1) / 8); - newmode->crtc_pitch |= (newmode->crtc_pitch << 16); - - /* - * It looks like recent chips have a problem with SURFACE_CNTL, - * setting SURF_TRANSLATION_DIS completely disables the - * swapper as well, so we leave it unset now. - */ - newmode->surface_cntl = 0; - - if (rinfo->big_endian) - { - /* Setup swapping on both apertures, though we currently - * only use aperture 0, enabling swapper on aperture 1 - * won't harm - */ - switch(mode->bits_per_pixel) - { - case 16: - newmode->surface_cntl |= NONSURF_AP0_SWP_16BPP; - newmode->surface_cntl |= NONSURF_AP1_SWP_16BPP; - break; - case 24: - case 32: - newmode->surface_cntl |= NONSURF_AP0_SWP_32BPP; - newmode->surface_cntl |= NONSURF_AP1_SWP_32BPP; - break; - } - } - - /* Clear surface registers */ - for (i = 0; i < 8; i++) - { - newmode->surf_lower_bound[i] = 0; - newmode->surf_upper_bound[i] = 0x1f; - newmode->surf_info[i] = 0; - } - - rinfo->bpp = mode->bits_per_pixel; - rinfo->depth = depth; - - /* We use PPLL_DIV_3 */ - newmode->clk_cntl_index = 0x300; - - /* Calculate PPLL value if necessary */ - if (!nopllcalc) - radeon_calc_pll_regs(rinfo, newmode, freq); - - newmode->vclk_ecp_cntl = rinfo->init_state.vclk_ecp_cntl; - if ((primary_mon == MT_DFP) || (primary_mon == MT_LCD)) - { - int hRatio, vRatio; - if (mode->xres > rinfo->panel_info.xres) - mode->xres = rinfo->panel_info.xres; - if (mode->yres > rinfo->panel_info.yres) - mode->yres = rinfo->panel_info.yres; - newmode->fp_horz_stretch = (((rinfo->panel_info.xres / 8) - 1) << HORZ_PANEL_SHIFT); - newmode->fp_vert_stretch = ((rinfo->panel_info.yres - 1) << VERT_PANEL_SHIFT); - - if (mode->xres != rinfo->panel_info.xres) - { - hRatio = round_div(mode->xres * HORZ_STRETCH_RATIO_MAX, rinfo->panel_info.xres); - newmode->fp_horz_stretch = (((hRatio & HORZ_STRETCH_RATIO_MASK)) - | (newmode->fp_horz_stretch & (HORZ_PANEL_SIZE | HORZ_FP_LOOP_STRETCH | HORZ_AUTO_RATIO_INC))); - newmode->fp_horz_stretch |= (HORZ_STRETCH_BLEND | HORZ_STRETCH_ENABLE); - use_rmx = 1; - } - - newmode->fp_horz_stretch &= ~HORZ_AUTO_RATIO; - if (mode->yres != rinfo->panel_info.yres) - { - vRatio = round_div(mode->yres * VERT_STRETCH_RATIO_MAX, rinfo->panel_info.yres); - newmode->fp_vert_stretch = (((((uint32_t)vRatio) & VERT_STRETCH_RATIO_MASK)) - | (newmode->fp_vert_stretch & (VERT_PANEL_SIZE | VERT_STRETCH_RESERVED))); - newmode->fp_vert_stretch |= (VERT_STRETCH_BLEND | VERT_STRETCH_ENABLE); - use_rmx = 1; - } - newmode->fp_vert_stretch &= ~VERT_AUTO_RATIO_EN; - newmode->fp_gen_cntl = (rinfo->init_state.fp_gen_cntl - & ~(FP_SEL_CRTC2 | FP_RMX_HVSYNC_CONTROL_EN | FP_DFP_SYNC_SEL | FP_CRT_SYNC_SEL - | FP_CRTC_LOCK_8DOT | FP_USE_SHADOW_EN | FP_CRTC_USE_SHADOW_VEND | FP_CRT_SYNC_ALT)); - newmode->fp_gen_cntl |= (FP_CRTC_DONT_SHADOW_VPAR | FP_CRTC_DONT_SHADOW_HEND | FP_PANEL_FORMAT); - - if (IS_R300_VARIANT(rinfo) || (rinfo->family == CHIP_FAMILY_R200)) - { - newmode->fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK; - if (use_rmx) - newmode->fp_gen_cntl |= R200_FP_SOURCE_SEL_RMX; - else - newmode->fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1; - } - else - newmode->fp_gen_cntl |= FP_SEL_CRTC1; - - newmode->lvds_gen_cntl = rinfo->init_state.lvds_gen_cntl; - newmode->lvds_pll_cntl = rinfo->init_state.lvds_pll_cntl; - newmode->tmds_crc = rinfo->init_state.tmds_crc; - newmode->tmds_transmitter_cntl = rinfo->init_state.tmds_transmitter_cntl; - - if (primary_mon == MT_LCD) - { - newmode->lvds_gen_cntl |= (LVDS_ON | LVDS_BLON); - newmode->fp_gen_cntl &= ~(FP_FPON | FP_TMDS_EN); - } - else - { - /* DFP */ - newmode->fp_gen_cntl |= (FP_FPON | FP_TMDS_EN); - newmode->tmds_transmitter_cntl &= ~(TMDS_PLLRST); - /* TMDS_PLL_EN bit is reversed on RV (and mobility) chips */ - if (IS_R300_VARIANT(rinfo) || (rinfo->family == CHIP_FAMILY_R200) || !rinfo->has_CRTC2) - newmode->tmds_transmitter_cntl &= ~TMDS_PLL_EN; - else - newmode->tmds_transmitter_cntl |= TMDS_PLL_EN; - newmode->crtc_ext_cntl &= ~CRTC_CRT_ON; - } - - newmode->fp_crtc_h_total_disp = (((rinfo->panel_info.hblank / 8) & 0x3ff) | (((mode->xres / 8) - 1) << 16)); - newmode->fp_crtc_v_total_disp = (rinfo->panel_info.vblank & 0xffff) | ((mode->yres - 1) << 16); - newmode->fp_h_sync_strt_wid = ((rinfo->panel_info.hOver_plus & 0x1fff) | (hsync_wid << 16) | (h_sync_pol << 23)); - newmode->fp_v_sync_strt_wid = ((rinfo->panel_info.vOver_plus & 0xfff) | (vsync_wid << 16) | (v_sync_pol << 23)); - } - - /* do it! */ - if (!rinfo->asleep) - { -#if 0 - if (debug) - { - dbg("Press a key for write the video mode...\r\n"); - Bconin(2); - } -#endif - memcpy(&rinfo->state, newmode, sizeof(*newmode)); -#ifdef RADEON_TILING - rinfo->tilingEnabled = (mode->vmode & (FB_VMODE_DOUBLE | FB_VMODE_INTERLACED)) ? FALSE : TRUE; -#endif - radeon_write_mode(rinfo, newmode, 0); - /* (re)initialize the engine */ - radeon_engine_init(rinfo); - } - - /* Update fix */ - info->fix.line_length = rinfo->pitch*64; - info->fix.visual = rinfo->depth == 8 ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR; - driver_mem_free(newmode); - - return 0; -} - -static void radeonfb_check_modes(struct fb_info *info, struct mode_option *resolution) -{ - struct radeonfb_info *rinfo = info->par; - - radeon_check_modes(rinfo, resolution); -} - -static struct fb_ops radeonfb_ops = -{ - .fb_check_var = radeonfb_check_var, - .fb_set_par = radeonfb_set_par, - .fb_setcolreg = radeonfb_setcolreg, - .fb_pan_display = radeonfb_pan_display, - .fb_blank = radeonfb_blank, - .fb_sync = radeonfb_sync, - .fb_ioctl = radeonfb_ioctl, - .fb_check_modes = radeonfb_check_modes, - .SetupForSolidFill = radeon_setup_for_solid_fill, - .SubsequentSolidFillRect = radeon_subsequent_solid_fill_rect_mmio, - .SetupForSolidLine = radeon_setup_for_solid_line_mmio, - .SubsequentSolidHorVertLine = radeon_subsequent_solid_hor_vert_line_mmio, - .SubsequentSolidTwoPointLine = radeon_subsequent_solid_two_point_line_mmio, - .SetupForDashedLine = radeon_setup_for_dashed_line_mmio, - .SubsequentDashedTwoPointLine = radeon_subsequent_dashed_two_point_line_mmio, - .SetupForScreenToScreenCopy = radeon_setup_for_screen_to_screen_copy_mmio, - .SubsequentScreenToScreenCopy = radeon_subsequent_screen_to_screen_copy_mmio, - .ScreenToScreenCopy = radeon_screen_to_screen_copy_mmio, - .SetupForMono8x8PatternFill = radeon_setup_for_mono_8x8_pattern_fill_mmio, - .SubsequentMono8x8PatternFillRect = radeon_subsequent_mono_8x8_pattern_fill_rect_mmio, - .SetupForScanlineCPUToScreenColorExpandFill = radeon_setup_for_scanline_cpu_to_screen_color_expand_fill_mmio, - .SubsequentScanlineCPUToScreenColorExpandFill = radeon_subsequent_scanline_cpu_to_screen_color_expand_fill_mmio, - .SubsequentScanline = radeon_subsequent_scanline_mmio, - .SetupForScanlineImageWrite = radeon_setup_for_scanline_image_write_mmio, - .SubsequentScanlineImageWriteRect = radeon_subsequent_scanline_image_write_rect_mmio, - .SetClippingRectangle = radeon_set_clipping_rectangle_mmio, - .DisableClipping = radeon_disable_clipping_mmio, -#ifdef RADEON_RENDER - .SetupForCPUToScreenAlphaTexture = radeon_setup_for_cpu_to_screen_alpha_texture_mmio, - .SetupForCPUToScreenTexture = radeon_setup_for_cpu_to_screen_texture_mmio, - .SubsequentCPUToScreenTexture = radeon_subsequent_cpu_to_screen_texture_mmio, -#else - .SetupForCPUToScreenAlphaTexture = NULL, - .SetupForCPUToScreenTexture = NULL, - .SubsequentCPUToScreenTexture = NULL, -#endif /* RADEON_RENDER */ - .SetCursorColors = radeon_set_cursor_colors, - .SetCursorPosition = radeon_set_cursor_position, - .LoadCursorImage = radeon_load_cursor_image, - .HideCursor = radeon_hide_cursor, - .ShowCursor = radeon_show_cursor, - .CursorInit = radeon_cursor_init, - .WaitVbl = radeon_wait_vbl, -}; - -static int radeon_set_fbinfo(struct radeonfb_info *rinfo) -{ - struct fb_info *info = rinfo->info; - - info->par = rinfo; - info->fbops = &radeonfb_ops; - info->ram_base = info->screen_base = rinfo->fb_base; - info->screen_size = rinfo->mapped_vram; - info->ram_size = rinfo->mapped_vram; - if (info->screen_size > MAX_MAPPED_VRAM) - info->screen_size = MAX_MAPPED_VRAM; - else if (info->screen_size > MIN_MAPPED_VRAM) - info->screen_size = MIN_MAPPED_VRAM; - - dbg("%s: ram_base %p\r\n", __FUNCTION__, info->screen_base); - dbg("%s: ram_size %p\r\n", __FUNCTION__, info->ram_size); - - /* Fill fix common fields */ - memcpy(info->fix.id, rinfo->name, sizeof(info->fix.id)); - info->fix.smem_start = rinfo->fb_base_phys; - info->fix.smem_len = rinfo->video_ram; - info->fix.type = FB_TYPE_PACKED_PIXELS; - info->fix.visual = FB_VISUAL_PSEUDOCOLOR; - info->fix.xpanstep = 8; - info->fix.ypanstep = 1; - info->fix.ywrapstep = 0; - info->fix.type_aux = 0; - info->fix.mmio_start = rinfo->mmio_base_phys; - info->fix.mmio_len = RADEON_REGSIZE; - info->fix.accel = FB_ACCEL_ATI_RADEON; - return 0; -} - -static void radeon_identify_vram(struct radeonfb_info *rinfo) -{ - uint32_t tmp; - /* framebuffer size */ - if ((rinfo->family == CHIP_FAMILY_RS100) - || (rinfo->family == CHIP_FAMILY_RS200) - || (rinfo->family == CHIP_FAMILY_RS300)) - { - uint32_t tom = INREG(NB_TOM); - tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024); - radeon_wait_for_fifo(rinfo, 6); - OUTREG(MC_FB_LOCATION, tom); - OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); - OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16); - OUTREG(OV0_BASE_ADDR, (tom & 0xffff) << 16); - /* This is supposed to fix the crtc2 noise problem. */ - OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000); - if ((rinfo->family == CHIP_FAMILY_RS100) || (rinfo->family == CHIP_FAMILY_RS200)) - { - /* This is to workaround the asic bug for RMX, some versions - of BIOS dosen't have this register initialized correctly. */ - OUTREGP(CRTC_MORE_CNTL, CRTC_H_CUTOFF_ACTIVE_EN, ~CRTC_H_CUTOFF_ACTIVE_EN); - } - } - else - tmp = INREG(CONFIG_MEMSIZE); - /* mem size is bits [28:0], mask off the rest */ - rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK; - /* - * Hack to get around some busted production M6's - * reporting no ram - */ - if (rinfo->video_ram == 0) - { - switch(rinfo->chipset) - { - case PCI_CHIP_RADEON_LY: - case PCI_CHIP_RADEON_LZ: rinfo->video_ram = 8192 * 1024; break; - default: break; - } - } - /* - * Now try to identify VRAM type - */ - if (rinfo->is_IGP || (rinfo->family >= CHIP_FAMILY_R300) - || (INREG(MEM_SDRAM_MODE_REG) & (1<<30))) - rinfo->vram_ddr = 1; - else - rinfo->vram_ddr = 0; - tmp = INREG(MEM_CNTL); - if (IS_R300_VARIANT(rinfo)) - { - tmp &= R300_MEM_NUM_CHANNELS_MASK; - switch(tmp) - { - case 0: rinfo->vram_width = 64; break; - case 1: rinfo->vram_width = 128; break; - case 2: rinfo->vram_width = 256; break; - default: rinfo->vram_width = 128; break; - } - } - else if ((rinfo->family == CHIP_FAMILY_RV100) - || (rinfo->family == CHIP_FAMILY_RS100) - || (rinfo->family == CHIP_FAMILY_RS200)) - { - if (tmp & RV100_MEM_HALF_MODE) - rinfo->vram_width = 32; - else - rinfo->vram_width = 64; - } - else - { - if (tmp & MEM_NUM_CHANNELS_MASK) - rinfo->vram_width = 128; - else - rinfo->vram_width = 64; - } - - /* - * This may not be correct, as some cards can have half of channel disabled - * ToDo: identify these cases - */ - switch(rinfo->family) - { - case CHIP_FAMILY_LEGACY: dbg("%s chip type: %s\r\n", __FUNCTION__, "LEGACY"); break; - case CHIP_FAMILY_RADEON: dbg("%s chip type: %s\r\n", __FUNCTION__, "RADEON"); break; - case CHIP_FAMILY_RV100: dbg("%s chip type: %s\r\n", __FUNCTION__, "RV100"); break; - case CHIP_FAMILY_RS100: dbg("%s chip type: %s\r\n", __FUNCTION__, "RS100"); break; - case CHIP_FAMILY_RV200: dbg("%s chip type: %s\r\n", __FUNCTION__, "RV200"); break; - case CHIP_FAMILY_RS200: dbg("%s chip type: %s\r\n", __FUNCTION__, "RS200"); break; - case CHIP_FAMILY_R200: dbg("%s chip type: %s\r\n", __FUNCTION__, "R200"); break; - case CHIP_FAMILY_RV250: dbg("%s chip type: %s\r\n", __FUNCTION__, "RV250"); break; - case CHIP_FAMILY_RS300: dbg("%s chip type: %s\r\n", __FUNCTION__, "RS300"); break; - case CHIP_FAMILY_RV280: dbg("%s chip type: %s\r\n", __FUNCTION__, "RV280"); break; - case CHIP_FAMILY_R300: dbg("%s chip type: %s\r\n", __FUNCTION__, "R300"); break; - case CHIP_FAMILY_R350: dbg("%s chip type: %s\r\n", __FUNCTION__, "R350"); break; - case CHIP_FAMILY_RV350: dbg("%s chip type: %s\r\n", __FUNCTION__, "RV350"); break; - case CHIP_FAMILY_RV380: dbg("%s chip type: %s\r\n", __FUNCTION__, "RV380"); break; - case CHIP_FAMILY_R420: dbg("%s chip type: %s\r\n", __FUNCTION__, "R420"); break; - default: dbg("%s chip type: %s\r\n", "UNKNOW"); break; - } - dbg("%s: found %d KB of %d bits wide %s video RAM\r\n", __FUNCTION__, rinfo->video_ram / 1024, - rinfo->vram_width, rinfo->vram_ddr ? "DDR " : "SDRAM "); -} - -int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent) -{ - struct fb_info *info; - struct radeonfb_info *rinfo; - struct pci_rd *pci_rsc_desc; - - dbg("%s:\r\n", __FUNCTION__); - info = framebuffer_alloc(sizeof(struct radeonfb_info)); - if (!info) - { - dbg("%s: could not allocate frame buffer\r\n", __FUNCTION__); - return -1; // -ENOMEM; - } - - rinfo = info->par; - - rinfo->info = info; - rinfo->handle = handle; - rinfo->name[11] = (char) (ent->device >> 8); - rinfo->name[12] = (char) ent->device; - rinfo->family = ent->driver_data & CHIP_FAMILY_MASK; - rinfo->chipset = ent->device; - rinfo->has_CRTC2 = (ent->driver_data & CHIP_HAS_CRTC2) != 0; - rinfo->is_mobility = (ent->driver_data & CHIP_IS_MOBILITY) != 0; - rinfo->is_IGP = (ent->driver_data & CHIP_IS_IGP) != 0; - - /* Set base addrs */ - dbg("%s: Set base addrs\r\n", __FUNCTION__); - rinfo->fb_base_phys = rinfo->mmio_base_phys = rinfo->io_base_phys = 0xFFFFFFFF; - rinfo->mapped_vram = 0; - rinfo->mmio_base = rinfo->io_base = NULL; - rinfo->bios_seg = NULL; - - pci_rsc_desc = pci_get_resource(handle); - if ((int32_t) pci_rsc_desc >= 0) - { - uint16_t flags; - do - { - dbg("%s: flags %p\r\n", __FUNCTION__, pci_rsc_desc->flags); - dbg("%s: start %p\r\n", __FUNCTION__, pci_rsc_desc->start); - dbg("%s: offset 0x%x\r\n", __FUNCTION__, pci_rsc_desc->offset); - dbg("%s: length 0x%x\r\n", __FUNCTION__, pci_rsc_desc->length); - - if (!(pci_rsc_desc->flags & FLG_IO)) - { - if ((rinfo->fb_base_phys == 0xFFFFFFFF) && (pci_rsc_desc->length >= 0x100000)) - { - rinfo->fb_base = (void *)(pci_rsc_desc->offset + pci_rsc_desc->start); - rinfo->fb_base_phys = pci_rsc_desc->start; - rinfo->mapped_vram = pci_rsc_desc->length; -// rinfo->dma_offset = pci_rsc_desc->dmaoffset; - if ((pci_rsc_desc->flags & FLG_ENDMASK) == ORD_MOTOROLA) - { - rinfo->big_endian = 0; /* host bridge make swapping intel -> motorola */ - dbg("%s: host bridge is big endian\r\n", __FUNCTION__); - } - else - { - rinfo->big_endian = 1; /* radeon make swapping intel -> motorola */ - dbg("%s: host bridge is little endian\r\n", __FUNCTION__); - } - } - else if ((pci_rsc_desc->length >= RADEON_REGSIZE) && (pci_rsc_desc->length < 0x100000)) - { - if (pci_rsc_desc->flags & FLG_ROM) - { - dbg("%s: FLG_ROM resource descriptor found\r\n", __FUNCTION__); - dbg("%s: start = %p, size = 0x%x\r\n", __FUNCTION__, pci_rsc_desc->start, pci_rsc_desc->length); - dbg("%s: bios_seg = %p\r\n", __FUNCTION__, rinfo->bios_seg); - - if (rinfo->bios_seg == NULL) - { - rinfo->bios_seg_phys = pci_rsc_desc->start; - if (BIOS_IN16(0) == 0xaa55) - rinfo->bios_seg = (void *) (pci_rsc_desc->offset + pci_rsc_desc->start); - else - { - dbg("%s: BIOS_IN16(0) was %x (expected 0xaa55)\r\n", __FUNCTION__, BIOS_IN16(0)); - rinfo->bios_seg_phys = 0; - } - } - } - else - { - if (rinfo->mmio_base_phys == 0xFFFFFFFF) - { - rinfo->mmio_base = (void *)(pci_rsc_desc->offset + pci_rsc_desc->start); - rinfo->mmio_base_phys = pci_rsc_desc->start; - } - } - } - } - else - { - if (rinfo->io_base_phys == 0xFFFFFFFF) - { - rinfo->io_base = (void *)(pci_rsc_desc->offset + pci_rsc_desc->start); - rinfo->io_base_phys = pci_rsc_desc->start; - } - } - flags = pci_rsc_desc->flags; - pci_rsc_desc = (struct pci_rd *) ((uint32_t) pci_rsc_desc->next + (uint32_t) pci_rsc_desc); - } while (!(flags & FLG_LAST)); - } - else - dbg("%s: get_resource error\r\n", __FUNCTION__); - - /* map the regions */ - dbg("%s: map memory regions\r\n", __FUNCTION__); - if (rinfo->mmio_base == NULL) - { - dbg("%s: cannot map MMIO\r\n", __FUNCTION__); - framebuffer_release(info); - return -2; //(-EIO); - } - dbg("%s: mmio_base_phys %p, mmio_base %p\r\n", __FUNCTION__, rinfo->mmio_base_phys, rinfo->mmio_base); - dbg("%s: io_base_phys %p, io_base %p\r\n", __FUNCTION__, rinfo->io_base_phys, rinfo->io_base); - dbg("%s: fb_base_phys %p, fb_base %p\r\n", __FUNCTION__, rinfo->fb_base_phys, rinfo->fb_base); - - /* - * Check for errata - */ - dbg("%s: check for errata\r\n", __FUNCTION__); - rinfo->errata = 0; - if (rinfo->family == CHIP_FAMILY_R300 - && (INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) == CFG_ATI_REV_A11) - rinfo->errata |= CHIP_ERRATA_R300_CG; - if (rinfo->family == CHIP_FAMILY_RV200 || rinfo->family == CHIP_FAMILY_RS200) - rinfo->errata |= CHIP_ERRATA_PLL_DUMMYREADS; - if (rinfo->family == CHIP_FAMILY_RV100 - || rinfo->family == CHIP_FAMILY_RS100 - || rinfo->family == CHIP_FAMILY_RS200) - rinfo->errata |= CHIP_ERRATA_PLL_DELAY; - - /* - * Map the BIOS ROM if any and retreive PLL parameters from - * the BIOS. - */ - dbg("%s: bios_seg_phys %p\r\n", __FUNCTION__, rinfo->bios_seg_phys); - dbg("%s: map the BIOS ROM\r\n", __FUNCTION__); - radeon_map_ROM(rinfo); - - /* Run VGA BIOS */ - if ((rinfo->bios_seg != NULL)) - { - dbg("%s: run VGA BIOS\r\n", __FUNCTION__); - run_bios(rinfo); - } - else - { - dbg("%s: could not run VGA bios - rinfo->bios_seg is NULL\r\n", __FUNCTION__); - } - - dbg("%s: fixup display base address \r\n", __FUNCTION__); - - OUTREG(MC_FB_LOCATION, 0x7fff0000); - rinfo->fb_local_base = 0; - - /* Fixup the display base addresses & engine offsets while we - * are at it as well - */ - OUTREG(DISPLAY_BASE_ADDR, 0); - if (rinfo->has_CRTC2) - OUTREG(CRTC2_DISPLAY_BASE_ADDR, 0); - - OUTREG(OV0_BASE_ADDR, 0); - - /* Get VRAM size and type */ - dbg("%s: get VRAM size\r\n", __FUNCTION__); - radeon_identify_vram(rinfo); - - if ((rinfo->fb_base == NULL) - || ((rinfo->video_ram > rinfo->mapped_vram) && (rinfo->mapped_vram < MIN_MAPPED_VRAM * 2))) - { - dbg("%s: cannot map FB, video ram: %d KB\r\n", __FUNCTION__, rinfo->mapped_vram / 1024); - framebuffer_release(info); - return -2; //(-EIO); - } - else - { - dbg("%s: %d KB of VRAM mapped to %p\r\n", __FUNCTION__, rinfo->mapped_vram / 1024, rinfo->fb_base); - } - - /* Get informations about the board's PLL */ - dbg("%s: get informations about the board's PLL\r\n", __FUNCTION__); - radeon_get_pllinfo(rinfo); - -#ifdef CONFIG_FB_RADEON_I2C - /* Register I2C bus */ - dbg("%s: register I2C bus\r\n", __FUNCTION__); - radeon_create_i2c_busses(rinfo); -#endif /* CONFIG_FB_RADEON_I2C */ - - /* set all the vital stuff */ - dbg("%s: set all the vital stuff\r\n", __FUNCTION__); - radeon_set_fbinfo(rinfo); - - /* set offscreen memory descriptor */ - dbg("%s: set offscreen memory descriptor\r\n", __FUNCTION__); - offscreen_init(info); - - /* Probe screen types */ - dbg("%s: probe screen types, monitor_layout: 0x%x\r\n", __FUNCTION__, monitor_layout); - radeon_probe_screens(rinfo, monitor_layout, (int) ignore_edid); - - /* Build mode list, check out panel native model */ - dbg("%s: build mode list\r\n", __FUNCTION__); - radeon_check_modes(rinfo, &resolution); - - /* - * save current mode regs before we switch into the new one - * so we can restore this upon exit - */ - dbg("%s: save current mode\r\n", __FUNCTION__); - radeon_save_state(rinfo, &rinfo->init_state); - memcpy(&rinfo->state, &rinfo->init_state, sizeof(struct radeon_regs)); - - /* Setup Power Management capabilities */ -// DPRINT("radeonfb: radeonfb_pci_register: setup power management\r\n"); -// radeonfb_pm_init(rinfo, (int)default_dynclk); - - dbg("%s: install VBL timer\r\n", __FUNCTION__); - rinfo->lvds_timer = 0; -#ifndef DRIVER_IN_ROM - install_vbl_timer(radeon_timer_func, 1); /* remove old vector */ -#else - install_vbl_timer(radeon_timer_func, 0); -#endif - //rinfo->RageTheatreCrystal = rinfo->RageTheatreTunerPort=rinfo->RageTheatreCompositePort = rinfo->RageTheatreSVideoPort = -1; - //rinfo->tunerType = -1; - return(0); -} - -#if 0 - -void radeonfb_pci_unregister(void) -{ - struct fb_info *info = info_fb; - struct radeonfb_info *rinfo = info->par; -// radeonfb_pm_exit(rinfo); - uninstall_vbl_timer(radeon_timer_func); - if (rinfo->mon1_EDID!=NULL) - driver_mem_free(rinfo->mon1_EDID); - if (rinfo->mon2_EDID!=NULL) - driver_mem_free(rinfo->mon2_EDID); - if (rinfo->mon1_modedb) - fb_destroy_modedb(rinfo->mon1_modedb); -#ifdef CONFIG_FB_RADEON_I2C - radeon_delete_i2c_busses(rinfo); -#endif - framebuffer_release(info); -} - -#endif - - diff --git a/radeon/radeon_cursor.c b/radeon/radeon_cursor.c deleted file mode 100644 index 62f17b4..0000000 --- a/radeon/radeon_cursor.c +++ /dev/null @@ -1,335 +0,0 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_cursor.c,v 1.26 2003/11/10 18:41:22 tsi Exp $ */ -/* - * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and - * VA Linux Systems Inc., Fremont, California. - * - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation on the rights to use, copy, modify, merge, - * publish, distribute, sublicense, and/or sell copies of the Software, - * and to permit persons to whom the Software is furnished to do so, - * subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR - * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ - -/* - * Authors: - * Kevin E. Martin - * Rickard E. Faith - * - * References: - * - * !!!! FIXME !!!! - * RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical - * Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April - * 1999. - * - * RAGE 128 Software Development Manual (Technical Reference Manual P/N - * SDK-G04000 Rev. 0.01), ATI Technologies: June 1999. - * - */ - -#include "bas_types.h" -#include "bas_printf.h" -#include "radeonfb.h" - -#define DBG_RADEON -#ifdef DBG_RADEON -#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_RADEON */ - - -#define CURSOR_WIDTH 64 -#define CURSOR_HEIGHT 64 - -/* - * The cursor bits are always 32bpp. On MSBFirst buses, - * configure byte swapping to swap 32 bit units when writing - * the cursor image. Byte swapping must always be returned - * to its previous value before returning. - */ -#define CURSOR_SWAPPING_DECL_MMIO -#define CURSOR_SWAPPING_DECL unsigned long __surface_cntl=0; -#define CURSOR_SWAPPING_START() \ - if (rinfo->big_endian) \ - OUTREG(SURFACE_CNTL, \ - ((__surface_cntl = INREG(SURFACE_CNTL)) | \ - NONSURF_AP0_SWP_32BPP) & \ - ~NONSURF_AP0_SWP_16BPP); -#define CURSOR_SWAPPING_END() \ - if (rinfo->big_endian) \ - (OUTREG(SURFACE_CNTL, __surface_cntl)); - -/* Set cursor foreground and background colors */ -void radeon_set_cursor_colors(struct fb_info *info, int bg, int fg) -{ - struct radeonfb_info *rinfo = info->par; - unsigned long *pixels = (unsigned long *)((unsigned long) rinfo->fb_base + rinfo->cursor_start); - int pixel, i; - CURSOR_SWAPPING_DECL_MMIO - CURSOR_SWAPPING_DECL -// DPRINTVALHEX("radeonfb: RADEONSetCursorColors: cursor_start ",rinfo->cursor_start); -// DPRINT("\r\n"); - fg |= 0xff000000; - bg |= 0xff000000; - /* Don't recolour the image if we don't have to. */ - if (fg == rinfo->cursor_fg && bg == rinfo->cursor_bg) - return; - CURSOR_SWAPPING_START(); - - /* - * Note: We assume that the pixels are either fully opaque or fully - * transparent, so we won't premultiply them, and we can just - * check for non-zero pixel values; those are either fg or bg - */ - for (i = 0; i < CURSOR_WIDTH * CURSOR_HEIGHT; i++, pixels++) - if ((pixel = *pixels)) - *pixels = (pixel == rinfo->cursor_fg) ? fg : bg; - CURSOR_SWAPPING_END(); - rinfo->cursor_fg = fg; - rinfo->cursor_bg = bg; -} - -/* Set cursor position to (x,y) with offset into cursor bitmap at - * (xorigin,yorigin) - */ -void radeon_set_cursor_position(struct fb_info *info, int x, int y) -{ - struct radeonfb_info *rinfo = info->par; - struct fb_var_screeninfo *mode = &info->var; - int xorigin = 0; - int yorigin = 0; - if (mode->vmode & FB_VMODE_DOUBLE) - y <<= 1; - if (x < 0) - xorigin = 1 - x; - if (y < 0) - yorigin = 1 - y; - -// DPRINTVALHEX("radeonfb: RADEONSetCursorPosition: cursor_start ",rinfo->cursor_start); -// DPRINTVAL(" x ",x); -// DPRINTVAL(" y ",y); -// DPRINT("\r\n"); - - OUTREG(CUR_HORZ_VERT_OFF, (CUR_LOCK | (xorigin << 16) | yorigin)); - OUTREG(CUR_HORZ_VERT_POSN, (CUR_LOCK | ((xorigin ? 0 : x) << 16) | (yorigin ? 0 : y))); - OUTREG(CUR_OFFSET, rinfo->cursor_start + yorigin * 256); - rinfo->cursor_x = (unsigned long)x; - if (mode->vmode & FB_VMODE_DOUBLE) - rinfo->cursor_y = (unsigned long) y >> 1; - else - rinfo->cursor_y = (unsigned long) y; -} - -/* - * Copy cursor image from `image' to video memory. RADEONSetCursorPosition - * will be called after this, so we can ignore xorigin and yorigin. - */ -void radeon_load_cursor_image(struct fb_info *info, unsigned short *mask, unsigned short *data, int zoom) -{ - struct radeonfb_info *rinfo = info->par; - unsigned long *d = (unsigned long *)((unsigned long)rinfo->fb_base+rinfo->cursor_start); - unsigned long save = 0; - unsigned short chunk, mchunk; - unsigned long i, j, k; - CURSOR_SWAPPING_DECL - -// DPRINTVALHEX("radeonfb: RADEONLoadCursorImage: cursor_start ",rinfo->cursor_start); -// DPRINT("\r\n"); - - save = INREG(CRTC_GEN_CNTL) & ~(unsigned long) (3 << 20); - save |= (unsigned long) (2 << 20); - OUTREG(CRTC_GEN_CNTL, save & (unsigned long)~CRTC_CUR_EN); - - /* - * Convert the bitmap to ARGB32. - */ - CURSOR_SWAPPING_START(); -#define ARGB_PER_CHUNK (8 * sizeof (chunk)) - switch(zoom) - { - case 1: - default: - for (i = 0; i < CURSOR_HEIGHT; i++) - { - if (i < 16) - { - mchunk = *mask++; - chunk = *data++; - } - else - mchunk = chunk = 0; - for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j++) - { - for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1) - { - if (mchunk & 0x8000) - { - if (chunk & 0x8000) - *d++ = 0xff000000; /* Black, fully opaque. */ - else - *d++ = 0xffffffff; /* White, fully opaque. */ - } - else - *d++ = 0x00000000; /* White/Black, fully transparent. */ - } - } - } - break; - case 2: - for (i = 0; i < CURSOR_HEIGHT; i++) - { - if (i < 16*2) - { - mchunk = *mask; - chunk = *data; - if ((i & 1) == 1) - { - mask++; - data++; - } - } - else - mchunk = chunk = 0; - for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=2) - { - for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1) - { - if (mchunk & 0x8000) - { - if (chunk & 0x8000) - { - *d++ = 0xff000000; /* Black, fully opaque. */ - *d++ = 0xff000000; - } - else - { - *d++ = 0xffffffff; /* White, fully opaque. */ - *d++ = 0xffffffff; - } - } - else - { - *d++ = 0x00000000; /* White/Black, fully transparent. */ - *d++ = 0x00000000; - } - } - } - } - break; - case 4: - for (i = 0; i < CURSOR_HEIGHT; i++) - { - if (i < 16 * 4) - { - mchunk = *mask; - chunk = *data; - if ((i & 3) == 3) - { - mask++; - data++; - } - } - else - mchunk = chunk = 0; - for (j = 0; j < CURSOR_WIDTH / ARGB_PER_CHUNK; j+=4) - { - for (k = 0; k < ARGB_PER_CHUNK; k++, chunk <<= 1, mchunk <<= 1) - { - if (mchunk & 0x8000) - { - if (chunk & 0x8000) - { - *d++ = 0xff000000; /* Black, fully opaque. */ - *d++ = 0xff000000; - *d++ = 0xff000000; - *d++ = 0xff000000; - } - else - { - *d++ = 0xffffffff; /* White, fully opaque. */ - *d++ = 0xffffffff; - *d++ = 0xffffffff; - *d++ = 0xffffffff; - } - } - else - { - *d++ = 0x00000000; /* White/Black, fully transparent. */ - *d++ = 0x00000000; - *d++ = 0x00000000; - *d++ = 0x00000000; - } - } - } - } - break; - } - CURSOR_SWAPPING_END(); - rinfo->cursor_bg = 0xffffffff; /* White, fully opaque. */ - rinfo->cursor_fg = 0xff000000; /* Black, fully opaque. */ - OUTREG(CRTC_GEN_CNTL, save); -} - -/* Hide hardware cursor. */ -void radeon_hide_cursor(struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; - -// DPRINT("radeonfb: RADEONHideCursor\r\n"); - OUTREGP(CRTC_GEN_CNTL, 0, ~CRTC_CUR_EN); - rinfo->cursor_show = 0; -} - -/* Show hardware cursor. */ -void radeon_show_cursor(struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; - -// DPRINT("radeonfb: RADEONShowCursor\r\n"); - OUTREGP(CRTC_GEN_CNTL, CRTC_CUR_EN, ~CRTC_CUR_EN); - rinfo->cursor_show = 1; -} - -/* Initialize hardware cursor support. */ -long radeon_cursor_init(struct fb_info *info) -{ - struct radeonfb_info *rinfo = info->par; - int size_bytes = CURSOR_WIDTH * 4 * CURSOR_HEIGHT; - unsigned long fbarea = offscreen_alloc(rinfo->info, size_bytes + 256); - - dbg("radeonfb: %s: fbarea: %p\r\n", fbarea); - - if (!fbarea) - rinfo->cursor_start = 0; - else - { - unsigned short data[16], mask[16]; - - memset(data, 0, sizeof(data)); - memset(mask, 0, sizeof(data)); - rinfo->cursor_start = RADEON_ALIGN(fbarea - (unsigned long) rinfo->fb_base, 256); - rinfo->cursor_end = rinfo->cursor_start + size_bytes; - radeon_load_cursor_image(info, mask, data, 1); - } - dbg("radeonfb: %s cursor_start: %p\r\n", rinfo->cursor_start); - - return (rinfo->cursor_start ? fbarea : 0); -} diff --git a/radeon/radeon_monitor.c b/radeon/radeon_monitor.c deleted file mode 100644 index e01ca83..0000000 --- a/radeon/radeon_monitor.c +++ /dev/null @@ -1,741 +0,0 @@ -#include "radeonfb.h" -#include "wait.h" -#include "edid.h" -#include "driver_mem.h" -#include "bas_printf.h" -#include "bas_string.h" - -//#define DBG_MONITOR -#ifdef DBG_MONITOR -#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_MONITOR */ - -#ifndef INT_MAX -#define INT_MAX ((int) (~0U >> 1)) -#endif - -static struct fb_var_screeninfo radeonfb_default_var = -{ - .xres = 640, - .yres = 480, - .xres_virtual = 640, - .yres_virtual = 480, - .bits_per_pixel = 8, - .red = { .length = 8 }, - .green = { .length = 8 }, - .blue = { .length = 8 }, - .activate = FB_ACTIVATE_NOW, - .height = -1, - .width = -1, - .pixclock = 39721, - .left_margin = 40, - .right_margin = 24, - .upper_margin = 32, - .lower_margin = 11, - .hsync_len = 96, - .vsync_len = 2, - .vmode = FB_VMODE_NONINTERLACED -}; - -static char *radeon_get_mon_name(int type) -{ - char *pret = NULL; - switch(type) - { - case MT_NONE: - pret = "no"; - break; - case MT_CRT: - pret = "CRT"; - break; - case MT_DFP: - pret = "DFP"; - break; - case MT_LCD: - pret = "LCD"; - break; - case MT_CTV: - pret = "CTV"; - break; - case MT_STV: - pret = "STV"; - break; - } - return pret; -} - -/* - * Probe physical connection of a CRT. This code comes from XFree - * as well and currently is only implemented for the CRT DAC, the - * code for the TVDAC is commented out in XFree as "non working" - */ -static int radeon_crt_is_connected(struct radeonfb_info *rinfo, int is_crt_dac) -{ - int connected = 0; - /* - * the monitor either wasn't connected or it is a non-DDC CRT. - * try to probe it - */ - if (is_crt_dac) - { - unsigned long ulOrigVCLK_ECP_CNTL; - unsigned long ulOrigDAC_CNTL; - unsigned long ulOrigDAC_EXT_CNTL; - unsigned long ulOrigCRTC_EXT_CNTL; - unsigned long ulData; - unsigned long ulMask; - - ulOrigVCLK_ECP_CNTL = INPLL(VCLK_ECP_CNTL); - ulData = ulOrigVCLK_ECP_CNTL; - ulData &= ~(PIXCLK_ALWAYS_ONb | PIXCLK_DAC_ALWAYS_ONb); - ulMask = ~(PIXCLK_ALWAYS_ONb | PIXCLK_DAC_ALWAYS_ONb); - OUTPLLP(VCLK_ECP_CNTL, ulData, ulMask); - ulOrigCRTC_EXT_CNTL = INREG(CRTC_EXT_CNTL); - ulData = ulOrigCRTC_EXT_CNTL; - ulData |= CRTC_CRT_ON; - OUTREG(CRTC_EXT_CNTL, ulData); - ulOrigDAC_EXT_CNTL = INREG(DAC_EXT_CNTL); - ulData = ulOrigDAC_EXT_CNTL; - ulData &= ~DAC_FORCE_DATA_MASK; - ulData |= (DAC_FORCE_BLANK_OFF_EN | DAC_FORCE_DATA_EN | DAC_FORCE_DATA_SEL_MASK); - if ((rinfo->family == CHIP_FAMILY_RV250) || (rinfo->family == CHIP_FAMILY_RV280)) - ulData |= (0x01b6 << DAC_FORCE_DATA_SHIFT); - else - ulData |= (0x01ac << DAC_FORCE_DATA_SHIFT); - OUTREG(DAC_EXT_CNTL, ulData); - ulOrigDAC_CNTL = INREG(DAC_CNTL); - ulData = ulOrigDAC_CNTL; - ulData |= DAC_CMP_EN; - ulData &= ~(DAC_RANGE_CNTL_MASK | DAC_PDWN); - ulData |= 0x2; - OUTREG(DAC_CNTL, ulData); - wait_ms(1); - ulData = INREG(DAC_CNTL); - connected = (DAC_CMP_OUTPUT & ulData) ? 1 : 0; - ulData = ulOrigVCLK_ECP_CNTL; - ulMask = 0xFFFFFFFFL; - OUTPLLP(VCLK_ECP_CNTL, ulData, ulMask); - OUTREG(DAC_CNTL, ulOrigDAC_CNTL); - OUTREG(DAC_EXT_CNTL, ulOrigDAC_EXT_CNTL ); - OUTREG(CRTC_EXT_CNTL, ulOrigCRTC_EXT_CNTL); - } - return connected ? MT_CRT : MT_NONE; -} - -/* - * Parse the "monitor_layout" string if any. This code is mostly - * copied from XFree's radeon driver - */ -static int radeon_parse_monitor_layout(struct radeonfb_info *rinfo, const char *monitor_layout) -{ - char s1[5], s2[5]; - int i = 0, second = 0; - const char *s; - - if ((monitor_layout == NULL) || (*monitor_layout == '\0')) - { - dbg("%s: monitor_layout missing\r\n"); - return 0; - } - - s = monitor_layout; - do - { - switch (*s) - { - case ',': - s1[i] = '\0'; - i = 0; - second = 1; - break; - - case ' ': - case '\0': - break; - - default: - if (i >= 4) - break; - if (second) - s2[i] = *s; - else - s1[i] = *s; - i++; - break; - } - } while(*s++); - - if (second) - s2[i] = '\0'; - else - { - s1[i] = '\0'; - s2[0] = '\0'; - } - - if (strcmp(s1, "CRT")) - { - rinfo->mon1_type = MT_CRT; - dbg("%s: monitor 1 set to CRT\r\n", __FUNCTION__); - } - else if (strcmp(s1, "TMDS")) - { - rinfo->mon1_type = MT_DFP; - dbg("%s: monitor 1 set to TMDS\r\n", __FUNCTION__); - } - else if (strcmp(s1, "LVDS")) - { - rinfo->mon1_type = MT_LCD; - dbg("%s: monitor 1 set to LVDS\r\n", __FUNCTION__); - } - - if (strcmp(s2, "CRT")) - { - rinfo->mon2_type = MT_CRT; - dbg("%s: monitor 2 set to CRT\r\n", __FUNCTION__); - } - else if (strcmp(s2, "TMDS")) - { - rinfo->mon2_type = MT_DFP; - dbg("%s: monitor 2 set to TMDS\r\n", __FUNCTION__); - } - else if (strcmp(s2, "LVDS")) - { - rinfo->mon2_type = MT_LCD; - dbg("%s: monitor 2 set to LVDS\r\n", __FUNCTION__); - } - return 1; -} - -/* - * Probe display on both primary and secondary card's connector (if any) - * by i2c and try to retreive EDID. The algorithm here comes from XFree's * radeon driver - */ -void radeon_probe_screens(struct radeonfb_info *rinfo, const char *monitor_layout, int ignore_edid) -{ -#ifdef CONFIG_FB_RADEON_I2C - int ddc_crt2_used = 0; -#endif - if (radeon_parse_monitor_layout(rinfo, monitor_layout)) - { - /* - * If user specified a monitor_layout option, use it instead - * of auto-detecting. Maybe we should only use this argument - * on the first radeon card probed or provide a way to specify - * a layout for each card ? - */ -#ifdef CONFIG_FB_RADEON_I2C - dbg("%s: use monitor layout\r\n", __FUNCTION__); - if (!ignore_edid) - { - if (rinfo->mon1_type != MT_NONE) - { - dbg("%s: probe ddc_dvi on MON1\r\n", __FUNCTION__); - if (!radeon_probe_i2c_connector(rinfo, ddc_dvi, &rinfo->mon1_EDID)) - { - dbg("%s: probe ddc_crt2 on MON1\r\n", __FUNCTION__); - radeon_probe_i2c_connector(rinfo, ddc_crt2, &rinfo->mon1_EDID); - ddc_crt2_used = 1; - } - } - if (rinfo->mon2_type != MT_NONE) - { - dbg("%s: probe ddc_vga on MON2\r\n", __FUNCTION__); - if (!radeon_probe_i2c_connector(rinfo, ddc_vga, &rinfo->mon2_EDID) && !ddc_crt2_used) - { - dbg("%s: probe ddc_crt2 on MON2\r\n", __FUNCTION__); - radeon_probe_i2c_connector(rinfo, ddc_crt2, &rinfo->mon2_EDID); - } - } - } -#endif /* CONFIG_FB_RADEON_I2C */ - if (rinfo->mon1_type == MT_NONE) - { - if (rinfo->mon2_type != MT_NONE) - { - rinfo->mon1_type = rinfo->mon2_type; - rinfo->mon1_EDID = rinfo->mon2_EDID; - } - else - { - rinfo->mon1_type = MT_CRT; - dbg("%s: No valid monitor, assuming CRT on first port\r\n", __FUNCTION__); - } - rinfo->mon2_type = MT_NONE; - rinfo->mon2_EDID = NULL; - } - } - else - { - /* - * Auto-detecting display type (well... trying to ...) - */ -#ifdef CONFIG_FB_RADEON_I2C - dbg("%s: Auto-detecting\r\n", __FUNCTION__); -#endif -#if 0 //#if DEBUG && defined(CONFIG_FB_RADEON_I2C) - { - unsigned char *EDIDs[4] = { NULL, NULL, NULL, NULL }; - int mon_types[4] = {MT_NONE, MT_NONE, MT_NONE, MT_NONE}; - int i; - for(i = 0; i < 4; i++) - mon_types[i] = radeon_probe_i2c_connector(rinfo, i+1, &EDIDs[i]); - } -#endif /* DEBUG */ - /* - * Old single head cards - */ - if (!rinfo->has_CRTC2) - { -#ifdef CONFIG_FB_RADEON_I2C - if (rinfo->mon1_type == MT_NONE) - { - dbg("%s: probe ddc_dvi on MON1\r\n", __FUNCTION__); - rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_dvi, &rinfo->mon1_EDID); - } - if (rinfo->mon1_type == MT_NONE) - { - dbg("%s: probe ddc_vga on MON1\r\n", __FUNCTION__); - rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_vga, &rinfo->mon1_EDID); - } - if (rinfo->mon1_type == MT_NONE) - { - dbg("%s: probe ddc_crt2 on MON1\r\n", __FUNCTION__); - rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_crt2, &rinfo->mon1_EDID); - } -#endif /* CONFIG_FB_RADEON_I2C */ - if (rinfo->mon1_type == MT_NONE) - rinfo->mon1_type = MT_CRT; - goto bail; - } - /* - * Probe primary head (DVI or laptop internal panel) - */ -#ifdef CONFIG_FB_RADEON_I2C - if (rinfo->mon1_type == MT_NONE) - { - dbg("%s: probe ddc_dvi on MON1\r\n", __FUNCTION__); - rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_dvi, &rinfo->mon1_EDID); - } - if (rinfo->mon1_type == MT_NONE) - { - dbg("%s: probe ddc_crt2 on MON1\r\n", __FUNCTION__); - rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_crt2, &rinfo->mon1_EDID); - if (rinfo->mon1_type != MT_NONE) - ddc_crt2_used = 1; - } -#endif /* CONFIG_FB_RADEON_I2C */ - if (rinfo->mon1_type == MT_NONE && rinfo->is_mobility - && (INREG(LVDS_GEN_CNTL) & LVDS_ON)) - { - rinfo->mon1_type = MT_LCD; - dbg("%s: Non-DDC laptop panel detected\r\n", __FUNCTION__); - } - if (rinfo->mon1_type == MT_NONE) - rinfo->mon1_type = radeon_crt_is_connected(rinfo, rinfo->reversed_DAC); - /* - * Probe secondary head (mostly VGA, can be DVI) - */ -#ifdef CONFIG_FB_RADEON_I2C - if (rinfo->mon2_type == MT_NONE) - { - dbg("%s: probe ddc_vga on MON2\r\n", __FUNCTION__); - rinfo->mon2_type = radeon_probe_i2c_connector(rinfo, ddc_vga, &rinfo->mon2_EDID); - } - if (rinfo->mon2_type == MT_NONE && !ddc_crt2_used) - { - dbg("%s: probe ddc_crt2 on MON2\r\n", __FUNCTION__); - rinfo->mon2_type = radeon_probe_i2c_connector(rinfo, ddc_crt2, &rinfo->mon2_EDID); - } -#endif /* CONFIG_FB_RADEON_I2C */ - if (rinfo->mon2_type == MT_NONE) - rinfo->mon2_type = radeon_crt_is_connected(rinfo, !rinfo->reversed_DAC); - /* - * If we only detected port 2, we swap them, if none detected, - * assume CRT (maybe fallback to old BIOS_SCRATCH stuff ? or look - * at FP registers ?) - */ - if (rinfo->mon1_type == MT_NONE) - { - if (rinfo->mon2_type != MT_NONE) - { - rinfo->mon1_type = rinfo->mon2_type; - rinfo->mon1_EDID = rinfo->mon2_EDID; - } - else - rinfo->mon1_type = MT_CRT; - - rinfo->mon2_type = MT_NONE; - rinfo->mon2_EDID = NULL; - } - /* - * Deal with reversed TMDS - */ - if (rinfo->reversed_TMDS) - { - /* Always keep internal TMDS as primary head */ - if (rinfo->mon1_type == MT_DFP || rinfo->mon2_type == MT_DFP) - { - int tmp_type = rinfo->mon1_type; - unsigned char *tmp_EDID = rinfo->mon1_EDID; - rinfo->mon1_type = rinfo->mon2_type; - rinfo->mon1_EDID = rinfo->mon2_EDID; - rinfo->mon2_type = tmp_type; - rinfo->mon2_EDID = tmp_EDID; - if (rinfo->mon1_type == MT_CRT || rinfo->mon2_type == MT_CRT) - rinfo->reversed_DAC ^= 1; - } - } - } - - if (ignore_edid) - { - driver_mem_free(rinfo->mon1_EDID); - rinfo->mon1_EDID = NULL; - driver_mem_free(rinfo->mon2_EDID); - rinfo->mon2_EDID = NULL; - } - -bail: - dbg("%s: Monitor 1 type %s found\r\n", __FUNCTION__, radeon_get_mon_name(rinfo->mon1_type)); - if (rinfo->mon1_EDID) - { - dbg("%s: EDID probed\r\n", __FUNCTION__); - } - - if (!rinfo->has_CRTC2) - return; - dbg("%s: Monitor 2 type %s\r\n", __FUNCTION__, radeon_get_mon_name(rinfo->mon2_type)); - if (rinfo->mon2_EDID) - { - dbg("%s: EDID probed\r\n", __FUNCTION__); - } -} - -/* - * Fill up panel infos from a mode definition, either returned by the EDID - * or from the default mode when we can't do any better - */ -static void radeon_var_to_panel_info(struct radeonfb_info *rinfo, struct fb_var_screeninfo *var) -{ - rinfo->panel_info.xres = var->xres; - rinfo->panel_info.yres = var->yres; - rinfo->panel_info.clock = 100000000 / var->pixclock; - rinfo->panel_info.hOver_plus = var->right_margin; - rinfo->panel_info.hSync_width = var->hsync_len; - rinfo->panel_info.hblank = var->left_margin + (var->right_margin + var->hsync_len); - rinfo->panel_info.vOver_plus = var->lower_margin; - rinfo->panel_info.vSync_width = var->vsync_len; - rinfo->panel_info.vblank = var->upper_margin + (var->lower_margin + var->vsync_len); - rinfo->panel_info.hAct_high = (var->sync & FB_SYNC_HOR_HIGH_ACT) != 0; - rinfo->panel_info.vAct_high = (var->sync & FB_SYNC_VERT_HIGH_ACT) != 0; - rinfo->panel_info.valid = 1; - /* - * We use a default of 200ms for the panel power delay, - * I need to have a real schedule() instead of mdelay's in the panel code. - * we might be possible to figure out a better power delay either from - * MacOS OF tree or from the EDID block (proprietary extensions ?) - */ - rinfo->panel_info.pwr_delay = 200; -} - -static void radeon_videomode_to_var(struct fb_var_screeninfo *var, - const struct fb_videomode *mode) -{ - var->xres = mode->xres; - var->yres = mode->yres; - var->xres_virtual = mode->xres; - var->yres_virtual = mode->yres; - var->xoffset = 0; - var->yoffset = 0; - var->pixclock = mode->pixclock; - var->left_margin = mode->left_margin; - var->right_margin = mode->right_margin; - var->upper_margin = mode->upper_margin; - var->lower_margin = mode->lower_margin; - var->hsync_len = mode->hsync_len; - var->vsync_len = mode->vsync_len; - var->sync = mode->sync; - var->vmode = mode->vmode; -} - -/* - * Build the modedb for head 1 (head 2 will come later), check panel infos - * from either BIOS or EDID, and pick up the default mode - */ -void radeon_check_modes(struct radeonfb_info *rinfo, struct mode_option *resolution) -{ - struct fb_info *info = rinfo->info; - int has_default_mode = 0; - struct mode_option xres_yres; - dbg("%s: radeon_check_modes\r\n", __FUNCTION__); - - /* - * Fill default var first - */ - memcpy(&info->var, &radeonfb_default_var, sizeof(struct fb_var_screeninfo)); - - /* - * Parse EDID detailed timings and deduce panel infos if any. Right now - * we only deal with first entry returned by parse_EDID, we may do better - * some day... - */ - if (!rinfo->panel_info.use_bios_dividers - && rinfo->mon1_type != MT_CRT && rinfo->mon1_EDID) - { - struct fb_var_screeninfo var; - - dbg("%s: fb_parse_edid\r\n", __FUNCTION__); - if (fb_parse_edid(rinfo->mon1_EDID, &var) == 0) - { - if ((var.xres >= rinfo->panel_info.xres) && (var.yres >= rinfo->panel_info.yres)) - radeon_var_to_panel_info(rinfo, &var); - } - else - { - dbg("%s: no data to parse\r\n", __FUNCTION__); - } - } - /* - * If we have some valid panel infos, we setup the default mode based on - * those - */ - if (rinfo->mon1_type != MT_CRT && rinfo->panel_info.valid) - { - struct fb_var_screeninfo *var = &info->var; - dbg("%s: setup the default mode based on panel info\r\n", __FUNCTION__); - var->xres = rinfo->panel_info.xres; - var->yres = rinfo->panel_info.yres; - var->xres_virtual = rinfo->panel_info.xres; - var->yres_virtual = rinfo->panel_info.yres; - var->xoffset = var->yoffset = 0; - var->bits_per_pixel = 8; - var->pixclock = 100000000 / rinfo->panel_info.clock; - var->left_margin = (rinfo->panel_info.hblank - rinfo->panel_info.hOver_plus - rinfo->panel_info.hSync_width); - var->right_margin = rinfo->panel_info.hOver_plus; - var->upper_margin = (rinfo->panel_info.vblank - rinfo->panel_info.vOver_plus - rinfo->panel_info.vSync_width); - var->lower_margin = rinfo->panel_info.vOver_plus; - var->hsync_len = rinfo->panel_info.hSync_width; - var->vsync_len = rinfo->panel_info.vSync_width; - var->sync = 0; - - if (rinfo->panel_info.hAct_high) - var->sync |= FB_SYNC_HOR_HIGH_ACT; - - if (rinfo->panel_info.vAct_high) - var->sync |= FB_SYNC_VERT_HIGH_ACT; - - var->vmode = 0; - has_default_mode = 1; - } - - /* - * Now build modedb from EDID - */ - if (rinfo->mon1_EDID) - { - fb_edid_to_monspecs(rinfo->mon1_EDID, &info->monspecs); - rinfo->mon1_modedb = info->monspecs.modedb; - rinfo->mon1_dbsize = info->monspecs.modedb_len; - } - /* - * Finally, if we don't have panel infos we need to figure some (or - * we try to read it from card), we try to pick a default mode - * and create some panel infos. Whatever... - */ - if (rinfo->mon1_type != MT_CRT && !rinfo->panel_info.valid) - { - struct fb_videomode *modedb; - int dbsize; - - if (rinfo->panel_info.xres == 0 || rinfo->panel_info.yres == 0) - { - unsigned long tmp = INREG(FP_HORZ_STRETCH) & HORZ_PANEL_SIZE; - - rinfo->panel_info.xres = ((tmp >> HORZ_PANEL_SHIFT) + 1) * 8; - - tmp = INREG(FP_VERT_STRETCH) & VERT_PANEL_SIZE; - rinfo->panel_info.yres = (tmp >> VERT_PANEL_SHIFT) + 1; - } - - if ((rinfo->panel_info.xres <= 8) || (rinfo->panel_info.yres <= 1)) - { - rinfo->mon1_type = MT_CRT; - goto pickup_default; - } - modedb = rinfo->mon1_modedb; - dbsize = rinfo->mon1_dbsize; - xres_yres.used = 1; - xres_yres.width = rinfo->panel_info.xres; - xres_yres.height = rinfo->panel_info.yres; - xres_yres.bpp = xres_yres.freq = 0; - if (fb_find_mode(&info->var, info, &xres_yres, modedb, dbsize, NULL, - (resolution->bpp >= 8) ? (unsigned int)resolution->bpp : 8) == 0) - { - rinfo->mon1_type = MT_CRT; - goto pickup_default; - } - has_default_mode = 1; - radeon_var_to_panel_info(rinfo, &info->var); - } -pickup_default: - /* - * Apply passed-in mode option if any - */ - if (resolution->used) - { - if (fb_find_mode(&info->var, info, resolution, info->monspecs.modedb, - info->monspecs.modedb_len, NULL, (resolution->bpp >= 8) ? (unsigned int)resolution->bpp : 8) != 0) - has_default_mode = 1; - } - /* - * Still no mode, let's pick up a default from the db - */ - if (!has_default_mode && info->monspecs.modedb != NULL) - { - struct fb_monspecs *specs = &info->monspecs; - struct fb_videomode *modedb = NULL; - - /* get preferred timing */ - if (specs->misc & FB_MISC_1ST_DETAIL) - { - int i; - for(i = 0; i < specs->modedb_len; i++) - { - if (specs->modedb[i].flag & FB_MODE_IS_FIRST) - { - modedb = &specs->modedb[i]; - break; - } - } - } - else - { - /* otherwise, get first mode in database */ - modedb = &specs->modedb[0]; - } - - if (modedb != NULL) - { - info->var.bits_per_pixel = 8; - radeon_videomode_to_var(&info->var, modedb); - has_default_mode = 1; - } - } -} - -/* - * The code below is used to pick up a mode in check_var and - * set_var. It should be made generic - */ - -/* - * This is used when looking for modes. We assign a "distance" value - * to a mode in the modedb depending how "close" it is from what we - * are looking for. - * Currently, we don't compare that much, we could do better but - * the current fbcon doesn't quite mind ;) - */ -static int radeon_compare_modes(const struct fb_var_screeninfo *var, - const struct fb_videomode *mode) -{ - int distance = 0; - - distance = mode->yres - var->yres; - distance += (mode->xres - var->xres)/2; - - return distance; -} - -/* - * This function is called by check_var, it gets the passed in mode parameter, and - * outputs a valid mode matching the passed-in one as closely as possible. - * We need something better ultimately. - */ -int radeon_match_mode(struct radeonfb_info *rinfo, - struct fb_var_screeninfo *dest, - const struct fb_var_screeninfo *src) -{ - const struct fb_videomode *db = vesa_modes; - int i, dbsize = 34; - int has_rmx, native_db = 0; - int distance = INT_MAX; - const struct fb_videomode *candidate = NULL; - - dbg("%s:\r\n", __FUNCTION__); - - /* Start with a copy of the requested mode */ - memcpy(dest, src, sizeof(struct fb_var_screeninfo)); - - /* Check if we have a modedb built from EDID */ - if (rinfo->mon1_modedb) - { - db = rinfo->mon1_modedb; - dbsize = rinfo->mon1_dbsize; - native_db = 1; - } - /* Check if we have a scaler allowing any fancy mode */ - has_rmx = (rinfo->mon1_type == MT_LCD) || (rinfo->mon1_type == MT_DFP); - - /* If we have a scaler and are passed FB_ACTIVATE_TEST or - * FB_ACTIVATE_NOW, just do basic checking and return if the - * mode match - */ - if ((src->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_TEST - || (src->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) - { - /* We don't have an RMX, validate timings. If we don't have - * monspecs, we should be paranoid and not let use go above - * 640x480-60, but I assume userland knows what it's doing here - * (though I may be proven wrong...) - */ - if ((has_rmx == 0) && rinfo->mon1_modedb) - { - if (fb_validate_mode((struct fb_var_screeninfo *)src, rinfo->info)) - return -1; //-EINVAL; - } - return 0; - } - dbg("%s:look for a mode in the database\r\n", __FUNCTION__); - - /* Now look for a mode in the database */ - while(db) - { - for (i = 0; i < dbsize; i++) - { - int d; - - if ((db[i].yres < src->yres) || (db[i].xres < src->xres)) - continue; - d = radeon_compare_modes(src, &db[i]); - /* If the new mode is at least as good as the previous one, - * then it's our new candidate - */ - if (d < distance) - { - candidate = &db[i]; - distance = d; - } - } - db = NULL; - /* If we have a scaler, we allow any mode from the database */ - if (native_db && has_rmx) - { - db = vesa_modes; - dbsize = 34; - native_db = 0; - } - } - /* If we have found a match, return it */ - if (candidate != NULL) - { - radeon_videomode_to_var(dest, candidate); - return 0; - } - /* If we haven't and don't have a scaler, fail */ - if (!has_rmx) - return -1; //-EINVAL; - return 0; -} diff --git a/spi/dspi.c b/spi/dspi.c deleted file mode 100644 index de9cace..0000000 --- a/spi/dspi.c +++ /dev/null @@ -1,187 +0,0 @@ -/* - * dspi.c - * - * Coldfire DSPI (DMA Serial Peripherial Interface). - * - * On the Coldfire, the DSPI interface supports 4 SPI output channels and one input channel. - * On the Firebee, DSPICS5 is connected to the SD card slot. - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 16.10.2013 - * Author: mfro - */ - -#include -#include - -struct baudrate -{ - int br_divisor; - int pbr_divisor; - int divider; -}; - -static const int system_clock = 132000000; /* System clock in Hz */ - -struct baudrate baudrates[] = -{ - { 0b0000, 0b00, 4 }, - { 0b0000, 0b01, 6 }, - { 0b0001, 0b00, 8 }, - { 0b0000, 0b10, 10 }, - { 0b0001, 0b01, 12 }, - { 0b0010, 0b00, 12 }, - { 0b0000, 0b11, 14 }, - { 0b0011, 0b00, 16 }, - { 0b0010, 0b01, 18 }, - { 0b0001, 0b10, 20 }, - { 0b0011, 0b01, 24 }, - { 0b0001, 0b11, 28 }, - { 0b0010, 0b10, 30 }, - { 0b0100, 0b00, 32 }, - { 0b0011, 0b10, 40 }, - { 0b0010, 0b11, 42 }, - { 0b0100, 0b01, 48 }, - { 0b0011, 0b11, 56 }, - { 0b0101, 0b00, 64 }, - { 0b0100, 0b10, 80 }, - { 0b0101, 0b01, 96 }, - { 0b0100, 0b11, 112 }, - { 0b0110, 0b00, 128 }, - { 0b0101, 0b10, 160 }, - { 0b0110, 0b01, 192 }, - { 0b0101, 0b11, 224 }, - { 0b0111, 0b00, 256 }, - { 0b0110, 0b10, 320 }, - { 0b0111, 0b01, 384 }, - { 0b0110, 0b11, 448 }, - { 0b1000, 0b00, 512 }, - { 0b0111, 0b10, 640 }, - { 0b1000, 0b01, 768 }, - { 0b0111, 0b11, 896 }, - { 0b1001, 0b00, 1024 }, - { 0b1000, 0b10, 1280 }, - { 0b1001, 0b01, 1536 }, - { 0b1000, 0b11, 1792 }, - { 0b1010, 0b00, 2048 }, - { 0b1001, 0b10, 2560 }, - { 0b1010, 0b01, 3072 }, - { 0b1001, 0b11, 3584 }, - { 0b1011, 0b00, 4096 }, - { 0b1010, 0b10, 5120 }, - { 0b1011, 0b01, 6144 }, - { 0b1010, 0b11, 7168 }, - { 0b1100, 0b00, 8192 }, - { 0b1011, 0b10, 10240 }, - { 0b1100, 0b01, 12288 }, - { 0b1011, 0b11, 14336 }, - { 0b1101, 0b00, 16384 }, - { 0b1100, 0b10, 20480 }, - { 0b1101, 0b01, 24576 }, - { 0b1100, 0b11, 28672 }, - { 0b1110, 0b00, 32768 }, - { 0b1101, 0b10, 40960 }, - { 0b1110, 0b01, 49152 }, - { 0b1101, 0b11, 57344 }, - { 0b1111, 0b00, 65536 }, - { 0b1110, 0b10, 81920 }, - { 0b1111, 0b01, 98304 }, - { 0b1110, 0b11, 114688 }, - { 0b1111, 0b10, 163840 }, - { 0b1111, 0b11, 229376 }, -}; - -/* - * set the dspi clock to rate or - if no exact match possible - to the next lower possible baudrate - */ -int dspi_set_baudrate(int rate) -{ - int set_baudrate = 0; - int br; - int pbr; - int i; - - for (i = sizeof(baudrates) / sizeof(struct baudrate) - 1; i >= 0; i--) - { - set_baudrate = system_clock / baudrates[i].divider; - - if (set_baudrate > rate) - { - continue; - } - br = baudrates[i].br_divisor; - pbr = baudrates[i].pbr_divisor; - - /* TODO: set br and pbr here */ - - return set_baudrate; - } - - return 0; -} - -static uint32_t dspi_fifo_val = MCF_DSPI_DTFR_CTCNT; - -/* - * Exchange a byte. If last is false (0), there will be more bytes to follow (EOQ flag in DTFR left unset) - */ -uint8_t dspi_xchg_byte(int device, uint8_t byte, int last) -{ - uint32_t fifo; - uint8_t res; - - fifo = dspi_fifo_val | (byte & 0xff); /* transfer bytes only */ - fifo |= (last ? MCF_DSPI_DTFR_EOQ : 0); /* mark last transfer */ - MCF_DSPI_DTFR = fifo; - while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait until DSPI transfer complete */ - fifo = MCF_DSPI_DRFR; /* read transferred word */ - - MCF_DSPI_DSR = -1; /* clear DSPI status register */ - - res = fifo & 0xff; - - return res; -} - -/* Receive multiple byte with 0xff as output - * - * buff: pointer to data buffer - * btr: number of bytes to receive (16, 64 or 512) - */ -static void dspi_rcv_byte_multi(int device, uint8_t *buff, uint32_t count) -{ - int i; - - for (i = 0; i < count - 1; i++) - *buff++ = dspi_xchg_byte(device, 0xff, 0); - *buff++ = dspi_xchg_byte(device, 0xff, 1); /* transfer last byte and stop transmission */ -} - -/* Send multiple byte, discard input - * - * buff: pointer to data - * btx: number of bytes to send - */ -static void dspi_xmt_byte_multi(int device, const uint8_t *buff, uint32_t btx) -{ - int i; - - for (i = 0; i < btx - 1; i++) - dspi_xchg_byte(device, *buff++, 0); - dspi_xchg_byte(device, *buff++, 1); /* transfer last byte and indicate end of transmission */ -} - diff --git a/spi/mmc.c b/spi/mmc.c deleted file mode 100644 index aee4ed9..0000000 --- a/spi/mmc.c +++ /dev/null @@ -1,814 +0,0 @@ -#include -#include -#include -#include -#include -#include - -/* - * Firebee: MMCv3/SDv1/SDv2 (SPI mode) control module - * - * - * Copyright (C) 2011, ChaN, all right reserved. - * - * This software is a free software and there is NO WARRANTY. - * No restriction on use. You can use, modify and redistribute it for - * personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY. - * Redistributions of source code must retain the above copyright notice. - * - */ - -/* Copyright (C) 2012, mfro, all rights reserved. */ - -// #define DEBUG_MMC -#ifdef DEBUG_MMC -#define debug_printf(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0) -#else -#define debug_printf(format, arg...) do { ; } while (0) -#endif /* DEBUG_MMC */ - -#define CS_LOW() { dspi_fifo_val |= MCF_DSPI_DTFR_CS5; } -#define CS_HIGH() { dspi_fifo_val &= ~MCF_DSPI_DTFR_CS5; } - -/* - * DCTAR_PBR (baud rate prescaler) and DCTAR_BR (baud rate scaler) together determine the SPI baud rate. The forumula is - * - * baud rate = system clock / DCTAR_PBR * 1 / DCTAR_BR. - * - * System clock for the Firebee is 133 MHZ. - * - * The SPICLK_FAST() example calculates as follows: baud rate = 133 MHz / 3 * 1 / 2 = 22,16 MHz - * SPICLK_SLOW() should be between 100 and 400 kHz: 133 MHz / 1 * 1 / 1024 = 129 kHz - */ -#define SPICLK_FAST() { MCF_DSPI_DCTAR0 = MCF_DSPI_DCTAR_TRSZ(0b0111) | /* transfer size = 8 bit */ \ - MCF_DSPI_DCTAR_PCSSCK(0b01) | /* 3 clock DSPICS to DSPISCK delay prescaler */ \ - MCF_DSPI_DCTAR_PASC_3CLK | /* 3 clock DSPISCK to DSPICS negation prescaler */ \ - MCF_DSPI_DCTAR_PDT_3CLK | /* 3 clock delay between DSPICS assertions prescaler */ \ - MCF_DSPI_DCTAR_PBR_1CLK | /* 3 clock baudrate prescaler */ \ - MCF_DSPI_DCTAR_CSSCK(1) | /* delay scaler * 4 */\ - MCF_DSPI_DCTAR_ASC(0b0001) | /* 2 */ \ - MCF_DSPI_DCTAR_DT(0b0010) | /* 2 */ \ - MCF_DSPI_DCTAR_BR(0b0001); } /* clock / 2 */ - -#define SPICLK_SLOW() { \ - MCF_DSPI_DCTAR0 = MCF_DSPI_DCTAR_TRSZ(0b111) | /* transfer size = 8 bit */ \ - MCF_DSPI_DCTAR_PCSSCK(0b01) | /* 3 clock DSPICS to DSPISCK delay prescaler */ \ - MCF_DSPI_DCTAR_PASC_3CLK | /* 3 clock DSPISCK to DSPICS negation prescaler */ \ - MCF_DSPI_DCTAR_PDT_3CLK | /* 3 clock delay between DSPICS assertions prescaler */ \ - MCF_DSPI_DCTAR_PBR_3CLK | /* 1 clock baudrate prescaler */ \ - MCF_DSPI_DCTAR_CSSCK(8) | /* delay scaler * 512 */\ - MCF_DSPI_DCTAR_ASC(8) | /* 2 */ \ - MCF_DSPI_DCTAR_DT(9) | /* 2 */ \ - MCF_DSPI_DCTAR_BR(7); \ - } - - - -/*-------------------------------------------------------------------------- - - Module Private Functions - ----------------------------------------------------------------------------*/ - -#include "diskio.h" - - -/* MMC/SD command */ -#define CMD0 (0) /* GO_IDLE_STATE */ -#define CMD1 (1) /* SEND_OP_COND (MMC) */ -#define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */ -#define CMD8 (8) /* SEND_IF_COND */ -#define CMD9 (9) /* SEND_CSD */ -#define CMD10 (10) /* SEND_CID */ -#define CMD12 (12) /* STOP_TRANSMISSION */ -#define ACMD13 (0x80+13) /* SD_STATUS (SDC) */ -#define CMD16 (16) /* SET_BLOCKLEN */ -#define CMD17 (17) /* READ_SINGLE_BLOCK */ -#define CMD18 (18) /* READ_MULTIPLE_BLOCK */ -#define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */ -#define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */ -#define CMD24 (24) /* WRITE_BLOCK */ -#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */ -#define CMD32 (32) /* ERASE_ER_BLK_START */ -#define CMD33 (33) /* ERASE_ER_BLK_END */ -#define CMD38 (38) /* ERASE */ -#define CMD55 (55) /* APP_CMD */ -#define CMD58 (58) /* READ_OCR */ - - -static volatile DSTATUS Stat = 0 /* STA_NOINIT */; /* Physical drive status */ -static uint8_t CardType; /* Card type flags */ - - -static uint32_t dspi_fifo_val = MCF_DSPI_DTFR_CTCNT; - -/*-----------------------------------------------------------------------*/ -/* Send/Receive data to the MMC (Platform dependent) */ -/*-----------------------------------------------------------------------*/ - -/* - * Exchange a byte. If last is false (0), there will be more bytes to follow (EOQ flag in DTFR left unset) - */ -static uint8_t xchg_spi(uint8_t byte, int last) -{ - uint32_t fifo; - uint8_t res; - - fifo = dspi_fifo_val | (byte & 0xff); /* transfer bytes only */ - //fifo |= (last ? MCF_DSPI_DTFR_EOQ : 0); /* mark last transfer */ - MCF_DSPI_DTFR = fifo; - while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait until DSPI transfer complete */ - fifo = MCF_DSPI_DRFR; /* read transferred word */ - - MCF_DSPI_DSR = -1; /* clear DSPI status register */ - - res = fifo & 0xff; - - return res; -} - - -/* Receive multiple byte - * - * buff: pointer to data buffer - * btr: number of bytes to receive (16, 64 or 512) - */ -static void rcvr_spi_multi(uint8_t *buff, uint32_t count) -{ - int i; - - for (i = 0; i < count - 1; i++) - *buff++ = xchg_spi(0xff, 0); - *buff++ = xchg_spi(0xff, 1); /* transfer last byte and stop transmission */ -} - - -#if _USE_WRITE -/* Send multiple byte - * - * buff: pointer to data - * btx: number of bytes to send - */ -static void xmit_spi_multi(const uint8_t *buff, uint32_t btx) -{ - int i; - - for (i = 0; i < btx - 1; i++) - xchg_spi(*buff++, 0); - xchg_spi(*buff++, 1); /* transfer last byte and indicate end of transmission */ -} -#endif - - -static bool card_ready(void) -{ - uint8_t d; - - d = xchg_spi(0xff, 1); - return (d == 0xff); -} - -/* - * Wait for card ready - * - * wt: timeout in ns - * returns 1: ready, 0: timeout - */ -static int wait_ready(uint32_t wt) -{ - return waitfor(wt * 1000, card_ready); -} - - - -/* - * Deselect card and release SPI - */ -static void deselect(void) -{ - CS_HIGH(); - wait_ready(50); /* Dummy clock (force DO hi-z for multiple slave SPI) */ -} - - - -/* - * Select card and wait for ready - */ - -static int select(void) /* 1:OK, 0:Timeout */ -{ - CS_LOW(); - - if (wait_ready(500)) - return 1; /* OK */ - deselect(); - return 0; /* Timeout */ -} - - - -/* - * Control SPI module (Platform dependent) - */ -static void power_on(void) /* Enable SSP module */ -{ - MCF_PAD_PAR_DSPI = 0x1fff; /* configure all DSPI GPIO pins for DSPI usage */ - dspi_fifo_val = MCF_DSPI_DTFR_CTCNT; - /* - * initialize DSPI module configuration register - */ - MCF_DSPI_DMCR = MCF_DSPI_DMCR_MSTR | /* FireBee is DSPI master*/ - MCF_DSPI_DMCR_CSIS5 | /* CS5 inactive state high */ - MCF_DSPI_DMCR_CSIS3 | /* CS3 inactive state high */ - MCF_DSPI_DMCR_CSIS2 | /* CS2 inactive state high */ - MCF_DSPI_DMCR_CSIS0 | /* CS0 inactive state high */ - MCF_DSPI_DMCR_DTXF | /* disable transmit FIFO */ - MCF_DSPI_DMCR_DRXF | /* disable receive FIFO */ - MCF_DSPI_DMCR_CTXF | /* clear transmit FIFO */ - MCF_DSPI_DMCR_CRXF; /* clear receive FIFO */ - - /* initialize DSPI clock and transfer attributes register 0 */ - SPICLK_SLOW(); - - CS_HIGH(); /* Set CS# high */ - - /* card should now be initialized as MMC */ - - wait(10 * 1000); /* 10ms */ -} - - -static void power_off (void) /* Disable SPI function */ -{ - select(); /* Wait for card ready */ - deselect(); -} - - -/*-----------------------------------------------------------------------*/ -/* Receive a data packet from the MMC */ -/*-----------------------------------------------------------------------*/ -static int rcvr_datablock(uint8_t *buff, uint32_t btr) -{ - uint8_t token; - int32_t target = MCF_SLT_SCNT(0) - (200L * 1000L * 132L); - - do { /* Wait for DataStart token in timeout of 200ms */ - token = xchg_spi(0xFF, 0); - } while ((token == 0xFF) && MCF_SLT_SCNT(0) - target > 0); - - if (token == 0xff) - { - debug_printf("no data start token received after 2000ms in rcvr_datablock\r\n"); - return 0; - } - - if (token != 0xFE) - { - debug_printf("invalid token (%x) in rcvr_datablock()!\r\n", token); - return 0; /* Function fails if invalid DataStart token or timeout */ - } - - rcvr_spi_multi(buff, btr); /* Store trailing data to the buffer */ - - xchg_spi(0xFF, 1); - xchg_spi(0xFF, 1); /* Discard CRC */ - - return 1; /* Function succeeded */ -} - - - -/*-----------------------------------------------------------------------*/ -/* Send a data packet to the MMC */ -/*-----------------------------------------------------------------------*/ - -#if _USE_WRITE -static int xmit_datablock(const uint8_t *buff, uint8_t token) -{ - uint8_t resp; - - - if (!wait_ready(500)) - { - debug_printf("card did not respond ready after 500 ms in xmit_datablock()\r\n"); - return 0; /* Wait for card ready */ - } - - xchg_spi(token, 1); /* Send token */ - if (token != 0xFD) { /* Send data if token is other than StopTran */ - xmit_spi_multi(buff, 512); /* Data */ - xchg_spi(0xFF, 1); - xchg_spi(0xFF, 1); /* Dummy CRC */ - - resp = xchg_spi(0xFF, 1); /* Receive data resp */ - if ((resp & 0x1F) != 0x05) /* Function fails if the data packet was not accepted */ - { - debug_printf("card did not accept data packet in xmit_datablock() (resp = %x)\r\n", resp & 0x1F); - return 0; - } - } - - wait_ready(30); - - return 1; -} -#endif - - -/*-----------------------------------------------------------------------*/ -/* Send a command packet to the MMC */ -/*-----------------------------------------------------------------------*/ - -static uint8_t send_cmd(uint8_t cmd, uint32_t arg) -{ - int n; - int res; - - if (cmd & 0x80) - { /* Send a CMD55 prior to ACMD */ - cmd &= 0x7F; - res = send_cmd(CMD55, 0); - if (res > 1) - return res; - } - - /* Select card */ - deselect(); - if (!select()) - { - debug_printf("card could not be selected in send_cmd()\r\n"); - return 0xFF; - } - - if (!wait_ready(500)) - { - debug_printf("card did not respond ready after 5000 ms in send_cmd()\r\n"); - return 0xff; /* Wait for card ready */ - } - - /* Send command packet */ - xchg_spi(0x40 | cmd, 0); /* Start + command index */ - xchg_spi((uint8_t)(arg >> 24), 0); /* Argument[31..24] */ - xchg_spi((uint8_t)(arg >> 16), 0); /* Argument[23..16] */ - xchg_spi((uint8_t)(arg >> 8), 0); /* Argument[15..8] */ - xchg_spi((uint8_t)arg, 1); /* Argument[7..0] */ - - n = 0x01; /* Dummy CRC + Stop */ - if (cmd == CMD0) - n = 0x95; /* Valid CRC for CMD0(0) */ - if (cmd == CMD8) - n = 0x87; /* Valid CRC for CMD8(0x1AA) */ - xchg_spi(n, 0); - - /* Receive command resp */ - if (cmd == CMD12) - { - xchg_spi(0xFF, 0); /* Discard following one byte when CMD12 */ - } - - n = 1000; /* Wait for response (1000 bytes max) */ - do - res = xchg_spi(0xFF, 1); - while ((res & 0x80) && --n); - return res; /* Return received response */ -} - - - -/*-------------------------------------------------------------------------- - - Public Functions - ----------------------------------------------------------------------------*/ - - -/* - * Initialize disk drive - * - * drv: physical drive number (0) - */ -DSTATUS disk_initialize(uint8_t drv) -{ - uint8_t n, cmd, card_type, ocr[4]; - - if (drv) - return STA_NOINIT; /* Supports only drive 0 */ - - power_on(); /* Initialize SPI */ - - if (Stat & STA_NODISK) - return Stat; /* Is card existing in the socket? */ - - SPICLK_SLOW(); - - for (n = 10; n; n--) - xchg_spi(0xFF, 1); /* Send 80 dummy clocks */ - - card_type = 0; - if (send_cmd(CMD0, 0) == 1) - { - /* Put the card SPI/Idle state */ - int32_t target; - - if (send_cmd(CMD8, 0x1AA) == 1) { /* SDv2? */ - for (n = 0; n < 4; n++) - ocr[n] = xchg_spi(0xFF, 1); /* Get 32 bit return value of R7 resp */ - if (ocr[2] == 0x01 && ocr[3] == 0xAA) - { - int res; - - /* Is the card supports vcc of 2.7-3.6V? */ - target = MCF_SLT_SCNT(0) - (1000L * 1000L * 132); /* 1 sec */ - while (MCF_SLT_SCNT(0) - target > 0) - { - res = send_cmd(ACMD41, 1UL << 30); /* Wait for end of initialization with ACMD41(HCS) */ - if (res != 0xff) - break; - } - debug_printf("res = %d\r\n", res); - - target = MCF_SLT_SCNT(0) - (1000L * 1000L * 132); /* 1 sec */ - while (MCF_SLT_SCNT(0) - target > 0) - { - res = send_cmd(CMD58, 0); /* Check CCS bit in the OCR */ - if (res != 0xff) - break; - } - debug_printf("res = %d\r\n", res); - for (n = 0; n < 4; n++) - ocr[n] = xchg_spi(0xFF, 1); - card_type = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* Card id SDv2 */ - } - } - else - { /* Not SDv2 card */ - if (send_cmd(ACMD41, 0) <= 1) - { /* SDv1 or MMC? */ - card_type = CT_SD1; - cmd = ACMD41; /* SDv1 (ACMD41(0)) */ - } else { - card_type = CT_MMC; - cmd = CMD1; /* MMCv3 (CMD1(0)) */ - } - target = MCF_SLT_SCNT(0) - (1000L * 1000L * 132); /* 1 sec */ - while (MCF_SLT_SCNT(0) - target > 0 && send_cmd(cmd, 0)); /* Wait for end of initialization */ - - if (send_cmd(CMD16, 512) != 0) /* Set block length: 512 */ - card_type = 0; - } - } - CardType = card_type; /* Card type */ - -#ifdef DEBUG - { - uint8_t buff[16]; - res = disk_ioctl(0, MMC_GET_CSD, buff); - - if (res == RES_OK) - { - debug_printf("CSD of card:\r\n"); - hexdump(buff, 16); - } - } -#endif /* DEBUG */ - - deselect(); - - if (card_type) - { - /* OK */ - - SPICLK_FAST(); /* Set fast clock */ - Stat &= ~STA_NOINIT; /* Clear STA_NOINIT flag */ - debug_printf("card type: %d\r\n", card_type); - //res = disk_ioctl(0, MMC_GET_CSD, buff); - /* - if (res == RES_OK) - { - debug_printf("CSD of card now:\r\n"); - hexdump(buff, 16); - } - */ - deselect(); - - } - else - { - /* Failed */ - xprintf("no card type detected in disk_initialize()\r\n"); - power_off(); - Stat = STA_NOINIT; - } - - return Stat; -} - - - -/*-----------------------------------------------------------------------*/ -/* Get disk status */ -/*-----------------------------------------------------------------------*/ - -DSTATUS disk_status(uint8_t drv) -{ - if (drv) return STA_NOINIT; /* Supports only drive 0 */ - - return Stat; /* Return disk status */ -} - -DSTATUS disk_reset(uint8_t drv) -{ - if (drv) return STA_NOINIT; - - deselect(); - disk_initialize(0); - - return 0; -} - -/*-----------------------------------------------------------------------*/ -/* Read sector(s) */ -/*-----------------------------------------------------------------------*/ - -DRESULT disk_read(uint8_t drv, uint8_t *buff, uint32_t sector, uint8_t count) -{ - if (drv) - { - debug_printf("wrong drive in disk_read()\r\n"); - return RES_PARERR; /* Check parameter */ - } - - if (! count) - { - debug_printf("wrong count in disk_read()\r\n"); - return RES_PARERR; - } - - if (Stat & STA_NOINIT) - { - debug_printf("drive not ready in disk_read()\r\n"); - return RES_NOTRDY; /* Check if drive is ready */ - } - - if (!(CardType & CT_BLOCK)) sector *= 512; /* LBA or BA conversion (byte addressing cards) */ - - if (count == 1) { /* Single sector read */ - if ((send_cmd(CMD17, sector) == 0)) /* READ_SINGLE_BLOCK */ - if (rcvr_datablock(buff, 512)) - count = 0; - } - else { /* Multiple sector read */ - if (send_cmd(CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */ - do { - if (!rcvr_datablock(buff, 512)) - break; - buff += 512; - } while (--count); - send_cmd(CMD12, 0); /* STOP_TRANSMISSION */ - } - } - deselect(); - - return count ? RES_ERROR : RES_OK; /* Return result */ -} - - - -/*-----------------------------------------------------------------------*/ -/* Write sector(s) */ -/*-----------------------------------------------------------------------*/ - -#if _USE_WRITE -DRESULT disk_write(uint8_t drv, const uint8_t *buff, uint32_t sector, uint8_t count) -{ - int res; - - if (drv || !count) return RES_PARERR; /* Check parameter */ - if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check drive status */ - if (Stat & STA_PROTECT) return RES_WRPRT; /* Check write protect */ - - if (!(CardType & CT_BLOCK)) - { - sector *= 512; /* LBA ==> BA conversion (byte addressing cards) */ - } - - if (count == 1) - { /* Single sector write */ - res = send_cmd(CMD24, sector); - if (res == 0) - { - count = 0; - } - else - debug_printf("send_cmd(CMD24, ...) failed in disk_write()\r\n"); - - if (xmit_datablock(buff, 0xFE)) - { - count = 0; - } - else - { - debug_printf("xmit_datablock(buff, ...) failed in disk_write()\r\n"); - } - } - else { /* Multiple sector write */ - if (CardType & CT_SDC) send_cmd(ACMD23, count); /* Predefine number of sectors */ - if (send_cmd(CMD25, sector) == 0) - { /* WRITE_MULTIPLE_BLOCK */ - do - { - if (!xmit_datablock(buff, 0xFC)) break; - buff += 512; - } while (--count); - - if (!xmit_datablock(0, 0xFD)) /* STOP_TRAN token */ - { - count = 1; - } - } - } - deselect(); - - if (count) /* we had an error, try a reinit */ - { - debug_printf("disk_write() failed (count=%d)\r\n", count); - } - - return count ? RES_ERROR : RES_OK; /* Return result */ -} -#endif - - -/*-----------------------------------------------------------------------*/ -/* Miscellaneous drive controls other than data read/write */ -/*-----------------------------------------------------------------------*/ - -#if _USE_IOCTL -DRESULT disk_ioctl(uint8_t drv, uint8_t ctrl, void *buff) -{ - DRESULT res; - uint8_t n, csd[16], *ptr = buff; - uint32_t *dp, st, ed, csize; - - - if (drv) return RES_PARERR; /* Check parameter */ - if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */ - - res = RES_ERROR; - - switch (ctrl) { - case CTRL_SYNC : /* Wait for end of internal write process of the drive */ - if (select()) { - deselect(); - res = RES_OK; - } - break; - - case GET_SECTOR_COUNT : /* Get drive capacity in unit of sector (DWORD) */ - if ((send_cmd(CMD9, 0) == 0)) - { - if (rcvr_datablock(csd, 16)) - { - if ((csd[0] >> 6) == 1) - { /* SDC ver 2.00 */ - csize = csd[9] + ((uint16_t)csd[8] << 8) + ((uint32_t)(csd[7] & 63) << 16) + 1; - * (uint32_t*) buff = csize << 10; - } - else - { - /* SDC ver 1.XX or MMC ver 3 */ - n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2; - csize = (csd[8] >> 6) + ((uint16_t)csd[7] << 2) + ((uint16_t)(csd[6] & 3) << 10) + 1; - * (uint32_t*) buff = csize << (n - 9); - } - } - res = RES_OK; - } - break; - - case GET_SECTOR_SIZE : /* Get sector size in unit of byte (WORD) */ - * (uint32_t*) buff = 512; - res = RES_OK; - break; - - case GET_BLOCK_SIZE : /* Get erase block size in unit of sector (DWORD) */ - if (CardType & CT_SD2) { /* SDC ver 2.00 */ - if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */ - xchg_spi(0xFF, 1); - if (rcvr_datablock(csd, 16)) { /* Read partial block */ - for (n = 64 - 16; n; n--) xchg_spi(0xFF, 1); /* Purge trailing data */ - *(uint32_t*)buff = 16UL << (csd[10] >> 4); - res = RES_OK; - } - } - } else { /* SDC ver 1.XX or MMC */ - if ((send_cmd(CMD9, 0) == 0)) - { - if (rcvr_datablock(csd, 16)) - { - /* Read CSD */ - if (CardType & CT_SD1) - { /* SDC ver 1.XX */ - * (uint32_t*) buff = (((csd[10] & 63) << 1) + ((uint16_t)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1); - } - else - { - /* MMC */ - *(uint32_t*)buff = ((uint16_t)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1); - } - } - res = RES_OK; - } - } - break; - - case CTRL_ERASE_SECTOR : /* Erase a block of sectors (used when _USE_ERASE == 1) */ - if (!(CardType & CT_SDC)) break; /* Check if the card is SDC */ - if (disk_ioctl(drv, MMC_GET_CSD, csd)) break; /* Get CSD */ - if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break; /* Check if sector erase can be applied to the card */ - dp = buff; st = dp[0]; ed = dp[1]; /* Load sector block */ - if (!(CardType & CT_BLOCK)) { - st *= 512; ed *= 512; - } - if (send_cmd(CMD32, st) == 0) - { - if (send_cmd(CMD33, ed) == 0) - if (send_cmd(CMD38, 0) == 0) - if (wait_ready(30)) - ; /* Erase sector block */ - } - res = RES_OK; /* FatFs does not check result of this command */ - break; - - /* Following command are not used by FatFs module */ - - case MMC_GET_TYPE : /* Get MMC/SDC type (BYTE) */ - *ptr = CardType; - res = RES_OK; - break; - - case MMC_GET_CSD : /* Read CSD (16 bytes) */ - if (send_cmd(CMD9, 0) == 0 /* READ_CSD */ - && rcvr_datablock(ptr, 16)) - res = RES_OK; - break; - - case MMC_GET_CID : /* Read CID (16 bytes) */ - if (send_cmd(CMD10, 0) == 0 /* READ_CID */ - && rcvr_datablock(ptr, 16)) - res = RES_OK; - break; - - case MMC_GET_OCR : /* Read OCR (4 bytes) */ - if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */ - for (n = 4; n; n--) *ptr++ = xchg_spi(0xFF, 1); - res = RES_OK; - } - break; - - case MMC_GET_SDSTAT : /* Read SD status (64 bytes) */ - if (send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */ - xchg_spi(0xFF, 1); - if (rcvr_datablock(ptr, 64)) - res = RES_OK; - } - break; - - default: - res = RES_PARERR; - break; - } - - deselect(); - - return res; -} -#endif - - -/*-----------------------------------------------------------------------*/ -/* Device timer function */ -/*-----------------------------------------------------------------------*/ -/* This function must be called from timer interrupt routine in period -/ of 1 ms to generate card control timing. -*/ - -#ifdef _NOT_USED_ -void disk_timerproc (void) -{ - uint8_t s; - - s = Stat; - if (WP) /* Write protected */ - s |= STA_PROTECT; - else /* Write enabled */ - s &= ~STA_PROTECT; - //if (INS) /* Card is in socket */ - s &= ~STA_NODISK; - //else /* Socket empty */ - // s |= (STA_NODISK | STA_NOINIT); - Stat = s; -} -#endif /* _NOT_USED_ */ diff --git a/spi/sd_card.c b/spi/sd_card.c deleted file mode 100644 index 66e5c31..0000000 --- a/spi/sd_card.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * sd_card.c - * - * Created on: 16.12.2012 - * Author: mfro - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2012 M. Froeschle - */ - -#include -#include -#include -#include - -#define WELCOME_NAME "WELCOME.MSG" -#define FLASHCODE_NAME "BENCH.BIN" - -#define FLASHCODE_ADDRESS 0x03000000L - -/* - * initialize SD-card and FF FAT filesystem routines. Harness to load a file during boot. - * - * This is currently more like a proof of concept, - * but will be extended to load and execute a bootstrap flasher to be able to flash the Bee directly - * from card. - */ -void sd_card_init(void) -{ - DRESULT res; - FATFS fs; - FRESULT fres; - - disk_initialize(0); - res = disk_status(0); - xprintf("disk status of SD card is %d\r\n", res); - if (res == RES_OK) - { - fres = f_mount(0, &fs); - xprintf("mount status of SD card fs is %d\r\n", fres); - if (fres == FR_OK) - { - DIR directory; - FIL file; - - fres = f_opendir(&directory, "\\"); - if (fres == FR_OK) - { - FILINFO fi; - - while (((fres = f_readdir(&directory, &fi)) == FR_OK) && fi.fname[0]) - { - xprintf("%13.13s %d\r\n", fi.fname, fi.fsize); - } - } - else - { - xprintf("could not open directory \"\\\" on SD-card! Error code: %d\r\n", fres); - } - - /* - * let's see if we find our boot flashing executable on disk - */ - fres = f_open(&file, FLASHCODE_NAME, FA_READ); - if (fres == FR_OK) - { - /* - * yes, load and execute it - * - * FIXME: we will need some kind of user confirmation here - * to avoid unwanted flashing or "bootsector viruses" before going productive - */ - uint32_t size; /* length of code piece read */ - uint32_t total_size = 0L; - int32_t start_time = MCF_SLT_SCNT(0); - int32_t end_time; - int32_t time = 0; - - while ((fres = f_read(&file, (void *) FLASHCODE_ADDRESS, 1024 * 1000, &size)) == FR_OK && size > 0) - { - total_size += size / 1024; - xprintf("read hunk of %d bytes, total_size = %d kBytes\r\n", size, total_size); - } - end_time = MCF_SLT_SCNT(0); - time = (end_time - start_time) / 132L; - xprintf("result of f_read: %ld, %ld kbytes read\r\n", fres, total_size); - xprintf("time to load %s: %ld s\r\n", FLASHCODE_NAME, time / 1000 / 100); - xprintf("equals to about %ld kBytes/second\r\n", total_size / (time / 1000 / 100)); - - } - f_close(&file); - - fres = f_open(&file, WELCOME_NAME, FA_READ); - if (fres == FR_OK) - { - char line[128]; - - while (f_gets(line, sizeof(line), &file)) - { - xprintf("%s", line); - } - } - f_close(&file); - } - f_mount(0, 0L); /* release work area */ - } -} diff --git a/sys/BaS.c b/sys/BaS.c deleted file mode 100644 index eaed504..0000000 --- a/sys/BaS.c +++ /dev/null @@ -1,458 +0,0 @@ -/* - * BaS - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - */ - -#include - -#include "MCF5475.h" -#include "startcf.h" -#include "sysinit.h" -#include "util.h" -#include "cache.h" -#include "bas_printf.h" -#include "bas_string.h" -#include "bas_types.h" -#include "sd_card.h" -#include "wait.h" - -#include "diskio.h" -#include "ff.h" -#include "s19reader.h" -#include "mmu.h" -#include "dma.h" -#include "net.h" -#include "eth.h" -#include "nbuf.h" -#include "nif.h" -#include "fec.h" -#include "bootp.h" -#include "interrupts.h" -#include "exceptions.h" -#include "net_timer.h" -#include "pci.h" -#include "video.h" - -//#define BAS_DEBUG -#if defined(BAS_DEBUG) -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif -#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0) - -/* imported routines */ -extern int vec_init(); - -/* Symbols from the linker script */ -extern uint8_t _STRAM_END[]; -#define STRAM_END ((uint32_t)_STRAM_END) -extern uint8_t _TOS[]; -#define TOS ((uint32_t)_TOS) /* final TOS location */ -extern uint8_t _FASTRAM_END[]; -#define FASTRAM_END ((uint32_t)_FASTRAM_END) -extern uint8_t _EMUTOS[]; -#define EMUTOS ((uint32_t)_EMUTOS) /* where EmuTOS is stored in flash */ -extern uint8_t _EMUTOS_SIZE[]; -#define EMUTOS_SIZE ((uint32_t)_EMUTOS_SIZE) /* size of EmuTOS, in bytes */ - -/* - * check if it is possible to transfer data to PIC - */ -static inline bool pic_txready(void) -{ - if (MCF_PSC3_PSCSR & MCF_PSC_PSCSR_TXRDY) - { - return true; - } - - return false; -} - -/* - * check if it is possible to receive data from PIC - */ -static inline bool pic_rxready(void) -{ - if (MCF_PSC3_PSCSR & MCF_PSC_PSCSR_RXRDY) - { - return true; - } - - return false; -} - -void write_pic_byte(uint8_t value) -{ - /* - * Wait until the transmitter is ready or 1000us are passed - */ - waitfor(1000, pic_txready); - - /* - * Transmit the byte - */ - *(volatile uint8_t*)(&MCF_PSC3_PSCTB_8BIT) = value; // Really 8-bit -} - -uint8_t read_pic_byte(void) -{ - /* - * Wait until a byte has been received or 1000us are passed - */ - waitfor(1000, pic_rxready); - - /* - * Return the received byte - */ - return * (volatile uint8_t *) (&MCF_PSC3_PSCTB_8BIT); // Really 8-bit -} - -void pic_init(void) -{ - char answer[4] = "OLD"; - - xprintf("initialize the PIC: "); - - /* - * Send the PIC initialization string - */ - write_pic_byte('A'); - write_pic_byte('C'); - write_pic_byte('P'); - write_pic_byte('F'); - - /* - * Read the 3-char answer string. Should be "OK!". - */ - answer[0] = read_pic_byte(); - answer[1] = read_pic_byte(); - answer[2] = read_pic_byte(); - answer[3] = '\0'; - - if (answer[0] != 'O' || answer[1] != 'K' || answer[2] != '!') - { - dbg("PIC initialization failed. Already initialized?\r\n"); - } - else - { - xprintf("%s\r\n", answer); - } -} - -void nvram_init(void) -{ - int i; - - xprintf("Restore the NVRAM data: "); - - /* Request for NVRAM backup data */ - write_pic_byte(0x01); - - /* Check answer type */ - if (read_pic_byte() != 0x81) - { - // FIXME: PIC protocol error - xprintf("FAILED\r\n"); - return; - } - - /* Restore the NVRAM backup to the FPGA */ - for (i = 0; i < 64; i++) - { - uint8_t data = read_pic_byte(); - *(volatile uint8_t*)0xffff8961 = i; - *(volatile uint8_t*)0xffff8963 = data; - } - - xprintf("finished\r\n"); -} - -#define KBD_ACIA_CONTROL * ((uint8_t *) 0xfffffc00) -#define MIDI_ACIA_CONTROL * ((uint8_t *) 0xfffffc04) -#define MFP_INTR_IN_SERVICE_A * ((uint8_t *) 0xfffffa0f) -#define MFP_INTR_IN_SERVICE_B * ((uint8_t *) 0xfffffa11) - -void acia_init() -{ - xprintf("init ACIA: "); - /* init ACIA */ - KBD_ACIA_CONTROL = 3; /* master reset */ - NOP(); - - MIDI_ACIA_CONTROL = 3; /* master reset */ - NOP(); - - KBD_ACIA_CONTROL = 0x96; /* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */ - NOP(); - - MFP_INTR_IN_SERVICE_A = 0xff; - NOP(); - - MFP_INTR_IN_SERVICE_B = 0xff; - NOP(); - - xprintf("finished\r\n"); -} - -void enable_coldfire_interrupts() -{ - xprintf("enable interrupts: "); -#if defined(MACHINE_FIREBEE) - FBEE_INTR_CONTROL = 0L; /* disable all interrupts */ -#endif /* MACHINE_FIREBEE */ - - MCF_EPORT_EPPAR = 0xaaa8; /* all interrupts on falling edge */ - -#if defined(MACHINE_FIREBEE) - /* - * TIN0 on the Coldfire is connected to the FPGA. TIN0 triggers every write - * access to 0xff8201 (vbasehi), i.e. everytime the video base address is written - */ - MCF_GPT0_GMS = MCF_GPT_GMS_ICT(1) | /* timer 0 on, video change capture on rising edge */ - MCF_GPT_GMS_IEN | - MCF_GPT_GMS_TMS(1); /* route GPT0 interrupt on interrupt controller */ - MCF_INTC_ICR62 = MCF_INTC_ICR_IL(7) | - MCF_INTC_ICR_IP(6); /* interrupt level 7, interrupt priority 7 */ - - - MCF_EPORT_EPIER = 0xfe; /* int 1-7 on */ - MCF_EPORT_EPFR = 0xff; /* clear all pending interrupts */ - MCF_INTC_IMRL = 0xffffff00; /* int 1-7 on */ - //MCF_INTC_IMRH = 0xbffffffe; /* psc3 and timer 0 int on */ - MCF_INTC_IMRH = 0; - FBEE_INTR_ENABLE = FBEE_INTR_INT_IRQ7 | /* enable pseudo bus error */ - FBEE_INTR_INT_MFP_IRQ6 | /* enable MFP interrupts */ - FBEE_INTR_INT_FPGA_IRQ5 | /* enable Firebee (PIC, PCI, ETH PHY, DVI, DSP) interrupts */ - FBEE_INTR_INT_VSYNC_IRQ4 | /* enable vsync interrupts */ - FBEE_INTR_PCI_INTA | /* enable PCI interrupts */ - FBEE_INTR_PCI_INTB | - FBEE_INTR_PCI_INTC | - FBEE_INTR_PCI_INTD; -#endif - - xprintf("finished\r\n"); -} - -void disable_coldfire_interrupts() -{ -#if defined(MACHINE_FIREBEE) - FBEE_INTR_ENABLE = 0; /* disable all interrupts */ -#endif /* MACHINE_FIREBEE */ - - MCF_EPORT_EPIER = 0x0; - MCF_INTC_IMRL = 0xfffffffe; - MCF_INTC_IMRH = 0xffffffff; -} - - - -NIF nif1; -#if defined(MACHINE_M5484LITE) -NIF nif2; -#endif - -/* - * initialize the interrupt handler tables to dispatch interrupt requests from Coldfire devices - */ -void init_isr(void) -{ - isr_init(); /* need to call that explicitely, otherwise isr table might be full */ - - /* - * register the FEC interrupt handler - */ - if (!isr_register_handler(64 + INT_SOURCE_FEC0, 5, 1, fec0_interrupt_handler, NULL, (void *) &nif1)) - { - err("unable to register isr for FEC0\r\n"); - } - - /* - * Register the DMA interrupt handler - */ - - if (!isr_register_handler(64 + INT_SOURCE_DMA, 5, 3, dma_interrupt_handler, NULL, NULL)) - { - err("unable to register isr for DMA\r\n"); - } - -#ifdef MACHINE_FIREBEE - /* - * register GPT0 timer interrupt vector - */ - if (!isr_register_handler(64 + INT_SOURCE_GPT0, 5, 2, gpt0_interrupt_handler, NULL, NULL)) - { - err("unable to register isr for GPT0 timer\r\n"); - } - - /* - * register the PIC interrupt handler - */ - if (!isr_register_handler(64 + INT_SOURCE_PSC3, 5, 5, pic_interrupt_handler, NULL, NULL)) - { - err("Error: unable to register ISR for PSC3\r\n"); - } -#endif /* MACHINE_FIREBEE */ - - /* - * register the XLB PCI interrupt handler - */ - if (!isr_register_handler(64 + INT_SOURCE_XLBPCI, 7, 0, xlbpci_interrupt_handler, NULL, NULL)) - { - err("Error: unable to register isr for XLB PCI interrupts\r\n"); - } - - MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE | /* slave error acknowledge interrupt */ - MCF_XLB_XARB_IMR_MME | /* multiple master at prio 0 interrupt */ - MCF_XLB_XARB_IMR_TTAE | /* TT address only interrupt */ - MCF_XLB_XARB_IMR_TTRE | /* TT reserved interrupt enable */ - MCF_XLB_XARB_IMR_ECWE | /* external control word interrupt */ - MCF_XLB_XARB_IMR_TTME | /* TBST/TSIZ mismatch interrupt */ - MCF_XLB_XARB_IMR_BAE; /* bus activity tenure timeout interrupt */ - - if (!isr_register_handler(64 + INT_SOURCE_PCIARB, 7, 1, pciarb_interrupt_handler, NULL, NULL)) - { - err("Error: unable to register isr for PCIARB interrupts\r\n"); - - return; - } - MCF_PCIARB_PACR = MCF_PCIARB_PACR_EXTMINTEN(0x1f) | /* external master broken interrupt */ - MCF_PCIARB_PACR_INTMINTEN; /* internal master broken interrupt */ -} - -void BaS(void) -{ - uint8_t *src; - uint8_t *dst = (uint8_t *) TOS; - -#if defined(MACHINE_FIREBEE) /* LITE board has no pic and (currently) no nvram */ - pic_init(); - nvram_init(); -#endif /* MACHINE_FIREBEE */ - - xprintf("initialize MMU: "); - mmu_init(); - xprintf("finished\r\n"); - - xprintf("copy EmuTOS: "); - - dma_init(); - - /* copy EMUTOS */ - src = (uint8_t *) EMUTOS; - dma_memcpy(dst, src, EMUTOS_SIZE); - xprintf("finished\r\n"); - - xprintf("initialize exception vector table: "); - vec_init(); - xprintf("finished\r\n"); - - xprintf("flush caches: "); - flush_and_invalidate_caches(); - xprintf("finished\r\n"); - xprintf("enable MMU: "); - MCF_MMU_MMUCR = MCF_MMU_MMUCR_EN; /* MMU on */ - NOP(); /* force pipeline sync */ - xprintf("finished\r\n"); - - #ifdef MACHINE_FIREBEE - xprintf("IDE reset: "); - /* IDE reset */ - * (volatile uint8_t *) (0xffff8802 - 2) = 14; - * (volatile uint8_t *) (0xffff8802 - 0) = 0x80; - wait(1); - - * (volatile uint8_t *) (0xffff8802 - 0) = 0; - - xprintf("finished\r\n"); - xprintf("enable video: "); - /* - * video setup (25MHz) - */ - * (volatile uint32_t *) (0xf0000410 + 0) = 0x032002ba; /* horizontal 640x480 */ - * (volatile uint32_t *) (0xf0000410 + 4) = 0x020c020a; /* vertical 640x480 */ - * (volatile uint32_t *) (0xf0000410 + 8) = 0x0190015d; /* horizontal 320x240 */ - * (volatile uint32_t *) (0xf0000410 + 12) = 0x020C020A; /* vertical 320x230 */ - - /* fifo on, refresh on, ddrcs and cke on, video dac on */ - * (volatile uint32_t *) (0xf0000410 - 0x20) = 0x01070002; - - xprintf("finished\r\n"); -#endif /* MACHINE_FIREBEE */ - - sd_card_init(); - - /* - * memory setup - */ - memset((void *) 0x400, 0, 0x400); - -#if defined(MACHINE_FIREBEE) - /* set Falcon bus control register */ - /* sets bit 3 and 6. Both are undefined on an original Falcon? */ - - * (volatile uint8_t *) 0xffff8007 = 0x48; -#endif /* MACHINE_FIREBEE */ - - /* ST RAM */ - - * (uint32_t *) 0x42e = STRAM_END; /* phystop TOS system variable */ - * (uint32_t *) 0x420 = 0x752019f3; /* memvalid TOS system variable */ - * (uint32_t *) 0x43a = 0x237698aa; /* memval2 TOS system variable */ - * (uint32_t *) 0x51a = 0x5555aaaa; /* memval3 TOS system variable */ - - /* TT-RAM */ - - * (uint32_t *) 0x5a4 = FASTRAM_END; /* ramtop TOS system variable */ - * (uint32_t *) 0x5a8 = 0x1357bd13; /* ramvalid TOS system variable */ - -#if defined(MACHINE_FIREBEE) /* m5484lite has no ACIA and no dip switch... */ - acia_init(); -#endif /* MACHINE_FIREBEE */ - - srec_execute("BASFLASH.S19"); - - /* Jump into the OS */ - typedef void void_func(void); - struct rom_header - { - void *initial_sp; - void_func *initial_pc; - }; - - xprintf("BaS initialization finished, enable interrupts\r\n"); - init_isr(); - - enable_coldfire_interrupts(); - dma_irq_enable(); - - init_pci(); - // video_init(); - - /* initialize USB devices */ - //init_usb(); - - set_ipl(7); /* disable interrupts */ - - xprintf("call EmuTOS\r\n"); - struct rom_header *os_header = (struct rom_header *) TOS; - os_header->initial_pc(); -} diff --git a/sys/cache.c b/sys/cache.c deleted file mode 100644 index 34edca1..0000000 --- a/sys/cache.c +++ /dev/null @@ -1,239 +0,0 @@ -/* - * cache handling - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - * - */ - -#include "cache.h" - -void cacr_set(uint32_t value) -{ - extern uint32_t rt_cacr; - - rt_cacr = value; - __asm__ __volatile__("movec %0, cacr\n\t" - : /* output */ - : "r" (rt_cacr) - : "memory" /* clobbers */); -} - -uint32_t cacr_get(void) -{ - extern uint32_t rt_cacr; - - return rt_cacr; -} - -void disable_data_cache(void) -{ - flush_and_invalidate_caches(); - cacr_set((cacr_get() | CF_CACR_DCINVA) & ~CF_CACR_DEC); -} - -void disable_instruction_cache(void) -{ - flush_and_invalidate_caches(); - cacr_set((cacr_get() | CF_CACR_ICINVA) & ~CF_CACR_IEC); -} - -void enable_data_cache(void) -{ - cacr_set(cacr_get() & ~CF_CACR_DCINVA); -} - -void flush_and_invalidate_caches(void) -{ - __asm__ __volatile__( - " clr.l d0 \n\t" - " clr.l d1 \n\t" - " move.l d0,a0 \n\t" - "cfa_setloop: \n\t" - " cpushl bc,(a0) | flush\n\t" - " lea 0x10(a0),a0 | index+1\n\t" - " addq.l #1,d1 | index+1\n\t" - " cmpi.w #512,d1 | all sets?\n\t" - " bne.s cfa_setloop | no->\n\t" - " clr.l d1 \n\t" - " addq.l #1,d0 \n\t" - " move.l d0,a0 \n\t" - " cmpi.w #4,d0 | all ways?\n\t" - " bne.s cfa_setloop | no->\n\t" - /* input */ : - /* output */ : - /* clobber */ : "cc", "d0", "d1", "a0" - ); -} - -/* - * flush and invalidate a specific memory region from the instruction cache - */ -void flush_icache_range(void *address, size_t size) -{ - uint32_t set; - uint32_t start_set; - uint32_t end_set; - void *endaddr = address + size; - - start_set = (uint32_t) address & _ICACHE_SET_MASK; - end_set = (uint32_t) endaddr & _ICACHE_SET_MASK; - - if (start_set > end_set) { - /* from the begining to the lowest address */ - for (set = 0; set <= end_set; set += (0x10 - 3)) - { - __asm__ __volatile__( - " cpushl ic,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl ic,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl ic,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl ic,(%[set]) \n\t" - : /* output parameters */ - : [set] "a" (set) /* input parameters */ - : "cc" /* clobbered registers */ - ); - } - /* next loop will finish the cache ie pass the hole */ - end_set = LAST_ICACHE_ADDR; - } - for (set = start_set; set <= end_set; set += (0x10 - 3)) { - __asm__ __volatile__( - " cpushl ic,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl ic,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl ic,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl ic,(%[set])" - : /* output parameters */ - : [set] "a" (set) - : "cc" - ); - } -} - - - -/* - * flush and invalidate a specific region from the data cache - */ -void flush_dcache_range(void *address, size_t size) -{ - unsigned long set; - unsigned long start_set; - unsigned long end_set; - void *endaddr; - - endaddr = address + size; - start_set = (uint32_t) address & _DCACHE_SET_MASK; - end_set = (uint32_t) endaddr & _DCACHE_SET_MASK; - - if (start_set > end_set) { - /* from the begining to the lowest address */ - for (set = 0; set <= end_set; set += (0x10 - 3)) - { - __asm__ __volatile__( - " cpushl dc,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl dc,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl dc,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl dc,(%[set]) \n\t" - : /* output parameters */ - : [set] "a" (set) - : "cc" /* clobbered registers */ - ); - } - /* next loop will finish the cache ie pass the hole */ - end_set = LAST_DCACHE_ADDR; - } - for (set = start_set; set <= end_set; set += (0x10 - 3)) - { - __asm__ __volatile__( - " cpushl dc,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl dc,(%[set]) \n\t" - " addq%.l #1,%[set] \n\t" - " cpushl dc,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl dc,(%[set]) \n\t" - : /* output parameters */ - : [set] "a" (set) - : "cc" /* clobbered registers */ - ); - } -} - -/* - * flush and invalidate a specific region from the both caches. We do not know if the area is cached - * at all, we do not know in which of the four ways it is cached, but we know the index where they - * would be cached if they are, so we only need to flush and invalidate only a subset of the 512 index - * entries, but all four ways. - */ -void flush_cache_range(void *address, size_t size) -{ - unsigned long set; - unsigned long start_set; - unsigned long end_set; - void *endaddr; - - endaddr = address + size; - start_set = (uint32_t) address & _DCACHE_SET_MASK; - end_set = (uint32_t) endaddr & _DCACHE_SET_MASK; - - if (start_set > end_set) { - /* from the begining to the lowest address */ - for (set = 0; set <= end_set; set += (0x10 - 3)) - { - __asm__ __volatile__( - " cpushl bc,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl bc,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl bc,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl bc,(%[set]) \n\t" - : /* output parameters */ - : [set] "a" (set) - : "cc" /* clobbered registers */ - ); - } - /* next loop will finish the cache ie pass the hole */ - end_set = LAST_DCACHE_ADDR; - } - for (set = start_set; set <= end_set; set += (0x10 - 3)) - { - __asm__ __volatile__( - " cpushl bc,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl bc,(%[set]) \n\t" - " addq%.l #1,%[set] \n\t" - " cpushl bc,(%[set]) \n\t" - " addq.l #1,%[set] \n\t" - " cpushl bc,(%[set]) \n\t" - : /* output parameters */ - : [set] "a" (set) - : "cc" /* clobbered registers */ - ); - } -} diff --git a/sys/driver_mem.c b/sys/driver_mem.c deleted file mode 100644 index dd5cd27..0000000 --- a/sys/driver_mem.c +++ /dev/null @@ -1,341 +0,0 @@ -/* - * driver_mem.c - * - * based from Emutos / BDOS - * - * Copyright (c) 2001 Lineo, Inc. - * - * Authors: Karl T. Braun, Martin Doering, Laurent Vogel - * - * This file is distributed under the GPL, version 2 or at your - * option any later version. - */ - -#include -#include "bas_string.h" -#include "bas_printf.h" -#include "usb.h" -#include "exceptions.h" /* set_ipl() */ - -#if defined(MACHINE_FIREBEE) -#include "firebee.h" -#elif defined(MACHINE_M5484LITE) -#include "m5484l.h" -#elif defined(MACHINE_M54455) -#include "m54455.h" -#else -#error "unknown machine!" -#endif - -//#define DBG_DM -#ifdef DBG_DM -#define dbg(fmt, args...) xprintf(fmt, ##args) -#else -#define dbg(fmt, args...) -#endif - -extern long offscren_reserved(void); - -extern uint8_t driver_mem_buffer[DRIVER_MEM_BUFFER_SIZE]; /* defined in linker control file */ - -/* MD - Memory Descriptor */ - -#define MD struct _md_ - -MD -{ - MD *m_link; - long m_start; - long m_length; - void *m_own; -}; - -/* MPB - Memory Partition Block */ - -#define MPB struct _mpb - -MPB -{ - MD *mp_mfl; - MD *mp_mal; - MD *mp_rover; -}; - -#define MAXMD 256 - -static MD tab_md[MAXMD]; -static MPB pmd; - -static void *xmgetblk(void) -{ - int i; - - for (i = 0; i < MAXMD; i++) - { - if (tab_md[i].m_own == NULL) - { - tab_md[i].m_own = (void*)1L; - return(&tab_md[i]); - } - } - return NULL; -} - -static void xmfreblk(void *m) -{ - int i = (int)(((long) m - (long) tab_md) / sizeof(MD)); - if ((i > 0) && (i < MAXMD)) - { - tab_md[i].m_own = NULL; - } -} - -static MD *ffit(long amount, MPB *mp) -{ - MD *p, *q, *p1; /* free list is composed of MD's */ - int maxflg; - long maxval; - - if (amount != -1) - { - amount += 15; /* 16 bytes alignment */ - amount &= 0xFFFFFFF0; - } - - if ((q = mp->mp_rover) == 0) /* get rotating pointer */ - { - return 0; - } - - maxval = 0; - maxflg = ((amount == -1) ? true : false) ; - p = q->m_link; /* start with next MD */ - do /* search the list for an MD with enough space */ - { - if (p == 0) - { - /* at end of list, wrap back to start */ - q = (MD *) &mp->mp_mfl; /* q => mfl field */ - p = q->m_link; /* p => 1st MD */ - } - if ((!maxflg) && (p->m_length >= amount)) - { - /* big enough */ - if (p->m_length == amount) - { - q->m_link = p->m_link; /* take the whole thing */ - } - else - { - /* - * break it up - 1st allocate a new - * MD to describe the remainder - */ - p1 = xmgetblk(); - if (p1 == NULL) - { - return(NULL); - } - - /* init new MD */ - p1->m_length = p->m_length - amount; - p1->m_start = p->m_start + amount; - p1->m_link = p->m_link; - p->m_length = amount; /* adjust allocated block */ - q->m_link = p1; - } - /* link allocate block into allocated list, - mark owner of block, & adjust rover */ - p->m_link = mp->mp_mal; - mp->mp_mal = p; - mp->mp_rover = (q == (MD *) &mp->mp_mfl ? q->m_link : q); - return(p); /* got some */ - } - else if (p->m_length > maxval) - maxval = p->m_length; - p = ( q=p )->m_link; - } while(q != mp->mp_rover); - - /* - * return either the max, or 0 (error) - */ - if (maxflg) - { - maxval -= 15; /* 16 bytes alignment */ - if (maxval < 0) - { - maxval = 0; - } - else - { - maxval &= 0xFFFFFFF0; - } - } - return(maxflg ? (MD *) maxval : 0); -} - -static void freeit(MD *m, MPB *mp) -{ - MD *p, *q; - - q = 0; - for (p = mp->mp_mfl; p ; p = (q = p) -> m_link) - { - if (m->m_start <= p->m_start) - { - break; - } - } - m->m_link = p; - - if (q) - { - q->m_link = m; - } - else - { - mp->mp_mfl = m; - } - - if (!mp->mp_rover) - { - mp->mp_rover = m; - } - - if (p) - { - if (m->m_start + m->m_length == p->m_start) - { - /* join to higher neighbor */ - m->m_length += p->m_length; - m->m_link = p->m_link; - if (p == mp->mp_rover) - { - mp->mp_rover = m; - } - xmfreblk(p); - } - } - if (q) - { - if (q->m_start + q->m_length == m->m_start) - { - /* join to lower neighbor */ - q->m_length += m->m_length; - q->m_link = m->m_link; - if (m == mp->mp_rover) - { - mp->mp_rover = q; - } - xmfreblk(m); - } - } -} - -int32_t driver_mem_free(void *addr) -{ - int level; - MD *p, **q; - MPB *mpb; - mpb = &pmd; - level = set_ipl(7); - - for(p = *(q = &mpb->mp_mal); p; p = *(q = &p->m_link)) - { - if ((long) addr == p->m_start) - { - break; - } - } - - if (!p) - { - set_ipl(level); - return(-1); - } - - *q = p->m_link; - freeit(p, mpb); - set_ipl(level); - - dbg("%s: driver_mem_free(0x%08X)\r\n", __FUNCTION__, addr); - - return(0); -} - -void *driver_mem_alloc(uint32_t amount) -{ - void *ret = NULL; - int level; - MD *m; - - if (amount == -1L) - { - return (void *) ffit(-1L, &pmd); - } - - if (amount <= 0 ) - { - return(0); - } - - if ((amount & 1)) - { - amount++; - } - - level = set_ipl(7); - m = ffit(amount, &pmd); - - if (m != NULL) - { - ret = (void *) m->m_start; - } - set_ipl(level); - dbg("%s: driver_mem_alloc(%d) = 0x%08X\r\n", __FUNCTION__, amount, ret); - - return ret; -} - -static int use_count = 0; - -int driver_mem_init(void) -{ - if (use_count == 0) - { - dbg("%s: initialise driver_mem_buffer[] at %p, size 0x%x\r\n", __FUNCTION__, driver_mem_buffer, DRIVER_MEM_BUFFER_SIZE); - memset(driver_mem_buffer, 0, DRIVER_MEM_BUFFER_SIZE); - - pmd.mp_mfl = pmd.mp_rover = &tab_md[0]; - tab_md[0].m_link = (MD *) NULL; - tab_md[0].m_start = ((long) driver_mem_buffer + 15) & ~15; - tab_md[0].m_length = DRIVER_MEM_BUFFER_SIZE; - tab_md[0].m_own = (void *) 1L; - pmd.mp_mal = (MD *) NULL; - memset(driver_mem_buffer, 0, tab_md[0].m_length); - - dbg("%s: uncached driver memory buffer at 0x%08X size %d\r\n", __FUNCTION__, tab_md[0].m_start, tab_md[0].m_length); - } - use_count++; - dbg("%s: driver_mem now has a use count of %d\r\n", __FUNCTION__, use_count); - - return 0; -} - -void driver_mem_release(void) -{ - if (use_count-- == 0) - { -#ifndef CONFIG_USB_MEM_NO_CACHE -#ifdef USE_RADEON_MEMORY - if (driver_mem_buffer == (void *) offscren_reserved()) - return; - -#endif -#endif - } - dbg("%s: driver_mem use count now %d\r\n", __FUNCTION__, use_count); -} - - - diff --git a/sys/exceptions.S b/sys/exceptions.S deleted file mode 100644 index 3cb88d7..0000000 --- a/sys/exceptions.S +++ /dev/null @@ -1,585 +0,0 @@ -/* - * initialize exception vectors - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#include "startcf.h" -#if MACHINE_FIREBEE -#include "firebee.h" -#elif MACHINE_M5484LITE -#include "m5484l.h" -#endif /* MACHINE_FIREBEE */ - - .extern __SUP_SP - .extern _rom_entry - .extern __RAMBAR0 - .extern _rt_mod - .extern _rt_ssp - .extern _rt_usp - .extern _rt_vbr - .extern _mmutr_miss - .extern __MBAR - .extern __MMUBAR - .extern _video_tlb - .extern _video_sbt - .extern _flush_and_invalidate_caches - .extern _get_bas_drivers - - /* PCI interrupt handlers */ - .extern _irq5_handler - .extern _irq6_handler - .extern _irq7_handler - - .global _vec_init - .global _std_exc_vec /* needed by driver_vec.c */ - -/* Register read/write equates */ - - /* MMU */ - .equ MCF_MMU_MMUCR, __MMUBAR - .equ MCF_MMU_MMUOR, __MMUBAR+0x04 - .equ MCF_MMU_MMUSR, __MMUBAR+0x08 - .equ MCF_MMU_MMUAR, __MMUBAR+0x10 - .equ MCF_MMU_MMUTR, __MMUBAR+0x14 - .equ MCF_MMU_MMUDR, __MMUBAR+0x18 - - /* EPORT flag register */ - .equ MCF_EPORT_EPFR, __MBAR+0xf0c - - /* FEC1 port output data direction register */ - .equ MCF_GPIO_PODR_FEC1L, __MBAR+0xa07 - - /* PSC0 transmit buffer register */ - .equ MCF_PSC0_PSCTB_8BIT, __MBAR+0x860c - - /* GPT mode select register */ - .equ MCF_GPT0_GMS, __MBAR+0x800 - - /* Slice timer 0 count register */ - .equ MCF_SLT0_SCNT, __MBAR+0x908 - - // interrupt sources - .equ INT_SOURCE_EPORT_EPF1,1 // edge port flag 1 - .equ INT_SOURCE_EPORT_EPF2,2 // edge port flag 2 - .equ INT_SOURCE_EPORT_EPF3,3 // edge port flag 3 - .equ INT_SOURCE_EPORT_EPF4,4 // edge port flag 4 - .equ INT_SOURCE_EPORT_EPF5,5 // edge port flag 5 - .equ INT_SOURCE_EPORT_EPF6,6 // edge port flag 6 - .equ INT_SOURCE_EPORT_EPF7,7 // edge port flag 7 - .equ INT_SOURCE_USB_EP0ISR,15 // USB endpoint 0 interrupt - .equ INT_SOURCE_USB_EP1ISR,16 // USB endpoint 1 interrupt - .equ INT_SOURCE_USB_EP2ISR,17 // USB endpoint 2 interrupt - .equ INT_SOURCE_USB_EP3ISR,18 // USB endpoint 3 interrupt - .equ INT_SOURCE_USB_EP4ISR,19 // USB endpoint 4 interrupt - .equ INT_SOURCE_USB_EP5ISR,20 // USB endpoint 5 interrupt - .equ INT_SOURCE_USB_EP6ISR,21 // USB endpoint 6 interrupt - .equ INT_SOURCE_USB_USBISR,22 // USB general interrupt - .equ INT_SOURCE_USB_USBAISR,23 // USB core interrupt - .equ INT_SOURCE_USB_ANY,24 // OR of all USB interrupts - .equ INT_SOURCE_USB_DSPI_OVF,25 // DSPI overflow or underflow - .equ INT_SOURCE_USB_DSPI_RFOF,26 // receive FIFO overflow interrupt - .equ INT_SOURCE_USB_DSPI_RFDF,27 // receive FIFO drain interrupt - .equ INT_SOURCE_USB_DSPI_TFUF,28 // transmit FIFO underflow interrupt - .equ INT_SOURCE_USB_DSPI_TCF,29 // transfer complete interrupt - .equ INT_SOURCE_USB_DSPI_TFFF,30 // transfer FIFO fill interrupt - .equ INT_SOURCE_USB_DSPI_EOQF,31 // end of queue interrupt - .equ INT_SOURCE_PSC3,32 // PSC3 interrupt - .equ INT_SOURCE_PSC2,33 // PSC2 interrupt - .equ INT_SOURCE_PSC1,34 // PSC1 interrupt - .equ INT_SOURCE_PSC0,35 // PSC0 interrupt - .equ INT_SOURCE_CTIMERS,36 // combined source for comm timers - .equ INT_SOURCE_SEC,37 // SEC interrupt - .equ INT_SOURCE_FEC1,38 // FEC1 interrupt - .equ INT_SOURCE_FEC0,39 // FEC0 interrupt - .equ INT_SOURCE_I2C,40 // I2C interrupt - .equ INT_SOURCE_PCIARB,41 // PCI arbiter interrupt - .equ INT_SOURCE_CBPCI,42 // COMM bus PCI interrupt - .equ INT_SOURCE_XLBPCI,43 // XLB PCI interrupt - .equ INT_SOURCE_XLBARB,47 // XLBARB to PCI interrupt - .equ INT_SOURCE_DMA,48 // multichannel DMA interrupt - .equ INT_SOURCE_CAN0_ERROR,49 // FlexCAN error interrupt - .equ INT_SOURCE_CAN0_BUSOFF,50 // FlexCAN bus off interrupt - .equ INT_SOURCE_CAN0_MBOR,51 // message buffer ORed interrupt - .equ INT_SOURCE_SLT1,53 // slice timer 1 interrupt - .equ INT_SOURCE_SLT0,54 // slice timer 0 interrupt - .equ INT_SOURCE_CAN1_ERROR,55 // FlexCAN error interrupt - .equ INT_SOURCE_CAN1_BUSOFF,56 // FlexCAN bus off interrupt - .equ INT_SOURCE_CAN1_MBOR,57 // message buffer ORed interrupt - .equ INT_SOURCE_GPT3,59 // GPT3 timer interrupt - .equ INT_SOURCE_GPT2,60 // GPT2 timer interrupt - .equ INT_SOURCE_GPT1,61 // GPT1 timer interrupt - .equ INT_SOURCE_GPT0,62 // GPT0 timer interrupt - -// Atari register equates (provided by FPGA) - .equ vbasehi, 0xffff8201 - -/* - * macros - */ - -/* - * used for "forwarding" interrupt handlers. This just clears the "pending interrupt" - * flag from the EDGE PORT flag register, set the status register to the appropriate interrupt - * mask an jump through the corresponging vector - */ - .macro irq vector,int_mask,clr_int - move.w #0x2700,sr // disable interrupt - subq.l #8,sp - movem.l d0/a5,(sp) // save registers - - lea MCF_EPORT_EPFR,a5 - move.b #\clr_int,(a5) // clear int pending - - movem.l (sp),d0/a5 // restore registers - addq.l #8,sp - move.l \vector,-(sp) - move #0x2\int_mask\()00,sr - rts - .endm - - .text -_vec_init: - move.l a2,-(sp) // Backup registers - - mov3q.l #-1,_rt_mod // rt_mod auf super - clr.l _rt_ssp - clr.l _rt_usp - clr.l _rt_vbr - move.l #__RAMBAR0,d0 // exception vectors reside in rambar0 - movec d0,VBR - move.l d0,a0 - move.l a0,a2 - -/* - * first, set standard vector for all exceptions - */ -init_vec: - move.l #256,d0 - lea std_exc_vec(pc),a1 // standard vector -init_vec_loop: - move.l a1,(a2)+ // set standard vector for all exceptions - subq.l #1,d0 - bne init_vec_loop - - move.l #__SUP_SP,(a0) // set initial stack pointer at start of exception vector table - - lea reset_vector(pc),a1 // set reset vector - move.l a1,0x04(a0) - - lea access(pc),a1 // set illegal access exception handler - move.l a1,0x08(a0) - -// trap #0 (without any parameters for now) is used to provide BaS' driver addresses to the OS - lea _get_bas_drivers(pc),a1 - move.l a1,0x80(a0) // trap #0 exception vector - -// MFP non-autovector interrupt handlers. Those are just rerouted to their autovector counterparts - - lea irq1(pc),a1 - move.l a1,0x104(a0) - - lea irq2(pc),a1 - move.l a1,0x108(a0) - - lea irq3(pc),a1 - move.l a1,0x10c(a0) - - lea irq4(pc),a1 - move.l a1,0x110(a0) - - lea irq5(pc),a1 - move.l a1,0x114(a0) - - lea irq6(pc),a1 - move.l a1,0x118(a0) - - lea irq7(pc),a1 - move.l a1,0x11c(a0) - - - -// install lowlevel_isr_handler for the three GPT timers - lea _lowlevel_isr_handler(pc),a1 - move.l a1,(INT_SOURCE_GPT1 + 64) * 4(a0) - move.l a1,(INT_SOURCE_GPT2 + 64) * 4(a0) - move.l a1,(INT_SOURCE_GPT3 + 64) * 4(a0) - -// install lowlevel_isr_handler for the PSC3 interrupt - move.l a1,(INT_SOURCE_PSC3 + 64) * 4(a0) - -// install lowlevel_isr_handler for Coldfire DMA interrupts - move.l a1,(INT_SOURCE_DMA + 64) * 4(a0) - -// install lowlevel_isr_handler for the XLBPCI interrupt - move.l a1,(INT_SOURCE_XLBPCI + 64) * 4(a0) - -// install lowlevel_isr_handler for the FEC0 interrupt - move.l a1,(INT_SOURCE_FEC0 + 64) * 4(a0) - -#ifndef MACHINE_FIREBEE -// FEC1 not wired on the FireBee (used for FPGA as GPIO), but available on other machines - move.l a1,(INT_SOURCE_FEC1 + 64) * 4(a0) -#endif - -#ifdef MACHINE_FIREBEE - -// timer vectors (triggers when vbashi gets changed, used for video page copy) - move.l a1,(INT_SOURCE_GPT0 + 64) * 4(a0) -#endif /* MACHINE_FIREBEE */ - - move.l (sp)+,a2 // Restore registers - rts - - -/* - * exception vector routines - */ -vector_table_start: -std_exc_vec: -_std_exc_vec: - //move.w #0x2700,sr // disable interrupt - subq.l #8,sp - movem.l d0/a5,(sp) // save registers - move.w 8(sp),d0 // fetch vector - and.l #0x3fc,d0 // mask out vector number - -#ifdef DBG_EXC - // printout vector number of exception - - lea -4 * 4(sp),sp // reserve stack space - movem.l d0-d1/a0-a1,(sp) // save gcc scratch registers - - lsr.l #2,d0 // shift vector number in place - cmp.l #33,d0 - beq noprint - cmp.l #34,d0 - beq n oprint - cmp.l #45,d0 - beq noprint - cmp.l #46,d0 - beq noprint - move.l 4 * 4 + 8 + 4(sp),-(sp) // pc at exception - move.l d0,-(sp) // provide it to xprintf() - pea exception_text - jsr _xprintf // call xprintf() - add.l #3*4,sp // adjust stack -noprint: - - movem.l (sp),d0-d1/a0-a1 // restore registers - lea 4 * 4(sp),sp -#endif /* DBG_EXC */ - - add.l _rt_vbr,d0 // + VBR - move.l d0,a5 - move.l (a5),d0 // fetch exception routine address - - move.l 4(sp),a5 // restore a5 - move.l d0,4(sp) // store exception routine address - - // FIXME: not clear why we would need the following? - //move.w 10(sp),d0 // restore original SR - //bset #13,d0 // set supervisor bit - //move.w d0,sr // - move.l (sp)+,d0 // restore d0 - rts // jump to exception handler - -exception_text: - .ascii "DEBUG: EXCEPTION %d caught at %p" - .byte 13, 10, 0 - .align 4 - -reset_vector: - move.w #0x2700,sr // disable interrupts - move.l #0x31415926,d0 - cmp.l 0x426,d0 // _resvalid: reset vector valid? - beq std_exc_vec // yes-> - jmp _rom_entry // no, cold start machine - -access: - move.w #0x2700,sr // disable interrupts - - link a6,#-4 * 4 // make room for gcc scratch registers - movem.l d0-d1/a0-a1,(sp) // save them - - move.l 4(a6),-(sp) // push format_status - move.l 8(a6),-(sp) // pc at exception - move.l MCF_MMU_MMUAR,-(sp) // MMU fault address - move.l MCF_MMU_MMUSR,-(sp) // MMU status regisrter - move.w #0x2300,sr // can lower interrupt mask now that MMU status is safe - jsr _mmutr_miss // call C routine - lea 4 * 4(sp),sp // adjust stack - - tst.l d0 // exception handler signals bus error - bne bus_error - - movem.l (sp),d0-d1/a0-a1 // restore registers - unlk a6 - rte - -bus_error: - movem.l (sp),d0-d1/a0-a1 // restore registers - unlk a6 - bra std_exc_vec // FIXME: this seems to be bogous... - -zero_divide: - move.w #0x2700,sr // disable interrupt - move.l a0,-(sp) - move.l d0,-(sp) - move.l 12(sp),a0 // pc - move.w (a0)+,d0 // command word - btst #7,d0 // long? - beq zd_word // nein-> - addq.l #2,a0 - -zd_word: - and.l 0x3f,d0 // mask out ea field - cmp.w #0x08,d0 // -(ax) or less? - ble zd_end - addq.l #2,a0 - cmp.w #0x39,d0 // xxx.L - bne zd_nal - addq.l #2,a0 - bra zd_end - -zd_nal: cmp.w #0x3c,d0 // immediate? - bne zd_end // no-> - btst #7,d0 // long? - beq zd_end // no - addq.l #2,a0 -zd_end: - move.l a0,12(sp) - move.l (sp)+,d0 - move.l (sp)+,a0 - rte - -#ifdef _NOT_USED_ -linea: - move.w #0x2700,sr // disable interrupt - halt - nop - nop -linef: - move.w #0x2700,sr // disable interrupt - halt - nop - nop -format: - move.w #0x2700,sr // disable interrupt - halt - nop - nop - -//floating point -flpoow: - move.w #0x2700,sr // disable interrupt - halt - nop - nop -#endif /* _NOT_USED */ - - -irq1: irq 0x64, 1, 0x02 // Level 1 autovector interrupt (unused) -irq2: irq 0x68, 2, 0x04 // Level 2 autovector interrupt (horizontal blank) -irq3: irq 0x6c, 3, 0x08 // Level 3 autovector interrupt (unused) -irq4: irq 0x70, 4, 0x10 // Level 4 autovector interrupt (vertical blank) - - - -#if defined(MACHINE_FIREBEE) /* these handlers are only meaningful for the Firebee */ -irq5: //move.w #0x2700,sr // disable interrupts - subq.l #4,sp // extra space - - link a6,#-4 * 4 // save gcc scratch registers - movem.l d0-d1/a0-a1,(sp) - - jsr _irq5_handler // call C handler routine - - tst.b d0 // handled? - beq irq5_forward - - movem.l (sp),d0-d1/a0-a1 // restore registers - unlk a6 - addq.l #4,sp - - rte // return from exception - -irq5_forward: move.l 0x74,a0 // fetch OS irq5 vector - add.l _rt_vbr,a0 // add runtime vbr - move.l a0,4(a6) // put on stack - - movem.l (sp),d0-d1/a0-a1 // restore registers - unlk a6 // - move.w #0x2500,sr // set interrupt level - rts // jump through vector - -/* - * irq6 needs special treatment since - because the Coldfire only supports autovector interrupts - * - the exception vector is provided by the simulated MFP from the FPGA - */ -irq6: //move.w #0x2700,sr // disable interrupt - subq.l #4,sp // extra space - - link a6,#-4 * 4 // save gcc scratch registers - movem.l d0-d1/a0-a1,(sp) - - move.l 8(a6),-(sp) // format status word - move.l 12(a6),-(sp) // pc at exception - jsr _irq6_handler // call C handler - lea 8(sp),sp // fix stack - - tst.b d0 // interrupt handled? - beq irq6_forward // no, forward to TOS - - movem.l (sp),d0-d1/a0-a1 // restore registers - unlk a6 - addq.l #4,sp // "extra space" not needed in this case - rte - -irq6_forward: - move.l 0xf0020000,a0 // fetch "MFP interrupt vector" from FPGA - add.l _rt_vbr,a0 // add runtime VBR - move.l (a0),4(a6) // fetch handler address and put it on "extra space" - - movem.l (sp),d0-d1/a0-a1 - unlk a6 - move.w #0x2600,sr // set interrupt mask to MFP level - - rts // jump through vector - -/* - * irq 7 = pseudo bus error - */ -irq7: - lea -12(sp),sp - movem.l d0/a0,(sp) - - move.l __RAMBAR0+0x008,a0 // real access error handler - move.l a0,8(sp) // this will be the return address for rts - - move.w 12(sp),d0 // format/vector word - andi.l #0xf000,d0 // keep only the format - ori.l #2*4,d0 // simulate vector #2, no fault - move.w d0,12(sp) - - // TODO: Inside an interrupt handler, 16(sp) is the return address. - // For an Access Error, it should be the address of the fault instruction instead - - lea MCF_EPORT_EPFR,a0 - bset #7,(a0) // clear int 7 - - move.l (sp)+,d0 // restore registers - move.l (sp)+,a0 - rts // Forward to the Access Error handler - -#else // handlers for M5484LITE - -irq5: // irq5 is tied to PCI INTC# and PCI INTD# on the M5484LITE - //move.w #0x2700,sr // disable interrupts - - lea -4*4(sp),sp // save gcc scratch registers - movem.l d0-d1/a0-a1,(sp) - - jsr _irq5_handler // call C handler routine - - movem.l (sp),d0-d1/a0-a1 // restore registers - lea 4*4(sp),sp - - rte // return from exception - -irq5text: - .ascii "IRQ5!" - .dc.b 13,10,0 - -irq6: - irq 0x74,5,0x20 - -irq7: // irq7 is tied to PCI INTA# and PCI INTB# on the M5484LITE - - //move.w #0x2700,sr // disable interrupts - - lea -4*4(sp),sp // save gcc scratch registers - movem.l d0-d1/a0-a1,(sp) - - jsr _irq7_handler // call C handler routine - - movem.l (sp),d0-d1/a0-a1 // restore registers - lea 4*4(sp),sp - - rte // return from exception - -irq7text: - .data - .ascii "IRQ7!" - .dc.b 13,10,0 - .text -#endif /* MACHINE_FIREBEE */ - -/* - * low-level interrupt service routine for routines registered with - * isr_register_handler(int vector). If the higlevel routine (isr_execute_handler()) - * returns != true, the call is forwarded to the OS (through its own vector base). - */ - .global _lowlevel_isr_handler - .extern _isr_execute_handler - - -/* - * stack format (after link instruction) is like this: - * - * +12 program counter (return address) - * +8 format_status - * +4 save area for rts (if we need to jump through the OS vector) - * (a6) -> saved a6 (from link) - * -4 - * -8 - * -12 - * (sp) -> gcc scratch registers save area - */ -_lowlevel_isr_handler: - subq.l #4,sp // extra space - link a6,#-4 * 4 // make room for - movem.l d0-d1/a0-a1,(sp) // gcc scratch registers and save them, - // other registers will be taken care of by gcc itself - - move.w 8(a6),d0 // fetch vector number from stack - lsr.l #2,d0 // move it in place - andi.l #0xff,d0 // mask it out - move.l d0,-(sp) // push it - jsr _isr_execute_handler // call the C handler - addq.l #4,sp // adjust stack - tst.b d0 // handled? - beq lowlevel_forward // no, forward it to TOS - - movem.l (sp),d0-d1/a0-a1 // restore registers - unlk a6 - addq.l #4,sp // eliminate extra space - - rte - -lowlevel_forward: - move.l 8(a6),d0 // fetch OS irq vector - lsr.l #2,d0 // move it in place - andi.l #0xff,d0 // mask out vector number - add.l _rt_vbr,d0 // add runtime vbr - move.l d0,4(a6) // put on stack as return address - - movem.l (sp),d0-d1/a0-a1 // restore registers - unlk a6 // - rts // jump through vector diff --git a/sys/fault_vectors.c b/sys/fault_vectors.c deleted file mode 100644 index 8e8c552..0000000 --- a/sys/fault_vectors.c +++ /dev/null @@ -1,210 +0,0 @@ -/* - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * provide an early exception vector branch table to catch exceptions _before_ VBR has been setup eventually - * (to RAMBAR0, in exceptions.S) - */ - -#include "MCF5475.h" -#include "bas_types.h" -#include "bas_printf.h" - -typedef void (*exception_handler)(void); -extern exception_handler SDRAM_VECTOR_TABLE[]; - -/* - * decipher Coldfire exception stack frame and print it out in cleartext - */ -void fault_handler(uint32_t pc, uint32_t format_status) -{ - int format; - int fault_status; - int vector; - int sr; - - xprintf("\007\007exception! Processor halted.\r\n"); - xprintf("format_status: %lx\r\n", format_status); - xprintf("pc: %lx\r\n", pc); - - /* - * extract info from format-/status word - */ - format = (format_status & 0b11110000000000000000000000000000) >> 28; - fault_status = ((format_status & 0b00001100000000000000000000000000) >> 26) | - ((format_status & 0b00000000000000110000000000000000) >> 16); - vector = (format_status & 0b00000011111111000000000000000000) >> 18; - sr = (format_status & 0b00000000000000001111111111111111); - - xprintf("format: %x\r\n", format); - xprintf("fault_status: %x (", fault_status); - switch (fault_status) - { - case 0: - xprintf("not an access or address error nor an interrupted debug service routine"); - break; - case 1: - case 3: - case 11: - xprintf("reserved"); - break; - case 2: - xprintf("interrupt during a debug service routine for faults other than access errors"); - break; - case 4: - xprintf("error (for example, protection fault) on instruction fetch"); - break; - case 5: - xprintf("TLB miss on opword or instruction fetch"); - break; - case 6: - xprintf("TLB miss on extension word of instruction fetch"); - break; - case 7: - xprintf("IFP access error while executing in emulator mode"); - break; - case 8: - xprintf("error on data write"); - break; - case 9: - xprintf("error on attempted write to write-protected space"); - break; - case 10: - xprintf("TLB miss on data write"); - break; - case 12: - xprintf("error on data read"); - break; - case 13: - xprintf("attempted read, read-modify-write of protected space"); - break; - case 14: - xprintf("TLB miss on data read or read-modify-write"); - break; - case 15: - xprintf("OEP access error while executing in emulator mode"); - } - xprintf(")\r\n"); - - xprintf("vector = %02x (", vector); - switch (vector) - { - case 2: - xprintf("access error"); - break; - case 3: - xprintf("address error"); - break; - case 4: - xprintf("illegal instruction"); - break; - case 5: - xprintf("divide by zero"); - break; - case 8: - xprintf("privilege violation"); - break; - case 9: - xprintf("trace"); - break; - case 10: - xprintf("unimplemented line-a opcode"); - break; - case 11: - xprintf("unimplemented line-f opcode"); - break; - case 12: - xprintf("non-PC breakpoint debug interrupt"); - break; - case 13: - xprintf("PC breakpoint debug interrupt"); - break; - case 14: - xprintf("format error"); - break; - case 24: - xprintf("spurious interrupt"); - break; - default: - if ( ((vector >= 6) && (vector <= 7)) || - ((vector >= 16) && (vector <= 23))) - { - xprintf("reserved"); - } - else if ((vector >= 25) && (vector <= 31)) - { - xprintf("level %d autovectored interrupt", fault_status - 24); - } - else if ((vector >= 32) && (vector <= 47)) - { - xprintf("trap #%d", vector - 32); - } - else - { - xprintf("unknown vector\r\n"); - } - } - xprintf(")\r\n"); - xprintf("sr=%4x\r\n", sr); - - __asm__ __volatile__( - " move.w 0x2700,d0 \r\n" // disable interrupts - " move.w d0,sr \r\n" - " halt \r\n" // stop processor - : /* no output */ - : /* no input */ - : "memory"); -} - -void __attribute__((interrupt)) handler(void) -{ - /* - * Prepare exception stack contents so it can be handled by a C routine. - * - * For standard routines, we'd have to save registers here. - * Since we do not intend to return anyway, we just ignore that requirement. - */ - __asm__ __volatile__("move.l (sp),-(sp)\n\t"\ - "move.l 8(sp),-(sp)\n\t"\ - "bsr _fault_handler\n\t"\ - "halt\n\t"\ - : : : "memory"); -} - -void setup_vectors(void) -{ - int i; - - xprintf("\r\ninstall early exception vector table:"); - - for (i = 8; i < 256; i++) - { - SDRAM_VECTOR_TABLE[i] = &handler; - } - - /* - * make sure VBR points to our table - */ - __asm__ __volatile__("clr.l d0\n\t"\ - "movec.l d0,VBR\n\t"\ - "nop\n\t"\ - "move.l d0,_rt_vbr" - : /* outputs */ - : /* inputs */ - : "d0", "memory", "cc" /* clobbered registers */ - ); - - xprintf("finished.\r\n"); -} diff --git a/sys/init_fpga.c b/sys/init_fpga.c deleted file mode 100644 index 6e9088e..0000000 --- a/sys/init_fpga.c +++ /dev/null @@ -1,189 +0,0 @@ -/* - * init_fpga.c - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - * - */ - -#include "MCF5475.h" -#include "sysinit.h" -#include "bas_printf.h" -#include "wait.h" - -// #define FPGA_DEBUG -#if defined(FPGA_DEBUG) -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif - -#define FPGA_STATUS (1 << 0) -#define FPGA_CLOCK (1 << 1) -#define FPGA_CONFIG (1 << 2) -#define FPGA_DATA0 (1 << 3) -#define FPGA_CONF_DONE (1 << 5) - -extern uint8_t _FPGA_CONFIG[]; -#define FPGA_FLASH_DATA &_FPGA_CONFIG[0] -extern uint8_t _FPGA_CONFIG_SIZE[]; -#define FPGA_FLASH_DATA_SIZE ((uint32_t) &_FPGA_CONFIG_SIZE[0]) - -/* - * flag located in processor SRAM1 that indicates that the FPGA configuration has - * been loaded through the onboard JTAG interface. - * init_fpga() will honour this and not overwrite config. - */ -extern bool _FPGA_JTAG_LOADED; -extern int32_t _FPGA_JTAG_VALID; -#define VALID_JTAG 0xaffeaffe - -void config_gpio_for_fpga_config(void) -{ -#if defined(MACHINE_FIREBEE) - /* - * Configure GPIO FEC1L port directions (needed to load FPGA configuration) - */ - MCF_GPIO_PDDR_FEC1L = 0 | /* bit 7 = input */ - 0 | /* bit 6 = input */ - 0 | /* bit 5 = input */ - MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4 | /* bit 4 = LED => output */ - MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L3 | /* bit 3 = PRG_DQ0 => output */ - MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L2 | /* bit 2 = FPGA_CONFIG => output */ - MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L1 | /* bit 1 = PRG_CLK (FPGA) => output */ - 0; /* bit 0 => input */ -#endif /* MACHINE_FIREBEE */ -} - -void config_gpio_for_jtag_config(void) -{ - /* - * configure FEC1L port directions to enable external JTAG configuration download to FPGA - */ - MCF_GPIO_PDDR_FEC1L = 0 | - MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4; /* bit 4 = LED => output */ - /* all other bits = input */ - /* - * unfortunately, the GPIO module cannot trigger interrupts. That means CONF_DONE needs to be polled to detect - * external FPGA (re)configuration and reset the system in that case. Could be done from the OS as well... - */ -} - -/* - * load FPGA - */ -bool init_fpga(void) -{ - uint8_t *fpga_data; - volatile int32_t time, start, end; - int i; - - dbg("FPGA load config\r\n(_FPGA_JTAG_LOADED = %x, _FPGA_JTAG_VALID = %x)...\r\n", _FPGA_JTAG_LOADED, _FPGA_JTAG_VALID); - if (_FPGA_JTAG_LOADED == true && _FPGA_JTAG_VALID == VALID_JTAG) - { - dbg("detected _FPGA_JTAG_LOADED flag. Not overwriting FPGA config.\r\n"); - - /* reset the flag so that next boot will load config again from flash */ - _FPGA_JTAG_LOADED = 0; - _FPGA_JTAG_VALID = 0; - - return true; - } - start = MCF_SLT0_SCNT; - - config_gpio_for_fpga_config(); - MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK; /* FPGA clock => low */ - - /* pulling FPGA_CONFIG to low resets the FPGA */ - MCF_GPIO_PODR_FEC1L &= ~FPGA_CONFIG; /* FPGA config => low */ - wait(10); /* give it some time to do its reset stuff */ - - while ((MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS) && (MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)); - - MCF_GPIO_PODR_FEC1L |= FPGA_CONFIG; /* pull FPGA_CONFIG high to start config cycle */ - while (!(MCF_GPIO_PPDSDR_FEC1L & FPGA_STATUS)) - ; /* wait until status becomes high */ - - /* - * excerpt from an Altera configuration manual: - * - * The low-to-high transition of nCONFIG on the FPGA begins the configuration cycle. The - * configuration cycle consists of 3 stages�reset, configuration, and initialization. - * While nCONFIG is low, the device is in reset. When the device comes out of reset, - * nCONFIG must be at a logic high level in order for the device to release the open-drain - * nSTATUS pin. After nSTATUS is released, it is pulled high by a pull-up resistor and the FPGA - * is ready to receive configuration data. Before and during configuration, all user I/O pins - * are tri-stated. Stratix series, Arria series, and Cyclone series have weak pull-up resistors - * on the I/O pins which are on, before and during configuration. - * - * To begin configuration, nCONFIG and nSTATUS must be at a logic high level. You can delay - * configuration by holding the nCONFIG low. The device receives configuration data on its - * DATA0 pins. Configuration data is latched into the FPGA on the rising edge of DCLK. After - * the FPGA has received all configuration data successfully, it releases the CONF_DONE pin, - * which is pulled high by a pull-up resistor. A low to high transition on CONF_DONE indicates - * configuration is complete and initialization of the device can begin. - */ - - const uint8_t *fpga_flash_data_end = FPGA_FLASH_DATA + FPGA_FLASH_DATA_SIZE; - - fpga_data = (uint8_t *) FPGA_FLASH_DATA; - do - { - uint8_t value = *fpga_data++; - for (i = 0; i < 8; i++, value >>= 1) - { - - if (value & 1) - { - /* bit set -> toggle DATA0 to high */ - MCF_GPIO_PODR_FEC1L |= FPGA_DATA0; - } - else - { - /* bit is cleared -> toggle DATA0 to low */ - MCF_GPIO_PODR_FEC1L &= ~FPGA_DATA0; - } - /* toggle DCLK -> FPGA reads the bit */ - MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK; - MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK; - } - } while ((!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)) && (fpga_data < fpga_flash_data_end)); - - if (fpga_data < fpga_flash_data_end) - { -#ifdef _NOT_USED_ - while (fpga_data++ < fpga_flash_data_end) - { - /* toggle a little more since it's fun ;) */ - MCF_GPIO_PODR_FEC1L |= FPGA_CLOCK; - MCF_GPIO_PODR_FEC1L &= ~FPGA_CLOCK; - } -#endif /* _NOT_USED_ */ - end = MCF_SLT0_SCNT; - time = (start - end) / (SYSCLK / 1000) / 1000; - - xprintf("finished (took %f seconds).\r\n", time / 1000.0); - config_gpio_for_jtag_config(); - return true; - } - xprintf("FAILED!\r\n"); - config_gpio_for_jtag_config(); - - return false; -} diff --git a/sys/interrupts.c b/sys/interrupts.c deleted file mode 100644 index 31b7cd2..0000000 --- a/sys/interrupts.c +++ /dev/null @@ -1,485 +0,0 @@ -/* - * Interrupts - * - * Handle interrupts, the levels. - * - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#include -#include "MCF5475.h" -#include "bas_utils.h" -#include "bas_printf.h" -#include "bas_string.h" -#include "exceptions.h" -#include "interrupts.h" -#include "bas_printf.h" -#include "startcf.h" -#include "cache.h" -#include "util.h" -#include "dma.h" -#include "pci.h" - -//#define IRQ_DEBUG -#if defined(IRQ_DEBUG) -#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif -#define err(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0) - - -#ifndef MAX_ISR_ENTRY -#define MAX_ISR_ENTRY (20) -#endif - - -struct isrentry -{ - int vector; - bool (*handler)(void *, void *); - void *hdev; - void *harg; -}; - -static struct isrentry isrtab[MAX_ISR_ENTRY]; /* list of interrupt service routines */ - -/* - * clear the table of interrupt service handlers - */ -void isr_init(void) -{ - memset(isrtab, 0, sizeof(isrtab)); -} - -bool isr_set_prio_and_level(int int_source, int priority, int level) -{ - if (int_source > 8 && int_source <= 62) - { - /* - * preset interrupt control registers with level and priority - */ - dbg("set MCF_INTC_ICR(%d) to priority %d, level %d\r\n", - int_source, priority, level); - MCF_INTC_ICR(int_source) = MCF_INTC_ICR_IP(priority) | - MCF_INTC_ICR_IL(level); - } - else if (int_source >= 1 && int_source <= 8) - { - dbg("interrrupt control register for vector %d is read only!\r\n"); - } - else - { - err("invalid vector - interrupt control register not set.\r\n"); - return false; - } - - return true; -} - -/* - * enable internal int source in interrupt controller - */ -bool isr_enable_int_source(int int_source) -{ - dbg("anding int_source %d, MCF_INTC_IMR%c = 0x%08x, now 0x%08x\r\n", - int_source, - int_source < 32 && int_source > 0 ? 'L' : - int_source >= 32 && int_source <= 62 ? 'H' : 'U', - int_source < 32 && int_source > 0 ? ~(1 << int_source) : - int_source >= 32 && int_source <= 62 ? ~(1 << (int_source - 32)) : 0, - MCF_INTC_IMRH); - - if (int_source < 32 && int_source > 0) - { - MCF_INTC_IMRL &= ~(1 << int_source); - } - else if (int_source >= 32 && int_source <= 62) - { - MCF_INTC_IMRH &= ~(1 << (int_source - 32)); - } - else - { - err("vector %d does not correspond to an internal interrupt source\r\n"); - return false; - } - - return true; -} - -/* - * This function places an interrupt handler in the ISR table, - * thereby registering it so that the low-level handler may call it. - * - * The two parameters are intended for the first arg to be a - * pointer to the device itself, and the second a pointer to a data - * structure used by the device driver for that particular device. - */ -bool isr_register_handler(int vector, int level, int priority, bool (*handler)(void *, void *), void *hdev, void *harg) -{ - int index; - int int_source; - - if ((vector == 0) || (handler == NULL)) - { - dbg("illegal vector or handler!\r\n"); - - return false; - } - - for (index = 0; index < MAX_ISR_ENTRY; index++) - { - if (isrtab[index].vector == vector) - { - /* one cross each, only! */ - dbg("already set handler with this vector (%d, %d)\r\n", vector); - - return false; - } - - if (isrtab[index].vector == 0) - { - isrtab[index].vector = vector; - isrtab[index].handler = handler; - isrtab[index].hdev = hdev; - isrtab[index].harg = harg; - - int_source = vector - 64; - - if (!isr_enable_int_source(int_source)) - { - err("failed to enable internal interrupt souce %d in IMRL/IMRH\r\n", int_source); - return false; - } - - if (!isr_set_prio_and_level(int_source, priority, level)) - { - err("failed to set priority and level for interrupt source %d\r\n", int_source); - return false; - } - - return true; - } - } - dbg("no available slots to register handler for vector %d\n\r", vector); - - return false; /* no available slots */ -} - -void isr_remove_handler(bool (*handler)(void *, void *)) -{ - /* - * This routine removes from the ISR table all - * entries that matches 'handler'. - */ - int index; - - for (index = 0; index < MAX_ISR_ENTRY; index++) - { - if (isrtab[index].handler == handler) - { - memset(&isrtab[index], 0, sizeof(struct isrentry)); - - return; - } - } - dbg("no such handler registered (handler=%p\r\n", handler); -} - -/* - * This routine searches the ISR table for an entry that matches - * 'vector'. If one is found, then 'handler' is executed. - * - * This routine returns either true or false where - * true = interrupt has been handled, return to caller - * false= interrupt has been handled or hasn't, but needs to be forwarded to TOS - */ -bool isr_execute_handler(int vector) -{ - int index; - - dbg("vector = %d\r\n", vector); - - /* - * locate an interrupt service routine handler. - */ - for (index = 0; index < MAX_ISR_ENTRY; index++) - { - if (isrtab[index].vector == vector) - { - isrtab[index].handler(isrtab[index].hdev, isrtab[index].harg); - return true; - } - } - err("no isr handler for vector %d found. Spurious?\r\n", vector); - - return true; -} - -/* - * PIC interrupt handler for Firebee - * - * Handles PIC requests that come in from PSC3 serial interface. Currently, that - * is RTC/NVRAM requests only - */ -bool pic_interrupt_handler(void *arg1, void *arg2) -{ - uint8_t rcv_byte; - - rcv_byte = MCF_PSC3_PSCRB_8BIT; - if (rcv_byte == 2) /* PIC requests RTC data */ - { - uint8_t *rtc_reg = (uint8_t *) 0xffff8961; - uint8_t *rtc_data = (uint8_t *) 0xffff8963; - int index = 0; - - err("PIC interrupt: requesting RTC data\r\n"); - - MCF_PSC3_PSCTB_8BIT = 0x82; // header byte to PIC - do - { - *rtc_reg = 0; - MCF_PSC3_PSCTB_8BIT = *rtc_data; - } while (index++ < 64); - } - return true; -} - -bool xlbpci_interrupt_handler(void *arg1, void *arg2) -{ - uint32_t reason; - - dbg("XLB PCI interrupt\r\n"); - - reason = MCF_PCI_PCIISR; - - if (reason & MCF_PCI_PCIISR_RE) - { - dbg("Retry error. Retry terminated or max retries reached. Cleared\r\n"); - MCF_PCI_PCIISR |= MCF_PCI_PCIISR_RE; - } - - if (reason & MCF_PCI_PCIISR_IA) - { - dbg("Initiator abort. No target answered in time. Cleared.\r\n"); - MCF_PCI_PCIISR |= MCF_PCI_PCIISR_IA; - } - - if (reason & MCF_PCI_PCIISR_TA) - { - dbg("Target abort. Cleared.\r\n"); - MCF_PCI_PCIISR |= MCF_PCI_PCIISR_TA; - } - - return true; -} - -bool pciarb_interrupt_handler(void *arg1, void *arg2) -{ - dbg("PCI ARB interrupt\r\n"); - - return true; -} - -#if defined(MACHINE_FIREBEE) -/* - * This gets called from irq5 in exceptions.S - * - * IRQ5 are the "FBEE" (PIC, ETH PHY, PCI, DVI monitor sense and DSP) interrupts multiplexed by the FPGA interrupt handler - */ -bool irq5_handler(void *arg1, void *arg2) -{ - uint32_t pending_interrupts = FBEE_INTR_PENDING; - - dbg("IRQ5!\r\n"); - if (pending_interrupts & FBEE_INTR_PIC) - { - dbg("PIC interrupt\r\n"); - FBEE_INTR_CLEAR = FBEE_INTR_PIC; - } - - if (pending_interrupts & FBEE_INTR_ETHERNET) - { - dbg("ethernet 0 PHY interrupt\r\n"); - FBEE_INTR_CLEAR = FBEE_INTR_ETHERNET; - } - - if (pending_interrupts & FBEE_INTR_DVI) - { - dbg("DVI monitor sense interrupt\r\n"); - FBEE_INTR_CLEAR = FBEE_INTR_DVI; - } - - if (pending_interrupts & FBEE_INTR_PCI_INTA || - pending_interrupts & FBEE_INTR_PCI_INTB || - pending_interrupts & FBEE_INTR_PCI_INTC || - pending_interrupts & FBEE_INTR_PCI_INTD) - { - dbg("PCI interrupt IRQ5\r\n"); - FBEE_INTR_CLEAR = FBEE_INTR_PCI_INTA | - FBEE_INTR_PCI_INTB | - FBEE_INTR_PCI_INTC | - FBEE_INTR_PCI_INTD; - } - - if (pending_interrupts & FBEE_INTR_DSP) - { - dbg("DSP interrupt\r\n"); - FBEE_INTR_CLEAR = FBEE_INTR_DSP; - } - - if (pending_interrupts & FBEE_INTR_VSYNC || pending_interrupts & FBEE_INTR_HSYNC) - { - dbg("vsync or hsync interrupt!\r\n"); - FBEE_INTR_CLEAR = FBEE_INTR_VSYNC | FBEE_INTR_HSYNC; - /* hsync and vsync should go to TOS unhandled */ - return false; - } - - MCF_EPORT_EPFR |= (1 << 5); /* clear interrupt from edge port */ - - return true; -} - -/* - * blink the Firebee's LED to show we are still alive - */ -void blink_led(void) -{ - static uint16_t blinker = 0; - - if ((blinker++ & 0x80) > 0) - { - MCF_GPIO_PODR_FEC1L |= (1 << 4); /* LED off */ - } - else - { - MCF_GPIO_PODR_FEC1L &= ~(1 << 4); /* LED on */ - } -} - -/* - * Atari MFP interrupt registers. - * - * TODO: should go into a header file - */ - -#define FALCON_MFP_IERA *((volatile uint8_t *) 0xfffffa07) -#define FALCON_MFP_IERB *((volatile uint8_t *) 0xfffffa09) -#define FALCON_MFP_IPRA *((volatile uint8_t *) 0xfffffa0b) -#define FALCON_MFP_IPRB *((volatile uint8_t *) 0xfffffa0d) -#define FALCON_MFP_IMRA *((volatile uint8_t *) 0xfffffa13) -#define FALCON_MFP_IMRB *((volatile uint8_t *) 0xfffffa15) - -bool irq6_acsi_dma_interrupt(void) -{ - dbg("ACSI DMA interrupt\r\n"); - - /* - * TODO: implement handler - */ - - return false; -} - -bool irq6_handler(uint32_t sf1, uint32_t sf2) -{ - //err("IRQ6!\r\n"); - - if (FALCON_MFP_IPRA || FALCON_MFP_IPRB) - { - blink_led(); - } - - MCF_EPORT_EPFR |= (1 << 6); /* clear int6 from edge port */ - - return false; /* always forward IRQ6 to TOS */ -} - -#else /* MACHINE_FIREBEE */ - -bool irq5_handler(void *arg1, void *arg2) -{ - MCF_EPORT_EPFR |= (1 << 5); /* clear int5 from edge port */ - - return true; -} - -bool irq6_handler(void *arg1, void *arg2) -{ - err("IRQ6!\r\n"); - - MCF_EPORT_EPFR |= (1 << 6); /* clear int6 from edge port */ - - return false; /* always forward IRQ6 to TOS */ -} - -/* - * This gets called from irq7 in exceptions.S - * Once we arrive here, the SR has been set to disable interrupts and the gcc scratch registers have been saved - */ -bool irq7_handler(void) -{ - int32_t handle; - int32_t value = 0; - int32_t newvalue; - - MCF_EPORT_EPFR |= (1 << 7); - dbg("IRQ7!\r\n"); - if ((handle = pci_get_interrupt_cause()) > 0) - { - newvalue = pci_call_interrupt_chain(handle, value); - if (newvalue == value) - { - dbg("interrupt not handled!\r\n"); - } - } - MCF_EPORT_EPFR |= (1 << 7); /* clear int7 from edge port */ - - return true; -} -#endif /* MACHINE_M548X */ - -#if defined(MACHINE_FIREBEE) -/* - * this is the higlevel interrupt service routine for gpt0 timer interrupts. - * - * It is called from handler_gpt0 in exceptions.S - * - * The gpt0 timer is not used as a timer, but as interrupt trigger by the FPGA which fires - * everytime the video base address high byte (0xffff8201) gets written by user code (i.e. - * everytime the video base address is set). - * The interrupt service routine checks if that page was already set as a video page (in that - * case it does nothing), if not (if we have a newly set page), it sets up an MMU mapping for - * that page (effectively rerouting any further access to Falcon video RAM to Firebee FPGA - * video RAM starting at 0x60000000) and copies SDRAM contents of that page to the video - * RAM page. - */ -bool gpt0_interrupt_handler(void *arg0, void *arg1) -{ - dbg("handler called\n\r"); - - MCF_GPT0_GMS &= ~1; /* rearm trigger */ - NOP(); - MCF_GPT0_GMS |= 1; - - return true; -} -#endif /* MACHINE_FIREBEE */ diff --git a/sys/mmu.c b/sys/mmu.c deleted file mode 100644 index 859a15a..0000000 --- a/sys/mmu.c +++ /dev/null @@ -1,983 +0,0 @@ -#include "mmu.h" -#include "acia.h" -#include "exceptions.h" - -#if defined(MACHINE_FIREBEE) -#include "firebee.h" -#elif defined(MACHINE_M5484LITE) -#include "m5484l.h" -#elif defined(MACHINE_M54455) -#include "m54455.h" -#else -#error "unknown machine!" -#endif - -/* - * mmu.c - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * derived from original assembler sources: - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2013 M. Froeschle - */ - -#define ACR_BA(x) ((x) & 0xffff0000) -#define ACR_ADMSK(x) (((x) & 0xffff) << 16) -#define ACR_E(x) (((x) & 1) << 15) - -#define ACR_S(x) (((x) & 3) << 13) -#define ACR_S_USERMODE 0 -#define ACR_S_SUPERVISOR_MODE 1 -#define ACR_S_ALL 2 - -#define ACR_AMM(x) (((x) & 1) << 10) - -#define ACR_CM(x) (((x) & 3) << 5) -#define ACR_CM_CACHEABLE_WT 0x0 -#define ACR_CM_CACHEABLE_CB 0x1 -#define ACR_CM_CACHE_INH_PRECISE 0x2 -#define ACR_CM_CACHE_INH_IMPRECISE 0x3 - -#define ACR_SP(x) (((x) & 1) << 3) -#define ACR_W(x) (((x) & 1) << 2) - -#include -#include "bas_printf.h" -#include "bas_types.h" -#include "MCF5475.h" -#include "pci.h" -#include "cache.h" -#include "util.h" - -#if defined(MACHINE_FIREBEE) -#include "firebee.h" -#elif defined(MACHINE_M5484LITE) -#include "m5484l.h" -#elif defined(MACHINE_M54455) -#include "m54455.h" -#else -#error "unknown machine!"x -#endif /* MACHINE_FIREBEE */ - -//#define DBG_MMU -#ifdef DBG_MMU -#define dbg(format, arg...) do { xprintf("DEBUG (%s()): " format, __FUNCTION__, ##arg);} while(0) -#else -#define dbg(format, arg...) do {;} while (0) -#endif /* DBG_MMU */ -#define err(format, arg...) do { xprintf("ERROR (%s()): " format, __FUNCTION__, ##arg); } while(0); - -/* - * set ASID register - * saves new value to rt_asid and returns former value - */ -inline uint32_t set_asid(uint32_t value) -{ - extern long rt_asid; - uint32_t ret = rt_asid; - - __asm__ __volatile__( - "movec %[value],ASID\n\t" - : /* no output */ - : [value] "r" (value) - : - ); - - rt_asid = value; - - return ret; -} - - -/* - * set ACRx register - * saves new value to rt_acrx and returns former value - */ -inline uint32_t set_acr0(uint32_t value) -{ - extern uint32_t rt_acr0; - uint32_t ret = rt_acr0; - - __asm__ __volatile__( - "movec %[value],ACR0\n\t" - : /* not output */ - : [value] "r" (value) - : - ); - rt_acr0 = value; - - return ret; -} - -/* - * set ACRx register - * saves new value to rt_acrx and returns former value - */ -inline uint32_t set_acr1(uint32_t value) -{ - extern uint32_t rt_acr1; - uint32_t ret = rt_acr1; - - __asm__ __volatile__( - "movec %[value],ACR1\n\t" - : /* not output */ - : [value] "r" (value) - : - ); - rt_acr1 = value; - - return ret; -} - - -/* - * set ACRx register - * saves new value to rt_acrx and returns former value - */ -inline uint32_t set_acr2(uint32_t value) -{ - extern uint32_t rt_acr2; - uint32_t ret = rt_acr2; - - __asm__ __volatile__( - "movec %[value],ACR2\n\t" - : /* not output */ - : [value] "r" (value) - : - ); - rt_acr2 = value; - - return ret; -} - -/* - * set ACRx register - * saves new value to rt_acrx and returns former value - */ -inline uint32_t set_acr3(uint32_t value) -{ - extern uint32_t rt_acr3; - uint32_t ret = rt_acr3; - - __asm__ __volatile__( - "movec %[value],ACR3\n\t" - : /* not output */ - : [value] "r" (value) - : - ); - rt_acr3 = value; - - return ret; -} - -inline uint32_t set_mmubar(uint32_t value) -{ - extern uint32_t rt_mmubar; - uint32_t ret = rt_mmubar; - - __asm__ __volatile__( - "movec %[value],MMUBAR\n\t" - : /* no output */ - : [value] "r" (value) - : /* no clobber */ - ); - rt_mmubar = value; - NOP(); - - return ret; -} - - -/* - * translation table for virtual address ranges. Holds the physical_offset (which must be added to a virtual - * address to get its physical counterpart) for memory ranges. - */ -struct virt_to_phys -{ - uint32_t start_address; - uint32_t length; - uint32_t physical_offset; -}; - -#if defined(MACHINE_FIREBEE) -static struct virt_to_phys translation[] = -{ - /* virtual , length , offset */ - { 0x00000000, 0x00e00000, 0x60000000 }, /* map first 14 MByte to first 14 Mb of video ram */ - { 0x00e00000, 0x00100000, 0x00000000 }, /* map TOS to SDRAM */ - { 0x00f00000, 0x00100000, 0xff000000 }, /* map Falcon I/O area to FPGA */ - { 0x01000000, 0x1f000000, 0x00000000 }, /* map rest of ram virt = phys */ -}; -#elif defined(MACHINE_M5484LITE) -static struct virt_to_phys translation[] = -{ - /* virtual , length , offset */ - { 0x00000000, 0x00e00000, 0x00000000 }, /* map first 14 MByte to first 14 Mb of SD ram */ - { 0x00e00000, 0x00100000, 0x00000000 }, /* map TOS to SDRAM */ - { 0x01000000, 0x04000000, 0x00000000 }, /* map rest of ram virt = phys */ - { 0x60000000, 0x10000000, 0x00000000 }, /* map CPLD CF card I/O area */ - -}; -#elif defined(MACHINE_M54455) -/* FIXME: this is not determined yet! */ -static struct virt_to_phys translation[] = -{ - /* virtual , length , offset */ - { 0x00000000, 0x00e00000, 0x60000000 }, /* map first 14 MByte to first 14 Mb of video ram */ - { 0x00e00000, 0x00100000, 0x00000000 }, /* map TOS to SDRAM */ - { 0x00f00000, 0x00100000, 0xff000000 }, /* map Falcon I/O area to FPGA */ - { 0x01000000, 0x1f000000, 0x00000000 }, /* map rest of ram virt = phys */ -}; -#else -#error unknown machine! -#endif - -static int num_translations = sizeof(translation) / sizeof(struct virt_to_phys); - -static inline int32_t lookup_phys(int32_t virt) -{ - int i; - - for (i = 0; i < num_translations; i++) - { - if (virt >= translation[i].start_address && virt < translation[i].start_address + translation[i].length) - { - return virt + translation[i].physical_offset; - } - } - err("virtual address 0x%lx not found in translation table!\r\n", virt); - - return -1; -} - -struct mmu_page_descriptor -{ - uint8_t cache_mode : 2; - uint8_t supervisor_protect : 1; - uint8_t read : 1; - uint8_t write : 1; - uint8_t execute : 1; - uint8_t global : 1; - uint8_t locked : 1; -}; - -/* - * page descriptors. Size depending on DEFAULT_PAGE_SIZE, either 1M (resulting in 512 - * bytes size) or 8k pages (64k descriptor array size) - */ -static struct mmu_page_descriptor pages[SDRAM_SIZE / DEFAULT_PAGE_SIZE]; - - -int mmu_map_instruction_page(int32_t virt, uint8_t asid) -{ - const uint32_t size_mask = ~ (DEFAULT_PAGE_SIZE - 1); /* pagesize */ - int page_index = (virt & size_mask) / DEFAULT_PAGE_SIZE; /* index into page_descriptor array */ - struct mmu_page_descriptor *page = &pages[page_index]; /* attributes of page to map */ - int ipl; - int32_t phys = lookup_phys(virt); /* virtual to physical translation of page */ - - if (phys == -1) - { - /* no valid mapping found, caller will issue a bus error in return */ - - return 0; - } - -#ifdef DBG_MMU - register int sp asm("sp"); - dbg("page_descriptor: 0x%02x, ssp = 0x%08x\r\n", * (uint8_t *) page, sp); -#endif /* DBG_MMU */ - - /* - * add page to TLB - */ - - ipl = set_ipl(7); /* do not disturb */ - - MCF_MMU_MMUAR = (virt & size_mask); - - MCF_MMU_MMUTR = (virt & size_mask) | /* virtual address */ - MCF_MMU_MMUTR_ID(asid) | /* address space id (ASID) */ - (page->global ? MCF_MMU_MMUTR_SG : 0) | /* shared global */ - MCF_MMU_MMUTR_V; /* valid */ - - MCF_MMU_MMUDR = (phys & size_mask) | /* physical address */ - MCF_MMU_MMUDR_SZ(DEFAULT_PAGE_SIZE) | /* page size */ - MCF_MMU_MMUDR_CM(page->cache_mode) | /* cache mode */ - (page->supervisor_protect ? MCF_MMU_MMUDR_SP : 0) | /* supervisor protect */ - (page->read ? MCF_MMU_MMUDR_R : 0) | /* read access enable */ - (page->write ? MCF_MMU_MMUDR_W : 0) | /* write access enable */ - (page->execute ? MCF_MMU_MMUDR_X : 0) | /* execute access enable */ - (page->locked ? MCF_MMU_MMUDR_LK : 0); - - MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | /* instruction */ - MCF_MMU_MMUOR_ACC | /* access TLB */ - MCF_MMU_MMUOR_UAA; /* update allocation address field */ - - set_ipl(ipl); - - dbg("mapped virt=0x%08x to phys=0x%08x\r\n", virt & size_mask, phys & size_mask); - - dbg("ITLB: MCF_MMU_MMUOR = %08x\r\n", MCF_MMU_MMUOR); - - return 1; -} - -int mmu_map_data_page(int32_t virt, uint8_t asid) -{ - uint16_t ipl; - const uint32_t size_mask = ~ (DEFAULT_PAGE_SIZE - 1); /* pagesize */ - int page_index = (virt & size_mask) / DEFAULT_PAGE_SIZE; /* index into page_descriptor array */ - struct mmu_page_descriptor *page = &pages[page_index]; /* attributes of page to map */ - - int32_t phys = lookup_phys(virt); /* virtual to physical translation of page */ - - if (phys == -1) - { - /* no valid mapping found, caller will issue a bus error in return */ - - return 0; - } - -#ifdef DBG_MMU - register int sp asm("sp"); - dbg("page_descriptor: 0x%02x, ssp = 0x%08x\r\n", * (uint8_t *) page, sp); -#endif /* DBG_MMU */ - - /* - * add page to TLB - */ - - ipl = set_ipl(7); /* do not disturb */ - - MCF_MMU_MMUTR = (virt & size_mask) | /* virtual address */ - MCF_MMU_MMUTR_ID(asid) | /* address space id (ASID) */ - (page->global ? MCF_MMU_MMUTR_SG : 0) | /* shared global */ - MCF_MMU_MMUTR_V; /* valid */ - - MCF_MMU_MMUDR = (phys & size_mask) | /* physical address */ - MCF_MMU_MMUDR_SZ(DEFAULT_PAGE_SIZE) | /* page size */ - MCF_MMU_MMUDR_CM(page->cache_mode) | /* cache mode */ - (page->supervisor_protect ? MCF_MMU_MMUDR_SP : 0) | /* supervisor protect */ - (page->read ? MCF_MMU_MMUDR_R : 0) | /* read access enable */ - (page->write ? MCF_MMU_MMUDR_W : 0) | /* write access enable */ - (page->execute ? MCF_MMU_MMUDR_X : 0) | /* execute access enable */ - (page->locked ? MCF_MMU_MMUDR_LK : 0); - - MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */ - MCF_MMU_MMUOR_UAA; /* update allocation address field */ - - set_ipl(ipl); - dbg("mapped virt=0x%08x to phys=0x%08x\r\n", virt & size_mask, phys & size_mask); - - dbg("DTLB: MCF_MMU_MMUOR = %08x\r\n", MCF_MMU_MMUOR); - - return 1; -} - -/* - * map a page of memory using virt and phys as addresses with the Coldfire MMU. - * - * Theory of operation: the Coldfire MMU in the Firebee has 64 TLB entries, 32 for data (DTLB), 32 for - * instructions (ITLB). Mappings can either be done locked (normal MMU TLB misses will not consider them - * for replacement) or unlocked (mappings will reallocate using a LRU scheme when the MMU runs out of - * TLB entries). For proper operation, the MMU needs at least two ITLBs and/or four free/allocatable DTLBs - * per instruction as a minimum, more for performance. Thus locked pages (that can't be touched by the - * LRU algorithm) should be used sparsingly. - */ -int mmu_map_page(int32_t virt, int32_t phys, enum mmu_page_size sz, uint8_t page_id, const struct mmu_page_descriptor *flags) -{ - int size_mask; - int ipl; - - switch (sz) - { - case MMU_PAGE_SIZE_1M: - size_mask = ~ (SIZE_1M - 1); - break; - - case MMU_PAGE_SIZE_8K: - size_mask = ~ (SIZE_8K - 1); - break; - - case MMU_PAGE_SIZE_4K: - size_mask = ~ (SIZE_4K - 1); - break; - - case MMU_PAGE_SIZE_1K: - size_mask = ~ (SIZE_1K - 1); - break; - - default: - dbg("illegal map size %d\r\n", sz); - return 0; - } - - /* - * add page to TLB - */ - - ipl = set_ipl(7); /* do not disturb */ - - MCF_MMU_MMUTR = ((int) virt & size_mask) | /* virtual address */ - MCF_MMU_MMUTR_ID(page_id) | /* address space id (ASID) */ - (flags->global ? MCF_MMU_MMUTR_SG : 0) | /* shared global */ - MCF_MMU_MMUTR_V; /* valid */ - - MCF_MMU_MMUDR = ((int) phys & size_mask) | /* physical address */ - MCF_MMU_MMUDR_SZ(sz) | /* page size */ - MCF_MMU_MMUDR_CM(flags->cache_mode) | - (flags->read ? MCF_MMU_MMUDR_R : 0) | /* read access enable */ - (flags->write ? MCF_MMU_MMUDR_W : 0) | /* write access enable */ - (flags->execute ? MCF_MMU_MMUDR_X : 0) | /* execute access enable */ - (flags->locked ? MCF_MMU_MMUDR_LK : 0); - - MCF_MMU_MMUOR = MCF_MMU_MMUOR_ACC | /* access TLB, data */ - MCF_MMU_MMUOR_UAA; /* update allocation address field */ - NOP(); - - MCF_MMU_MMUOR = MCF_MMU_MMUOR_ITLB | /* instruction */ - MCF_MMU_MMUOR_ACC | /* access TLB */ - MCF_MMU_MMUOR_UAA; /* update allocation address field */ - - set_ipl(ipl); - - dbg("mapped virt=0x%08x to phys=0x%08x\r\n", virt, phys); - - return 1; -} - -void mmu_init(void) -{ - extern uint8_t _MMUBAR[]; - uint32_t MMUBAR = (uint32_t) &_MMUBAR[0]; - struct mmu_page_descriptor flags; - int i; - - /* - * clear all MMU TLB entries first - */ - MCF_MMU_MMUOR = MCF_MMU_MMUOR_CA; /* clears _all_ TLBs (including locked ones) */ - NOP(); - - /* - * prelaminary initialization of page descriptor 0 (root) table - */ - for (i = 0; i < sizeof(pages) / sizeof(struct mmu_page_descriptor); i++) - { - uint32_t addr = i * DEFAULT_PAGE_SIZE; - -#if defined(MACHINE_FIREBEE) - if (addr >= 0x00f00000UL && addr < 0x00ffffffUL) /* Falcon I/O area on the Firebee */ - { - pages[i].cache_mode = CACHE_NOCACHE_PRECISE; - pages[i].execute = 0; - pages[i].read = 1; - pages[i].write = 1; - pages[i].execute = 0; - pages[i].global = 1; - pages[i].supervisor_protect = 1; - } - else if (addr >= 0x0UL && addr < 0x00e00000UL) /* ST-RAM, potential video memory */ - { - pages[i].cache_mode = CACHE_WRITETHROUGH; - pages[i].execute = 1; - pages[i].supervisor_protect = 0; - pages[i].read = 1; - pages[i].write = 1; - pages[i].execute = 1; - pages[i].global = 1; - } - else if (addr >= 0x00e00000UL && addr < 0x00f00000UL) /* EmuTOS */ - { - pages[i].cache_mode = CACHE_COPYBACK; - pages[i].execute = 1; - pages[i].supervisor_protect = 1; - pages[i].read = 1; - pages[i].write = 0; - pages[i].execute = 1; - pages[i].global = 1; - } - else - { - pages[i].cache_mode = CACHE_COPYBACK; - pages[i].execute = 1; - pages[i].read = 1; - pages[i].write = 1; - pages[i].supervisor_protect = 0; - pages[i].global = 1; - } - pages[i].locked = 0; /* not locked */ - pages[0].supervisor_protect = 0; /* protect system vectors */ - -#elif defined(MACHINE_M5484LITE) - if (addr >= 0x60000000UL && addr < 0x70000000UL) /* Compact Flash on the m5484lite */ - { - pages[i].cache_mode = CACHE_NOCACHE_PRECISE; - pages[i].execute = 0; - pages[i].read = 1; - pages[i].write = 1; - pages[i].execute = 0; - pages[i].global = 1; - pages[i].supervisor_protect = 1; - } - else if (addr >= 0x0UL && addr < 0x00e00000UL) /* ST-RAM, potential video memory */ - { - pages[i].cache_mode = CACHE_WRITETHROUGH; - pages[i].execute = 1; - pages[i].supervisor_protect = 0; - pages[i].read = 1; - pages[i].write = 1; - pages[i].execute = 1; - pages[i].global = 1; - } - else if (addr >= 0x00e00000UL && addr < 0x00f00000UL) /* EmuTOS */ - { - pages[i].cache_mode = CACHE_COPYBACK; - pages[i].execute = 1; - pages[i].supervisor_protect = 1; - pages[i].read = 1; - pages[i].write = 0; - pages[i].execute = 1; - pages[i].global = 1; - } - else - { - pages[i].cache_mode = CACHE_COPYBACK; /* rest of RAM */ - pages[i].execute = 1; - pages[i].read = 1; - pages[i].write = 1; - pages[i].supervisor_protect = 0; - pages[i].global = 1; - } - pages[i].locked = 0; /* not locked */ - pages[0].supervisor_protect = 0; /* protect system vectors */ - -#elif defined(MACHINE_M54455) - if (addr >= 0x60000000UL && addr < 0x70000000UL) /* Compact Flash on the m5484lite */ - { - pages[i].cache_mode = CACHE_NOCACHE_PRECISE; - pages[i].execute = 0; - pages[i].read = 1; - pages[i].write = 1; - pages[i].execute = 0; - pages[i].global = 1; - pages[i].supervisor_protect = 1; - } - else if (addr >= 0x0UL && addr < 0x00e00000UL) /* ST-RAM, potential video memory */ - { - pages[i].cache_mode = CACHE_WRITETHROUGH; - pages[i].execute = 1; - pages[i].supervisor_protect = 0; - pages[i].read = 1; - pages[i].write = 1; - pages[i].execute = 1; - pages[i].global = 1; - } - else if (addr >= 0x00e00000UL && addr < 0x00f00000UL) /* EmuTOS */ - { - pages[i].cache_mode = CACHE_COPYBACK; - pages[i].execute = 1; - pages[i].supervisor_protect = 1; - pages[i].read = 1; - pages[i].write = 0; - pages[i].execute = 1; - pages[i].global = 1; - } - else - { - pages[i].cache_mode = CACHE_COPYBACK; /* rest of RAM */ - pages[i].execute = 1; - pages[i].read = 1; - pages[i].write = 1; - pages[i].supervisor_protect = 0; - pages[i].global = 1; - } - pages[i].locked = 0; /* not locked */ - pages[0].supervisor_protect = 0; /* protect system vectors */ -#else -#error Unknown machine! -#endif /* MACHINE_FIREBEE */ - } - - set_asid(0); /* do not use address extension (ASID provides virtual 48 bit addresses */ - - /* set data access attributes in ACR0 and ACR1 */ - - /* map PCI address space */ - set_acr0(ACR_W(0) | /* read and write accesses permitted */ - ACR_SP(1) | /* supervisor and user mode access permitted */ - ACR_CM(ACR_CM_CACHE_INH_PRECISE) | /* cache inhibit, precise */ - ACR_AMM(0) | /* control region > 16 MB */ - ACR_S(ACR_S_SUPERVISOR_MODE) | /* match addresses in supervisor mode only */ - ACR_E(1) | /* enable ACR */ -#if defined(MACHINE_FIREBEE) - ACR_ADMSK(0x7f) | /* cover 2GB area from 0x80000000 to 0xffffffff */ - ACR_BA(0x80000000)); /* (equals area from 3 to 4 GB */ -#elif defined(MACHINE_M5484LITE) - ACR_ADMSK(0x7f) | /* cover 2 GB area from 0x80000000 to 0xffffffff */ - ACR_BA(0x80000000)); -#elif defined(MACHINE_M54455) - ACR_ADMSK(0x7f) | - ACR_BA(0x80000000)); /* FIXME: not determined yet */ -#else -#error unknown machine! -#endif /* MACHINE_FIREBEE */ - - // set_acr1(0x601fc000); - - /* data access attributes for BaS in flash */ - - set_acr1(ACR_W(0) | - ACR_SP(0) | - ACR_CM(0) | -#if defined(MACHINE_FIREBEE) - ACR_CM(ACR_CM_CACHEABLE_WT) | -#elif defined(MACHINE_M5484LITE) - ACR_CM(ACR_CM_CACHEABLE_WT) | -#elif defined(MACHINE_M54455) - ACR_CM(ACR_CM_CACHEABLE_WT) | -#else -#error unknown machine! -#endif /* MACHINE_FIREBEE */ - ACR_AMM(0) | - ACR_S(ACR_S_ALL) | - ACR_E(1) | - ACR_ADMSK(0x1f) | - ACR_BA(0xe0000000)); - - /* set instruction access attributes in ACR2 and ACR3 */ - - //set_acr2(0xe007c400); - - /* instruction access attribute for BaS in flash */ - - set_acr2(ACR_W(0) | - ACR_SP(0) | - ACR_CM(0) | - ACR_CM(ACR_CM_CACHEABLE_WT) | - ACR_AMM(1) | - ACR_S(ACR_S_ALL) | - ACR_E(1) | - ACR_ADMSK(0x7) | - ACR_BA(0xe0000000)); - - /* disable ACR1 - 3, essentially disabling all of the above */ - - set_acr3(0x0); - - set_mmubar(MMUBAR + 1); /* set and enable MMUBAR */ - - /* create locked TLB entries */ - - flags.cache_mode = CACHE_COPYBACK; - flags.supervisor_protect = 0; - flags.read = 1; - flags.write = 1; - flags.execute = 1; - flags.locked = true; - - /* 0x00000000 - 0x00100000 (first MB of physical memory) locked virt = phys */ - mmu_map_page(0x0, 0x0, MMU_PAGE_SIZE_1M, 0, &flags); - -#ifdef _NOT_USED_ -#if defined(MACHINE_FIREBEE) - /* - * 0x00d00000 - 0x00e00000 (last megabyte of ST RAM = Falcon video memory) locked ID = 6 - * mapped to physical address 0x60d0'0000 (FPGA video memory) - * video RAM: read write execute normal write true - */ - flags.cache_mode = CACHE_WRITETHROUGH; - flags.supervisor_protect = 0; - flags.read = 1; - flags.write = 1; - flags.execute = 1; - flags.locked = true; - mmu_map_page(0x00d00000, 0x60d00000, MMU_PAGE_SIZE_1M, SCA_PAGE_ID, &flags); -#endif /* MACHINE_FIREBEE */ -#endif - - /* - * Make the TOS (in SDRAM) read-only - * This maps virtual 0x00e0'0000 - 0x00ef'ffff to the same virtual address - */ - flags.cache_mode = CACHE_COPYBACK; - flags.supervisor_protect = 0; - flags.read = 1; - flags.write = 0; - flags.execute = 1; - flags.locked = 1; - mmu_map_page(0xe00000, 0xe00000, MMU_PAGE_SIZE_1M, 0, &flags); - -#if defined(MACHINE_FIREBEE) - /* - * Map FireBee I/O area (0xfff0'0000 - 0xffff'ffff physical) to the Falcon-compatible I/O - * area (0x00f0'0000 - 0x00ff'ffff virtual) for the FireBee - */ - flags.cache_mode = CACHE_NOCACHE_PRECISE; - flags.supervisor_protect = 1; - flags.read = 1; - flags.write = 1; - flags.execute = 0; - flags.locked = 1; - mmu_map_page(0x00f00000, 0xfff00000, MMU_PAGE_SIZE_1M, 0, &flags); -#endif /* MACHINE_FIREBEE */ - - /* - * Map (locked) the second last MB of physical SDRAM (this is where BaS .data and .bss reside) to the same - * virtual address. This is also used (completely) when BaS is in RAM - */ - flags.cache_mode = CACHE_COPYBACK; - flags.supervisor_protect = 1; - flags.read = 1; - flags.write = 1; - flags.execute = 1; - flags.locked = 1; - mmu_map_page(SDRAM_START + SDRAM_SIZE - 0x00200000, SDRAM_START + SDRAM_SIZE - 0x00200000, MMU_PAGE_SIZE_1M, 0, &flags); - - /* - * Map (locked) the very last MB of physical SDRAM (this is where the driver buffers reside) to the same - * virtual address. Used uncached for drivers. - */ - flags.cache_mode = CACHE_NOCACHE_PRECISE; - flags.supervisor_protect = 1; - flags.read = 1; - flags.write = 1; - flags.execute = 0; - flags.locked = 1; - mmu_map_page(SDRAM_START + SDRAM_SIZE - 0x00100000, SDRAM_START + SDRAM_SIZE - 0x00100000, MMU_PAGE_SIZE_1M, 0, &flags); -} - - -uint32_t mmutr_miss(uint32_t mmu_sr, uint32_t fault_address, uint32_t pc, - uint32_t format_status) -{ - uint32_t fault = format_status & 0xc030000; - - dbg("MMU TLB MISS accessing 0x%08x\r\nFS = 0x%08x\r\nPC = 0x%08x\r\n", fault_address, format_status, pc); - // flush_and_invalidate_caches(); - - switch (fault) - { - /* if we have a real TLB miss, map the offending page */ - - case 0x04010000: /* TLB miss on opword of instruction fetch */ - case 0x04020000: /* TLB miss on extension word of instruction fetch */ - dbg("MMU ITLB MISS accessing 0x%08x\r\n" - "FS = 0x%08x\r\n" - "MMUSR = 0x%08x\r\n" - "PC = 0x%08x\r\n", - fault_address, format_status, mmu_sr, pc); - dbg("fault = 0x%08x\r\n", fault); - - if (!mmu_map_instruction_page(pc, 0)) - { - dbg("bus error\r\n"); - return 1; /* bus error */ - } - - /* due to prefetch, it makes sense to map the next adjacent page also for ITLBs */ - if (pc + DEFAULT_PAGE_SIZE < TARGET_ADDRESS) - { - /* - * only do this if the next page is still valid RAM - */ - if (!mmu_map_instruction_page(pc + DEFAULT_PAGE_SIZE, 0)) - { - dbg("bus error\r\n"); - return 1; /* bus error */ - } - } - break; - - case 0x08020000: /* TLB miss on data write */ - case 0x0c020000: /* TLB miss on data read or read-modify-write */ - dbg("MMU DTLB MISS accessing 0x%08x\r\n" - "FS = 0x%08x\r\n" - "MMUSR = 0x%08x\r\n" - "PC = 0x%08x\r\n", - fault_address, format_status, mmu_sr, pc); - dbg("fault = 0x%08x\r\n", fault); - - if (!mmu_map_data_page(fault_address, 0)) - { - dbg("bus error\r\n"); - return 1; /* bus error */ - } - break; - - /* else issue a bus error */ - default: - dbg("bus error\r\n"); - return 1; /* signal bus error to caller */ - } -#ifdef DBG_MMU - xprintf("\r\n"); -#endif /* DBG_MMU */ - - return 0; /* signal TLB miss handled to caller */ -} - - -/* TODO: implement */ - -/* - * API-exposed, externally callable MMU functions - */ - - -/* - * lock data page(s) with address space id asid from address virt to virt + size. - * - * ASID probably needs an explanation - this is the "address space id" managed by - * the MMU. - * If its value range would be large enough, this could directly map to a PID - * in MiNT. Unfortunately, the Coldfire MMU only allows an 8 bit value for ASID - * (with 0 already occupied for the super user/root process and the Firebee video - * subsystem occupying another one), so we are left with 253 distinct values. - * MMU software needs to implement some kind of mapping and LRU scheme which will - * lead to a throwaway of all mappings for processes not seen for a while (and thus - * to undeterministic response/task switching times when such processes are activated - * again). - * - * FIXME: There is no check for "too many locked pages", currently. - * - * return: 0 if failed (page not in translation table), 1 otherwise - */ -int32_t mmu_map_data_page_locked(uint32_t virt, uint32_t size, int asid) -{ - const uint32_t size_mask = ~ (DEFAULT_PAGE_SIZE - 1); /* pagesize */ - int page_index = (virt & size_mask) / DEFAULT_PAGE_SIZE; /* index into page_descriptor array */ - struct mmu_page_descriptor *page = &pages[page_index]; /* attributes of page to map */ - int i = 0; - - while (page_index * DEFAULT_PAGE_SIZE < virt + size) - { - if (page->locked) - { - dbg("page at %p is already locked. Nothing to do\r\n", virt); - } - else - { - page->locked = 1; - mmu_map_data_page(virt, 0); - i++; - } - virt += DEFAULT_PAGE_SIZE; - } - - dbg("%d pages locked\r\n", i); - - return 1; /* success */ -} - -/* - * the opposite: unlock data page(s) with address space id asid from address virt to virt + size_t - * - * return: 0 if failed (page not found), 1 otherwise - */ -int32_t mmu_unlock_data_page(uint32_t address, uint32_t size, int asid) -{ - int curr_asid; - const uint32_t size_mask = ~ (DEFAULT_PAGE_SIZE - 1); - int page_index = (address & size_mask) / DEFAULT_PAGE_SIZE; /* index into page descriptor array */ - struct mmu_page_descriptor *page = &pages[page_index]; - - curr_asid = set_asid(asid); /* set asid to the one to search for */ - - /* TODO: check for pages[] array bounds */ - - while (page_index * DEFAULT_PAGE_SIZE < address + size) - { - MCF_MMU_MMUAR = address + page->supervisor_protect; - MCF_MMU_MMUOR = MCF_MMU_MMUOR_STLB | /* search TLB */ - MCF_MMU_MMUOR_ADR | - MCF_MMU_MMUOR_RW; - if (MCF_MMU_MMUSR & MCF_MMU_MMUSR_HIT) /* found */ - { -#ifdef DBG_MMU - uint32_t tlb_aa = MCF_MMU_MMUOR >> 16; /* MMU internal allocation address for TLB */ -#endif /* DBG_MMU */ - - MCF_MMU_MMUDR &= ~MCF_MMU_MMUDR_LK; /* clear lock bit */ - MCF_MMU_MMUOR = MCF_MMU_MMUOR_UAA | - MCF_MMU_MMUOR_ACC; /* update TLB */ - - dbg("DTLB %d unlocked\r\n", tlb_aa); - } - else - { - dbg("%p doesn't seem to be locked??\r\n"); - } - page_index++; - } - set_asid(curr_asid); - - return 1; /* success */ -} - -int32_t mmu_report_locked_pages(uint32_t *num_itlb, uint32_t *num_dtlb) -{ - int i; - int li = 0; - int ld = 0; - - /* Coldfire V4e allocation addresses run from 0 to 63 */ - - for (i = 0; i < 31; i++) /* 0-31 = ITLB AA */ - { - MCF_MMU_MMUAR = i; - MCF_MMU_MMUOR = MCF_MMU_MMUOR_STLB | - MCF_MMU_MMUOR_ITLB | - MCF_MMU_MMUOR_RW; /* search ITLB */ - - if (MCF_MMU_MMUTR & MCF_MMU_MMUTR_V) - { - /* entry is valid */ - if (MCF_MMU_MMUDR & MCF_MMU_MMUDR_LK) - { - li++; - } - } - - } - for (i = 32; i < 64; i++) /* 32-63 = DTLB AA */ - { - MCF_MMU_MMUAR = i; - MCF_MMU_MMUOR = MCF_MMU_MMUOR_STLB | - MCF_MMU_MMUOR_RW; /* search ITLB */ - - if (MCF_MMU_MMUTR & MCF_MMU_MMUTR_V) - { - /* entry is valid */ - if (MCF_MMU_MMUDR & MCF_MMU_MMUDR_LK) - { - ld++; - } - } - } - - *num_itlb = li; - *num_dtlb = ld; - - return 1; /* success */ -} - -uint32_t mmu_report_pagesize(void) -{ - return DEFAULT_PAGE_SIZE; -} diff --git a/sys/startcf.S b/sys/startcf.S deleted file mode 100644 index c2eb53f..0000000 --- a/sys/startcf.S +++ /dev/null @@ -1,67 +0,0 @@ - -/* - * This object file must be the first to be linked, - * so it will be placed at the very beginning of the ROM. - */ - - .equ MCF_MMU_MMUCR, __MMUBAR + 0 - - .global _rom_header - .global _rom_entry - - .extern _initialize_hardware - .extern _rt_mbar - -/* ROM header */ -_rom_header: - /* The first long is supposed to be the initial SP. - * We replace it by bra.s to allow running the ROM from the first byte. - * Then we add a fake jmp instruction for pretty disassembly. - */ - bra.s _rom_entry // Short jump to the real entry point - .short 0x4ef9 // Fake jmp instruction - /* The second long is the initial PC */ - .long _rom_entry // Real entry point - -/* ROM entry point */ -_rom_entry: - /* disable interrupts */ - move.w #0x2700,SR - - /* Initialize MBAR */ - move.l #__MBAR,d0 - movec d0,MBAR - move.l d0,_rt_mbar - - /* mmu off */ - move.l #__MMUBAR+1,d0 - movec d0,MMUBAR - - clr.l d0 - move.l d0,MCF_MMU_MMUCR - - /* Initialize RAMBARs: locate SRAM and validate it */ - move.l #__RAMBAR0 + 0x7,d0 /* supervisor only */ - movec d0,RAMBAR0 - move.l #__RAMBAR1 + 0x1,d0 - movec d0,RAMBAR1 - - /* set stack pointer to end of SRAM */ - lea __SUP_SP,a7 - move.l #0,(sp) - - /* - * Initialize the processor caches. - * The instruction cache is fully enabled. - * The data cache is enabled, but cache-inhibited by default. - * Later, the MMU will fully activate the data cache for specific areas. - * It is important to enable both caches now, otherwise cpushl would hang. - */ - - move.l #0xa50c8120,d0 - movec d0,cacr - andi.l #0xfefbfeff,d0 // Clear invalidate bits - move.l d0,_rt_cacr - - /* initialize any hardware specific issues */ - bra _initialize_hardware diff --git a/sys/sysinit.c b/sys/sysinit.c deleted file mode 100644 index d955c73..0000000 --- a/sys/sysinit.c +++ /dev/null @@ -1,1125 +0,0 @@ -/* - * File: sysinit.c - * Purpose: Power-on Reset configuration of the Firebee board. - * - * Notes: - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - * - */ - -#include -#include "MCF5475.h" -#include "startcf.h" -#include "cache.h" -#include "sysinit.h" -#include "pci.h" -#include "bas_printf.h" -#include "bas_string.h" -#include "bas_types.h" -#include "wait.h" -#include "util.h" -#include "version.h" -#if defined(MACHINE_FIREBEE) -#include "firebee.h" -#elif defined(MACHINE_M5484LITE) -#include "m5484l.h" -#elif defined(MACHINE_M54455) -#include "m54455.h" -#else -#error "unknown machine" -#endif /* MACHINE_M5484LITE */ - -# -#include "dma.h" -#include "mod_devicetable.h" -#include "pci_ids.h" -#include "driver_mem.h" -#include "usb.h" -#include "video.h" - -#define UNUSED(x) (void)(x) /* Unused variable */ - -bool fpga_configured = false; /* for FPGA JTAG configuration */ - -extern volatile long _VRAM; /* start address of video ram from linker script */ - -/* - * init SLICE TIMER 0 - * all = 32.538 sec = 30.736mHz - * BYT0 = 127.1ms/tick = 7.876Hz offset 0 - * BYT1 = 496.5us/tick = 2.014kHz offset 1 - * BYT2 = 1.939us/tick = 515.6kHz offset 2 - * BYT3 = 7.576ns/tick = 132.00MHz offset 3 - * count down!!! 132MHz!!! - */ -void init_slt(void) -{ - xprintf("slice timer initialization: "); - MCF_SLT0_STCNT = 0xffffffff; - MCF_SLT0_SCR = MCF_SLT_SCR_TEN | MCF_SLT_SCR_RUN; /* enable and run continuously */ - xprintf("finished\r\n"); -} - -/* - * init GPIO general purpose I/O module - */ -void init_gpio(void) -{ - /* - * pad register P.S.:FBCTL and FBCS set correctly at reset - */ - - /* - * configure all four 547x GPIO module DMA pins: - * - * /DACK1 - DMA acknowledge 1 - * /DACK0 - DMA acknowledge 0 - * /DREQ1 - DMA request 1 - * /DREQ0 - DMA request 0 - * - * for DMA operation - */ - MCF_PAD_PAR_DMA = MCF_PAD_PAR_DMA_PAR_DACK0(0x3) | - MCF_PAD_PAR_DMA_PAR_DACK1(0x3) | - MCF_PAD_PAR_DMA_PAR_DREQ1(0x3) | - MCF_PAD_PAR_DMA_PAR_DREQ0(0x3); - - /* - * configure FEC0 pin assignment on GPIO module as FEC0 - * configure FEC1 pin assignment (PAR_E17, PAR_E1MII) as GPIO, - * /IRQ5 and /IRQ6 from GPIO (needs to be disabled on EPORT module, which also can - * use those INTs). - */ - MCF_PAD_PAR_FECI2CIRQ = MCF_PAD_PAR_FECI2CIRQ_PAR_E07 | - MCF_PAD_PAR_FECI2CIRQ_PAR_E0MII | - MCF_PAD_PAR_FECI2CIRQ_PAR_E0MDIO | - MCF_PAD_PAR_FECI2CIRQ_PAR_E0MDC | - MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDIO_E1MDIO | - MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDC_E1MDC | - MCF_PAD_PAR_FECI2CIRQ_PAR_SDA | - MCF_PAD_PAR_FECI2CIRQ_PAR_SCL | - MCF_PAD_PAR_FECI2CIRQ_PAR_IRQ6 | - MCF_PAD_PAR_FECI2CIRQ_PAR_IRQ5; - - /* - * configure PCI Grant pin assignment on GPIO module: - * - * /PCIBG4 used as FlexBus /TBST - * /PCIBG3 used as general purpose I/O - * /PCIBG2 used as /PCIBG2 - * /PCIBG1 used as /PCIBG1 - * /PCIBG0 used as /PCIBG0 - */ -#if MACHINE_FIREBEE - MCF_PAD_PAR_PCIBG = MCF_PAD_PAR_PCIBG_PAR_PCIBG4_TBST | - MCF_PAD_PAR_PCIBG_PAR_PCIBG3_GPIO | - MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 | - MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 | - MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0; -#elif MACHINE_M5484LITE - MCF_PAD_PAR_PCIBG = MCF_PAD_PAR_PCIBG_PAR_PCIBG4_PCIBG4 | - MCF_PAD_PAR_PCIBG_PAR_PCIBG3_PCIBG3 | - MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 | - MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 | - MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0; -#endif /* MACHINE_FIREBEE */ - - /* - * configure PCI request pin assignment on GPIO module: - * /PCIBR4 as /IRQ4 - * /PCIBR3 as GPIO (PIC) - * /PCIBR2 as /PCIBR2 - * /PCIBR1 as /PCIBR1 - * /PCIBR0 as /PCIBR0 - */ -#if defined(MACHINE_FIREBEE) - MCF_PAD_PAR_PCIBR = MCF_PAD_PAR_PCIBR_PAR_PCIBR4_IRQ4 | - MCF_PAD_PAR_PCIBR_PAR_PCIBR3_GPIO | - MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 | - MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 | - MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0; -#elif defined(MACHINE_M5484LITE) - MCF_PAD_PAR_PCIBR = MCF_PAD_PAR_PCIBR_PAR_PCIBR4_PCIBR4 | - MCF_PAD_PAR_PCIBR_PAR_PCIBR3_PCIBR3 | - MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 | - MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 | - MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0; -#endif /* MACHINE_FIREBEE */ - - /* - * configure PSC3 pin assignment on GPIO module: - * /PSC3CTS as /PSC3PTS - * /PSC3RTS as /PSC3RTS - * PSC3RXD as PSC3RXD - * PSC3TXD as PSC3TXD - */ - - MCF_PAD_PAR_PSC3 = MCF_PAD_PAR_PSC3_PAR_TXD3 | MCF_PAD_PAR_PSC3_PAR_RXD3; - - /* - * Configure PSC1 pin assignment on GPIO module: - * - all pins configured for serial interface operation - */ - - MCF_PAD_PAR_PSC1 = MCF_PAD_PAR_PSC1_PAR_CTS1_CTS | - MCF_PAD_PAR_PSC1_PAR_RTS1_RTS | - MCF_PAD_PAR_PSC1_PAR_RXD1 | - MCF_PAD_PAR_PSC1_PAR_TXD1; - - /* - * Configure PSC0 Pin Assignment on GPIO module: - * - all pins configured for serial interface operation - */ - - MCF_PAD_PAR_PSC0 = MCF_PAD_PAR_PSC0_PAR_CTS0_CTS | - MCF_PAD_PAR_PSC0_PAR_RTS0_RTS | - MCF_PAD_PAR_PSC0_PAR_RXD0 | - MCF_PAD_PAR_PSC0_PAR_TXD0; - - /* - * Configure all DSPI pins on the GPIO module for there primary function - */ - MCF_PAD_PAR_DSPI = MCF_PAD_PAR_DSPI_PAR_SOUT(MCF_PAD_PAR_DSPI_PAR_SOUT_SOUT) | - MCF_PAD_PAR_DSPI_PAR_SIN(MCF_PAD_PAR_DSPI_PAR_SIN_SIN) | - MCF_PAD_PAR_DSPI_PAR_SCK(MCF_PAD_PAR_DSPI_PAR_SCK_SCK) | - MCF_PAD_PAR_DSPI_PAR_CS0(MCF_PAD_PAR_DSPI_PAR_CS0_DSPICS0) | - MCF_PAD_PAR_DSPI_PAR_CS2(MCF_PAD_PAR_DSPI_PAR_CS2_DSPICS2) | - MCF_PAD_PAR_DSPI_PAR_CS3(MCF_PAD_PAR_DSPI_PAR_CS3_DSPICS3) | - MCF_PAD_PAR_DSPI_PAR_CS5; - - MCF_PAD_PAR_TIMER = MCF_PAD_PAR_TIMER_PAR_TIN3(MCF_PAD_PAR_TIMER_PAR_TIN3_IRQ3) | - MCF_PAD_PAR_TIMER_PAR_TOUT3 | - MCF_PAD_PAR_TIMER_PAR_TIN2(MCF_PAD_PAR_TIMER_PAR_TIN2_IRQ2) | - MCF_PAD_PAR_TIMER_PAR_TOUT2; -} - -/* - * init serial - */ -void init_serial(void) -{ - /* PSC0: SER1 */ - MCF_PSC0_PSCSICR = 0; /* PSC control register: select UART mode */ - MCF_PSC0_PSCCSR = 0xDD; /* use TX and RX baud rate from PSC timer */ - MCF_PSC0_PSCCTUR = 0x00; /* =\ */ -#ifdef MACHINE_FIREBEE - MCF_PSC0_PSCCTLR = 36; /* divide sys_clk by 36 => BAUD RATE = 115200 bps */ -#endif -#ifdef MACHINE_M5484LITE - MCF_PSC0_PSCCTLR = 27; /* LITE board has 100 MHz sys_clk only */ -#endif - MCF_PSC0_PSCCR = 0x20; /* reset receiver and RxFIFO */ - MCF_PSC0_PSCCR = 0x30; /* reset transmitter and TxFIFO */ - MCF_PSC0_PSCCR = 0x40; /* reset all error status */ - MCF_PSC0_PSCCR = 0x50; /* reset break change interrupt */ - MCF_PSC0_PSCCR = 0x10; /* reset MR pointer */ - MCF_PSC0_PSCIMR = 0x8700; /* enable input port change interrupt, enable delta break interrupt, */ - /* enable receiver interrupt/request, enable transceiver interrupt/request */ - - MCF_PSC0_PSCACR = 0x03; /* enable state change of CTS */ - MCF_PSC0_PSCMR1 = 0xb3; /* 8 bit, no parity */ - MCF_PSC0_PSCMR2 = 0x07; /* 1 stop bit */ - MCF_PSC0_PSCRFCR = 0x0F; - MCF_PSC0_PSCTFCR = 0x0F; - MCF_PSC0_PSCRFAR = 0x00F0; - MCF_PSC0_PSCTFAR = 0x00F0; - MCF_PSC0_PSCOPSET = 0x01; - MCF_PSC0_PSCCR = 0x05; - -#ifdef MACHINE_FIREBEE /* PSC3 is not connected to anything on the LITE board */ - /* PSC3: PIC */ - MCF_PSC3_PSCSICR = 0; // UART - MCF_PSC3_PSCCSR = 0xDD; - MCF_PSC3_PSCCTUR = 0x00; - MCF_PSC3_PSCCTLR = 36; // BAUD RATE = 115200 - MCF_PSC3_PSCCR = 0x20; - MCF_PSC3_PSCCR = 0x30; - MCF_PSC3_PSCCR = 0x40; - MCF_PSC3_PSCCR = 0x50; - MCF_PSC3_PSCCR = 0x10; - MCF_PSC3_PSCIMR = 0x0200; // receiver interrupt enable - MCF_PSC3_PSCACR = 0x03; - MCF_PSC3_PSCMR1 = 0xb3; - MCF_PSC3_PSCMR2 = 0x07; - MCF_PSC3_PSCRFCR = 0x0F; - MCF_PSC3_PSCTFCR = 0x0F; - MCF_PSC3_PSCRFAR = 0x00F0; - MCF_PSC3_PSCTFAR = 0x00F0; - MCF_PSC3_PSCOPSET = 0x01; - MCF_PSC3_PSCCR = 0x05; -#endif /* MACHINE_FIREBEE */ - - MCF_INTC_ICR32 = MCF_INTC_ICR_IL(7) | - MCF_INTC_ICR_IL(4); /* PSC3 interrupt vector. Do we need it? */ - - xprintf("\r\nserial interfaces initialization: finished\r\n"); -} - -/********************************************************************/ -/* Initialize DDR DIMMs on the EVB board */ -/********************************************************************/ -bool init_ddram(void) -{ - xprintf("SDRAM controller initialization: "); - - /* - * Check to see if the SDRAM has already been initialized - * by a run control tool - */ - if (!(MCF_SDRAMC_SDCR & MCF_SDRAMC_SDCR_REF)) { - /* Basic configuration and initialization */ - - /* - * SB_E (Bits 9-8): 10 <=> 7.6 mA (SDCKE) - * SB_C (Bits 7-6): 10 <=> 7.6 mA (SDRAM Clocks) - * SB_A (Bits 5-4): 10 <=> 7.6 mA (RAS, CAS, SDWE, SDADDR[12:0], and SDBA) - * SB_S (Bits 3-2): 10 <=> 7.6 mA (SDRDQS) - * SB_D (Bits 1-0): 10 <=> 7.6 mA (SDRDQS) - * - * -> lowest setting the Coldfire SDRAM controller allows - */ - MCF_SDRAMC_SDRAMDS = 0x000002AA;/* SDRAMDS configuration */ - -#if MACHINE_FIREBEE - MCF_SDRAMC_CS0CFG = 0x0000001A; /* SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF) */ - MCF_SDRAMC_CS1CFG = 0x0800001A; /* SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF) */ - MCF_SDRAMC_CS2CFG = 0x1000001A; /* SDRAM CS2 configuration (128Mbytes 1000_0000 - 07FF_FFFF) */ - MCF_SDRAMC_CS3CFG = 0x1800001A; /* SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF) */ - - /* - * - */ - MCF_SDRAMC_SDCFG1 = MCF_SDRAMC_SDCFG1_WTLAT(3) /* Write latency */ - | MCF_SDRAMC_SDCFG1_REF2ACT(8) /* Refresh to Active Delay */ - | MCF_SDRAMC_SDCFG1_PRE2ACT(2) /* Precharge to Active Delay */ - | MCF_SDRAMC_SDCFG1_ACT2RW(2) /* Active to Read/Write Delay */ - | MCF_SDRAMC_SDCFG1_RDLAT(6) /* Read CAS latency */ - | MCF_SDRAMC_SDCFG1_SWT2RD(3) /* Single Write to Read/Write/Precharge delay */ - | MCF_SDRAMC_SDCFG1_SRD2RW(7); /* Single Read to Read/Write/Precharge delay */ - - MCF_SDRAMC_SDCFG2 = MCF_SDRAMC_SDCFG2_BL(7) /* Burst Length */ - | MCF_SDRAMC_SDCFG2_BRD2WT(7) /* Burst Read to Write delay */ - | MCF_SDRAMC_SDCFG2_BWT2RW(6) /* Burst Write to Read/Write/Precharge delay */ - | MCF_SDRAMC_SDCFG2_BRD2PRE(4); /* Burst Read to Read/Precharge delay */ - - - MCF_SDRAMC_SDCR = MCF_SDRAMC_SDCR_IPALL /* initiate Precharge All command */ - | MCF_SDRAMC_SDCR_RCNT(13) /* Refresh Count (= (x + 1) * 64 */ - | MCF_SDRAMC_SDCR_MUX(1) /* Muxing control */ - | MCF_SDRAMC_SDCR_DDR - | MCF_SDRAMC_SDCR_CKE - | MCF_SDRAMC_SDCR_MODE_EN; - - MCF_SDRAMC_SDMR = MCF_SDRAMC_SDMR_CMD /* Generate an LMR/LEMR command */ - | MCF_SDRAMC_SDMR_AD(0) /* Address */ - | MCF_SDRAMC_SDMR_BNKAD(1); /* LEMR */ - MCF_SDRAMC_SDMR = MCF_SDRAMC_SDMR_CMD /* Generate an LMR/LEMR command */ - | MCF_SDRAMC_SDMR_AD(0x123) - | MCF_SDRAMC_SDMR_BNKAD(0); /* LMR */ - - MCF_SDRAMC_SDCR = 0xE10D0002; /* SDCR + IPALL */ - MCF_SDRAMC_SDCR = 0xE10D0004; /* SDCR + IREF (first refresh) */ - MCF_SDRAMC_SDCR = 0xE10D0004; /* SDCR + IREF (second refresh) */ - MCF_SDRAMC_SDMR = 0x008D0000; /* SDMR (write to LMR) */ - MCF_SDRAMC_SDCR = 0x710D0F00; /* SDCR (lock SDMR and enable refresh) */ - -#elif MACHINE_M5484LITE - MCF_SDRAMC_CS0CFG = 0x00000019; /* SDRAM CS0 configuration (64 Mbytes 0000_0000 - 03FF_FFFF) */ - MCF_SDRAMC_CS1CFG = 0x00000000; /* SDRAM CS1 configuration - off */ - MCF_SDRAMC_CS2CFG = 0x00000000; /* SDRAM CS2 configuration - off */ - MCF_SDRAMC_CS3CFG = 0x00000000; /* SDRAM CS3 configuration - off */ - - - /* - * - */ - MCF_SDRAMC_SDCFG1 = MCF_SDRAMC_SDCFG1_WTLAT(3) /* Write latency */ - | MCF_SDRAMC_SDCFG1_REF2ACT(8) /* Refresh to Active Delay */ - | MCF_SDRAMC_SDCFG1_PRE2ACT(2) /* Precharge to Active Delay */ - | MCF_SDRAMC_SDCFG1_ACT2RW(2) /* Active to Read/Write Delay */ - | MCF_SDRAMC_SDCFG1_RDLAT(6) /* Read CAS latency */ - | MCF_SDRAMC_SDCFG1_SWT2RD(3) /* Single Write to Read/Write/Precharge delay */ - | MCF_SDRAMC_SDCFG1_SRD2RW(7); /* Single Read to Read/Write/Precharge delay */ - - MCF_SDRAMC_SDCFG2 = MCF_SDRAMC_SDCFG2_BL(7) /* Burst Length */ - | MCF_SDRAMC_SDCFG2_BRD2WT(7) /* Burst Read to Write delay */ - | MCF_SDRAMC_SDCFG2_BWT2RW(6) /* Burst Write to Read/Write/Precharge delay */ - | MCF_SDRAMC_SDCFG2_BRD2PRE(4); /* Burst Read to Read/Precharge delay */ - - - MCF_SDRAMC_SDCR = MCF_SDRAMC_SDCR_IPALL /* initiate Precharge All command */ - | MCF_SDRAMC_SDCR_RCNT(13) /* Refresh Count (= (x + 1) * 64 */ - | MCF_SDRAMC_SDCR_MUX(1) /* Muxing control */ - | MCF_SDRAMC_SDCR_DDR - | MCF_SDRAMC_SDCR_CKE - | MCF_SDRAMC_SDCR_MODE_EN; - - MCF_SDRAMC_SDMR = MCF_SDRAMC_SDMR_CMD /* Generate an LMR/LEMR command */ - | MCF_SDRAMC_SDMR_AD(0) /* Address */ - | MCF_SDRAMC_SDMR_BNKAD(1); /* LEMR */ - MCF_SDRAMC_SDMR = MCF_SDRAMC_SDMR_CMD /* Generate an LMR/LEMR command */ - | MCF_SDRAMC_SDMR_AD(0x123) - | MCF_SDRAMC_SDMR_BNKAD(0); /* LMR */ - - MCF_SDRAMC_SDCR = 0xE10D0002; /* SDCR + IPALL */ - MCF_SDRAMC_SDCR = 0xE10D0004; /* SDCR + IREF (first refresh) */ - MCF_SDRAMC_SDCR = 0xE10D0004; /* SDCR + IREF (second refresh) */ - MCF_SDRAMC_SDMR = 0x008D0000; /* SDMR (write to LMR) */ - MCF_SDRAMC_SDCR = 0x710D0F00; /* SDCR (lock SDMR and enable refresh) */ - -#endif /* MACHINE_FIREBEE */ - - xprintf("finished\r\n"); - - return true; - } - else - { - xprintf("skipped. Already initialized (running from RAM)\r\n"); - } - return false; -} - -/* - * initialize FlexBus chip select registers - */ -void init_fbcs() -{ - xprintf("FlexBus chip select registers initialization: "); - - /* Flash */ - MCF_FBCS0_CSAR = BOOTFLASH_BASE_ADDRESS; /* flash base address */ - MCF_FBCS0_CSCR = MCF_FBCS_CSCR_PS_16 | /* 16 bit word access */ - MCF_FBCS_CSCR_WS(6)| /* 6 Waitstates */ - MCF_FBCS_CSCR_AA | - MCF_FBCS_CSCR_ASET(1) | - MCF_FBCS_CSCR_RDAH(1); /* chip errata SECF077 */ - MCF_FBCS0_CSMR = BOOTFLASH_BAM | - MCF_FBCS_CSMR_V; /* enable */ - - -#if MACHINE_FIREBEE /* FBC setup for FireBee */ - MCF_FBCS1_CSAR = 0xFFF00000; /* ATARI I/O ADRESS */ - MCF_FBCS1_CSCR = MCF_FBCS_CSCR_PS_16 /* 16BIT PORT */ - | MCF_FBCS_CSCR_WS(8) /* DEFAULT 8WS */ - | MCF_FBCS_CSCR_AA; /* AA */ - MCF_FBCS1_CSMR = MCF_FBCS_CSMR_BAM_1M | MCF_FBCS_CSMR_V; - - MCF_FBCS2_CSAR = 0xF0000000; /* Firebee new I/O address range */ - MCF_FBCS2_CSCR = MCF_FBCS_CSCR_PS_32 /* 32BIT PORT */ - | MCF_FBCS_CSCR_WS(8) /* DEFAULT 4WS */ - | MCF_FBCS_CSCR_AA; /* AA */ - MCF_FBCS2_CSMR = (MCF_FBCS_CSMR_BAM_128M /* F000'0000-F7FF'FFFF */ - | MCF_FBCS_CSMR_V); - - MCF_FBCS3_CSAR = 0xF8000000; /* Firebee new I/O address range */ - MCF_FBCS3_CSCR = MCF_FBCS_CSCR_PS_16 /* 16BIT PORT */ - | MCF_FBCS_CSCR_AA; // AA - MCF_FBCS3_CSMR = (MCF_FBCS_CSMR_BAM_64M /* F800'0000-FBFF'FFFF */ - | MCF_FBCS_CSMR_V); - - MCF_FBCS4_CSAR = 0x40000000; /* video ram area, FB_CS3 not used, decoded on FPGA */ - MCF_FBCS4_CSCR = MCF_FBCS_CSCR_PS_32 /* 32BIT PORT */ - | MCF_FBCS_CSCR_BSTR /* burst read enable */ - | MCF_FBCS_CSCR_BSTW; /* burst write enable */ - MCF_FBCS4_CSMR = MCF_FBCS_CSMR_BAM_1G /* 4000'0000-7FFF'FFFF */ - | MCF_FBCS_CSMR_V; -#elif MACHINE_M5484LITE - /* disable other FBCS for now */ - MCF_FBCS1_CSMR = 0; - MCF_FBCS2_CSMR = 0; - MCF_FBCS3_CSMR = 0; - MCF_FBCS4_CSMR = 0; - - MCF_FBCS5_CSAR = MCF_FBCS_CSAR_BA(0x60000000); - MCF_FBCS5_CSCR = MCF_FBCS_CSCR_PS_16 /* CPLD access */ - | MCF_FBCS_CSCR_WS(32) - | MCF_FBCS_CSCR_ASET(1) - | MCF_FBCS_CSCR_AA; - MCF_FBCS5_CSMR = MCF_FBCS_CSMR_BAM_256M - | MCF_FBCS_CSMR_V; -#endif /* MACHINE_FIREBEE */ - - -#ifndef MACHINE_M5484LITE - MCF_FBCS5_CSAR = 0x0; - MCF_FBCS5_CSCR = MCF_FBCS_CSCR_PS_8 - | MCF_FBCS_CSCR_BSTR - | MCF_FBCS_CSCR_BSTW - | MCF_FBCS_CSCR_RDAH(1); /* chip errata SECF077 */ - MCF_FBCS5_CSMR = MCF_FBCS_CSMR_BAM_1G; - //| MCF_FBCS_CSMR_V; -#endif /* MACHINE_M5484LITE */ - - xprintf("finished\r\n"); -} - -void wait_pll(void) -{ - int32_t trgt = MCF_SLT0_SCNT - 100000; - do - { - ; - } while ((* (volatile int16_t *) 0xf0000800 < 0) && MCF_SLT0_SCNT > trgt); -} - -static volatile uint8_t *pll_base = (volatile uint8_t *) 0xf0000600; - -void init_pll(void) -{ - xprintf("FPGA PLL initialization: "); - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x48) = 27; /* loopfilter r */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x08) = 1; /* charge pump 1 */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x00) = 12; /* N counter high = 12 */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x40) = 12; /* N counter low = 12 */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x114) = 1; /* ck1 bypass */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x118) = 1; /* ck2 bypass */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x11c) = 1; /* ck3 bypass */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x10) = 1; /* ck0 high = 1 */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x50) = 1; /* ck0 low = 1 */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x144) = 1; /* M odd division */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x44) = 1; /* M low = 1 */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x04) = 145; /* M high = 145 = 146 MHz */ - - wait_pll(); - - * (volatile uint8_t *) 0xf0000800 = 0; /* set */ - - xprintf("finished\r\n"); -} - - - -/* - * INIT VIDEO DDR RAM - */ - -void init_video_ddr(void) { - xprintf("init video RAM: "); - - * (volatile uint16_t *) 0xf0000400 = 0xb; /* set cke = 1, cs=1, config = 1 */ - NOP(); - - _VRAM = 0x00050400; /* IPALL */ - NOP(); - - _VRAM = 0x00072000; /* load EMR pll on */ - NOP(); - - _VRAM = 0x00070122; /* load MR: reset pll, cl=2, burst=4lw */ - NOP(); - - _VRAM = 0x00050400; /* IPALL */ - NOP(); - - _VRAM = 0x00060000; /* auto refresh */ - NOP(); - - _VRAM = 0x00060000; /* auto refresh */ - NOP(); - - /* FIXME: what's this? */ - _VRAM = 0000070022; /* load MR dll on */ - NOP(); - - * (uint32_t *) 0xf0000400 = 0x01070002; /* fifo on, refresh on, ddrcs und cke on, video dac on */ - - xprintf("finished\r\n"); -} - - -/* - * probe for NEC compatible USB host controller and install if found - */ -void init_usb(void) -{ - extern struct pci_device_id ohci_usb_pci_table[]; - extern struct pci_device_id ehci_usb_pci_table[]; - struct pci_device_id *board; - int32_t handle; - int usb_found = 0; - int index = 0; - - xprintf("USB controller initialization:\r\n"); - - do - { - handle = pci_find_device(0x0000, 0xffff, index++); - if (handle > 0) - { - uint32_t id = 0; - uint32_t class = 0; - - id = pci_read_config_longword(handle, PCIIDR); - class = pci_read_config_longword(handle, PCIREV); - - if (PCI_CLASS_CODE(class) == PCI_CLASS_SERIAL_USB) - { - xprintf("serial USB found at bus=0x%x, dev=0x%x, fnc=0x%x (0x%x)\r\n", - PCI_BUS_FROM_HANDLE(handle), - PCI_DEVICE_FROM_HANDLE(handle), - PCI_FUNCTION_FROM_HANDLE(handle), - handle); - if (PCI_SUBCLASS(class) == PCI_CLASS_SERIAL_USB_EHCI) - { - board = ehci_usb_pci_table; - while (board->vendor) - { - if ((board->vendor == PCI_VENDOR_ID(id)) && board->device == PCI_DEVICE_ID(id)) - { - if (usb_init(handle, board) >= 0) - { - usb_found++; - } - } - board++; - } - } - if (PCI_SUBCLASS(class) == PCI_CLASS_SERIAL_USB_OHCI) - { - board = ohci_usb_pci_table; - while (board->vendor) - { - if ((board->vendor == PCI_VENDOR_ID(id)) && board->device == PCI_DEVICE_ID(id)) - { - if (usb_init(handle, board) >= 0) - usb_found++; - } - board++; - } - } - } - } - } while (handle >= 0); - - xprintf("finished (found %d USB controller(s))\r\n", usb_found); -} - -static bool i2c_transfer_finished(void) -{ - if (MCF_I2C_I2SR & MCF_I2C_I2SR_IIF) - return true; - - return false; -} - -static void wait_i2c_transfer_finished(void) -{ - waitfor(1000, i2c_transfer_finished); /* wait until interrupt bit has been set */ - MCF_I2C_I2SR &= ~MCF_I2C_I2SR_IIF; /* clear interrupt bit (byte transfer finished */ -} - -static bool i2c_bus_free(void) -{ - return (MCF_I2C_I2SR & MCF_I2C_I2SR_IBB); -} - -/* - * TFP410 (DVI) on - */ -void dvi_on(void) -{ - uint8_t receivedByte; - uint8_t dummyByte; /* only used for a dummy read */ - int num_tries = 0; - - xprintf("DVI digital video output initialization: "); - - MCF_I2C_I2FDR = 0x3c; /* divide system clock by 1280: 100kHz standard */ - - do - { - /* disable all i2c interrupt routing targets */ - MCF_I2C_I2ICR = 0x0; // ~(MCF_I2C_I2ICR_IE | MCF_I2C_I2ICR_RE | MCF_I2C_I2ICR_TE | MCF_I2C_I2ICR_BNBE); - - /* disable i2c, disable i2c interrupts, slave, receive, i2c = acknowledge, no repeat start */ - MCF_I2C_I2CR = 0x0; - - /* repeat start, transmit acknowledge */ - MCF_I2C_I2CR = MCF_I2C_I2CR_RSTA | MCF_I2C_I2CR_TXAK; - - receivedByte = MCF_I2C_I2DR; /* read a byte */ - MCF_I2C_I2SR = 0x0; /* clear status register */ - MCF_I2C_I2CR = 0x0; /* clear control register */ - - MCF_I2C_I2ICR = MCF_I2C_I2ICR_IE; /* route i2c interrupts to cpu */ - - /* i2c enable, master mode, transmit acknowledge */ - MCF_I2C_I2CR = MCF_I2C_I2CR_IEN | MCF_I2C_I2CR_MSTA | MCF_I2C_I2CR_MTX; - - MCF_I2C_I2DR = 0x7a; /* send data: address of TFP410 */ - wait_i2c_transfer_finished(); - - if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) /* next try if no acknowledge */ - goto try_again; - - MCF_I2C_I2DR = 0x00; /* send data: SUB ADRESS 0 */ - wait_i2c_transfer_finished(); - - MCF_I2C_I2CR |= MCF_I2C_I2CR_RSTA; /* repeat start */ - MCF_I2C_I2DR = 0x7b; /* begin read */ - - wait_i2c_transfer_finished(); - if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) /* next try if no acknowledge */ - goto try_again; - -#ifdef _NOT_USED_ - MCH_I2C_I2CR &= ~MCF_I2C_I2CR_MTX; /* FIXME: not clear where this came from ... */ -#endif /* _NOT_USED_ */ - MCF_I2C_I2CR &= 0xef; /* ... this actually disables the I2C module... */ - dummyByte = MCF_I2C_I2DR; /* dummy read */ - - wait_i2c_transfer_finished(); - - MCF_I2C_I2CR |= MCF_I2C_I2CR_TXAK; /* transmit acknowledge enable */ - receivedByte = MCF_I2C_I2DR; /* read a byte */ - - wait_i2c_transfer_finished(); - - MCF_I2C_I2CR = MCF_I2C_I2CR_IEN; /* stop */ - - dummyByte = MCF_I2C_I2DR; // dummy read - - if (receivedByte != 0x4c) - goto try_again; - - MCF_I2C_I2CR = 0x0; // stop - MCF_I2C_I2SR = 0x0; // clear sr - - waitfor(10000, i2c_bus_free); - - MCF_I2C_I2CR = 0xb0; // on tx master - MCF_I2C_I2DR = 0x7A; - - wait_i2c_transfer_finished(); - - if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) - goto try_again; - - MCF_I2C_I2DR = 0x08; // SUB ADRESS 8 - - wait_i2c_transfer_finished(); - - MCF_I2C_I2DR = 0xbf; // ctl1: power on, T:M:D:S: enable - - wait_i2c_transfer_finished(); - - MCF_I2C_I2CR = 0x80; // stop - dummyByte = MCF_I2C_I2DR; // dummy read - MCF_I2C_I2SR = 0x0; // clear sr - - waitfor(10000, i2c_bus_free); - - MCF_I2C_I2CR = 0xb0; - MCF_I2C_I2DR = 0x7A; - - wait_i2c_transfer_finished(); - - if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) - goto try_again; - - MCF_I2C_I2DR = 0x08; // SUB ADRESS 8 - - wait_i2c_transfer_finished(); - - MCF_I2C_I2CR |= 0x4; // repeat start - MCF_I2C_I2DR = 0x7b; // beginn read - - wait_i2c_transfer_finished(); - - if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK) - goto try_again; - - MCF_I2C_I2CR &= 0xef; // switch to rx - dummyByte = MCF_I2C_I2DR; // dummy read - - wait_i2c_transfer_finished(); - MCF_I2C_I2CR |= 0x08; // txak=1 - - wait(50); - - receivedByte = MCF_I2C_I2DR; - - wait_i2c_transfer_finished(); - - MCF_I2C_I2CR = 0x80; // stop - - dummyByte = MCF_I2C_I2DR; // dummy read - -try_again: - num_tries++; - } while ((receivedByte != 0xbf) && (num_tries < 10)); - - if (num_tries >= 10) - { - xprintf("FAILED!\r\n"); - } - else - { - xprintf("finished\r\n"); - } - UNUSED(dummyByte); - // Avoid warning -} - - -/* - * AC97 - */ -void init_ac97(void) -{ - // PSC2: AC97 ---------- - int i; - int zm; - int va; - int vb; - int vc; - - xprintf("AC97 sound chip initialization: "); - MCF_PAD_PAR_PSC2 = MCF_PAD_PAR_PSC2_PAR_RTS2_RTS // PSC2=TX,RX BCLK,CTS->AC'97 - | MCF_PAD_PAR_PSC2_PAR_CTS2_BCLK - | MCF_PAD_PAR_PSC2_PAR_TXD2 - | MCF_PAD_PAR_PSC2_PAR_RXD2; - MCF_PSC2_PSCMR1 = 0x0; - MCF_PSC2_PSCMR2 = 0x0; - MCF_PSC2_PSCIMR = 0x0300; - MCF_PSC2_PSCSICR = 0x03; //AC97 - MCF_PSC2_PSCRFCR = 0x0f000000; - MCF_PSC2_PSCTFCR = 0x0f000000; - MCF_PSC2_PSCRFAR = 0x00F0; - MCF_PSC2_PSCTFAR = 0x00F0; - - for (zm = 0; zm < 100000; zm++) // wiederholen bis synchron - { - MCF_PSC2_PSCCR = 0x20; - MCF_PSC2_PSCCR = 0x30; - MCF_PSC2_PSCCR = 0x40; - MCF_PSC2_PSCCR = 0x05; - - // MASTER VOLUME -0dB - MCF_PSC2_PSCTB_AC97 = 0xE0000000; //START SLOT1 + SLOT2, FIRST FRAME - MCF_PSC2_PSCTB_AC97 = 0x02000000; //SLOT1:WR REG MASTER VOLUME adr 0x02 - - for (i = 2; i < 13; i++) - { - MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0 - } - - // read register - MCF_PSC2_PSCTB_AC97 = 0xc0000000; //START SLOT1 + SLOT2, FIRST FRAME - MCF_PSC2_PSCTB_AC97 = 0x82000000; //SLOT1:master volume - - for (i = 2; i < 13; i++) - { - MCF_PSC2_PSCTB_AC97 = 0x00000000; //SLOT2-12:RD REG ALLES 0 - } - wait(50); - - va = MCF_PSC2_PSCTB_AC97; - if ((va & 0x80000fff) == 0x80000800) { - vb = MCF_PSC2_PSCTB_AC97; - vc = MCF_PSC2_PSCTB_AC97; - - /* FIXME: that looks more than suspicious (Fredi?) */ - /* fixed with parentheses to avoid compiler warnings, but this looks still more than wrong to me */ - if (((va & 0xE0000fff) == 0xE0000800) & (vb == 0x02000000) & (vc == 0x00000000)) { - goto livo; - } - } - } - xprintf(" NOT"); -livo: - // AUX VOLUME ->-0dB - MCF_PSC2_PSCTB_AC97 = 0xE0000000; //START SLOT1 + SLOT2, FIRST FRAME - MCF_PSC2_PSCTB_AC97 = 0x16000000; //SLOT1:WR REG AUX VOLUME adr 0x16 - MCF_PSC2_PSCTB_AC97 = 0x06060000; //SLOT1:VOLUME - for (i = 3; i < 13; i++) { - MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0 - } - - // line in VOLUME +12dB - MCF_PSC2_PSCTB_AC97 = 0xE0000000; //START SLOT1 + SLOT2, FIRST FRAME - MCF_PSC2_PSCTB_AC97 = 0x10000000; //SLOT1:WR REG MASTER VOLUME adr 0x02 - for (i = 2; i < 13; i++) { - MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0 - } - // cd in VOLUME 0dB - MCF_PSC2_PSCTB_AC97 = 0xE0000000; //START SLOT1 + SLOT2, FIRST FRAME - MCF_PSC2_PSCTB_AC97 = 0x12000000; //SLOT1:WR REG MASTER VOLUME adr 0x02 - for (i = 2; i < 13; i++) { - MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0 - } - // mono out VOLUME 0dB - MCF_PSC2_PSCTB_AC97 = 0xE0000000; //START SLOT1 + SLOT2, FIRST FRAME - MCF_PSC2_PSCTB_AC97 = 0x06000000; //SLOT1:WR REG MASTER VOLUME adr 0x02 - MCF_PSC2_PSCTB_AC97 = 0x00000000; //SLOT1:WR REG MASTER VOLUME adr 0x02 - for (i = 3; i < 13; i++) { - MCF_PSC2_PSCTB_AC97 = 0x0; //SLOT2-12:WR REG ALLES 0 - } - MCF_PSC2_PSCTFCR |= MCF_PSC_PSCTFCR_WFR; //set EOF - MCF_PSC2_PSCTB_AC97 = 0x00000000; //last data - xprintf(" finished\r\n"); -} - -/* Symbols from the linker script */ - -extern uint8_t _STRAM_END[]; -#define STRAM_END ((uint32_t)_STRAM_END) - -extern uint8_t _FIRETOS[]; -#define FIRETOS ((uint32_t)_FIRETOS) /* where FireTOS is stored in flash */ - -extern uint8_t _BAS_LMA[]; -#define BAS_LMA (&_BAS_LMA[0]) /* where the BaS is stored in flash */ - -extern uint8_t _BAS_IN_RAM[]; -#define BAS_IN_RAM (&_BAS_IN_RAM[0]) /* where the BaS is run in RAM */ - -extern uint8_t _BAS_SIZE[]; -#define BAS_SIZE ((uint32_t)_BAS_SIZE) /* size of the BaS, in bytes */ - -extern uint8_t _FASTRAM_END[]; -#define FASTRAM_END ((uint32_t)_FASTRAM_END) - -extern uint8_t _BAS_RESIDENT_TEXT[]; -#define BAS_RESIDENT_TEXT ((uint32_t) _BAS_RESIDENT_TEXT) - -extern uint8_t _BAS_RESIDENT_TEXT_SIZE[]; -#define BAS_RESIDENT_TEXT_SIZE ((uint32_t) _BAS_RESIDENT_TEXT_SIZE) - -void clear_bss_segment(void) -{ - extern uint8_t _BAS_BSS_START[]; - uint8_t * BAS_BSS_START = &_BAS_BSS_START[0]; - extern uint8_t _BAS_BSS_END[]; - uint8_t *BAS_BSS_END = &_BAS_BSS_END[0]; - - bzero(BAS_BSS_START, BAS_BSS_END - BAS_BSS_START - 1); -} - -void initialize_hardware(void) -{ - bool coldboot = true; - - /* Test for FireTOS switch: DIP switch #5 up */ -#ifdef MACHINE_FIREBEE - if (!(DIP_SWITCH & (1 << 6))) { - /* Minimal hardware initialization */ - init_gpio(); - init_serial(); - init_slt(); - init_fbcs(); - init_ddram(); - init_fpga(); - - /* Validate ST RAM */ - * (volatile uint32_t *) 0x42e = STRAM_END; /* phystop TOS system variable */ - * (volatile uint32_t *) 0x420 = 0x752019f3; /* memvalid TOS system variable */ - * (volatile uint32_t *) 0x43a = 0x237698aa; /* memval2 TOS system variable */ - * (volatile uint32_t *) 0x51a = 0x5555aaaa; /* memval3 TOS system variable */ - - /* TT-RAM */ - - * (uint32_t *) 0x5a4 = FASTRAM_END; /* ramtop TOS system variable */ - * (uint32_t *) 0x5a8 = 0x1357bd13; /* ramvalid TOS system variable */ - - /* Jump into FireTOS */ - typedef void void_func(void); - void_func* FireTOS = (void_func*) FIRETOS; - FireTOS(); // Should never return - return; - } -#endif /* MACHINE_FIREBEE */ - init_gpio(); - init_serial(); - - xprintf("\n\n"); - xprintf("%s BASIS system (BaS) v %d.%d (%s, %s)\r\n\r\n", -#if MACHINE_FIREBEE - "Firebee" -#elif MACHINE_M5484LITE - "m5484 LITEKIT" -#else - "unknown platform" -#endif - , MAJOR_VERSION, MINOR_VERSION, __DATE__, __TIME__); - - /* - * Determine cause(s) of Reset - */ - if (MCF_SIU_RSR & MCF_SIU_RSR_RST) - xprintf("Reset. Cause: External Reset\r\n"); - if (MCF_SIU_RSR & MCF_SIU_RSR_RSTWD) - xprintf("Reset. Cause: Watchdog Timer Reset\n"); - if (MCF_SIU_RSR & MCF_SIU_RSR_RSTJTG) - xprintf("Reset. Cause: BDM/JTAG Reset\r\n"); - - /* - * Clear the Reset Status Register - */ - MCF_SIU_RSR = (MCF_SIU_RSR_RST - | MCF_SIU_RSR_RSTWD - | MCF_SIU_RSR_RSTJTG); - - /* - * Determine which processor we are running on - */ - xprintf("JTAGID: "); - switch (MCF_SIU_JTAGID & MCF_SIU_JTAGID_PROCESSOR) - { - case MCF_SIU_JTAGID_MCF5485: - xprintf("MCF5485"); - break; - case MCF_SIU_JTAGID_MCF5484: - xprintf("MCF5484"); - break; - case MCF_SIU_JTAGID_MCF5483: - xprintf("MCF5483"); - break; - case MCF_SIU_JTAGID_MCF5482: - xprintf("MCF5482"); - break; - case MCF_SIU_JTAGID_MCF5481: - xprintf("MCF5481"); - break; - case MCF_SIU_JTAGID_MCF5480: - xprintf("MCF5480"); - break; - case MCF_SIU_JTAGID_MCF5475: - xprintf("MCF5475"); - break; - case MCF_SIU_JTAGID_MCF5474: - xprintf("MCF5474"); - break; - case MCF_SIU_JTAGID_MCF5473: - xprintf("MCF5473"); - break; - case MCF_SIU_JTAGID_MCF5472: - xprintf("MCF5472"); - break; - case MCF_SIU_JTAGID_MCF5471: - xprintf("MCF5471"); - break; - case MCF_SIU_JTAGID_MCF5470: - xprintf("MCF5470"); - break; - } - - /* make sure MMU is disabled */ - MCF_MMU_MMUCR = 0; /* MMU off */ - NOP(); /* force pipeline sync */ - - /* - * Determine the processor revision - */ - xprintf(" (revision %d)\r\n", ((MCF_SIU_JTAGID & MCF_SIU_JTAGID_REV) >> 28)); - - init_slt(); - init_fbcs(); - coldboot = init_ddram(); - - /* - * install (preliminary) exception vectors - */ - setup_vectors(); - -#ifdef _NOT_USED_ - /* make sure the handlers are called */ - __asm__ __volatile__("dc.w 0xafff"); /* should trigger a line-A exception */ -#endif /* _NOT_USED_ */ - - - /* - * save the planet (and reduce case heat): disable clocks of unused SOC modules - */ - MCF_CLOCK_SPCR = 0xffffffff & ~( - 0 | /* leave memory clock enabled */ - 0 | /* leave PCI clock enabled */ - 0 | /* leave FlexBus clock enabled */ - MCF_CLOCK_SPCR_CAN0EN | /* disable CAN0 */ - 0 | /* leave DMA clock enabled */ - 0 | /* leave FEC0 clock enabled */ - MCF_CLOCK_SPCR_FEC1EN | /* disable FEC1 */ - MCF_CLOCK_SPCR_USBEN | /* disable USB slave */ - 0 | /* leave PSC clock enabled */ - MCF_CLOCK_SPCR_CAN1EN | /* disable CAN1 */ - MCF_CLOCK_SPCR_CRYENA | /* disable crypto clock A */ - MCF_CLOCK_SPCR_CRYENB | /* disable crypto clock B */ - 0 /* leave core clock enabled */ - ); - - /* the following only makes sense _after_ DDRAM has been initialized */ - clear_bss_segment(); - xprintf(".bss segment cleared\r\n"); - - if (BAS_LMA != BAS_IN_RAM) - { - memcpy((void *) BAS_IN_RAM, BAS_LMA, BAS_SIZE); - - /* we have copied a code area, so flush the caches */ - flush_and_invalidate_caches(); - - } - -#if MACHINE_FIREBEE - if (coldboot) /* does not work with BDM */ - ; - fpga_configured = init_fpga(); - - init_pll(); - init_video_ddr(); - dvi_on(); - -#endif /* MACHINE_FIREBEE */ - driver_mem_init(); - -#if MACHINE_FIREBEE - init_ac97(); -#endif /* MACHINE_FIREBEE */ - - /* jump into the BaS */ - extern void BaS(void); - BaS(); -} diff --git a/tos/Makefile b/tos/Makefile deleted file mode 100644 index 51a0a97..0000000 --- a/tos/Makefile +++ /dev/null @@ -1,15 +0,0 @@ -.PHONY: tos -.PHONY: jtagwait -.PHONY: bascook -.PHONY: vmem_test -tos: jtagwait bascook vmem_test - -jtagwait: - (cd $@; make) - -bascook: - (cd $@; make) - -vmem_test: - (cd $@; make) - diff --git a/tos/bascook/Makefile b/tos/bascook/Makefile deleted file mode 100755 index 62a065f..0000000 --- a/tos/bascook/Makefile +++ /dev/null @@ -1,97 +0,0 @@ -CROSS=Y - -CROSSBINDIR_IS_Y=m68k-atari-mint- -CROSSBINDIR_IS_N= - -CROSSBINDIR=$(CROSSBINDIR_IS_$(CROSS)) - -UNAME := $(shell uname) -ifeq ($(CROSS), Y) -ifeq ($(UNAME),Linux) -PREFIX=m68k-atari-mint -HATARI=hatari -else -PREFIX=m68k-atari-mint -HATARI=/usr/local/bin/hatari -endif -else -PREFIX=/usr -endif - -DEPEND=depend -TOPDIR= ../.. - -BAS_INCLUDE=-I$(TOPDIR)/../BaS_gcc/include - -INCLUDE=-I$(TOPDIR)/../libcmini/include $(BAS_INCLUDE) -nostdlib -LIBS=-lcmini -nostdlib -lgcc -CC=$(PREFIX)/bin/gcc - -CC=$(CROSSBINDIR)gcc -STRIP=$(CROSSBINDIR)strip -STACK=$(CROSSBINDIR)stack - -APP=bascook.prg -TEST_APP=$(APP) - -CFLAGS=\ - -Os\ - -g\ - -Wl,-Map,mapfile\ - -Wall - -SRCDIR=sources - -CSRCS=\ - $(SRCDIR)/bascook.c -ASRCS= - -COBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.c,%.o,$(CSRCS))) -AOBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.S,%.o,$(ASRCS))) -OBJS=$(COBJS) $(AOBJS) - -TRGTDIRS=. -OBJDIRS=$(patsubst %,%/objs,$(TRGTDIRS)) - -# -# multilib flags. These must match m68k-atari-mint-gcc -print-multi-lib output -# -$(APP):CFLAGS += -mcpu=5475 - -all: $(TEST_APP) - -# -# generate pattern rules for multilib object files. -# -define CC_TEMPLATE -$(1)/objs/%.o:$(SRCDIR)/%.c - $(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@ - -$(1)/objs/%.o:$(SRCDIR)/%.S - $(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@ - -$(1)_OBJS=$(patsubst %,$(1)/objs/%,$(OBJS)) -$(1)/$(APP): $$($(1)_OBJS) - $(CC) $$(CFLAGS) -o $$@ $(TOPDIR)/../libcmini/m5475/startup.o $$($(1)_OBJS) -L$(TOPDIR)/../libcmini/m5475 $(LIBS) - $(STRIP) $$@ -endef -$(foreach DIR,$(TRGTDIRS),$(eval $(call CC_TEMPLATE,$(DIR)))) - -$(DEPEND): $(ASRCS) $(CSRCS) - -rm -f $(DEPEND) - for d in $(TRGTDIRS);\ - do $(CC) $(CFLAGS) $(INCLUDE) -M $(ASRCS) $(CSRCS) | sed -e "s#^\(.*\).o:#$$d/objs/\1.o:#" >> $(DEPEND); \ - done - - -clean: - @rm -f $(patsubst %,%/objs/*.o,$(TRGTDIRS)) $(patsubst %,%/$(APP),$(TRGTDIRS)) - @rm -f $(DEPEND) mapfile - -.PHONY: printvars -printvars: - @$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V)))) - -ifneq (clean,$(MAKECMDGOALS)) --include $(DEPEND) -endif diff --git a/tos/bascook/sources/bascook.c b/tos/bascook/sources/bascook.c deleted file mode 100644 index ae25258..0000000 --- a/tos/bascook/sources/bascook.c +++ /dev/null @@ -1,164 +0,0 @@ -#include -#include -#include -#include - -#include "driver_vec.h" - -struct driver_table *get_bas_drivers(void) -{ - struct driver_table *ret = NULL; - - __asm__ __volatile__( - " bra.s do_trap \n\t" - " .dc.l 0x5f424153 \n\t" // '_BAS' - "do_trap: trap #0 \n\t" - " move.l d0,%[ret] \n\t" - : [ret] "=m" (ret) /* output */ - : /* no inputs */ - : /* clobbered */ - ); - - return ret; -} - -/* - * temporarily replace the trap 0 handler with this so we can avoid - * getting caught by BaS versions that don't understand the driver interface - * exposure call. - * If we get here, we have a BaS version that doesn't support the trap 0 interface - */ -static void __attribute__((interrupt)) my_own_trap0_handler(void) -{ - __asm__ __volatile__( - " clr.l d0 \n\t" // return 0 to indicate not supported - : - : - : - ); -} - -static uint32_t cookieptr(void) -{ - return * (uint32_t *) 0x5a0L; -} - -void setcookie(uint32_t cookie, uint32_t value) -{ - uint32_t *cookiejar = (uint32_t *) Supexec(cookieptr); - int num_slots; - int max_slots; - - num_slots = max_slots = 0; - do - { - if (cookiejar[0] == cookie) - { - cookiejar[1] = value; - return; - } - cookiejar = &(cookiejar[2]); - num_slots++; - } while (cookiejar[-2]); - - /* - * Here we are at the end of the list and did not find our cookie. - * Let's check if there is any space left and append our value to the - * list if so. If not, we are lost (extending the cookie jar does only - * work from TSRs) - */ - if (cookiejar[-1]) - { - max_slots = cookiejar[-1]; - } - - if (max_slots > num_slots) - { - /* relief, there is space left, extend the list */ - cookiejar[0] = cookiejar[-2]; - cookiejar[1] = cookiejar[-1]; - /* add the new element */ - cookiejar[-2] = cookie; - cookiejar[-1] = value; - } - else - printf("cannot set cookie, cookie jar is full!\r\n"); -} - -#define COOKIE_DMAC 0x444d4143L /* FireTOS DMA API */ - -static char *dt_to_str(enum driver_type dt) -{ - switch (dt) - { - case BLOCKDEV_DRIVER: return "generic block device driver"; - case CHARDEV_DRIVER: return "generic character device driver"; - case VIDEO_DRIVER: return "video/framebuffer driver"; - case XHDI_DRIVER: return "XHDI compatible hard disk driver"; - case MCD_DRIVER: return "multichannel DMA driver"; - case PCI_DRIVER: return "PCI interface driver"; - case MMU_DRIVER: return "MMU lock/unlock pages driver"; - default: return "unknown driver type"; - } -} - -int main(int argc, char *argv[]) -{ - struct driver_table *dt; - void *ssp; - void *old_vector; - char **sysbase = (char **) 0x4f2; - uint32_t sig; - - (void) Cconws("retrieve BaS driver interface\r\n"); - - ssp = (void *) Super(0L); /* go to supervisor mode, we are doing dirty tricks */ - sig = * (long *)((*sysbase) + 0x2c); - /* - * first check if we are on EmuTOS, FireTOS want's to do everything itself - */ - if (sig == 0x45544f53) - { - old_vector = Setexc(0x20, my_own_trap0_handler); /* set our own temporarily */ - dt = get_bas_drivers(); /* trap #0 */ - (void) Setexc(0x20, old_vector); /* restore original vector */ - - if (dt) - { - struct generic_interface *ifc = &dt->interfaces[0]; - - printf("BaS driver table found at %p, BaS version is %d.%d\r\n", dt, - dt->bas_version, dt->bas_revision); - - while (ifc->type != END_OF_DRIVERS) - { - printf("driver \"%s (%s)\" found,\r\n" - "interface type is %d (%s),\r\n" - "version %d.%d\r\n\r\n", - ifc->name, ifc->description, ifc->type, dt_to_str(ifc->type), - ifc->version, ifc->revision); - if (ifc->type == MCD_DRIVER) - { - setcookie(COOKIE_DMAC, (uint32_t) ifc->interface.dma); - printf("\r\nDMAC cookie set to %p\r\n", ifc->interface.dma); - } - ifc++; - } - } - else - { - printf("driver table not found.\r\n"); - } - } - else - { - printf("not running on EmuTOS,\r\n(signature 0x%04x instead of 0x%04x\r\n", - (uint32_t) sig, 0x45544f53); - } - Super(ssp); - - while (Cconis()) Cconin(); /* eat keys */ - - return 0; -} - diff --git a/tos/jtagwait/Makefile b/tos/jtagwait/Makefile deleted file mode 100755 index 769e385..0000000 --- a/tos/jtagwait/Makefile +++ /dev/null @@ -1,103 +0,0 @@ -CROSS=Y - -CROSSBINDIR_IS_Y=m68k-atari-mint- -CROSSBINDIR_IS_N= - -CROSSBINDIR=$(CROSSBINDIR_IS_$(CROSS)) - -UNAME := $(shell uname) -ifeq ($(CROSS), Y) -ifeq ($(UNAME),Linux) -PREFIX=m68k-atari-mint -HATARI=hatari -else -PREFIX=m68k-atari-mint -HATARI=/usr/local/bin/hatari -endif -else -PREFIX=/usr -endif - -DEPEND=depend -TOPDIR = ../.. - -INCLUDE=-I$(TOPDIR)/../libcmini/include -nostdlib -LIBS=-lcmini -nostdlib -lgcc -CC=$(PREFIX)/bin/gcc - -CC=$(CROSSBINDIR)gcc -STRIP=$(CROSSBINDIR)strip -STACK=$(CROSSBINDIR)stack - -APP=jtagwait.prg -TEST_APP=$(APP) - -CFLAGS=\ - -O0\ - -g\ - -Wl,-Map,mapfile\ - -Wl,--defsym -Wl,__MBAR=0xff000000\ - -Wl,--defsym -Wl,__MMUBAR=0xff040000\ - -Wl,--defsym -Wl,__FPGA_JTAG_LOADED=0xff101000\ - -Wl,--defsym -Wl,__FPGA_JTAG_VALID=0xff101004\ - -Wall - -SRCDIR=sources -INCDIR=include -INCLUDE+=-I$(INCDIR) - -CSRCS=\ - $(SRCDIR)/jtagwait.c \ - $(SRCDIR)/bas_printf.c - -ASRCS=$(SRCDIR)/printf_helper.S - -COBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.c,%.o,$(CSRCS))) -AOBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.S,%.o,$(ASRCS))) -OBJS=$(COBJS) $(AOBJS) - -TRGTDIRS=./m5475 ./m5475/mshort -OBJDIRS=$(patsubst %,%/objs,$(TRGTDIRS)) - -# -# multilib flags. These must match m68k-atari-mint-gcc -print-multi-lib output -# -m5475/$(APP):CFLAGS += -mcpu=5475 -m5475/mshort/$(APP): CFLAGS += -mcpu=5475 -mshort - -all:$(patsubst %,%/$(APP),$(TRGTDIRS)) -# -# generate pattern rules for multilib object files. -# -define CC_TEMPLATE -$(1)/objs/%.o:$(SRCDIR)/%.c - $(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@ - -$(1)/objs/%.o:$(SRCDIR)/%.S - $(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@ - -$(1)_OBJS=$(patsubst %,$(1)/objs/%,$(OBJS)) -$(1)/$(APP): $$($(1)_OBJS) - $(CC) $$(CFLAGS) -o $$@ $(TOPDIR)/../libcmini/$(1)/startup.o $$($(1)_OBJS) -L$(TOPDIR)/../libcmini/$(1) $(LIBS) - $(STRIP) $$@ -endef -$(foreach DIR,$(TRGTDIRS),$(eval $(call CC_TEMPLATE,$(DIR)))) - -$(DEPEND): $(ASRCS) $(CSRCS) - -rm -f $(DEPEND) - for d in $(TRGTDIRS);\ - do $(CC) $(CFLAGS) $(INCLUDE) -M $(ASRCS) $(CSRCS) | sed -e "s#^\(.*\).o:#$$d/objs/\1.o:#" >> $(DEPEND); \ - done - - -clean: - @rm -f $(patsubst %,%/objs/*.o,$(TRGTDIRS)) $(patsubst %,%/$(APP),$(TRGTDIRS)) - @rm -f $(DEPEND) mapfile - -.PHONY: printvars -printvars: - @$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V)))) - -ifneq (clean,$(MAKECMDGOALS)) --include $(DEPEND) -endif diff --git a/tos/jtagwait/include/MCF5475.h b/tos/jtagwait/include/MCF5475.h deleted file mode 100644 index 5ab1750..0000000 --- a/tos/jtagwait/include/MCF5475.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_H__ -#define __MCF5475_H__ - -#include -/*** - * MCF5475 Derivative Memory map definitions from linker command files: - * __MBAR, __MMUBAR, __RAMBAR0, __RAMBAR0_SIZE, __RAMBAR1, __RAMBAR1_SIZE - * linker symbols must be defined in the linker command file. - */ - -typedef uint32_t __attribute__((__may_alias__)) uint32_t_a; /* a type to avoid gcc's complaints about pointer aliasing */ - -extern uint8_t _MBAR[]; -extern uint8_t _MMUBAR[]; -extern uint8_t _RAMBAR0[]; -extern uint8_t _RAMBAR0_SIZE[]; -extern uint8_t _RAMBAR1[]; -extern uint8_t _RAMBAR1_SIZE[]; - -#define MBAR_ADDRESS (uint32_t)_MBAR -#define MMUBAR_ADDRESS (uint32_t)_MMUBAR -#define RAMBAR0_ADDRESS (uint32_t)_RAMBAR0 -#define RAMBAR0_SIZE (uint32_t)_RAMBAR0_SIZE -#define RAMBAR1_ADDRESS (uint32_t)_RAMBAR1 -#define RAMBAR1_SIZE (uint32_t)_RAMBAR1_SIZE - - -#include "MCF5475_SIU.h" -#include "MCF5475_MMU.h" -#include "MCF5475_SDRAMC.h" -#include "MCF5475_XLB.h" -#include "MCF5475_CLOCK.h" -#include "MCF5475_FBCS.h" -#include "MCF5475_INTC.h" -#include "MCF5475_GPT.h" -#include "MCF5475_SLT.h" -#include "MCF5475_GPIO.h" -#include "MCF5475_PAD.h" -#include "MCF5475_PCI.h" -#include "MCF5475_PCIARB.h" -#include "MCF5475_EPORT.h" -#include "MCF5475_CTM.h" -#include "MCF5475_DMA.h" -#include "MCF5475_PSC.h" -#include "MCF5475_DSPI.h" -#include "MCF5475_I2C.h" -#include "MCF5475_FEC.h" -#include "MCF5475_USB.h" -#include "MCF5475_SRAM.h" -#include "MCF5475_SEC.h" - -#endif /* __MCF5475_H__ */ diff --git a/tos/jtagwait/include/MCF5475_CLOCK.h b/tos/jtagwait/include/MCF5475_CLOCK.h deleted file mode 100644 index 4603098..0000000 --- a/tos/jtagwait/include/MCF5475_CLOCK.h +++ /dev/null @@ -1,47 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_CLOCK_H__ -#define __MCF5475_CLOCK_H__ - - -/********************************************************************* -* -* Clock Module (CLOCK) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CLOCK_SPCR (*(volatile uint32_t*)(&_MBAR[0x300])) - - -/* Bit definitions and macros for MCF_CLOCK_SPCR */ -#define MCF_CLOCK_SPCR_MEMEN (0x1) -#define MCF_CLOCK_SPCR_PCIEN (0x2) -#define MCF_CLOCK_SPCR_FBEN (0x4) -#define MCF_CLOCK_SPCR_CAN0EN (0x8) -#define MCF_CLOCK_SPCR_DMAEN (0x10) -#define MCF_CLOCK_SPCR_FEC0EN (0x20) -#define MCF_CLOCK_SPCR_FEC1EN (0x40) -#define MCF_CLOCK_SPCR_USBEN (0x80) -#define MCF_CLOCK_SPCR_PSCEN (0x200) -#define MCF_CLOCK_SPCR_CAN1EN (0x800) -#define MCF_CLOCK_SPCR_CRYENA (0x1000) -#define MCF_CLOCK_SPCR_CRYENB (0x2000) -#define MCF_CLOCK_SPCR_COREN (0x4000) -#define MCF_CLOCK_SPCR_PLLK (0x80000000) - - -#endif /* __MCF5475_CLOCK_H__ */ diff --git a/tos/jtagwait/include/MCF5475_CTM.h b/tos/jtagwait/include/MCF5475_CTM.h deleted file mode 100644 index 5ba86e4..0000000 --- a/tos/jtagwait/include/MCF5475_CTM.h +++ /dev/null @@ -1,76 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_CTM_H__ -#define __MCF5475_CTM_H__ - - -/********************************************************************* -* -* Comm Timer Module (CTM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CTM_CTCR0 (*(volatile uint32_t*)(&_MBAR[0x7F00])) -#define MCF_CTM_CTCR1 (*(volatile uint32_t*)(&_MBAR[0x7F04])) -#define MCF_CTM_CTCR2 (*(volatile uint32_t*)(&_MBAR[0x7F08])) -#define MCF_CTM_CTCR3 (*(volatile uint32_t*)(&_MBAR[0x7F0C])) -#define MCF_CTM_CTCR4 (*(volatile uint32_t*)(&_MBAR[0x7F10])) -#define MCF_CTM_CTCR5 (*(volatile uint32_t*)(&_MBAR[0x7F14])) -#define MCF_CTM_CTCR6 (*(volatile uint32_t*)(&_MBAR[0x7F18])) -#define MCF_CTM_CTCR7 (*(volatile uint32_t*)(&_MBAR[0x7F1C])) -#define MCF_CTM_CTCRF(x) (*(volatile uint32_t*)(&_MBAR[0x7F00 + ((x)*0x4)])) -#define MCF_CTM_CTCRV(x) (*(volatile uint32_t*)(&_MBAR[0x7F10 + ((x-4)*0x4)])) - - -/* Bit definitions and macros for MCF_CTM_CTCRF */ -#define MCF_CTM_CTCRF_CRV(x) (((x)&0xFFFF)<<0) -#define MCF_CTM_CTCRF_S(x) (((x)&0xF)<<0x10) -#define MCF_CTM_CTCRF_S_CLK_1 (0) -#define MCF_CTM_CTCRF_S_CLK_2 (0x10000) -#define MCF_CTM_CTCRF_S_CLK_4 (0x20000) -#define MCF_CTM_CTCRF_S_CLK_8 (0x30000) -#define MCF_CTM_CTCRF_S_CLK_16 (0x40000) -#define MCF_CTM_CTCRF_S_CLK_32 (0x50000) -#define MCF_CTM_CTCRF_S_CLK_64 (0x60000) -#define MCF_CTM_CTCRF_S_CLK_128 (0x70000) -#define MCF_CTM_CTCRF_S_CLK_256 (0x80000) -#define MCF_CTM_CTCRF_S_CLK_EXT (0x90000) -#define MCF_CTM_CTCRF_PCT(x) (((x)&0x7)<<0x14) -#define MCF_CTM_CTCRF_PCT_100 (0) -#define MCF_CTM_CTCRF_PCT_50 (0x100000) -#define MCF_CTM_CTCRF_PCT_25 (0x200000) -#define MCF_CTM_CTCRF_PCT_12p5 (0x300000) -#define MCF_CTM_CTCRF_PCT_6p25 (0x400000) -#define MCF_CTM_CTCRF_PCT_OFF (0x500000) -#define MCF_CTM_CTCRF_M (0x800000) -#define MCF_CTM_CTCRF_IM (0x1000000) -#define MCF_CTM_CTCRF_I (0x80000000) - -/* Bit definitions and macros for MCF_CTM_CTCRV */ -#define MCF_CTM_CTCRV_CRV(x) (((x)&0xFFFFFF)<<0) -#define MCF_CTM_CTCRV_PCT(x) (((x)&0x7)<<0x18) -#define MCF_CTM_CTCRV_PCT_100 (0) -#define MCF_CTM_CTCRV_PCT_50 (0x1000000) -#define MCF_CTM_CTCRV_PCT_25 (0x2000000) -#define MCF_CTM_CTCRV_PCT_12p5 (0x3000000) -#define MCF_CTM_CTCRV_PCT_6p25 (0x4000000) -#define MCF_CTM_CTCRV_PCT_OFF (0x5000000) -#define MCF_CTM_CTCRV_M (0x8000000) -#define MCF_CTM_CTCRV_S (0x10000000) - - -#endif /* __MCF5475_CTM_H__ */ diff --git a/tos/jtagwait/include/MCF5475_DMA.h b/tos/jtagwait/include/MCF5475_DMA.h deleted file mode 100644 index 4e6f916..0000000 --- a/tos/jtagwait/include/MCF5475_DMA.h +++ /dev/null @@ -1,234 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_DMA_H__ -#define __MCF5475_DMA_H__ - - -/********************************************************************* -* -* Multichannel DMA (DMA) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_DMA_TASKBAR (*(volatile uint32_t*)(&_MBAR[0x8000])) -#define MCF_DMA_CP (*(volatile uint32_t*)(&_MBAR[0x8004])) -#define MCF_DMA_EP (*(volatile uint32_t*)(&_MBAR[0x8008])) -#define MCF_DMA_VP (*(volatile uint32_t*)(&_MBAR[0x800C])) -#define MCF_DMA_PTD (*(volatile uint32_t*)(&_MBAR[0x8010])) -#define MCF_DMA_DIPR (*(volatile uint32_t*)(&_MBAR[0x8014])) -#define MCF_DMA_DIMR (*(volatile uint32_t*)(&_MBAR[0x8018])) -#define MCF_DMA_TCR0 (*(volatile uint16_t*)(&_MBAR[0x801C])) -#define MCF_DMA_TCR1 (*(volatile uint16_t*)(&_MBAR[0x801E])) -#define MCF_DMA_TCR2 (*(volatile uint16_t*)(&_MBAR[0x8020])) -#define MCF_DMA_TCR3 (*(volatile uint16_t*)(&_MBAR[0x8022])) -#define MCF_DMA_TCR4 (*(volatile uint16_t*)(&_MBAR[0x8024])) -#define MCF_DMA_TCR5 (*(volatile uint16_t*)(&_MBAR[0x8026])) -#define MCF_DMA_TCR6 (*(volatile uint16_t*)(&_MBAR[0x8028])) -#define MCF_DMA_TCR7 (*(volatile uint16_t*)(&_MBAR[0x802A])) -#define MCF_DMA_TCR8 (*(volatile uint16_t*)(&_MBAR[0x802C])) -#define MCF_DMA_TCR9 (*(volatile uint16_t*)(&_MBAR[0x802E])) -#define MCF_DMA_TCR10 (*(volatile uint16_t*)(&_MBAR[0x8030])) -#define MCF_DMA_TCR11 (*(volatile uint16_t*)(&_MBAR[0x8032])) -#define MCF_DMA_TCR12 (*(volatile uint16_t*)(&_MBAR[0x8034])) -#define MCF_DMA_TCR13 (*(volatile uint16_t*)(&_MBAR[0x8036])) -#define MCF_DMA_TCR14 (*(volatile uint16_t*)(&_MBAR[0x8038])) -#define MCF_DMA_TCR15 (*(volatile uint16_t*)(&_MBAR[0x803A])) -#define MCF_DMA_PRIOR0 (*(volatile uint8_t *)(&_MBAR[0x803C])) -#define MCF_DMA_PRIOR1 (*(volatile uint8_t *)(&_MBAR[0x803D])) -#define MCF_DMA_PRIOR2 (*(volatile uint8_t *)(&_MBAR[0x803E])) -#define MCF_DMA_PRIOR3 (*(volatile uint8_t *)(&_MBAR[0x803F])) -#define MCF_DMA_PRIOR4 (*(volatile uint8_t *)(&_MBAR[0x8040])) -#define MCF_DMA_PRIOR5 (*(volatile uint8_t *)(&_MBAR[0x8041])) -#define MCF_DMA_PRIOR6 (*(volatile uint8_t *)(&_MBAR[0x8042])) -#define MCF_DMA_PRIOR7 (*(volatile uint8_t *)(&_MBAR[0x8043])) -#define MCF_DMA_PRIOR8 (*(volatile uint8_t *)(&_MBAR[0x8044])) -#define MCF_DMA_PRIOR9 (*(volatile uint8_t *)(&_MBAR[0x8045])) -#define MCF_DMA_PRIOR10 (*(volatile uint8_t *)(&_MBAR[0x8046])) -#define MCF_DMA_PRIOR11 (*(volatile uint8_t *)(&_MBAR[0x8047])) -#define MCF_DMA_PRIOR12 (*(volatile uint8_t *)(&_MBAR[0x8048])) -#define MCF_DMA_PRIOR13 (*(volatile uint8_t *)(&_MBAR[0x8049])) -#define MCF_DMA_PRIOR14 (*(volatile uint8_t *)(&_MBAR[0x804A])) -#define MCF_DMA_PRIOR15 (*(volatile uint8_t *)(&_MBAR[0x804B])) -#define MCF_DMA_PRIOR16 (*(volatile uint8_t *)(&_MBAR[0x804C])) -#define MCF_DMA_PRIOR17 (*(volatile uint8_t *)(&_MBAR[0x804D])) -#define MCF_DMA_PRIOR18 (*(volatile uint8_t *)(&_MBAR[0x804E])) -#define MCF_DMA_PRIOR19 (*(volatile uint8_t *)(&_MBAR[0x804F])) -#define MCF_DMA_PRIOR20 (*(volatile uint8_t *)(&_MBAR[0x8050])) -#define MCF_DMA_PRIOR21 (*(volatile uint8_t *)(&_MBAR[0x8051])) -#define MCF_DMA_PRIOR22 (*(volatile uint8_t *)(&_MBAR[0x8052])) -#define MCF_DMA_PRIOR23 (*(volatile uint8_t *)(&_MBAR[0x8053])) -#define MCF_DMA_PRIOR24 (*(volatile uint8_t *)(&_MBAR[0x8054])) -#define MCF_DMA_PRIOR25 (*(volatile uint8_t *)(&_MBAR[0x8055])) -#define MCF_DMA_PRIOR26 (*(volatile uint8_t *)(&_MBAR[0x8056])) -#define MCF_DMA_PRIOR27 (*(volatile uint8_t *)(&_MBAR[0x8057])) -#define MCF_DMA_PRIOR28 (*(volatile uint8_t *)(&_MBAR[0x8058])) -#define MCF_DMA_PRIOR29 (*(volatile uint8_t *)(&_MBAR[0x8059])) -#define MCF_DMA_PRIOR30 (*(volatile uint8_t *)(&_MBAR[0x805A])) -#define MCF_DMA_PRIOR31 (*(volatile uint8_t *)(&_MBAR[0x805B])) -#define MCF_DMA_IMCR (*(volatile uint32_t*)(&_MBAR[0x805C])) -#define MCF_DMA_TSKSZ0 (*(volatile uint32_t*)(&_MBAR[0x8060])) -#define MCF_DMA_TSKSZ1 (*(volatile uint32_t*)(&_MBAR[0x8064])) -#define MCF_DMA_DBGCOMP0 (*(volatile uint32_t*)(&_MBAR[0x8070])) -#define MCF_DMA_DBGCOMP2 (*(volatile uint32_t*)(&_MBAR[0x8074])) -#define MCF_DMA_DBGCTL (*(volatile uint32_t*)(&_MBAR[0x8078])) -#define MCF_DMA_TCR(x) (*(volatile uint16_t*)(&_MBAR[0x801C + ((x)*0x2)])) -#define MCF_DMA_PRIOR(x) (*(volatile uint8_t *)(&_MBAR[0x803C + ((x)*0x1)])) - - -/* Bit definitions and macros for MCF_DMA_TASKBAR */ -#define MCF_DMA_TASKBAR_TASK_BASE_ADDRESS(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_CP */ -#define MCF_DMA_CP_DESCRIPTOR_POINTER(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_EP */ -#define MCF_DMA_EP_DESCRIPTOR_POINTER(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_VP */ -#define MCF_DMA_VP_VARIABLE_POINTER(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_PTD */ -#define MCF_DMA_PTD_PCTL0 (0x1) -#define MCF_DMA_PTD_PCTL1 (0x2) -#define MCF_DMA_PTD_PCTL13 (0x2000) -#define MCF_DMA_PTD_PCTL14 (0x4000) -#define MCF_DMA_PTD_PCTL15 (0x8000) - -/* Bit definitions and macros for MCF_DMA_DIPR */ -#define MCF_DMA_DIPR_TASK(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_DIMR */ -#define MCF_DMA_DIMR_TASK(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_TCR */ -#define MCF_DMA_TCR_ASTSKNUM(x) (((x)&0xF)<<0) -#define MCF_DMA_TCR_HLDINITNUM (0x20) -#define MCF_DMA_TCR_HIPRITSKEN (0x40) -#define MCF_DMA_TCR_ASTRT (0x80) -#define MCF_DMA_TCR_INITNUM(x) (((x)&0x1F)<<0x8) -#define MCF_DMA_TCR_ALWINIT (0x2000) -#define MCF_DMA_TCR_V (0x4000) -#define MCF_DMA_TCR_EN (0x8000) - -/* Bit definitions and macros for MCF_DMA_PRIOR */ -#define MCF_DMA_PRIOR_PRI(x) (((x)&0x7)<<0) -#define MCF_DMA_PRIOR_HLD (0x80) - -/* Bit definitions and macros for MCF_DMA_IMCR */ -#define MCF_DMA_IMCR_IMC16(x) (((x)&0x3)<<0) -#define MCF_DMA_IMCR_IMC17(x) (((x)&0x3)<<0x2) -#define MCF_DMA_IMCR_IMC18(x) (((x)&0x3)<<0x4) -#define MCF_DMA_IMCR_IMC19(x) (((x)&0x3)<<0x6) -#define MCF_DMA_IMCR_IMC20(x) (((x)&0x3)<<0x8) -#define MCF_DMA_IMCR_IMC21(x) (((x)&0x3)<<0xA) -#define MCF_DMA_IMCR_IMC22(x) (((x)&0x3)<<0xC) -#define MCF_DMA_IMCR_IMC23(x) (((x)&0x3)<<0xE) -#define MCF_DMA_IMCR_IMC24(x) (((x)&0x3)<<0x10) -#define MCF_DMA_IMCR_IMC25(x) (((x)&0x3)<<0x12) -#define MCF_DMA_IMCR_IMC26(x) (((x)&0x3)<<0x14) -#define MCF_DMA_IMCR_IMC27(x) (((x)&0x3)<<0x16) -#define MCF_DMA_IMCR_IMC28(x) (((x)&0x3)<<0x18) -#define MCF_DMA_IMCR_IMC29(x) (((x)&0x3)<<0x1A) -#define MCF_DMA_IMCR_IMC30(x) (((x)&0x3)<<0x1C) -#define MCF_DMA_IMCR_IMC31(x) (((x)&0x3)<<0x1E) - - -#define MCF_DMA_IMCR_IMC16_FEC0RX (0x00000000) -#define MCF_DMA_IMCR_IMC17_FEC0TX (0x00000000) -#define MCF_DMA_IMCR_IMC18_FEC0RX (0x00000020) -#define MCF_DMA_IMCR_IMC19_FEC0TX (0x00000080) -#define MCF_DMA_IMCR_IMC20_FEC1RX (0x00000100) -#define MCF_DMA_IMCR_IMC21_DREQ1 (0x00000000) -#define MCF_DMA_IMCR_IMC21_FEC1TX (0x00000400) -#define MCF_DMA_IMCR_IMC22_FEC0RX (0x00001000) -#define MCF_DMA_IMCR_IMC23_FEC0TX (0x00004000) -#define MCF_DMA_IMCR_IMC24_CTM0 (0x00010000) -#define MCF_DMA_IMCR_IMC24_FEC1RX (0x00020000) -#define MCF_DMA_IMCR_IMC25_CTM1 (0x00040000) -#define MCF_DMA_IMCR_IMC25_FEC1TX (0x00080000) -#define MCF_DMA_IMCR_IMC26_USBEP4 (0x00000000) -#define MCF_DMA_IMCR_IMC26_CTM2 (0x00200000) -#define MCF_DMA_IMCR_IMC27_USBEP5 (0x00000000) -#define MCF_DMA_IMCR_IMC27_CTM3 (0x00800000) -#define MCF_DMA_IMCR_IMC28_USBEP6 (0x00000000) -#define MCF_DMA_IMCR_IMC28_CTM4 (0x01000000) -#define MCF_DMA_IMCR_IMC28_DREQ1 (0x02000000) -#define MCF_DMA_IMCR_IMC28_PSC2RX (0x03000000) -#define MCF_DMA_IMCR_IMC29_DREQ1 (0x04000000) -#define MCF_DMA_IMCR_IMC29_CTM5 (0x08000000) -#define MCF_DMA_IMCR_IMC29_PSC2TX (0x0C000000) -#define MCF_DMA_IMCR_IMC30_FEC1RX (0x00000000) -#define MCF_DMA_IMCR_IMC30_CTM6 (0x10000000) -#define MCF_DMA_IMCR_IMC30_PSC3RX (0x30000000) -#define MCF_DMA_IMCR_IMC31_FEC1TX (0x00000000) -#define MCF_DMA_IMCR_IMC31_CTM7 (0x80000000) -#define MCF_DMA_IMCR_IMC31_PSC3TX (0xC0000000) - -/* Bit definitions and macros for MCF_DMA_TSKSZ0 */ -#define MCF_DMA_TSKSZ0_DSTSZ7(x) (((x)&0x3)<<0) -#define MCF_DMA_TSKSZ0_SRCSZ7(x) (((x)&0x3)<<0x2) -#define MCF_DMA_TSKSZ0_DSTSZ6(x) (((x)&0x3)<<0x4) -#define MCF_DMA_TSKSZ0_SRCSZ6(x) (((x)&0x3)<<0x6) -#define MCF_DMA_TSKSZ0_DSTSZ5(x) (((x)&0x3)<<0x8) -#define MCF_DMA_TSKSZ0_SRCSZ5(x) (((x)&0x3)<<0xA) -#define MCF_DMA_TSKSZ0_DSTSZ4(x) (((x)&0x3)<<0xC) -#define MCF_DMA_TSKSZ0_SRCSZ4(x) (((x)&0x3)<<0xE) -#define MCF_DMA_TSKSZ0_DSTSZ3(x) (((x)&0x3)<<0x10) -#define MCF_DMA_TSKSZ0_SRCSZ3(x) (((x)&0x3)<<0x12) -#define MCF_DMA_TSKSZ0_DSTSZ2(x) (((x)&0x3)<<0x14) -#define MCF_DMA_TSKSZ0_SRCSZ2(x) (((x)&0x3)<<0x16) -#define MCF_DMA_TSKSZ0_DSTSZ1(x) (((x)&0x3)<<0x18) -#define MCF_DMA_TSKSZ0_SRCSZ1(x) (((x)&0x3)<<0x1A) -#define MCF_DMA_TSKSZ0_DSTSZ0(x) (((x)&0x3)<<0x1C) -#define MCF_DMA_TSKSZ0_SRCSZ0(x) (((x)&0x3)<<0x1E) - -/* Bit definitions and macros for MCF_DMA_TSKSZ1 */ -#define MCF_DMA_TSKSZ1_DSTSZ15(x) (((x)&0x3)<<0) -#define MCF_DMA_TSKSZ1_SRCSZ15(x) (((x)&0x3)<<0x2) -#define MCF_DMA_TSKSZ1_DSTSZ14(x) (((x)&0x3)<<0x4) -#define MCF_DMA_TSKSZ1_SRCSZ14(x) (((x)&0x3)<<0x6) -#define MCF_DMA_TSKSZ1_DSTSZ13(x) (((x)&0x3)<<0x8) -#define MCF_DMA_TSKSZ1_SRCSZ13(x) (((x)&0x3)<<0xA) -#define MCF_DMA_TSKSZ1_DSTSZ12(x) (((x)&0x3)<<0xC) -#define MCF_DMA_TSKSZ1_SRCSZ12(x) (((x)&0x3)<<0xE) -#define MCF_DMA_TSKSZ1_DSTSZ11(x) (((x)&0x3)<<0x10) -#define MCF_DMA_TSKSZ1_SRCSZ11(x) (((x)&0x3)<<0x12) -#define MCF_DMA_TSKSZ1_DSTSZ10(x) (((x)&0x3)<<0x14) -#define MCF_DMA_TSKSZ1_SRCSZ10(x) (((x)&0x3)<<0x16) -#define MCF_DMA_TSKSZ1_DSTSZ9(x) (((x)&0x3)<<0x18) -#define MCF_DMA_TSKSZ1_SRCSZ9(x) (((x)&0x3)<<0x1A) -#define MCF_DMA_TSKSZ1_DSTSZ8(x) (((x)&0x3)<<0x1C) -#define MCF_DMA_TSKSZ1_SRCSZ8(x) (((x)&0x3)<<0x1E) - -/* Bit definitions and macros for MCF_DMA_DBGCOMP0 */ -#define MCF_DMA_DBGCOMP0_COMPARATOR_VALUE(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_DBGCOMP2 */ -#define MCF_DMA_DBGCOMP2_COMPARATOR_VALUE(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_DBGCTL */ -#define MCF_DMA_DBGCTL_I (0x2) -#define MCF_DMA_DBGCTL_E (0x4) -#define MCF_DMA_DBGCTL_AND_OR (0x80) -#define MCF_DMA_DBGCTL_COMPARATOR_TYPE_2(x) (((x)&0x7)<<0x8) -#define MCF_DMA_DBGCTL_COMPARATOR_TYPE_1(x) (((x)&0x7)<<0xB) -#define MCF_DMA_DBGCTL_B (0x4000) -#define MCF_DMA_DBGCTL_AA (0x8000) -#define MCF_DMA_DBGCTL_BLOCK_TASKS(x) (((x)&0xFFFF)<<0x10) - - -#endif /* __MCF5475_DMA_H__ */ diff --git a/tos/jtagwait/include/MCF5475_DSPI.h b/tos/jtagwait/include/MCF5475_DSPI.h deleted file mode 100644 index 76cac28..0000000 --- a/tos/jtagwait/include/MCF5475_DSPI.h +++ /dev/null @@ -1,150 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_DSPI_H__ -#define __MCF5475_DSPI_H__ - - -/********************************************************************* -* -* DMA Serial Peripheral Interface (DSPI) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_DSPI_DMCR (*(volatile uint32_t*)(&_MBAR[0x8A00])) -#define MCF_DSPI_DTCR (*(volatile uint32_t*)(&_MBAR[0x8A08])) -#define MCF_DSPI_DCTAR0 (*(volatile uint32_t*)(&_MBAR[0x8A0C])) -#define MCF_DSPI_DCTAR1 (*(volatile uint32_t*)(&_MBAR[0x8A10])) -#define MCF_DSPI_DCTAR2 (*(volatile uint32_t*)(&_MBAR[0x8A14])) -#define MCF_DSPI_DCTAR3 (*(volatile uint32_t*)(&_MBAR[0x8A18])) -#define MCF_DSPI_DCTAR4 (*(volatile uint32_t*)(&_MBAR[0x8A1C])) -#define MCF_DSPI_DCTAR5 (*(volatile uint32_t*)(&_MBAR[0x8A20])) -#define MCF_DSPI_DCTAR6 (*(volatile uint32_t*)(&_MBAR[0x8A24])) -#define MCF_DSPI_DCTAR7 (*(volatile uint32_t*)(&_MBAR[0x8A28])) -#define MCF_DSPI_DSR (*(volatile uint32_t*)(&_MBAR[0x8A2C])) -#define MCF_DSPI_DIRSR (*(volatile uint32_t*)(&_MBAR[0x8A30])) -#define MCF_DSPI_DTFR (*(volatile uint32_t*)(&_MBAR[0x8A34])) -#define MCF_DSPI_DRFR (*(volatile uint32_t*)(&_MBAR[0x8A38])) -#define MCF_DSPI_DTFDR0 (*(volatile uint32_t*)(&_MBAR[0x8A3C])) -#define MCF_DSPI_DTFDR1 (*(volatile uint32_t*)(&_MBAR[0x8A40])) -#define MCF_DSPI_DTFDR2 (*(volatile uint32_t*)(&_MBAR[0x8A44])) -#define MCF_DSPI_DTFDR3 (*(volatile uint32_t*)(&_MBAR[0x8A48])) -#define MCF_DSPI_DRFDR0 (*(volatile uint32_t*)(&_MBAR[0x8A7C])) -#define MCF_DSPI_DRFDR1 (*(volatile uint32_t*)(&_MBAR[0x8A80])) -#define MCF_DSPI_DRFDR2 (*(volatile uint32_t*)(&_MBAR[0x8A84])) -#define MCF_DSPI_DRFDR3 (*(volatile uint32_t*)(&_MBAR[0x8A88])) -#define MCF_DSPI_DCTAR(x) (*(volatile uint32_t*)(&_MBAR[0x8A0C + ((x)*0x4)])) -#define MCF_DSPI_DTFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8A3C + ((x)*0x4)])) -#define MCF_DSPI_DRFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8A7C + ((x)*0x4)])) - - -/* Bit definitions and macros for MCF_DSPI_DMCR */ -#define MCF_DSPI_DMCR_HALT (0x1) -#define MCF_DSPI_DMCR_SMPL_PT(x) (((x)&0x3)<<0x8) -#define MCF_DSPI_DMCR_SMPL_PT_0CLK (0) -#define MCF_DSPI_DMCR_SMPL_PT_1CLK (0x100) -#define MCF_DSPI_DMCR_SMPL_PT_2CLK (0x200) -#define MCF_DSPI_DMCR_CRXF (0x400) -#define MCF_DSPI_DMCR_CTXF (0x800) -#define MCF_DSPI_DMCR_DRXF (0x1000) -#define MCF_DSPI_DMCR_DTXF (0x2000) -#define MCF_DSPI_DMCR_CSIS0 (0x10000) -#define MCF_DSPI_DMCR_CSIS2 (0x40000) -#define MCF_DSPI_DMCR_CSIS3 (0x80000) -#define MCF_DSPI_DMCR_CSIS5 (0x200000) -#define MCF_DSPI_DMCR_ROOE (0x1000000) -#define MCF_DSPI_DMCR_PCSSE (0x2000000) -#define MCF_DSPI_DMCR_MTFE (0x4000000) -#define MCF_DSPI_DMCR_FRZ (0x8000000) -#define MCF_DSPI_DMCR_DCONF(x) (((x)&0x3)<<0x1C) -#define MCF_DSPI_DMCR_CSCK (0x40000000) -#define MCF_DSPI_DMCR_MSTR (0x80000000) - -/* Bit definitions and macros for MCF_DSPI_DTCR */ -#define MCF_DSPI_DTCR_SPI_TCNT(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_DSPI_DCTAR */ -#define MCF_DSPI_DCTAR_BR(x) (((x)&0xF)<<0) -#define MCF_DSPI_DCTAR_DT(x) (((x)&0xF)<<0x4) -#define MCF_DSPI_DCTAR_ASC(x) (((x)&0xF)<<0x8) -#define MCF_DSPI_DCTAR_CSSCK(x) (((x)&0xF)<<0xC) -#define MCF_DSPI_DCTAR_PBR(x) (((x)&0x3)<<0x10) -#define MCF_DSPI_DCTAR_PBR_1CLK (0) -#define MCF_DSPI_DCTAR_PBR_3CLK (0x10000) -#define MCF_DSPI_DCTAR_PBR_5CLK (0x20000) -#define MCF_DSPI_DCTAR_PBR_7CLK (0x30000) -#define MCF_DSPI_DCTAR_PDT(x) (((x)&0x3)<<0x12) -#define MCF_DSPI_DCTAR_PDT_1CLK (0) -#define MCF_DSPI_DCTAR_PDT_3CLK (0x40000) -#define MCF_DSPI_DCTAR_PDT_5CLK (0x80000) -#define MCF_DSPI_DCTAR_PDT_7CLK (0xC0000) -#define MCF_DSPI_DCTAR_PASC(x) (((x)&0x3)<<0x14) -#define MCF_DSPI_DCTAR_PASC_1CLK (0) -#define MCF_DSPI_DCTAR_PASC_3CLK (0x100000) -#define MCF_DSPI_DCTAR_PASC_5CLK (0x200000) -#define MCF_DSPI_DCTAR_PASC_7CLK (0x300000) -#define MCF_DSPI_DCTAR_PCSSCK(x) (((x)&0x3)<<0x16) -#define MCF_DSPI_DCTAR_LSBFE (0x1000000) -#define MCF_DSPI_DCTAR_CPHA (0x2000000) -#define MCF_DSPI_DCTAR_CPOL (0x4000000) -#define MCF_DSPI_DCTAR_TRSZ(x) (((x)&0xF)<<0x1B) - -/* Bit definitions and macros for MCF_DSPI_DSR */ -#define MCF_DSPI_DSR_RXPTR(x) (((x)&0xF)<<0) -#define MCF_DSPI_DSR_RXCTR(x) (((x)&0xF)<<0x4) -#define MCF_DSPI_DSR_TXPTR(x) (((x)&0xF)<<0x8) -#define MCF_DSPI_DSR_TXCTR(x) (((x)&0xF)<<0xC) -#define MCF_DSPI_DSR_RFDF (0x20000) -#define MCF_DSPI_DSR_RFOF (0x80000) -#define MCF_DSPI_DSR_TFFF (0x2000000) -#define MCF_DSPI_DSR_TFUF (0x8000000) -#define MCF_DSPI_DSR_EOQF (0x10000000) -#define MCF_DSPI_DSR_TXRXS (0x40000000) -#define MCF_DSPI_DSR_TCF (0x80000000) - -/* Bit definitions and macros for MCF_DSPI_DIRSR */ -#define MCF_DSPI_DIRSR_RFDFS (0x10000) -#define MCF_DSPI_DIRSR_RFDFE (0x20000) -#define MCF_DSPI_DIRSR_RFOFE (0x80000) -#define MCF_DSPI_DIRSR_TFFFS (0x1000000) -#define MCF_DSPI_DIRSR_TFFFE (0x2000000) -#define MCF_DSPI_DIRSR_TFUFE (0x8000000) -#define MCF_DSPI_DIRSR_EOQFE (0x10000000) -#define MCF_DSPI_DIRSR_TCFE (0x80000000) - -/* Bit definitions and macros for MCF_DSPI_DTFR */ -#define MCF_DSPI_DTFR_TXDATA(x) (((x)&0xFFFF)<<0) -#define MCF_DSPI_DTFR_CS0 (0x10000) -#define MCF_DSPI_DTFR_CS2 (0x40000) -#define MCF_DSPI_DTFR_CS3 (0x80000) -#define MCF_DSPI_DTFR_CS5 (0x200000) -#define MCF_DSPI_DTFR_CTCNT (0x4000000) -#define MCF_DSPI_DTFR_EOQ (0x8000000) -#define MCF_DSPI_DTFR_CTAS(x) (((x)&0x7)<<0x1C) -#define MCF_DSPI_DTFR_CONT (0x80000000) - -/* Bit definitions and macros for MCF_DSPI_DRFR */ -#define MCF_DSPI_DRFR_RXDATA(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_DSPI_DTFDR */ -#define MCF_DSPI_DTFDR_TXDATA(x) (((x)&0xFFFF)<<0) -#define MCF_DSPI_DTFDR_TXCMD(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_DSPI_DRFDR */ -#define MCF_DSPI_DRFDR_RXDATA(x) (((x)&0xFFFF)<<0) - - -#endif /* __MCF5475_DSPI_H__ */ diff --git a/tos/jtagwait/include/MCF5475_EPORT.h b/tos/jtagwait/include/MCF5475_EPORT.h deleted file mode 100644 index 6506196..0000000 --- a/tos/jtagwait/include/MCF5475_EPORT.h +++ /dev/null @@ -1,123 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_EPORT_H__ -#define __MCF5475_EPORT_H__ - - -/********************************************************************* -* -* Edge Port Module (EPORT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_EPORT_EPPAR (*(volatile uint16_t*)(&_MBAR[0xF00])) -#define MCF_EPORT_EPDDR (*(volatile uint8_t *)(&_MBAR[0xF04])) -#define MCF_EPORT_EPIER (*(volatile uint8_t *)(&_MBAR[0xF05])) -#define MCF_EPORT_EPDR (*(volatile uint8_t *)(&_MBAR[0xF08])) -#define MCF_EPORT_EPPDR (*(volatile uint8_t *)(&_MBAR[0xF09])) -#define MCF_EPORT_EPFR (*(volatile uint8_t *)(&_MBAR[0xF0C])) - - - -/* Bit definitions and macros for MCF_EPORT_EPPAR */ -#define MCF_EPORT_EPPAR_EPPA1(x) (((x)&0x3)<<0x2) -#define MCF_EPORT_EPPAR_EPPA1_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA1_RISING (0x4) -#define MCF_EPORT_EPPAR_EPPA1_FALLING (0x8) -#define MCF_EPORT_EPPAR_EPPA1_BOTH (0xC) -#define MCF_EPORT_EPPAR_EPPA2(x) (((x)&0x3)<<0x4) -#define MCF_EPORT_EPPAR_EPPA2_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA2_RISING (0x10) -#define MCF_EPORT_EPPAR_EPPA2_FALLING (0x20) -#define MCF_EPORT_EPPAR_EPPA2_BOTH (0x30) -#define MCF_EPORT_EPPAR_EPPA3(x) (((x)&0x3)<<0x6) -#define MCF_EPORT_EPPAR_EPPA3_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA3_RISING (0x40) -#define MCF_EPORT_EPPAR_EPPA3_FALLING (0x80) -#define MCF_EPORT_EPPAR_EPPA3_BOTH (0xC0) -#define MCF_EPORT_EPPAR_EPPA4(x) (((x)&0x3)<<0x8) -#define MCF_EPORT_EPPAR_EPPA4_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA4_RISING (0x100) -#define MCF_EPORT_EPPAR_EPPA4_FALLING (0x200) -#define MCF_EPORT_EPPAR_EPPA4_BOTH (0x300) -#define MCF_EPORT_EPPAR_EPPA5(x) (((x)&0x3)<<0xA) -#define MCF_EPORT_EPPAR_EPPA5_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA5_RISING (0x400) -#define MCF_EPORT_EPPAR_EPPA5_FALLING (0x800) -#define MCF_EPORT_EPPAR_EPPA5_BOTH (0xC00) -#define MCF_EPORT_EPPAR_EPPA6(x) (((x)&0x3)<<0xC) -#define MCF_EPORT_EPPAR_EPPA6_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA6_RISING (0x1000) -#define MCF_EPORT_EPPAR_EPPA6_FALLING (0x2000) -#define MCF_EPORT_EPPAR_EPPA6_BOTH (0x3000) -#define MCF_EPORT_EPPAR_EPPA7(x) (((x)&0x3)<<0xE) -#define MCF_EPORT_EPPAR_EPPA7_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA7_RISING (0x4000) -#define MCF_EPORT_EPPAR_EPPA7_FALLING (0x8000) -#define MCF_EPORT_EPPAR_EPPA7_BOTH (0xC000) -#define MCF_EPORT_EPPAR_LEVEL (0) -#define MCF_EPORT_EPPAR_RISING (0x1) -#define MCF_EPORT_EPPAR_FALLING (0x2) -#define MCF_EPORT_EPPAR_BOTH (0x3) - -/* Bit definitions and macros for MCF_EPORT_EPDDR */ -#define MCF_EPORT_EPDDR_EPDD1 (0x2) -#define MCF_EPORT_EPDDR_EPDD2 (0x4) -#define MCF_EPORT_EPDDR_EPDD3 (0x8) -#define MCF_EPORT_EPDDR_EPDD4 (0x10) -#define MCF_EPORT_EPDDR_EPDD5 (0x20) -#define MCF_EPORT_EPDDR_EPDD6 (0x40) -#define MCF_EPORT_EPDDR_EPDD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPIER */ -#define MCF_EPORT_EPIER_EPIE1 (0x2) -#define MCF_EPORT_EPIER_EPIE2 (0x4) -#define MCF_EPORT_EPIER_EPIE3 (0x8) -#define MCF_EPORT_EPIER_EPIE4 (0x10) -#define MCF_EPORT_EPIER_EPIE5 (0x20) -#define MCF_EPORT_EPIER_EPIE6 (0x40) -#define MCF_EPORT_EPIER_EPIE7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPDR */ -#define MCF_EPORT_EPDR_EPD1 (0x2) -#define MCF_EPORT_EPDR_EPD2 (0x4) -#define MCF_EPORT_EPDR_EPD3 (0x8) -#define MCF_EPORT_EPDR_EPD4 (0x10) -#define MCF_EPORT_EPDR_EPD5 (0x20) -#define MCF_EPORT_EPDR_EPD6 (0x40) -#define MCF_EPORT_EPDR_EPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPPDR */ -#define MCF_EPORT_EPPDR_EPPD1 (0x2) -#define MCF_EPORT_EPPDR_EPPD2 (0x4) -#define MCF_EPORT_EPPDR_EPPD3 (0x8) -#define MCF_EPORT_EPPDR_EPPD4 (0x10) -#define MCF_EPORT_EPPDR_EPPD5 (0x20) -#define MCF_EPORT_EPPDR_EPPD6 (0x40) -#define MCF_EPORT_EPPDR_EPPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPFR */ -#define MCF_EPORT_EPFR_EPF1 (0x2) -#define MCF_EPORT_EPFR_EPF2 (0x4) -#define MCF_EPORT_EPFR_EPF3 (0x8) -#define MCF_EPORT_EPFR_EPF4 (0x10) -#define MCF_EPORT_EPFR_EPF5 (0x20) -#define MCF_EPORT_EPFR_EPF6 (0x40) -#define MCF_EPORT_EPFR_EPF7 (0x80) - - -#endif /* __MCF5475_EPORT_H__ */ diff --git a/tos/jtagwait/include/MCF5475_FBCS.h b/tos/jtagwait/include/MCF5475_FBCS.h deleted file mode 100644 index 37daf00..0000000 --- a/tos/jtagwait/include/MCF5475_FBCS.h +++ /dev/null @@ -1,100 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_FBCS_H__ -#define __MCF5475_FBCS_H__ - - -/********************************************************************* -* -* FlexBus Chip Select Module (FBCS) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FBCS0_CSAR (*(volatile uint32_t*)(&_MBAR[0x500])) -#define MCF_FBCS0_CSMR (*(volatile uint32_t*)(&_MBAR[0x504])) -#define MCF_FBCS0_CSCR (*(volatile uint32_t*)(&_MBAR[0x508])) - -#define MCF_FBCS1_CSAR (*(volatile uint32_t*)(&_MBAR[0x50C])) -#define MCF_FBCS1_CSMR (*(volatile uint32_t*)(&_MBAR[0x510])) -#define MCF_FBCS1_CSCR (*(volatile uint32_t*)(&_MBAR[0x514])) - -#define MCF_FBCS2_CSAR (*(volatile uint32_t*)(&_MBAR[0x518])) -#define MCF_FBCS2_CSMR (*(volatile uint32_t*)(&_MBAR[0x51C])) -#define MCF_FBCS2_CSCR (*(volatile uint32_t*)(&_MBAR[0x520])) - -#define MCF_FBCS3_CSAR (*(volatile uint32_t*)(&_MBAR[0x524])) -#define MCF_FBCS3_CSMR (*(volatile uint32_t*)(&_MBAR[0x528])) -#define MCF_FBCS3_CSCR (*(volatile uint32_t*)(&_MBAR[0x52C])) - -#define MCF_FBCS4_CSAR (*(volatile uint32_t*)(&_MBAR[0x530])) -#define MCF_FBCS4_CSMR (*(volatile uint32_t*)(&_MBAR[0x534])) -#define MCF_FBCS4_CSCR (*(volatile uint32_t*)(&_MBAR[0x538])) - -#define MCF_FBCS5_CSAR (*(volatile uint32_t*)(&_MBAR[0x53C])) -#define MCF_FBCS5_CSMR (*(volatile uint32_t*)(&_MBAR[0x540])) -#define MCF_FBCS5_CSCR (*(volatile uint32_t*)(&_MBAR[0x544])) - -#define MCF_FBCS_CSAR(x) (*(volatile uint32_t*)(&_MBAR[0x500 + ((x)*0xC)])) -#define MCF_FBCS_CSMR(x) (*(volatile uint32_t*)(&_MBAR[0x504 + ((x)*0xC)])) -#define MCF_FBCS_CSCR(x) (*(volatile uint32_t*)(&_MBAR[0x508 + ((x)*0xC)])) - - -/* Bit definitions and macros for MCF_FBCS_CSAR */ -#define MCF_FBCS_CSAR_BA(x) ((x)&0xFFFF0000) - -/* Bit definitions and macros for MCF_FBCS_CSMR */ -#define MCF_FBCS_CSMR_V (0x1) -#define MCF_FBCS_CSMR_WP (0x100) -#define MCF_FBCS_CSMR_BAM(x) (((x)&0xFFFF)<<0x10) -#define MCF_FBCS_CSMR_BAM_4G (0xFFFF0000) -#define MCF_FBCS_CSMR_BAM_2G (0x7FFF0000) -#define MCF_FBCS_CSMR_BAM_1G (0x3FFF0000) -#define MCF_FBCS_CSMR_BAM_1024M (0x3FFF0000) -#define MCF_FBCS_CSMR_BAM_512M (0x1FFF0000) -#define MCF_FBCS_CSMR_BAM_256M (0xFFF0000) -#define MCF_FBCS_CSMR_BAM_128M (0x7FF0000) -#define MCF_FBCS_CSMR_BAM_64M (0x3FF0000) -#define MCF_FBCS_CSMR_BAM_32M (0x1FF0000) -#define MCF_FBCS_CSMR_BAM_16M (0xFF0000) -#define MCF_FBCS_CSMR_BAM_8M (0x7F0000) -#define MCF_FBCS_CSMR_BAM_4M (0x3F0000) -#define MCF_FBCS_CSMR_BAM_2M (0x1F0000) -#define MCF_FBCS_CSMR_BAM_1M (0xF0000) -#define MCF_FBCS_CSMR_BAM_1024K (0xF0000) -#define MCF_FBCS_CSMR_BAM_512K (0x70000) -#define MCF_FBCS_CSMR_BAM_256K (0x30000) -#define MCF_FBCS_CSMR_BAM_128K (0x10000) -#define MCF_FBCS_CSMR_BAM_64K (0) - -/* Bit definitions and macros for MCF_FBCS_CSCR */ -#define MCF_FBCS_CSCR_BSTW (0x8) -#define MCF_FBCS_CSCR_BSTR (0x10) -#define MCF_FBCS_CSCR_BEM (0x20) -#define MCF_FBCS_CSCR_PS(x) (((x)&0x3)<<0x6) -#define MCF_FBCS_CSCR_PS_32 (0) -#define MCF_FBCS_CSCR_PS_8 (0x40) -#define MCF_FBCS_CSCR_PS_16 (0x80) -#define MCF_FBCS_CSCR_AA (0x100) -#define MCF_FBCS_CSCR_WS(x) (((x)&0x3F)<<0xA) -#define MCF_FBCS_CSCR_WRAH(x) (((x)&0x3)<<0x10) -#define MCF_FBCS_CSCR_RDAH(x) (((x)&0x3)<<0x12) -#define MCF_FBCS_CSCR_ASET(x) (((x)&0x3)<<0x14) -#define MCF_FBCS_CSCR_SWSEN (0x800000) -#define MCF_FBCS_CSCR_SWS(x) (((x)&0x3F)<<0x1A) - - -#endif /* __MCF5475_FBCS_H__ */ diff --git a/tos/jtagwait/include/MCF5475_FEC.h b/tos/jtagwait/include/MCF5475_FEC.h deleted file mode 100644 index fdd9403..0000000 --- a/tos/jtagwait/include/MCF5475_FEC.h +++ /dev/null @@ -1,680 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_FEC_H__ -#define __MCF5475_FEC_H__ - - -/********************************************************************* -* -* Fast Ethernet Controller(FEC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FEC0_EIR (*(volatile uint32_t*)(&_MBAR[0x9004])) -#define MCF_FEC0_EIMR (*(volatile uint32_t*)(&_MBAR[0x9008])) -#define MCF_FEC0_ECR (*(volatile uint32_t*)(&_MBAR[0x9024])) -#define MCF_FEC0_MMFR (*(volatile uint32_t*)(&_MBAR[0x9040])) -#define MCF_FEC0_MSCR (*(volatile uint32_t*)(&_MBAR[0x9044])) -#define MCF_FEC0_MIBC (*(volatile uint32_t*)(&_MBAR[0x9064])) -#define MCF_FEC0_RCR (*(volatile uint32_t*)(&_MBAR[0x9084])) -#define MCF_FEC0_RHR (*(volatile uint32_t*)(&_MBAR[0x9088])) -#define MCF_FEC0_TCR (*(volatile uint32_t*)(&_MBAR[0x90C4])) -#define MCF_FEC0_PALR (*(volatile uint32_t*)(&_MBAR[0x90E4])) -#define MCF_FEC0_PAHR (*(volatile uint32_t*)(&_MBAR[0x90E8])) -#define MCF_FEC0_OPD (*(volatile uint32_t*)(&_MBAR[0x90EC])) -#define MCF_FEC0_IAUR (*(volatile uint32_t*)(&_MBAR[0x9118])) -#define MCF_FEC0_IALR (*(volatile uint32_t*)(&_MBAR[0x911C])) -#define MCF_FEC0_GAUR (*(volatile uint32_t*)(&_MBAR[0x9120])) -#define MCF_FEC0_GALR (*(volatile uint32_t*)(&_MBAR[0x9124])) -#define MCF_FEC0_FECTFWR (*(volatile uint32_t*)(&_MBAR[0x9144])) -#define MCF_FEC0_FECRFDR (*(volatile uint32_t*)(&_MBAR[0x9184])) -#define MCF_FEC0_FECRFSR (*(volatile uint32_t*)(&_MBAR[0x9188])) -#define MCF_FEC0_FECRFCR (*(volatile uint32_t*)(&_MBAR[0x918C])) -#define MCF_FEC0_FECRLRFP (*(volatile uint32_t*)(&_MBAR[0x9190])) -#define MCF_FEC0_FECRLWFP (*(volatile uint32_t*)(&_MBAR[0x9194])) -#define MCF_FEC0_FECRFAR (*(volatile uint32_t*)(&_MBAR[0x9198])) -#define MCF_FEC0_FECRFRP (*(volatile uint32_t*)(&_MBAR[0x919C])) -#define MCF_FEC0_FECRFWP (*(volatile uint32_t*)(&_MBAR[0x91A0])) -#define MCF_FEC0_FECTFDR (*(volatile uint32_t*)(&_MBAR[0x91A4])) -#define MCF_FEC0_FECTFSR (*(volatile uint32_t*)(&_MBAR[0x91A8])) -#define MCF_FEC0_FECTFCR (*(volatile uint32_t*)(&_MBAR[0x91AC])) -#define MCF_FEC0_FECTLRFP (*(volatile uint32_t*)(&_MBAR[0x91B0])) -#define MCF_FEC0_FECTLWFP (*(volatile uint32_t*)(&_MBAR[0x91B4])) -#define MCF_FEC0_FECTFAR (*(volatile uint32_t*)(&_MBAR[0x91B8])) -#define MCF_FEC0_FECTFRP (*(volatile uint32_t*)(&_MBAR[0x91BC])) -#define MCF_FEC0_FECTFWP (*(volatile uint32_t*)(&_MBAR[0x91C0])) -#define MCF_FEC0_FECFRST (*(volatile uint32_t*)(&_MBAR[0x91C4])) -#define MCF_FEC0_FECCTCWR (*(volatile uint32_t*)(&_MBAR[0x91C8])) -#define MCF_FEC0_RMON_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9200])) -#define MCF_FEC0_RMON_T_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9204])) -#define MCF_FEC0_RMON_T_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9208])) -#define MCF_FEC0_RMON_T_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x920C])) -#define MCF_FEC0_RMON_T_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9210])) -#define MCF_FEC0_RMON_T_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9214])) -#define MCF_FEC0_RMON_T_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9218])) -#define MCF_FEC0_RMON_T_FRAG (*(volatile uint32_t*)(&_MBAR[0x921C])) -#define MCF_FEC0_RMON_T_JAB (*(volatile uint32_t*)(&_MBAR[0x9220])) -#define MCF_FEC0_RMON_T_COL (*(volatile uint32_t*)(&_MBAR[0x9224])) -#define MCF_FEC0_RMON_T_P64 (*(volatile uint32_t*)(&_MBAR[0x9228])) -#define MCF_FEC0_RMON_T_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x922C])) -#define MCF_FEC0_RMON_T_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x9230])) -#define MCF_FEC0_RMON_T_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x9234])) -#define MCF_FEC0_RMON_T_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x9238])) -#define MCF_FEC0_RMON_T_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x923C])) -#define MCF_FEC0_RMON_T_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x9240])) -#define MCF_FEC0_RMON_T_OCTETS (*(volatile uint32_t*)(&_MBAR[0x9244])) -#define MCF_FEC0_IEEE_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9248])) -#define MCF_FEC0_IEEE_T_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x924C])) -#define MCF_FEC0_IEEE_T_1COL (*(volatile uint32_t*)(&_MBAR[0x9250])) -#define MCF_FEC0_IEEE_T_MCOL (*(volatile uint32_t*)(&_MBAR[0x9254])) -#define MCF_FEC0_IEEE_T_DEF (*(volatile uint32_t*)(&_MBAR[0x9258])) -#define MCF_FEC0_IEEE_T_LCOL (*(volatile uint32_t*)(&_MBAR[0x925C])) -#define MCF_FEC0_IEEE_T_EXCOL (*(volatile uint32_t*)(&_MBAR[0x9260])) -#define MCF_FEC0_IEEE_T_MACERR (*(volatile uint32_t*)(&_MBAR[0x9264])) -#define MCF_FEC0_IEEE_T_CSERR (*(volatile uint32_t*)(&_MBAR[0x9268])) -#define MCF_FEC0_IEEE_T_SQE (*(volatile uint32_t*)(&_MBAR[0x926C])) -#define MCF_FEC0_IEEE_T_FDXFC (*(volatile uint32_t*)(&_MBAR[0x9270])) -#define MCF_FEC0_IEEE_T_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x9274])) -#define MCF_FEC0_RMON_R_DROP (*(volatile uint32_t*)(&_MBAR[0x9280])) -#define MCF_FEC0_RMON_R_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9284])) -#define MCF_FEC0_RMON_R_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9288])) -#define MCF_FEC0_RMON_R_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x928C])) -#define MCF_FEC0_RMON_R_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9290])) -#define MCF_FEC0_RMON_R_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9294])) -#define MCF_FEC0_RMON_R_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9298])) -#define MCF_FEC0_RMON_R_FRAG (*(volatile uint32_t*)(&_MBAR[0x929C])) -#define MCF_FEC0_RMON_R_JAB (*(volatile uint32_t*)(&_MBAR[0x92A0])) -#define MCF_FEC0_RMON_R_RESVD_0 (*(volatile uint32_t*)(&_MBAR[0x92A4])) -#define MCF_FEC0_RMON_R_P64 (*(volatile uint32_t*)(&_MBAR[0x92A8])) -#define MCF_FEC0_RMON_R_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x92AC])) -#define MCF_FEC0_RMON_R_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x92B0])) -#define MCF_FEC0_RMON_R_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x92B4])) -#define MCF_FEC0_RMON_R_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x92B8])) -#define MCF_FEC0_RMON_R_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x92BC])) -#define MCF_FEC0_RMON_R_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x92C0])) -#define MCF_FEC0_RMON_R_OCTETS (*(volatile uint32_t*)(&_MBAR[0x92C4])) -#define MCF_FEC0_IEEE_R_DROP (*(volatile uint32_t*)(&_MBAR[0x92C8])) -#define MCF_FEC0_IEEE_R_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x92CC])) -#define MCF_FEC0_IEEE_R_CRC (*(volatile uint32_t*)(&_MBAR[0x92D0])) -#define MCF_FEC0_IEEE_R_ALIGN (*(volatile uint32_t*)(&_MBAR[0x92D4])) -#define MCF_FEC0_IEEE_R_MACERR (*(volatile uint32_t*)(&_MBAR[0x92D8])) -#define MCF_FEC0_IEEE_R_FDXFC (*(volatile uint32_t*)(&_MBAR[0x92DC])) -#define MCF_FEC0_IEEE_R_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x92E0])) - -#define MCF_FEC1_EIR (*(volatile uint32_t*)(&_MBAR[0x9804])) -#define MCF_FEC1_EIMR (*(volatile uint32_t*)(&_MBAR[0x9808])) -#define MCF_FEC1_ECR (*(volatile uint32_t*)(&_MBAR[0x9824])) -#define MCF_FEC1_MMFR (*(volatile uint32_t*)(&_MBAR[0x9840])) -#define MCF_FEC1_MSCR (*(volatile uint32_t*)(&_MBAR[0x9844])) -#define MCF_FEC1_MIBC (*(volatile uint32_t*)(&_MBAR[0x9864])) -#define MCF_FEC1_RCR (*(volatile uint32_t*)(&_MBAR[0x9884])) -#define MCF_FEC1_RHR (*(volatile uint32_t*)(&_MBAR[0x9888])) -#define MCF_FEC1_TCR (*(volatile uint32_t*)(&_MBAR[0x98C4])) -#define MCF_FEC1_PALR (*(volatile uint32_t*)(&_MBAR[0x98E4])) -#define MCF_FEC1_PAHR (*(volatile uint32_t*)(&_MBAR[0x98E8])) -#define MCF_FEC1_OPD (*(volatile uint32_t*)(&_MBAR[0x98EC])) -#define MCF_FEC1_IAUR (*(volatile uint32_t*)(&_MBAR[0x9918])) -#define MCF_FEC1_IALR (*(volatile uint32_t*)(&_MBAR[0x991C])) -#define MCF_FEC1_GAUR (*(volatile uint32_t*)(&_MBAR[0x9920])) -#define MCF_FEC1_GALR (*(volatile uint32_t*)(&_MBAR[0x9924])) -#define MCF_FEC1_FECTFWR (*(volatile uint32_t*)(&_MBAR[0x9944])) -#define MCF_FEC1_FECRFDR (*(volatile uint32_t*)(&_MBAR[0x9984])) -#define MCF_FEC1_FECRFSR (*(volatile uint32_t*)(&_MBAR[0x9988])) -#define MCF_FEC1_FECRFCR (*(volatile uint32_t*)(&_MBAR[0x998C])) -#define MCF_FEC1_FECRLRFP (*(volatile uint32_t*)(&_MBAR[0x9990])) -#define MCF_FEC1_FECRLWFP (*(volatile uint32_t*)(&_MBAR[0x9994])) -#define MCF_FEC1_FECRFAR (*(volatile uint32_t*)(&_MBAR[0x9998])) -#define MCF_FEC1_FECRFRP (*(volatile uint32_t*)(&_MBAR[0x999C])) -#define MCF_FEC1_FECRFWP (*(volatile uint32_t*)(&_MBAR[0x99A0])) -#define MCF_FEC1_FECTFDR (*(volatile uint32_t*)(&_MBAR[0x99A4])) -#define MCF_FEC1_FECTFSR (*(volatile uint32_t*)(&_MBAR[0x99A8])) -#define MCF_FEC1_FECTFCR (*(volatile uint32_t*)(&_MBAR[0x99AC])) -#define MCF_FEC1_FECTLRFP (*(volatile uint32_t*)(&_MBAR[0x99B0])) -#define MCF_FEC1_FECTLWFP (*(volatile uint32_t*)(&_MBAR[0x99B4])) -#define MCF_FEC1_FECTFAR (*(volatile uint32_t*)(&_MBAR[0x99B8])) -#define MCF_FEC1_FECTFRP (*(volatile uint32_t*)(&_MBAR[0x99BC])) -#define MCF_FEC1_FECTFWP (*(volatile uint32_t*)(&_MBAR[0x99C0])) -#define MCF_FEC1_FECFRST (*(volatile uint32_t*)(&_MBAR[0x99C4])) -#define MCF_FEC1_FECCTCWR (*(volatile uint32_t*)(&_MBAR[0x99C8])) -#define MCF_FEC1_RMON_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9A00])) -#define MCF_FEC1_RMON_T_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9A04])) -#define MCF_FEC1_RMON_T_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A08])) -#define MCF_FEC1_RMON_T_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A0C])) -#define MCF_FEC1_RMON_T_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9A10])) -#define MCF_FEC1_RMON_T_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A14])) -#define MCF_FEC1_RMON_T_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A18])) -#define MCF_FEC1_RMON_T_FRAG (*(volatile uint32_t*)(&_MBAR[0x9A1C])) -#define MCF_FEC1_RMON_T_JAB (*(volatile uint32_t*)(&_MBAR[0x9A20])) -#define MCF_FEC1_RMON_T_COL (*(volatile uint32_t*)(&_MBAR[0x9A24])) -#define MCF_FEC1_RMON_T_P64 (*(volatile uint32_t*)(&_MBAR[0x9A28])) -#define MCF_FEC1_RMON_T_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x9A2C])) -#define MCF_FEC1_RMON_T_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x9A30])) -#define MCF_FEC1_RMON_T_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x9A34])) -#define MCF_FEC1_RMON_T_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x9A38])) -#define MCF_FEC1_RMON_T_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x9A3C])) -#define MCF_FEC1_RMON_T_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x9A40])) -#define MCF_FEC1_RMON_T_OCTETS (*(volatile uint32_t*)(&_MBAR[0x9A44])) -#define MCF_FEC1_IEEE_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9A48])) -#define MCF_FEC1_IEEE_T_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x9A4C])) -#define MCF_FEC1_IEEE_T_1COL (*(volatile uint32_t*)(&_MBAR[0x9A50])) -#define MCF_FEC1_IEEE_T_MCOL (*(volatile uint32_t*)(&_MBAR[0x9A54])) -#define MCF_FEC1_IEEE_T_DEF (*(volatile uint32_t*)(&_MBAR[0x9A58])) -#define MCF_FEC1_IEEE_T_LCOL (*(volatile uint32_t*)(&_MBAR[0x9A5C])) -#define MCF_FEC1_IEEE_T_EXCOL (*(volatile uint32_t*)(&_MBAR[0x9A60])) -#define MCF_FEC1_IEEE_T_MACERR (*(volatile uint32_t*)(&_MBAR[0x9A64])) -#define MCF_FEC1_IEEE_T_CSERR (*(volatile uint32_t*)(&_MBAR[0x9A68])) -#define MCF_FEC1_IEEE_T_SQE (*(volatile uint32_t*)(&_MBAR[0x9A6C])) -#define MCF_FEC1_IEEE_T_FDXFC (*(volatile uint32_t*)(&_MBAR[0x9A70])) -#define MCF_FEC1_IEEE_T_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x9A74])) -#define MCF_FEC1_RMON_R_DROP (*(volatile uint32_t*)(&_MBAR[0x9A80])) -#define MCF_FEC1_RMON_R_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9A84])) -#define MCF_FEC1_RMON_R_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A88])) -#define MCF_FEC1_RMON_R_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A8C])) -#define MCF_FEC1_RMON_R_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9A90])) -#define MCF_FEC1_RMON_R_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A94])) -#define MCF_FEC1_RMON_R_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A98])) -#define MCF_FEC1_RMON_R_FRAG (*(volatile uint32_t*)(&_MBAR[0x9A9C])) -#define MCF_FEC1_RMON_R_JAB (*(volatile uint32_t*)(&_MBAR[0x9AA0])) -#define MCF_FEC1_RMON_R_RESVD_0 (*(volatile uint32_t*)(&_MBAR[0x9AA4])) -#define MCF_FEC1_RMON_R_P64 (*(volatile uint32_t*)(&_MBAR[0x9AA8])) -#define MCF_FEC1_RMON_R_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x9AAC])) -#define MCF_FEC1_RMON_R_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x9AB0])) -#define MCF_FEC1_RMON_R_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x9AB4])) -#define MCF_FEC1_RMON_R_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x9AB8])) -#define MCF_FEC1_RMON_R_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x9ABC])) -#define MCF_FEC1_RMON_R_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x9AC0])) -#define MCF_FEC1_RMON_R_OCTETS (*(volatile uint32_t*)(&_MBAR[0x9AC4])) -#define MCF_FEC1_IEEE_R_DROP (*(volatile uint32_t*)(&_MBAR[0x9AC8])) -#define MCF_FEC1_IEEE_R_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x9ACC])) -#define MCF_FEC1_IEEE_R_CRC (*(volatile uint32_t*)(&_MBAR[0x9AD0])) -#define MCF_FEC1_IEEE_R_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9AD4])) -#define MCF_FEC1_IEEE_R_MACERR (*(volatile uint32_t*)(&_MBAR[0x9AD8])) -#define MCF_FEC1_IEEE_R_FDXFC (*(volatile uint32_t*)(&_MBAR[0x9ADC])) -#define MCF_FEC1_IEEE_R_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x9AE0])) - -#define MCF_FEC_EIR(x) (*(volatile uint32_t*)(&_MBAR[0x9004 + ((x)*0x800)])) -#define MCF_FEC_EIMR(x) (*(volatile uint32_t*)(&_MBAR[0x9008 + ((x)*0x800)])) -#define MCF_FEC_ECR(x) (*(volatile uint32_t*)(&_MBAR[0x9024 + ((x)*0x800)])) -#define MCF_FEC_MMFR(x) (*(volatile uint32_t*)(&_MBAR[0x9040 + ((x)*0x800)])) -#define MCF_FEC_MSCR(x) (*(volatile uint32_t*)(&_MBAR[0x9044 + ((x)*0x800)])) -#define MCF_FEC_MIBC(x) (*(volatile uint32_t*)(&_MBAR[0x9064 + ((x)*0x800)])) -#define MCF_FEC_RCR(x) (*(volatile uint32_t*)(&_MBAR[0x9084 + ((x)*0x800)])) -#define MCF_FEC_RHR(x) (*(volatile uint32_t*)(&_MBAR[0x9088 + ((x)*0x800)])) -#define MCF_FEC_TCR(x) (*(volatile uint32_t*)(&_MBAR[0x90C4 + ((x)*0x800)])) -#define MCF_FEC_PALR(x) (*(volatile uint32_t*)(&_MBAR[0x90E4 + ((x)*0x800)])) -#define MCF_FEC_PAHR(x) (*(volatile uint32_t*)(&_MBAR[0x90E8 + ((x)*0x800)])) -#define MCF_FEC_OPD(x) (*(volatile uint32_t*)(&_MBAR[0x90EC + ((x)*0x800)])) -#define MCF_FEC_IAUR(x) (*(volatile uint32_t*)(&_MBAR[0x9118 + ((x)*0x800)])) -#define MCF_FEC_IALR(x) (*(volatile uint32_t*)(&_MBAR[0x911C + ((x)*0x800)])) -#define MCF_FEC_GAUR(x) (*(volatile uint32_t*)(&_MBAR[0x9120 + ((x)*0x800)])) -#define MCF_FEC_GALR(x) (*(volatile uint32_t*)(&_MBAR[0x9124 + ((x)*0x800)])) -#define MCF_FEC_FECTFWR(x) (*(volatile uint32_t*)(&_MBAR[0x9144 + ((x)*0x800)])) -#define MCF_FEC_FECRFDR(x) (*(volatile uint32_t*)(&_MBAR[0x9184 + ((x)*0x800)])) -#define MCF_FEC_FECRFSR(x) (*(volatile uint32_t*)(&_MBAR[0x9188 + ((x)*0x800)])) -#define MCF_FEC_FECRFCR(x) (*(volatile uint32_t*)(&_MBAR[0x918C + ((x)*0x800)])) -#define MCF_FEC_FECRLRFP(x) (*(volatile uint32_t*)(&_MBAR[0x9190 + ((x)*0x800)])) -#define MCF_FEC_FECRLWFP(x) (*(volatile uint32_t*)(&_MBAR[0x9194 + ((x)*0x800)])) -#define MCF_FEC_FECRFAR(x) (*(volatile uint32_t*)(&_MBAR[0x9198 + ((x)*0x800)])) -#define MCF_FEC_FECRFRP(x) (*(volatile uint32_t*)(&_MBAR[0x919C + ((x)*0x800)])) -#define MCF_FEC_FECRFWP(x) (*(volatile uint32_t*)(&_MBAR[0x91A0 + ((x)*0x800)])) -#define MCF_FEC_FECTFDR(x) (*(volatile uint32_t*)(&_MBAR[0x91A4 + ((x)*0x800)])) -#define MCF_FEC_FECTFSR(x) (*(volatile uint32_t*)(&_MBAR[0x91A8 + ((x)*0x800)])) -#define MCF_FEC_FECTFCR(x) (*(volatile uint32_t*)(&_MBAR[0x91AC + ((x)*0x800)])) -#define MCF_FEC_FECTLRFP(x) (*(volatile uint32_t*)(&_MBAR[0x91B0 + ((x)*0x800)])) -#define MCF_FEC_FECTLWFP(x) (*(volatile uint32_t*)(&_MBAR[0x91B4 + ((x)*0x800)])) -#define MCF_FEC_FECTFAR(x) (*(volatile uint32_t*)(&_MBAR[0x91B8 + ((x)*0x800)])) -#define MCF_FEC_FECTFRP(x) (*(volatile uint32_t*)(&_MBAR[0x91BC + ((x)*0x800)])) -#define MCF_FEC_FECTFWP(x) (*(volatile uint32_t*)(&_MBAR[0x91C0 + ((x)*0x800)])) -#define MCF_FEC_FECFRST(x) (*(volatile uint32_t*)(&_MBAR[0x91C4 + ((x)*0x800)])) -#define MCF_FEC_FECCTCWR(x) (*(volatile uint32_t*)(&_MBAR[0x91C8 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x9200 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_PACKETS(x) (*(volatile uint32_t*)(&_MBAR[0x9204 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_BC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x9208 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_MC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x920C + ((x)*0x800)])) -#define MCF_FEC_RMON_T_CRC_ALIGN(x) (*(volatile uint32_t*)(&_MBAR[0x9210 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_UNDERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9214 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_OVERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9218 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_FRAG(x) (*(volatile uint32_t*)(&_MBAR[0x921C + ((x)*0x800)])) -#define MCF_FEC_RMON_T_JAB(x) (*(volatile uint32_t*)(&_MBAR[0x9220 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_COL(x) (*(volatile uint32_t*)(&_MBAR[0x9224 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P64(x) (*(volatile uint32_t*)(&_MBAR[0x9228 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P65TO127(x) (*(volatile uint32_t*)(&_MBAR[0x922C + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P128TO255(x) (*(volatile uint32_t*)(&_MBAR[0x9230 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P256TO511(x) (*(volatile uint32_t*)(&_MBAR[0x9234 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P512TO1023(x) (*(volatile uint32_t*)(&_MBAR[0x9238 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P1024TO2047(x) (*(volatile uint32_t*)(&_MBAR[0x923C + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P_GTE2048(x) (*(volatile uint32_t*)(&_MBAR[0x9240 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_OCTETS(x) (*(volatile uint32_t*)(&_MBAR[0x9244 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x9248 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_FRAME_OK(x) (*(volatile uint32_t*)(&_MBAR[0x924C + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_1COL(x) (*(volatile uint32_t*)(&_MBAR[0x9250 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_MCOL(x) (*(volatile uint32_t*)(&_MBAR[0x9254 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_DEF(x) (*(volatile uint32_t*)(&_MBAR[0x9258 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_LCOL(x) (*(volatile uint32_t*)(&_MBAR[0x925C + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_EXCOL(x) (*(volatile uint32_t*)(&_MBAR[0x9260 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_MACERR(x) (*(volatile uint32_t*)(&_MBAR[0x9264 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_CSERR(x) (*(volatile uint32_t*)(&_MBAR[0x9268 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_SQE(x) (*(volatile uint32_t*)(&_MBAR[0x926C + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_FDXFC(x) (*(volatile uint32_t*)(&_MBAR[0x9270 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_OCTETS_OK(x) (*(volatile uint32_t*)(&_MBAR[0x9274 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x9280 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_PACKETS(x) (*(volatile uint32_t*)(&_MBAR[0x9284 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_BC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x9288 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_MC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x928C + ((x)*0x800)])) -#define MCF_FEC_RMON_R_CRC_ALIGN(x) (*(volatile uint32_t*)(&_MBAR[0x9290 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_UNDERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9294 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_OVERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9298 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_FRAG(x) (*(volatile uint32_t*)(&_MBAR[0x929C + ((x)*0x800)])) -#define MCF_FEC_RMON_R_JAB(x) (*(volatile uint32_t*)(&_MBAR[0x92A0 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_RESVD_0(x) (*(volatile uint32_t*)(&_MBAR[0x92A4 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P64(x) (*(volatile uint32_t*)(&_MBAR[0x92A8 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P65TO127(x) (*(volatile uint32_t*)(&_MBAR[0x92AC + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P128TO255(x) (*(volatile uint32_t*)(&_MBAR[0x92B0 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P256TO511(x) (*(volatile uint32_t*)(&_MBAR[0x92B4 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P512TO1023(x) (*(volatile uint32_t*)(&_MBAR[0x92B8 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P1024TO2047(x) (*(volatile uint32_t*)(&_MBAR[0x92BC + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P_GTE2048(x) (*(volatile uint32_t*)(&_MBAR[0x92C0 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_OCTETS(x) (*(volatile uint32_t*)(&_MBAR[0x92C4 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x92C8 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_FRAME_OK(x) (*(volatile uint32_t*)(&_MBAR[0x92CC + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_CRC(x) (*(volatile uint32_t*)(&_MBAR[0x92D0 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_ALIGN(x) (*(volatile uint32_t*)(&_MBAR[0x92D4 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_MACERR(x) (*(volatile uint32_t*)(&_MBAR[0x92D8 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_FDXFC(x) (*(volatile uint32_t*)(&_MBAR[0x92DC + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_OCTETS_OK(x) (*(volatile uint32_t*)(&_MBAR[0x92E0 + ((x)*0x800)])) - - -/* Bit definitions and macros for MCF_FEC_EIR */ -#define MCF_FEC_EIR_RFERR (0x20000) -#define MCF_FEC_EIR_XFERR (0x40000) -#define MCF_FEC_EIR_XFUN (0x80000) -#define MCF_FEC_EIR_RL (0x100000) -#define MCF_FEC_EIR_LC (0x200000) -#define MCF_FEC_EIR_MII (0x800000) -#define MCF_FEC_EIR_TXF (0x8000000) -#define MCF_FEC_EIR_GRA (0x10000000) -#define MCF_FEC_EIR_BABT (0x20000000) -#define MCF_FEC_EIR_BABR (0x40000000) -#define MCF_FEC_EIR_HBERR (0x80000000) -#define MCF_FEC_EIR_CLEAR_ALL (0xFFFFFFFF) - -/* Bit definitions and macros for MCF_FEC_EIMR */ -#define MCF_FEC_EIMR_RFERR (0x20000) -#define MCF_FEC_EIMR_XFERR (0x40000) -#define MCF_FEC_EIMR_XFUN (0x80000) -#define MCF_FEC_EIMR_RL (0x100000) -#define MCF_FEC_EIMR_LC (0x200000) -#define MCF_FEC_EIMR_MII (0x800000) -#define MCF_FEC_EIMR_TXF (0x8000000) -#define MCF_FEC_EIMR_GRA (0x10000000) -#define MCF_FEC_EIMR_BABT (0x20000000) -#define MCF_FEC_EIMR_BABR (0x40000000) -#define MCF_FEC_EIMR_HBERR (0x80000000) -#define MCF_FEC_EIMR_MASK_ALL (0) -#define MCF_FEC_EIMR_UNMASK_ALL (0xFFFFFFFF) - -/* Bit definitions and macros for MCF_FEC_ECR */ -#define MCF_FEC_ECR_RESET (0x1) -#define MCF_FEC_ECR_ETHER_EN (0x2) - -/* Bit definitions and macros for MCF_FEC_MMFR */ -#define MCF_FEC_MMFR_DATA(x) (((x)&0xFFFF)<<0) -#define MCF_FEC_MMFR_TA(x) (((x)&0x3)<<0x10) -#define MCF_FEC_MMFR_TA_10 (0x20000) -#define MCF_FEC_MMFR_RA(x) (((x)&0x1F)<<0x12) -#define MCF_FEC_MMFR_PA(x) (((x)&0x1F)<<0x17) -#define MCF_FEC_MMFR_OP(x) (((x)&0x3)<<0x1C) -#define MCF_FEC_MMFR_OP_READ (0x20000000) -#define MCF_FEC_MMFR_OP_WRITE (0x10000000) -#define MCF_FEC_MMFR_ST(x) (((x)&0x3)<<0x1E) -#define MCF_FEC_MMFR_ST_01 (0x40000000) - -/* Bit definitions and macros for MCF_FEC_MSCR */ -#define MCF_FEC_MSCR_MII_SPEED(x) (((x)&0x3F)<<0x1) -#define MCF_FEC_MSCR_DIS_PREAMBLE (0x80) -#define MCF_FEC_MSCR_MII_SPEED_133 (0x1B<<0x1) -#define MCF_FEC_MSCR_MII_SPEED_120 (0x18<<0x1) -#define MCF_FEC_MSCR_MII_SPEED_66 (0xE<<0x1) -#define MCF_FEC_MSCR_MII_SPEED_60 (0xC<<0x1) - -/* Bit definitions and macros for MCF_FEC_MIBC */ -#define MCF_FEC_MIBC_MIB_IDLE (0x40000000) -#define MCF_FEC_MIBC_MIB_DISABLE (0x80000000) - -/* Bit definitions and macros for MCF_FEC_RCR */ -#define MCF_FEC_RCR_LOOP (0x1) -#define MCF_FEC_RCR_DRT (0x2) -#define MCF_FEC_RCR_MII_MODE (0x4) -#define MCF_FEC_RCR_PROM (0x8) -#define MCF_FEC_RCR_BC_REJ (0x10) -#define MCF_FEC_RCR_FCE (0x20) -#define MCF_FEC_RCR_MAX_FL(x) (((x)&0x7FF)<<0x10) - -/* Bit definitions and macros for MCF_FEC_RHR */ -#define MCF_FEC_RHR_HASH(x) (((x)&0x3F)<<0x18) -#define MCF_FEC_RHR_MULTCAST (0x40000000) -#define MCF_FEC_RHR_FCE (0x80000000) - -/* Bit definitions and macros for MCF_FEC_TCR */ -#define MCF_FEC_TCR_GTS (0x1) -#define MCF_FEC_TCR_HBC (0x2) -#define MCF_FEC_TCR_FDEN (0x4) -#define MCF_FEC_TCR_TFC_PAUSE (0x8) -#define MCF_FEC_TCR_RFC_PAUSE (0x10) - -/* Bit definitions and macros for MCF_FEC_PALR */ -#define MCF_FEC_PALR_PADDR1(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_PAHR */ -#define MCF_FEC_PAHR_TYPE(x) (((x)&0xFFFF)<<0) -#define MCF_FEC_PAHR_PADDR2(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_FEC_OPD */ -#define MCF_FEC_OPD_PAUSE_DUR(x) (((x)&0xFFFF)<<0) -#define MCF_FEC_OPD_OPCODE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_FEC_IAUR */ -#define MCF_FEC_IAUR_IADDR1(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IALR */ -#define MCF_FEC_IALR_IADDR2(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_GAUR */ -#define MCF_FEC_GAUR_GADDR1(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_GALR */ -#define MCF_FEC_GALR_GADDR2(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFWR */ -#define MCF_FEC_FECTFWR_X_WMRK(x) (((x)&0xF)<<0) -#define MCF_FEC_FECTFWR_X_WMRK_64 (0) -#define MCF_FEC_FECTFWR_X_WMRK_128 (0x1) -#define MCF_FEC_FECTFWR_X_WMRK_192 (0x2) -#define MCF_FEC_FECTFWR_X_WMRK_256 (0x3) -#define MCF_FEC_FECTFWR_X_WMRK_320 (0x4) -#define MCF_FEC_FECTFWR_X_WMRK_384 (0x5) -#define MCF_FEC_FECTFWR_X_WMRK_448 (0x6) -#define MCF_FEC_FECTFWR_X_WMRK_512 (0x7) -#define MCF_FEC_FECTFWR_X_WMRK_576 (0x8) -#define MCF_FEC_FECTFWR_X_WMRK_640 (0x9) -#define MCF_FEC_FECTFWR_X_WMRK_704 (0xA) -#define MCF_FEC_FECTFWR_X_WMRK_768 (0xB) -#define MCF_FEC_FECTFWR_X_WMRK_832 (0xC) -#define MCF_FEC_FECTFWR_X_WMRK_896 (0xD) -#define MCF_FEC_FECTFWR_X_WMRK_960 (0xE) -#define MCF_FEC_FECTFWR_X_WMRK_1024 (0xF) - -/* Bit definitions and macros for MCF_FEC_FECRFDR */ -#define MCF_FEC_FECRFDR_FIFO_DATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRFSR */ -#define MCF_FEC_FECRFSR_EMT (0x10000) -#define MCF_FEC_FECRFSR_ALARM (0x20000) -#define MCF_FEC_FECRFSR_FU (0x40000) -#define MCF_FEC_FECRFSR_FRMRDY (0x80000) -#define MCF_FEC_FECRFSR_OF (0x100000) -#define MCF_FEC_FECRFSR_UF (0x200000) -#define MCF_FEC_FECRFSR_RXW (0x400000) -#define MCF_FEC_FECRFSR_FAE (0x800000) -#define MCF_FEC_FECRFSR_FRM(x) (((x)&0xF)<<0x18) -#define MCF_FEC_FECRFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_FEC_FECRFCR */ -#define MCF_FEC_FECRFCR_COUNTER(x) (((x)&0xFFFF)<<0) -#define MCF_FEC_FECRFCR_OF_MSK (0x80000) -#define MCF_FEC_FECRFCR_UF_MSK (0x100000) -#define MCF_FEC_FECRFCR_RXW_MSK (0x200000) -#define MCF_FEC_FECRFCR_FAE_MSK (0x400000) -#define MCF_FEC_FECRFCR_IP_MSK (0x800000) -#define MCF_FEC_FECRFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_FEC_FECRFCR_FRMEN (0x8000000) -#define MCF_FEC_FECRFCR_TIMER (0x10000000) - -/* Bit definitions and macros for MCF_FEC_FECRLRFP */ -#define MCF_FEC_FECRLRFP_LRFP(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRLWFP */ -#define MCF_FEC_FECRLWFP_LWFP(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRFAR */ -#define MCF_FEC_FECRFAR_ALARM(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRFRP */ -#define MCF_FEC_FECRFRP_READ(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRFWP */ -#define MCF_FEC_FECRFWP_WRITE(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFDR */ -#define MCF_FEC_FECTFDR_FIFO_DATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFSR */ -#define MCF_FEC_FECTFSR_EMT (0x10000) -#define MCF_FEC_FECTFSR_ALARM (0x20000) -#define MCF_FEC_FECTFSR_FU (0x40000) -#define MCF_FEC_FECTFSR_FRMRDY (0x80000) -#define MCF_FEC_FECTFSR_OF (0x100000) -#define MCF_FEC_FECTFSR_UF (0x200000) -#define MCF_FEC_FECTFSR_FAE (0x800000) -#define MCF_FEC_FECTFSR_FRM(x) (((x)&0xF)<<0x18) -#define MCF_FEC_FECTFSR_TXW (0x40000000) -#define MCF_FEC_FECTFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_FEC_FECTFCR */ -#define MCF_FEC_FECTFCR_RESERVED (0x200000) -#define MCF_FEC_FECTFCR_COUNTER(x) (((x)&0xFFFF)<<0|0x200000) -#define MCF_FEC_FECTFCR_TXW_MASK (0x240000) -#define MCF_FEC_FECTFCR_OF_MSK (0x280000) -#define MCF_FEC_FECTFCR_UF_MSK (0x300000) -#define MCF_FEC_FECTFCR_FAE_MSK (0x600000) -#define MCF_FEC_FECTFCR_IP_MSK (0xA00000) -#define MCF_FEC_FECTFCR_GR(x) (((x)&0x7)<<0x18|0x200000) -#define MCF_FEC_FECTFCR_FRMEN (0x8200000) -#define MCF_FEC_FECTFCR_TIMER (0x10200000) -#define MCF_FEC_FECTFCR_WFR (0x20200000) -#define MCF_FEC_FECTFCR_WCTL (0x40200000) - -/* Bit definitions and macros for MCF_FEC_FECTLRFP */ -#define MCF_FEC_FECTLRFP_LRFP(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTLWFP */ -#define MCF_FEC_FECTLWFP_LWFP(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFAR */ -#define MCF_FEC_FECTFAR_ALARM(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFRP */ -#define MCF_FEC_FECTFRP_READ(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFWP */ -#define MCF_FEC_FECTFWP_WRITE(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECFRST */ -#define MCF_FEC_FECFRST_RST_CTL (0x1000000) -#define MCF_FEC_FECFRST_SW_RST (0x2000000) - -/* Bit definitions and macros for MCF_FEC_FECCTCWR */ -#define MCF_FEC_FECCTCWR_TFCW (0x1000000) -#define MCF_FEC_FECCTCWR_CRC (0x2000000) - -/* Bit definitions and macros for MCF_FEC_RMON_T_DROP */ -#define MCF_FEC_RMON_T_DROP_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_PACKETS */ -#define MCF_FEC_RMON_T_PACKETS_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_BC_PKT */ -#define MCF_FEC_RMON_T_BC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_MC_PKT */ -#define MCF_FEC_RMON_T_MC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_CRC_ALIGN */ -#define MCF_FEC_RMON_T_CRC_ALIGN_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_UNDERSIZE */ -#define MCF_FEC_RMON_T_UNDERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_OVERSIZE */ -#define MCF_FEC_RMON_T_OVERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_FRAG */ -#define MCF_FEC_RMON_T_FRAG_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_JAB */ -#define MCF_FEC_RMON_T_JAB_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_COL */ -#define MCF_FEC_RMON_T_COL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P64 */ -#define MCF_FEC_RMON_T_P64_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P65TO127 */ -#define MCF_FEC_RMON_T_P65TO127_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P128TO255 */ -#define MCF_FEC_RMON_T_P128TO255_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P256TO511 */ -#define MCF_FEC_RMON_T_P256TO511_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P512TO1023 */ -#define MCF_FEC_RMON_T_P512TO1023_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P1024TO2047 */ -#define MCF_FEC_RMON_T_P1024TO2047_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P_GTE2048 */ -#define MCF_FEC_RMON_T_P_GTE2048_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_OCTETS */ -#define MCF_FEC_RMON_T_OCTETS_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_DROP */ -#define MCF_FEC_IEEE_T_DROP_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_FRAME_OK */ -#define MCF_FEC_IEEE_T_FRAME_OK_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_1COL */ -#define MCF_FEC_IEEE_T_1COL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_MCOL */ -#define MCF_FEC_IEEE_T_MCOL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_DEF */ -#define MCF_FEC_IEEE_T_DEF_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_LCOL */ -#define MCF_FEC_IEEE_T_LCOL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_EXCOL */ -#define MCF_FEC_IEEE_T_EXCOL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_MACERR */ -#define MCF_FEC_IEEE_T_MACERR_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_CSERR */ -#define MCF_FEC_IEEE_T_CSERR_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_SQE */ -#define MCF_FEC_IEEE_T_SQE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_FDXFC */ -#define MCF_FEC_IEEE_T_FDXFC_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_OCTETS_OK */ -#define MCF_FEC_IEEE_T_OCTETS_OK_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_DROP */ -#define MCF_FEC_RMON_R_DROP_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_PACKETS */ -#define MCF_FEC_RMON_R_PACKETS_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_BC_PKT */ -#define MCF_FEC_RMON_R_BC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_MC_PKT */ -#define MCF_FEC_RMON_R_MC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_CRC_ALIGN */ -#define MCF_FEC_RMON_R_CRC_ALIGN_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_UNDERSIZE */ -#define MCF_FEC_RMON_R_UNDERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_OVERSIZE */ -#define MCF_FEC_RMON_R_OVERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_FRAG */ -#define MCF_FEC_RMON_R_FRAG_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_JAB */ -#define MCF_FEC_RMON_R_JAB_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_RESVD_0 */ -#define MCF_FEC_RMON_R_RESVD_0_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P64 */ -#define MCF_FEC_RMON_R_P64_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P65TO127 */ -#define MCF_FEC_RMON_R_P65TO127_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P128TO255 */ -#define MCF_FEC_RMON_R_P128TO255_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P256TO511 */ -#define MCF_FEC_RMON_R_P256TO511_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P512TO1023 */ -#define MCF_FEC_RMON_R_P512TO1023_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P1024TO2047 */ -#define MCF_FEC_RMON_R_P1024TO2047_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P_GTE2048 */ -#define MCF_FEC_RMON_R_P_GTE2048_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_OCTETS */ -#define MCF_FEC_RMON_R_OCTETS_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_DROP */ -#define MCF_FEC_IEEE_R_DROP_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_FRAME_OK */ -#define MCF_FEC_IEEE_R_FRAME_OK_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_CRC */ -#define MCF_FEC_IEEE_R_CRC_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_ALIGN */ -#define MCF_FEC_IEEE_R_ALIGN_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_MACERR */ -#define MCF_FEC_IEEE_R_MACERR_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_FDXFC */ -#define MCF_FEC_IEEE_R_FDXFC_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_OCTETS_OK */ -#define MCF_FEC_IEEE_R_OCTETS_OK_Value(x) (((x)&0xFFFFFFFF)<<0) - - -#endif /* __MCF5475_FEC_H__ */ diff --git a/tos/jtagwait/include/MCF5475_GPIO.h b/tos/jtagwait/include/MCF5475_GPIO.h deleted file mode 100644 index 5dd2583..0000000 --- a/tos/jtagwait/include/MCF5475_GPIO.h +++ /dev/null @@ -1,543 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_GPIO_H__ -#define __MCF5475_GPIO_H__ - - -/********************************************************************* -* -* General Purpose I/O (GPIO) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_GPIO_PODR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA00])) -#define MCF_GPIO_PDDR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA10])) -#define MCF_GPIO_PPDSDR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA20])) -#define MCF_GPIO_PCLRR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA30])) - -#define MCF_GPIO_PODR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA01])) -#define MCF_GPIO_PDDR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA11])) -#define MCF_GPIO_PPDSDR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA21])) -#define MCF_GPIO_PCLRR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA31])) - -#define MCF_GPIO_PODR_DMA (*(volatile uint8_t *)(&_MBAR[0xA02])) -#define MCF_GPIO_PDDR_DMA (*(volatile uint8_t *)(&_MBAR[0xA12])) -#define MCF_GPIO_PPDSDR_DMA (*(volatile uint8_t *)(&_MBAR[0xA22])) -#define MCF_GPIO_PCLRR_DMA (*(volatile uint8_t *)(&_MBAR[0xA32])) - -#define MCF_GPIO_PODR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA04])) -#define MCF_GPIO_PDDR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA14])) -#define MCF_GPIO_PPDSDR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA24])) -#define MCF_GPIO_PCLRR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA34])) - -#define MCF_GPIO_PODR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA05])) -#define MCF_GPIO_PDDR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA15])) -#define MCF_GPIO_PPDSDR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA25])) -#define MCF_GPIO_PCLRR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA35])) - -#define MCF_GPIO_PODR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA06])) -#define MCF_GPIO_PDDR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA16])) -#define MCF_GPIO_PPDSDR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA26])) -#define MCF_GPIO_PCLRR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA36])) - -#define MCF_GPIO_PODR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA07])) -#define MCF_GPIO_PDDR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA17])) -#define MCF_GPIO_PPDSDR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA27])) -#define MCF_GPIO_PCLRR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA37])) - -#define MCF_GPIO_PODR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA08])) -#define MCF_GPIO_PDDR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA18])) -#define MCF_GPIO_PPDSDR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA28])) -#define MCF_GPIO_PCLRR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA38])) - -#define MCF_GPIO_PODR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA09])) -#define MCF_GPIO_PDDR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA19])) -#define MCF_GPIO_PPDSDR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA29])) -#define MCF_GPIO_PCLRR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA39])) - -#define MCF_GPIO_PODR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA0A])) -#define MCF_GPIO_PDDR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA1A])) -#define MCF_GPIO_PPDSDR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA2A])) -#define MCF_GPIO_PCLRR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA3A])) - -#define MCF_GPIO2_PODR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA0C])) -#define MCF_GPIO2_PDDR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA1C])) -#define MCF_GPIO2_PPDSDR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA2C])) -#define MCF_GPIO2_PCLRR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA3C])) - -#define MCF_GPIO0_PODR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA0D])) -#define MCF_GPIO0_PDDR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA1D])) -#define MCF_GPIO0_PPDSDR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA2D])) -#define MCF_GPIO0_PCLRR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA3D])) - -#define MCF_GPIO_PODR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA0E])) -#define MCF_GPIO_PDDR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA1E])) -#define MCF_GPIO_PPDSDR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA2E])) -#define MCF_GPIO_PCLRR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA3E])) - - - -/* Bit definitions and macros for MCF_GPIO_PODR_FBCTL */ -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL0 (0x1) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL1 (0x2) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL2 (0x4) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL3 (0x8) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL4 (0x10) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL5 (0x20) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL6 (0x40) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FBCTL */ -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL0 (0x1) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL1 (0x2) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL2 (0x4) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL3 (0x8) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL4 (0x10) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL5 (0x20) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL6 (0x40) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FBCTL */ -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL0 (0x1) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL1 (0x2) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL2 (0x4) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL3 (0x8) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL4 (0x10) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL5 (0x20) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL6 (0x40) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FBCTL */ -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL0 (0x1) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL1 (0x2) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL2 (0x4) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL3 (0x8) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL4 (0x10) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL5 (0x20) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL6 (0x40) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FBCS */ -#define MCF_GPIO_PODR_FBCS_PODR_FBCS1 (0x2) -#define MCF_GPIO_PODR_FBCS_PODR_FBCS2 (0x4) -#define MCF_GPIO_PODR_FBCS_PODR_FBCS3 (0x8) -#define MCF_GPIO_PODR_FBCS_PODR_FBCS4 (0x10) -#define MCF_GPIO_PODR_FBCS_PODR_FBCS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FBCS */ -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS1 (0x2) -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS2 (0x4) -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS3 (0x8) -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS4 (0x10) -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FBCS */ -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS1 (0x2) -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS2 (0x4) -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS3 (0x8) -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS4 (0x10) -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FBCS */ -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS1 (0x2) -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS2 (0x4) -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS3 (0x8) -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS4 (0x10) -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PODR_DMA */ -#define MCF_GPIO_PODR_DMA_PODR_DMA0 (0x1) -#define MCF_GPIO_PODR_DMA_PODR_DMA1 (0x2) -#define MCF_GPIO_PODR_DMA_PODR_DMA2 (0x4) -#define MCF_GPIO_PODR_DMA_PODR_DMA3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DMA */ -#define MCF_GPIO_PDDR_DMA_PDDR_DMA0 (0x1) -#define MCF_GPIO_PDDR_DMA_PDDR_DMA1 (0x2) -#define MCF_GPIO_PDDR_DMA_PDDR_DMA2 (0x4) -#define MCF_GPIO_PDDR_DMA_PDDR_DMA3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DMA */ -#define MCF_GPIO_PPDSDR_DMA_PPDSDR_DMA0 (0x1) -#define MCF_GPIO_PPDSDR_DMA_PPDSDR_DMA1 (0x2) -#define MCF_GPIO_PPDSDR_DMA_PPDSDR_DMA2 (0x4) -#define MCF_GPIO_PPDSDR_DMA_PPDSDR_DMA3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DMA */ -#define MCF_GPIO_PCLRR_DMA_PCLRR_DMA0 (0x1) -#define MCF_GPIO_PCLRR_DMA_PCLRR_DMA1 (0x2) -#define MCF_GPIO_PCLRR_DMA_PCLRR_DMA2 (0x4) -#define MCF_GPIO_PCLRR_DMA_PCLRR_DMA3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PODR_FEC0H */ -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H0 (0x1) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H1 (0x2) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H2 (0x4) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H3 (0x8) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H4 (0x10) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H5 (0x20) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H6 (0x40) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FEC0H */ -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H0 (0x1) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H1 (0x2) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H2 (0x4) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H3 (0x8) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H4 (0x10) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H5 (0x20) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H6 (0x40) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FEC0H */ -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H0 (0x1) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H1 (0x2) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H2 (0x4) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H3 (0x8) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H4 (0x10) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H5 (0x20) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H6 (0x40) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FEC0H */ -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H0 (0x1) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H1 (0x2) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H2 (0x4) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H3 (0x8) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H4 (0x10) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H5 (0x20) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H6 (0x40) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FEC0L */ -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L0 (0x1) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L1 (0x2) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L2 (0x4) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L3 (0x8) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L4 (0x10) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L5 (0x20) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L6 (0x40) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FEC0L */ -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L0 (0x1) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L1 (0x2) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L2 (0x4) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L3 (0x8) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L4 (0x10) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L5 (0x20) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L6 (0x40) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FEC0L */ -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L0 (0x1) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L1 (0x2) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L2 (0x4) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L3 (0x8) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L4 (0x10) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L5 (0x20) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L6 (0x40) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FEC0L */ -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L0 (0x1) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L1 (0x2) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L2 (0x4) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L3 (0x8) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L4 (0x10) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L5 (0x20) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L6 (0x40) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FEC1H */ -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H0 (0x1) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H1 (0x2) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H2 (0x4) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H3 (0x8) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H4 (0x10) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H5 (0x20) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H6 (0x40) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FEC1H */ -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H0 (0x1) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H1 (0x2) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H2 (0x4) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H3 (0x8) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H4 (0x10) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H5 (0x20) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H6 (0x40) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FEC1H */ -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H0 (0x1) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H1 (0x2) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H2 (0x4) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H3 (0x8) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H4 (0x10) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H5 (0x20) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H6 (0x40) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FEC1H */ -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H0 (0x1) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H1 (0x2) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H2 (0x4) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H3 (0x8) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H4 (0x10) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H5 (0x20) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H6 (0x40) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FEC1L */ -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L0 (0x1) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L1 (0x2) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L2 (0x4) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L3 (0x8) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L4 (0x10) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L5 (0x20) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L6 (0x40) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FEC1L */ -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L0 (0x1) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L1 (0x2) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L2 (0x4) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L3 (0x8) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4 (0x10) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L5 (0x20) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L6 (0x40) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FEC1L */ -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L0 (0x1) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L1 (0x2) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L2 (0x4) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L3 (0x8) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L4 (0x10) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L5 (0x20) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L6 (0x40) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FEC1L */ -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L0 (0x1) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L1 (0x2) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L2 (0x4) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L3 (0x8) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L4 (0x10) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L5 (0x20) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L6 (0x40) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FECI2C */ -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C0 (0x1) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C1 (0x2) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C2 (0x4) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FECI2C */ -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0 (0x1) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1 (0x2) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C2 (0x4) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECI2C */ -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C0 (0x1) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C1 (0x2) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C2 (0x4) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FECI2C */ -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C0 (0x1) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C1 (0x2) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C2 (0x4) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PODR_PCIBG */ -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG0 (0x1) -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG1 (0x2) -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG2 (0x4) -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG3 (0x8) -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PCIBG */ -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG0 (0x1) -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG1 (0x2) -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG2 (0x4) -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG3 (0x8) -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PCIBG */ -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG0 (0x1) -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG1 (0x2) -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG2 (0x4) -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG3 (0x8) -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PCIBG */ -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG0 (0x1) -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG1 (0x2) -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG2 (0x4) -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG3 (0x8) -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PODR_PCIBR */ -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR0 (0x1) -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR1 (0x2) -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR2 (0x4) -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR3 (0x8) -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PCIBR */ -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR0 (0x1) -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR1 (0x2) -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR2 (0x4) -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR3 (0x8) -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PCIBR */ -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR0 (0x1) -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR1 (0x2) -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR2 (0x4) -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR3 (0x8) -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PCIBR */ -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR0 (0x1) -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR1 (0x2) -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR2 (0x4) -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR3 (0x8) -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PODR_PSC3PSC */ -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC20 (0x1) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC21 (0x2) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC22 (0x4) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC23 (0x8) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC24 (0x10) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC25 (0x20) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC26 (0x40) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC27 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PSC3PSC */ -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC20 (0x1) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC21 (0x2) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC22 (0x4) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC23 (0x8) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC24 (0x10) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC25 (0x20) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC26 (0x40) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC27 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PSC3PSC */ -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC20 (0x1) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC21 (0x2) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC22 (0x4) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC23 (0x8) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC24 (0x10) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC25 (0x20) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC26 (0x40) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC27 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PSC3PSC */ -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC20 (0x1) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC21 (0x2) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC22 (0x4) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC23 (0x8) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC24 (0x10) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC25 (0x20) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC26 (0x40) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC27 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_PSC1PSC */ -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC00 (0x1) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC01 (0x2) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC02 (0x4) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC03 (0x8) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC04 (0x10) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC05 (0x20) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC06 (0x40) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC07 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PSC1PSC */ -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC00 (0x1) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC01 (0x2) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC02 (0x4) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC03 (0x8) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC04 (0x10) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC05 (0x20) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC06 (0x40) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC07 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PSC1PSC */ -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC00 (0x1) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC01 (0x2) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC02 (0x4) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC03 (0x8) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC04 (0x10) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC05 (0x20) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC06 (0x40) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC07 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PSC1PSC */ -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC00 (0x1) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC01 (0x2) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC02 (0x4) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC03 (0x8) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC04 (0x10) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC05 (0x20) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC06 (0x40) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC07 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_DSPI */ -#define MCF_GPIO_PODR_DSPI_PODR_DSPI0 (0x1) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI1 (0x2) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI2 (0x4) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI3 (0x8) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI4 (0x10) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI5 (0x20) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI6 (0x40) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DSPI */ -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI0 (0x1) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI1 (0x2) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI2 (0x4) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI3 (0x8) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI4 (0x10) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI5 (0x20) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI6 (0x40) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DSPI */ -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI0 (0x1) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI1 (0x2) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI2 (0x4) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI3 (0x8) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI4 (0x10) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI5 (0x20) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI6 (0x40) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DSPI */ -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI0 (0x1) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI1 (0x2) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI2 (0x4) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI3 (0x8) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI4 (0x10) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI5 (0x20) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI6 (0x40) - - -#endif /* __MCF5475_GPIO_H__ */ diff --git a/tos/jtagwait/include/MCF5475_GPT.h b/tos/jtagwait/include/MCF5475_GPT.h deleted file mode 100644 index f9fbc98..0000000 --- a/tos/jtagwait/include/MCF5475_GPT.h +++ /dev/null @@ -1,100 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_GPT_H__ -#define __MCF5475_GPT_H__ - - -/********************************************************************* -* -* General Purpose Timers (GPT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_GPT0_GMS (*(volatile uint32_t*)(&_MBAR[0x800])) -#define MCF_GPT0_GCIR (*(volatile uint32_t*)(&_MBAR[0x804])) -#define MCF_GPT0_GPWM (*(volatile uint32_t*)(&_MBAR[0x808])) -#define MCF_GPT0_GSR (*(volatile uint32_t*)(&_MBAR[0x80C])) - -#define MCF_GPT1_GMS (*(volatile uint32_t*)(&_MBAR[0x810])) -#define MCF_GPT1_GCIR (*(volatile uint32_t*)(&_MBAR[0x814])) -#define MCF_GPT1_GPWM (*(volatile uint32_t*)(&_MBAR[0x818])) -#define MCF_GPT1_GSR (*(volatile uint32_t*)(&_MBAR[0x81C])) - -#define MCF_GPT2_GMS (*(volatile uint32_t*)(&_MBAR[0x820])) -#define MCF_GPT2_GCIR (*(volatile uint32_t*)(&_MBAR[0x824])) -#define MCF_GPT2_GPWM (*(volatile uint32_t*)(&_MBAR[0x828])) -#define MCF_GPT2_GSR (*(volatile uint32_t*)(&_MBAR[0x82C])) - -#define MCF_GPT3_GMS (*(volatile uint32_t*)(&_MBAR[0x830])) -#define MCF_GPT3_GCIR (*(volatile uint32_t*)(&_MBAR[0x834])) -#define MCF_GPT3_GPWM (*(volatile uint32_t*)(&_MBAR[0x838])) -#define MCF_GPT3_GSR (*(volatile uint32_t*)(&_MBAR[0x83C])) - -#define MCF_GPT_GMS(x) (*(volatile uint32_t*)(&_MBAR[0x800 + ((x)*0x10)])) -#define MCF_GPT_GCIR(x) (*(volatile uint32_t*)(&_MBAR[0x804 + ((x)*0x10)])) -#define MCF_GPT_GPWM(x) (*(volatile uint32_t*)(&_MBAR[0x808 + ((x)*0x10)])) -#define MCF_GPT_GSR(x) (*(volatile uint32_t*)(&_MBAR[0x80C + ((x)*0x10)])) - - -/* Bit definitions and macros for MCF_GPT_GMS */ -#define MCF_GPT_GMS_TMS(x) (((x)&0x7)<<0) -#define MCF_GPT_GMS_TMS_DISABLE (0) -#define MCF_GPT_GMS_TMS_INCAPT (0x1) -#define MCF_GPT_GMS_TMS_OUTCAPT (0x2) -#define MCF_GPT_GMS_TMS_PWM (0x3) -#define MCF_GPT_GMS_TMS_GPIO (0x4) -#define MCF_GPT_GMS_GPIO(x) (((x)&0x3)<<0x4) -#define MCF_GPT_GMS_GPIO_INPUT (0) -#define MCF_GPT_GMS_GPIO_OUTLO (0x20) -#define MCF_GPT_GMS_GPIO_OUTHI (0x30) -#define MCF_GPT_GMS_IEN (0x100) -#define MCF_GPT_GMS_OD (0x200) -#define MCF_GPT_GMS_SC (0x400) -#define MCF_GPT_GMS_CE (0x1000) -#define MCF_GPT_GMS_WDEN (0x8000) -#define MCF_GPT_GMS_ICT(x) (((x)&0x3)<<0x10) -#define MCF_GPT_GMS_ICT_ANY (0) -#define MCF_GPT_GMS_ICT_RISE (0x10000) -#define MCF_GPT_GMS_ICT_FALL (0x20000) -#define MCF_GPT_GMS_ICT_PULSE (0x30000) -#define MCF_GPT_GMS_OCT(x) (((x)&0x3)<<0x14) -#define MCF_GPT_GMS_OCT_FRCLOW (0) -#define MCF_GPT_GMS_OCT_PULSEHI (0x100000) -#define MCF_GPT_GMS_OCT_PULSELO (0x200000) -#define MCF_GPT_GMS_OCT_TOGGLE (0x300000) -#define MCF_GPT_GMS_OCPW(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_GPT_GCIR */ -#define MCF_GPT_GCIR_CNT(x) (((x)&0xFFFF)<<0) -#define MCF_GPT_GCIR_PRE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_GPT_GPWM */ -#define MCF_GPT_GPWM_LOAD (0x1) -#define MCF_GPT_GPWM_PWMOP (0x100) -#define MCF_GPT_GPWM_WIDTH(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_GPT_GSR */ -#define MCF_GPT_GSR_CAPT (0x1) -#define MCF_GPT_GSR_COMP (0x2) -#define MCF_GPT_GSR_PWMP (0x4) -#define MCF_GPT_GSR_TEXP (0x8) -#define MCF_GPT_GSR_PIN (0x100) -#define MCF_GPT_GSR_OVF(x) (((x)&0x7)<<0xC) -#define MCF_GPT_GSR_CAPTURE(x) (((x)&0xFFFF)<<0x10) - - -#endif /* __MCF5475_GPT_H__ */ diff --git a/tos/jtagwait/include/MCF5475_I2C.h b/tos/jtagwait/include/MCF5475_I2C.h deleted file mode 100644 index 1e8a85b..0000000 --- a/tos/jtagwait/include/MCF5475_I2C.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_I2C_H__ -#define __MCF5475_I2C_H__ - - -/********************************************************************* -* -* I2C Module (I2C) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_I2C_I2ADR (*(volatile uint8_t *)(&_MBAR[0x8F00])) -#define MCF_I2C_I2FDR (*(volatile uint8_t *)(&_MBAR[0x8F04])) -#define MCF_I2C_I2CR (*(volatile uint8_t *)(&_MBAR[0x8F08])) -#define MCF_I2C_I2SR (*(volatile uint8_t *)(&_MBAR[0x8F0C])) -#define MCF_I2C_I2DR (*(volatile uint8_t *)(&_MBAR[0x8F10])) -#define MCF_I2C_I2ICR (*(volatile uint8_t *)(&_MBAR[0x8F20])) - - - -/* Bit definitions and macros for MCF_I2C_I2ADR */ -#define MCF_I2C_I2ADR_ADR(x) (((x)&0x7F)<<0x1) - -/* Bit definitions and macros for MCF_I2C_I2FDR */ -#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F)<<0) - -/* Bit definitions and macros for MCF_I2C_I2CR */ -#define MCF_I2C_I2CR_RSTA (0x4) -#define MCF_I2C_I2CR_TXAK (0x8) -#define MCF_I2C_I2CR_MTX (0x10) -#define MCF_I2C_I2CR_MSTA (0x20) -#define MCF_I2C_I2CR_IIEN (0x40) -#define MCF_I2C_I2CR_IEN (0x80) - -/* Bit definitions and macros for MCF_I2C_I2SR */ -#define MCF_I2C_I2SR_RXAK (0x1) -#define MCF_I2C_I2SR_IIF (0x2) -#define MCF_I2C_I2SR_SRW (0x4) -#define MCF_I2C_I2SR_IAL (0x10) -#define MCF_I2C_I2SR_IBB (0x20) -#define MCF_I2C_I2SR_IAAS (0x40) -#define MCF_I2C_I2SR_ICF (0x80) - -/* Bit definitions and macros for MCF_I2C_I2DR */ -#define MCF_I2C_I2DR_DATA(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_I2C_I2ICR */ -#define MCF_I2C_I2ICR_IE (0x1) -#define MCF_I2C_I2ICR_RE (0x2) -#define MCF_I2C_I2ICR_TE (0x4) -#define MCF_I2C_I2ICR_BNBE (0x8) - - -#endif /* __MCF5475_I2C_H__ */ diff --git a/tos/jtagwait/include/MCF5475_INTC.h b/tos/jtagwait/include/MCF5475_INTC.h deleted file mode 100644 index 61265ed..0000000 --- a/tos/jtagwait/include/MCF5475_INTC.h +++ /dev/null @@ -1,331 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_INTC_H__ -#define __MCF5475_INTC_H__ - - -/********************************************************************* -* -* Interrupt Controller (INTC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_INTC_IPRH (*(volatile uint32_t*)(&_MBAR[0x700])) -#define MCF_INTC_IPRL (*(volatile uint32_t*)(&_MBAR[0x704])) -#define MCF_INTC_IMRH (*(volatile uint32_t*)(&_MBAR[0x708])) -#define MCF_INTC_IMRL (*(volatile uint32_t*)(&_MBAR[0x70C])) -#define MCF_INTC_INTFRCH (*(volatile uint32_t*)(&_MBAR[0x710])) -#define MCF_INTC_INTFRCL (*(volatile uint32_t*)(&_MBAR[0x714])) -#define MCF_INTC_IRLR (*(volatile uint8_t *)(&_MBAR[0x718])) -#define MCF_INTC_IACKLPR (*(volatile uint8_t *)(&_MBAR[0x719])) -#define MCF_INTC_ICR01 (*(volatile uint8_t *)(&_MBAR[0x741])) -#define MCF_INTC_ICR02 (*(volatile uint8_t *)(&_MBAR[0x742])) -#define MCF_INTC_ICR03 (*(volatile uint8_t *)(&_MBAR[0x743])) -#define MCF_INTC_ICR04 (*(volatile uint8_t *)(&_MBAR[0x744])) -#define MCF_INTC_ICR05 (*(volatile uint8_t *)(&_MBAR[0x745])) -#define MCF_INTC_ICR06 (*(volatile uint8_t *)(&_MBAR[0x746])) -#define MCF_INTC_ICR07 (*(volatile uint8_t *)(&_MBAR[0x747])) -#define MCF_INTC_ICR08 (*(volatile uint8_t *)(&_MBAR[0x748])) -#define MCF_INTC_ICR09 (*(volatile uint8_t *)(&_MBAR[0x749])) -#define MCF_INTC_ICR10 (*(volatile uint8_t *)(&_MBAR[0x74A])) -#define MCF_INTC_ICR11 (*(volatile uint8_t *)(&_MBAR[0x74B])) -#define MCF_INTC_ICR12 (*(volatile uint8_t *)(&_MBAR[0x74C])) -#define MCF_INTC_ICR13 (*(volatile uint8_t *)(&_MBAR[0x74D])) -#define MCF_INTC_ICR14 (*(volatile uint8_t *)(&_MBAR[0x74E])) -#define MCF_INTC_ICR15 (*(volatile uint8_t *)(&_MBAR[0x74F])) -#define MCF_INTC_ICR16 (*(volatile uint8_t *)(&_MBAR[0x750])) -#define MCF_INTC_ICR17 (*(volatile uint8_t *)(&_MBAR[0x751])) -#define MCF_INTC_ICR18 (*(volatile uint8_t *)(&_MBAR[0x752])) -#define MCF_INTC_ICR19 (*(volatile uint8_t *)(&_MBAR[0x753])) -#define MCF_INTC_ICR20 (*(volatile uint8_t *)(&_MBAR[0x754])) -#define MCF_INTC_ICR21 (*(volatile uint8_t *)(&_MBAR[0x755])) -#define MCF_INTC_ICR22 (*(volatile uint8_t *)(&_MBAR[0x756])) -#define MCF_INTC_ICR23 (*(volatile uint8_t *)(&_MBAR[0x757])) -#define MCF_INTC_ICR24 (*(volatile uint8_t *)(&_MBAR[0x758])) -#define MCF_INTC_ICR25 (*(volatile uint8_t *)(&_MBAR[0x759])) -#define MCF_INTC_ICR26 (*(volatile uint8_t *)(&_MBAR[0x75A])) -#define MCF_INTC_ICR27 (*(volatile uint8_t *)(&_MBAR[0x75B])) -#define MCF_INTC_ICR28 (*(volatile uint8_t *)(&_MBAR[0x75C])) -#define MCF_INTC_ICR29 (*(volatile uint8_t *)(&_MBAR[0x75D])) -#define MCF_INTC_ICR30 (*(volatile uint8_t *)(&_MBAR[0x75E])) -#define MCF_INTC_ICR31 (*(volatile uint8_t *)(&_MBAR[0x75F])) -#define MCF_INTC_ICR32 (*(volatile uint8_t *)(&_MBAR[0x760])) -#define MCF_INTC_ICR33 (*(volatile uint8_t *)(&_MBAR[0x761])) -#define MCF_INTC_ICR34 (*(volatile uint8_t *)(&_MBAR[0x762])) -#define MCF_INTC_ICR35 (*(volatile uint8_t *)(&_MBAR[0x763])) -#define MCF_INTC_ICR36 (*(volatile uint8_t *)(&_MBAR[0x764])) -#define MCF_INTC_ICR37 (*(volatile uint8_t *)(&_MBAR[0x765])) -#define MCF_INTC_ICR38 (*(volatile uint8_t *)(&_MBAR[0x766])) -#define MCF_INTC_ICR39 (*(volatile uint8_t *)(&_MBAR[0x767])) -#define MCF_INTC_ICR40 (*(volatile uint8_t *)(&_MBAR[0x768])) -#define MCF_INTC_ICR41 (*(volatile uint8_t *)(&_MBAR[0x769])) -#define MCF_INTC_ICR42 (*(volatile uint8_t *)(&_MBAR[0x76A])) -#define MCF_INTC_ICR43 (*(volatile uint8_t *)(&_MBAR[0x76B])) -#define MCF_INTC_ICR44 (*(volatile uint8_t *)(&_MBAR[0x76C])) -#define MCF_INTC_ICR45 (*(volatile uint8_t *)(&_MBAR[0x76D])) -#define MCF_INTC_ICR46 (*(volatile uint8_t *)(&_MBAR[0x76E])) -#define MCF_INTC_ICR47 (*(volatile uint8_t *)(&_MBAR[0x76F])) -#define MCF_INTC_ICR48 (*(volatile uint8_t *)(&_MBAR[0x770])) -#define MCF_INTC_ICR49 (*(volatile uint8_t *)(&_MBAR[0x771])) -#define MCF_INTC_ICR50 (*(volatile uint8_t *)(&_MBAR[0x772])) -#define MCF_INTC_ICR51 (*(volatile uint8_t *)(&_MBAR[0x773])) -#define MCF_INTC_ICR52 (*(volatile uint8_t *)(&_MBAR[0x774])) -#define MCF_INTC_ICR53 (*(volatile uint8_t *)(&_MBAR[0x775])) -#define MCF_INTC_ICR54 (*(volatile uint8_t *)(&_MBAR[0x776])) -#define MCF_INTC_ICR55 (*(volatile uint8_t *)(&_MBAR[0x777])) -#define MCF_INTC_ICR56 (*(volatile uint8_t *)(&_MBAR[0x778])) -#define MCF_INTC_ICR57 (*(volatile uint8_t *)(&_MBAR[0x779])) -#define MCF_INTC_ICR58 (*(volatile uint8_t *)(&_MBAR[0x77A])) -#define MCF_INTC_ICR59 (*(volatile uint8_t *)(&_MBAR[0x77B])) -#define MCF_INTC_ICR60 (*(volatile uint8_t *)(&_MBAR[0x77C])) -#define MCF_INTC_ICR61 (*(volatile uint8_t *)(&_MBAR[0x77D])) -#define MCF_INTC_ICR62 (*(volatile uint8_t *)(&_MBAR[0x77E])) -#define MCF_INTC_ICR63 (*(volatile uint8_t *)(&_MBAR[0x77F])) -#define MCF_INTC_SWIACK (*(volatile uint8_t *)(&_MBAR[0x7E0])) -#define MCF_INTC_L1IACK (*(volatile uint8_t *)(&_MBAR[0x7E4])) -#define MCF_INTC_L2IACK (*(volatile uint8_t *)(&_MBAR[0x7E8])) -#define MCF_INTC_L3IACK (*(volatile uint8_t *)(&_MBAR[0x7EC])) -#define MCF_INTC_L4IACK (*(volatile uint8_t *)(&_MBAR[0x7F0])) -#define MCF_INTC_L5IACK (*(volatile uint8_t *)(&_MBAR[0x7F4])) -#define MCF_INTC_L6IACK (*(volatile uint8_t *)(&_MBAR[0x7F8])) -#define MCF_INTC_L7IACK (*(volatile uint8_t *)(&_MBAR[0x7FC])) -#define MCF_INTC_ICR(x) (*(volatile uint8_t *)(&_MBAR[0x741 + ((x-1)*0x1)])) -#define MCF_INTC_LIACK(x) (*(volatile uint8_t *)(&_MBAR[0x7E4 + ((x-1)*0x4)])) - - - -/* Bit definitions and macros for MCF_INTC_IPRH */ -#define MCF_INTC_IPRH_INT32 (0x1) -#define MCF_INTC_IPRH_INT33 (0x2) -#define MCF_INTC_IPRH_INT34 (0x4) -#define MCF_INTC_IPRH_INT35 (0x8) -#define MCF_INTC_IPRH_INT36 (0x10) -#define MCF_INTC_IPRH_INT37 (0x20) -#define MCF_INTC_IPRH_INT38 (0x40) -#define MCF_INTC_IPRH_INT39 (0x80) -#define MCF_INTC_IPRH_INT40 (0x100) -#define MCF_INTC_IPRH_INT41 (0x200) -#define MCF_INTC_IPRH_INT42 (0x400) -#define MCF_INTC_IPRH_INT43 (0x800) -#define MCF_INTC_IPRH_INT44 (0x1000) -#define MCF_INTC_IPRH_INT45 (0x2000) -#define MCF_INTC_IPRH_INT46 (0x4000) -#define MCF_INTC_IPRH_INT47 (0x8000) -#define MCF_INTC_IPRH_INT48 (0x10000) -#define MCF_INTC_IPRH_INT49 (0x20000) -#define MCF_INTC_IPRH_INT50 (0x40000) -#define MCF_INTC_IPRH_INT51 (0x80000) -#define MCF_INTC_IPRH_INT52 (0x100000) -#define MCF_INTC_IPRH_INT53 (0x200000) -#define MCF_INTC_IPRH_INT54 (0x400000) -#define MCF_INTC_IPRH_INT55 (0x800000) -#define MCF_INTC_IPRH_INT56 (0x1000000) -#define MCF_INTC_IPRH_INT57 (0x2000000) -#define MCF_INTC_IPRH_INT58 (0x4000000) -#define MCF_INTC_IPRH_INT59 (0x8000000) -#define MCF_INTC_IPRH_INT60 (0x10000000) -#define MCF_INTC_IPRH_INT61 (0x20000000) -#define MCF_INTC_IPRH_INT62 (0x40000000) -#define MCF_INTC_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IPRL */ -#define MCF_INTC_IPRL_INT1 (0x2) -#define MCF_INTC_IPRL_INT2 (0x4) -#define MCF_INTC_IPRL_INT3 (0x8) -#define MCF_INTC_IPRL_INT4 (0x10) -#define MCF_INTC_IPRL_INT5 (0x20) -#define MCF_INTC_IPRL_INT6 (0x40) -#define MCF_INTC_IPRL_INT7 (0x80) -#define MCF_INTC_IPRL_INT8 (0x100) -#define MCF_INTC_IPRL_INT9 (0x200) -#define MCF_INTC_IPRL_INT10 (0x400) -#define MCF_INTC_IPRL_INT11 (0x800) -#define MCF_INTC_IPRL_INT12 (0x1000) -#define MCF_INTC_IPRL_INT13 (0x2000) -#define MCF_INTC_IPRL_INT14 (0x4000) -#define MCF_INTC_IPRL_INT15 (0x8000) -#define MCF_INTC_IPRL_INT16 (0x10000) -#define MCF_INTC_IPRL_INT17 (0x20000) -#define MCF_INTC_IPRL_INT18 (0x40000) -#define MCF_INTC_IPRL_INT19 (0x80000) -#define MCF_INTC_IPRL_INT20 (0x100000) -#define MCF_INTC_IPRL_INT21 (0x200000) -#define MCF_INTC_IPRL_INT22 (0x400000) -#define MCF_INTC_IPRL_INT23 (0x800000) -#define MCF_INTC_IPRL_INT24 (0x1000000) -#define MCF_INTC_IPRL_INT25 (0x2000000) -#define MCF_INTC_IPRL_INT26 (0x4000000) -#define MCF_INTC_IPRL_INT27 (0x8000000) -#define MCF_INTC_IPRL_INT28 (0x10000000) -#define MCF_INTC_IPRL_INT29 (0x20000000) -#define MCF_INTC_IPRL_INT30 (0x40000000) -#define MCF_INTC_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IMRH */ -#define MCF_INTC_IMRH_INT_MASK32 (0x1) -#define MCF_INTC_IMRH_INT_MASK33 (0x2) -#define MCF_INTC_IMRH_INT_MASK34 (0x4) -#define MCF_INTC_IMRH_INT_MASK35 (0x8) -#define MCF_INTC_IMRH_INT_MASK36 (0x10) -#define MCF_INTC_IMRH_INT_MASK37 (0x20) -#define MCF_INTC_IMRH_INT_MASK38 (0x40) -#define MCF_INTC_IMRH_INT_MASK39 (0x80) -#define MCF_INTC_IMRH_INT_MASK40 (0x100) -#define MCF_INTC_IMRH_INT_MASK41 (0x200) -#define MCF_INTC_IMRH_INT_MASK42 (0x400) -#define MCF_INTC_IMRH_INT_MASK43 (0x800) -#define MCF_INTC_IMRH_INT_MASK44 (0x1000) -#define MCF_INTC_IMRH_INT_MASK45 (0x2000) -#define MCF_INTC_IMRH_INT_MASK46 (0x4000) -#define MCF_INTC_IMRH_INT_MASK47 (0x8000) -#define MCF_INTC_IMRH_INT_MASK48 (0x10000) -#define MCF_INTC_IMRH_INT_MASK49 (0x20000) -#define MCF_INTC_IMRH_INT_MASK50 (0x40000) -#define MCF_INTC_IMRH_INT_MASK51 (0x80000) -#define MCF_INTC_IMRH_INT_MASK52 (0x100000) -#define MCF_INTC_IMRH_INT_MASK53 (0x200000) -#define MCF_INTC_IMRH_INT_MASK54 (0x400000) -#define MCF_INTC_IMRH_INT_MASK55 (0x800000) -#define MCF_INTC_IMRH_INT_MASK56 (0x1000000) -#define MCF_INTC_IMRH_INT_MASK57 (0x2000000) -#define MCF_INTC_IMRH_INT_MASK58 (0x4000000) -#define MCF_INTC_IMRH_INT_MASK59 (0x8000000) -#define MCF_INTC_IMRH_INT_MASK60 (0x10000000) -#define MCF_INTC_IMRH_INT_MASK61 (0x20000000) -#define MCF_INTC_IMRH_INT_MASK62 (0x40000000) -#define MCF_INTC_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IMRL */ -#define MCF_INTC_IMRL_MASKALL (0x1) -#define MCF_INTC_IMRL_INT_MASK1 (0x2) -#define MCF_INTC_IMRL_INT_MASK2 (0x4) -#define MCF_INTC_IMRL_INT_MASK3 (0x8) -#define MCF_INTC_IMRL_INT_MASK4 (0x10) -#define MCF_INTC_IMRL_INT_MASK5 (0x20) -#define MCF_INTC_IMRL_INT_MASK6 (0x40) -#define MCF_INTC_IMRL_INT_MASK7 (0x80) -#define MCF_INTC_IMRL_INT_MASK8 (0x100) -#define MCF_INTC_IMRL_INT_MASK9 (0x200) -#define MCF_INTC_IMRL_INT_MASK10 (0x400) -#define MCF_INTC_IMRL_INT_MASK11 (0x800) -#define MCF_INTC_IMRL_INT_MASK12 (0x1000) -#define MCF_INTC_IMRL_INT_MASK13 (0x2000) -#define MCF_INTC_IMRL_INT_MASK14 (0x4000) -#define MCF_INTC_IMRL_INT_MASK15 (0x8000) -#define MCF_INTC_IMRL_INT_MASK16 (0x10000) -#define MCF_INTC_IMRL_INT_MASK17 (0x20000) -#define MCF_INTC_IMRL_INT_MASK18 (0x40000) -#define MCF_INTC_IMRL_INT_MASK19 (0x80000) -#define MCF_INTC_IMRL_INT_MASK20 (0x100000) -#define MCF_INTC_IMRL_INT_MASK21 (0x200000) -#define MCF_INTC_IMRL_INT_MASK22 (0x400000) -#define MCF_INTC_IMRL_INT_MASK23 (0x800000) -#define MCF_INTC_IMRL_INT_MASK24 (0x1000000) -#define MCF_INTC_IMRL_INT_MASK25 (0x2000000) -#define MCF_INTC_IMRL_INT_MASK26 (0x4000000) -#define MCF_INTC_IMRL_INT_MASK27 (0x8000000) -#define MCF_INTC_IMRL_INT_MASK28 (0x10000000) -#define MCF_INTC_IMRL_INT_MASK29 (0x20000000) -#define MCF_INTC_IMRL_INT_MASK30 (0x40000000) -#define MCF_INTC_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_INTFRCH */ -#define MCF_INTC_INTFRCH_INTFRC32 (0x1) -#define MCF_INTC_INTFRCH_INTFRC33 (0x2) -#define MCF_INTC_INTFRCH_INTFRC34 (0x4) -#define MCF_INTC_INTFRCH_INTFRC35 (0x8) -#define MCF_INTC_INTFRCH_INTFRC36 (0x10) -#define MCF_INTC_INTFRCH_INTFRC37 (0x20) -#define MCF_INTC_INTFRCH_INTFRC38 (0x40) -#define MCF_INTC_INTFRCH_INTFRC39 (0x80) -#define MCF_INTC_INTFRCH_INTFRC40 (0x100) -#define MCF_INTC_INTFRCH_INTFRC41 (0x200) -#define MCF_INTC_INTFRCH_INTFRC42 (0x400) -#define MCF_INTC_INTFRCH_INTFRC43 (0x800) -#define MCF_INTC_INTFRCH_INTFRC44 (0x1000) -#define MCF_INTC_INTFRCH_INTFRC45 (0x2000) -#define MCF_INTC_INTFRCH_INTFRC46 (0x4000) -#define MCF_INTC_INTFRCH_INTFRC47 (0x8000) -#define MCF_INTC_INTFRCH_INTFRC48 (0x10000) -#define MCF_INTC_INTFRCH_INTFRC49 (0x20000) -#define MCF_INTC_INTFRCH_INTFRC50 (0x40000) -#define MCF_INTC_INTFRCH_INTFRC51 (0x80000) -#define MCF_INTC_INTFRCH_INTFRC52 (0x100000) -#define MCF_INTC_INTFRCH_INTFRC53 (0x200000) -#define MCF_INTC_INTFRCH_INTFRC54 (0x400000) -#define MCF_INTC_INTFRCH_INTFRC55 (0x800000) -#define MCF_INTC_INTFRCH_INTFRC56 (0x1000000) -#define MCF_INTC_INTFRCH_INTFRC57 (0x2000000) -#define MCF_INTC_INTFRCH_INTFRC58 (0x4000000) -#define MCF_INTC_INTFRCH_INTFRC59 (0x8000000) -#define MCF_INTC_INTFRCH_INTFRC60 (0x10000000) -#define MCF_INTC_INTFRCH_INTFRC61 (0x20000000) -#define MCF_INTC_INTFRCH_INTFRC62 (0x40000000) -#define MCF_INTC_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_INTFRCL */ -#define MCF_INTC_INTFRCL_INTFRC1 (0x2) -#define MCF_INTC_INTFRCL_INTFRC2 (0x4) -#define MCF_INTC_INTFRCL_INTFRC3 (0x8) -#define MCF_INTC_INTFRCL_INTFRC4 (0x10) -#define MCF_INTC_INTFRCL_INTFRC5 (0x20) -#define MCF_INTC_INTFRCL_INTFRC6 (0x40) -#define MCF_INTC_INTFRCL_INTFRC7 (0x80) -#define MCF_INTC_INTFRCL_INTFRC8 (0x100) -#define MCF_INTC_INTFRCL_INTFRC9 (0x200) -#define MCF_INTC_INTFRCL_INTFRC10 (0x400) -#define MCF_INTC_INTFRCL_INTFRC11 (0x800) -#define MCF_INTC_INTFRCL_INTFRC12 (0x1000) -#define MCF_INTC_INTFRCL_INTFRC13 (0x2000) -#define MCF_INTC_INTFRCL_INTFRC14 (0x4000) -#define MCF_INTC_INTFRCL_INTFRC15 (0x8000) -#define MCF_INTC_INTFRCL_INTFRC16 (0x10000) -#define MCF_INTC_INTFRCL_INTFRC17 (0x20000) -#define MCF_INTC_INTFRCL_INTFRC18 (0x40000) -#define MCF_INTC_INTFRCL_INTFRC19 (0x80000) -#define MCF_INTC_INTFRCL_INTFRC20 (0x100000) -#define MCF_INTC_INTFRCL_INTFRC21 (0x200000) -#define MCF_INTC_INTFRCL_INTFRC22 (0x400000) -#define MCF_INTC_INTFRCL_INTFRC23 (0x800000) -#define MCF_INTC_INTFRCL_INTFRC24 (0x1000000) -#define MCF_INTC_INTFRCL_INTFRC25 (0x2000000) -#define MCF_INTC_INTFRCL_INTFRC26 (0x4000000) -#define MCF_INTC_INTFRCL_INTFRC27 (0x8000000) -#define MCF_INTC_INTFRCL_INTFRC28 (0x10000000) -#define MCF_INTC_INTFRCL_INTFRC29 (0x20000000) -#define MCF_INTC_INTFRCL_INTFRC30 (0x40000000) -#define MCF_INTC_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IRLR */ -#define MCF_INTC_IRLR_IRQ(x) (((x)&0x7F)<<0x1) - -/* Bit definitions and macros for MCF_INTC_IACKLPR */ -#define MCF_INTC_IACKLPR_PRI(x) (((x)&0xF)<<0) -#define MCF_INTC_IACKLPR_LEVEL(x) (((x)&0x7)<<0x4) - -/* Bit definitions and macros for MCF_INTC_ICR */ -#define MCF_INTC_ICR_IP(x) (((x)&0x7)<<0) -#define MCF_INTC_ICR_IL(x) (((x)&0x7)<<0x3) - -/* Bit definitions and macros for MCF_INTC_SWIACK */ -#define MCF_INTC_SWIACK_VECTOR(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_INTC_LIACK */ -#define MCF_INTC_LIACK_VECTOR(x) (((x)&0xFF)<<0) - - -#endif /* __MCF5475_INTC_H__ */ diff --git a/tos/jtagwait/include/MCF5475_MMU.h b/tos/jtagwait/include/MCF5475_MMU.h deleted file mode 100644 index 334ad28..0000000 --- a/tos/jtagwait/include/MCF5475_MMU.h +++ /dev/null @@ -1,79 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_MMU_H__ -#define __MCF5475_MMU_H__ - - -/********************************************************************* -* -* Memory Management Unit (MMU) -* -*********************************************************************/ - -/* Register read/write macros */ - -/* note the uint32_t_a - this is to avoid gcc warnings about pointer aliasing */ -#define MCF_MMU_MMUCR (*(volatile uint32_t_a*)(&_MMUBAR[0])) -#define MCF_MMU_MMUOR (*(volatile uint32_t_a*)(&_MMUBAR[0x4])) -#define MCF_MMU_MMUSR (*(volatile uint32_t_a*)(&_MMUBAR[0x8])) -#define MCF_MMU_MMUAR (*(volatile uint32_t_a*)(&_MMUBAR[0x10])) -#define MCF_MMU_MMUTR (*(volatile uint32_t_a*)(&_MMUBAR[0x14])) -#define MCF_MMU_MMUDR (*(volatile uint32_t_a*)(&_MMUBAR[0x18])) - - -/* Bit definitions and macros for MCF_MMU_MMUCR */ -#define MCF_MMU_MMUCR_EN (0x1) -#define MCF_MMU_MMUCR_ASM (0x2) - -/* Bit definitions and macros for MCF_MMU_MMUOR */ -#define MCF_MMU_MMUOR_UAA (0x1) -#define MCF_MMU_MMUOR_ACC (0x2) -#define MCF_MMU_MMUOR_RW (0x4) -#define MCF_MMU_MMUOR_ADR (0x8) -#define MCF_MMU_MMUOR_ITLB (0x10) -#define MCF_MMU_MMUOR_CAS (0x20) -#define MCF_MMU_MMUOR_CNL (0x40) -#define MCF_MMU_MMUOR_CA (0x80) -#define MCF_MMU_MMUOR_STLB (0x100) -#define MCF_MMU_MMUOR_AA(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_MMU_MMUSR */ -#define MCF_MMU_MMUSR_HIT (0x2) -#define MCF_MMU_MMUSR_WF (0x8) -#define MCF_MMU_MMUSR_RF (0x10) -#define MCF_MMU_MMUSR_SPF (0x20) - -/* Bit definitions and macros for MCF_MMU_MMUAR */ -#define MCF_MMU_MMUAR_FA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_MMU_MMUTR */ -#define MCF_MMU_MMUTR_V (0x1) -#define MCF_MMU_MMUTR_SG (0x2) -#define MCF_MMU_MMUTR_ID(x) (((x)&0xFF)<<0x2) -#define MCF_MMU_MMUTR_VA(x) (((x)&0x3FFFFF)<<0xA) - -/* Bit definitions and macros for MCF_MMU_MMUDR */ -#define MCF_MMU_MMUDR_LK (0x2) -#define MCF_MMU_MMUDR_X (0x4) -#define MCF_MMU_MMUDR_W (0x8) -#define MCF_MMU_MMUDR_R (0x10) -#define MCF_MMU_MMUDR_SP (0x20) -#define MCF_MMU_MMUDR_CM(x) (((x)&0x3)<<0x6) -#define MCF_MMU_MMUDR_SZ(x) (((x)&0x3)<<0x8) -#define MCF_MMU_MMUDR_PA(x) (((x)&0x3FFFFF)<<0xA) - - -#endif /* __MCF5475_MMU_H__ */ diff --git a/tos/jtagwait/include/MCF5475_PAD.h b/tos/jtagwait/include/MCF5475_PAD.h deleted file mode 100644 index 1d87e2e..0000000 --- a/tos/jtagwait/include/MCF5475_PAD.h +++ /dev/null @@ -1,233 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_PAD_H__ -#define __MCF5475_PAD_H__ - - -/********************************************************************* -* -* Common GPIO -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PAD_PAR_FBCTL (*(volatile uint16_t*)(&_MBAR[0xA40])) -#define MCF_PAD_PAR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA42])) -#define MCF_PAD_PAR_DMA (*(volatile uint8_t *)(&_MBAR[0xA43])) -#define MCF_PAD_PAR_FECI2CIRQ (*(volatile uint16_t*)(&_MBAR[0xA44])) -#define MCF_PAD_PAR_PCIBG (*(volatile uint16_t*)(&_MBAR[0xA48])) -#define MCF_PAD_PAR_PCIBR (*(volatile uint16_t*)(&_MBAR[0xA4A])) -#define MCF_PAD_PAR_PSC3 (*(volatile uint8_t *)(&_MBAR[0xA4C])) -#define MCF_PAD_PAR_PSC2 (*(volatile uint8_t *)(&_MBAR[0xA4D])) -#define MCF_PAD_PAR_PSC1 (*(volatile uint8_t *)(&_MBAR[0xA4E])) -#define MCF_PAD_PAR_PSC0 (*(volatile uint8_t *)(&_MBAR[0xA4F])) -#define MCF_PAD_PAR_DSPI (*(volatile uint16_t*)(&_MBAR[0xA50])) -#define MCF_PAD_PAR_TIMER (*(volatile uint8_t *)(&_MBAR[0xA52])) - - -/* Bit definitions and macros for MCF_PAD_PAR_FBCTL */ -#define MCF_PAD_PAR_FBCTL_PAR_ALE(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_FBCTL_PAR_ALE_GPIO (0) -#define MCF_PAD_PAR_FBCTL_PAR_ALE_TBST (0x2) -#define MCF_PAD_PAR_FBCTL_PAR_ALE_ALE (0x3) -#define MCF_PAD_PAR_FBCTL_PAR_TA (0x4) -#define MCF_PAD_PAR_FBCTL_PAR_RWB(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_FBCTL_PAR_RWB_GPIO (0) -#define MCF_PAD_PAR_FBCTL_PAR_RWB_TBST (0x20) -#define MCF_PAD_PAR_FBCTL_PAR_RWB_RW (0x30) -#define MCF_PAD_PAR_FBCTL_PAR_OE (0x40) -#define MCF_PAD_PAR_FBCTL_PAR_BWE0 (0x100) -#define MCF_PAD_PAR_FBCTL_PAR_BWE1 (0x400) -#define MCF_PAD_PAR_FBCTL_PAR_BWE2 (0x1000) -#define MCF_PAD_PAR_FBCTL_PAR_BWE3 (0x4000) - -/* Bit definitions and macros for MCF_PAD_PAR_FBCS */ -#define MCF_PAD_PAR_FBCS_PAR_CS1 (0x2) -#define MCF_PAD_PAR_FBCS_PAR_CS2 (0x4) -#define MCF_PAD_PAR_FBCS_PAR_CS3 (0x8) -#define MCF_PAD_PAR_FBCS_PAR_CS4 (0x10) -#define MCF_PAD_PAR_FBCS_PAR_CS5 (0x20) - -/* Bit definitions and macros for MCF_PAD_PAR_DMA */ -#define MCF_PAD_PAR_DMA_PAR_DREQ0(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_DMA_PAR_DREQ0_GPIO (0) -#define MCF_PAD_PAR_DMA_PAR_DREQ0_TIN0 (0x2) -#define MCF_PAD_PAR_DMA_PAR_DREQ0_DREQ0 (0x3) -#define MCF_PAD_PAR_DMA_PAR_DREQ1(x) (((x)&0x3)<<0x2) -#define MCF_PAD_PAR_DMA_PAR_DREQ1_GPIO (0) -#define MCF_PAD_PAR_DMA_PAR_DREQ1_IRQ1 (0x4) -#define MCF_PAD_PAR_DMA_PAR_DREQ1_TIN1 (0x8) -#define MCF_PAD_PAR_DMA_PAR_DREQ1_DREQ1 (0xC) -#define MCF_PAD_PAR_DMA_PAR_DACK0(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_DMA_PAR_DACK0_GPIO (0) -#define MCF_PAD_PAR_DMA_PAR_DACK0_TOUT0 (0x20) -#define MCF_PAD_PAR_DMA_PAR_DACK0_DACK0 (0x30) -#define MCF_PAD_PAR_DMA_PAR_DACK1(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_DMA_PAR_DACK1_GPIO (0) -#define MCF_PAD_PAR_DMA_PAR_DACK1_TOUT1 (0x80) -#define MCF_PAD_PAR_DMA_PAR_DACK1_DACK1 (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_FECI2CIRQ */ -#define MCF_PAD_PAR_FECI2CIRQ_PAR_IRQ5 (0x1) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_IRQ6 (0x2) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_SCL (0x4) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_SDA (0x8) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDC(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDC_SCL (0x80) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDC_E1MDC (0xC0) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDIO(x) (((x)&0x3)<<0x8) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDIO_SDA (0x200) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDIO_E1MDIO (0x300) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MII (0x400) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E17 (0x800) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E0MDC (0x1000) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E0MDIO (0x2000) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E0MII (0x4000) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E07 (0x8000) - -/* Bit definitions and macros for MCF_PAD_PAR_PCIBG */ -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG0(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG0_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG0_TOUT0 (0x2) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0 (0x3) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG1(x) (((x)&0x3)<<0x2) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG1_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG1_TOUT1 (0x8) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 (0xC) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG2(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG2_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG2_TOUT2 (0x20) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 (0x30) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG3(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG3_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG3_TOUT3 (0x80) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG3_PCIBG3 (0xC0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG4(x) (((x)&0x3)<<0x8) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG4_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG4_TBST (0x200) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG4_PCIBG4 (0x300) - -/* Bit definitions and macros for MCF_PAD_PAR_PCIBR */ -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR0(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR0_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR0_TIN0 (0x2) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0 (0x3) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR1(x) (((x)&0x3)<<0x2) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR1_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR1_TIN1 (0x8) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 (0xC) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR2(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR2_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR2_TIN2 (0x20) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 (0x30) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR3(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR3_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR3_TIN3 (0x80) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR3_PCIBR3 (0xC0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR4(x) (((x)&0x3)<<0x8) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR4_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR4_IRQ4 (0x200) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR4_PCIBR4 (0x300) - -/* Bit definitions and macros for MCF_PAD_PAR_PSC3 */ -#define MCF_PAD_PAR_PSC3_PAR_TXD3 (0x4) -#define MCF_PAD_PAR_PSC3_PAR_RXD3 (0x8) -#define MCF_PAD_PAR_PSC3_PAR_RTS3(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PSC3_PAR_RTS3_GPIO (0) -#define MCF_PAD_PAR_PSC3_PAR_RTS3_FSYNC (0x20) -#define MCF_PAD_PAR_PSC3_PAR_RTS3_RTS (0x30) -#define MCF_PAD_PAR_PSC3_PAR_CTS3(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PSC3_PAR_CTS3_GPIO (0) -#define MCF_PAD_PAR_PSC3_PAR_CTS3_BCLK (0x80) -#define MCF_PAD_PAR_PSC3_PAR_CTS3_CTS (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_PSC2 */ -#define MCF_PAD_PAR_PSC2_PAR_TXD2 (0x4) -#define MCF_PAD_PAR_PSC2_PAR_RXD2 (0x8) -#define MCF_PAD_PAR_PSC2_PAR_RTS2(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PSC2_PAR_RTS2_GPIO (0) -#define MCF_PAD_PAR_PSC2_PAR_RTS2_FSYNC (0x20) -#define MCF_PAD_PAR_PSC2_PAR_RTS2_RTS (0x30) -#define MCF_PAD_PAR_PSC2_PAR_CTS2(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PSC2_PAR_CTS2_GPIO (0) -#define MCF_PAD_PAR_PSC2_PAR_CTS2_BCLK (0x80) -#define MCF_PAD_PAR_PSC2_PAR_CTS2_CTS (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_PSC1 */ -#define MCF_PAD_PAR_PSC1_PAR_TXD1 (0x4) -#define MCF_PAD_PAR_PSC1_PAR_RXD1 (0x8) -#define MCF_PAD_PAR_PSC1_PAR_RTS1(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PSC1_PAR_RTS1_GPIO (0) -#define MCF_PAD_PAR_PSC1_PAR_RTS1_FSYNC (0x20) -#define MCF_PAD_PAR_PSC1_PAR_RTS1_RTS (0x30) -#define MCF_PAD_PAR_PSC1_PAR_CTS1(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PSC1_PAR_CTS1_GPIO (0) -#define MCF_PAD_PAR_PSC1_PAR_CTS1_BCLK (0x80) -#define MCF_PAD_PAR_PSC1_PAR_CTS1_CTS (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_PSC0 */ -#define MCF_PAD_PAR_PSC0_PAR_TXD0 (0x4) -#define MCF_PAD_PAR_PSC0_PAR_RXD0 (0x8) -#define MCF_PAD_PAR_PSC0_PAR_RTS0(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PSC0_PAR_RTS0_GPIO (0) -#define MCF_PAD_PAR_PSC0_PAR_RTS0_FSYNC (0x20) -#define MCF_PAD_PAR_PSC0_PAR_RTS0_RTS (0x30) -#define MCF_PAD_PAR_PSC0_PAR_CTS0(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PSC0_PAR_CTS0_GPIO (0) -#define MCF_PAD_PAR_PSC0_PAR_CTS0_BCLK (0x80) -#define MCF_PAD_PAR_PSC0_PAR_CTS0_CTS (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_DSPI */ -#define MCF_PAD_PAR_DSPI_PAR_SOUT(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_DSPI_PAR_SOUT_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_SOUT_TXD (0x2) -#define MCF_PAD_PAR_DSPI_PAR_SOUT_SOUT (0x3) -#define MCF_PAD_PAR_DSPI_PAR_SIN(x) (((x)&0x3)<<0x2) -#define MCF_PAD_PAR_DSPI_PAR_SIN_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_SIN_RXD (0x8) -#define MCF_PAD_PAR_DSPI_PAR_SIN_SIN (0xC) -#define MCF_PAD_PAR_DSPI_PAR_SCK(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_DSPI_PAR_SCK_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_SCK_BCLK (0x10) -#define MCF_PAD_PAR_DSPI_PAR_SCK_CTS (0x20) -#define MCF_PAD_PAR_DSPI_PAR_SCK_SCK (0x30) -#define MCF_PAD_PAR_DSPI_PAR_CS0(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_DSPI_PAR_CS0_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_CS0_FSYNC (0x40) -#define MCF_PAD_PAR_DSPI_PAR_CS0_RTS (0x80) -#define MCF_PAD_PAR_DSPI_PAR_CS0_DSPICS0 (0xC0) -#define MCF_PAD_PAR_DSPI_PAR_CS2(x) (((x)&0x3)<<0x8) -#define MCF_PAD_PAR_DSPI_PAR_CS2_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_CS2_TOUT2 (0x200) -#define MCF_PAD_PAR_DSPI_PAR_CS2_DSPICS2 (0x300) -#define MCF_PAD_PAR_DSPI_PAR_CS3(x) (((x)&0x3)<<0xA) -#define MCF_PAD_PAR_DSPI_PAR_CS3_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_CS3_TOUT3 (0x800) -#define MCF_PAD_PAR_DSPI_PAR_CS3_DSPICS3 (0xC00) -#define MCF_PAD_PAR_DSPI_PAR_CS5 (0x1000) - -/* Bit definitions and macros for MCF_PAD_PAR_TIMER */ -#define MCF_PAD_PAR_TIMER_PAR_TOUT2 (0x1) -#define MCF_PAD_PAR_TIMER_PAR_TIN2(x) (((x)&0x3)<<0x1) -#define MCF_PAD_PAR_TIMER_PAR_TIN2_IRQ2 (0x4) -#define MCF_PAD_PAR_TIMER_PAR_TIN2_TIN2 (0x6) -#define MCF_PAD_PAR_TIMER_PAR_TOUT3 (0x8) -#define MCF_PAD_PAR_TIMER_PAR_TIN3(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_TIMER_PAR_TIN3_IRQ3 (0x20) -#define MCF_PAD_PAR_TIMER_PAR_TIN3_TIN3 (0x30) - - -#endif /* __MCF5475_PAD_H__ */ diff --git a/tos/jtagwait/include/MCF5475_PCI.h b/tos/jtagwait/include/MCF5475_PCI.h deleted file mode 100644 index 3eb3341..0000000 --- a/tos/jtagwait/include/MCF5475_PCI.h +++ /dev/null @@ -1,376 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_PCI_H__ -#define __MCF5475_PCI_H__ - - -/********************************************************************* -* -* PCI Bus Controller (PCI) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PCI_PCIIDR (*(volatile uint32_t*)(&_MBAR[0xB00])) -#define MCF_PCI_PCISCR (*(volatile uint32_t*)(&_MBAR[0xB04])) -#define MCF_PCI_PCICCRIR (*(volatile uint32_t*)(&_MBAR[0xB08])) -#define MCF_PCI_PCICR1 (*(volatile uint32_t*)(&_MBAR[0xB0C])) -#define MCF_PCI_PCIBAR0 (*(volatile uint32_t*)(&_MBAR[0xB10])) -#define MCF_PCI_PCIBAR1 (*(volatile uint32_t*)(&_MBAR[0xB14])) -#define MCF_PCI_PCICCPR (*(volatile uint32_t*)(&_MBAR[0xB28])) -#define MCF_PCI_PCISID (*(volatile uint32_t*)(&_MBAR[0xB2C])) -#define MCF_PCI_PCICR2 (*(volatile uint32_t*)(&_MBAR[0xB3C])) -#define MCF_PCI_PCIGSCR (*(volatile uint32_t*)(&_MBAR[0xB60])) -#define MCF_PCI_PCITBATR0 (*(volatile uint32_t*)(&_MBAR[0xB64])) -#define MCF_PCI_PCITBATR1 (*(volatile uint32_t*)(&_MBAR[0xB68])) -#define MCF_PCI_PCITCR (*(volatile uint32_t*)(&_MBAR[0xB6C])) -#define MCF_PCI_PCIIW0BTAR (*(volatile uint32_t*)(&_MBAR[0xB70])) -#define MCF_PCI_PCIIW1BTAR (*(volatile uint32_t*)(&_MBAR[0xB74])) -#define MCF_PCI_PCIIW2BTAR (*(volatile uint32_t*)(&_MBAR[0xB78])) -#define MCF_PCI_PCIIWCR (*(volatile uint32_t*)(&_MBAR[0xB80])) -#define MCF_PCI_PCIICR (*(volatile uint32_t*)(&_MBAR[0xB84])) -#define MCF_PCI_PCIISR (*(volatile uint32_t*)(&_MBAR[0xB88])) -#define MCF_PCI_PCICAR (*(volatile uint32_t*)(&_MBAR[0xBF8])) -#define MCF_PCI_PCITPSR (*(volatile uint32_t*)(&_MBAR[0x8400])) -#define MCF_PCI_PCITSAR (*(volatile uint32_t*)(&_MBAR[0x8404])) -#define MCF_PCI_PCITTCR (*(volatile uint32_t*)(&_MBAR[0x8408])) -#define MCF_PCI_PCITER (*(volatile uint32_t*)(&_MBAR[0x840C])) -#define MCF_PCI_PCITNAR (*(volatile uint32_t*)(&_MBAR[0x8410])) -#define MCF_PCI_PCITLWR (*(volatile uint32_t*)(&_MBAR[0x8414])) -#define MCF_PCI_PCITDCR (*(volatile uint32_t*)(&_MBAR[0x8418])) -#define MCF_PCI_PCITSR (*(volatile uint32_t*)(&_MBAR[0x841C])) -#define MCF_PCI_PCITFDR (*(volatile uint32_t*)(&_MBAR[0x8440])) -#define MCF_PCI_PCITFSR (*(volatile uint32_t*)(&_MBAR[0x8444])) -#define MCF_PCI_PCITFCR (*(volatile uint32_t*)(&_MBAR[0x8448])) -#define MCF_PCI_PCITFAR (*(volatile uint32_t*)(&_MBAR[0x844C])) -#define MCF_PCI_PCITFRPR (*(volatile uint32_t*)(&_MBAR[0x8450])) -#define MCF_PCI_PCITFWPR (*(volatile uint32_t*)(&_MBAR[0x8454])) -#define MCF_PCI_PCIRPSR (*(volatile uint32_t*)(&_MBAR[0x8480])) -#define MCF_PCI_PCIRSAR (*(volatile uint32_t*)(&_MBAR[0x8484])) -#define MCF_PCI_PCIRTCR (*(volatile uint32_t*)(&_MBAR[0x8488])) -#define MCF_PCI_PCIRER (*(volatile uint32_t*)(&_MBAR[0x848C])) -#define MCF_PCI_PCIRNAR (*(volatile uint32_t*)(&_MBAR[0x8490])) -#define MCF_PCI_PCIRDCR (*(volatile uint32_t*)(&_MBAR[0x8498])) -#define MCF_PCI_PCIRSR (*(volatile uint32_t*)(&_MBAR[0x849C])) -#define MCF_PCI_PCIRFDR (*(volatile uint32_t*)(&_MBAR[0x84C0])) -#define MCF_PCI_PCIRFSR (*(volatile uint32_t*)(&_MBAR[0x84C4])) -#define MCF_PCI_PCIRFCR (*(volatile uint32_t*)(&_MBAR[0x84C8])) -#define MCF_PCI_PCIRFAR (*(volatile uint32_t*)(&_MBAR[0x84CC])) -#define MCF_PCI_PCIRFRPR (*(volatile uint32_t*)(&_MBAR[0x84D0])) -#define MCF_PCI_PCIRFWPR (*(volatile uint32_t*)(&_MBAR[0x84D4])) - - -/* Bit definitions and macros for MCF_PCI_PCIIDR */ -#define MCF_PCI_PCIIDR_VENDORID(x) (((x)&0xFFFF)<<0) -#define MCF_PCI_PCIIDR_DEVICEID(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCISCR */ -#define MCF_PCI_PCISCR_IO (0x1) -#define MCF_PCI_PCISCR_M (0x2) -#define MCF_PCI_PCISCR_B (0x4) -#define MCF_PCI_PCISCR_SP (0x8) -#define MCF_PCI_PCISCR_MW (0x10) -#define MCF_PCI_PCISCR_V (0x20) -#define MCF_PCI_PCISCR_PER (0x40) -#define MCF_PCI_PCISCR_ST (0x80) -#define MCF_PCI_PCISCR_S (0x100) -#define MCF_PCI_PCISCR_F (0x200) -#define MCF_PCI_PCISCR_C (0x100000) -#define MCF_PCI_PCISCR_66M (0x200000) -#define MCF_PCI_PCISCR_R (0x400000) -#define MCF_PCI_PCISCR_FC (0x800000) -#define MCF_PCI_PCISCR_DP (0x1000000) -#define MCF_PCI_PCISCR_DT(x) (((x)&0x3)<<0x19) -#define MCF_PCI_PCISCR_TS (0x8000000) -#define MCF_PCI_PCISCR_TR (0x10000000) -#define MCF_PCI_PCISCR_MA (0x20000000) -#define MCF_PCI_PCISCR_SE (0x40000000) -#define MCF_PCI_PCISCR_PE (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCICCRIR */ -#define MCF_PCI_PCICCRIR_REVISIONID(x) (((x)&0xFF)<<0) -#define MCF_PCI_PCICCRIR_CLASSCODE(x) (((x)&0xFFFFFF)<<0x8) - -/* Bit definitions and macros for MCF_PCI_PCICR1 */ -#define MCF_PCI_PCICR1_CACHELINESIZE(x) (((x)&0xFF)<<0) -#define MCF_PCI_PCICR1_LATTIMER(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCICR1_HEADERTYPE(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCICR1_BIST(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIBAR0 */ -#define MCF_PCI_PCIBAR0_IOM (0x1) -#define MCF_PCI_PCIBAR0_RANGE(x) (((x)&0x3)<<0x1) -#define MCF_PCI_PCIBAR0_PREF (0x8) -#define MCF_PCI_PCIBAR0_BAR0(x) (((x)&0x3FFF)<<0x12) - -/* Bit definitions and macros for MCF_PCI_PCIBAR1 */ -#define MCF_PCI_PCIBAR1_IOM (0x1) -#define MCF_PCI_PCIBAR1_RANGE(x) (((x)&0x3)<<0x1) -#define MCF_PCI_PCIBAR1_PREF (0x8) -#define MCF_PCI_PCIBAR1_BAR1(x) (((x)&0x3)<<0x1E) - -/* Bit definitions and macros for MCF_PCI_PCICCPR */ -#define MCF_PCI_PCICCPR_PCICCP(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCISID */ -#define MCF_PCI_PCISID_VENDORID(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCICR2 */ -#define MCF_PCI_PCICR2_INTLINE(x) (((x)&0xFF)<<0) -#define MCF_PCI_PCICR2_INTPIN(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCICR2_MINGNT(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCICR2_MAXLAT(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIGSCR */ -#define MCF_PCI_PCIGSCR_PR (0x1) -#define MCF_PCI_PCIGSCR_SEE (0x1000) -#define MCF_PCI_PCIGSCR_PEE (0x2000) -#define MCF_PCI_PCIGSCR_CLKINRESERVED(x) (((x)&0x7)<<0x10) -#define MCF_PCI_PCIGSCR_XLB2CLKIN(x) (((x)&0x7)<<0x18) -#define MCF_PCI_PCIGSCR_SE (0x10000000) -#define MCF_PCI_PCIGSCR_PE (0x20000000) - -/* Bit definitions and macros for MCF_PCI_PCITBATR0 */ -#define MCF_PCI_PCITBATR0_EN (0x1) -#define MCF_PCI_PCITBATR0_BAT0(x) (((x)&0x3FFF)<<0x12) - -/* Bit definitions and macros for MCF_PCI_PCITBATR1 */ -#define MCF_PCI_PCITBATR1_EN (0x1) -#define MCF_PCI_PCITBATR1_BAT1(x) (((x)&0x3)<<0x1E) - -/* Bit definitions and macros for MCF_PCI_PCITCR */ -#define MCF_PCI_PCITCR_P (0x10000) -#define MCF_PCI_PCITCR_LD (0x1000000) - -/* Bit definitions and macros for MCF_PCI_PCIIW0BTAR */ -#define MCF_PCI_PCIIW0BTAR_WTA0(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCIIW0BTAR_WAM0(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCIIW0BTAR_WBA0(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIIW1BTAR */ -#define MCF_PCI_PCIIW1BTAR_WTA1(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCIIW1BTAR_WAM1(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCIIW1BTAR_WBA1(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIIW2BTAR */ -#define MCF_PCI_PCIIW2BTAR_WTA2(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCIIW2BTAR_WAM2(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCIIW2BTAR_WBA2(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIIWCR */ -#define MCF_PCI_PCIIWCR_WINCTRL2_E (0x100) -#define MCF_PCI_PCIIWCR_WINCTRL2_PRC(x) (((x)&0x3)<<0x9) -#define MCF_PCI_PCIIWCR_WINCTRL2_IOM (0x800) -#define MCF_PCI_PCIIWCR_WINCTRL1_E (0x10000) -#define MCF_PCI_PCIIWCR_WINCTRL1_PRC(x) (((x)&0x3)<<0x11) -#define MCF_PCI_PCIIWCR_WINCTRL1_IOM (0x80000) -#define MCF_PCI_PCIIWCR_WINCTRL0_E (0x1000000) -#define MCF_PCI_PCIIWCR_WINCTRL0_PRC(x) (((x)&0x3)<<0x19) -#define MCF_PCI_PCIIWCR_WINCTRL0_IOM (0x8000000) -#define MCF_PCI_PCIIWCR_WINCTRL2_MEMREAD (0x100) -#define MCF_PCI_PCIIWCR_WINCTRL2_MEMRDLINE (0x300) -#define MCF_PCI_PCIIWCR_WINCTRL2_MEMRDMUL (0x500) -#define MCF_PCI_PCIIWCR_WINCTRL2_IO (0x900) -#define MCF_PCI_PCIIWCR_WINCTRL1_MEMREAD (0x10000) -#define MCF_PCI_PCIIWCR_WINCTRL1_MEMRDLINE (0x30000) -#define MCF_PCI_PCIIWCR_WINCTRL1_MEMRDMUL (0x50000) -#define MCF_PCI_PCIIWCR_WINCTRL1_IO (0x90000) -#define MCF_PCI_PCIIWCR_WINCTRL0_MEMREAD (0x1000000) -#define MCF_PCI_PCIIWCR_WINCTRL0_MEMRDLINE (0x3000000) -#define MCF_PCI_PCIIWCR_WINCTRL0_MEMRDMUL (0x5000000) -#define MCF_PCI_PCIIWCR_WINCTRL0_IO (0x9000000) - -/* Bit definitions and macros for MCF_PCI_PCIICR */ -#define MCF_PCI_PCIICR_MAXRETRY(x) (((x)&0xFF)<<0) -#define MCF_PCI_PCIICR_TAE (0x1000000) -#define MCF_PCI_PCIICR_IAE (0x2000000) -#define MCF_PCI_PCIICR_REE (0x4000000) - -/* Bit definitions and macros for MCF_PCI_PCIISR */ -#define MCF_PCI_PCIISR_TA (0x1000000) -#define MCF_PCI_PCIISR_IA (0x2000000) -#define MCF_PCI_PCIISR_RE (0x4000000) - -/* Bit definitions and macros for MCF_PCI_PCICAR */ -#define MCF_PCI_PCICAR_DWORD(x) (((x)&0x3F)<<0x2) -#define MCF_PCI_PCICAR_FUNCNUM(x) (((x)&0x7)<<0x8) -#define MCF_PCI_PCICAR_DEVNUM(x) (((x)&0x1F)<<0xB) -#define MCF_PCI_PCICAR_BUSNUM(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCICAR_E (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCITPSR */ -#define MCF_PCI_PCITPSR_PKTSIZE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCITSAR */ -#define MCF_PCI_PCITSAR_STARTADD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITTCR */ -#define MCF_PCI_PCITTCR_DI (0x1) -#define MCF_PCI_PCITTCR_W (0x10) -#define MCF_PCI_PCITTCR_MAXBEATS(x) (((x)&0x7)<<0x8) -#define MCF_PCI_PCITTCR_MAXRETRY(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCITTCR_PCICMD(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCITER */ -#define MCF_PCI_PCITER_NE (0x10000) -#define MCF_PCI_PCITER_IAE (0x20000) -#define MCF_PCI_PCITER_TAE (0x40000) -#define MCF_PCI_PCITER_RE (0x80000) -#define MCF_PCI_PCITER_SE (0x100000) -#define MCF_PCI_PCITER_FEE (0x200000) -#define MCF_PCI_PCITER_ME (0x1000000) -#define MCF_PCI_PCITER_BE (0x8000000) -#define MCF_PCI_PCITER_CM (0x10000000) -#define MCF_PCI_PCITER_RF (0x40000000) -#define MCF_PCI_PCITER_RC (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCITNAR */ -#define MCF_PCI_PCITNAR_NEXTADDRESS(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITLWR */ -#define MCF_PCI_PCITLWR_LASTWORD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITDCR */ -#define MCF_PCI_PCITDCR_PKTSDONE(x) (((x)&0xFFFF)<<0) -#define MCF_PCI_PCITDCR_BYTESDONE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCITSR */ -#define MCF_PCI_PCITSR_IA (0x10000) -#define MCF_PCI_PCITSR_TA (0x20000) -#define MCF_PCI_PCITSR_RE (0x40000) -#define MCF_PCI_PCITSR_SE (0x80000) -#define MCF_PCI_PCITSR_FE (0x100000) -#define MCF_PCI_PCITSR_BE1 (0x200000) -#define MCF_PCI_PCITSR_BE2 (0x400000) -#define MCF_PCI_PCITSR_BE3 (0x800000) -#define MCF_PCI_PCITSR_NT (0x1000000) - -/* Bit definitions and macros for MCF_PCI_PCITFDR */ -#define MCF_PCI_PCITFDR_FIFODATAWORD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITFSR */ -#define MCF_PCI_PCITFSR_EMPTY (0x10000) -#define MCF_PCI_PCITFSR_ALARM (0x20000) -#define MCF_PCI_PCITFSR_FULL (0x40000) -#define MCF_PCI_PCITFSR_FR (0x80000) -#define MCF_PCI_PCITFSR_OF (0x100000) -#define MCF_PCI_PCITFSR_UF (0x200000) -#define MCF_PCI_PCITFSR_RXW (0x400000) -#define MCF_PCI_PCITFSR_FAE (0x800000) -#define MCF_PCI_PCITFSR_TXW (0x40000000) -#define MCF_PCI_PCITFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCITFCR */ -#define MCF_PCI_PCITFCR_TXW_MASK (0x40000) -#define MCF_PCI_PCITFCR_OF_MASK (0x80000) -#define MCF_PCI_PCITFCR_UF_MASK (0x100000) -#define MCF_PCI_PCITFCR_RXW_MASK (0x200000) -#define MCF_PCI_PCITFCR_FAE_MASK (0x400000) -#define MCF_PCI_PCITFCR_IP_MASK (0x800000) -#define MCF_PCI_PCITFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_PCI_PCITFCR_WFR (0x20000000) - -/* Bit definitions and macros for MCF_PCI_PCITFAR */ -#define MCF_PCI_PCITFAR_ALARM(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITFRPR */ -#define MCF_PCI_PCITFRPR_READPTR(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITFWPR */ -#define MCF_PCI_PCITFWPR_WRITEPTR(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRPSR */ -#define MCF_PCI_PCIRPSR_PKTSIZE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCIRSAR */ -#define MCF_PCI_PCIRSAR_STARTADD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRTCR */ -#define MCF_PCI_PCIRTCR_DI (0x1) -#define MCF_PCI_PCIRTCR_W (0x10) -#define MCF_PCI_PCIRTCR_MAXBEATS(x) (((x)&0x7)<<0x8) -#define MCF_PCI_PCIRTCR_FB (0x1000) -#define MCF_PCI_PCIRTCR_MAXRETRY(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCIRTCR_PCICMD(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIRER */ -#define MCF_PCI_PCIRER_NE (0x10000) -#define MCF_PCI_PCIRER_IAE (0x20000) -#define MCF_PCI_PCIRER_TAE (0x40000) -#define MCF_PCI_PCIRER_RE (0x80000) -#define MCF_PCI_PCIRER_SE (0x100000) -#define MCF_PCI_PCIRER_FEE (0x200000) -#define MCF_PCI_PCIRER_ME (0x1000000) -#define MCF_PCI_PCIRER_BE (0x8000000) -#define MCF_PCI_PCIRER_CM (0x10000000) -#define MCF_PCI_PCIRER_FE (0x20000000) -#define MCF_PCI_PCIRER_RF (0x40000000) -#define MCF_PCI_PCIRER_RC (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCIRNAR */ -#define MCF_PCI_PCIRNAR_NEXTADDRESS(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRDCR */ -#define MCF_PCI_PCIRDCR_PKTSDONE(x) (((x)&0xFFFF)<<0) -#define MCF_PCI_PCIRDCR_BYTESDONE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCIRSR */ -#define MCF_PCI_PCIRSR_IA (0x10000) -#define MCF_PCI_PCIRSR_TA (0x20000) -#define MCF_PCI_PCIRSR_RE (0x40000) -#define MCF_PCI_PCIRSR_SE (0x80000) -#define MCF_PCI_PCIRSR_FE (0x100000) -#define MCF_PCI_PCIRSR_BE1 (0x200000) -#define MCF_PCI_PCIRSR_BE2 (0x400000) -#define MCF_PCI_PCIRSR_BE3 (0x800000) -#define MCF_PCI_PCIRSR_NT (0x1000000) - -/* Bit definitions and macros for MCF_PCI_PCIRFDR */ -#define MCF_PCI_PCIRFDR_FIFODATAWORD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRFSR */ -#define MCF_PCI_PCIRFSR_EMPTY (0x10000) -#define MCF_PCI_PCIRFSR_ALARM (0x20000) -#define MCF_PCI_PCIRFSR_FULL (0x40000) -#define MCF_PCI_PCIRFSR_FR (0x80000) -#define MCF_PCI_PCIRFSR_OF (0x100000) -#define MCF_PCI_PCIRFSR_UF (0x200000) -#define MCF_PCI_PCIRFSR_RXW (0x400000) -#define MCF_PCI_PCIRFSR_FAE (0x800000) -#define MCF_PCI_PCIRFSR_TXW (0x40000000) -#define MCF_PCI_PCIRFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCIRFCR */ -#define MCF_PCI_PCIRFCR_TXW_MASK (0x40000) -#define MCF_PCI_PCIRFCR_OF_MASK (0x80000) -#define MCF_PCI_PCIRFCR_UF_MASK (0x100000) -#define MCF_PCI_PCIRFCR_RXW_MASK (0x200000) -#define MCF_PCI_PCIRFCR_FAE_MASK (0x400000) -#define MCF_PCI_PCIRFCR_IP_MASK (0x800000) -#define MCF_PCI_PCIRFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_PCI_PCIRFCR_WFR (0x20000000) - -/* Bit definitions and macros for MCF_PCI_PCIRFAR */ -#define MCF_PCI_PCIRFAR_ALARM(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRFRPR */ -#define MCF_PCI_PCIRFRPR_READPTR(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRFWPR */ -#define MCF_PCI_PCIRFWPR_WRITEPTR(x) (((x)&0x7F)<<0) - - -#endif /* __MCF5475_PCI_H__ */ diff --git a/tos/jtagwait/include/MCF5475_PCIARB.h b/tos/jtagwait/include/MCF5475_PCIARB.h deleted file mode 100644 index 9e8c05b..0000000 --- a/tos/jtagwait/include/MCF5475_PCIARB.h +++ /dev/null @@ -1,43 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_PCIARB_H__ -#define __MCF5475_PCIARB_H__ - - -/********************************************************************* -* -* PCI Bus Arbiter Module (PCIARB) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PCIARB_PACR (*(volatile uint32_t*)(&_MBAR[0xC00])) -#define MCF_PCIARB_PASR (*(volatile uint32_t*)(&_MBAR[0xC04])) - - -/* Bit definitions and macros for MCF_PCIARB_PACR */ -#define MCF_PCIARB_PACR_INTMPRI (0x1) -#define MCF_PCIARB_PACR_EXTMPRI(x) (((x)&0x1F)<<0x1) -#define MCF_PCIARB_PACR_INTMINTEN (0x10000) -#define MCF_PCIARB_PACR_EXTMINTEN(x) (((x)&0x1F)<<0x11) -#define MCF_PCIARB_PACR_DS (0x80000000) - -/* Bit definitions and macros for MCF_PCIARB_PASR */ -#define MCF_PCIARB_PASR_ITLMBK (0x10000) -#define MCF_PCIARB_PASR_EXTMBK(x) (((x)&0x1F)<<0x11) - - -#endif /* __MCF5475_PCIARB_H__ */ diff --git a/tos/jtagwait/include/MCF5475_PSC.h b/tos/jtagwait/include/MCF5475_PSC.h deleted file mode 100644 index ffa9f3e..0000000 --- a/tos/jtagwait/include/MCF5475_PSC.h +++ /dev/null @@ -1,527 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_PSC_H__ -#define __MCF5475_PSC_H__ - - -/********************************************************************* -* -* Programmable Serial Controller (PSC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PSC0_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8600])) -#define MCF_PSC0_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8600])) -#define MCF_PSC0_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8604])) -#define MCF_PSC0_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8604])) -#define MCF_PSC0_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8608])) -#define MCF_PSC0_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8610])) -#define MCF_PSC0_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8610])) -#define MCF_PSC0_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8614])) -#define MCF_PSC0_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8614])) -#define MCF_PSC0_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8618])) -#define MCF_PSC0_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x861C])) -#define MCF_PSC0_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8634])) -#define MCF_PSC0_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8638])) -#define MCF_PSC0_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x863C])) -#define MCF_PSC0_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8640])) -#define MCF_PSC0_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8644])) -#define MCF_PSC0_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8648])) -#define MCF_PSC0_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x864C])) -#define MCF_PSC0_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8650])) -#define MCF_PSC0_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8654])) -#define MCF_PSC0_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8658])) -#define MCF_PSC0_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x865C])) -#define MCF_PSC0_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8660])) -#define MCF_PSC0_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8664])) -#define MCF_PSC0_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8668])) -#define MCF_PSC0_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x866E])) -#define MCF_PSC0_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8672])) -#define MCF_PSC0_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8676])) -#define MCF_PSC0_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x867A])) -#define MCF_PSC0_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x867E])) -#define MCF_PSC0_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8680])) -#define MCF_PSC0_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8684])) -#define MCF_PSC0_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8688])) -#define MCF_PSC0_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x868E])) -#define MCF_PSC0_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8692])) -#define MCF_PSC0_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8696])) -#define MCF_PSC0_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x869A])) -#define MCF_PSC0_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x869E])) - -#define MCF_PSC1_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8700])) -#define MCF_PSC1_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8700])) -#define MCF_PSC1_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8704])) -#define MCF_PSC1_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8704])) -#define MCF_PSC1_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8708])) -#define MCF_PSC1_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8710])) -#define MCF_PSC1_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8710])) -#define MCF_PSC1_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8714])) -#define MCF_PSC1_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8714])) -#define MCF_PSC1_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8718])) -#define MCF_PSC1_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x871C])) -#define MCF_PSC1_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8734])) -#define MCF_PSC1_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8738])) -#define MCF_PSC1_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x873C])) -#define MCF_PSC1_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8740])) -#define MCF_PSC1_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8744])) -#define MCF_PSC1_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8748])) -#define MCF_PSC1_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x874C])) -#define MCF_PSC1_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8750])) -#define MCF_PSC1_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8754])) -#define MCF_PSC1_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8758])) -#define MCF_PSC1_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x875C])) -#define MCF_PSC1_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8760])) -#define MCF_PSC1_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8764])) -#define MCF_PSC1_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8768])) -#define MCF_PSC1_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x876E])) -#define MCF_PSC1_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8772])) -#define MCF_PSC1_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8776])) -#define MCF_PSC1_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x877A])) -#define MCF_PSC1_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x877E])) -#define MCF_PSC1_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8780])) -#define MCF_PSC1_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8784])) -#define MCF_PSC1_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8788])) -#define MCF_PSC1_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x878E])) -#define MCF_PSC1_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8792])) -#define MCF_PSC1_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8796])) -#define MCF_PSC1_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x879A])) -#define MCF_PSC1_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x879E])) - -#define MCF_PSC2_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8800])) -#define MCF_PSC2_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8800])) -#define MCF_PSC2_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8804])) -#define MCF_PSC2_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8804])) -#define MCF_PSC2_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8808])) -#define MCF_PSC2_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8810])) -#define MCF_PSC2_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8810])) -#define MCF_PSC2_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8814])) -#define MCF_PSC2_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8814])) -#define MCF_PSC2_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8818])) -#define MCF_PSC2_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x881C])) -#define MCF_PSC2_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8834])) -#define MCF_PSC2_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8838])) -#define MCF_PSC2_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x883C])) -#define MCF_PSC2_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8840])) -#define MCF_PSC2_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8844])) -#define MCF_PSC2_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8848])) -#define MCF_PSC2_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x884C])) -#define MCF_PSC2_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8850])) -#define MCF_PSC2_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8854])) -#define MCF_PSC2_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8858])) -#define MCF_PSC2_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x885C])) -#define MCF_PSC2_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8860])) -#define MCF_PSC2_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8864])) -#define MCF_PSC2_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8868])) -#define MCF_PSC2_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x886E])) -#define MCF_PSC2_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8872])) -#define MCF_PSC2_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8876])) -#define MCF_PSC2_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x887A])) -#define MCF_PSC2_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x887E])) -#define MCF_PSC2_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8880])) -#define MCF_PSC2_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8884])) -#define MCF_PSC2_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8888])) -#define MCF_PSC2_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x888E])) -#define MCF_PSC2_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8892])) -#define MCF_PSC2_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8896])) -#define MCF_PSC2_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x889A])) -#define MCF_PSC2_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x889E])) - -#define MCF_PSC3_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8900])) -#define MCF_PSC3_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8900])) -#define MCF_PSC3_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8904])) -#define MCF_PSC3_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8904])) -#define MCF_PSC3_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8908])) -#define MCF_PSC3_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8910])) -#define MCF_PSC3_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8910])) -#define MCF_PSC3_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8914])) -#define MCF_PSC3_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8914])) -#define MCF_PSC3_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8918])) -#define MCF_PSC3_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x891C])) -#define MCF_PSC3_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8934])) -#define MCF_PSC3_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8938])) -#define MCF_PSC3_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x893C])) -#define MCF_PSC3_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8940])) -#define MCF_PSC3_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8944])) -#define MCF_PSC3_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8948])) -#define MCF_PSC3_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x894C])) -#define MCF_PSC3_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8950])) -#define MCF_PSC3_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8954])) -#define MCF_PSC3_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8958])) -#define MCF_PSC3_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x895C])) -#define MCF_PSC3_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8960])) -#define MCF_PSC3_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8964])) -#define MCF_PSC3_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8968])) -#define MCF_PSC3_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x896E])) -#define MCF_PSC3_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8972])) -#define MCF_PSC3_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8976])) -#define MCF_PSC3_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x897A])) -#define MCF_PSC3_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x897E])) -#define MCF_PSC3_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8980])) -#define MCF_PSC3_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8984])) -#define MCF_PSC3_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8988])) -#define MCF_PSC3_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x898E])) -#define MCF_PSC3_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8992])) -#define MCF_PSC3_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8996])) -#define MCF_PSC3_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x899A])) -#define MCF_PSC3_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x899E])) - -#define MCF_PSC_PSCMR(x) (*(volatile uint8_t *)(&_MBAR[0x8600 + ((x)*0x100)])) -#define MCF_PSC_PSCCSR(x) (*(volatile uint8_t *)(&_MBAR[0x8604 + ((x)*0x100)])) -#define MCF_PSC_PSCSR(x) (*(volatile uint16_t*)(&_MBAR[0x8604 + ((x)*0x100)])) -#define MCF_PSC_PSCCR(x) (*(volatile uint8_t *)(&_MBAR[0x8608 + ((x)*0x100)])) -#define MCF_PSC_PSCRB_8BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCTB_8BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCRB_16BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCTB_16BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCRB_AC97(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCTB_AC97(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCIPCR(x) (*(volatile uint8_t *)(&_MBAR[0x8610 + ((x)*0x100)])) -#define MCF_PSC_PSCACR(x) (*(volatile uint8_t *)(&_MBAR[0x8610 + ((x)*0x100)])) -#define MCF_PSC_PSCIMR(x) (*(volatile uint16_t*)(&_MBAR[0x8614 + ((x)*0x100)])) -#define MCF_PSC_PSCISR(x) (*(volatile uint16_t*)(&_MBAR[0x8614 + ((x)*0x100)])) -#define MCF_PSC_PSCCTUR(x) (*(volatile uint8_t *)(&_MBAR[0x8618 + ((x)*0x100)])) -#define MCF_PSC_PSCCTLR(x) (*(volatile uint8_t *)(&_MBAR[0x861C + ((x)*0x100)])) -#define MCF_PSC_PSCIP(x) (*(volatile uint8_t *)(&_MBAR[0x8634 + ((x)*0x100)])) -#define MCF_PSC_PSCOPSET(x) (*(volatile uint8_t *)(&_MBAR[0x8638 + ((x)*0x100)])) -#define MCF_PSC_PSCOPRESET(x) (*(volatile uint8_t *)(&_MBAR[0x863C + ((x)*0x100)])) -#define MCF_PSC_PSCSICR(x) (*(volatile uint8_t *)(&_MBAR[0x8640 + ((x)*0x100)])) -#define MCF_PSC_PSCIRCR1(x) (*(volatile uint8_t *)(&_MBAR[0x8644 + ((x)*0x100)])) -#define MCF_PSC_PSCIRCR2(x) (*(volatile uint8_t *)(&_MBAR[0x8648 + ((x)*0x100)])) -#define MCF_PSC_PSCIRSDR(x) (*(volatile uint8_t *)(&_MBAR[0x864C + ((x)*0x100)])) -#define MCF_PSC_PSCIRMDR(x) (*(volatile uint8_t *)(&_MBAR[0x8650 + ((x)*0x100)])) -#define MCF_PSC_PSCIRFDR(x) (*(volatile uint8_t *)(&_MBAR[0x8654 + ((x)*0x100)])) -#define MCF_PSC_PSCRFCNT(x) (*(volatile uint16_t*)(&_MBAR[0x8658 + ((x)*0x100)])) -#define MCF_PSC_PSCTFCNT(x) (*(volatile uint16_t*)(&_MBAR[0x865C + ((x)*0x100)])) -#define MCF_PSC_PSCRFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8660 + ((x)*0x100)])) -#define MCF_PSC_PSCRFSR(x) (*(volatile uint16_t*)(&_MBAR[0x8664 + ((x)*0x100)])) -#define MCF_PSC_PSCRFCR(x) (*(volatile uint32_t*)(&_MBAR[0x8668 + ((x)*0x100)])) -#define MCF_PSC_PSCRFAR(x) (*(volatile uint16_t*)(&_MBAR[0x866E + ((x)*0x100)])) -#define MCF_PSC_PSCRFRP(x) (*(volatile uint16_t*)(&_MBAR[0x8672 + ((x)*0x100)])) -#define MCF_PSC_PSCRFWP(x) (*(volatile uint16_t*)(&_MBAR[0x8676 + ((x)*0x100)])) -#define MCF_PSC_PSCRLRFP(x) (*(volatile uint16_t*)(&_MBAR[0x867A + ((x)*0x100)])) -#define MCF_PSC_PSCRLWFP(x) (*(volatile uint16_t*)(&_MBAR[0x867E + ((x)*0x100)])) -#define MCF_PSC_PSCTFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8680 + ((x)*0x100)])) -#define MCF_PSC_PSCTFSR(x) (*(volatile uint16_t*)(&_MBAR[0x8684 + ((x)*0x100)])) -#define MCF_PSC_PSCTFCR(x) (*(volatile uint32_t*)(&_MBAR[0x8688 + ((x)*0x100)])) -#define MCF_PSC_PSCTFAR(x) (*(volatile uint16_t*)(&_MBAR[0x868E + ((x)*0x100)])) -#define MCF_PSC_PSCTFRP(x) (*(volatile uint16_t*)(&_MBAR[0x8692 + ((x)*0x100)])) -#define MCF_PSC_PSCTFWP(x) (*(volatile uint16_t*)(&_MBAR[0x8696 + ((x)*0x100)])) -#define MCF_PSC_PSCTLRFP(x) (*(volatile uint16_t*)(&_MBAR[0x869A + ((x)*0x100)])) -#define MCF_PSC_PSCTLWFP(x) (*(volatile uint16_t*)(&_MBAR[0x869E + ((x)*0x100)])) - -/* Bit definitions and macros for MCF_PSC_PSCMR */ -#define MCF_PSC_PSCMR_SB(x) (((x)&0xF)<<0) -#define MCF_PSC_PSCMR_TXCTS (0x10) -#define MCF_PSC_PSCMR_TXRTS (0x20) -#define MCF_PSC_PSCMR_CM(x) (((x)&0x3)<<0x6) -#define MCF_PSC_PSCMR_CM_NORMAL (0) -#define MCF_PSC_PSCMR_CM_ECHO (0x40) -#define MCF_PSC_PSCMR_CM_LOCAL_LOOP (0x80) -#define MCF_PSC_PSCMR_CM_REMOTE_LOOP (0xC0) -#define MCF_PSC_PSCMR_SB_STOP_BITS_1 (0x7) -#define MCF_PSC_PSCMR_SB_STOP_BITS_15 (0x8) -#define MCF_PSC_PSCMR_SB_STOP_BITS_2 (0xF) -#define MCF_PSC_PSCMR_PM_MULTI_ADDR (0x1C) -#define MCF_PSC_PSCMR_PM_MULTI_DATA (0x18) -#define MCF_PSC_PSCMR_PM_NONE (0x10) -#define MCF_PSC_PSCMR_PM_FORCE_HI (0xC) -#define MCF_PSC_PSCMR_PM_FORCE_LO (0x8) -#define MCF_PSC_PSCMR_PM_ODD (0x4) -#define MCF_PSC_PSCMR_PM_EVEN (0) -#define MCF_PSC_PSCMR_BC(x) (((x)&0x3)<<0) -#define MCF_PSC_PSCMR_BC_5 (0) -#define MCF_PSC_PSCMR_BC_6 (0x1) -#define MCF_PSC_PSCMR_BC_7 (0x2) -#define MCF_PSC_PSCMR_BC_8 (0x3) -#define MCF_PSC_PSCMR_PT (0x4) -#define MCF_PSC_PSCMR_PM(x) (((x)&0x3)<<0x3) -#define MCF_PSC_PSCMR_ERR (0x20) -#define MCF_PSC_PSCMR_RXIRQ_FU (0x40) -#define MCF_PSC_PSCMR_RXRTS (0x80) - -/* Bit definitions and macros for MCF_PSC_PSCCSR */ -#define MCF_PSC_PSCCSR_TCSEL(x) (((x)&0xF)<<0) -#define MCF_PSC_PSCCSR_RCSEL(x) (((x)&0xF)<<0x4) -#define MCF_PSC_PSCCSR_TCSEL_SYS_CLK (0x0D) -#define MCF_PSC_PSCCSR_TCSEL_CTM16 (0x0E) -#define MCF_PSC_PSCCSR_TCSEL_CTM (0x0F) -#define MCF_PSC_PSCCSR_RCSEL_SYS_CLK (0xD0) -#define MCF_PSC_PSCCSR_RCSEL_CTM16 (0xE0) -#define MCF_PSC_PSCCSR_RCSEL_CTM (0xF0) - -/* Bit definitions and macros for MCF_PSC_PSCSR */ -#define MCF_PSC_PSCSR_ERR (0x40) -#define MCF_PSC_PSCSR_CDE_DEOF (0x80) -#define MCF_PSC_PSCSR_RXRDY (0x100) -#define MCF_PSC_PSCSR_FU (0x200) -#define MCF_PSC_PSCSR_TXRDY (0x400) -#define MCF_PSC_PSCSR_TXEMP_URERR (0x800) -#define MCF_PSC_PSCSR_OE (0x1000) -#define MCF_PSC_PSCSR_PE_CRCERR (0x2000) -#define MCF_PSC_PSCSR_FE_PHYERR (0x4000) -#define MCF_PSC_PSCSR_RB_NEOF (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCCR */ -#define MCF_PSC_PSCCR_RXC(x) (((x)&0x3)<<0) -#define MCF_PSC_PSCCR_RX_ENABLED (0x1) -#define MCF_PSC_PSCCR_RX_DISABLED (0x2) -#define MCF_PSC_PSCCR_TXC(x) (((x)&0x3)<<0x2) -#define MCF_PSC_PSCCR_TX_ENABLED (0x4) -#define MCF_PSC_PSCCR_TX_DISABLED (0x8) -#define MCF_PSC_PSCCR_MISC(x) (((x)&0x7)<<0x4) -#define MCF_PSC_PSCCR_NONE (0) -#define MCF_PSC_PSCCR_RESET_MR (0x10) -#define MCF_PSC_PSCCR_RESET_RX (0x20) -#define MCF_PSC_PSCCR_RESET_TX (0x30) -#define MCF_PSC_PSCCR_RESET_ERROR (0x40) -#define MCF_PSC_PSCCR_RESET_BKCHGINT (0x50) -#define MCF_PSC_PSCCR_START_BREAK (0x60) -#define MCF_PSC_PSCCR_STOP_BREAK (0x70) - -/* Bit definitions and macros for MCF_PSC_PSCRB_8BIT */ -#define MCF_PSC_PSCRB_8BIT_RB3(x) (((x)&0xFF)<<0) -#define MCF_PSC_PSCRB_8BIT_RB2(x) (((x)&0xFF)<<0x8) -#define MCF_PSC_PSCRB_8BIT_RB1(x) (((x)&0xFF)<<0x10) -#define MCF_PSC_PSCRB_8BIT_RB0(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PSC_PSCTB_8BIT */ -#define MCF_PSC_PSCTB_8BIT_TB3(x) (((x)&0xFF)<<0) -#define MCF_PSC_PSCTB_8BIT_TB2(x) (((x)&0xFF)<<0x8) -#define MCF_PSC_PSCTB_8BIT_TB1(x) (((x)&0xFF)<<0x10) -#define MCF_PSC_PSCTB_8BIT_TB0(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PSC_PSCRB_16BIT */ -#define MCF_PSC_PSCRB_16BIT_RB1(x) (((x)&0xFFFF)<<0) -#define MCF_PSC_PSCRB_16BIT_RB0(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PSC_PSCTB_16BIT */ -#define MCF_PSC_PSCTB_16BIT_TB1(x) (((x)&0xFFFF)<<0) -#define MCF_PSC_PSCTB_16BIT_TB0(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PSC_PSCRB_AC97 */ -#define MCF_PSC_PSCRB_AC97_SOF (0x800) -#define MCF_PSC_PSCRB_AC97_RB(x) (((x)&0xFFFFF)<<0xC) - -/* Bit definitions and macros for MCF_PSC_PSCTB_AC97 */ -#define MCF_PSC_PSCTB_AC97_TB(x) (((x)&0xFFFFF)<<0xC) - -/* Bit definitions and macros for MCF_PSC_PSCIPCR */ -#define MCF_PSC_PSCIPCR_RESERVED (0xC) -#define MCF_PSC_PSCIPCR_CTS (0xD) -#define MCF_PSC_PSCIPCR_D_CTS (0x1C) -#define MCF_PSC_PSCIPCR_SYNC (0x8C) - -/* Bit definitions and macros for MCF_PSC_PSCACR */ -#define MCF_PSC_PSCACR_IEC0 (0x1) - -/* Bit definitions and macros for MCF_PSC_PSCIMR */ -#define MCF_PSC_PSCIMR_ERR (0x40) -#define MCF_PSC_PSCIMR_DEOF (0x80) -#define MCF_PSC_PSCIMR_TXRDY (0x100) -#define MCF_PSC_PSCIMR_RXRDY_FU (0x200) -#define MCF_PSC_PSCIMR_DB (0x400) -#define MCF_PSC_PSCIMR_IPC (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCISR */ -#define MCF_PSC_PSCISR_ERR (0x40) -#define MCF_PSC_PSCISR_DEOF (0x80) -#define MCF_PSC_PSCISR_TXRDY (0x100) -#define MCF_PSC_PSCISR_RXRDY_FU (0x200) -#define MCF_PSC_PSCISR_DB (0x400) -#define MCF_PSC_PSCISR_IPC (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCCTUR */ -#define MCF_PSC_PSCCTUR_CT(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCCTLR */ -#define MCF_PSC_PSCCTLR_CT(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCIP */ -#define MCF_PSC_PSCIP_CTS (0x1) -#define MCF_PSC_PSCIP_TGL (0x40) -#define MCF_PSC_PSCIP_LPWR_B (0x80) - -/* Bit definitions and macros for MCF_PSC_PSCOPSET */ -#define MCF_PSC_PSCOPSET_RTS (0x1) - -/* Bit definitions and macros for MCF_PSC_PSCOPRESET */ -#define MCF_PSC_PSCOPRESET_RTS (0x1) - -/* Bit definitions and macros for MCF_PSC_PSCSICR */ -#define MCF_PSC_PSCSICR_SIM(x) (((x)&0x7)<<0) -#define MCF_PSC_PSCSICR_SIM_UART (0) -#define MCF_PSC_PSCSICR_SIM_MODEM8 (0x1) -#define MCF_PSC_PSCSICR_SIM_MODEM16 (0x2) -#define MCF_PSC_PSCSICR_SIM_AC97 (0x3) -#define MCF_PSC_PSCSICR_SIM_SIR (0x4) -#define MCF_PSC_PSCSICR_SIM_MIR (0x5) -#define MCF_PSC_PSCSICR_SIM_FIR (0x6) -#define MCF_PSC_PSCSICR_SHDIR (0x10) -#define MCF_PSC_PSCSICR_DTS1 (0x20) -#define MCF_PSC_PSCSICR_AWR (0x40) -#define MCF_PSC_PSCSICR_ACRB (0x80) - -/* Bit definitions and macros for MCF_PSC_PSCIRCR1 */ -#define MCF_PSC_PSCIRCR1_SPUL (0x1) -#define MCF_PSC_PSCIRCR1_SIPEN (0x2) -#define MCF_PSC_PSCIRCR1_FD (0x4) - -/* Bit definitions and macros for MCF_PSC_PSCIRCR2 */ -#define MCF_PSC_PSCIRCR2_NXTEOF (0x1) -#define MCF_PSC_PSCIRCR2_ABORT (0x2) -#define MCF_PSC_PSCIRCR2_SIPREQ (0x4) - -/* Bit definitions and macros for MCF_PSC_PSCIRSDR */ -#define MCF_PSC_PSCIRSDR_IRSTIM(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCIRMDR */ -#define MCF_PSC_PSCIRMDR_M_FDIV(x) (((x)&0x7F)<<0) -#define MCF_PSC_PSCIRMDR_FREQ (0x80) - -/* Bit definitions and macros for MCF_PSC_PSCIRFDR */ -#define MCF_PSC_PSCIRFDR_F_FDIV(x) (((x)&0xF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFCNT */ -#define MCF_PSC_PSCRFCNT_CNT(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFCNT */ -#define MCF_PSC_PSCTFCNT_CNT(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFDR */ -#define MCF_PSC_PSCRFDR_DATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFSR */ -#define MCF_PSC_PSCRFSR_EMT (0x1) -#define MCF_PSC_PSCRFSR_ALARM (0x2) -#define MCF_PSC_PSCRFSR_FU (0x4) -#define MCF_PSC_PSCRFSR_FRMRDY (0x8) -#define MCF_PSC_PSCRFSR_OF (0x10) -#define MCF_PSC_PSCRFSR_UF (0x20) -#define MCF_PSC_PSCRFSR_RXW (0x40) -#define MCF_PSC_PSCRFSR_FAE (0x80) -#define MCF_PSC_PSCRFSR_FRM(x) (((x)&0xF)<<0x8) -#define MCF_PSC_PSCRFSR_FRM_BYTE0 (0x800) -#define MCF_PSC_PSCRFSR_FRM_BYTE1 (0x400) -#define MCF_PSC_PSCRFSR_FRM_BYTE2 (0x200) -#define MCF_PSC_PSCRFSR_FRM_BYTE3 (0x100) -#define MCF_PSC_PSCRFSR_TAG(x) (((x)&0x3)<<0xC) -#define MCF_PSC_PSCRFSR_TXW (0x4000) -#define MCF_PSC_PSCRFSR_IP (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCRFCR */ -#define MCF_PSC_PSCRFCR_CNTR(x) (((x)&0xFFFF)<<0) -#define MCF_PSC_PSCRFCR_TXW_MSK (0x40000) -#define MCF_PSC_PSCRFCR_OF_MSK (0x80000) -#define MCF_PSC_PSCRFCR_UF_MSK (0x100000) -#define MCF_PSC_PSCRFCR_RXW_MSK (0x200000) -#define MCF_PSC_PSCRFCR_FAE_MSK (0x400000) -#define MCF_PSC_PSCRFCR_IP_MSK (0x800000) -#define MCF_PSC_PSCRFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_PSC_PSCRFCR_FRMEN (0x8000000) -#define MCF_PSC_PSCRFCR_TIMER (0x10000000) - -/* Bit definitions and macros for MCF_PSC_PSCRFAR */ -#define MCF_PSC_PSCRFAR_ALARM(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFRP */ -#define MCF_PSC_PSCRFRP_READ(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFWP */ -#define MCF_PSC_PSCRFWP_WRITE(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRLRFP */ -#define MCF_PSC_PSCRLRFP_LRFP(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRLWFP */ -#define MCF_PSC_PSCRLWFP_LWFP(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFDR */ -#define MCF_PSC_PSCTFDR_DATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFSR */ -#define MCF_PSC_PSCTFSR_EMT (0x1) -#define MCF_PSC_PSCTFSR_ALARM (0x2) -#define MCF_PSC_PSCTFSR_FU (0x4) -#define MCF_PSC_PSCTFSR_FRMRDY (0x8) -#define MCF_PSC_PSCTFSR_OF (0x10) -#define MCF_PSC_PSCTFSR_UF (0x20) -#define MCF_PSC_PSCTFSR_RXW (0x40) -#define MCF_PSC_PSCTFSR_FAE (0x80) -#define MCF_PSC_PSCTFSR_FRM(x) (((x)&0xF)<<0x8) -#define MCF_PSC_PSCTFSR_FRM_BYTE0 (0x800) -#define MCF_PSC_PSCTFSR_FRM_BYTE1 (0x400) -#define MCF_PSC_PSCTFSR_FRM_BYTE2 (0x200) -#define MCF_PSC_PSCTFSR_FRM_BYTE3 (0x100) -#define MCF_PSC_PSCTFSR_TAG(x) (((x)&0x3)<<0xC) -#define MCF_PSC_PSCTFSR_TXW (0x4000) -#define MCF_PSC_PSCTFSR_IP (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCTFCR */ -#define MCF_PSC_PSCTFCR_CNTR(x) (((x)&0xFFFF)<<0) -#define MCF_PSC_PSCTFCR_TXW_MSK (0x40000) -#define MCF_PSC_PSCTFCR_OF_MSK (0x80000) -#define MCF_PSC_PSCTFCR_UF_MSK (0x100000) -#define MCF_PSC_PSCTFCR_RXW_MSK (0x200000) -#define MCF_PSC_PSCTFCR_FAE_MSK (0x400000) -#define MCF_PSC_PSCTFCR_IP_MSK (0x800000) -#define MCF_PSC_PSCTFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_PSC_PSCTFCR_FRMEN (0x8000000) -#define MCF_PSC_PSCTFCR_TIMER (0x10000000) -#define MCF_PSC_PSCTFCR_WFR (0x20000000) - -/* Bit definitions and macros for MCF_PSC_PSCTFAR */ -#define MCF_PSC_PSCTFAR_ALARM(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFRP */ -#define MCF_PSC_PSCTFRP_READ(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFWP */ -#define MCF_PSC_PSCTFWP_WRITE(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTLRFP */ -#define MCF_PSC_PSCTLRFP_LRFP(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTLWFP */ -#define MCF_PSC_PSCTLWFP_LWFP(x) (((x)&0x1FF)<<0) - - -#endif /* __MCF5475_PSC_H__ */ diff --git a/tos/jtagwait/include/MCF5475_SDRAMC.h b/tos/jtagwait/include/MCF5475_SDRAMC.h deleted file mode 100644 index 6cdbd68..0000000 --- a/tos/jtagwait/include/MCF5475_SDRAMC.h +++ /dev/null @@ -1,106 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SDRAMC_H__ -#define __MCF5475_SDRAMC_H__ - - -/********************************************************************* -* -* Synchronous DRAM Controller (SDRAMC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SDRAMC_SDRAMDS (*(volatile uint32_t*)(&_MBAR[0x4])) -#define MCF_SDRAMC_CS0CFG (*(volatile uint32_t*)(&_MBAR[0x20])) -#define MCF_SDRAMC_CS1CFG (*(volatile uint32_t*)(&_MBAR[0x24])) -#define MCF_SDRAMC_CS2CFG (*(volatile uint32_t*)(&_MBAR[0x28])) -#define MCF_SDRAMC_CS3CFG (*(volatile uint32_t*)(&_MBAR[0x2C])) -#define MCF_SDRAMC_SDMR (*(volatile uint32_t*)(&_MBAR[0x100])) -#define MCF_SDRAMC_SDCR (*(volatile uint32_t*)(&_MBAR[0x104])) -#define MCF_SDRAMC_SDCFG1 (*(volatile uint32_t*)(&_MBAR[0x108])) -#define MCF_SDRAMC_SDCFG2 (*(volatile uint32_t*)(&_MBAR[0x10C])) -#define MCF_SDRAMC_CSCFG(x) (*(volatile uint32_t*)(&_MBAR[0x20 + ((x)*0x4)])) - - -/* Bit definitions and macros for MCF_SDRAMC_SDRAMDS */ -#define MCF_SDRAMC_SDRAMDS_SB_D(x) (((x)&0x3)<<0) -#define MCF_SDRAMC_SDRAMDS_SB_S(x) (((x)&0x3)<<0x2) -#define MCF_SDRAMC_SDRAMDS_SB_A(x) (((x)&0x3)<<0x4) -#define MCF_SDRAMC_SDRAMDS_SB_C(x) (((x)&0x3)<<0x6) -#define MCF_SDRAMC_SDRAMDS_SB_E(x) (((x)&0x3)<<0x8) -#define MCF_SDRAMC_SDRAMDS_DRIVE_24MA (0) -#define MCF_SDRAMC_SDRAMDS_DRIVE_16MA (0x1) -#define MCF_SDRAMC_SDRAMDS_DRIVE_8MA (0x2) -#define MCF_SDRAMC_SDRAMDS_DRIVE_NONE (0x3) - -/* Bit definitions and macros for MCF_SDRAMC_CSCFG */ -#define MCF_SDRAMC_CSCFG_CSSZ(x) (((x)&0x1F)<<0) -#define MCF_SDRAMC_CSCFG_CSSZ_DISABLED (0) -#define MCF_SDRAMC_CSCFG_CSSZ_1MBYTE (0x13) -#define MCF_SDRAMC_CSCFG_CSSZ_2MBYTE (0x14) -#define MCF_SDRAMC_CSCFG_CSSZ_4MBYTE (0x15) -#define MCF_SDRAMC_CSCFG_CSSZ_8MBYTE (0x16) -#define MCF_SDRAMC_CSCFG_CSSZ_16MBYTE (0x17) -#define MCF_SDRAMC_CSCFG_CSSZ_32MBYTE (0x18) -#define MCF_SDRAMC_CSCFG_CSSZ_64MBYTE (0x19) -#define MCF_SDRAMC_CSCFG_CSSZ_128MBYTE (0x1A) -#define MCF_SDRAMC_CSCFG_CSSZ_256MBYTE (0x1B) -#define MCF_SDRAMC_CSCFG_CSSZ_512MBYTE (0x1C) -#define MCF_SDRAMC_CSCFG_CSSZ_1GBYTE (0x1D) -#define MCF_SDRAMC_CSCFG_CSSZ_2GBYTE (0x1E) -#define MCF_SDRAMC_CSCFG_CSSZ_4GBYTE (0x1F) -#define MCF_SDRAMC_CSCFG_CSBA(x) (((x)&0xFFF)<<0x14) -#define MCF_SDRAMC_CSCFG_BA(x) ((x)&0xFFF00000) - -/* Bit definitions and macros for MCF_SDRAMC_SDMR */ -#define MCF_SDRAMC_SDMR_CMD (0x10000) -#define MCF_SDRAMC_SDMR_AD(x) (((x)&0xFFF)<<0x12) -#define MCF_SDRAMC_SDMR_BNKAD(x) (((x)&0x3)<<0x1E) -#define MCF_SDRAMC_SDMR_BK_LMR (0) -#define MCF_SDRAMC_SDMR_BK_LEMR (0x40000000) - -/* Bit definitions and macros for MCF_SDRAMC_SDCR */ -#define MCF_SDRAMC_SDCR_IPALL (0x2) -#define MCF_SDRAMC_SDCR_IREF (0x4) -#define MCF_SDRAMC_SDCR_BUFF (0x10) -#define MCF_SDRAMC_SDCR_DQS_OE(x) (((x)&0xF)<<0x8) -#define MCF_SDRAMC_SDCR_RCNT(x) (((x)&0x3F)<<0x10) -#define MCF_SDRAMC_SDCR_DRIVE (0x400000) -#define MCF_SDRAMC_SDCR_AP (0x800000) -#define MCF_SDRAMC_SDCR_MUX(x) (((x)&0x3)<<0x18) -#define MCF_SDRAMC_SDCR_REF (0x10000000) -#define MCF_SDRAMC_SDCR_DDR (0x20000000) -#define MCF_SDRAMC_SDCR_CKE (0x40000000) -#define MCF_SDRAMC_SDCR_MODE_EN (0x80000000) - -/* Bit definitions and macros for MCF_SDRAMC_SDCFG1 */ -#define MCF_SDRAMC_SDCFG1_WTLAT(x) (((x)&0x7)<<0x4) -#define MCF_SDRAMC_SDCFG1_REF2ACT(x) (((x)&0xF)<<0x8) -#define MCF_SDRAMC_SDCFG1_PRE2ACT(x) (((x)&0x7)<<0xC) -#define MCF_SDRAMC_SDCFG1_ACT2RW(x) (((x)&0x7)<<0x10) -#define MCF_SDRAMC_SDCFG1_RDLAT(x) (((x)&0xF)<<0x14) -#define MCF_SDRAMC_SDCFG1_SWT2RD(x) (((x)&0x7)<<0x18) -#define MCF_SDRAMC_SDCFG1_SRD2RW(x) (((x)&0xF)<<0x1C) - -/* Bit definitions and macros for MCF_SDRAMC_SDCFG2 */ -#define MCF_SDRAMC_SDCFG2_BL(x) (((x)&0xF)<<0x10) -#define MCF_SDRAMC_SDCFG2_BRD2WT(x) (((x)&0xF)<<0x14) -#define MCF_SDRAMC_SDCFG2_BWT2RW(x) (((x)&0xF)<<0x18) -#define MCF_SDRAMC_SDCFG2_BRD2PRE(x) (((x)&0xF)<<0x1C) - - -#endif /* __MCF5475_SDRAMC_H__ */ diff --git a/tos/jtagwait/include/MCF5475_SEC.h b/tos/jtagwait/include/MCF5475_SEC.h deleted file mode 100644 index 8deff0b..0000000 --- a/tos/jtagwait/include/MCF5475_SEC.h +++ /dev/null @@ -1,398 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SEC_H__ -#define __MCF5475_SEC_H__ - - -/********************************************************************* -* -* Integrated Security Engine (SEC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SEC_EUACRH (*(volatile uint32_t*)(&_MBAR[0x21000])) -#define MCF_SEC_EUACRL (*(volatile uint32_t*)(&_MBAR[0x21004])) -#define MCF_SEC_SIMRH (*(volatile uint32_t*)(&_MBAR[0x21008])) -#define MCF_SEC_SIMRL (*(volatile uint32_t*)(&_MBAR[0x2100C])) -#define MCF_SEC_SISRH (*(volatile uint32_t*)(&_MBAR[0x21010])) -#define MCF_SEC_SISRL (*(volatile uint32_t*)(&_MBAR[0x21014])) -#define MCF_SEC_SICRH (*(volatile uint32_t*)(&_MBAR[0x21018])) -#define MCF_SEC_SICRL (*(volatile uint32_t*)(&_MBAR[0x2101C])) -#define MCF_SEC_SIDR (*(volatile uint32_t*)(&_MBAR[0x21020])) -#define MCF_SEC_EUASRH (*(volatile uint32_t*)(&_MBAR[0x21028])) -#define MCF_SEC_EUASRL (*(volatile uint32_t*)(&_MBAR[0x2102C])) -#define MCF_SEC_SMCR (*(volatile uint32_t*)(&_MBAR[0x21030])) -#define MCF_SEC_MEAR (*(volatile uint32_t*)(&_MBAR[0x21038])) -#define MCF_SEC_CCCR0 (*(volatile uint32_t*)(&_MBAR[0x2200C])) -#define MCF_SEC_CCPSRH0 (*(volatile uint32_t*)(&_MBAR[0x22010])) -#define MCF_SEC_CCPSRL0 (*(volatile uint32_t*)(&_MBAR[0x22014])) -#define MCF_SEC_CDPR0 (*(volatile uint32_t*)(&_MBAR[0x22044])) -#define MCF_SEC_FR0 (*(volatile uint32_t*)(&_MBAR[0x2204C])) -#define MCF_SEC_CCCR1 (*(volatile uint32_t*)(&_MBAR[0x2300C])) -#define MCF_SEC_CCPSRH1 (*(volatile uint32_t*)(&_MBAR[0x23010])) -#define MCF_SEC_CCPSRL1 (*(volatile uint32_t*)(&_MBAR[0x23014])) -#define MCF_SEC_CDPR1 (*(volatile uint32_t*)(&_MBAR[0x23044])) -#define MCF_SEC_FR1 (*(volatile uint32_t*)(&_MBAR[0x2304C])) -#define MCF_SEC_AFRCR (*(volatile uint32_t*)(&_MBAR[0x28018])) -#define MCF_SEC_AFSR (*(volatile uint32_t*)(&_MBAR[0x28028])) -#define MCF_SEC_AFISR (*(volatile uint32_t*)(&_MBAR[0x28030])) -#define MCF_SEC_AFIMR (*(volatile uint32_t*)(&_MBAR[0x28038])) -#define MCF_SEC_DRCR (*(volatile uint32_t*)(&_MBAR[0x2A018])) -#define MCF_SEC_DSR (*(volatile uint32_t*)(&_MBAR[0x2A028])) -#define MCF_SEC_DISR (*(volatile uint32_t*)(&_MBAR[0x2A030])) -#define MCF_SEC_DIMR (*(volatile uint32_t*)(&_MBAR[0x2A038])) -#define MCF_SEC_MDRCR (*(volatile uint32_t*)(&_MBAR[0x2C018])) -#define MCF_SEC_MDSR (*(volatile uint32_t*)(&_MBAR[0x2C028])) -#define MCF_SEC_MDISR (*(volatile uint32_t*)(&_MBAR[0x2C030])) -#define MCF_SEC_MDIMR (*(volatile uint32_t*)(&_MBAR[0x2C038])) -#define MCF_SEC_RNGRCR (*(volatile uint32_t*)(&_MBAR[0x2E018])) -#define MCF_SEC_RNGSR (*(volatile uint32_t*)(&_MBAR[0x2E028])) -#define MCF_SEC_RNGISR (*(volatile uint32_t*)(&_MBAR[0x2E030])) -#define MCF_SEC_RNGIMR (*(volatile uint32_t*)(&_MBAR[0x2E038])) -#define MCF_SEC_AESRCR (*(volatile uint32_t*)(&_MBAR[0x32018])) -#define MCF_SEC_AESSR (*(volatile uint32_t*)(&_MBAR[0x32028])) -#define MCF_SEC_AESISR (*(volatile uint32_t*)(&_MBAR[0x32030])) -#define MCF_SEC_AESIMR (*(volatile uint32_t*)(&_MBAR[0x32038])) -#define MCF_SEC_CCCRn(x) (*(volatile uint32_t*)(&_MBAR[0x2200C + ((x)*0x1000)])) -#define MCF_SEC_CCPSRHn(x) (*(volatile uint32_t*)(&_MBAR[0x22010 + ((x)*0x1000)])) -#define MCF_SEC_CCPSRLn(x) (*(volatile uint32_t*)(&_MBAR[0x22014 + ((x)*0x1000)])) -#define MCF_SEC_CDPRn(x) (*(volatile uint32_t*)(&_MBAR[0x22044 + ((x)*0x1000)])) -#define MCF_SEC_FRn(x) (*(volatile uint32_t*)(&_MBAR[0x2204C + ((x)*0x1000)])) - - -/* Bit definitions and macros for MCF_SEC_EUACRH */ -#define MCF_SEC_EUACRH_AFEU(x) (((x)&0xF)<<0) -#define MCF_SEC_EUACRH_AFFEU_NOASSIGN (0) -#define MCF_SEC_EUACRH_AFFEU_CHA0 (0x1) -#define MCF_SEC_EUACRH_AFFEU_CHA1 (0x2) -#define MCF_SEC_EUACRH_MDEU(x) (((x)&0xF)<<0x8) -#define MCF_SEC_EUACRH_MDEU_NOASSIGN (0) -#define MCF_SEC_EUACRH_MDEU_CHA0 (0x100) -#define MCF_SEC_EUACRH_MDEU_CHA1 (0x200) -#define MCF_SEC_EUACRH_RNG(x) (((x)&0xF)<<0x18) -#define MCF_SEC_EUACRH_RNG_NOASSIGN (0) -#define MCF_SEC_EUACRH_RNG_CHA0 (0x1000000) -#define MCF_SEC_EUACRH_RNG_CHA1 (0x2000000) - -/* Bit definitions and macros for MCF_SEC_EUACRL */ -#define MCF_SEC_EUACRL_AESU(x) (((x)&0xF)<<0x10) -#define MCF_SEC_EUACRL_AESU_NOASSIGN (0) -#define MCF_SEC_EUACRL_AESU_CHA0 (0x10000) -#define MCF_SEC_EUACRL_AESU_CHA1 (0x20000) -#define MCF_SEC_EUACRL_DEU(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SEC_SIMRH */ -#define MCF_SEC_SIMRH_AERR (0x8000000) -#define MCF_SEC_SIMRH_CHA_0_DN (0x10000000) -#define MCF_SEC_SIMRH_CHA_0_ERR (0x20000000) -#define MCF_SEC_SIMRH_CHA_1_DN (0x40000000) -#define MCF_SEC_SIMRH_CHA_1_ERR (0x80000000) - -/* Bit definitions and macros for MCF_SEC_SIMRL */ -#define MCF_SEC_SIMRL_TEA (0x40) -#define MCF_SEC_SIMRL_DEU_DN (0x100) -#define MCF_SEC_SIMRL_DEU_ERR (0x200) -#define MCF_SEC_SIMRL_AESU_DN (0x1000) -#define MCF_SEC_SIMRL_AESU_ERR (0x2000) -#define MCF_SEC_SIMRL_MDEU_DN (0x10000) -#define MCF_SEC_SIMRL_MDEU_ERR (0x20000) -#define MCF_SEC_SIMRL_AFEU_DN (0x100000) -#define MCF_SEC_SIMRL_AFEU_ERR (0x200000) -#define MCF_SEC_SIMRL_RNG_DN (0x1000000) -#define MCF_SEC_SIMRL_RNG_ERR (0x2000000) - -/* Bit definitions and macros for MCF_SEC_SISRH */ -#define MCF_SEC_SISRH_AERR (0x8000000) -#define MCF_SEC_SISRH_CHA_0_DN (0x10000000) -#define MCF_SEC_SISRH_CHA_0_ERR (0x20000000) -#define MCF_SEC_SISRH_CHA_1_DN (0x40000000) -#define MCF_SEC_SISRH_CHA_1_ERR (0x80000000) - -/* Bit definitions and macros for MCF_SEC_SISRL */ -#define MCF_SEC_SISRL_TEA (0x40) -#define MCF_SEC_SISRL_DEU_DN (0x100) -#define MCF_SEC_SISRL_DEU_ERR (0x200) -#define MCF_SEC_SISRL_AESU_DN (0x1000) -#define MCF_SEC_SISRL_AESU_ERR (0x2000) -#define MCF_SEC_SISRL_MDEU_DN (0x10000) -#define MCF_SEC_SISRL_MDEU_ERR (0x20000) -#define MCF_SEC_SISRL_AFEU_DN (0x100000) -#define MCF_SEC_SISRL_AFEU_ERR (0x200000) -#define MCF_SEC_SISRL_RNG_DN (0x1000000) -#define MCF_SEC_SISRL_RNG_ERR (0x2000000) - -/* Bit definitions and macros for MCF_SEC_SICRH */ -#define MCF_SEC_SICRH_AERR (0x8000000) -#define MCF_SEC_SICRH_CHA_0_DN (0x10000000) -#define MCF_SEC_SICRH_CHA_0_ERR (0x20000000) -#define MCF_SEC_SICRH_CHA_1_DN (0x40000000) -#define MCF_SEC_SICRH_CHA_1_ERR (0x80000000) - -/* Bit definitions and macros for MCF_SEC_SICRL */ -#define MCF_SEC_SICRL_TEA (0x40) -#define MCF_SEC_SICRL_DEU_DN (0x100) -#define MCF_SEC_SICRL_DEU_ERR (0x200) -#define MCF_SEC_SICRL_AESU_DN (0x1000) -#define MCF_SEC_SICRL_AESU_ERR (0x2000) -#define MCF_SEC_SICRL_MDEU_DN (0x10000) -#define MCF_SEC_SICRL_MDEU_ERR (0x20000) -#define MCF_SEC_SICRL_AFEU_DN (0x100000) -#define MCF_SEC_SICRL_AFEU_ERR (0x200000) -#define MCF_SEC_SICRL_RNG_DN (0x1000000) -#define MCF_SEC_SICRL_RNG_ERR (0x2000000) - -/* Bit definitions and macros for MCF_SEC_SIDR */ -#define MCF_SEC_SIDR_VERSION(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SEC_EUASRH */ -#define MCF_SEC_EUASRH_AFEU(x) (((x)&0xF)<<0) -#define MCF_SEC_EUASRH_MDEU(x) (((x)&0xF)<<0x8) -#define MCF_SEC_EUASRH_RNG(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SEC_EUASRL */ -#define MCF_SEC_EUASRL_AESU(x) (((x)&0xF)<<0x10) -#define MCF_SEC_EUASRL_DEU(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SEC_SMCR */ -#define MCF_SEC_SMCR_CURR_CHAN(x) (((x)&0xF)<<0x4) -#define MCF_SEC_SMCR_CURR_CHAN_1 (0x10) -#define MCF_SEC_SMCR_CURR_CHAN_2 (0x20) -#define MCF_SEC_SMCR_SWR (0x1000000) - -/* Bit definitions and macros for MCF_SEC_MEAR */ -#define MCF_SEC_MEAR_ADDRESS(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SEC_CCCRn */ -#define MCF_SEC_CCCRn_RST (0x1) -#define MCF_SEC_CCCRn_CDIE (0x2) -#define MCF_SEC_CCCRn_NT (0x4) -#define MCF_SEC_CCCRn_NE (0x8) -#define MCF_SEC_CCCRn_WE (0x10) -#define MCF_SEC_CCCRn_BURST_SIZE(x) (((x)&0x7)<<0x8) -#define MCF_SEC_CCCRn_BURST_SIZE_2 (0) -#define MCF_SEC_CCCRn_BURST_SIZE_8 (0x100) -#define MCF_SEC_CCCRn_BURST_SIZE_16 (0x200) -#define MCF_SEC_CCCRn_BURST_SIZE_24 (0x300) -#define MCF_SEC_CCCRn_BURST_SIZE_32 (0x400) -#define MCF_SEC_CCCRn_BURST_SIZE_40 (0x500) -#define MCF_SEC_CCCRn_BURST_SIZE_48 (0x600) -#define MCF_SEC_CCCRn_BURST_SIZE_56 (0x700) - -/* Bit definitions and macros for MCF_SEC_CCPSRHn */ -#define MCF_SEC_CCPSRHn_STATE(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_SEC_CCPSRLn */ -#define MCF_SEC_CCPSRLn_PAIR_PTR(x) (((x)&0xFF)<<0) -#define MCF_SEC_CCPSRLn_EUERR (0x100) -#define MCF_SEC_CCPSRLn_SERR (0x200) -#define MCF_SEC_CCPSRLn_DERR (0x400) -#define MCF_SEC_CCPSRLn_PERR (0x1000) -#define MCF_SEC_CCPSRLn_TEA (0x2000) -#define MCF_SEC_CCPSRLn_SD (0x10000) -#define MCF_SEC_CCPSRLn_PD (0x20000) -#define MCF_SEC_CCPSRLn_SRD (0x40000) -#define MCF_SEC_CCPSRLn_PRD (0x80000) -#define MCF_SEC_CCPSRLn_SG (0x100000) -#define MCF_SEC_CCPSRLn_PG (0x200000) -#define MCF_SEC_CCPSRLn_SR (0x400000) -#define MCF_SEC_CCPSRLn_PR (0x800000) -#define MCF_SEC_CCPSRLn_MO (0x1000000) -#define MCF_SEC_CCPSRLn_MI (0x2000000) -#define MCF_SEC_CCPSRLn_STAT (0x4000000) - -/* Bit definitions and macros for MCF_SEC_CDPRn */ -#define MCF_SEC_CDPRn_CDP(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SEC_FRn */ -#define MCF_SEC_FRn_FETCH_ADDR(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SEC_AFRCR */ -#define MCF_SEC_AFRCR_SR (0x1000000) -#define MCF_SEC_AFRCR_MI (0x2000000) -#define MCF_SEC_AFRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_AFSR */ -#define MCF_SEC_AFSR_RD (0x1000000) -#define MCF_SEC_AFSR_ID (0x2000000) -#define MCF_SEC_AFSR_IE (0x4000000) -#define MCF_SEC_AFSR_OFR (0x8000000) -#define MCF_SEC_AFSR_IFW (0x10000000) -#define MCF_SEC_AFSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_AFISR */ -#define MCF_SEC_AFISR_DSE (0x10000) -#define MCF_SEC_AFISR_KSE (0x20000) -#define MCF_SEC_AFISR_CE (0x40000) -#define MCF_SEC_AFISR_ERE (0x80000) -#define MCF_SEC_AFISR_IE (0x100000) -#define MCF_SEC_AFISR_OFU (0x2000000) -#define MCF_SEC_AFISR_IFO (0x4000000) -#define MCF_SEC_AFISR_IFE (0x10000000) -#define MCF_SEC_AFISR_OFE (0x20000000) -#define MCF_SEC_AFISR_AE (0x40000000) -#define MCF_SEC_AFISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_AFIMR */ -#define MCF_SEC_AFIMR_DSE (0x10000) -#define MCF_SEC_AFIMR_KSE (0x20000) -#define MCF_SEC_AFIMR_CE (0x40000) -#define MCF_SEC_AFIMR_ERE (0x80000) -#define MCF_SEC_AFIMR_IE (0x100000) -#define MCF_SEC_AFIMR_OFU (0x2000000) -#define MCF_SEC_AFIMR_IFO (0x4000000) -#define MCF_SEC_AFIMR_IFE (0x10000000) -#define MCF_SEC_AFIMR_OFE (0x20000000) -#define MCF_SEC_AFIMR_AE (0x40000000) -#define MCF_SEC_AFIMR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_DRCR */ -#define MCF_SEC_DRCR_SR (0x1000000) -#define MCF_SEC_DRCR_MI (0x2000000) -#define MCF_SEC_DRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_DSR */ -#define MCF_SEC_DSR_RD (0x1000000) -#define MCF_SEC_DSR_ID (0x2000000) -#define MCF_SEC_DSR_IE (0x4000000) -#define MCF_SEC_DSR_OFR (0x8000000) -#define MCF_SEC_DSR_IFW (0x10000000) -#define MCF_SEC_DSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_DISR */ -#define MCF_SEC_DISR_DSE (0x10000) -#define MCF_SEC_DISR_KSE (0x20000) -#define MCF_SEC_DISR_CE (0x40000) -#define MCF_SEC_DISR_ERE (0x80000) -#define MCF_SEC_DISR_IE (0x100000) -#define MCF_SEC_DISR_KPE (0x200000) -#define MCF_SEC_DISR_OFU (0x2000000) -#define MCF_SEC_DISR_IFO (0x4000000) -#define MCF_SEC_DISR_IFE (0x10000000) -#define MCF_SEC_DISR_OFE (0x20000000) -#define MCF_SEC_DISR_AE (0x40000000) -#define MCF_SEC_DISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_DIMR */ -#define MCF_SEC_DIMR_DSE (0x10000) -#define MCF_SEC_DIMR_KSE (0x20000) -#define MCF_SEC_DIMR_CE (0x40000) -#define MCF_SEC_DIMR_ERE (0x80000) -#define MCF_SEC_DIMR_IE (0x100000) -#define MCF_SEC_DIMR_KPE (0x200000) -#define MCF_SEC_DIMR_OFU (0x2000000) -#define MCF_SEC_DIMR_IFO (0x4000000) -#define MCF_SEC_DIMR_IFE (0x10000000) -#define MCF_SEC_DIMR_OFE (0x20000000) -#define MCF_SEC_DIMR_AE (0x40000000) -#define MCF_SEC_DIMR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_MDRCR */ -#define MCF_SEC_MDRCR_SR (0x1000000) -#define MCF_SEC_MDRCR_MI (0x2000000) -#define MCF_SEC_MDRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_MDSR */ -#define MCF_SEC_MDSR_RD (0x1000000) -#define MCF_SEC_MDSR_ID (0x2000000) -#define MCF_SEC_MDSR_IE (0x4000000) -#define MCF_SEC_MDSR_IFW (0x10000000) -#define MCF_SEC_MDSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_MDISR */ -#define MCF_SEC_MDISR_DSE (0x10000) -#define MCF_SEC_MDISR_KSE (0x20000) -#define MCF_SEC_MDISR_CE (0x40000) -#define MCF_SEC_MDISR_ERE (0x80000) -#define MCF_SEC_MDISR_IE (0x100000) -#define MCF_SEC_MDISR_IFO (0x4000000) -#define MCF_SEC_MDISR_AE (0x40000000) -#define MCF_SEC_MDISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_MDIMR */ -#define MCF_SEC_MDIMR_DSE (0x10000) -#define MCF_SEC_MDIMR_KSE (0x20000) -#define MCF_SEC_MDIMR_CE (0x40000) -#define MCF_SEC_MDIMR_ERE (0x80000) -#define MCF_SEC_MDIMR_IE (0x100000) -#define MCF_SEC_MDIMR_IFO (0x4000000) -#define MCF_SEC_MDIMR_AE (0x40000000) -#define MCF_SEC_MDIMR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_RNGRCR */ -#define MCF_SEC_RNGRCR_SR (0x1000000) -#define MCF_SEC_RNGRCR_MI (0x2000000) -#define MCF_SEC_RNGRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_RNGSR */ -#define MCF_SEC_RNGSR_RD (0x1000000) -#define MCF_SEC_RNGSR_IE (0x4000000) -#define MCF_SEC_RNGSR_OFR (0x8000000) -#define MCF_SEC_RNGSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_RNGISR */ -#define MCF_SEC_RNGISR_IE (0x100000) -#define MCF_SEC_RNGISR_OFU (0x2000000) -#define MCF_SEC_RNGISR_AE (0x40000000) -#define MCF_SEC_RNGISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_RNGIMR */ -#define MCF_SEC_RNGIMR_IE (0x100000) -#define MCF_SEC_RNGIMR_OFU (0x2000000) -#define MCF_SEC_RNGIMR_AE (0x40000000) -#define MCF_SEC_RNGIMR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_AESRCR */ -#define MCF_SEC_AESRCR_SR (0x1000000) -#define MCF_SEC_AESRCR_MI (0x2000000) -#define MCF_SEC_AESRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_AESSR */ -#define MCF_SEC_AESSR_RD (0x1000000) -#define MCF_SEC_AESSR_ID (0x2000000) -#define MCF_SEC_AESSR_IE (0x4000000) -#define MCF_SEC_AESSR_OFR (0x8000000) -#define MCF_SEC_AESSR_IFW (0x10000000) -#define MCF_SEC_AESSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_AESISR */ -#define MCF_SEC_AESISR_DSE (0x10000) -#define MCF_SEC_AESISR_KSE (0x20000) -#define MCF_SEC_AESISR_CE (0x40000) -#define MCF_SEC_AESISR_ERE (0x80000) -#define MCF_SEC_AESISR_IE (0x100000) -#define MCF_SEC_AESISR_OFU (0x2000000) -#define MCF_SEC_AESISR_IFO (0x4000000) -#define MCF_SEC_AESISR_IFE (0x10000000) -#define MCF_SEC_AESISR_OFE (0x20000000) -#define MCF_SEC_AESISR_AE (0x40000000) -#define MCF_SEC_AESISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_AESIMR */ -#define MCF_SEC_AESIMR_DSE (0x10000) -#define MCF_SEC_AESIMR_KSE (0x20000) -#define MCF_SEC_AESIMR_CE (0x40000) -#define MCF_SEC_AESIMR_ERE (0x80000) -#define MCF_SEC_AESIMR_IE (0x100000) -#define MCF_SEC_AESIMR_OFU (0x2000000) -#define MCF_SEC_AESIMR_IFO (0x4000000) -#define MCF_SEC_AESIMR_IFE (0x10000000) -#define MCF_SEC_AESIMR_OFE (0x20000000) -#define MCF_SEC_AESIMR_AE (0x40000000) -#define MCF_SEC_AESIMR_ME (0x80000000) - - -#endif /* __MCF5475_SEC_H__ */ diff --git a/tos/jtagwait/include/MCF5475_SIU.h b/tos/jtagwait/include/MCF5475_SIU.h deleted file mode 100644 index efb2896..0000000 --- a/tos/jtagwait/include/MCF5475_SIU.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SIU_H__ -#define __MCF5475_SIU_H__ - - -/********************************************************************* -* -* System Integration Unit (SIU) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SIU_SBCR (*(volatile uint32_t*)(&_MBAR[0x10])) -#define MCF_SIU_SECSACR (*(volatile uint32_t*)(&_MBAR[0x38])) -#define MCF_SIU_RSR (*(volatile uint32_t*)(&_MBAR[0x44])) -#define MCF_SIU_JTAGID (*(volatile uint32_t*)(&_MBAR[0x50])) - - -/* Bit definitions and macros for MCF_SIU_SBCR */ -#define MCF_SIU_SBCR_PIN2DSPI (0x8000000) -#define MCF_SIU_SBCR_DMA2CPU (0x10000000) -#define MCF_SIU_SBCR_CPU2DMA (0x20000000) -#define MCF_SIU_SBCR_PIN2DMA (0x40000000) -#define MCF_SIU_SBCR_PIN2CPU (0x80000000) - -/* Bit definitions and macros for MCF_SIU_SECSACR */ -#define MCF_SIU_SECSACR_SEQEN (0x1) - -/* Bit definitions and macros for MCF_SIU_RSR */ -#define MCF_SIU_RSR_RST (0x1) -#define MCF_SIU_RSR_RSTWD (0x2) -#define MCF_SIU_RSR_RSTJTG (0x8) - -/* Bit definitions and macros for MCF_SIU_JTAGID */ -#define MCF_SIU_JTAGID_JTAGID(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SIU_JTAGID */ -#define MCF_SIU_JTAGID_REV (0xF0000000) -#define MCF_SIU_JTAGID_PROCESSOR (0x0FFFFFFF) -#define MCF_SIU_JTAGID_MCF5485 (0x0800C01D) -#define MCF_SIU_JTAGID_MCF5484 (0x0800D01D) -#define MCF_SIU_JTAGID_MCF5483 (0x0800E01D) -#define MCF_SIU_JTAGID_MCF5482 (0x0800F01D) -#define MCF_SIU_JTAGID_MCF5481 (0x0801001D) -#define MCF_SIU_JTAGID_MCF5480 (0x0801101D) -#define MCF_SIU_JTAGID_MCF5475 (0x0801201D) -#define MCF_SIU_JTAGID_MCF5474 (0x0801301D) -#define MCF_SIU_JTAGID_MCF5473 (0x0801401D) -#define MCF_SIU_JTAGID_MCF5472 (0x0801501D) -#define MCF_SIU_JTAGID_MCF5471 (0x0801601D) -#define MCF_SIU_JTAGID_MCF5470 (0x0801701D) - -#endif /* __MCF5475_SIU_H__ */ diff --git a/tos/jtagwait/include/MCF5475_SLT.h b/tos/jtagwait/include/MCF5475_SLT.h deleted file mode 100644 index 20e8558..0000000 --- a/tos/jtagwait/include/MCF5475_SLT.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SLT_H__ -#define __MCF5475_SLT_H__ - - -/********************************************************************* -* -* Slice Timers (SLT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SLT0_STCNT (*(volatile uint32_t*)(&_MBAR[0x900])) -#define MCF_SLT0_SCR (*(volatile uint32_t*)(&_MBAR[0x904])) -#define MCF_SLT0_SCNT (*(volatile uint32_t*)(&_MBAR[0x908])) -#define MCF_SLT0_SSR (*(volatile uint32_t*)(&_MBAR[0x90C])) - -#define MCF_SLT1_STCNT (*(volatile uint32_t*)(&_MBAR[0x910])) -#define MCF_SLT1_SCR (*(volatile uint32_t*)(&_MBAR[0x914])) -#define MCF_SLT1_SCNT (*(volatile uint32_t*)(&_MBAR[0x918])) -#define MCF_SLT1_SSR (*(volatile uint32_t*)(&_MBAR[0x91C])) - -#define MCF_SLT_STCNT(x) (*(volatile uint32_t*)(&_MBAR[0x900 + ((x)*0x10)])) -#define MCF_SLT_SCR(x) (*(volatile uint32_t*)(&_MBAR[0x904 + ((x)*0x10)])) -#define MCF_SLT_SCNT(x) (*(volatile int32_t*)(&_MBAR[0x908 + ((x)*0x10)])) -#define MCF_SLT_SSR(x) (*(volatile uint32_t*)(&_MBAR[0x90C + ((x)*0x10)])) - - -/* Bit definitions and macros for MCF_SLT_STCNT */ -#define MCF_SLT_STCNT_TC(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SLT_SCR */ -#define MCF_SLT_SCR_TEN (0x1000000) -#define MCF_SLT_SCR_IEN (0x2000000) -#define MCF_SLT_SCR_RUN (0x4000000) - -/* Bit definitions and macros for MCF_SLT_SCNT */ -#define MCF_SLT_SCNT_CNT(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SLT_SSR */ -#define MCF_SLT_SSR_ST (0x1000000) -#define MCF_SLT_SSR_BE (0x2000000) - - -#endif /* __MCF5475_SLT_H__ */ diff --git a/tos/jtagwait/include/MCF5475_SRAM.h b/tos/jtagwait/include/MCF5475_SRAM.h deleted file mode 100644 index d111f13..0000000 --- a/tos/jtagwait/include/MCF5475_SRAM.h +++ /dev/null @@ -1,62 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SRAM_H__ -#define __MCF5475_SRAM_H__ - - -/********************************************************************* -* -* System SRAM Module (SRAM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SRAM_SSCR (*(volatile uint32_t*)(&__MBAR[0x1FFC0])) -#define MCF_SRAM_TCCR (*(volatile uint32_t*)(&__MBAR[0x1FFC4])) -#define MCF_SRAM_TCCRDR (*(volatile uint32_t*)(&__MBAR[0x1FFC8])) -#define MCF_SRAM_TCCRDW (*(volatile uint32_t*)(&__MBAR[0x1FFCC])) -#define MCF_SRAM_TCCRSEC (*(volatile uint32_t*)(&__MBAR[0x1FFD0])) - - -/* Bit definitions and macros for MCF_SRAM_SSCR */ -#define MCF_SRAM_SSCR_INLV (0x10000) - -/* Bit definitions and macros for MCF_SRAM_TCCR */ -#define MCF_SRAM_TCCR_BANK0_TC(x) (((x)&0xF)<<0) -#define MCF_SRAM_TCCR_BANK1_TC(x) (((x)&0xF)<<0x8) -#define MCF_SRAM_TCCR_BANK2_TC(x) (((x)&0xF)<<0x10) -#define MCF_SRAM_TCCR_BANK3_TC(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SRAM_TCCRDR */ -#define MCF_SRAM_TCCRDR_BANK0_TC(x) (((x)&0xF)<<0) -#define MCF_SRAM_TCCRDR_BANK1_TC(x) (((x)&0xF)<<0x8) -#define MCF_SRAM_TCCRDR_BANK2_TC(x) (((x)&0xF)<<0x10) -#define MCF_SRAM_TCCRDR_BANK3_TC(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SRAM_TCCRDW */ -#define MCF_SRAM_TCCRDW_BANK0_TC(x) (((x)&0xF)<<0) -#define MCF_SRAM_TCCRDW_BANK1_TC(x) (((x)&0xF)<<0x8) -#define MCF_SRAM_TCCRDW_BANK2_TC(x) (((x)&0xF)<<0x10) -#define MCF_SRAM_TCCRDW_BANK3_TC(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SRAM_TCCRSEC */ -#define MCF_SRAM_TCCRSEC_BANK0_TC(x) (((x)&0xF)<<0) -#define MCF_SRAM_TCCRSEC_BANK1_TC(x) (((x)&0xF)<<0x8) -#define MCF_SRAM_TCCRSEC_BANK2_TC(x) (((x)&0xF)<<0x10) -#define MCF_SRAM_TCCRSEC_BANK3_TC(x) (((x)&0xF)<<0x18) - - -#endif /* __MCF5475_SRAM_H__ */ diff --git a/tos/jtagwait/include/MCF5475_USB.h b/tos/jtagwait/include/MCF5475_USB.h deleted file mode 100644 index c60273c..0000000 --- a/tos/jtagwait/include/MCF5475_USB.h +++ /dev/null @@ -1,554 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_USB_H__ -#define __MCF5475_USB_H__ - - -/********************************************************************* -* -* Universal Serial Bus Interface (USB) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_USB_USBAISR (*(volatile uint8_t *)(&__MBAR[0xB000])) -#define MCF_USB_USBAIMR (*(volatile uint8_t *)(&__MBAR[0xB001])) -#define MCF_USB_EPINFO (*(volatile uint8_t *)(&__MBAR[0xB003])) -#define MCF_USB_CFGR (*(volatile uint8_t *)(&__MBAR[0xB004])) -#define MCF_USB_CFGAR (*(volatile uint8_t *)(&__MBAR[0xB005])) -#define MCF_USB_SPEEDR (*(volatile uint8_t *)(&__MBAR[0xB006])) -#define MCF_USB_FRMNUMR (*(volatile uint16_t*)(&__MBAR[0xB00E])) -#define MCF_USB_EPTNR (*(volatile uint16_t*)(&__MBAR[0xB010])) -#define MCF_USB_IFUR (*(volatile uint16_t*)(&__MBAR[0xB014])) -#define MCF_USB_IFR0 (*(volatile uint16_t*)(&__MBAR[0xB040])) -#define MCF_USB_IFR1 (*(volatile uint16_t*)(&__MBAR[0xB042])) -#define MCF_USB_IFR2 (*(volatile uint16_t*)(&__MBAR[0xB044])) -#define MCF_USB_IFR3 (*(volatile uint16_t*)(&__MBAR[0xB046])) -#define MCF_USB_IFR4 (*(volatile uint16_t*)(&__MBAR[0xB048])) -#define MCF_USB_IFR5 (*(volatile uint16_t*)(&__MBAR[0xB04A])) -#define MCF_USB_IFR6 (*(volatile uint16_t*)(&__MBAR[0xB04C])) -#define MCF_USB_IFR7 (*(volatile uint16_t*)(&__MBAR[0xB04E])) -#define MCF_USB_IFR8 (*(volatile uint16_t*)(&__MBAR[0xB050])) -#define MCF_USB_IFR9 (*(volatile uint16_t*)(&__MBAR[0xB052])) -#define MCF_USB_IFR10 (*(volatile uint16_t*)(&__MBAR[0xB054])) -#define MCF_USB_IFR11 (*(volatile uint16_t*)(&__MBAR[0xB056])) -#define MCF_USB_IFR12 (*(volatile uint16_t*)(&__MBAR[0xB058])) -#define MCF_USB_IFR13 (*(volatile uint16_t*)(&__MBAR[0xB05A])) -#define MCF_USB_IFR14 (*(volatile uint16_t*)(&__MBAR[0xB05C])) -#define MCF_USB_IFR15 (*(volatile uint16_t*)(&__MBAR[0xB05E])) -#define MCF_USB_IFR16 (*(volatile uint16_t*)(&__MBAR[0xB060])) -#define MCF_USB_IFR17 (*(volatile uint16_t*)(&__MBAR[0xB062])) -#define MCF_USB_IFR18 (*(volatile uint16_t*)(&__MBAR[0xB064])) -#define MCF_USB_IFR19 (*(volatile uint16_t*)(&__MBAR[0xB066])) -#define MCF_USB_IFR20 (*(volatile uint16_t*)(&__MBAR[0xB068])) -#define MCF_USB_IFR21 (*(volatile uint16_t*)(&__MBAR[0xB06A])) -#define MCF_USB_IFR22 (*(volatile uint16_t*)(&__MBAR[0xB06C])) -#define MCF_USB_IFR23 (*(volatile uint16_t*)(&__MBAR[0xB06E])) -#define MCF_USB_IFR24 (*(volatile uint16_t*)(&__MBAR[0xB070])) -#define MCF_USB_IFR25 (*(volatile uint16_t*)(&__MBAR[0xB072])) -#define MCF_USB_IFR26 (*(volatile uint16_t*)(&__MBAR[0xB074])) -#define MCF_USB_IFR27 (*(volatile uint16_t*)(&__MBAR[0xB076])) -#define MCF_USB_IFR28 (*(volatile uint16_t*)(&__MBAR[0xB078])) -#define MCF_USB_IFR29 (*(volatile uint16_t*)(&__MBAR[0xB07A])) -#define MCF_USB_IFR30 (*(volatile uint16_t*)(&__MBAR[0xB07C])) -#define MCF_USB_IFR31 (*(volatile uint16_t*)(&__MBAR[0xB07E])) -#define MCF_USB_PPCNT (*(volatile uint16_t*)(&__MBAR[0xB080])) -#define MCF_USB_DPCNT (*(volatile uint16_t*)(&__MBAR[0xB082])) -#define MCF_USB_CRCECNT (*(volatile uint16_t*)(&__MBAR[0xB084])) -#define MCF_USB_BSECNT (*(volatile uint16_t*)(&__MBAR[0xB086])) -#define MCF_USB_PIDECNT (*(volatile uint16_t*)(&__MBAR[0xB088])) -#define MCF_USB_FRMECNT (*(volatile uint16_t*)(&__MBAR[0xB08A])) -#define MCF_USB_TXPCNT (*(volatile uint16_t*)(&__MBAR[0xB08C])) -#define MCF_USB_CNTOVR (*(volatile uint8_t *)(&__MBAR[0xB08E])) -#define MCF_USB_EP0ACR (*(volatile uint8_t *)(&__MBAR[0xB101])) -#define MCF_USB_EP0MPSR (*(volatile uint16_t*)(&__MBAR[0xB102])) -#define MCF_USB_EP0IFR (*(volatile uint8_t *)(&__MBAR[0xB104])) -#define MCF_USB_EP0SR (*(volatile uint8_t *)(&__MBAR[0xB105])) -#define MCF_USB_BMRTR (*(volatile uint8_t *)(&__MBAR[0xB106])) -#define MCF_USB_BRTR (*(volatile uint8_t *)(&__MBAR[0xB107])) -#define MCF_USB_WVALUER (*(volatile uint16_t*)(&__MBAR[0xB108])) -#define MCF_USB_WINDEXR (*(volatile uint16_t*)(&__MBAR[0xB10A])) -#define MCF_USB_WLENGTHR (*(volatile uint16_t*)(&__MBAR[0xB10C])) -#define MCF_USB_EP1OUTACR (*(volatile uint8_t *)(&__MBAR[0xB131])) -#define MCF_USB_EP1OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB132])) -#define MCF_USB_EP1OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB134])) -#define MCF_USB_EP1OUTSR (*(volatile uint8_t *)(&__MBAR[0xB135])) -#define MCF_USB_EP1OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB13E])) -#define MCF_USB_EP1INACR (*(volatile uint8_t *)(&__MBAR[0xB149])) -#define MCF_USB_EP1INMPSR (*(volatile uint16_t*)(&__MBAR[0xB14A])) -#define MCF_USB_EP1INIFR (*(volatile uint8_t *)(&__MBAR[0xB14C])) -#define MCF_USB_EP1INSR (*(volatile uint8_t *)(&__MBAR[0xB14D])) -#define MCF_USB_EP1INSFR (*(volatile uint16_t*)(&__MBAR[0xB156])) -#define MCF_USB_EP2OUTACR (*(volatile uint8_t *)(&__MBAR[0xB161])) -#define MCF_USB_EP2OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB162])) -#define MCF_USB_EP2OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB164])) -#define MCF_USB_EP2OUTSR (*(volatile uint8_t *)(&__MBAR[0xB165])) -#define MCF_USB_EP2OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB16E])) -#define MCF_USB_EP2INACR (*(volatile uint8_t *)(&__MBAR[0xB179])) -#define MCF_USB_EP2INMPSR (*(volatile uint16_t*)(&__MBAR[0xB17A])) -#define MCF_USB_EP2INIFR (*(volatile uint8_t *)(&__MBAR[0xB17C])) -#define MCF_USB_EP2INSR (*(volatile uint8_t *)(&__MBAR[0xB17D])) -#define MCF_USB_EP2INSFR (*(volatile uint16_t*)(&__MBAR[0xB186])) -#define MCF_USB_EP3OUTACR (*(volatile uint8_t *)(&__MBAR[0xB191])) -#define MCF_USB_EP3OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB192])) -#define MCF_USB_EP3OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB194])) -#define MCF_USB_EP3OUTSR (*(volatile uint8_t *)(&__MBAR[0xB195])) -#define MCF_USB_EP3OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB19E])) -#define MCF_USB_EP3INACR (*(volatile uint8_t *)(&__MBAR[0xB1A9])) -#define MCF_USB_EP3INMPSR (*(volatile uint16_t*)(&__MBAR[0xB1AA])) -#define MCF_USB_EP3INIFR (*(volatile uint8_t *)(&__MBAR[0xB1AC])) -#define MCF_USB_EP3INSR (*(volatile uint8_t *)(&__MBAR[0xB1AD])) -#define MCF_USB_EP3INSFR (*(volatile uint16_t*)(&__MBAR[0xB1B6])) -#define MCF_USB_EP4OUTACR (*(volatile uint8_t *)(&__MBAR[0xB1C1])) -#define MCF_USB_EP4OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB1C2])) -#define MCF_USB_EP4OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB1C4])) -#define MCF_USB_EP4OUTSR (*(volatile uint8_t *)(&__MBAR[0xB1C5])) -#define MCF_USB_EP4OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB1CE])) -#define MCF_USB_EP4INACR (*(volatile uint8_t *)(&__MBAR[0xB1D9])) -#define MCF_USB_EP4INMPSR (*(volatile uint16_t*)(&__MBAR[0xB1DA])) -#define MCF_USB_EP4INIFR (*(volatile uint8_t *)(&__MBAR[0xB1DC])) -#define MCF_USB_EP4INSR (*(volatile uint8_t *)(&__MBAR[0xB1DD])) -#define MCF_USB_EP4INSFR (*(volatile uint16_t*)(&__MBAR[0xB1E6])) -#define MCF_USB_EP5OUTACR (*(volatile uint8_t *)(&__MBAR[0xB1F1])) -#define MCF_USB_EP5OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB1F2])) -#define MCF_USB_EP5OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB1F4])) -#define MCF_USB_EP5OUTSR (*(volatile uint8_t *)(&__MBAR[0xB1F5])) -#define MCF_USB_EP5OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB1FE])) -#define MCF_USB_EP5INACR (*(volatile uint8_t *)(&__MBAR[0xB209])) -#define MCF_USB_EP5INMPSR (*(volatile uint16_t*)(&__MBAR[0xB20A])) -#define MCF_USB_EP5INIFR (*(volatile uint8_t *)(&__MBAR[0xB20C])) -#define MCF_USB_EP5INSR (*(volatile uint8_t *)(&__MBAR[0xB20D])) -#define MCF_USB_EP5INSFR (*(volatile uint16_t*)(&__MBAR[0xB216])) -#define MCF_USB_EP6OUTACR (*(volatile uint8_t *)(&__MBAR[0xB221])) -#define MCF_USB_EP6OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB222])) -#define MCF_USB_EP6OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB224])) -#define MCF_USB_EP6OUTSR (*(volatile uint8_t *)(&__MBAR[0xB225])) -#define MCF_USB_EP6OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB22E])) -#define MCF_USB_EP6INACR (*(volatile uint8_t *)(&__MBAR[0xB239])) -#define MCF_USB_EP6INMPSR (*(volatile uint16_t*)(&__MBAR[0xB23A])) -#define MCF_USB_EP6INIFR (*(volatile uint8_t *)(&__MBAR[0xB23C])) -#define MCF_USB_EP6INSR (*(volatile uint8_t *)(&__MBAR[0xB23D])) -#define MCF_USB_EP6INSFR (*(volatile uint16_t*)(&__MBAR[0xB246])) -#define MCF_USB_USBSR (*(volatile uint32_t*)(&__MBAR[0xB400])) -#define MCF_USB_USBCR (*(volatile uint32_t*)(&__MBAR[0xB404])) -#define MCF_USB_DRAMCR (*(volatile uint32_t*)(&__MBAR[0xB408])) -#define MCF_USB_DRAMDR (*(volatile uint32_t*)(&__MBAR[0xB40C])) -#define MCF_USB_USBISR (*(volatile uint32_t*)(&__MBAR[0xB410])) -#define MCF_USB_USBIMR (*(volatile uint32_t*)(&__MBAR[0xB414])) -#define MCF_USB_EP0STAT (*(volatile uint32_t*)(&__MBAR[0xB440])) -#define MCF_USB_EP0ISR (*(volatile uint32_t*)(&__MBAR[0xB444])) -#define MCF_USB_EP0IMR (*(volatile uint32_t*)(&__MBAR[0xB448])) -#define MCF_USB_EP0FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB44C])) -#define MCF_USB_EP0FDR (*(volatile uint32_t*)(&__MBAR[0xB450])) -#define MCF_USB_EP0FSR (*(volatile uint32_t*)(&__MBAR[0xB454])) -#define MCF_USB_EP0FCR (*(volatile uint32_t*)(&__MBAR[0xB458])) -#define MCF_USB_EP0FAR (*(volatile uint32_t*)(&__MBAR[0xB45C])) -#define MCF_USB_EP0FRP (*(volatile uint32_t*)(&__MBAR[0xB460])) -#define MCF_USB_EP0FWP (*(volatile uint32_t*)(&__MBAR[0xB464])) -#define MCF_USB_EP0LRFP (*(volatile uint32_t*)(&__MBAR[0xB468])) -#define MCF_USB_EP0LWFP (*(volatile uint32_t*)(&__MBAR[0xB46C])) -#define MCF_USB_EP1STAT (*(volatile uint32_t*)(&__MBAR[0xB470])) -#define MCF_USB_EP1ISR (*(volatile uint32_t*)(&__MBAR[0xB474])) -#define MCF_USB_EP1IMR (*(volatile uint32_t*)(&__MBAR[0xB478])) -#define MCF_USB_EP1FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB47C])) -#define MCF_USB_EP1FDR (*(volatile uint32_t*)(&__MBAR[0xB480])) -#define MCF_USB_EP1FSR (*(volatile uint32_t*)(&__MBAR[0xB484])) -#define MCF_USB_EP1FCR (*(volatile uint32_t*)(&__MBAR[0xB488])) -#define MCF_USB_EP1FAR (*(volatile uint32_t*)(&__MBAR[0xB48C])) -#define MCF_USB_EP1FRP (*(volatile uint32_t*)(&__MBAR[0xB490])) -#define MCF_USB_EP1FWP (*(volatile uint32_t*)(&__MBAR[0xB494])) -#define MCF_USB_EP1LRFP (*(volatile uint32_t*)(&__MBAR[0xB498])) -#define MCF_USB_EP1LWFP (*(volatile uint32_t*)(&__MBAR[0xB49C])) -#define MCF_USB_EP2STAT (*(volatile uint32_t*)(&__MBAR[0xB4A0])) -#define MCF_USB_EP2ISR (*(volatile uint32_t*)(&__MBAR[0xB4A4])) -#define MCF_USB_EP2IMR (*(volatile uint32_t*)(&__MBAR[0xB4A8])) -#define MCF_USB_EP2FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB4AC])) -#define MCF_USB_EP2FDR (*(volatile uint32_t*)(&__MBAR[0xB4B0])) -#define MCF_USB_EP2FSR (*(volatile uint32_t*)(&__MBAR[0xB4B4])) -#define MCF_USB_EP2FCR (*(volatile uint32_t*)(&__MBAR[0xB4B8])) -#define MCF_USB_EP2FAR (*(volatile uint32_t*)(&__MBAR[0xB4BC])) -#define MCF_USB_EP2FRP (*(volatile uint32_t*)(&__MBAR[0xB4C0])) -#define MCF_USB_EP2FWP (*(volatile uint32_t*)(&__MBAR[0xB4C4])) -#define MCF_USB_EP2LRFP (*(volatile uint32_t*)(&__MBAR[0xB4C8])) -#define MCF_USB_EP2LWFP (*(volatile uint32_t*)(&__MBAR[0xB4CC])) -#define MCF_USB_EP3STAT (*(volatile uint32_t*)(&__MBAR[0xB4D0])) -#define MCF_USB_EP3ISR (*(volatile uint32_t*)(&__MBAR[0xB4D4])) -#define MCF_USB_EP3IMR (*(volatile uint32_t*)(&__MBAR[0xB4D8])) -#define MCF_USB_EP3FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB4DC])) -#define MCF_USB_EP3FDR (*(volatile uint32_t*)(&__MBAR[0xB4E0])) -#define MCF_USB_EP3FSR (*(volatile uint32_t*)(&__MBAR[0xB4E4])) -#define MCF_USB_EP3FCR (*(volatile uint32_t*)(&__MBAR[0xB4E8])) -#define MCF_USB_EP3FAR (*(volatile uint32_t*)(&__MBAR[0xB4EC])) -#define MCF_USB_EP3FRP (*(volatile uint32_t*)(&__MBAR[0xB4F0])) -#define MCF_USB_EP3FWP (*(volatile uint32_t*)(&__MBAR[0xB4F4])) -#define MCF_USB_EP3LRFP (*(volatile uint32_t*)(&__MBAR[0xB4F8])) -#define MCF_USB_EP3LWFP (*(volatile uint32_t*)(&__MBAR[0xB4FC])) -#define MCF_USB_EP4STAT (*(volatile uint32_t*)(&__MBAR[0xB500])) -#define MCF_USB_EP4ISR (*(volatile uint32_t*)(&__MBAR[0xB504])) -#define MCF_USB_EP4IMR (*(volatile uint32_t*)(&__MBAR[0xB508])) -#define MCF_USB_EP4FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB50C])) -#define MCF_USB_EP4FDR (*(volatile uint32_t*)(&__MBAR[0xB510])) -#define MCF_USB_EP4FSR (*(volatile uint32_t*)(&__MBAR[0xB514])) -#define MCF_USB_EP4FCR (*(volatile uint32_t*)(&__MBAR[0xB518])) -#define MCF_USB_EP4FAR (*(volatile uint32_t*)(&__MBAR[0xB51C])) -#define MCF_USB_EP4FRP (*(volatile uint32_t*)(&__MBAR[0xB520])) -#define MCF_USB_EP4FWP (*(volatile uint32_t*)(&__MBAR[0xB524])) -#define MCF_USB_EP4LRFP (*(volatile uint32_t*)(&__MBAR[0xB528])) -#define MCF_USB_EP4LWFP (*(volatile uint32_t*)(&__MBAR[0xB52C])) -#define MCF_USB_EP5STAT (*(volatile uint32_t*)(&__MBAR[0xB530])) -#define MCF_USB_EP5ISR (*(volatile uint32_t*)(&__MBAR[0xB534])) -#define MCF_USB_EP5IMR (*(volatile uint32_t*)(&__MBAR[0xB538])) -#define MCF_USB_EP5FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB53C])) -#define MCF_USB_EP5FDR (*(volatile uint32_t*)(&__MBAR[0xB540])) -#define MCF_USB_EP5FSR (*(volatile uint32_t*)(&__MBAR[0xB544])) -#define MCF_USB_EP5FCR (*(volatile uint32_t*)(&__MBAR[0xB548])) -#define MCF_USB_EP5FAR (*(volatile uint32_t*)(&__MBAR[0xB54C])) -#define MCF_USB_EP5FRP (*(volatile uint32_t*)(&__MBAR[0xB550])) -#define MCF_USB_EP5FWP (*(volatile uint32_t*)(&__MBAR[0xB554])) -#define MCF_USB_EP5LRFP (*(volatile uint32_t*)(&__MBAR[0xB558])) -#define MCF_USB_EP5LWFP (*(volatile uint32_t*)(&__MBAR[0xB55C])) -#define MCF_USB_EP6STAT (*(volatile uint32_t*)(&__MBAR[0xB560])) -#define MCF_USB_EP6ISR (*(volatile uint32_t*)(&__MBAR[0xB564])) -#define MCF_USB_EP6IMR (*(volatile uint32_t*)(&__MBAR[0xB568])) -#define MCF_USB_EP6FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB56C])) -#define MCF_USB_EP6FDR (*(volatile uint32_t*)(&__MBAR[0xB570])) -#define MCF_USB_EP6FSR (*(volatile uint32_t*)(&__MBAR[0xB574])) -#define MCF_USB_EP6FCR (*(volatile uint32_t*)(&__MBAR[0xB578])) -#define MCF_USB_EP6FAR (*(volatile uint32_t*)(&__MBAR[0xB57C])) -#define MCF_USB_EP6FRP (*(volatile uint32_t*)(&__MBAR[0xB580])) -#define MCF_USB_EP6FWP (*(volatile uint32_t*)(&__MBAR[0xB584])) -#define MCF_USB_EP6LRFP (*(volatile uint32_t*)(&__MBAR[0xB588])) -#define MCF_USB_EP6LWFP (*(volatile uint32_t*)(&__MBAR[0xB58C])) -#define MCF_USB_IFR(x) (*(volatile uint16_t*)(&__MBAR[0xB040 + ((x)*0x2)])) -#define MCF_USB_EPOUTACR(x) (*(volatile uint8_t *)(&__MBAR[0xB131 + ((x-1)*0x30)])) -#define MCF_USB_EPOUTMPSR(x) (*(volatile uint16_t*)(&__MBAR[0xB132 + ((x-1)*0x30)])) -#define MCF_USB_EPOUTIFR(x) (*(volatile uint8_t *)(&__MBAR[0xB134 + ((x-1)*0x30)])) -#define MCF_USB_EPOUTSR(x) (*(volatile uint8_t *)(&__MBAR[0xB135 + ((x-1)*0x30)])) -#define MCF_USB_EPOUTSFR(x) (*(volatile uint16_t*)(&__MBAR[0xB13E + ((x-1)*0x30)])) -#define MCF_USB_EPINACR(x) (*(volatile uint8_t *)(&__MBAR[0xB149 + ((x-1)*0x30)])) -#define MCF_USB_EPINMPSR(x) (*(volatile uint16_t*)(&__MBAR[0xB14A + ((x-1)*0x30)])) -#define MCF_USB_EPINIFR(x) (*(volatile uint8_t *)(&__MBAR[0xB14C + ((x-1)*0x30)])) -#define MCF_USB_EPINSR(x) (*(volatile uint8_t *)(&__MBAR[0xB14D + ((x-1)*0x30)])) -#define MCF_USB_EPINSFR(x) (*(volatile uint16_t*)(&__MBAR[0xB156 + ((x-1)*0x30)])) -#define MCF_USB_EPSTAT(x) (*(volatile uint32_t*)(&__MBAR[0xB440 + ((x)*0x30)])) -#define MCF_USB_EPISR(x) (*(volatile uint32_t*)(&__MBAR[0xB444 + ((x)*0x30)])) -#define MCF_USB_EPIMR(x) (*(volatile uint32_t*)(&__MBAR[0xB448 + ((x)*0x30)])) -#define MCF_USB_EPFRCFGR(x) (*(volatile uint32_t*)(&__MBAR[0xB44C + ((x)*0x30)])) -#define MCF_USB_EPFDR(x) (*(volatile uint32_t*)(&__MBAR[0xB450 + ((x)*0x30)])) -#define MCF_USB_EPFSR(x) (*(volatile uint32_t*)(&__MBAR[0xB454 + ((x)*0x30)])) -#define MCF_USB_EPFCR(x) (*(volatile uint32_t*)(&__MBAR[0xB458 + ((x)*0x30)])) -#define MCF_USB_EPFAR(x) (*(volatile uint32_t*)(&__MBAR[0xB45C + ((x)*0x30)])) -#define MCF_USB_EPFRP(x) (*(volatile uint32_t*)(&__MBAR[0xB460 + ((x)*0x30)])) -#define MCF_USB_EPFWP(x) (*(volatile uint32_t*)(&__MBAR[0xB464 + ((x)*0x30)])) -#define MCF_USB_EPLRFP(x) (*(volatile uint32_t*)(&__MBAR[0xB468 + ((x)*0x30)])) -#define MCF_USB_EPLWFP(x) (*(volatile uint32_t*)(&__MBAR[0xB46C + ((x)*0x30)])) - - -/* Bit definitions and macros for MCF_USB_USBAISR */ -#define MCF_USB_USBAISR_SETUP (0x1) -#define MCF_USB_USBAISR_IN (0x2) -#define MCF_USB_USBAISR_OUT (0x4) -#define MCF_USB_USBAISR_EPHALT (0x8) -#define MCF_USB_USBAISR_TRANSERR (0x10) -#define MCF_USB_USBAISR_ACK (0x20) -#define MCF_USB_USBAISR_CTROVFL (0x40) -#define MCF_USB_USBAISR_EPSTALL (0x80) - -/* Bit definitions and macros for MCF_USB_USBAIMR */ -#define MCF_USB_USBAIMR_SETUPEN (0x1) -#define MCF_USB_USBAIMR_INEN (0x2) -#define MCF_USB_USBAIMR_OUTEN (0x4) -#define MCF_USB_USBAIMR_EPHALTEN (0x8) -#define MCF_USB_USBAIMR_TRANSERREN (0x10) -#define MCF_USB_USBAIMR_ACKEN (0x20) -#define MCF_USB_USBAIMR_CTROVFLEN (0x40) -#define MCF_USB_USBAIMR_EPSTALLEN (0x80) - -/* Bit definitions and macros for MCF_USB_EPINFO */ -#define MCF_USB_EPINFO_EPDIR (0x1) -#define MCF_USB_EPINFO_EPNUM(x) (((x)&0x7)<<0x1) - -/* Bit definitions and macros for MCF_USB_CFGR */ -#define MCF_USB_CFGR_Configuration_Value(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_CFGAR */ -#define MCF_USB_CFGAR_RESERVED (0xA0) -#define MCF_USB_CFGAR_RMTWKEUP (0xE0) - -/* Bit definitions and macros for MCF_USB_SPEEDR */ -#define MCF_USB_SPEEDR_SPEED(x) (((x)&0x3)<<0) - -/* Bit definitions and macros for MCF_USB_FRMNUMR */ -#define MCF_USB_FRMNUMR_FRMNUM(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPTNR */ -#define MCF_USB_EPTNR_EP1T(x) (((x)&0x3)<<0) -#define MCF_USB_EPTNR_EP2T(x) (((x)&0x3)<<0x2) -#define MCF_USB_EPTNR_EP3T(x) (((x)&0x3)<<0x4) -#define MCF_USB_EPTNR_EP4T(x) (((x)&0x3)<<0x6) -#define MCF_USB_EPTNR_EP5T(x) (((x)&0x3)<<0x8) -#define MCF_USB_EPTNR_EP6T(x) (((x)&0x3)<<0xA) -#define MCF_USB_EPTNR_EPnT1 (0) -#define MCF_USB_EPTNR_EPnT2 (0x1) -#define MCF_USB_EPTNR_EPnT3 (0x2) - -/* Bit definitions and macros for MCF_USB_IFUR */ -#define MCF_USB_IFUR_ALTSET(x) (((x)&0xFF)<<0) -#define MCF_USB_IFUR_IFNUM(x) (((x)&0xFF)<<0x8) - -/* Bit definitions and macros for MCF_USB_IFR */ -#define MCF_USB_IFR_ALTSET(x) (((x)&0xFF)<<0) -#define MCF_USB_IFR_IFNUM(x) (((x)&0xFF)<<0x8) - -/* Bit definitions and macros for MCF_USB_PPCNT */ -#define MCF_USB_PPCNT_PPCNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_DPCNT */ -#define MCF_USB_DPCNT_DPCNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_CRCECNT */ -#define MCF_USB_CRCECNT_CRCECNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_BSECNT */ -#define MCF_USB_BSECNT_BSECNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_PIDECNT */ -#define MCF_USB_PIDECNT_PIDECNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_FRMECNT */ -#define MCF_USB_FRMECNT_FRMECNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_TXPCNT */ -#define MCF_USB_TXPCNT_TXPCNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_CNTOVR */ -#define MCF_USB_CNTOVR_PPCNT (0x1) -#define MCF_USB_CNTOVR_DPCNT (0x2) -#define MCF_USB_CNTOVR_CRCECNT (0x4) -#define MCF_USB_CNTOVR_BSECNT (0x8) -#define MCF_USB_CNTOVR_PIDECNT (0x10) -#define MCF_USB_CNTOVR_FRMECNT (0x20) -#define MCF_USB_CNTOVR_TXPCNT (0x40) - -/* Bit definitions and macros for MCF_USB_EP0ACR */ -#define MCF_USB_EP0ACR_TTYPE(x) (((x)&0x3)<<0) -#define MCF_USB_EP0ACR_TTYPE_CTRL (0) -#define MCF_USB_EP0ACR_TTYPE_ISOC (0x1) -#define MCF_USB_EP0ACR_TTYPE_BULK (0x2) -#define MCF_USB_EP0ACR_TTYPE_INT (0x3) - -/* Bit definitions and macros for MCF_USB_EP0MPSR */ -#define MCF_USB_EP0MPSR_MAXPKTSZ(x) (((x)&0x7FF)<<0) -#define MCF_USB_EP0MPSR_ADDTRANS(x) (((x)&0x3)<<0xB) - -/* Bit definitions and macros for MCF_USB_EP0IFR */ -#define MCF_USB_EP0IFR_IFNUM(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_EP0SR */ -#define MCF_USB_EP0SR_HALT (0x1) -#define MCF_USB_EP0SR_ACTIVE (0x2) -#define MCF_USB_EP0SR_PSTALL (0x4) -#define MCF_USB_EP0SR_CCOMP (0x8) -#define MCF_USB_EP0SR_TXZERO (0x20) -#define MCF_USB_EP0SR_INT (0x80) - -/* Bit definitions and macros for MCF_USB_BMRTR */ -#define MCF_USB_BMRTR_REC(x) (((x)&0x1F)<<0) -#define MCF_USB_BMRTR_REC_DEVICE (0) -#define MCF_USB_BMRTR_REC_INTERFACE (0x1) -#define MCF_USB_BMRTR_REC_ENDPOINT (0x2) -#define MCF_USB_BMRTR_REC_OTHER (0x3) -#define MCF_USB_BMRTR_TYPE(x) (((x)&0x3)<<0x5) -#define MCF_USB_BMRTR_TYPE_STANDARD (0) -#define MCF_USB_BMRTR_TYPE_CLASS (0x20) -#define MCF_USB_BMRTR_TYPE_VENDOR (0x40) -#define MCF_USB_BMRTR_DIR (0x80) - -/* Bit definitions and macros for MCF_USB_BRTR */ -#define MCF_USB_BRTR_BREQ(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_WVALUER */ -#define MCF_USB_WVALUER_WVALUE(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_WINDEXR */ -#define MCF_USB_WINDEXR_WINDEX(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_WLENGTHR */ -#define MCF_USB_WLENGTHR_WLENGTH(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPOUTACR */ -#define MCF_USB_EPOUTACR_TTYPE(x) (((x)&0x3)<<0) -#define MCF_USB_EPOUTACR_TTYPE_ISOC (0x1) -#define MCF_USB_EPOUTACR_TTYPE_BULK (0x2) -#define MCF_USB_EPOUTACR_TTYPE_INT (0x3) - -/* Bit definitions and macros for MCF_USB_EPOUTMPSR */ -#define MCF_USB_EPOUTMPSR_MAXPKTSZ(x) (((x)&0x7FF)<<0) -#define MCF_USB_EPOUTMPSR_ADDTRANS(x) (((x)&0x3)<<0xB) - -/* Bit definitions and macros for MCF_USB_EPOUTIFR */ -#define MCF_USB_EPOUTIFR_IFNUM(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPOUTSR */ -#define MCF_USB_EPOUTSR_HALT (0x1) -#define MCF_USB_EPOUTSR_ACTIVE (0x2) -#define MCF_USB_EPOUTSR_PSTALL (0x4) -#define MCF_USB_EPOUTSR_CCOMP (0x8) -#define MCF_USB_EPOUTSR_TXZERO (0x20) -#define MCF_USB_EPOUTSR_INT (0x80) - -/* Bit definitions and macros for MCF_USB_EPOUTSFR */ -#define MCF_USB_EPOUTSFR_FRMNUM(x) (((x)&0x7FF)<<0) - -/* Bit definitions and macros for MCF_USB_EPINACR */ -#define MCF_USB_EPINACR_TTYPE(x) (((x)&0x3)<<0) -#define MCF_USB_EPINACR_TTYPE_ISOC (0x1) -#define MCF_USB_EPINACR_TTYPE_BULK (0x2) -#define MCF_USB_EPINACR_TTYPE_INT (0x3) - -/* Bit definitions and macros for MCF_USB_EPINMPSR */ -#define MCF_USB_EPINMPSR_MAXPKTSZ(x) (((x)&0x7FF)<<0) -#define MCF_USB_EPINMPSR_ADDTRANS(x) (((x)&0x3)<<0xB) - -/* Bit definitions and macros for MCF_USB_EPINIFR */ -#define MCF_USB_EPINIFR_IFNUM(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPINSR */ -#define MCF_USB_EPINSR_HALT (0x1) -#define MCF_USB_EPINSR_ACTIVE (0x2) -#define MCF_USB_EPINSR_PSTALL (0x4) -#define MCF_USB_EPINSR_CCOMP (0x8) -#define MCF_USB_EPINSR_TXZERO (0x20) -#define MCF_USB_EPINSR_INT (0x80) - -/* Bit definitions and macros for MCF_USB_EPINSFR */ -#define MCF_USB_EPINSFR_FRMNUM(x) (((x)&0x7FF)<<0) - -/* Bit definitions and macros for MCF_USB_USBSR */ -#define MCF_USB_USBSR_ISOERREP(x) (((x)&0xF)<<0) -#define MCF_USB_USBSR_SUSP (0x80) - -/* Bit definitions and macros for MCF_USB_USBCR */ -#define MCF_USB_USBCR_RESUME (0x1) -#define MCF_USB_USBCR_APPLOCK (0x2) -#define MCF_USB_USBCR_RST (0x4) -#define MCF_USB_USBCR_RAMEN (0x8) -#define MCF_USB_USBCR_RAMSPLIT (0x20) - -/* Bit definitions and macros for MCF_USB_DRAMCR */ -#define MCF_USB_DRAMCR_DADR(x) (((x)&0x3FF)<<0) -#define MCF_USB_DRAMCR_DSIZE(x) (((x)&0x7FF)<<0x10) -#define MCF_USB_DRAMCR_BSY (0x40000000) -#define MCF_USB_DRAMCR_START (0x80000000) - -/* Bit definitions and macros for MCF_USB_DRAMDR */ -#define MCF_USB_DRAMDR_DDAT(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_USBISR */ -#define MCF_USB_USBISR_ISOERR (0x1) -#define MCF_USB_USBISR_FTUNLCK (0x2) -#define MCF_USB_USBISR_SUSP (0x4) -#define MCF_USB_USBISR_RES (0x8) -#define MCF_USB_USBISR_UPDSOF (0x10) -#define MCF_USB_USBISR_RSTSTOP (0x20) -#define MCF_USB_USBISR_SOF (0x40) -#define MCF_USB_USBISR_MSOF (0x80) - -/* Bit definitions and macros for MCF_USB_USBIMR */ -#define MCF_USB_USBIMR_ISOERR (0x1) -#define MCF_USB_USBIMR_FTUNLCK (0x2) -#define MCF_USB_USBIMR_SUSP (0x4) -#define MCF_USB_USBIMR_RES (0x8) -#define MCF_USB_USBIMR_UPDSOF (0x10) -#define MCF_USB_USBIMR_RSTSTOP (0x20) -#define MCF_USB_USBIMR_SOF (0x40) -#define MCF_USB_USBIMR_MSOF (0x80) - -/* Bit definitions and macros for MCF_USB_EPSTAT */ -#define MCF_USB_EPSTAT_RST (0x1) -#define MCF_USB_EPSTAT_FLUSH (0x2) -#define MCF_USB_EPSTAT_DIR (0x80) -#define MCF_USB_EPSTAT_BYTECNT(x) (((x)&0xFFF)<<0x10) - -/* Bit definitions and macros for MCF_USB_EPISR */ -#define MCF_USB_EPISR_EOF (0x1) -#define MCF_USB_EPISR_EOT (0x4) -#define MCF_USB_EPISR_FIFOLO (0x10) -#define MCF_USB_EPISR_FIFOHI (0x20) -#define MCF_USB_EPISR_ERR (0x40) -#define MCF_USB_EPISR_EMT (0x80) -#define MCF_USB_EPISR_FU (0x100) - -/* Bit definitions and macros for MCF_USB_EPIMR */ -#define MCF_USB_EPIMR_EOF (0x1) -#define MCF_USB_EPIMR_EOT (0x4) -#define MCF_USB_EPIMR_FIFOLO (0x10) -#define MCF_USB_EPIMR_FIFOHI (0x20) -#define MCF_USB_EPIMR_ERR (0x40) -#define MCF_USB_EPIMR_EMT (0x80) -#define MCF_USB_EPIMR_FU (0x100) - -/* Bit definitions and macros for MCF_USB_EPFRCFGR */ -#define MCF_USB_EPFRCFGR_DEPTH(x) (((x)&0x1FFF)<<0) -#define MCF_USB_EPFRCFGR_BASE(x) (((x)&0xFFF)<<0x10) - -/* Bit definitions and macros for MCF_USB_EPFDR */ -#define MCF_USB_EPFDR_RX_TXDATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPFSR */ -#define MCF_USB_EPFSR_EMT (0x10000) -#define MCF_USB_EPFSR_ALRM (0x20000) -#define MCF_USB_EPFSR_FU (0x40000) -#define MCF_USB_EPFSR_FR (0x80000) -#define MCF_USB_EPFSR_OF (0x100000) -#define MCF_USB_EPFSR_UF (0x200000) -#define MCF_USB_EPFSR_RXW (0x400000) -#define MCF_USB_EPFSR_FAE (0x800000) -#define MCF_USB_EPFSR_FRM(x) (((x)&0xF)<<0x18) -#define MCF_USB_EPFSR_TXW (0x40000000) -#define MCF_USB_EPFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_USB_EPFCR */ -#define MCF_USB_EPFCR_COUNTER(x) (((x)&0xFFFF)<<0) -#define MCF_USB_EPFCR_TXWMSK (0x40000) -#define MCF_USB_EPFCR_OFMSK (0x80000) -#define MCF_USB_EPFCR_UFMSK (0x100000) -#define MCF_USB_EPFCR_RXWMSK (0x200000) -#define MCF_USB_EPFCR_FAEMSK (0x400000) -#define MCF_USB_EPFCR_IPMSK (0x800000) -#define MCF_USB_EPFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_USB_EPFCR_FRM (0x8000000) -#define MCF_USB_EPFCR_TMR (0x10000000) -#define MCF_USB_EPFCR_WFR (0x20000000) -#define MCF_USB_EPFCR_SHAD (0x80000000) - -/* Bit definitions and macros for MCF_USB_EPFAR */ -#define MCF_USB_EPFAR_ALRMP(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPFRP */ -#define MCF_USB_EPFRP_RP(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPFWP */ -#define MCF_USB_EPFWP_WP(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPLRFP */ -#define MCF_USB_EPLRFP_LRFP(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPLWFP */ -#define MCF_USB_EPLWFP_LWFP(x) (((x)&0xFFF)<<0) - - -#endif /* __MCF5475_USB_H__ */ diff --git a/tos/jtagwait/include/MCF5475_XLB.h b/tos/jtagwait/include/MCF5475_XLB.h deleted file mode 100644 index af25ae7..0000000 --- a/tos/jtagwait/include/MCF5475_XLB.h +++ /dev/null @@ -1,101 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_XLB_H__ -#define __MCF5475_XLB_H__ - - -/********************************************************************* -* -* XL Bus Arbiter (XLB) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_XLB_XARB_CFG (*(volatile uint32_t*)(&_MBAR[0x240])) -#define MCF_XLB_XARB_VER (*(volatile uint32_t*)(&_MBAR[0x244])) -#define MCF_XLB_XARB_SR (*(volatile uint32_t*)(&_MBAR[0x248])) -#define MCF_XLB_XARB_IMR (*(volatile uint32_t*)(&_MBAR[0x24C])) -#define MCF_XLB_XARB_ADRCAP (*(volatile uint32_t*)(&_MBAR[0x250])) -#define MCF_XLB_XARB_SIGCAP (*(volatile uint32_t*)(&_MBAR[0x254])) -#define MCF_XLB_XARB_ADRTO (*(volatile uint32_t*)(&_MBAR[0x258])) -#define MCF_XLB_XARB_DATTO (*(volatile uint32_t*)(&_MBAR[0x25C])) -#define MCF_XLB_XARB_BUSTO (*(volatile uint32_t*)(&_MBAR[0x260])) -#define MCF_XLB_XARB_PRIEN (*(volatile uint32_t*)(&_MBAR[0x264])) -#define MCF_XLB_XARB_PRI (*(volatile uint32_t*)(&_MBAR[0x268])) - - -/* Bit definitions and macros for MCF_XLB_XARB_CFG */ -#define MCF_XLB_XARB_CFG_AT (0x2) -#define MCF_XLB_XARB_CFG_DT (0x4) -#define MCF_XLB_XARB_CFG_BA (0x8) -#define MCF_XLB_XARB_CFG_PM(x) (((x)&0x3)<<0x5) -#define MCF_XLB_XARB_CFG_SP(x) (((x)&0x7)<<0x8) -#define MCF_XLB_XARB_CFG_PLDIS (0x80000000) - -/* Bit definitions and macros for MCF_XLB_XARB_VER */ -#define MCF_XLB_XARB_VER_VER(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_SR */ -#define MCF_XLB_XARB_SR_AT (0x1) -#define MCF_XLB_XARB_SR_DT (0x2) -#define MCF_XLB_XARB_SR_BA (0x4) -#define MCF_XLB_XARB_SR_TTM (0x8) -#define MCF_XLB_XARB_SR_ECW (0x10) -#define MCF_XLB_XARB_SR_TTR (0x20) -#define MCF_XLB_XARB_SR_TTA (0x40) -#define MCF_XLB_XARB_SR_MM (0x80) -#define MCF_XLB_XARB_SR_SEA (0x100) - -/* Bit definitions and macros for MCF_XLB_XARB_IMR */ -#define MCF_XLB_XARB_IMR_ATE (0x1) -#define MCF_XLB_XARB_IMR_DTE (0x2) -#define MCF_XLB_XARB_IMR_BAE (0x4) -#define MCF_XLB_XARB_IMR_TTME (0x8) -#define MCF_XLB_XARB_IMR_ECWE (0x10) -#define MCF_XLB_XARB_IMR_TTRE (0x20) -#define MCF_XLB_XARB_IMR_TTAE (0x40) -#define MCF_XLB_XARB_IMR_MME (0x80) -#define MCF_XLB_XARB_IMR_SEAE (0x100) - -/* Bit definitions and macros for MCF_XLB_XARB_ADRCAP */ -#define MCF_XLB_XARB_ADRCAP_ADRCAP(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_SIGCAP */ -#define MCF_XLB_XARB_SIGCAP_TT(x) (((x)&0x1F)<<0) -#define MCF_XLB_XARB_SIGCAP_TBST (0x20) -#define MCF_XLB_XARB_SIGCAP_TSIZ(x) (((x)&0x7)<<0x7) - -/* Bit definitions and macros for MCF_XLB_XARB_ADRTO */ -#define MCF_XLB_XARB_ADRTO_ADRTO(x) (((x)&0xFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_DATTO */ -#define MCF_XLB_XARB_DATTO_DATTO(x) (((x)&0xFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_BUSTO */ -#define MCF_XLB_XARB_BUSTO_BUSTO(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_PRIEN */ -#define MCF_XLB_XARB_PRIEN_M0 (0x1) -#define MCF_XLB_XARB_PRIEN_M2 (0x4) -#define MCF_XLB_XARB_PRIEN_M3 (0x8) - -/* Bit definitions and macros for MCF_XLB_XARB_PRI */ -#define MCF_XLB_XARB_PRI_M0P(x) (((x)&0x7)<<0) -#define MCF_XLB_XARB_PRI_M2P(x) (((x)&0x7)<<0x8) -#define MCF_XLB_XARB_PRI_M3P(x) (((x)&0x7)<<0xC) - - -#endif /* __MCF5475_XLB_H__ */ diff --git a/tos/jtagwait/include/bas_printf.h b/tos/jtagwait/include/bas_printf.h deleted file mode 100644 index 5b42c28..0000000 --- a/tos/jtagwait/include/bas_printf.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - */ - -#ifndef _BAS_PRINTF_H_ -#define _BAS_PRINTF_H_ -#include -#include - -extern void xvsnprintf(char *str, size_t size, const char *fmt, va_list va); -extern void xvprintf(const char *fmt, va_list va); -extern void xprintf(const char *fmt, ...); -extern void xsnprintf(char *str, size_t size, const char *fmt, ...); -extern void xputchar(int c); -extern int sprintf(char *str, const char *format, ...); - - -extern void display_progress(void); -extern void hexdump(uint8_t buffer[], int size); -#endif /* _BAS_PRINTF_H_ */ diff --git a/tos/jtagwait/include/bas_string.h b/tos/jtagwait/include/bas_string.h deleted file mode 100644 index c743c95..0000000 --- a/tos/jtagwait/include/bas_string.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * bas_string.h - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#ifndef BAS_STRING_H_ -#define BAS_STRING_H_ - -#include - -extern int strncmp(const char *s1, const char *s2, size_t max); -extern char *strcpy(char *dst, const char *src); -char *strncpy(char *dst, const char *src, size_t max); -extern int strcmp(const char *s1, const char *s2); -extern size_t strlen(const char *str); -extern char *strcat(char *dst, const char *src); -extern char *strncat(char *dst, const char *src, size_t max); -extern int atoi(const char *c); -extern void *memcpy(void *dst, const void *src, size_t n); -extern void *memset(void *s, int c, size_t n); -extern int memcmp(const void *s1, const void *s2, size_t max); -extern void bzero(void *s, size_t n); - -#define isdigit(c) (((c) >= '0') && ((c) <= '9')) -#define isupper(c) ((c) >= 'A' && ((c) <= 'Z')) -#define islower(c) ((c) >= 'a' && ((c) <= 'z')) -#define isalpha(c) (isupper((c)) || islower(c)) -#define tolower(c) (isupper(c) ? ((c) + 'a' - 'A') : (c)) - -#endif /* BAS_STRING_H_ */ diff --git a/tos/jtagwait/include/driver_vec.h b/tos/jtagwait/include/driver_vec.h deleted file mode 100644 index 8b9352a..0000000 --- a/tos/jtagwait/include/driver_vec.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * driver_vec.h - * - * Interface for exposure of BaS drivers to the OS - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 24.10.2013 - * Author: Markus Fröschle - */ - -#ifndef _DRIVER_VEC_H_ -#define _DRIVER_VEC_H_ - - -enum driver_type -{ - END_OF_DRIVERS, /* marks end of driver list */ - BLOCKDEV_DRIVER, - CHARDEV_DRIVER, - VIDEO_DRIVER, - XHDI_DRIVER, - MCD_DRIVER, -}; - -struct generic_driver_interface -{ - uint32_t (*init)(void); - uint32_t (*read)(void *buf, size_t count); - uint32_t (*write)(const void *buf, size_t count); - uint32_t (*ioctl)(uint32_t request, ...); -}; - - -/* Chained buffer descriptor */ -typedef volatile struct MCD_bufDesc_struct MCD_bufDesc; -struct MCD_bufDesc_struct { - uint32_t flags; /* flags describing the DMA */ - uint32_t csumResult; /* checksum from checksumming performed since last checksum reset */ - int8_t *srcAddr; /* the address to move data from */ - int8_t *destAddr; /* the address to move data to */ - int8_t *lastDestAddr; /* the last address written to */ - uint32_t dmaSize; /* the number of bytes to transfer independent of the transfer size */ - MCD_bufDesc *next; /* next buffer descriptor in chain */ - uint32_t info; /* private information about this descriptor; DMA does not affect it */ -}; - -/* Progress Query struct */ -typedef volatile struct MCD_XferProg_struct { - int8_t *lastSrcAddr; /* the most-recent or last, post-increment source address */ - int8_t *lastDestAddr; /* the most-recent or last, post-increment destination address */ - uint32_t dmaSize; /* the amount of data transferred for the current buffer */ - MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */ -} MCD_XferProg; - -struct dma_driver_interface -{ - int32_t version; - int32_t magic; - int32_t (*dma_set_initiator)(int initiator); - uint32_t (*dma_get_initiator)(int requestor); - void (*dma_free_initiator)(int requestor); - int32_t (*dma_set_channel)(int requestor, void (*handler)(void)); - int (*dma_get_channel)(int requestor); - void (*dma_free_channel)(int requestor); - void (*dma_clear_channel)(int channel); - int (*MCD_startDma)(int channel, int8_t *srcAddr, int16_t srcIncr, int8_t *destAddr, int16_t destIncr, - uint32_t dmaSize, uint32_t xferSize, uint32_t initiator, int32_t priority, uint32_t flags, - uint32_t funcDesc); - int (*MCD_dmaStatus)(int channel); - int (*MCD_XferProgrQuery)(int channel, MCD_XferProg *progRep); - int (*MCD_killDma)(int channel); - int (*MCD_continDma)(int channel); - int (*MCD_pauseDma)(int channel); - int (*MCD_resumeDma)(int channel); - int (*MCD_csumQuery)(int channel, uint32_t *csum); - void *(*dma_malloc)(long amount); - int (*dma_free)(void *addr); -}; - -struct xhdi_driver_interface -{ - uint32_t (*xhdivec)(); -}; - -union interface -{ - struct generic_driver_interface *gdi; - struct xhdi_driver_interface *xhdi; - struct dma_driver_interface *dma; -}; - -struct generic_interface -{ - enum driver_type type; - char name[16]; - char description[64]; - int version; - int revision; - union interface interface; -}; - -struct driver_table -{ - uint32_t bas_version; - uint32_t bas_revision; - uint32_t (*remove_handler)(); /* calling this will disable the BaS' hook into trap #0 */ - struct generic_interface *interfaces; -}; - - -#endif /* _DRIVER_VEC_H_ */ diff --git a/tos/jtagwait/jtagwait.config b/tos/jtagwait/jtagwait.config deleted file mode 100644 index 8cec188..0000000 --- a/tos/jtagwait/jtagwait.config +++ /dev/null @@ -1 +0,0 @@ -// ADD PREDEFINED MACROS HERE! diff --git a/tos/jtagwait/jtagwait.creator b/tos/jtagwait/jtagwait.creator deleted file mode 100644 index e94cbbd..0000000 --- a/tos/jtagwait/jtagwait.creator +++ /dev/null @@ -1 +0,0 @@ -[General] diff --git a/tos/jtagwait/jtagwait.creator.user b/tos/jtagwait/jtagwait.creator.user deleted file mode 100644 index 6304715..0000000 --- a/tos/jtagwait/jtagwait.creator.user +++ /dev/null @@ -1,186 +0,0 @@ - - - - - - ProjectExplorer.Project.ActiveTarget - 0 - - - ProjectExplorer.Project.EditorSettings - - true - false - true - - Cpp - - CppGlobal - - - - QmlJS - - QmlJSGlobal - - - 2 - UTF-8 - false - 4 - false - true - 1 - true - 0 - true - 0 - 8 - true - 1 - true - true - true - true - - - - ProjectExplorer.Project.PluginSettings - - - - ProjectExplorer.Project.Target.0 - - Desktop - Desktop - {8a828d48-5359-4872-acb6-81070c6b7c12} - 0 - 0 - 0 - - /home/mfro/Dokumente/Development/workspace/jtagwait - - - - all - - false - - - true - Make - - GenericProjectManager.GenericMakeStep - - 1 - Build - - ProjectExplorer.BuildSteps.Build - - - - - clean - - true - - - true - Make - - GenericProjectManager.GenericMakeStep - - 1 - Clean - - ProjectExplorer.BuildSteps.Clean - - 2 - false - - Default - Default - GenericProjectManager.GenericBuildConfiguration - - 1 - - - 0 - Deploy - - ProjectExplorer.BuildSteps.Deploy - - 1 - Deploy locally - - ProjectExplorer.DefaultDeployConfiguration - - 1 - - - - false - false - false - false - true - 0.01 - 10 - true - 1 - 25 - - 1 - true - false - true - valgrind - - 0 - 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 10 - 11 - 12 - 13 - 14 - - 2 - - - - false - %{buildDir} - Custom Executable - - ProjectExplorer.CustomExecutableRunConfiguration - 3768 - true - false - false - false - true - - 1 - - - - ProjectExplorer.Project.TargetCount - 1 - - - ProjectExplorer.Project.Updater.EnvironmentId - {d01d0a15-4efd-4fa2-8e2c-f26845794427} - - - ProjectExplorer.Project.Updater.FileVersion - 15 - - diff --git a/tos/jtagwait/jtagwait.files b/tos/jtagwait/jtagwait.files deleted file mode 100644 index 198470f..0000000 --- a/tos/jtagwait/jtagwait.files +++ /dev/null @@ -1,3 +0,0 @@ -include/driver_vec.h -sources/jtagwait.c -Makefile diff --git a/tos/jtagwait/jtagwait.includes b/tos/jtagwait/jtagwait.includes deleted file mode 100644 index 2996fba..0000000 --- a/tos/jtagwait/jtagwait.includes +++ /dev/null @@ -1 +0,0 @@ -include \ No newline at end of file diff --git a/tos/jtagwait/sources/bas_printf.c b/tos/jtagwait/sources/bas_printf.c deleted file mode 100644 index bfe67ac..0000000 --- a/tos/jtagwait/sources/bas_printf.c +++ /dev/null @@ -1,456 +0,0 @@ -/* - * tc.printf.c: A public-domain, minimal printf/sprintf routine that prints - * through the putchar() routine. Feel free to use for - * anything... -- 7/17/87 Paul Placeway - */ -/*- - * Copyright (c) 1980, 1991 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "MCF5475.h" -#include "bas_printf.h" -#include "bas_string.h" - -/* - * Lexical definitions. - * - * All lexical space is allocated dynamically. - * The eighth/sixteenth bit of characters is used to prevent recognition, - * and eventually stripped. - */ -#define META 0200 -#define ASCII 0177 -#define QUOTE ((char) 0200) /* Eighth char bit used for 'ing */ -#define TRIM 0177 /* Mask to strip quote bit */ -#define UNDER 0000000 /* No extra bits to do both */ -#define BOLD 0000000 /* Bold flag */ -#define STANDOUT META /* Standout flag */ -#define LITERAL 0000000 /* Literal character flag */ -#define ATTRIBUTES 0200 /* The bits used for attributes */ -#define CHAR 0000177 /* Mask to mask out the character */ - -#define INF 32766 /* should be bigger than any field to print */ - -static char snil[] = "(nil)"; - -void xputchar(int c) -{ - __asm__ __volatile__ - ( - ".extern printf_helper\n\t" - "move.b %0,d0\n\t" - "bsr printf_helper\n\t" - /* output */: - /* input */: "r" (c) - /* clobber */: "d0","d2","a0","memory" - ); -} - -static void doprnt(void (*addchar)(int), const char *sfmt, va_list ap) -{ - char buf[128]; - char *bp; - const char *f; - float flt; - long l; - unsigned long u; - int i; - int fmt; - unsigned char pad = ' '; - int flush_left = 0; - int f_width = 0; - int prec = INF; - int hash = 0; - int do_long = 0; - int sign = 0; - int attributes = 0; - - f = sfmt; - for (; *f; f++) - { - if (*f != '%') - { - /* then just out the char */ - (*addchar)((int) (((unsigned char) *f) | attributes)); - } - else - { - f++; /* skip the % */ - - if (*f == '-') - { /* minus: flush left */ - flush_left = 1; - f++; - } - - if (*f == '0' || *f == '.') - { - /* padding with 0 rather than blank */ - pad = '0'; - f++; - } - if (*f == '*') - { - /* field width */ - f_width = va_arg(ap, int); - f++; - } - else if (isdigit((unsigned char)*f)) - { - f_width = atoi(f); - while (isdigit((unsigned char)*f)) - f++; /* skip the digits */ - } - - if (*f == '.') - { /* precision */ - f++; - if (*f == '*') - { - prec = va_arg(ap, int); - f++; - } - else if (isdigit((unsigned char)*f)) - { - prec = atoi(f); - while (isdigit((unsigned char)*f)) - f++; /* skip the digits */ - } - } - - if (*f == '#') - { /* alternate form */ - hash = 1; - f++; - } - - if (*f == 'l') - { /* long format */ - do_long++; - f++; - if (*f == 'l') - { - do_long++; - f++; - } - } - - fmt = (unsigned char) *f; - if (fmt != 'S' && fmt != 'Q' && isupper(fmt)) - { - do_long = 1; - fmt = tolower(fmt); - } - bp = buf; - switch (fmt) - { /* do the format */ - case 'd': - switch (do_long) - { - case 0: - l = (long) (va_arg(ap, int)); - break; - case 1: - default: - l = va_arg(ap, long); - break; - } - - if (l < 0) - { - sign = 1; - l = -l; - } - do - { - *bp++ = (char) (l % 10) + '0'; - } while ((l /= 10) > 0); - if (sign) - *bp++ = '-'; - f_width = f_width - (int) (bp - buf); - if (!flush_left) - while (f_width-- > 0) - (*addchar)((int) (pad | attributes)); - for (bp--; bp >= buf; bp--) - (*addchar)((int) (((unsigned char) *bp) | attributes)); - if (flush_left) - while (f_width-- > 0) - (*addchar)((int) (' ' | attributes)); - break; - - case 'f': - /* this is actually more than stupid, but does work for now */ - flt = (float) (va_arg(ap, double)); /* beware: va_arg() extends float to double! */ - if (flt < 0) - { - sign = 1; - flt = -flt; - } - { - int quotient, remainder; - - quotient = (int) flt; - remainder = (flt - quotient) * 10E5; - - for (i = 0; i < 6; i++) - { - *bp++ = (char) (remainder % 10) + '0'; - remainder /= 10; - } - *bp++ = '.'; - do - { - *bp++ = (char) (quotient % 10) + '0'; - } while ((quotient /= 10) > 0); - if (sign) - *bp++ = '-'; - f_width = f_width - (int) (bp - buf); - if (!flush_left) - while (f_width-- > 0) - (*addchar)((int) (pad | attributes)); - for (bp--; bp >= buf; bp--) - (*addchar)((int) (((unsigned char) *bp) | attributes)); - if (flush_left) - while (f_width-- > 0) - (*addchar)((int) (' ' | attributes)); - } - break; - - case 'p': - do_long = 1; - hash = 1; - fmt = 'x'; - /* no break */ - case 'o': - case 'x': - case 'u': - switch (do_long) - { - case 0: - u = (unsigned long) (va_arg(ap, unsigned int)); - break; - case 1: - default: - u = va_arg(ap, unsigned long); - break; - } - if (fmt == 'u') - { /* unsigned decimal */ - do - { - *bp++ = (char) (u % 10) + '0'; - } while ((u /= 10) > 0); - } - else if (fmt == 'o') - { /* octal */ - do - { - *bp++ = (char) (u % 8) + '0'; - } while ((u /= 8) > 0); - if (hash) - *bp++ = '0'; - } - else if (fmt == 'x') - { /* hex */ - do - { - i = (int) (u % 16); - if (i < 10) - *bp++ = i + '0'; - else - *bp++ = i - 10 + 'a'; - } while ((u /= 16) > 0); - if (hash) - { - *bp++ = 'x'; - *bp++ = '0'; - } - } - i = f_width - (int) (bp - buf); - if (!flush_left) - while (i-- > 0) - (*addchar)((int) (pad | attributes)); - for (bp--; bp >= buf; bp--) - (*addchar)((int) (((unsigned char) *bp) | attributes)); - if (flush_left) - while (i-- > 0) - (*addchar)((int) (' ' | attributes)); - break; - - case 'c': - i = va_arg(ap, int); - (*addchar)((int) (i | attributes)); - break; - - case 'S': - case 'Q': - case 's': - case 'q': - bp = va_arg(ap, char *); - if (!bp) - bp = snil; - f_width = f_width - strlen((char *) bp); - if (!flush_left) - while (f_width-- > 0) - (*addchar)((int) (pad | attributes)); - for (i = 0; *bp && i < prec; i++) - { - if (fmt == 'q' && (*bp & QUOTE)) - (*addchar)((int) ('\\' | attributes)); - (*addchar)( - (int) (((unsigned char) *bp & TRIM) | attributes)); - bp++; - } - if (flush_left) - while (f_width-- > 0) - (*addchar)((int) (' ' | attributes)); - break; - - case 'a': - attributes = va_arg(ap, int); - break; - - case '%': - (*addchar)((int) ('%' | attributes)); - break; - - default: - break; - } - flush_left = 0, f_width = 0, prec = INF, hash = 0, do_long = 0; - sign = 0; - pad = ' '; - } - } -} - -static char *xstring, *xestring; - -void xaddchar(int c) -{ - if (xestring == xstring) - *xstring = '\0'; - else - *xstring++ = (char) c; -} - -int sprintf(char *str, const char *format, ...) -{ - va_list va; - va_start(va, format); - - xstring = str; - - doprnt(xaddchar, format, va); - va_end(va); - *xstring++ = '\0'; - - return 0; -} - -void xsnprintf(char *str, size_t size, const char *fmt, ...) -{ - va_list va; - va_start(va, fmt); - - xstring = str; - xestring = str + size - 1; - doprnt(xaddchar, fmt, va); - va_end(va); - *xstring++ = '\0'; -} - -void xprintf(const char *fmt, ...) -{ - va_list va; - va_start(va, fmt); - doprnt(xputchar, fmt, va); - va_end(va); -} - -void xvprintf(const char *fmt, va_list va) -{ - doprnt(xputchar, fmt, va); -} - -void xvsnprintf(char *str, size_t size, const char *fmt, va_list va) -{ - xstring = str; - xestring = str + size - 1; - doprnt(xaddchar, fmt, va); - *xstring++ = '\0'; -} - - -void display_progress() -{ - static int _progress_index; - char progress_char[] = "|/-\\"; - - xputchar(progress_char[_progress_index++ % strlen(progress_char)]); - xputchar('\r'); -} - -void hexdump(uint8_t buffer[], int size) -{ - int i; - int line = 0; - uint8_t *bp = buffer; - - while (bp < buffer + size) { - uint8_t *lbp = bp; - - xprintf("%08x ", line); - - for (i = 0; i < 16; i++) { - if (bp + i > buffer + size) { - break; - } - xprintf("%02x ", (uint8_t) *lbp++); - } - - lbp = bp; - for (i = 0; i < 16; i++) { - int8_t c = *lbp++; - - if (bp + i > buffer + size) { - break; - } - if (c > ' ' && c < '~') { - xprintf("%c", c); - } else { - xprintf("."); - } - } - xprintf("\r\n"); - - bp += 16; - line += 16; - } -} diff --git a/tos/jtagwait/sources/bas_string.c b/tos/jtagwait/sources/bas_string.c deleted file mode 100644 index 3960638..0000000 --- a/tos/jtagwait/sources/bas_string.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * bas_string.c - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#include "bas_types.h" -#include -#include "bas_string.h" - -void *memcpy(void *dst, const void *src, size_t n) -{ - uint8_t *to = dst; - - while (to < (uint8_t *) dst + n) - *to++ = * (uint8_t *) src++; - - return dst; -} - -void bzero(void *s, size_t n) -{ - size_t i; - - for (i = 0; i < n; i++) - ((unsigned char *) s)[i] = '\0'; -} - -void *memset(void *s, int c, size_t n) -{ - uint8_t *dst = s; - - do - { - *dst++ = c; - } while ((dst - (uint8_t *) s) < n); - - return s; -} - - -int memcmp(const void *s1, const void *s2, size_t max) -{ - int i; - int cmp; - - for (i = 0; i < max; i++) - { - cmp = (* (const char *) s1 - * (const char *) s2); - if (cmp != 0) return cmp; - } - return cmp; -} - -int strcmp(const char *s1, const char *s2) -{ - int i; - int cmp; - - for (i = 0; *s1++ && *s2++; i++) - { - cmp = (*s1 - *s2); - if (cmp != 0) return cmp; - } - return cmp; -} - -int strncmp(const char *s1, const char *s2, size_t max) -{ - int i; - int cmp; - - for (i = 0; i < max && *s1++ && *s2++; i++); - { - cmp = (*s1 - *s2); - if (cmp != 0) return cmp; - } - return cmp; -} - -char *strcpy(char *dst, const char *src) -{ - char *ptr = dst; - - while ((*dst++ = *src++) != '\0'); - return ptr; -} - -char *strncpy(char *dst, const char *src, size_t max) -{ - char *ptr = dst; - - while ((*dst++ = *src++) != '\0' && max-- >= 0); - return ptr; -} - -int atoi(const char *c) -{ - int value = 0; - while (isdigit(*c)) - { - value *= 10; - value += (int) (*c - '0'); - c++; - } - return value; -} - -size_t strlen(const char *s) -{ - const char *start = s; - - while (*s++); - - return s - start - 1; -} - - -char *strcat(char *dst, const char *src) -{ - char *ret = dst; - dst = &dst[strlen(dst)]; - while ((*dst++ = *src++) != '\0'); - return ret; -} - -char *strncat(char *dst, const char *src, size_t max) -{ - size_t i; - char *ret = dst; - - dst = &dst[strlen(dst)]; - for (i = 0; i < max && *src; i++) - { - *dst++ = *src++; - } - *dst++ = '\0'; - - return ret; -} diff --git a/tos/jtagwait/sources/jtagwait.c b/tos/jtagwait/sources/jtagwait.c deleted file mode 100644 index 6253eee..0000000 --- a/tos/jtagwait/sources/jtagwait.c +++ /dev/null @@ -1,123 +0,0 @@ -#include -#include -#include -#include - -#include "bas_printf.h" -#include "MCF5475.h" -#include "driver_vec.h" - -extern long _FPGA_JTAG_LOADED; -extern long _FPGA_JTAG_VALID; - -#define VALID_JTAG 0xaffeaffe - -#define FPGA_CONFIG (1 << 2) -#define FPGA_CONF_DONE (1 << 5) - -#define SRAM1_START 0xff101000 -#define SRAM1_END SRAM1_START + 0x1000 -#define SAFE_STACK SRAM1_END - 4 - -#define NOP() __asm__ __volatile__("nop\n\t" : : : "memory") - -long bas_start = 0xe0000000; -volatile uint32_t *_VRAM = (uint32_t *) 0x60000000; - - -void wait_for_jtag(void) -{ - int i; - - /* set supervisor stack to end of SRAM1 */ - __asm__ __volatile__ ( - " move #0x2700,sr\n\t" /* disable interrupts */ - " move.l %[stack],d0\n\t" /* 4KB on-chip core SRAM1 */ - " move.l d0,sp\n\t" /* set stack pointer */ - : - : [stack] "i" (SAFE_STACK) - : "d0", "cc" /* clobber */ - ); - - MCF_EPORT_EPIER = 0x0; /* disable EPORT interrupts */ - MCF_INTC_IMRL = 0xffffffff; - MCF_INTC_IMRH = 0xffffffff; /* disable interrupt controller */ - - MCF_MMU_MMUCR &= ~MCF_MMU_MMUCR_EN; /* disable MMU */ - - xprintf("relocated supervisor stack, disabled interrupts and disabled MMU\r\n"); - - /* - * configure FEC1L port directions to enable external JTAG configuration download to FPGA - */ - MCF_GPIO_PDDR_FEC1L = 0 | - MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4; /* bit 4 = LED => output */ - /* all other bits = input */ - - /* - * configure DSPI_CS3 as GPIO input to avoid the MCU driving against the FPGA blink - */ - MCF_PAD_PAR_DSPI &= ~MCF_PAD_PAR_DSPI_PAR_CS3(MCF_PAD_PAR_DSPI_PAR_CS3_DSPICS3); - /* - * now that GPIO ports have been switched to input, we can poll for FPGA config - * started from the JTAG interface (CONF_DONE goes low) and finish (CONF_DONE goes high) - */ - xprintf("waiting for JTAG configuration start\r\n"); - while ((MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)); /* wait for JTAG config load started */ - - xprintf("waiting for JTAG configuration to finish\r\n"); - while (!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)); /* wait for JTAG config load finished */ - - xprintf("JTAG configuration finished.\r\n"); - _FPGA_JTAG_LOADED = 1; /* indicate jtag loaded FPGA config to BaS */ - _FPGA_JTAG_VALID = VALID_JTAG; /* set magic word to indicate _FPGA_JTAG_LOADED is valid */ - - /* wait */ - xprintf("wait a little to let things settle...\r\n"); - for (i = 0; i < 100000; i++); - - __asm__ __volatile__( - " jmp (%[bas_start])\n\t" - : /* no output */ - : [bas_start] "a" (bas_start) - : /* clobber not needed */ - ); -} - -int main(int argc, char *argv[]) -{ - printf("\033E\r\nFPGA JTAG configuration support\r\n"); - printf(" 2014 M. Froeschle\r\n"); - - printf("You may now savely load a new FPGA configuration through the JTAG interface\r\n" - "and your Firebee will reboot once finished using that new configuration.\r\n"); - if (argc == 2) - { - /* - * we got an argument. This is supposed to be the address that we need to jump to after JTAG - * configuration has been finished. Meant to support BaS in RAM testing - */ - char *addr_str = argv[1]; - char *addr = NULL; - char *end = NULL; - - addr = (char *) strtol(addr_str, &end, 16); - if (addr != NULL && addr <= (char *) 0xe0000000 && addr >= (char *) 0x10000000) - { - /* - * seems to be a valid address - */ - bas_start = (long) addr; - - printf("BaS start address set to %p\r\n", (void *) bas_start); - } - else - { - printf("\r\nNote: BaS start address %p not valid. Stick to %p.\r\n", addr, (void *) bas_start); - } - } - Supexec(wait_for_jtag); - - return 0; /* just to make the compiler happy, we will never return */ -} - diff --git a/tos/jtagwait/sources/printf_helper.S b/tos/jtagwait/sources/printf_helper.S deleted file mode 100644 index 7d8eec1..0000000 --- a/tos/jtagwait/sources/printf_helper.S +++ /dev/null @@ -1,38 +0,0 @@ -/* - * printf_helper.S - * - * assembler trampoline to let printf (compiled -mpcrel) indirectly reference __MBAR - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - */ - - - .global printf_helper -printf_helper: - .extern __MBAR -.wait_txready: - move.w __MBAR+0x8604,d2 // PSCSCR0 status register - btst #10,d2 // space left in TX fifo? - beq.s .wait_txready // no, loop - lea __MBAR+0x860C,a0 // PSCSTB0 transmitter buffer register - move.b d0,(a0) // send byte - rts - -// vim: set syntax=asm68k : diff --git a/tos/vmem_test/Makefile b/tos/vmem_test/Makefile deleted file mode 100755 index 3226ea4..0000000 --- a/tos/vmem_test/Makefile +++ /dev/null @@ -1,104 +0,0 @@ -CROSS=Y - -CROSSBINDIR_IS_Y=m68k-atari-mint- -CROSSBINDIR_IS_N= - -CROSSBINDIR=$(CROSSBINDIR_IS_$(CROSS)) - -UNAME := $(shell uname) -ifeq ($(CROSS), Y) -ifeq ($(UNAME),Linux) -PREFIX=m68k-atari-mint -HATARI=hatari -else -PREFIX=m68k-atari-mint -HATARI=/usr/local/bin/hatari -endif -else -PREFIX=/usr -endif - -DEPEND=depend -TOPDIR = ../.. - -INCLUDE=-I$(TOPDIR)/../libcmini/include -nostdlib -LIBS=-lcmini -nostdlib -lgcc -CC=$(PREFIX)/bin/gcc - -CC=$(CROSSBINDIR)gcc -STRIP=$(CROSSBINDIR)strip -STACK=$(CROSSBINDIR)stack - -APP=vmem_test.prg -TEST_APP=$(APP) - -CFLAGS=\ - -O0\ - -g\ - -Wl,-Map,mapfile\ - -Wl,--defsym -Wl,__MBAR=0xff000000\ - -Wl,--defsym -Wl,__MMUBAR=0xff040000\ - -Wl,--defsym -Wl,__FPGA_JTAG_LOADED=0xff101000\ - -Wl,--defsym -Wl,__FPGA_JTAG_VALID=0xff101004\ - -Wl,--defsym -Wl,__VRAM=0x60000000\ - -Wall - -SRCDIR=sources -INCDIR=include -INCLUDE+=-I$(INCDIR) - -CSRCS=\ - $(SRCDIR)/vmem_test.c \ - $(SRCDIR)/bas_printf.c - -ASRCS=$(SRCDIR)/printf_helper.S - -COBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.c,%.o,$(CSRCS))) -AOBJS=$(patsubst $(SRCDIR)/%.o,%.o,$(patsubst %.S,%.o,$(ASRCS))) -OBJS=$(COBJS) $(AOBJS) - -TRGTDIRS=./m5475 ./m5475/mshort -OBJDIRS=$(patsubst %,%/objs,$(TRGTDIRS)) - -# -# multilib flags. These must match m68k-atari-mint-gcc -print-multi-lib output -# -m5475/$(APP):CFLAGS += -mcpu=5475 -m5475/mshort/$(APP): CFLAGS += -mcpu=5475 -mshort - -all:$(patsubst %,%/$(APP),$(TRGTDIRS)) -# -# generate pattern rules for multilib object files. -# -define CC_TEMPLATE -$(1)/objs/%.o:$(SRCDIR)/%.c - $(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@ - -$(1)/objs/%.o:$(SRCDIR)/%.S - $(CC) $$(CFLAGS) $(INCLUDE) -c $$< -o $$@ - -$(1)_OBJS=$(patsubst %,$(1)/objs/%,$(OBJS)) -$(1)/$(APP): $$($(1)_OBJS) - $(CC) $$(CFLAGS) -o $$@ $(TOPDIR)/../libcmini/$(1)/startup.o $$($(1)_OBJS) -L$(TOPDIR)/../libcmini/$(1) $(LIBS) - $(STRIP) $$@ -endef -$(foreach DIR,$(TRGTDIRS),$(eval $(call CC_TEMPLATE,$(DIR)))) - -$(DEPEND): $(ASRCS) $(CSRCS) - -rm -f $(DEPEND) - for d in $(TRGTDIRS);\ - do $(CC) $(CFLAGS) $(INCLUDE) -M $(ASRCS) $(CSRCS) | sed -e "s#^\(.*\).o:#$$d/objs/\1.o:#" >> $(DEPEND); \ - done - - -clean: - @rm -f $(patsubst %,%/objs/*.o,$(TRGTDIRS)) $(patsubst %,%/$(APP),$(TRGTDIRS)) - @rm -f $(DEPEND) mapfile - -.PHONY: printvars -printvars: - @$(foreach V,$(.VARIABLES), $(if $(filter-out environment% default automatic, $(origin $V)),$(warning $V=$($V)))) - -ifneq (clean,$(MAKECMDGOALS)) --include $(DEPEND) -endif diff --git a/tos/vmem_test/include/MCF5475.h b/tos/vmem_test/include/MCF5475.h deleted file mode 100644 index 5ab1750..0000000 --- a/tos/vmem_test/include/MCF5475.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_H__ -#define __MCF5475_H__ - -#include -/*** - * MCF5475 Derivative Memory map definitions from linker command files: - * __MBAR, __MMUBAR, __RAMBAR0, __RAMBAR0_SIZE, __RAMBAR1, __RAMBAR1_SIZE - * linker symbols must be defined in the linker command file. - */ - -typedef uint32_t __attribute__((__may_alias__)) uint32_t_a; /* a type to avoid gcc's complaints about pointer aliasing */ - -extern uint8_t _MBAR[]; -extern uint8_t _MMUBAR[]; -extern uint8_t _RAMBAR0[]; -extern uint8_t _RAMBAR0_SIZE[]; -extern uint8_t _RAMBAR1[]; -extern uint8_t _RAMBAR1_SIZE[]; - -#define MBAR_ADDRESS (uint32_t)_MBAR -#define MMUBAR_ADDRESS (uint32_t)_MMUBAR -#define RAMBAR0_ADDRESS (uint32_t)_RAMBAR0 -#define RAMBAR0_SIZE (uint32_t)_RAMBAR0_SIZE -#define RAMBAR1_ADDRESS (uint32_t)_RAMBAR1 -#define RAMBAR1_SIZE (uint32_t)_RAMBAR1_SIZE - - -#include "MCF5475_SIU.h" -#include "MCF5475_MMU.h" -#include "MCF5475_SDRAMC.h" -#include "MCF5475_XLB.h" -#include "MCF5475_CLOCK.h" -#include "MCF5475_FBCS.h" -#include "MCF5475_INTC.h" -#include "MCF5475_GPT.h" -#include "MCF5475_SLT.h" -#include "MCF5475_GPIO.h" -#include "MCF5475_PAD.h" -#include "MCF5475_PCI.h" -#include "MCF5475_PCIARB.h" -#include "MCF5475_EPORT.h" -#include "MCF5475_CTM.h" -#include "MCF5475_DMA.h" -#include "MCF5475_PSC.h" -#include "MCF5475_DSPI.h" -#include "MCF5475_I2C.h" -#include "MCF5475_FEC.h" -#include "MCF5475_USB.h" -#include "MCF5475_SRAM.h" -#include "MCF5475_SEC.h" - -#endif /* __MCF5475_H__ */ diff --git a/tos/vmem_test/include/MCF5475_CLOCK.h b/tos/vmem_test/include/MCF5475_CLOCK.h deleted file mode 100644 index 4603098..0000000 --- a/tos/vmem_test/include/MCF5475_CLOCK.h +++ /dev/null @@ -1,47 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_CLOCK_H__ -#define __MCF5475_CLOCK_H__ - - -/********************************************************************* -* -* Clock Module (CLOCK) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CLOCK_SPCR (*(volatile uint32_t*)(&_MBAR[0x300])) - - -/* Bit definitions and macros for MCF_CLOCK_SPCR */ -#define MCF_CLOCK_SPCR_MEMEN (0x1) -#define MCF_CLOCK_SPCR_PCIEN (0x2) -#define MCF_CLOCK_SPCR_FBEN (0x4) -#define MCF_CLOCK_SPCR_CAN0EN (0x8) -#define MCF_CLOCK_SPCR_DMAEN (0x10) -#define MCF_CLOCK_SPCR_FEC0EN (0x20) -#define MCF_CLOCK_SPCR_FEC1EN (0x40) -#define MCF_CLOCK_SPCR_USBEN (0x80) -#define MCF_CLOCK_SPCR_PSCEN (0x200) -#define MCF_CLOCK_SPCR_CAN1EN (0x800) -#define MCF_CLOCK_SPCR_CRYENA (0x1000) -#define MCF_CLOCK_SPCR_CRYENB (0x2000) -#define MCF_CLOCK_SPCR_COREN (0x4000) -#define MCF_CLOCK_SPCR_PLLK (0x80000000) - - -#endif /* __MCF5475_CLOCK_H__ */ diff --git a/tos/vmem_test/include/MCF5475_CTM.h b/tos/vmem_test/include/MCF5475_CTM.h deleted file mode 100644 index 5ba86e4..0000000 --- a/tos/vmem_test/include/MCF5475_CTM.h +++ /dev/null @@ -1,76 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_CTM_H__ -#define __MCF5475_CTM_H__ - - -/********************************************************************* -* -* Comm Timer Module (CTM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_CTM_CTCR0 (*(volatile uint32_t*)(&_MBAR[0x7F00])) -#define MCF_CTM_CTCR1 (*(volatile uint32_t*)(&_MBAR[0x7F04])) -#define MCF_CTM_CTCR2 (*(volatile uint32_t*)(&_MBAR[0x7F08])) -#define MCF_CTM_CTCR3 (*(volatile uint32_t*)(&_MBAR[0x7F0C])) -#define MCF_CTM_CTCR4 (*(volatile uint32_t*)(&_MBAR[0x7F10])) -#define MCF_CTM_CTCR5 (*(volatile uint32_t*)(&_MBAR[0x7F14])) -#define MCF_CTM_CTCR6 (*(volatile uint32_t*)(&_MBAR[0x7F18])) -#define MCF_CTM_CTCR7 (*(volatile uint32_t*)(&_MBAR[0x7F1C])) -#define MCF_CTM_CTCRF(x) (*(volatile uint32_t*)(&_MBAR[0x7F00 + ((x)*0x4)])) -#define MCF_CTM_CTCRV(x) (*(volatile uint32_t*)(&_MBAR[0x7F10 + ((x-4)*0x4)])) - - -/* Bit definitions and macros for MCF_CTM_CTCRF */ -#define MCF_CTM_CTCRF_CRV(x) (((x)&0xFFFF)<<0) -#define MCF_CTM_CTCRF_S(x) (((x)&0xF)<<0x10) -#define MCF_CTM_CTCRF_S_CLK_1 (0) -#define MCF_CTM_CTCRF_S_CLK_2 (0x10000) -#define MCF_CTM_CTCRF_S_CLK_4 (0x20000) -#define MCF_CTM_CTCRF_S_CLK_8 (0x30000) -#define MCF_CTM_CTCRF_S_CLK_16 (0x40000) -#define MCF_CTM_CTCRF_S_CLK_32 (0x50000) -#define MCF_CTM_CTCRF_S_CLK_64 (0x60000) -#define MCF_CTM_CTCRF_S_CLK_128 (0x70000) -#define MCF_CTM_CTCRF_S_CLK_256 (0x80000) -#define MCF_CTM_CTCRF_S_CLK_EXT (0x90000) -#define MCF_CTM_CTCRF_PCT(x) (((x)&0x7)<<0x14) -#define MCF_CTM_CTCRF_PCT_100 (0) -#define MCF_CTM_CTCRF_PCT_50 (0x100000) -#define MCF_CTM_CTCRF_PCT_25 (0x200000) -#define MCF_CTM_CTCRF_PCT_12p5 (0x300000) -#define MCF_CTM_CTCRF_PCT_6p25 (0x400000) -#define MCF_CTM_CTCRF_PCT_OFF (0x500000) -#define MCF_CTM_CTCRF_M (0x800000) -#define MCF_CTM_CTCRF_IM (0x1000000) -#define MCF_CTM_CTCRF_I (0x80000000) - -/* Bit definitions and macros for MCF_CTM_CTCRV */ -#define MCF_CTM_CTCRV_CRV(x) (((x)&0xFFFFFF)<<0) -#define MCF_CTM_CTCRV_PCT(x) (((x)&0x7)<<0x18) -#define MCF_CTM_CTCRV_PCT_100 (0) -#define MCF_CTM_CTCRV_PCT_50 (0x1000000) -#define MCF_CTM_CTCRV_PCT_25 (0x2000000) -#define MCF_CTM_CTCRV_PCT_12p5 (0x3000000) -#define MCF_CTM_CTCRV_PCT_6p25 (0x4000000) -#define MCF_CTM_CTCRV_PCT_OFF (0x5000000) -#define MCF_CTM_CTCRV_M (0x8000000) -#define MCF_CTM_CTCRV_S (0x10000000) - - -#endif /* __MCF5475_CTM_H__ */ diff --git a/tos/vmem_test/include/MCF5475_DMA.h b/tos/vmem_test/include/MCF5475_DMA.h deleted file mode 100644 index 4e6f916..0000000 --- a/tos/vmem_test/include/MCF5475_DMA.h +++ /dev/null @@ -1,234 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_DMA_H__ -#define __MCF5475_DMA_H__ - - -/********************************************************************* -* -* Multichannel DMA (DMA) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_DMA_TASKBAR (*(volatile uint32_t*)(&_MBAR[0x8000])) -#define MCF_DMA_CP (*(volatile uint32_t*)(&_MBAR[0x8004])) -#define MCF_DMA_EP (*(volatile uint32_t*)(&_MBAR[0x8008])) -#define MCF_DMA_VP (*(volatile uint32_t*)(&_MBAR[0x800C])) -#define MCF_DMA_PTD (*(volatile uint32_t*)(&_MBAR[0x8010])) -#define MCF_DMA_DIPR (*(volatile uint32_t*)(&_MBAR[0x8014])) -#define MCF_DMA_DIMR (*(volatile uint32_t*)(&_MBAR[0x8018])) -#define MCF_DMA_TCR0 (*(volatile uint16_t*)(&_MBAR[0x801C])) -#define MCF_DMA_TCR1 (*(volatile uint16_t*)(&_MBAR[0x801E])) -#define MCF_DMA_TCR2 (*(volatile uint16_t*)(&_MBAR[0x8020])) -#define MCF_DMA_TCR3 (*(volatile uint16_t*)(&_MBAR[0x8022])) -#define MCF_DMA_TCR4 (*(volatile uint16_t*)(&_MBAR[0x8024])) -#define MCF_DMA_TCR5 (*(volatile uint16_t*)(&_MBAR[0x8026])) -#define MCF_DMA_TCR6 (*(volatile uint16_t*)(&_MBAR[0x8028])) -#define MCF_DMA_TCR7 (*(volatile uint16_t*)(&_MBAR[0x802A])) -#define MCF_DMA_TCR8 (*(volatile uint16_t*)(&_MBAR[0x802C])) -#define MCF_DMA_TCR9 (*(volatile uint16_t*)(&_MBAR[0x802E])) -#define MCF_DMA_TCR10 (*(volatile uint16_t*)(&_MBAR[0x8030])) -#define MCF_DMA_TCR11 (*(volatile uint16_t*)(&_MBAR[0x8032])) -#define MCF_DMA_TCR12 (*(volatile uint16_t*)(&_MBAR[0x8034])) -#define MCF_DMA_TCR13 (*(volatile uint16_t*)(&_MBAR[0x8036])) -#define MCF_DMA_TCR14 (*(volatile uint16_t*)(&_MBAR[0x8038])) -#define MCF_DMA_TCR15 (*(volatile uint16_t*)(&_MBAR[0x803A])) -#define MCF_DMA_PRIOR0 (*(volatile uint8_t *)(&_MBAR[0x803C])) -#define MCF_DMA_PRIOR1 (*(volatile uint8_t *)(&_MBAR[0x803D])) -#define MCF_DMA_PRIOR2 (*(volatile uint8_t *)(&_MBAR[0x803E])) -#define MCF_DMA_PRIOR3 (*(volatile uint8_t *)(&_MBAR[0x803F])) -#define MCF_DMA_PRIOR4 (*(volatile uint8_t *)(&_MBAR[0x8040])) -#define MCF_DMA_PRIOR5 (*(volatile uint8_t *)(&_MBAR[0x8041])) -#define MCF_DMA_PRIOR6 (*(volatile uint8_t *)(&_MBAR[0x8042])) -#define MCF_DMA_PRIOR7 (*(volatile uint8_t *)(&_MBAR[0x8043])) -#define MCF_DMA_PRIOR8 (*(volatile uint8_t *)(&_MBAR[0x8044])) -#define MCF_DMA_PRIOR9 (*(volatile uint8_t *)(&_MBAR[0x8045])) -#define MCF_DMA_PRIOR10 (*(volatile uint8_t *)(&_MBAR[0x8046])) -#define MCF_DMA_PRIOR11 (*(volatile uint8_t *)(&_MBAR[0x8047])) -#define MCF_DMA_PRIOR12 (*(volatile uint8_t *)(&_MBAR[0x8048])) -#define MCF_DMA_PRIOR13 (*(volatile uint8_t *)(&_MBAR[0x8049])) -#define MCF_DMA_PRIOR14 (*(volatile uint8_t *)(&_MBAR[0x804A])) -#define MCF_DMA_PRIOR15 (*(volatile uint8_t *)(&_MBAR[0x804B])) -#define MCF_DMA_PRIOR16 (*(volatile uint8_t *)(&_MBAR[0x804C])) -#define MCF_DMA_PRIOR17 (*(volatile uint8_t *)(&_MBAR[0x804D])) -#define MCF_DMA_PRIOR18 (*(volatile uint8_t *)(&_MBAR[0x804E])) -#define MCF_DMA_PRIOR19 (*(volatile uint8_t *)(&_MBAR[0x804F])) -#define MCF_DMA_PRIOR20 (*(volatile uint8_t *)(&_MBAR[0x8050])) -#define MCF_DMA_PRIOR21 (*(volatile uint8_t *)(&_MBAR[0x8051])) -#define MCF_DMA_PRIOR22 (*(volatile uint8_t *)(&_MBAR[0x8052])) -#define MCF_DMA_PRIOR23 (*(volatile uint8_t *)(&_MBAR[0x8053])) -#define MCF_DMA_PRIOR24 (*(volatile uint8_t *)(&_MBAR[0x8054])) -#define MCF_DMA_PRIOR25 (*(volatile uint8_t *)(&_MBAR[0x8055])) -#define MCF_DMA_PRIOR26 (*(volatile uint8_t *)(&_MBAR[0x8056])) -#define MCF_DMA_PRIOR27 (*(volatile uint8_t *)(&_MBAR[0x8057])) -#define MCF_DMA_PRIOR28 (*(volatile uint8_t *)(&_MBAR[0x8058])) -#define MCF_DMA_PRIOR29 (*(volatile uint8_t *)(&_MBAR[0x8059])) -#define MCF_DMA_PRIOR30 (*(volatile uint8_t *)(&_MBAR[0x805A])) -#define MCF_DMA_PRIOR31 (*(volatile uint8_t *)(&_MBAR[0x805B])) -#define MCF_DMA_IMCR (*(volatile uint32_t*)(&_MBAR[0x805C])) -#define MCF_DMA_TSKSZ0 (*(volatile uint32_t*)(&_MBAR[0x8060])) -#define MCF_DMA_TSKSZ1 (*(volatile uint32_t*)(&_MBAR[0x8064])) -#define MCF_DMA_DBGCOMP0 (*(volatile uint32_t*)(&_MBAR[0x8070])) -#define MCF_DMA_DBGCOMP2 (*(volatile uint32_t*)(&_MBAR[0x8074])) -#define MCF_DMA_DBGCTL (*(volatile uint32_t*)(&_MBAR[0x8078])) -#define MCF_DMA_TCR(x) (*(volatile uint16_t*)(&_MBAR[0x801C + ((x)*0x2)])) -#define MCF_DMA_PRIOR(x) (*(volatile uint8_t *)(&_MBAR[0x803C + ((x)*0x1)])) - - -/* Bit definitions and macros for MCF_DMA_TASKBAR */ -#define MCF_DMA_TASKBAR_TASK_BASE_ADDRESS(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_CP */ -#define MCF_DMA_CP_DESCRIPTOR_POINTER(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_EP */ -#define MCF_DMA_EP_DESCRIPTOR_POINTER(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_VP */ -#define MCF_DMA_VP_VARIABLE_POINTER(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_PTD */ -#define MCF_DMA_PTD_PCTL0 (0x1) -#define MCF_DMA_PTD_PCTL1 (0x2) -#define MCF_DMA_PTD_PCTL13 (0x2000) -#define MCF_DMA_PTD_PCTL14 (0x4000) -#define MCF_DMA_PTD_PCTL15 (0x8000) - -/* Bit definitions and macros for MCF_DMA_DIPR */ -#define MCF_DMA_DIPR_TASK(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_DIMR */ -#define MCF_DMA_DIMR_TASK(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_TCR */ -#define MCF_DMA_TCR_ASTSKNUM(x) (((x)&0xF)<<0) -#define MCF_DMA_TCR_HLDINITNUM (0x20) -#define MCF_DMA_TCR_HIPRITSKEN (0x40) -#define MCF_DMA_TCR_ASTRT (0x80) -#define MCF_DMA_TCR_INITNUM(x) (((x)&0x1F)<<0x8) -#define MCF_DMA_TCR_ALWINIT (0x2000) -#define MCF_DMA_TCR_V (0x4000) -#define MCF_DMA_TCR_EN (0x8000) - -/* Bit definitions and macros for MCF_DMA_PRIOR */ -#define MCF_DMA_PRIOR_PRI(x) (((x)&0x7)<<0) -#define MCF_DMA_PRIOR_HLD (0x80) - -/* Bit definitions and macros for MCF_DMA_IMCR */ -#define MCF_DMA_IMCR_IMC16(x) (((x)&0x3)<<0) -#define MCF_DMA_IMCR_IMC17(x) (((x)&0x3)<<0x2) -#define MCF_DMA_IMCR_IMC18(x) (((x)&0x3)<<0x4) -#define MCF_DMA_IMCR_IMC19(x) (((x)&0x3)<<0x6) -#define MCF_DMA_IMCR_IMC20(x) (((x)&0x3)<<0x8) -#define MCF_DMA_IMCR_IMC21(x) (((x)&0x3)<<0xA) -#define MCF_DMA_IMCR_IMC22(x) (((x)&0x3)<<0xC) -#define MCF_DMA_IMCR_IMC23(x) (((x)&0x3)<<0xE) -#define MCF_DMA_IMCR_IMC24(x) (((x)&0x3)<<0x10) -#define MCF_DMA_IMCR_IMC25(x) (((x)&0x3)<<0x12) -#define MCF_DMA_IMCR_IMC26(x) (((x)&0x3)<<0x14) -#define MCF_DMA_IMCR_IMC27(x) (((x)&0x3)<<0x16) -#define MCF_DMA_IMCR_IMC28(x) (((x)&0x3)<<0x18) -#define MCF_DMA_IMCR_IMC29(x) (((x)&0x3)<<0x1A) -#define MCF_DMA_IMCR_IMC30(x) (((x)&0x3)<<0x1C) -#define MCF_DMA_IMCR_IMC31(x) (((x)&0x3)<<0x1E) - - -#define MCF_DMA_IMCR_IMC16_FEC0RX (0x00000000) -#define MCF_DMA_IMCR_IMC17_FEC0TX (0x00000000) -#define MCF_DMA_IMCR_IMC18_FEC0RX (0x00000020) -#define MCF_DMA_IMCR_IMC19_FEC0TX (0x00000080) -#define MCF_DMA_IMCR_IMC20_FEC1RX (0x00000100) -#define MCF_DMA_IMCR_IMC21_DREQ1 (0x00000000) -#define MCF_DMA_IMCR_IMC21_FEC1TX (0x00000400) -#define MCF_DMA_IMCR_IMC22_FEC0RX (0x00001000) -#define MCF_DMA_IMCR_IMC23_FEC0TX (0x00004000) -#define MCF_DMA_IMCR_IMC24_CTM0 (0x00010000) -#define MCF_DMA_IMCR_IMC24_FEC1RX (0x00020000) -#define MCF_DMA_IMCR_IMC25_CTM1 (0x00040000) -#define MCF_DMA_IMCR_IMC25_FEC1TX (0x00080000) -#define MCF_DMA_IMCR_IMC26_USBEP4 (0x00000000) -#define MCF_DMA_IMCR_IMC26_CTM2 (0x00200000) -#define MCF_DMA_IMCR_IMC27_USBEP5 (0x00000000) -#define MCF_DMA_IMCR_IMC27_CTM3 (0x00800000) -#define MCF_DMA_IMCR_IMC28_USBEP6 (0x00000000) -#define MCF_DMA_IMCR_IMC28_CTM4 (0x01000000) -#define MCF_DMA_IMCR_IMC28_DREQ1 (0x02000000) -#define MCF_DMA_IMCR_IMC28_PSC2RX (0x03000000) -#define MCF_DMA_IMCR_IMC29_DREQ1 (0x04000000) -#define MCF_DMA_IMCR_IMC29_CTM5 (0x08000000) -#define MCF_DMA_IMCR_IMC29_PSC2TX (0x0C000000) -#define MCF_DMA_IMCR_IMC30_FEC1RX (0x00000000) -#define MCF_DMA_IMCR_IMC30_CTM6 (0x10000000) -#define MCF_DMA_IMCR_IMC30_PSC3RX (0x30000000) -#define MCF_DMA_IMCR_IMC31_FEC1TX (0x00000000) -#define MCF_DMA_IMCR_IMC31_CTM7 (0x80000000) -#define MCF_DMA_IMCR_IMC31_PSC3TX (0xC0000000) - -/* Bit definitions and macros for MCF_DMA_TSKSZ0 */ -#define MCF_DMA_TSKSZ0_DSTSZ7(x) (((x)&0x3)<<0) -#define MCF_DMA_TSKSZ0_SRCSZ7(x) (((x)&0x3)<<0x2) -#define MCF_DMA_TSKSZ0_DSTSZ6(x) (((x)&0x3)<<0x4) -#define MCF_DMA_TSKSZ0_SRCSZ6(x) (((x)&0x3)<<0x6) -#define MCF_DMA_TSKSZ0_DSTSZ5(x) (((x)&0x3)<<0x8) -#define MCF_DMA_TSKSZ0_SRCSZ5(x) (((x)&0x3)<<0xA) -#define MCF_DMA_TSKSZ0_DSTSZ4(x) (((x)&0x3)<<0xC) -#define MCF_DMA_TSKSZ0_SRCSZ4(x) (((x)&0x3)<<0xE) -#define MCF_DMA_TSKSZ0_DSTSZ3(x) (((x)&0x3)<<0x10) -#define MCF_DMA_TSKSZ0_SRCSZ3(x) (((x)&0x3)<<0x12) -#define MCF_DMA_TSKSZ0_DSTSZ2(x) (((x)&0x3)<<0x14) -#define MCF_DMA_TSKSZ0_SRCSZ2(x) (((x)&0x3)<<0x16) -#define MCF_DMA_TSKSZ0_DSTSZ1(x) (((x)&0x3)<<0x18) -#define MCF_DMA_TSKSZ0_SRCSZ1(x) (((x)&0x3)<<0x1A) -#define MCF_DMA_TSKSZ0_DSTSZ0(x) (((x)&0x3)<<0x1C) -#define MCF_DMA_TSKSZ0_SRCSZ0(x) (((x)&0x3)<<0x1E) - -/* Bit definitions and macros for MCF_DMA_TSKSZ1 */ -#define MCF_DMA_TSKSZ1_DSTSZ15(x) (((x)&0x3)<<0) -#define MCF_DMA_TSKSZ1_SRCSZ15(x) (((x)&0x3)<<0x2) -#define MCF_DMA_TSKSZ1_DSTSZ14(x) (((x)&0x3)<<0x4) -#define MCF_DMA_TSKSZ1_SRCSZ14(x) (((x)&0x3)<<0x6) -#define MCF_DMA_TSKSZ1_DSTSZ13(x) (((x)&0x3)<<0x8) -#define MCF_DMA_TSKSZ1_SRCSZ13(x) (((x)&0x3)<<0xA) -#define MCF_DMA_TSKSZ1_DSTSZ12(x) (((x)&0x3)<<0xC) -#define MCF_DMA_TSKSZ1_SRCSZ12(x) (((x)&0x3)<<0xE) -#define MCF_DMA_TSKSZ1_DSTSZ11(x) (((x)&0x3)<<0x10) -#define MCF_DMA_TSKSZ1_SRCSZ11(x) (((x)&0x3)<<0x12) -#define MCF_DMA_TSKSZ1_DSTSZ10(x) (((x)&0x3)<<0x14) -#define MCF_DMA_TSKSZ1_SRCSZ10(x) (((x)&0x3)<<0x16) -#define MCF_DMA_TSKSZ1_DSTSZ9(x) (((x)&0x3)<<0x18) -#define MCF_DMA_TSKSZ1_SRCSZ9(x) (((x)&0x3)<<0x1A) -#define MCF_DMA_TSKSZ1_DSTSZ8(x) (((x)&0x3)<<0x1C) -#define MCF_DMA_TSKSZ1_SRCSZ8(x) (((x)&0x3)<<0x1E) - -/* Bit definitions and macros for MCF_DMA_DBGCOMP0 */ -#define MCF_DMA_DBGCOMP0_COMPARATOR_VALUE(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_DBGCOMP2 */ -#define MCF_DMA_DBGCOMP2_COMPARATOR_VALUE(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DMA_DBGCTL */ -#define MCF_DMA_DBGCTL_I (0x2) -#define MCF_DMA_DBGCTL_E (0x4) -#define MCF_DMA_DBGCTL_AND_OR (0x80) -#define MCF_DMA_DBGCTL_COMPARATOR_TYPE_2(x) (((x)&0x7)<<0x8) -#define MCF_DMA_DBGCTL_COMPARATOR_TYPE_1(x) (((x)&0x7)<<0xB) -#define MCF_DMA_DBGCTL_B (0x4000) -#define MCF_DMA_DBGCTL_AA (0x8000) -#define MCF_DMA_DBGCTL_BLOCK_TASKS(x) (((x)&0xFFFF)<<0x10) - - -#endif /* __MCF5475_DMA_H__ */ diff --git a/tos/vmem_test/include/MCF5475_DSPI.h b/tos/vmem_test/include/MCF5475_DSPI.h deleted file mode 100644 index 76cac28..0000000 --- a/tos/vmem_test/include/MCF5475_DSPI.h +++ /dev/null @@ -1,150 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_DSPI_H__ -#define __MCF5475_DSPI_H__ - - -/********************************************************************* -* -* DMA Serial Peripheral Interface (DSPI) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_DSPI_DMCR (*(volatile uint32_t*)(&_MBAR[0x8A00])) -#define MCF_DSPI_DTCR (*(volatile uint32_t*)(&_MBAR[0x8A08])) -#define MCF_DSPI_DCTAR0 (*(volatile uint32_t*)(&_MBAR[0x8A0C])) -#define MCF_DSPI_DCTAR1 (*(volatile uint32_t*)(&_MBAR[0x8A10])) -#define MCF_DSPI_DCTAR2 (*(volatile uint32_t*)(&_MBAR[0x8A14])) -#define MCF_DSPI_DCTAR3 (*(volatile uint32_t*)(&_MBAR[0x8A18])) -#define MCF_DSPI_DCTAR4 (*(volatile uint32_t*)(&_MBAR[0x8A1C])) -#define MCF_DSPI_DCTAR5 (*(volatile uint32_t*)(&_MBAR[0x8A20])) -#define MCF_DSPI_DCTAR6 (*(volatile uint32_t*)(&_MBAR[0x8A24])) -#define MCF_DSPI_DCTAR7 (*(volatile uint32_t*)(&_MBAR[0x8A28])) -#define MCF_DSPI_DSR (*(volatile uint32_t*)(&_MBAR[0x8A2C])) -#define MCF_DSPI_DIRSR (*(volatile uint32_t*)(&_MBAR[0x8A30])) -#define MCF_DSPI_DTFR (*(volatile uint32_t*)(&_MBAR[0x8A34])) -#define MCF_DSPI_DRFR (*(volatile uint32_t*)(&_MBAR[0x8A38])) -#define MCF_DSPI_DTFDR0 (*(volatile uint32_t*)(&_MBAR[0x8A3C])) -#define MCF_DSPI_DTFDR1 (*(volatile uint32_t*)(&_MBAR[0x8A40])) -#define MCF_DSPI_DTFDR2 (*(volatile uint32_t*)(&_MBAR[0x8A44])) -#define MCF_DSPI_DTFDR3 (*(volatile uint32_t*)(&_MBAR[0x8A48])) -#define MCF_DSPI_DRFDR0 (*(volatile uint32_t*)(&_MBAR[0x8A7C])) -#define MCF_DSPI_DRFDR1 (*(volatile uint32_t*)(&_MBAR[0x8A80])) -#define MCF_DSPI_DRFDR2 (*(volatile uint32_t*)(&_MBAR[0x8A84])) -#define MCF_DSPI_DRFDR3 (*(volatile uint32_t*)(&_MBAR[0x8A88])) -#define MCF_DSPI_DCTAR(x) (*(volatile uint32_t*)(&_MBAR[0x8A0C + ((x)*0x4)])) -#define MCF_DSPI_DTFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8A3C + ((x)*0x4)])) -#define MCF_DSPI_DRFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8A7C + ((x)*0x4)])) - - -/* Bit definitions and macros for MCF_DSPI_DMCR */ -#define MCF_DSPI_DMCR_HALT (0x1) -#define MCF_DSPI_DMCR_SMPL_PT(x) (((x)&0x3)<<0x8) -#define MCF_DSPI_DMCR_SMPL_PT_0CLK (0) -#define MCF_DSPI_DMCR_SMPL_PT_1CLK (0x100) -#define MCF_DSPI_DMCR_SMPL_PT_2CLK (0x200) -#define MCF_DSPI_DMCR_CRXF (0x400) -#define MCF_DSPI_DMCR_CTXF (0x800) -#define MCF_DSPI_DMCR_DRXF (0x1000) -#define MCF_DSPI_DMCR_DTXF (0x2000) -#define MCF_DSPI_DMCR_CSIS0 (0x10000) -#define MCF_DSPI_DMCR_CSIS2 (0x40000) -#define MCF_DSPI_DMCR_CSIS3 (0x80000) -#define MCF_DSPI_DMCR_CSIS5 (0x200000) -#define MCF_DSPI_DMCR_ROOE (0x1000000) -#define MCF_DSPI_DMCR_PCSSE (0x2000000) -#define MCF_DSPI_DMCR_MTFE (0x4000000) -#define MCF_DSPI_DMCR_FRZ (0x8000000) -#define MCF_DSPI_DMCR_DCONF(x) (((x)&0x3)<<0x1C) -#define MCF_DSPI_DMCR_CSCK (0x40000000) -#define MCF_DSPI_DMCR_MSTR (0x80000000) - -/* Bit definitions and macros for MCF_DSPI_DTCR */ -#define MCF_DSPI_DTCR_SPI_TCNT(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_DSPI_DCTAR */ -#define MCF_DSPI_DCTAR_BR(x) (((x)&0xF)<<0) -#define MCF_DSPI_DCTAR_DT(x) (((x)&0xF)<<0x4) -#define MCF_DSPI_DCTAR_ASC(x) (((x)&0xF)<<0x8) -#define MCF_DSPI_DCTAR_CSSCK(x) (((x)&0xF)<<0xC) -#define MCF_DSPI_DCTAR_PBR(x) (((x)&0x3)<<0x10) -#define MCF_DSPI_DCTAR_PBR_1CLK (0) -#define MCF_DSPI_DCTAR_PBR_3CLK (0x10000) -#define MCF_DSPI_DCTAR_PBR_5CLK (0x20000) -#define MCF_DSPI_DCTAR_PBR_7CLK (0x30000) -#define MCF_DSPI_DCTAR_PDT(x) (((x)&0x3)<<0x12) -#define MCF_DSPI_DCTAR_PDT_1CLK (0) -#define MCF_DSPI_DCTAR_PDT_3CLK (0x40000) -#define MCF_DSPI_DCTAR_PDT_5CLK (0x80000) -#define MCF_DSPI_DCTAR_PDT_7CLK (0xC0000) -#define MCF_DSPI_DCTAR_PASC(x) (((x)&0x3)<<0x14) -#define MCF_DSPI_DCTAR_PASC_1CLK (0) -#define MCF_DSPI_DCTAR_PASC_3CLK (0x100000) -#define MCF_DSPI_DCTAR_PASC_5CLK (0x200000) -#define MCF_DSPI_DCTAR_PASC_7CLK (0x300000) -#define MCF_DSPI_DCTAR_PCSSCK(x) (((x)&0x3)<<0x16) -#define MCF_DSPI_DCTAR_LSBFE (0x1000000) -#define MCF_DSPI_DCTAR_CPHA (0x2000000) -#define MCF_DSPI_DCTAR_CPOL (0x4000000) -#define MCF_DSPI_DCTAR_TRSZ(x) (((x)&0xF)<<0x1B) - -/* Bit definitions and macros for MCF_DSPI_DSR */ -#define MCF_DSPI_DSR_RXPTR(x) (((x)&0xF)<<0) -#define MCF_DSPI_DSR_RXCTR(x) (((x)&0xF)<<0x4) -#define MCF_DSPI_DSR_TXPTR(x) (((x)&0xF)<<0x8) -#define MCF_DSPI_DSR_TXCTR(x) (((x)&0xF)<<0xC) -#define MCF_DSPI_DSR_RFDF (0x20000) -#define MCF_DSPI_DSR_RFOF (0x80000) -#define MCF_DSPI_DSR_TFFF (0x2000000) -#define MCF_DSPI_DSR_TFUF (0x8000000) -#define MCF_DSPI_DSR_EOQF (0x10000000) -#define MCF_DSPI_DSR_TXRXS (0x40000000) -#define MCF_DSPI_DSR_TCF (0x80000000) - -/* Bit definitions and macros for MCF_DSPI_DIRSR */ -#define MCF_DSPI_DIRSR_RFDFS (0x10000) -#define MCF_DSPI_DIRSR_RFDFE (0x20000) -#define MCF_DSPI_DIRSR_RFOFE (0x80000) -#define MCF_DSPI_DIRSR_TFFFS (0x1000000) -#define MCF_DSPI_DIRSR_TFFFE (0x2000000) -#define MCF_DSPI_DIRSR_TFUFE (0x8000000) -#define MCF_DSPI_DIRSR_EOQFE (0x10000000) -#define MCF_DSPI_DIRSR_TCFE (0x80000000) - -/* Bit definitions and macros for MCF_DSPI_DTFR */ -#define MCF_DSPI_DTFR_TXDATA(x) (((x)&0xFFFF)<<0) -#define MCF_DSPI_DTFR_CS0 (0x10000) -#define MCF_DSPI_DTFR_CS2 (0x40000) -#define MCF_DSPI_DTFR_CS3 (0x80000) -#define MCF_DSPI_DTFR_CS5 (0x200000) -#define MCF_DSPI_DTFR_CTCNT (0x4000000) -#define MCF_DSPI_DTFR_EOQ (0x8000000) -#define MCF_DSPI_DTFR_CTAS(x) (((x)&0x7)<<0x1C) -#define MCF_DSPI_DTFR_CONT (0x80000000) - -/* Bit definitions and macros for MCF_DSPI_DRFR */ -#define MCF_DSPI_DRFR_RXDATA(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_DSPI_DTFDR */ -#define MCF_DSPI_DTFDR_TXDATA(x) (((x)&0xFFFF)<<0) -#define MCF_DSPI_DTFDR_TXCMD(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_DSPI_DRFDR */ -#define MCF_DSPI_DRFDR_RXDATA(x) (((x)&0xFFFF)<<0) - - -#endif /* __MCF5475_DSPI_H__ */ diff --git a/tos/vmem_test/include/MCF5475_EPORT.h b/tos/vmem_test/include/MCF5475_EPORT.h deleted file mode 100644 index 6506196..0000000 --- a/tos/vmem_test/include/MCF5475_EPORT.h +++ /dev/null @@ -1,123 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_EPORT_H__ -#define __MCF5475_EPORT_H__ - - -/********************************************************************* -* -* Edge Port Module (EPORT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_EPORT_EPPAR (*(volatile uint16_t*)(&_MBAR[0xF00])) -#define MCF_EPORT_EPDDR (*(volatile uint8_t *)(&_MBAR[0xF04])) -#define MCF_EPORT_EPIER (*(volatile uint8_t *)(&_MBAR[0xF05])) -#define MCF_EPORT_EPDR (*(volatile uint8_t *)(&_MBAR[0xF08])) -#define MCF_EPORT_EPPDR (*(volatile uint8_t *)(&_MBAR[0xF09])) -#define MCF_EPORT_EPFR (*(volatile uint8_t *)(&_MBAR[0xF0C])) - - - -/* Bit definitions and macros for MCF_EPORT_EPPAR */ -#define MCF_EPORT_EPPAR_EPPA1(x) (((x)&0x3)<<0x2) -#define MCF_EPORT_EPPAR_EPPA1_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA1_RISING (0x4) -#define MCF_EPORT_EPPAR_EPPA1_FALLING (0x8) -#define MCF_EPORT_EPPAR_EPPA1_BOTH (0xC) -#define MCF_EPORT_EPPAR_EPPA2(x) (((x)&0x3)<<0x4) -#define MCF_EPORT_EPPAR_EPPA2_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA2_RISING (0x10) -#define MCF_EPORT_EPPAR_EPPA2_FALLING (0x20) -#define MCF_EPORT_EPPAR_EPPA2_BOTH (0x30) -#define MCF_EPORT_EPPAR_EPPA3(x) (((x)&0x3)<<0x6) -#define MCF_EPORT_EPPAR_EPPA3_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA3_RISING (0x40) -#define MCF_EPORT_EPPAR_EPPA3_FALLING (0x80) -#define MCF_EPORT_EPPAR_EPPA3_BOTH (0xC0) -#define MCF_EPORT_EPPAR_EPPA4(x) (((x)&0x3)<<0x8) -#define MCF_EPORT_EPPAR_EPPA4_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA4_RISING (0x100) -#define MCF_EPORT_EPPAR_EPPA4_FALLING (0x200) -#define MCF_EPORT_EPPAR_EPPA4_BOTH (0x300) -#define MCF_EPORT_EPPAR_EPPA5(x) (((x)&0x3)<<0xA) -#define MCF_EPORT_EPPAR_EPPA5_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA5_RISING (0x400) -#define MCF_EPORT_EPPAR_EPPA5_FALLING (0x800) -#define MCF_EPORT_EPPAR_EPPA5_BOTH (0xC00) -#define MCF_EPORT_EPPAR_EPPA6(x) (((x)&0x3)<<0xC) -#define MCF_EPORT_EPPAR_EPPA6_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA6_RISING (0x1000) -#define MCF_EPORT_EPPAR_EPPA6_FALLING (0x2000) -#define MCF_EPORT_EPPAR_EPPA6_BOTH (0x3000) -#define MCF_EPORT_EPPAR_EPPA7(x) (((x)&0x3)<<0xE) -#define MCF_EPORT_EPPAR_EPPA7_LEVEL (0) -#define MCF_EPORT_EPPAR_EPPA7_RISING (0x4000) -#define MCF_EPORT_EPPAR_EPPA7_FALLING (0x8000) -#define MCF_EPORT_EPPAR_EPPA7_BOTH (0xC000) -#define MCF_EPORT_EPPAR_LEVEL (0) -#define MCF_EPORT_EPPAR_RISING (0x1) -#define MCF_EPORT_EPPAR_FALLING (0x2) -#define MCF_EPORT_EPPAR_BOTH (0x3) - -/* Bit definitions and macros for MCF_EPORT_EPDDR */ -#define MCF_EPORT_EPDDR_EPDD1 (0x2) -#define MCF_EPORT_EPDDR_EPDD2 (0x4) -#define MCF_EPORT_EPDDR_EPDD3 (0x8) -#define MCF_EPORT_EPDDR_EPDD4 (0x10) -#define MCF_EPORT_EPDDR_EPDD5 (0x20) -#define MCF_EPORT_EPDDR_EPDD6 (0x40) -#define MCF_EPORT_EPDDR_EPDD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPIER */ -#define MCF_EPORT_EPIER_EPIE1 (0x2) -#define MCF_EPORT_EPIER_EPIE2 (0x4) -#define MCF_EPORT_EPIER_EPIE3 (0x8) -#define MCF_EPORT_EPIER_EPIE4 (0x10) -#define MCF_EPORT_EPIER_EPIE5 (0x20) -#define MCF_EPORT_EPIER_EPIE6 (0x40) -#define MCF_EPORT_EPIER_EPIE7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPDR */ -#define MCF_EPORT_EPDR_EPD1 (0x2) -#define MCF_EPORT_EPDR_EPD2 (0x4) -#define MCF_EPORT_EPDR_EPD3 (0x8) -#define MCF_EPORT_EPDR_EPD4 (0x10) -#define MCF_EPORT_EPDR_EPD5 (0x20) -#define MCF_EPORT_EPDR_EPD6 (0x40) -#define MCF_EPORT_EPDR_EPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPPDR */ -#define MCF_EPORT_EPPDR_EPPD1 (0x2) -#define MCF_EPORT_EPPDR_EPPD2 (0x4) -#define MCF_EPORT_EPPDR_EPPD3 (0x8) -#define MCF_EPORT_EPPDR_EPPD4 (0x10) -#define MCF_EPORT_EPPDR_EPPD5 (0x20) -#define MCF_EPORT_EPPDR_EPPD6 (0x40) -#define MCF_EPORT_EPPDR_EPPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPFR */ -#define MCF_EPORT_EPFR_EPF1 (0x2) -#define MCF_EPORT_EPFR_EPF2 (0x4) -#define MCF_EPORT_EPFR_EPF3 (0x8) -#define MCF_EPORT_EPFR_EPF4 (0x10) -#define MCF_EPORT_EPFR_EPF5 (0x20) -#define MCF_EPORT_EPFR_EPF6 (0x40) -#define MCF_EPORT_EPFR_EPF7 (0x80) - - -#endif /* __MCF5475_EPORT_H__ */ diff --git a/tos/vmem_test/include/MCF5475_FBCS.h b/tos/vmem_test/include/MCF5475_FBCS.h deleted file mode 100644 index 37daf00..0000000 --- a/tos/vmem_test/include/MCF5475_FBCS.h +++ /dev/null @@ -1,100 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_FBCS_H__ -#define __MCF5475_FBCS_H__ - - -/********************************************************************* -* -* FlexBus Chip Select Module (FBCS) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FBCS0_CSAR (*(volatile uint32_t*)(&_MBAR[0x500])) -#define MCF_FBCS0_CSMR (*(volatile uint32_t*)(&_MBAR[0x504])) -#define MCF_FBCS0_CSCR (*(volatile uint32_t*)(&_MBAR[0x508])) - -#define MCF_FBCS1_CSAR (*(volatile uint32_t*)(&_MBAR[0x50C])) -#define MCF_FBCS1_CSMR (*(volatile uint32_t*)(&_MBAR[0x510])) -#define MCF_FBCS1_CSCR (*(volatile uint32_t*)(&_MBAR[0x514])) - -#define MCF_FBCS2_CSAR (*(volatile uint32_t*)(&_MBAR[0x518])) -#define MCF_FBCS2_CSMR (*(volatile uint32_t*)(&_MBAR[0x51C])) -#define MCF_FBCS2_CSCR (*(volatile uint32_t*)(&_MBAR[0x520])) - -#define MCF_FBCS3_CSAR (*(volatile uint32_t*)(&_MBAR[0x524])) -#define MCF_FBCS3_CSMR (*(volatile uint32_t*)(&_MBAR[0x528])) -#define MCF_FBCS3_CSCR (*(volatile uint32_t*)(&_MBAR[0x52C])) - -#define MCF_FBCS4_CSAR (*(volatile uint32_t*)(&_MBAR[0x530])) -#define MCF_FBCS4_CSMR (*(volatile uint32_t*)(&_MBAR[0x534])) -#define MCF_FBCS4_CSCR (*(volatile uint32_t*)(&_MBAR[0x538])) - -#define MCF_FBCS5_CSAR (*(volatile uint32_t*)(&_MBAR[0x53C])) -#define MCF_FBCS5_CSMR (*(volatile uint32_t*)(&_MBAR[0x540])) -#define MCF_FBCS5_CSCR (*(volatile uint32_t*)(&_MBAR[0x544])) - -#define MCF_FBCS_CSAR(x) (*(volatile uint32_t*)(&_MBAR[0x500 + ((x)*0xC)])) -#define MCF_FBCS_CSMR(x) (*(volatile uint32_t*)(&_MBAR[0x504 + ((x)*0xC)])) -#define MCF_FBCS_CSCR(x) (*(volatile uint32_t*)(&_MBAR[0x508 + ((x)*0xC)])) - - -/* Bit definitions and macros for MCF_FBCS_CSAR */ -#define MCF_FBCS_CSAR_BA(x) ((x)&0xFFFF0000) - -/* Bit definitions and macros for MCF_FBCS_CSMR */ -#define MCF_FBCS_CSMR_V (0x1) -#define MCF_FBCS_CSMR_WP (0x100) -#define MCF_FBCS_CSMR_BAM(x) (((x)&0xFFFF)<<0x10) -#define MCF_FBCS_CSMR_BAM_4G (0xFFFF0000) -#define MCF_FBCS_CSMR_BAM_2G (0x7FFF0000) -#define MCF_FBCS_CSMR_BAM_1G (0x3FFF0000) -#define MCF_FBCS_CSMR_BAM_1024M (0x3FFF0000) -#define MCF_FBCS_CSMR_BAM_512M (0x1FFF0000) -#define MCF_FBCS_CSMR_BAM_256M (0xFFF0000) -#define MCF_FBCS_CSMR_BAM_128M (0x7FF0000) -#define MCF_FBCS_CSMR_BAM_64M (0x3FF0000) -#define MCF_FBCS_CSMR_BAM_32M (0x1FF0000) -#define MCF_FBCS_CSMR_BAM_16M (0xFF0000) -#define MCF_FBCS_CSMR_BAM_8M (0x7F0000) -#define MCF_FBCS_CSMR_BAM_4M (0x3F0000) -#define MCF_FBCS_CSMR_BAM_2M (0x1F0000) -#define MCF_FBCS_CSMR_BAM_1M (0xF0000) -#define MCF_FBCS_CSMR_BAM_1024K (0xF0000) -#define MCF_FBCS_CSMR_BAM_512K (0x70000) -#define MCF_FBCS_CSMR_BAM_256K (0x30000) -#define MCF_FBCS_CSMR_BAM_128K (0x10000) -#define MCF_FBCS_CSMR_BAM_64K (0) - -/* Bit definitions and macros for MCF_FBCS_CSCR */ -#define MCF_FBCS_CSCR_BSTW (0x8) -#define MCF_FBCS_CSCR_BSTR (0x10) -#define MCF_FBCS_CSCR_BEM (0x20) -#define MCF_FBCS_CSCR_PS(x) (((x)&0x3)<<0x6) -#define MCF_FBCS_CSCR_PS_32 (0) -#define MCF_FBCS_CSCR_PS_8 (0x40) -#define MCF_FBCS_CSCR_PS_16 (0x80) -#define MCF_FBCS_CSCR_AA (0x100) -#define MCF_FBCS_CSCR_WS(x) (((x)&0x3F)<<0xA) -#define MCF_FBCS_CSCR_WRAH(x) (((x)&0x3)<<0x10) -#define MCF_FBCS_CSCR_RDAH(x) (((x)&0x3)<<0x12) -#define MCF_FBCS_CSCR_ASET(x) (((x)&0x3)<<0x14) -#define MCF_FBCS_CSCR_SWSEN (0x800000) -#define MCF_FBCS_CSCR_SWS(x) (((x)&0x3F)<<0x1A) - - -#endif /* __MCF5475_FBCS_H__ */ diff --git a/tos/vmem_test/include/MCF5475_FEC.h b/tos/vmem_test/include/MCF5475_FEC.h deleted file mode 100644 index fdd9403..0000000 --- a/tos/vmem_test/include/MCF5475_FEC.h +++ /dev/null @@ -1,680 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_FEC_H__ -#define __MCF5475_FEC_H__ - - -/********************************************************************* -* -* Fast Ethernet Controller(FEC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_FEC0_EIR (*(volatile uint32_t*)(&_MBAR[0x9004])) -#define MCF_FEC0_EIMR (*(volatile uint32_t*)(&_MBAR[0x9008])) -#define MCF_FEC0_ECR (*(volatile uint32_t*)(&_MBAR[0x9024])) -#define MCF_FEC0_MMFR (*(volatile uint32_t*)(&_MBAR[0x9040])) -#define MCF_FEC0_MSCR (*(volatile uint32_t*)(&_MBAR[0x9044])) -#define MCF_FEC0_MIBC (*(volatile uint32_t*)(&_MBAR[0x9064])) -#define MCF_FEC0_RCR (*(volatile uint32_t*)(&_MBAR[0x9084])) -#define MCF_FEC0_RHR (*(volatile uint32_t*)(&_MBAR[0x9088])) -#define MCF_FEC0_TCR (*(volatile uint32_t*)(&_MBAR[0x90C4])) -#define MCF_FEC0_PALR (*(volatile uint32_t*)(&_MBAR[0x90E4])) -#define MCF_FEC0_PAHR (*(volatile uint32_t*)(&_MBAR[0x90E8])) -#define MCF_FEC0_OPD (*(volatile uint32_t*)(&_MBAR[0x90EC])) -#define MCF_FEC0_IAUR (*(volatile uint32_t*)(&_MBAR[0x9118])) -#define MCF_FEC0_IALR (*(volatile uint32_t*)(&_MBAR[0x911C])) -#define MCF_FEC0_GAUR (*(volatile uint32_t*)(&_MBAR[0x9120])) -#define MCF_FEC0_GALR (*(volatile uint32_t*)(&_MBAR[0x9124])) -#define MCF_FEC0_FECTFWR (*(volatile uint32_t*)(&_MBAR[0x9144])) -#define MCF_FEC0_FECRFDR (*(volatile uint32_t*)(&_MBAR[0x9184])) -#define MCF_FEC0_FECRFSR (*(volatile uint32_t*)(&_MBAR[0x9188])) -#define MCF_FEC0_FECRFCR (*(volatile uint32_t*)(&_MBAR[0x918C])) -#define MCF_FEC0_FECRLRFP (*(volatile uint32_t*)(&_MBAR[0x9190])) -#define MCF_FEC0_FECRLWFP (*(volatile uint32_t*)(&_MBAR[0x9194])) -#define MCF_FEC0_FECRFAR (*(volatile uint32_t*)(&_MBAR[0x9198])) -#define MCF_FEC0_FECRFRP (*(volatile uint32_t*)(&_MBAR[0x919C])) -#define MCF_FEC0_FECRFWP (*(volatile uint32_t*)(&_MBAR[0x91A0])) -#define MCF_FEC0_FECTFDR (*(volatile uint32_t*)(&_MBAR[0x91A4])) -#define MCF_FEC0_FECTFSR (*(volatile uint32_t*)(&_MBAR[0x91A8])) -#define MCF_FEC0_FECTFCR (*(volatile uint32_t*)(&_MBAR[0x91AC])) -#define MCF_FEC0_FECTLRFP (*(volatile uint32_t*)(&_MBAR[0x91B0])) -#define MCF_FEC0_FECTLWFP (*(volatile uint32_t*)(&_MBAR[0x91B4])) -#define MCF_FEC0_FECTFAR (*(volatile uint32_t*)(&_MBAR[0x91B8])) -#define MCF_FEC0_FECTFRP (*(volatile uint32_t*)(&_MBAR[0x91BC])) -#define MCF_FEC0_FECTFWP (*(volatile uint32_t*)(&_MBAR[0x91C0])) -#define MCF_FEC0_FECFRST (*(volatile uint32_t*)(&_MBAR[0x91C4])) -#define MCF_FEC0_FECCTCWR (*(volatile uint32_t*)(&_MBAR[0x91C8])) -#define MCF_FEC0_RMON_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9200])) -#define MCF_FEC0_RMON_T_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9204])) -#define MCF_FEC0_RMON_T_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9208])) -#define MCF_FEC0_RMON_T_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x920C])) -#define MCF_FEC0_RMON_T_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9210])) -#define MCF_FEC0_RMON_T_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9214])) -#define MCF_FEC0_RMON_T_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9218])) -#define MCF_FEC0_RMON_T_FRAG (*(volatile uint32_t*)(&_MBAR[0x921C])) -#define MCF_FEC0_RMON_T_JAB (*(volatile uint32_t*)(&_MBAR[0x9220])) -#define MCF_FEC0_RMON_T_COL (*(volatile uint32_t*)(&_MBAR[0x9224])) -#define MCF_FEC0_RMON_T_P64 (*(volatile uint32_t*)(&_MBAR[0x9228])) -#define MCF_FEC0_RMON_T_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x922C])) -#define MCF_FEC0_RMON_T_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x9230])) -#define MCF_FEC0_RMON_T_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x9234])) -#define MCF_FEC0_RMON_T_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x9238])) -#define MCF_FEC0_RMON_T_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x923C])) -#define MCF_FEC0_RMON_T_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x9240])) -#define MCF_FEC0_RMON_T_OCTETS (*(volatile uint32_t*)(&_MBAR[0x9244])) -#define MCF_FEC0_IEEE_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9248])) -#define MCF_FEC0_IEEE_T_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x924C])) -#define MCF_FEC0_IEEE_T_1COL (*(volatile uint32_t*)(&_MBAR[0x9250])) -#define MCF_FEC0_IEEE_T_MCOL (*(volatile uint32_t*)(&_MBAR[0x9254])) -#define MCF_FEC0_IEEE_T_DEF (*(volatile uint32_t*)(&_MBAR[0x9258])) -#define MCF_FEC0_IEEE_T_LCOL (*(volatile uint32_t*)(&_MBAR[0x925C])) -#define MCF_FEC0_IEEE_T_EXCOL (*(volatile uint32_t*)(&_MBAR[0x9260])) -#define MCF_FEC0_IEEE_T_MACERR (*(volatile uint32_t*)(&_MBAR[0x9264])) -#define MCF_FEC0_IEEE_T_CSERR (*(volatile uint32_t*)(&_MBAR[0x9268])) -#define MCF_FEC0_IEEE_T_SQE (*(volatile uint32_t*)(&_MBAR[0x926C])) -#define MCF_FEC0_IEEE_T_FDXFC (*(volatile uint32_t*)(&_MBAR[0x9270])) -#define MCF_FEC0_IEEE_T_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x9274])) -#define MCF_FEC0_RMON_R_DROP (*(volatile uint32_t*)(&_MBAR[0x9280])) -#define MCF_FEC0_RMON_R_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9284])) -#define MCF_FEC0_RMON_R_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9288])) -#define MCF_FEC0_RMON_R_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x928C])) -#define MCF_FEC0_RMON_R_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9290])) -#define MCF_FEC0_RMON_R_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9294])) -#define MCF_FEC0_RMON_R_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9298])) -#define MCF_FEC0_RMON_R_FRAG (*(volatile uint32_t*)(&_MBAR[0x929C])) -#define MCF_FEC0_RMON_R_JAB (*(volatile uint32_t*)(&_MBAR[0x92A0])) -#define MCF_FEC0_RMON_R_RESVD_0 (*(volatile uint32_t*)(&_MBAR[0x92A4])) -#define MCF_FEC0_RMON_R_P64 (*(volatile uint32_t*)(&_MBAR[0x92A8])) -#define MCF_FEC0_RMON_R_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x92AC])) -#define MCF_FEC0_RMON_R_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x92B0])) -#define MCF_FEC0_RMON_R_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x92B4])) -#define MCF_FEC0_RMON_R_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x92B8])) -#define MCF_FEC0_RMON_R_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x92BC])) -#define MCF_FEC0_RMON_R_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x92C0])) -#define MCF_FEC0_RMON_R_OCTETS (*(volatile uint32_t*)(&_MBAR[0x92C4])) -#define MCF_FEC0_IEEE_R_DROP (*(volatile uint32_t*)(&_MBAR[0x92C8])) -#define MCF_FEC0_IEEE_R_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x92CC])) -#define MCF_FEC0_IEEE_R_CRC (*(volatile uint32_t*)(&_MBAR[0x92D0])) -#define MCF_FEC0_IEEE_R_ALIGN (*(volatile uint32_t*)(&_MBAR[0x92D4])) -#define MCF_FEC0_IEEE_R_MACERR (*(volatile uint32_t*)(&_MBAR[0x92D8])) -#define MCF_FEC0_IEEE_R_FDXFC (*(volatile uint32_t*)(&_MBAR[0x92DC])) -#define MCF_FEC0_IEEE_R_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x92E0])) - -#define MCF_FEC1_EIR (*(volatile uint32_t*)(&_MBAR[0x9804])) -#define MCF_FEC1_EIMR (*(volatile uint32_t*)(&_MBAR[0x9808])) -#define MCF_FEC1_ECR (*(volatile uint32_t*)(&_MBAR[0x9824])) -#define MCF_FEC1_MMFR (*(volatile uint32_t*)(&_MBAR[0x9840])) -#define MCF_FEC1_MSCR (*(volatile uint32_t*)(&_MBAR[0x9844])) -#define MCF_FEC1_MIBC (*(volatile uint32_t*)(&_MBAR[0x9864])) -#define MCF_FEC1_RCR (*(volatile uint32_t*)(&_MBAR[0x9884])) -#define MCF_FEC1_RHR (*(volatile uint32_t*)(&_MBAR[0x9888])) -#define MCF_FEC1_TCR (*(volatile uint32_t*)(&_MBAR[0x98C4])) -#define MCF_FEC1_PALR (*(volatile uint32_t*)(&_MBAR[0x98E4])) -#define MCF_FEC1_PAHR (*(volatile uint32_t*)(&_MBAR[0x98E8])) -#define MCF_FEC1_OPD (*(volatile uint32_t*)(&_MBAR[0x98EC])) -#define MCF_FEC1_IAUR (*(volatile uint32_t*)(&_MBAR[0x9918])) -#define MCF_FEC1_IALR (*(volatile uint32_t*)(&_MBAR[0x991C])) -#define MCF_FEC1_GAUR (*(volatile uint32_t*)(&_MBAR[0x9920])) -#define MCF_FEC1_GALR (*(volatile uint32_t*)(&_MBAR[0x9924])) -#define MCF_FEC1_FECTFWR (*(volatile uint32_t*)(&_MBAR[0x9944])) -#define MCF_FEC1_FECRFDR (*(volatile uint32_t*)(&_MBAR[0x9984])) -#define MCF_FEC1_FECRFSR (*(volatile uint32_t*)(&_MBAR[0x9988])) -#define MCF_FEC1_FECRFCR (*(volatile uint32_t*)(&_MBAR[0x998C])) -#define MCF_FEC1_FECRLRFP (*(volatile uint32_t*)(&_MBAR[0x9990])) -#define MCF_FEC1_FECRLWFP (*(volatile uint32_t*)(&_MBAR[0x9994])) -#define MCF_FEC1_FECRFAR (*(volatile uint32_t*)(&_MBAR[0x9998])) -#define MCF_FEC1_FECRFRP (*(volatile uint32_t*)(&_MBAR[0x999C])) -#define MCF_FEC1_FECRFWP (*(volatile uint32_t*)(&_MBAR[0x99A0])) -#define MCF_FEC1_FECTFDR (*(volatile uint32_t*)(&_MBAR[0x99A4])) -#define MCF_FEC1_FECTFSR (*(volatile uint32_t*)(&_MBAR[0x99A8])) -#define MCF_FEC1_FECTFCR (*(volatile uint32_t*)(&_MBAR[0x99AC])) -#define MCF_FEC1_FECTLRFP (*(volatile uint32_t*)(&_MBAR[0x99B0])) -#define MCF_FEC1_FECTLWFP (*(volatile uint32_t*)(&_MBAR[0x99B4])) -#define MCF_FEC1_FECTFAR (*(volatile uint32_t*)(&_MBAR[0x99B8])) -#define MCF_FEC1_FECTFRP (*(volatile uint32_t*)(&_MBAR[0x99BC])) -#define MCF_FEC1_FECTFWP (*(volatile uint32_t*)(&_MBAR[0x99C0])) -#define MCF_FEC1_FECFRST (*(volatile uint32_t*)(&_MBAR[0x99C4])) -#define MCF_FEC1_FECCTCWR (*(volatile uint32_t*)(&_MBAR[0x99C8])) -#define MCF_FEC1_RMON_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9A00])) -#define MCF_FEC1_RMON_T_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9A04])) -#define MCF_FEC1_RMON_T_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A08])) -#define MCF_FEC1_RMON_T_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A0C])) -#define MCF_FEC1_RMON_T_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9A10])) -#define MCF_FEC1_RMON_T_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A14])) -#define MCF_FEC1_RMON_T_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A18])) -#define MCF_FEC1_RMON_T_FRAG (*(volatile uint32_t*)(&_MBAR[0x9A1C])) -#define MCF_FEC1_RMON_T_JAB (*(volatile uint32_t*)(&_MBAR[0x9A20])) -#define MCF_FEC1_RMON_T_COL (*(volatile uint32_t*)(&_MBAR[0x9A24])) -#define MCF_FEC1_RMON_T_P64 (*(volatile uint32_t*)(&_MBAR[0x9A28])) -#define MCF_FEC1_RMON_T_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x9A2C])) -#define MCF_FEC1_RMON_T_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x9A30])) -#define MCF_FEC1_RMON_T_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x9A34])) -#define MCF_FEC1_RMON_T_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x9A38])) -#define MCF_FEC1_RMON_T_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x9A3C])) -#define MCF_FEC1_RMON_T_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x9A40])) -#define MCF_FEC1_RMON_T_OCTETS (*(volatile uint32_t*)(&_MBAR[0x9A44])) -#define MCF_FEC1_IEEE_T_DROP (*(volatile uint32_t*)(&_MBAR[0x9A48])) -#define MCF_FEC1_IEEE_T_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x9A4C])) -#define MCF_FEC1_IEEE_T_1COL (*(volatile uint32_t*)(&_MBAR[0x9A50])) -#define MCF_FEC1_IEEE_T_MCOL (*(volatile uint32_t*)(&_MBAR[0x9A54])) -#define MCF_FEC1_IEEE_T_DEF (*(volatile uint32_t*)(&_MBAR[0x9A58])) -#define MCF_FEC1_IEEE_T_LCOL (*(volatile uint32_t*)(&_MBAR[0x9A5C])) -#define MCF_FEC1_IEEE_T_EXCOL (*(volatile uint32_t*)(&_MBAR[0x9A60])) -#define MCF_FEC1_IEEE_T_MACERR (*(volatile uint32_t*)(&_MBAR[0x9A64])) -#define MCF_FEC1_IEEE_T_CSERR (*(volatile uint32_t*)(&_MBAR[0x9A68])) -#define MCF_FEC1_IEEE_T_SQE (*(volatile uint32_t*)(&_MBAR[0x9A6C])) -#define MCF_FEC1_IEEE_T_FDXFC (*(volatile uint32_t*)(&_MBAR[0x9A70])) -#define MCF_FEC1_IEEE_T_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x9A74])) -#define MCF_FEC1_RMON_R_DROP (*(volatile uint32_t*)(&_MBAR[0x9A80])) -#define MCF_FEC1_RMON_R_PACKETS (*(volatile uint32_t*)(&_MBAR[0x9A84])) -#define MCF_FEC1_RMON_R_BC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A88])) -#define MCF_FEC1_RMON_R_MC_PKT (*(volatile uint32_t*)(&_MBAR[0x9A8C])) -#define MCF_FEC1_RMON_R_CRC_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9A90])) -#define MCF_FEC1_RMON_R_UNDERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A94])) -#define MCF_FEC1_RMON_R_OVERSIZE (*(volatile uint32_t*)(&_MBAR[0x9A98])) -#define MCF_FEC1_RMON_R_FRAG (*(volatile uint32_t*)(&_MBAR[0x9A9C])) -#define MCF_FEC1_RMON_R_JAB (*(volatile uint32_t*)(&_MBAR[0x9AA0])) -#define MCF_FEC1_RMON_R_RESVD_0 (*(volatile uint32_t*)(&_MBAR[0x9AA4])) -#define MCF_FEC1_RMON_R_P64 (*(volatile uint32_t*)(&_MBAR[0x9AA8])) -#define MCF_FEC1_RMON_R_P65TO127 (*(volatile uint32_t*)(&_MBAR[0x9AAC])) -#define MCF_FEC1_RMON_R_P128TO255 (*(volatile uint32_t*)(&_MBAR[0x9AB0])) -#define MCF_FEC1_RMON_R_P256TO511 (*(volatile uint32_t*)(&_MBAR[0x9AB4])) -#define MCF_FEC1_RMON_R_P512TO1023 (*(volatile uint32_t*)(&_MBAR[0x9AB8])) -#define MCF_FEC1_RMON_R_P1024TO2047 (*(volatile uint32_t*)(&_MBAR[0x9ABC])) -#define MCF_FEC1_RMON_R_P_GTE2048 (*(volatile uint32_t*)(&_MBAR[0x9AC0])) -#define MCF_FEC1_RMON_R_OCTETS (*(volatile uint32_t*)(&_MBAR[0x9AC4])) -#define MCF_FEC1_IEEE_R_DROP (*(volatile uint32_t*)(&_MBAR[0x9AC8])) -#define MCF_FEC1_IEEE_R_FRAME_OK (*(volatile uint32_t*)(&_MBAR[0x9ACC])) -#define MCF_FEC1_IEEE_R_CRC (*(volatile uint32_t*)(&_MBAR[0x9AD0])) -#define MCF_FEC1_IEEE_R_ALIGN (*(volatile uint32_t*)(&_MBAR[0x9AD4])) -#define MCF_FEC1_IEEE_R_MACERR (*(volatile uint32_t*)(&_MBAR[0x9AD8])) -#define MCF_FEC1_IEEE_R_FDXFC (*(volatile uint32_t*)(&_MBAR[0x9ADC])) -#define MCF_FEC1_IEEE_R_OCTETS_OK (*(volatile uint32_t*)(&_MBAR[0x9AE0])) - -#define MCF_FEC_EIR(x) (*(volatile uint32_t*)(&_MBAR[0x9004 + ((x)*0x800)])) -#define MCF_FEC_EIMR(x) (*(volatile uint32_t*)(&_MBAR[0x9008 + ((x)*0x800)])) -#define MCF_FEC_ECR(x) (*(volatile uint32_t*)(&_MBAR[0x9024 + ((x)*0x800)])) -#define MCF_FEC_MMFR(x) (*(volatile uint32_t*)(&_MBAR[0x9040 + ((x)*0x800)])) -#define MCF_FEC_MSCR(x) (*(volatile uint32_t*)(&_MBAR[0x9044 + ((x)*0x800)])) -#define MCF_FEC_MIBC(x) (*(volatile uint32_t*)(&_MBAR[0x9064 + ((x)*0x800)])) -#define MCF_FEC_RCR(x) (*(volatile uint32_t*)(&_MBAR[0x9084 + ((x)*0x800)])) -#define MCF_FEC_RHR(x) (*(volatile uint32_t*)(&_MBAR[0x9088 + ((x)*0x800)])) -#define MCF_FEC_TCR(x) (*(volatile uint32_t*)(&_MBAR[0x90C4 + ((x)*0x800)])) -#define MCF_FEC_PALR(x) (*(volatile uint32_t*)(&_MBAR[0x90E4 + ((x)*0x800)])) -#define MCF_FEC_PAHR(x) (*(volatile uint32_t*)(&_MBAR[0x90E8 + ((x)*0x800)])) -#define MCF_FEC_OPD(x) (*(volatile uint32_t*)(&_MBAR[0x90EC + ((x)*0x800)])) -#define MCF_FEC_IAUR(x) (*(volatile uint32_t*)(&_MBAR[0x9118 + ((x)*0x800)])) -#define MCF_FEC_IALR(x) (*(volatile uint32_t*)(&_MBAR[0x911C + ((x)*0x800)])) -#define MCF_FEC_GAUR(x) (*(volatile uint32_t*)(&_MBAR[0x9120 + ((x)*0x800)])) -#define MCF_FEC_GALR(x) (*(volatile uint32_t*)(&_MBAR[0x9124 + ((x)*0x800)])) -#define MCF_FEC_FECTFWR(x) (*(volatile uint32_t*)(&_MBAR[0x9144 + ((x)*0x800)])) -#define MCF_FEC_FECRFDR(x) (*(volatile uint32_t*)(&_MBAR[0x9184 + ((x)*0x800)])) -#define MCF_FEC_FECRFSR(x) (*(volatile uint32_t*)(&_MBAR[0x9188 + ((x)*0x800)])) -#define MCF_FEC_FECRFCR(x) (*(volatile uint32_t*)(&_MBAR[0x918C + ((x)*0x800)])) -#define MCF_FEC_FECRLRFP(x) (*(volatile uint32_t*)(&_MBAR[0x9190 + ((x)*0x800)])) -#define MCF_FEC_FECRLWFP(x) (*(volatile uint32_t*)(&_MBAR[0x9194 + ((x)*0x800)])) -#define MCF_FEC_FECRFAR(x) (*(volatile uint32_t*)(&_MBAR[0x9198 + ((x)*0x800)])) -#define MCF_FEC_FECRFRP(x) (*(volatile uint32_t*)(&_MBAR[0x919C + ((x)*0x800)])) -#define MCF_FEC_FECRFWP(x) (*(volatile uint32_t*)(&_MBAR[0x91A0 + ((x)*0x800)])) -#define MCF_FEC_FECTFDR(x) (*(volatile uint32_t*)(&_MBAR[0x91A4 + ((x)*0x800)])) -#define MCF_FEC_FECTFSR(x) (*(volatile uint32_t*)(&_MBAR[0x91A8 + ((x)*0x800)])) -#define MCF_FEC_FECTFCR(x) (*(volatile uint32_t*)(&_MBAR[0x91AC + ((x)*0x800)])) -#define MCF_FEC_FECTLRFP(x) (*(volatile uint32_t*)(&_MBAR[0x91B0 + ((x)*0x800)])) -#define MCF_FEC_FECTLWFP(x) (*(volatile uint32_t*)(&_MBAR[0x91B4 + ((x)*0x800)])) -#define MCF_FEC_FECTFAR(x) (*(volatile uint32_t*)(&_MBAR[0x91B8 + ((x)*0x800)])) -#define MCF_FEC_FECTFRP(x) (*(volatile uint32_t*)(&_MBAR[0x91BC + ((x)*0x800)])) -#define MCF_FEC_FECTFWP(x) (*(volatile uint32_t*)(&_MBAR[0x91C0 + ((x)*0x800)])) -#define MCF_FEC_FECFRST(x) (*(volatile uint32_t*)(&_MBAR[0x91C4 + ((x)*0x800)])) -#define MCF_FEC_FECCTCWR(x) (*(volatile uint32_t*)(&_MBAR[0x91C8 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x9200 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_PACKETS(x) (*(volatile uint32_t*)(&_MBAR[0x9204 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_BC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x9208 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_MC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x920C + ((x)*0x800)])) -#define MCF_FEC_RMON_T_CRC_ALIGN(x) (*(volatile uint32_t*)(&_MBAR[0x9210 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_UNDERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9214 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_OVERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9218 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_FRAG(x) (*(volatile uint32_t*)(&_MBAR[0x921C + ((x)*0x800)])) -#define MCF_FEC_RMON_T_JAB(x) (*(volatile uint32_t*)(&_MBAR[0x9220 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_COL(x) (*(volatile uint32_t*)(&_MBAR[0x9224 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P64(x) (*(volatile uint32_t*)(&_MBAR[0x9228 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P65TO127(x) (*(volatile uint32_t*)(&_MBAR[0x922C + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P128TO255(x) (*(volatile uint32_t*)(&_MBAR[0x9230 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P256TO511(x) (*(volatile uint32_t*)(&_MBAR[0x9234 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P512TO1023(x) (*(volatile uint32_t*)(&_MBAR[0x9238 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P1024TO2047(x) (*(volatile uint32_t*)(&_MBAR[0x923C + ((x)*0x800)])) -#define MCF_FEC_RMON_T_P_GTE2048(x) (*(volatile uint32_t*)(&_MBAR[0x9240 + ((x)*0x800)])) -#define MCF_FEC_RMON_T_OCTETS(x) (*(volatile uint32_t*)(&_MBAR[0x9244 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x9248 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_FRAME_OK(x) (*(volatile uint32_t*)(&_MBAR[0x924C + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_1COL(x) (*(volatile uint32_t*)(&_MBAR[0x9250 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_MCOL(x) (*(volatile uint32_t*)(&_MBAR[0x9254 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_DEF(x) (*(volatile uint32_t*)(&_MBAR[0x9258 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_LCOL(x) (*(volatile uint32_t*)(&_MBAR[0x925C + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_EXCOL(x) (*(volatile uint32_t*)(&_MBAR[0x9260 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_MACERR(x) (*(volatile uint32_t*)(&_MBAR[0x9264 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_CSERR(x) (*(volatile uint32_t*)(&_MBAR[0x9268 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_SQE(x) (*(volatile uint32_t*)(&_MBAR[0x926C + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_FDXFC(x) (*(volatile uint32_t*)(&_MBAR[0x9270 + ((x)*0x800)])) -#define MCF_FEC_IEEE_T_OCTETS_OK(x) (*(volatile uint32_t*)(&_MBAR[0x9274 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x9280 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_PACKETS(x) (*(volatile uint32_t*)(&_MBAR[0x9284 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_BC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x9288 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_MC_PKT(x) (*(volatile uint32_t*)(&_MBAR[0x928C + ((x)*0x800)])) -#define MCF_FEC_RMON_R_CRC_ALIGN(x) (*(volatile uint32_t*)(&_MBAR[0x9290 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_UNDERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9294 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_OVERSIZE(x) (*(volatile uint32_t*)(&_MBAR[0x9298 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_FRAG(x) (*(volatile uint32_t*)(&_MBAR[0x929C + ((x)*0x800)])) -#define MCF_FEC_RMON_R_JAB(x) (*(volatile uint32_t*)(&_MBAR[0x92A0 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_RESVD_0(x) (*(volatile uint32_t*)(&_MBAR[0x92A4 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P64(x) (*(volatile uint32_t*)(&_MBAR[0x92A8 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P65TO127(x) (*(volatile uint32_t*)(&_MBAR[0x92AC + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P128TO255(x) (*(volatile uint32_t*)(&_MBAR[0x92B0 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P256TO511(x) (*(volatile uint32_t*)(&_MBAR[0x92B4 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P512TO1023(x) (*(volatile uint32_t*)(&_MBAR[0x92B8 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P1024TO2047(x) (*(volatile uint32_t*)(&_MBAR[0x92BC + ((x)*0x800)])) -#define MCF_FEC_RMON_R_P_GTE2048(x) (*(volatile uint32_t*)(&_MBAR[0x92C0 + ((x)*0x800)])) -#define MCF_FEC_RMON_R_OCTETS(x) (*(volatile uint32_t*)(&_MBAR[0x92C4 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_DROP(x) (*(volatile uint32_t*)(&_MBAR[0x92C8 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_FRAME_OK(x) (*(volatile uint32_t*)(&_MBAR[0x92CC + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_CRC(x) (*(volatile uint32_t*)(&_MBAR[0x92D0 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_ALIGN(x) (*(volatile uint32_t*)(&_MBAR[0x92D4 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_MACERR(x) (*(volatile uint32_t*)(&_MBAR[0x92D8 + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_FDXFC(x) (*(volatile uint32_t*)(&_MBAR[0x92DC + ((x)*0x800)])) -#define MCF_FEC_IEEE_R_OCTETS_OK(x) (*(volatile uint32_t*)(&_MBAR[0x92E0 + ((x)*0x800)])) - - -/* Bit definitions and macros for MCF_FEC_EIR */ -#define MCF_FEC_EIR_RFERR (0x20000) -#define MCF_FEC_EIR_XFERR (0x40000) -#define MCF_FEC_EIR_XFUN (0x80000) -#define MCF_FEC_EIR_RL (0x100000) -#define MCF_FEC_EIR_LC (0x200000) -#define MCF_FEC_EIR_MII (0x800000) -#define MCF_FEC_EIR_TXF (0x8000000) -#define MCF_FEC_EIR_GRA (0x10000000) -#define MCF_FEC_EIR_BABT (0x20000000) -#define MCF_FEC_EIR_BABR (0x40000000) -#define MCF_FEC_EIR_HBERR (0x80000000) -#define MCF_FEC_EIR_CLEAR_ALL (0xFFFFFFFF) - -/* Bit definitions and macros for MCF_FEC_EIMR */ -#define MCF_FEC_EIMR_RFERR (0x20000) -#define MCF_FEC_EIMR_XFERR (0x40000) -#define MCF_FEC_EIMR_XFUN (0x80000) -#define MCF_FEC_EIMR_RL (0x100000) -#define MCF_FEC_EIMR_LC (0x200000) -#define MCF_FEC_EIMR_MII (0x800000) -#define MCF_FEC_EIMR_TXF (0x8000000) -#define MCF_FEC_EIMR_GRA (0x10000000) -#define MCF_FEC_EIMR_BABT (0x20000000) -#define MCF_FEC_EIMR_BABR (0x40000000) -#define MCF_FEC_EIMR_HBERR (0x80000000) -#define MCF_FEC_EIMR_MASK_ALL (0) -#define MCF_FEC_EIMR_UNMASK_ALL (0xFFFFFFFF) - -/* Bit definitions and macros for MCF_FEC_ECR */ -#define MCF_FEC_ECR_RESET (0x1) -#define MCF_FEC_ECR_ETHER_EN (0x2) - -/* Bit definitions and macros for MCF_FEC_MMFR */ -#define MCF_FEC_MMFR_DATA(x) (((x)&0xFFFF)<<0) -#define MCF_FEC_MMFR_TA(x) (((x)&0x3)<<0x10) -#define MCF_FEC_MMFR_TA_10 (0x20000) -#define MCF_FEC_MMFR_RA(x) (((x)&0x1F)<<0x12) -#define MCF_FEC_MMFR_PA(x) (((x)&0x1F)<<0x17) -#define MCF_FEC_MMFR_OP(x) (((x)&0x3)<<0x1C) -#define MCF_FEC_MMFR_OP_READ (0x20000000) -#define MCF_FEC_MMFR_OP_WRITE (0x10000000) -#define MCF_FEC_MMFR_ST(x) (((x)&0x3)<<0x1E) -#define MCF_FEC_MMFR_ST_01 (0x40000000) - -/* Bit definitions and macros for MCF_FEC_MSCR */ -#define MCF_FEC_MSCR_MII_SPEED(x) (((x)&0x3F)<<0x1) -#define MCF_FEC_MSCR_DIS_PREAMBLE (0x80) -#define MCF_FEC_MSCR_MII_SPEED_133 (0x1B<<0x1) -#define MCF_FEC_MSCR_MII_SPEED_120 (0x18<<0x1) -#define MCF_FEC_MSCR_MII_SPEED_66 (0xE<<0x1) -#define MCF_FEC_MSCR_MII_SPEED_60 (0xC<<0x1) - -/* Bit definitions and macros for MCF_FEC_MIBC */ -#define MCF_FEC_MIBC_MIB_IDLE (0x40000000) -#define MCF_FEC_MIBC_MIB_DISABLE (0x80000000) - -/* Bit definitions and macros for MCF_FEC_RCR */ -#define MCF_FEC_RCR_LOOP (0x1) -#define MCF_FEC_RCR_DRT (0x2) -#define MCF_FEC_RCR_MII_MODE (0x4) -#define MCF_FEC_RCR_PROM (0x8) -#define MCF_FEC_RCR_BC_REJ (0x10) -#define MCF_FEC_RCR_FCE (0x20) -#define MCF_FEC_RCR_MAX_FL(x) (((x)&0x7FF)<<0x10) - -/* Bit definitions and macros for MCF_FEC_RHR */ -#define MCF_FEC_RHR_HASH(x) (((x)&0x3F)<<0x18) -#define MCF_FEC_RHR_MULTCAST (0x40000000) -#define MCF_FEC_RHR_FCE (0x80000000) - -/* Bit definitions and macros for MCF_FEC_TCR */ -#define MCF_FEC_TCR_GTS (0x1) -#define MCF_FEC_TCR_HBC (0x2) -#define MCF_FEC_TCR_FDEN (0x4) -#define MCF_FEC_TCR_TFC_PAUSE (0x8) -#define MCF_FEC_TCR_RFC_PAUSE (0x10) - -/* Bit definitions and macros for MCF_FEC_PALR */ -#define MCF_FEC_PALR_PADDR1(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_PAHR */ -#define MCF_FEC_PAHR_TYPE(x) (((x)&0xFFFF)<<0) -#define MCF_FEC_PAHR_PADDR2(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_FEC_OPD */ -#define MCF_FEC_OPD_PAUSE_DUR(x) (((x)&0xFFFF)<<0) -#define MCF_FEC_OPD_OPCODE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_FEC_IAUR */ -#define MCF_FEC_IAUR_IADDR1(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IALR */ -#define MCF_FEC_IALR_IADDR2(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_GAUR */ -#define MCF_FEC_GAUR_GADDR1(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_GALR */ -#define MCF_FEC_GALR_GADDR2(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFWR */ -#define MCF_FEC_FECTFWR_X_WMRK(x) (((x)&0xF)<<0) -#define MCF_FEC_FECTFWR_X_WMRK_64 (0) -#define MCF_FEC_FECTFWR_X_WMRK_128 (0x1) -#define MCF_FEC_FECTFWR_X_WMRK_192 (0x2) -#define MCF_FEC_FECTFWR_X_WMRK_256 (0x3) -#define MCF_FEC_FECTFWR_X_WMRK_320 (0x4) -#define MCF_FEC_FECTFWR_X_WMRK_384 (0x5) -#define MCF_FEC_FECTFWR_X_WMRK_448 (0x6) -#define MCF_FEC_FECTFWR_X_WMRK_512 (0x7) -#define MCF_FEC_FECTFWR_X_WMRK_576 (0x8) -#define MCF_FEC_FECTFWR_X_WMRK_640 (0x9) -#define MCF_FEC_FECTFWR_X_WMRK_704 (0xA) -#define MCF_FEC_FECTFWR_X_WMRK_768 (0xB) -#define MCF_FEC_FECTFWR_X_WMRK_832 (0xC) -#define MCF_FEC_FECTFWR_X_WMRK_896 (0xD) -#define MCF_FEC_FECTFWR_X_WMRK_960 (0xE) -#define MCF_FEC_FECTFWR_X_WMRK_1024 (0xF) - -/* Bit definitions and macros for MCF_FEC_FECRFDR */ -#define MCF_FEC_FECRFDR_FIFO_DATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRFSR */ -#define MCF_FEC_FECRFSR_EMT (0x10000) -#define MCF_FEC_FECRFSR_ALARM (0x20000) -#define MCF_FEC_FECRFSR_FU (0x40000) -#define MCF_FEC_FECRFSR_FRMRDY (0x80000) -#define MCF_FEC_FECRFSR_OF (0x100000) -#define MCF_FEC_FECRFSR_UF (0x200000) -#define MCF_FEC_FECRFSR_RXW (0x400000) -#define MCF_FEC_FECRFSR_FAE (0x800000) -#define MCF_FEC_FECRFSR_FRM(x) (((x)&0xF)<<0x18) -#define MCF_FEC_FECRFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_FEC_FECRFCR */ -#define MCF_FEC_FECRFCR_COUNTER(x) (((x)&0xFFFF)<<0) -#define MCF_FEC_FECRFCR_OF_MSK (0x80000) -#define MCF_FEC_FECRFCR_UF_MSK (0x100000) -#define MCF_FEC_FECRFCR_RXW_MSK (0x200000) -#define MCF_FEC_FECRFCR_FAE_MSK (0x400000) -#define MCF_FEC_FECRFCR_IP_MSK (0x800000) -#define MCF_FEC_FECRFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_FEC_FECRFCR_FRMEN (0x8000000) -#define MCF_FEC_FECRFCR_TIMER (0x10000000) - -/* Bit definitions and macros for MCF_FEC_FECRLRFP */ -#define MCF_FEC_FECRLRFP_LRFP(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRLWFP */ -#define MCF_FEC_FECRLWFP_LWFP(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRFAR */ -#define MCF_FEC_FECRFAR_ALARM(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRFRP */ -#define MCF_FEC_FECRFRP_READ(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECRFWP */ -#define MCF_FEC_FECRFWP_WRITE(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFDR */ -#define MCF_FEC_FECTFDR_FIFO_DATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFSR */ -#define MCF_FEC_FECTFSR_EMT (0x10000) -#define MCF_FEC_FECTFSR_ALARM (0x20000) -#define MCF_FEC_FECTFSR_FU (0x40000) -#define MCF_FEC_FECTFSR_FRMRDY (0x80000) -#define MCF_FEC_FECTFSR_OF (0x100000) -#define MCF_FEC_FECTFSR_UF (0x200000) -#define MCF_FEC_FECTFSR_FAE (0x800000) -#define MCF_FEC_FECTFSR_FRM(x) (((x)&0xF)<<0x18) -#define MCF_FEC_FECTFSR_TXW (0x40000000) -#define MCF_FEC_FECTFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_FEC_FECTFCR */ -#define MCF_FEC_FECTFCR_RESERVED (0x200000) -#define MCF_FEC_FECTFCR_COUNTER(x) (((x)&0xFFFF)<<0|0x200000) -#define MCF_FEC_FECTFCR_TXW_MASK (0x240000) -#define MCF_FEC_FECTFCR_OF_MSK (0x280000) -#define MCF_FEC_FECTFCR_UF_MSK (0x300000) -#define MCF_FEC_FECTFCR_FAE_MSK (0x600000) -#define MCF_FEC_FECTFCR_IP_MSK (0xA00000) -#define MCF_FEC_FECTFCR_GR(x) (((x)&0x7)<<0x18|0x200000) -#define MCF_FEC_FECTFCR_FRMEN (0x8200000) -#define MCF_FEC_FECTFCR_TIMER (0x10200000) -#define MCF_FEC_FECTFCR_WFR (0x20200000) -#define MCF_FEC_FECTFCR_WCTL (0x40200000) - -/* Bit definitions and macros for MCF_FEC_FECTLRFP */ -#define MCF_FEC_FECTLRFP_LRFP(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTLWFP */ -#define MCF_FEC_FECTLWFP_LWFP(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFAR */ -#define MCF_FEC_FECTFAR_ALARM(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFRP */ -#define MCF_FEC_FECTFRP_READ(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECTFWP */ -#define MCF_FEC_FECTFWP_WRITE(x) (((x)&0x3FF)<<0) - -/* Bit definitions and macros for MCF_FEC_FECFRST */ -#define MCF_FEC_FECFRST_RST_CTL (0x1000000) -#define MCF_FEC_FECFRST_SW_RST (0x2000000) - -/* Bit definitions and macros for MCF_FEC_FECCTCWR */ -#define MCF_FEC_FECCTCWR_TFCW (0x1000000) -#define MCF_FEC_FECCTCWR_CRC (0x2000000) - -/* Bit definitions and macros for MCF_FEC_RMON_T_DROP */ -#define MCF_FEC_RMON_T_DROP_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_PACKETS */ -#define MCF_FEC_RMON_T_PACKETS_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_BC_PKT */ -#define MCF_FEC_RMON_T_BC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_MC_PKT */ -#define MCF_FEC_RMON_T_MC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_CRC_ALIGN */ -#define MCF_FEC_RMON_T_CRC_ALIGN_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_UNDERSIZE */ -#define MCF_FEC_RMON_T_UNDERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_OVERSIZE */ -#define MCF_FEC_RMON_T_OVERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_FRAG */ -#define MCF_FEC_RMON_T_FRAG_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_JAB */ -#define MCF_FEC_RMON_T_JAB_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_COL */ -#define MCF_FEC_RMON_T_COL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P64 */ -#define MCF_FEC_RMON_T_P64_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P65TO127 */ -#define MCF_FEC_RMON_T_P65TO127_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P128TO255 */ -#define MCF_FEC_RMON_T_P128TO255_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P256TO511 */ -#define MCF_FEC_RMON_T_P256TO511_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P512TO1023 */ -#define MCF_FEC_RMON_T_P512TO1023_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P1024TO2047 */ -#define MCF_FEC_RMON_T_P1024TO2047_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_P_GTE2048 */ -#define MCF_FEC_RMON_T_P_GTE2048_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_T_OCTETS */ -#define MCF_FEC_RMON_T_OCTETS_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_DROP */ -#define MCF_FEC_IEEE_T_DROP_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_FRAME_OK */ -#define MCF_FEC_IEEE_T_FRAME_OK_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_1COL */ -#define MCF_FEC_IEEE_T_1COL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_MCOL */ -#define MCF_FEC_IEEE_T_MCOL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_DEF */ -#define MCF_FEC_IEEE_T_DEF_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_LCOL */ -#define MCF_FEC_IEEE_T_LCOL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_EXCOL */ -#define MCF_FEC_IEEE_T_EXCOL_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_MACERR */ -#define MCF_FEC_IEEE_T_MACERR_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_CSERR */ -#define MCF_FEC_IEEE_T_CSERR_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_SQE */ -#define MCF_FEC_IEEE_T_SQE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_FDXFC */ -#define MCF_FEC_IEEE_T_FDXFC_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_T_OCTETS_OK */ -#define MCF_FEC_IEEE_T_OCTETS_OK_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_DROP */ -#define MCF_FEC_RMON_R_DROP_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_PACKETS */ -#define MCF_FEC_RMON_R_PACKETS_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_BC_PKT */ -#define MCF_FEC_RMON_R_BC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_MC_PKT */ -#define MCF_FEC_RMON_R_MC_PKT_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_CRC_ALIGN */ -#define MCF_FEC_RMON_R_CRC_ALIGN_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_UNDERSIZE */ -#define MCF_FEC_RMON_R_UNDERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_OVERSIZE */ -#define MCF_FEC_RMON_R_OVERSIZE_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_FRAG */ -#define MCF_FEC_RMON_R_FRAG_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_JAB */ -#define MCF_FEC_RMON_R_JAB_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_RESVD_0 */ -#define MCF_FEC_RMON_R_RESVD_0_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P64 */ -#define MCF_FEC_RMON_R_P64_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P65TO127 */ -#define MCF_FEC_RMON_R_P65TO127_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P128TO255 */ -#define MCF_FEC_RMON_R_P128TO255_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P256TO511 */ -#define MCF_FEC_RMON_R_P256TO511_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P512TO1023 */ -#define MCF_FEC_RMON_R_P512TO1023_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P1024TO2047 */ -#define MCF_FEC_RMON_R_P1024TO2047_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_P_GTE2048 */ -#define MCF_FEC_RMON_R_P_GTE2048_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_RMON_R_OCTETS */ -#define MCF_FEC_RMON_R_OCTETS_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_DROP */ -#define MCF_FEC_IEEE_R_DROP_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_FRAME_OK */ -#define MCF_FEC_IEEE_R_FRAME_OK_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_CRC */ -#define MCF_FEC_IEEE_R_CRC_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_ALIGN */ -#define MCF_FEC_IEEE_R_ALIGN_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_MACERR */ -#define MCF_FEC_IEEE_R_MACERR_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_FDXFC */ -#define MCF_FEC_IEEE_R_FDXFC_Value(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_FEC_IEEE_R_OCTETS_OK */ -#define MCF_FEC_IEEE_R_OCTETS_OK_Value(x) (((x)&0xFFFFFFFF)<<0) - - -#endif /* __MCF5475_FEC_H__ */ diff --git a/tos/vmem_test/include/MCF5475_GPIO.h b/tos/vmem_test/include/MCF5475_GPIO.h deleted file mode 100644 index 5dd2583..0000000 --- a/tos/vmem_test/include/MCF5475_GPIO.h +++ /dev/null @@ -1,543 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_GPIO_H__ -#define __MCF5475_GPIO_H__ - - -/********************************************************************* -* -* General Purpose I/O (GPIO) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_GPIO_PODR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA00])) -#define MCF_GPIO_PDDR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA10])) -#define MCF_GPIO_PPDSDR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA20])) -#define MCF_GPIO_PCLRR_FBCTL (*(volatile uint8_t *)(&_MBAR[0xA30])) - -#define MCF_GPIO_PODR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA01])) -#define MCF_GPIO_PDDR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA11])) -#define MCF_GPIO_PPDSDR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA21])) -#define MCF_GPIO_PCLRR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA31])) - -#define MCF_GPIO_PODR_DMA (*(volatile uint8_t *)(&_MBAR[0xA02])) -#define MCF_GPIO_PDDR_DMA (*(volatile uint8_t *)(&_MBAR[0xA12])) -#define MCF_GPIO_PPDSDR_DMA (*(volatile uint8_t *)(&_MBAR[0xA22])) -#define MCF_GPIO_PCLRR_DMA (*(volatile uint8_t *)(&_MBAR[0xA32])) - -#define MCF_GPIO_PODR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA04])) -#define MCF_GPIO_PDDR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA14])) -#define MCF_GPIO_PPDSDR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA24])) -#define MCF_GPIO_PCLRR_FEC0H (*(volatile uint8_t *)(&_MBAR[0xA34])) - -#define MCF_GPIO_PODR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA05])) -#define MCF_GPIO_PDDR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA15])) -#define MCF_GPIO_PPDSDR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA25])) -#define MCF_GPIO_PCLRR_FEC0L (*(volatile uint8_t *)(&_MBAR[0xA35])) - -#define MCF_GPIO_PODR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA06])) -#define MCF_GPIO_PDDR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA16])) -#define MCF_GPIO_PPDSDR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA26])) -#define MCF_GPIO_PCLRR_FEC1H (*(volatile uint8_t *)(&_MBAR[0xA36])) - -#define MCF_GPIO_PODR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA07])) -#define MCF_GPIO_PDDR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA17])) -#define MCF_GPIO_PPDSDR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA27])) -#define MCF_GPIO_PCLRR_FEC1L (*(volatile uint8_t *)(&_MBAR[0xA37])) - -#define MCF_GPIO_PODR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA08])) -#define MCF_GPIO_PDDR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA18])) -#define MCF_GPIO_PPDSDR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA28])) -#define MCF_GPIO_PCLRR_FECI2C (*(volatile uint8_t *)(&_MBAR[0xA38])) - -#define MCF_GPIO_PODR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA09])) -#define MCF_GPIO_PDDR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA19])) -#define MCF_GPIO_PPDSDR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA29])) -#define MCF_GPIO_PCLRR_PCIBG (*(volatile uint8_t *)(&_MBAR[0xA39])) - -#define MCF_GPIO_PODR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA0A])) -#define MCF_GPIO_PDDR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA1A])) -#define MCF_GPIO_PPDSDR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA2A])) -#define MCF_GPIO_PCLRR_PCIBR (*(volatile uint8_t *)(&_MBAR[0xA3A])) - -#define MCF_GPIO2_PODR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA0C])) -#define MCF_GPIO2_PDDR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA1C])) -#define MCF_GPIO2_PPDSDR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA2C])) -#define MCF_GPIO2_PCLRR_PSC3PSC (*(volatile uint8_t *)(&_MBAR[0xA3C])) - -#define MCF_GPIO0_PODR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA0D])) -#define MCF_GPIO0_PDDR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA1D])) -#define MCF_GPIO0_PPDSDR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA2D])) -#define MCF_GPIO0_PCLRR_PSC1PSC (*(volatile uint8_t *)(&_MBAR[0xA3D])) - -#define MCF_GPIO_PODR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA0E])) -#define MCF_GPIO_PDDR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA1E])) -#define MCF_GPIO_PPDSDR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA2E])) -#define MCF_GPIO_PCLRR_DSPI (*(volatile uint8_t *)(&_MBAR[0xA3E])) - - - -/* Bit definitions and macros for MCF_GPIO_PODR_FBCTL */ -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL0 (0x1) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL1 (0x2) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL2 (0x4) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL3 (0x8) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL4 (0x10) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL5 (0x20) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL6 (0x40) -#define MCF_GPIO_PODR_FBCTL_PODR_FBCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FBCTL */ -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL0 (0x1) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL1 (0x2) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL2 (0x4) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL3 (0x8) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL4 (0x10) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL5 (0x20) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL6 (0x40) -#define MCF_GPIO_PDDR_FBCTL_PDDR_FBCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FBCTL */ -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL0 (0x1) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL1 (0x2) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL2 (0x4) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL3 (0x8) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL4 (0x10) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL5 (0x20) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL6 (0x40) -#define MCF_GPIO_PPDSDR_FBCTL_PPDSDR_FBCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FBCTL */ -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL0 (0x1) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL1 (0x2) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL2 (0x4) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL3 (0x8) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL4 (0x10) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL5 (0x20) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL6 (0x40) -#define MCF_GPIO_PCLRR_FBCTL_PCLRR_FBCTL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FBCS */ -#define MCF_GPIO_PODR_FBCS_PODR_FBCS1 (0x2) -#define MCF_GPIO_PODR_FBCS_PODR_FBCS2 (0x4) -#define MCF_GPIO_PODR_FBCS_PODR_FBCS3 (0x8) -#define MCF_GPIO_PODR_FBCS_PODR_FBCS4 (0x10) -#define MCF_GPIO_PODR_FBCS_PODR_FBCS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FBCS */ -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS1 (0x2) -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS2 (0x4) -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS3 (0x8) -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS4 (0x10) -#define MCF_GPIO_PDDR_FBCS_PDDR_FBCS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FBCS */ -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS1 (0x2) -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS2 (0x4) -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS3 (0x8) -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS4 (0x10) -#define MCF_GPIO_PPDSDR_FBCS_PPDSDR_FBCS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FBCS */ -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS1 (0x2) -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS2 (0x4) -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS3 (0x8) -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS4 (0x10) -#define MCF_GPIO_PCLRR_FBCS_PCLRR_FBCS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PODR_DMA */ -#define MCF_GPIO_PODR_DMA_PODR_DMA0 (0x1) -#define MCF_GPIO_PODR_DMA_PODR_DMA1 (0x2) -#define MCF_GPIO_PODR_DMA_PODR_DMA2 (0x4) -#define MCF_GPIO_PODR_DMA_PODR_DMA3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DMA */ -#define MCF_GPIO_PDDR_DMA_PDDR_DMA0 (0x1) -#define MCF_GPIO_PDDR_DMA_PDDR_DMA1 (0x2) -#define MCF_GPIO_PDDR_DMA_PDDR_DMA2 (0x4) -#define MCF_GPIO_PDDR_DMA_PDDR_DMA3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DMA */ -#define MCF_GPIO_PPDSDR_DMA_PPDSDR_DMA0 (0x1) -#define MCF_GPIO_PPDSDR_DMA_PPDSDR_DMA1 (0x2) -#define MCF_GPIO_PPDSDR_DMA_PPDSDR_DMA2 (0x4) -#define MCF_GPIO_PPDSDR_DMA_PPDSDR_DMA3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DMA */ -#define MCF_GPIO_PCLRR_DMA_PCLRR_DMA0 (0x1) -#define MCF_GPIO_PCLRR_DMA_PCLRR_DMA1 (0x2) -#define MCF_GPIO_PCLRR_DMA_PCLRR_DMA2 (0x4) -#define MCF_GPIO_PCLRR_DMA_PCLRR_DMA3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PODR_FEC0H */ -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H0 (0x1) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H1 (0x2) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H2 (0x4) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H3 (0x8) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H4 (0x10) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H5 (0x20) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H6 (0x40) -#define MCF_GPIO_PODR_FEC0H_PODR_FEC0H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FEC0H */ -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H0 (0x1) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H1 (0x2) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H2 (0x4) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H3 (0x8) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H4 (0x10) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H5 (0x20) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H6 (0x40) -#define MCF_GPIO_PDDR_FEC0H_PDDR_FEC0H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FEC0H */ -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H0 (0x1) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H1 (0x2) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H2 (0x4) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H3 (0x8) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H4 (0x10) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H5 (0x20) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H6 (0x40) -#define MCF_GPIO_PPDSDR_FEC0H_PPDSDR_FEC0H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FEC0H */ -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H0 (0x1) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H1 (0x2) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H2 (0x4) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H3 (0x8) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H4 (0x10) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H5 (0x20) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H6 (0x40) -#define MCF_GPIO_PCLRR_FEC0H_PCLRR_FEC0H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FEC0L */ -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L0 (0x1) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L1 (0x2) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L2 (0x4) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L3 (0x8) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L4 (0x10) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L5 (0x20) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L6 (0x40) -#define MCF_GPIO_PODR_FEC0L_PODR_FEC0L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FEC0L */ -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L0 (0x1) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L1 (0x2) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L2 (0x4) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L3 (0x8) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L4 (0x10) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L5 (0x20) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L6 (0x40) -#define MCF_GPIO_PDDR_FEC0L_PDDR_FEC0L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FEC0L */ -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L0 (0x1) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L1 (0x2) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L2 (0x4) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L3 (0x8) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L4 (0x10) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L5 (0x20) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L6 (0x40) -#define MCF_GPIO_PPDSDR_FEC0L_PPDSDR_FEC0L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FEC0L */ -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L0 (0x1) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L1 (0x2) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L2 (0x4) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L3 (0x8) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L4 (0x10) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L5 (0x20) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L6 (0x40) -#define MCF_GPIO_PCLRR_FEC0L_PCLRR_FEC0L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FEC1H */ -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H0 (0x1) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H1 (0x2) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H2 (0x4) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H3 (0x8) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H4 (0x10) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H5 (0x20) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H6 (0x40) -#define MCF_GPIO_PODR_FEC1H_PODR_FEC1H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FEC1H */ -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H0 (0x1) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H1 (0x2) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H2 (0x4) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H3 (0x8) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H4 (0x10) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H5 (0x20) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H6 (0x40) -#define MCF_GPIO_PDDR_FEC1H_PDDR_FEC1H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FEC1H */ -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H0 (0x1) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H1 (0x2) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H2 (0x4) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H3 (0x8) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H4 (0x10) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H5 (0x20) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H6 (0x40) -#define MCF_GPIO_PPDSDR_FEC1H_PPDSDR_FEC1H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FEC1H */ -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H0 (0x1) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H1 (0x2) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H2 (0x4) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H3 (0x8) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H4 (0x10) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H5 (0x20) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H6 (0x40) -#define MCF_GPIO_PCLRR_FEC1H_PCLRR_FEC1H7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FEC1L */ -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L0 (0x1) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L1 (0x2) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L2 (0x4) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L3 (0x8) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L4 (0x10) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L5 (0x20) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L6 (0x40) -#define MCF_GPIO_PODR_FEC1L_PODR_FEC1L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FEC1L */ -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L0 (0x1) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L1 (0x2) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L2 (0x4) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L3 (0x8) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4 (0x10) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L5 (0x20) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L6 (0x40) -#define MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FEC1L */ -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L0 (0x1) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L1 (0x2) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L2 (0x4) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L3 (0x8) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L4 (0x10) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L5 (0x20) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L6 (0x40) -#define MCF_GPIO_PPDSDR_FEC1L_PPDSDR_FEC1L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FEC1L */ -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L0 (0x1) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L1 (0x2) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L2 (0x4) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L3 (0x8) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L4 (0x10) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L5 (0x20) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L6 (0x40) -#define MCF_GPIO_PCLRR_FEC1L_PCLRR_FEC1L7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FECI2C */ -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C0 (0x1) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C1 (0x2) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C2 (0x4) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FECI2C */ -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0 (0x1) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1 (0x2) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C2 (0x4) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECI2C */ -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C0 (0x1) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C1 (0x2) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C2 (0x4) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FECI2C */ -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C0 (0x1) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C1 (0x2) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C2 (0x4) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C3 (0x8) - -/* Bit definitions and macros for MCF_GPIO_PODR_PCIBG */ -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG0 (0x1) -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG1 (0x2) -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG2 (0x4) -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG3 (0x8) -#define MCF_GPIO_PODR_PCIBG_PODR_PCIBG4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PCIBG */ -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG0 (0x1) -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG1 (0x2) -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG2 (0x4) -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG3 (0x8) -#define MCF_GPIO_PDDR_PCIBG_PDDR_PCIBG4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PCIBG */ -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG0 (0x1) -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG1 (0x2) -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG2 (0x4) -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG3 (0x8) -#define MCF_GPIO_PPDSDR_PCIBG_PPDSDR_PCIBG4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PCIBG */ -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG0 (0x1) -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG1 (0x2) -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG2 (0x4) -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG3 (0x8) -#define MCF_GPIO_PCLRR_PCIBG_PCLRR_PCIBG4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PODR_PCIBR */ -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR0 (0x1) -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR1 (0x2) -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR2 (0x4) -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR3 (0x8) -#define MCF_GPIO_PODR_PCIBR_PODR_PCIBR4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PCIBR */ -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR0 (0x1) -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR1 (0x2) -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR2 (0x4) -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR3 (0x8) -#define MCF_GPIO_PDDR_PCIBR_PDDR_PCIBR4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PCIBR */ -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR0 (0x1) -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR1 (0x2) -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR2 (0x4) -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR3 (0x8) -#define MCF_GPIO_PPDSDR_PCIBR_PPDSDR_PCIBR4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PCIBR */ -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR0 (0x1) -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR1 (0x2) -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR2 (0x4) -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR3 (0x8) -#define MCF_GPIO_PCLRR_PCIBR_PCLRR_PCIBR4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PODR_PSC3PSC */ -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC20 (0x1) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC21 (0x2) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC22 (0x4) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC23 (0x8) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC24 (0x10) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC25 (0x20) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC26 (0x40) -#define MCF_GPIO_PODR_PSC3PSC_PODR_PSC3PSC27 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PSC3PSC */ -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC20 (0x1) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC21 (0x2) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC22 (0x4) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC23 (0x8) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC24 (0x10) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC25 (0x20) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC26 (0x40) -#define MCF_GPIO_PDDR_PSC3PSC_PDDR_PSC3PSC27 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PSC3PSC */ -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC20 (0x1) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC21 (0x2) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC22 (0x4) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC23 (0x8) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC24 (0x10) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC25 (0x20) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC26 (0x40) -#define MCF_GPIO_PPDSDR_PSC3PSC_PPDSDR_PSC3PSC27 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PSC3PSC */ -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC20 (0x1) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC21 (0x2) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC22 (0x4) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC23 (0x8) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC24 (0x10) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC25 (0x20) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC26 (0x40) -#define MCF_GPIO_PCLRR_PSC3PSC_PCLRR_PSC3PSC27 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_PSC1PSC */ -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC00 (0x1) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC01 (0x2) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC02 (0x4) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC03 (0x8) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC04 (0x10) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC05 (0x20) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC06 (0x40) -#define MCF_GPIO_PODR_PSC1PSC_PODR_PSC1PSC07 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PSC1PSC */ -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC00 (0x1) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC01 (0x2) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC02 (0x4) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC03 (0x8) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC04 (0x10) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC05 (0x20) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC06 (0x40) -#define MCF_GPIO_PDDR_PSC1PSC_PDDR_PSC1PSC07 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PSC1PSC */ -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC00 (0x1) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC01 (0x2) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC02 (0x4) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC03 (0x8) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC04 (0x10) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC05 (0x20) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC06 (0x40) -#define MCF_GPIO_PPDSDR_PSC1PSC_PPDSDR_PSC1PSC07 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PSC1PSC */ -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC00 (0x1) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC01 (0x2) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC02 (0x4) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC03 (0x8) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC04 (0x10) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC05 (0x20) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC06 (0x40) -#define MCF_GPIO_PCLRR_PSC1PSC_PCLRR_PSC1PSC07 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_DSPI */ -#define MCF_GPIO_PODR_DSPI_PODR_DSPI0 (0x1) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI1 (0x2) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI2 (0x4) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI3 (0x8) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI4 (0x10) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI5 (0x20) -#define MCF_GPIO_PODR_DSPI_PODR_DSPI6 (0x40) - -/* Bit definitions and macros for MCF_GPIO_PDDR_DSPI */ -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI0 (0x1) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI1 (0x2) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI2 (0x4) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI3 (0x8) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI4 (0x10) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI5 (0x20) -#define MCF_GPIO_PDDR_DSPI_PDDR_DSPI6 (0x40) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_DSPI */ -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI0 (0x1) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI1 (0x2) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI2 (0x4) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI3 (0x8) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI4 (0x10) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI5 (0x20) -#define MCF_GPIO_PPDSDR_DSPI_PPDSDR_DSPI6 (0x40) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_DSPI */ -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI0 (0x1) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI1 (0x2) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI2 (0x4) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI3 (0x8) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI4 (0x10) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI5 (0x20) -#define MCF_GPIO_PCLRR_DSPI_PCLRR_DSPI6 (0x40) - - -#endif /* __MCF5475_GPIO_H__ */ diff --git a/tos/vmem_test/include/MCF5475_GPT.h b/tos/vmem_test/include/MCF5475_GPT.h deleted file mode 100644 index f9fbc98..0000000 --- a/tos/vmem_test/include/MCF5475_GPT.h +++ /dev/null @@ -1,100 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_GPT_H__ -#define __MCF5475_GPT_H__ - - -/********************************************************************* -* -* General Purpose Timers (GPT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_GPT0_GMS (*(volatile uint32_t*)(&_MBAR[0x800])) -#define MCF_GPT0_GCIR (*(volatile uint32_t*)(&_MBAR[0x804])) -#define MCF_GPT0_GPWM (*(volatile uint32_t*)(&_MBAR[0x808])) -#define MCF_GPT0_GSR (*(volatile uint32_t*)(&_MBAR[0x80C])) - -#define MCF_GPT1_GMS (*(volatile uint32_t*)(&_MBAR[0x810])) -#define MCF_GPT1_GCIR (*(volatile uint32_t*)(&_MBAR[0x814])) -#define MCF_GPT1_GPWM (*(volatile uint32_t*)(&_MBAR[0x818])) -#define MCF_GPT1_GSR (*(volatile uint32_t*)(&_MBAR[0x81C])) - -#define MCF_GPT2_GMS (*(volatile uint32_t*)(&_MBAR[0x820])) -#define MCF_GPT2_GCIR (*(volatile uint32_t*)(&_MBAR[0x824])) -#define MCF_GPT2_GPWM (*(volatile uint32_t*)(&_MBAR[0x828])) -#define MCF_GPT2_GSR (*(volatile uint32_t*)(&_MBAR[0x82C])) - -#define MCF_GPT3_GMS (*(volatile uint32_t*)(&_MBAR[0x830])) -#define MCF_GPT3_GCIR (*(volatile uint32_t*)(&_MBAR[0x834])) -#define MCF_GPT3_GPWM (*(volatile uint32_t*)(&_MBAR[0x838])) -#define MCF_GPT3_GSR (*(volatile uint32_t*)(&_MBAR[0x83C])) - -#define MCF_GPT_GMS(x) (*(volatile uint32_t*)(&_MBAR[0x800 + ((x)*0x10)])) -#define MCF_GPT_GCIR(x) (*(volatile uint32_t*)(&_MBAR[0x804 + ((x)*0x10)])) -#define MCF_GPT_GPWM(x) (*(volatile uint32_t*)(&_MBAR[0x808 + ((x)*0x10)])) -#define MCF_GPT_GSR(x) (*(volatile uint32_t*)(&_MBAR[0x80C + ((x)*0x10)])) - - -/* Bit definitions and macros for MCF_GPT_GMS */ -#define MCF_GPT_GMS_TMS(x) (((x)&0x7)<<0) -#define MCF_GPT_GMS_TMS_DISABLE (0) -#define MCF_GPT_GMS_TMS_INCAPT (0x1) -#define MCF_GPT_GMS_TMS_OUTCAPT (0x2) -#define MCF_GPT_GMS_TMS_PWM (0x3) -#define MCF_GPT_GMS_TMS_GPIO (0x4) -#define MCF_GPT_GMS_GPIO(x) (((x)&0x3)<<0x4) -#define MCF_GPT_GMS_GPIO_INPUT (0) -#define MCF_GPT_GMS_GPIO_OUTLO (0x20) -#define MCF_GPT_GMS_GPIO_OUTHI (0x30) -#define MCF_GPT_GMS_IEN (0x100) -#define MCF_GPT_GMS_OD (0x200) -#define MCF_GPT_GMS_SC (0x400) -#define MCF_GPT_GMS_CE (0x1000) -#define MCF_GPT_GMS_WDEN (0x8000) -#define MCF_GPT_GMS_ICT(x) (((x)&0x3)<<0x10) -#define MCF_GPT_GMS_ICT_ANY (0) -#define MCF_GPT_GMS_ICT_RISE (0x10000) -#define MCF_GPT_GMS_ICT_FALL (0x20000) -#define MCF_GPT_GMS_ICT_PULSE (0x30000) -#define MCF_GPT_GMS_OCT(x) (((x)&0x3)<<0x14) -#define MCF_GPT_GMS_OCT_FRCLOW (0) -#define MCF_GPT_GMS_OCT_PULSEHI (0x100000) -#define MCF_GPT_GMS_OCT_PULSELO (0x200000) -#define MCF_GPT_GMS_OCT_TOGGLE (0x300000) -#define MCF_GPT_GMS_OCPW(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_GPT_GCIR */ -#define MCF_GPT_GCIR_CNT(x) (((x)&0xFFFF)<<0) -#define MCF_GPT_GCIR_PRE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_GPT_GPWM */ -#define MCF_GPT_GPWM_LOAD (0x1) -#define MCF_GPT_GPWM_PWMOP (0x100) -#define MCF_GPT_GPWM_WIDTH(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_GPT_GSR */ -#define MCF_GPT_GSR_CAPT (0x1) -#define MCF_GPT_GSR_COMP (0x2) -#define MCF_GPT_GSR_PWMP (0x4) -#define MCF_GPT_GSR_TEXP (0x8) -#define MCF_GPT_GSR_PIN (0x100) -#define MCF_GPT_GSR_OVF(x) (((x)&0x7)<<0xC) -#define MCF_GPT_GSR_CAPTURE(x) (((x)&0xFFFF)<<0x10) - - -#endif /* __MCF5475_GPT_H__ */ diff --git a/tos/vmem_test/include/MCF5475_I2C.h b/tos/vmem_test/include/MCF5475_I2C.h deleted file mode 100644 index 1e8a85b..0000000 --- a/tos/vmem_test/include/MCF5475_I2C.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_I2C_H__ -#define __MCF5475_I2C_H__ - - -/********************************************************************* -* -* I2C Module (I2C) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_I2C_I2ADR (*(volatile uint8_t *)(&_MBAR[0x8F00])) -#define MCF_I2C_I2FDR (*(volatile uint8_t *)(&_MBAR[0x8F04])) -#define MCF_I2C_I2CR (*(volatile uint8_t *)(&_MBAR[0x8F08])) -#define MCF_I2C_I2SR (*(volatile uint8_t *)(&_MBAR[0x8F0C])) -#define MCF_I2C_I2DR (*(volatile uint8_t *)(&_MBAR[0x8F10])) -#define MCF_I2C_I2ICR (*(volatile uint8_t *)(&_MBAR[0x8F20])) - - - -/* Bit definitions and macros for MCF_I2C_I2ADR */ -#define MCF_I2C_I2ADR_ADR(x) (((x)&0x7F)<<0x1) - -/* Bit definitions and macros for MCF_I2C_I2FDR */ -#define MCF_I2C_I2FDR_IC(x) (((x)&0x3F)<<0) - -/* Bit definitions and macros for MCF_I2C_I2CR */ -#define MCF_I2C_I2CR_RSTA (0x4) -#define MCF_I2C_I2CR_TXAK (0x8) -#define MCF_I2C_I2CR_MTX (0x10) -#define MCF_I2C_I2CR_MSTA (0x20) -#define MCF_I2C_I2CR_IIEN (0x40) -#define MCF_I2C_I2CR_IEN (0x80) - -/* Bit definitions and macros for MCF_I2C_I2SR */ -#define MCF_I2C_I2SR_RXAK (0x1) -#define MCF_I2C_I2SR_IIF (0x2) -#define MCF_I2C_I2SR_SRW (0x4) -#define MCF_I2C_I2SR_IAL (0x10) -#define MCF_I2C_I2SR_IBB (0x20) -#define MCF_I2C_I2SR_IAAS (0x40) -#define MCF_I2C_I2SR_ICF (0x80) - -/* Bit definitions and macros for MCF_I2C_I2DR */ -#define MCF_I2C_I2DR_DATA(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_I2C_I2ICR */ -#define MCF_I2C_I2ICR_IE (0x1) -#define MCF_I2C_I2ICR_RE (0x2) -#define MCF_I2C_I2ICR_TE (0x4) -#define MCF_I2C_I2ICR_BNBE (0x8) - - -#endif /* __MCF5475_I2C_H__ */ diff --git a/tos/vmem_test/include/MCF5475_INTC.h b/tos/vmem_test/include/MCF5475_INTC.h deleted file mode 100644 index 61265ed..0000000 --- a/tos/vmem_test/include/MCF5475_INTC.h +++ /dev/null @@ -1,331 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_INTC_H__ -#define __MCF5475_INTC_H__ - - -/********************************************************************* -* -* Interrupt Controller (INTC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_INTC_IPRH (*(volatile uint32_t*)(&_MBAR[0x700])) -#define MCF_INTC_IPRL (*(volatile uint32_t*)(&_MBAR[0x704])) -#define MCF_INTC_IMRH (*(volatile uint32_t*)(&_MBAR[0x708])) -#define MCF_INTC_IMRL (*(volatile uint32_t*)(&_MBAR[0x70C])) -#define MCF_INTC_INTFRCH (*(volatile uint32_t*)(&_MBAR[0x710])) -#define MCF_INTC_INTFRCL (*(volatile uint32_t*)(&_MBAR[0x714])) -#define MCF_INTC_IRLR (*(volatile uint8_t *)(&_MBAR[0x718])) -#define MCF_INTC_IACKLPR (*(volatile uint8_t *)(&_MBAR[0x719])) -#define MCF_INTC_ICR01 (*(volatile uint8_t *)(&_MBAR[0x741])) -#define MCF_INTC_ICR02 (*(volatile uint8_t *)(&_MBAR[0x742])) -#define MCF_INTC_ICR03 (*(volatile uint8_t *)(&_MBAR[0x743])) -#define MCF_INTC_ICR04 (*(volatile uint8_t *)(&_MBAR[0x744])) -#define MCF_INTC_ICR05 (*(volatile uint8_t *)(&_MBAR[0x745])) -#define MCF_INTC_ICR06 (*(volatile uint8_t *)(&_MBAR[0x746])) -#define MCF_INTC_ICR07 (*(volatile uint8_t *)(&_MBAR[0x747])) -#define MCF_INTC_ICR08 (*(volatile uint8_t *)(&_MBAR[0x748])) -#define MCF_INTC_ICR09 (*(volatile uint8_t *)(&_MBAR[0x749])) -#define MCF_INTC_ICR10 (*(volatile uint8_t *)(&_MBAR[0x74A])) -#define MCF_INTC_ICR11 (*(volatile uint8_t *)(&_MBAR[0x74B])) -#define MCF_INTC_ICR12 (*(volatile uint8_t *)(&_MBAR[0x74C])) -#define MCF_INTC_ICR13 (*(volatile uint8_t *)(&_MBAR[0x74D])) -#define MCF_INTC_ICR14 (*(volatile uint8_t *)(&_MBAR[0x74E])) -#define MCF_INTC_ICR15 (*(volatile uint8_t *)(&_MBAR[0x74F])) -#define MCF_INTC_ICR16 (*(volatile uint8_t *)(&_MBAR[0x750])) -#define MCF_INTC_ICR17 (*(volatile uint8_t *)(&_MBAR[0x751])) -#define MCF_INTC_ICR18 (*(volatile uint8_t *)(&_MBAR[0x752])) -#define MCF_INTC_ICR19 (*(volatile uint8_t *)(&_MBAR[0x753])) -#define MCF_INTC_ICR20 (*(volatile uint8_t *)(&_MBAR[0x754])) -#define MCF_INTC_ICR21 (*(volatile uint8_t *)(&_MBAR[0x755])) -#define MCF_INTC_ICR22 (*(volatile uint8_t *)(&_MBAR[0x756])) -#define MCF_INTC_ICR23 (*(volatile uint8_t *)(&_MBAR[0x757])) -#define MCF_INTC_ICR24 (*(volatile uint8_t *)(&_MBAR[0x758])) -#define MCF_INTC_ICR25 (*(volatile uint8_t *)(&_MBAR[0x759])) -#define MCF_INTC_ICR26 (*(volatile uint8_t *)(&_MBAR[0x75A])) -#define MCF_INTC_ICR27 (*(volatile uint8_t *)(&_MBAR[0x75B])) -#define MCF_INTC_ICR28 (*(volatile uint8_t *)(&_MBAR[0x75C])) -#define MCF_INTC_ICR29 (*(volatile uint8_t *)(&_MBAR[0x75D])) -#define MCF_INTC_ICR30 (*(volatile uint8_t *)(&_MBAR[0x75E])) -#define MCF_INTC_ICR31 (*(volatile uint8_t *)(&_MBAR[0x75F])) -#define MCF_INTC_ICR32 (*(volatile uint8_t *)(&_MBAR[0x760])) -#define MCF_INTC_ICR33 (*(volatile uint8_t *)(&_MBAR[0x761])) -#define MCF_INTC_ICR34 (*(volatile uint8_t *)(&_MBAR[0x762])) -#define MCF_INTC_ICR35 (*(volatile uint8_t *)(&_MBAR[0x763])) -#define MCF_INTC_ICR36 (*(volatile uint8_t *)(&_MBAR[0x764])) -#define MCF_INTC_ICR37 (*(volatile uint8_t *)(&_MBAR[0x765])) -#define MCF_INTC_ICR38 (*(volatile uint8_t *)(&_MBAR[0x766])) -#define MCF_INTC_ICR39 (*(volatile uint8_t *)(&_MBAR[0x767])) -#define MCF_INTC_ICR40 (*(volatile uint8_t *)(&_MBAR[0x768])) -#define MCF_INTC_ICR41 (*(volatile uint8_t *)(&_MBAR[0x769])) -#define MCF_INTC_ICR42 (*(volatile uint8_t *)(&_MBAR[0x76A])) -#define MCF_INTC_ICR43 (*(volatile uint8_t *)(&_MBAR[0x76B])) -#define MCF_INTC_ICR44 (*(volatile uint8_t *)(&_MBAR[0x76C])) -#define MCF_INTC_ICR45 (*(volatile uint8_t *)(&_MBAR[0x76D])) -#define MCF_INTC_ICR46 (*(volatile uint8_t *)(&_MBAR[0x76E])) -#define MCF_INTC_ICR47 (*(volatile uint8_t *)(&_MBAR[0x76F])) -#define MCF_INTC_ICR48 (*(volatile uint8_t *)(&_MBAR[0x770])) -#define MCF_INTC_ICR49 (*(volatile uint8_t *)(&_MBAR[0x771])) -#define MCF_INTC_ICR50 (*(volatile uint8_t *)(&_MBAR[0x772])) -#define MCF_INTC_ICR51 (*(volatile uint8_t *)(&_MBAR[0x773])) -#define MCF_INTC_ICR52 (*(volatile uint8_t *)(&_MBAR[0x774])) -#define MCF_INTC_ICR53 (*(volatile uint8_t *)(&_MBAR[0x775])) -#define MCF_INTC_ICR54 (*(volatile uint8_t *)(&_MBAR[0x776])) -#define MCF_INTC_ICR55 (*(volatile uint8_t *)(&_MBAR[0x777])) -#define MCF_INTC_ICR56 (*(volatile uint8_t *)(&_MBAR[0x778])) -#define MCF_INTC_ICR57 (*(volatile uint8_t *)(&_MBAR[0x779])) -#define MCF_INTC_ICR58 (*(volatile uint8_t *)(&_MBAR[0x77A])) -#define MCF_INTC_ICR59 (*(volatile uint8_t *)(&_MBAR[0x77B])) -#define MCF_INTC_ICR60 (*(volatile uint8_t *)(&_MBAR[0x77C])) -#define MCF_INTC_ICR61 (*(volatile uint8_t *)(&_MBAR[0x77D])) -#define MCF_INTC_ICR62 (*(volatile uint8_t *)(&_MBAR[0x77E])) -#define MCF_INTC_ICR63 (*(volatile uint8_t *)(&_MBAR[0x77F])) -#define MCF_INTC_SWIACK (*(volatile uint8_t *)(&_MBAR[0x7E0])) -#define MCF_INTC_L1IACK (*(volatile uint8_t *)(&_MBAR[0x7E4])) -#define MCF_INTC_L2IACK (*(volatile uint8_t *)(&_MBAR[0x7E8])) -#define MCF_INTC_L3IACK (*(volatile uint8_t *)(&_MBAR[0x7EC])) -#define MCF_INTC_L4IACK (*(volatile uint8_t *)(&_MBAR[0x7F0])) -#define MCF_INTC_L5IACK (*(volatile uint8_t *)(&_MBAR[0x7F4])) -#define MCF_INTC_L6IACK (*(volatile uint8_t *)(&_MBAR[0x7F8])) -#define MCF_INTC_L7IACK (*(volatile uint8_t *)(&_MBAR[0x7FC])) -#define MCF_INTC_ICR(x) (*(volatile uint8_t *)(&_MBAR[0x741 + ((x-1)*0x1)])) -#define MCF_INTC_LIACK(x) (*(volatile uint8_t *)(&_MBAR[0x7E4 + ((x-1)*0x4)])) - - - -/* Bit definitions and macros for MCF_INTC_IPRH */ -#define MCF_INTC_IPRH_INT32 (0x1) -#define MCF_INTC_IPRH_INT33 (0x2) -#define MCF_INTC_IPRH_INT34 (0x4) -#define MCF_INTC_IPRH_INT35 (0x8) -#define MCF_INTC_IPRH_INT36 (0x10) -#define MCF_INTC_IPRH_INT37 (0x20) -#define MCF_INTC_IPRH_INT38 (0x40) -#define MCF_INTC_IPRH_INT39 (0x80) -#define MCF_INTC_IPRH_INT40 (0x100) -#define MCF_INTC_IPRH_INT41 (0x200) -#define MCF_INTC_IPRH_INT42 (0x400) -#define MCF_INTC_IPRH_INT43 (0x800) -#define MCF_INTC_IPRH_INT44 (0x1000) -#define MCF_INTC_IPRH_INT45 (0x2000) -#define MCF_INTC_IPRH_INT46 (0x4000) -#define MCF_INTC_IPRH_INT47 (0x8000) -#define MCF_INTC_IPRH_INT48 (0x10000) -#define MCF_INTC_IPRH_INT49 (0x20000) -#define MCF_INTC_IPRH_INT50 (0x40000) -#define MCF_INTC_IPRH_INT51 (0x80000) -#define MCF_INTC_IPRH_INT52 (0x100000) -#define MCF_INTC_IPRH_INT53 (0x200000) -#define MCF_INTC_IPRH_INT54 (0x400000) -#define MCF_INTC_IPRH_INT55 (0x800000) -#define MCF_INTC_IPRH_INT56 (0x1000000) -#define MCF_INTC_IPRH_INT57 (0x2000000) -#define MCF_INTC_IPRH_INT58 (0x4000000) -#define MCF_INTC_IPRH_INT59 (0x8000000) -#define MCF_INTC_IPRH_INT60 (0x10000000) -#define MCF_INTC_IPRH_INT61 (0x20000000) -#define MCF_INTC_IPRH_INT62 (0x40000000) -#define MCF_INTC_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IPRL */ -#define MCF_INTC_IPRL_INT1 (0x2) -#define MCF_INTC_IPRL_INT2 (0x4) -#define MCF_INTC_IPRL_INT3 (0x8) -#define MCF_INTC_IPRL_INT4 (0x10) -#define MCF_INTC_IPRL_INT5 (0x20) -#define MCF_INTC_IPRL_INT6 (0x40) -#define MCF_INTC_IPRL_INT7 (0x80) -#define MCF_INTC_IPRL_INT8 (0x100) -#define MCF_INTC_IPRL_INT9 (0x200) -#define MCF_INTC_IPRL_INT10 (0x400) -#define MCF_INTC_IPRL_INT11 (0x800) -#define MCF_INTC_IPRL_INT12 (0x1000) -#define MCF_INTC_IPRL_INT13 (0x2000) -#define MCF_INTC_IPRL_INT14 (0x4000) -#define MCF_INTC_IPRL_INT15 (0x8000) -#define MCF_INTC_IPRL_INT16 (0x10000) -#define MCF_INTC_IPRL_INT17 (0x20000) -#define MCF_INTC_IPRL_INT18 (0x40000) -#define MCF_INTC_IPRL_INT19 (0x80000) -#define MCF_INTC_IPRL_INT20 (0x100000) -#define MCF_INTC_IPRL_INT21 (0x200000) -#define MCF_INTC_IPRL_INT22 (0x400000) -#define MCF_INTC_IPRL_INT23 (0x800000) -#define MCF_INTC_IPRL_INT24 (0x1000000) -#define MCF_INTC_IPRL_INT25 (0x2000000) -#define MCF_INTC_IPRL_INT26 (0x4000000) -#define MCF_INTC_IPRL_INT27 (0x8000000) -#define MCF_INTC_IPRL_INT28 (0x10000000) -#define MCF_INTC_IPRL_INT29 (0x20000000) -#define MCF_INTC_IPRL_INT30 (0x40000000) -#define MCF_INTC_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IMRH */ -#define MCF_INTC_IMRH_INT_MASK32 (0x1) -#define MCF_INTC_IMRH_INT_MASK33 (0x2) -#define MCF_INTC_IMRH_INT_MASK34 (0x4) -#define MCF_INTC_IMRH_INT_MASK35 (0x8) -#define MCF_INTC_IMRH_INT_MASK36 (0x10) -#define MCF_INTC_IMRH_INT_MASK37 (0x20) -#define MCF_INTC_IMRH_INT_MASK38 (0x40) -#define MCF_INTC_IMRH_INT_MASK39 (0x80) -#define MCF_INTC_IMRH_INT_MASK40 (0x100) -#define MCF_INTC_IMRH_INT_MASK41 (0x200) -#define MCF_INTC_IMRH_INT_MASK42 (0x400) -#define MCF_INTC_IMRH_INT_MASK43 (0x800) -#define MCF_INTC_IMRH_INT_MASK44 (0x1000) -#define MCF_INTC_IMRH_INT_MASK45 (0x2000) -#define MCF_INTC_IMRH_INT_MASK46 (0x4000) -#define MCF_INTC_IMRH_INT_MASK47 (0x8000) -#define MCF_INTC_IMRH_INT_MASK48 (0x10000) -#define MCF_INTC_IMRH_INT_MASK49 (0x20000) -#define MCF_INTC_IMRH_INT_MASK50 (0x40000) -#define MCF_INTC_IMRH_INT_MASK51 (0x80000) -#define MCF_INTC_IMRH_INT_MASK52 (0x100000) -#define MCF_INTC_IMRH_INT_MASK53 (0x200000) -#define MCF_INTC_IMRH_INT_MASK54 (0x400000) -#define MCF_INTC_IMRH_INT_MASK55 (0x800000) -#define MCF_INTC_IMRH_INT_MASK56 (0x1000000) -#define MCF_INTC_IMRH_INT_MASK57 (0x2000000) -#define MCF_INTC_IMRH_INT_MASK58 (0x4000000) -#define MCF_INTC_IMRH_INT_MASK59 (0x8000000) -#define MCF_INTC_IMRH_INT_MASK60 (0x10000000) -#define MCF_INTC_IMRH_INT_MASK61 (0x20000000) -#define MCF_INTC_IMRH_INT_MASK62 (0x40000000) -#define MCF_INTC_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IMRL */ -#define MCF_INTC_IMRL_MASKALL (0x1) -#define MCF_INTC_IMRL_INT_MASK1 (0x2) -#define MCF_INTC_IMRL_INT_MASK2 (0x4) -#define MCF_INTC_IMRL_INT_MASK3 (0x8) -#define MCF_INTC_IMRL_INT_MASK4 (0x10) -#define MCF_INTC_IMRL_INT_MASK5 (0x20) -#define MCF_INTC_IMRL_INT_MASK6 (0x40) -#define MCF_INTC_IMRL_INT_MASK7 (0x80) -#define MCF_INTC_IMRL_INT_MASK8 (0x100) -#define MCF_INTC_IMRL_INT_MASK9 (0x200) -#define MCF_INTC_IMRL_INT_MASK10 (0x400) -#define MCF_INTC_IMRL_INT_MASK11 (0x800) -#define MCF_INTC_IMRL_INT_MASK12 (0x1000) -#define MCF_INTC_IMRL_INT_MASK13 (0x2000) -#define MCF_INTC_IMRL_INT_MASK14 (0x4000) -#define MCF_INTC_IMRL_INT_MASK15 (0x8000) -#define MCF_INTC_IMRL_INT_MASK16 (0x10000) -#define MCF_INTC_IMRL_INT_MASK17 (0x20000) -#define MCF_INTC_IMRL_INT_MASK18 (0x40000) -#define MCF_INTC_IMRL_INT_MASK19 (0x80000) -#define MCF_INTC_IMRL_INT_MASK20 (0x100000) -#define MCF_INTC_IMRL_INT_MASK21 (0x200000) -#define MCF_INTC_IMRL_INT_MASK22 (0x400000) -#define MCF_INTC_IMRL_INT_MASK23 (0x800000) -#define MCF_INTC_IMRL_INT_MASK24 (0x1000000) -#define MCF_INTC_IMRL_INT_MASK25 (0x2000000) -#define MCF_INTC_IMRL_INT_MASK26 (0x4000000) -#define MCF_INTC_IMRL_INT_MASK27 (0x8000000) -#define MCF_INTC_IMRL_INT_MASK28 (0x10000000) -#define MCF_INTC_IMRL_INT_MASK29 (0x20000000) -#define MCF_INTC_IMRL_INT_MASK30 (0x40000000) -#define MCF_INTC_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_INTFRCH */ -#define MCF_INTC_INTFRCH_INTFRC32 (0x1) -#define MCF_INTC_INTFRCH_INTFRC33 (0x2) -#define MCF_INTC_INTFRCH_INTFRC34 (0x4) -#define MCF_INTC_INTFRCH_INTFRC35 (0x8) -#define MCF_INTC_INTFRCH_INTFRC36 (0x10) -#define MCF_INTC_INTFRCH_INTFRC37 (0x20) -#define MCF_INTC_INTFRCH_INTFRC38 (0x40) -#define MCF_INTC_INTFRCH_INTFRC39 (0x80) -#define MCF_INTC_INTFRCH_INTFRC40 (0x100) -#define MCF_INTC_INTFRCH_INTFRC41 (0x200) -#define MCF_INTC_INTFRCH_INTFRC42 (0x400) -#define MCF_INTC_INTFRCH_INTFRC43 (0x800) -#define MCF_INTC_INTFRCH_INTFRC44 (0x1000) -#define MCF_INTC_INTFRCH_INTFRC45 (0x2000) -#define MCF_INTC_INTFRCH_INTFRC46 (0x4000) -#define MCF_INTC_INTFRCH_INTFRC47 (0x8000) -#define MCF_INTC_INTFRCH_INTFRC48 (0x10000) -#define MCF_INTC_INTFRCH_INTFRC49 (0x20000) -#define MCF_INTC_INTFRCH_INTFRC50 (0x40000) -#define MCF_INTC_INTFRCH_INTFRC51 (0x80000) -#define MCF_INTC_INTFRCH_INTFRC52 (0x100000) -#define MCF_INTC_INTFRCH_INTFRC53 (0x200000) -#define MCF_INTC_INTFRCH_INTFRC54 (0x400000) -#define MCF_INTC_INTFRCH_INTFRC55 (0x800000) -#define MCF_INTC_INTFRCH_INTFRC56 (0x1000000) -#define MCF_INTC_INTFRCH_INTFRC57 (0x2000000) -#define MCF_INTC_INTFRCH_INTFRC58 (0x4000000) -#define MCF_INTC_INTFRCH_INTFRC59 (0x8000000) -#define MCF_INTC_INTFRCH_INTFRC60 (0x10000000) -#define MCF_INTC_INTFRCH_INTFRC61 (0x20000000) -#define MCF_INTC_INTFRCH_INTFRC62 (0x40000000) -#define MCF_INTC_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_INTFRCL */ -#define MCF_INTC_INTFRCL_INTFRC1 (0x2) -#define MCF_INTC_INTFRCL_INTFRC2 (0x4) -#define MCF_INTC_INTFRCL_INTFRC3 (0x8) -#define MCF_INTC_INTFRCL_INTFRC4 (0x10) -#define MCF_INTC_INTFRCL_INTFRC5 (0x20) -#define MCF_INTC_INTFRCL_INTFRC6 (0x40) -#define MCF_INTC_INTFRCL_INTFRC7 (0x80) -#define MCF_INTC_INTFRCL_INTFRC8 (0x100) -#define MCF_INTC_INTFRCL_INTFRC9 (0x200) -#define MCF_INTC_INTFRCL_INTFRC10 (0x400) -#define MCF_INTC_INTFRCL_INTFRC11 (0x800) -#define MCF_INTC_INTFRCL_INTFRC12 (0x1000) -#define MCF_INTC_INTFRCL_INTFRC13 (0x2000) -#define MCF_INTC_INTFRCL_INTFRC14 (0x4000) -#define MCF_INTC_INTFRCL_INTFRC15 (0x8000) -#define MCF_INTC_INTFRCL_INTFRC16 (0x10000) -#define MCF_INTC_INTFRCL_INTFRC17 (0x20000) -#define MCF_INTC_INTFRCL_INTFRC18 (0x40000) -#define MCF_INTC_INTFRCL_INTFRC19 (0x80000) -#define MCF_INTC_INTFRCL_INTFRC20 (0x100000) -#define MCF_INTC_INTFRCL_INTFRC21 (0x200000) -#define MCF_INTC_INTFRCL_INTFRC22 (0x400000) -#define MCF_INTC_INTFRCL_INTFRC23 (0x800000) -#define MCF_INTC_INTFRCL_INTFRC24 (0x1000000) -#define MCF_INTC_INTFRCL_INTFRC25 (0x2000000) -#define MCF_INTC_INTFRCL_INTFRC26 (0x4000000) -#define MCF_INTC_INTFRCL_INTFRC27 (0x8000000) -#define MCF_INTC_INTFRCL_INTFRC28 (0x10000000) -#define MCF_INTC_INTFRCL_INTFRC29 (0x20000000) -#define MCF_INTC_INTFRCL_INTFRC30 (0x40000000) -#define MCF_INTC_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IRLR */ -#define MCF_INTC_IRLR_IRQ(x) (((x)&0x7F)<<0x1) - -/* Bit definitions and macros for MCF_INTC_IACKLPR */ -#define MCF_INTC_IACKLPR_PRI(x) (((x)&0xF)<<0) -#define MCF_INTC_IACKLPR_LEVEL(x) (((x)&0x7)<<0x4) - -/* Bit definitions and macros for MCF_INTC_ICR */ -#define MCF_INTC_ICR_IP(x) (((x)&0x7)<<0) -#define MCF_INTC_ICR_IL(x) (((x)&0x7)<<0x3) - -/* Bit definitions and macros for MCF_INTC_SWIACK */ -#define MCF_INTC_SWIACK_VECTOR(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_INTC_LIACK */ -#define MCF_INTC_LIACK_VECTOR(x) (((x)&0xFF)<<0) - - -#endif /* __MCF5475_INTC_H__ */ diff --git a/tos/vmem_test/include/MCF5475_MMU.h b/tos/vmem_test/include/MCF5475_MMU.h deleted file mode 100644 index 334ad28..0000000 --- a/tos/vmem_test/include/MCF5475_MMU.h +++ /dev/null @@ -1,79 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_MMU_H__ -#define __MCF5475_MMU_H__ - - -/********************************************************************* -* -* Memory Management Unit (MMU) -* -*********************************************************************/ - -/* Register read/write macros */ - -/* note the uint32_t_a - this is to avoid gcc warnings about pointer aliasing */ -#define MCF_MMU_MMUCR (*(volatile uint32_t_a*)(&_MMUBAR[0])) -#define MCF_MMU_MMUOR (*(volatile uint32_t_a*)(&_MMUBAR[0x4])) -#define MCF_MMU_MMUSR (*(volatile uint32_t_a*)(&_MMUBAR[0x8])) -#define MCF_MMU_MMUAR (*(volatile uint32_t_a*)(&_MMUBAR[0x10])) -#define MCF_MMU_MMUTR (*(volatile uint32_t_a*)(&_MMUBAR[0x14])) -#define MCF_MMU_MMUDR (*(volatile uint32_t_a*)(&_MMUBAR[0x18])) - - -/* Bit definitions and macros for MCF_MMU_MMUCR */ -#define MCF_MMU_MMUCR_EN (0x1) -#define MCF_MMU_MMUCR_ASM (0x2) - -/* Bit definitions and macros for MCF_MMU_MMUOR */ -#define MCF_MMU_MMUOR_UAA (0x1) -#define MCF_MMU_MMUOR_ACC (0x2) -#define MCF_MMU_MMUOR_RW (0x4) -#define MCF_MMU_MMUOR_ADR (0x8) -#define MCF_MMU_MMUOR_ITLB (0x10) -#define MCF_MMU_MMUOR_CAS (0x20) -#define MCF_MMU_MMUOR_CNL (0x40) -#define MCF_MMU_MMUOR_CA (0x80) -#define MCF_MMU_MMUOR_STLB (0x100) -#define MCF_MMU_MMUOR_AA(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_MMU_MMUSR */ -#define MCF_MMU_MMUSR_HIT (0x2) -#define MCF_MMU_MMUSR_WF (0x8) -#define MCF_MMU_MMUSR_RF (0x10) -#define MCF_MMU_MMUSR_SPF (0x20) - -/* Bit definitions and macros for MCF_MMU_MMUAR */ -#define MCF_MMU_MMUAR_FA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_MMU_MMUTR */ -#define MCF_MMU_MMUTR_V (0x1) -#define MCF_MMU_MMUTR_SG (0x2) -#define MCF_MMU_MMUTR_ID(x) (((x)&0xFF)<<0x2) -#define MCF_MMU_MMUTR_VA(x) (((x)&0x3FFFFF)<<0xA) - -/* Bit definitions and macros for MCF_MMU_MMUDR */ -#define MCF_MMU_MMUDR_LK (0x2) -#define MCF_MMU_MMUDR_X (0x4) -#define MCF_MMU_MMUDR_W (0x8) -#define MCF_MMU_MMUDR_R (0x10) -#define MCF_MMU_MMUDR_SP (0x20) -#define MCF_MMU_MMUDR_CM(x) (((x)&0x3)<<0x6) -#define MCF_MMU_MMUDR_SZ(x) (((x)&0x3)<<0x8) -#define MCF_MMU_MMUDR_PA(x) (((x)&0x3FFFFF)<<0xA) - - -#endif /* __MCF5475_MMU_H__ */ diff --git a/tos/vmem_test/include/MCF5475_PAD.h b/tos/vmem_test/include/MCF5475_PAD.h deleted file mode 100644 index 1d87e2e..0000000 --- a/tos/vmem_test/include/MCF5475_PAD.h +++ /dev/null @@ -1,233 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_PAD_H__ -#define __MCF5475_PAD_H__ - - -/********************************************************************* -* -* Common GPIO -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PAD_PAR_FBCTL (*(volatile uint16_t*)(&_MBAR[0xA40])) -#define MCF_PAD_PAR_FBCS (*(volatile uint8_t *)(&_MBAR[0xA42])) -#define MCF_PAD_PAR_DMA (*(volatile uint8_t *)(&_MBAR[0xA43])) -#define MCF_PAD_PAR_FECI2CIRQ (*(volatile uint16_t*)(&_MBAR[0xA44])) -#define MCF_PAD_PAR_PCIBG (*(volatile uint16_t*)(&_MBAR[0xA48])) -#define MCF_PAD_PAR_PCIBR (*(volatile uint16_t*)(&_MBAR[0xA4A])) -#define MCF_PAD_PAR_PSC3 (*(volatile uint8_t *)(&_MBAR[0xA4C])) -#define MCF_PAD_PAR_PSC2 (*(volatile uint8_t *)(&_MBAR[0xA4D])) -#define MCF_PAD_PAR_PSC1 (*(volatile uint8_t *)(&_MBAR[0xA4E])) -#define MCF_PAD_PAR_PSC0 (*(volatile uint8_t *)(&_MBAR[0xA4F])) -#define MCF_PAD_PAR_DSPI (*(volatile uint16_t*)(&_MBAR[0xA50])) -#define MCF_PAD_PAR_TIMER (*(volatile uint8_t *)(&_MBAR[0xA52])) - - -/* Bit definitions and macros for MCF_PAD_PAR_FBCTL */ -#define MCF_PAD_PAR_FBCTL_PAR_ALE(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_FBCTL_PAR_ALE_GPIO (0) -#define MCF_PAD_PAR_FBCTL_PAR_ALE_TBST (0x2) -#define MCF_PAD_PAR_FBCTL_PAR_ALE_ALE (0x3) -#define MCF_PAD_PAR_FBCTL_PAR_TA (0x4) -#define MCF_PAD_PAR_FBCTL_PAR_RWB(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_FBCTL_PAR_RWB_GPIO (0) -#define MCF_PAD_PAR_FBCTL_PAR_RWB_TBST (0x20) -#define MCF_PAD_PAR_FBCTL_PAR_RWB_RW (0x30) -#define MCF_PAD_PAR_FBCTL_PAR_OE (0x40) -#define MCF_PAD_PAR_FBCTL_PAR_BWE0 (0x100) -#define MCF_PAD_PAR_FBCTL_PAR_BWE1 (0x400) -#define MCF_PAD_PAR_FBCTL_PAR_BWE2 (0x1000) -#define MCF_PAD_PAR_FBCTL_PAR_BWE3 (0x4000) - -/* Bit definitions and macros for MCF_PAD_PAR_FBCS */ -#define MCF_PAD_PAR_FBCS_PAR_CS1 (0x2) -#define MCF_PAD_PAR_FBCS_PAR_CS2 (0x4) -#define MCF_PAD_PAR_FBCS_PAR_CS3 (0x8) -#define MCF_PAD_PAR_FBCS_PAR_CS4 (0x10) -#define MCF_PAD_PAR_FBCS_PAR_CS5 (0x20) - -/* Bit definitions and macros for MCF_PAD_PAR_DMA */ -#define MCF_PAD_PAR_DMA_PAR_DREQ0(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_DMA_PAR_DREQ0_GPIO (0) -#define MCF_PAD_PAR_DMA_PAR_DREQ0_TIN0 (0x2) -#define MCF_PAD_PAR_DMA_PAR_DREQ0_DREQ0 (0x3) -#define MCF_PAD_PAR_DMA_PAR_DREQ1(x) (((x)&0x3)<<0x2) -#define MCF_PAD_PAR_DMA_PAR_DREQ1_GPIO (0) -#define MCF_PAD_PAR_DMA_PAR_DREQ1_IRQ1 (0x4) -#define MCF_PAD_PAR_DMA_PAR_DREQ1_TIN1 (0x8) -#define MCF_PAD_PAR_DMA_PAR_DREQ1_DREQ1 (0xC) -#define MCF_PAD_PAR_DMA_PAR_DACK0(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_DMA_PAR_DACK0_GPIO (0) -#define MCF_PAD_PAR_DMA_PAR_DACK0_TOUT0 (0x20) -#define MCF_PAD_PAR_DMA_PAR_DACK0_DACK0 (0x30) -#define MCF_PAD_PAR_DMA_PAR_DACK1(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_DMA_PAR_DACK1_GPIO (0) -#define MCF_PAD_PAR_DMA_PAR_DACK1_TOUT1 (0x80) -#define MCF_PAD_PAR_DMA_PAR_DACK1_DACK1 (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_FECI2CIRQ */ -#define MCF_PAD_PAR_FECI2CIRQ_PAR_IRQ5 (0x1) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_IRQ6 (0x2) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_SCL (0x4) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_SDA (0x8) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDC(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDC_SCL (0x80) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDC_E1MDC (0xC0) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDIO(x) (((x)&0x3)<<0x8) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDIO_SDA (0x200) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MDIO_E1MDIO (0x300) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E1MII (0x400) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E17 (0x800) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E0MDC (0x1000) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E0MDIO (0x2000) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E0MII (0x4000) -#define MCF_PAD_PAR_FECI2CIRQ_PAR_E07 (0x8000) - -/* Bit definitions and macros for MCF_PAD_PAR_PCIBG */ -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG0(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG0_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG0_TOUT0 (0x2) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG0_PCIBG0 (0x3) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG1(x) (((x)&0x3)<<0x2) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG1_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG1_TOUT1 (0x8) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG1_PCIBG1 (0xC) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG2(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG2_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG2_TOUT2 (0x20) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG2_PCIBG2 (0x30) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG3(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG3_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG3_TOUT3 (0x80) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG3_PCIBG3 (0xC0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG4(x) (((x)&0x3)<<0x8) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG4_GPIO (0) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG4_TBST (0x200) -#define MCF_PAD_PAR_PCIBG_PAR_PCIBG4_PCIBG4 (0x300) - -/* Bit definitions and macros for MCF_PAD_PAR_PCIBR */ -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR0(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR0_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR0_TIN0 (0x2) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR0_PCIBR0 (0x3) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR1(x) (((x)&0x3)<<0x2) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR1_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR1_TIN1 (0x8) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR1_PCIBR1 (0xC) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR2(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR2_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR2_TIN2 (0x20) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR2_PCIBR2 (0x30) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR3(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR3_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR3_TIN3 (0x80) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR3_PCIBR3 (0xC0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR4(x) (((x)&0x3)<<0x8) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR4_GPIO (0) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR4_IRQ4 (0x200) -#define MCF_PAD_PAR_PCIBR_PAR_PCIBR4_PCIBR4 (0x300) - -/* Bit definitions and macros for MCF_PAD_PAR_PSC3 */ -#define MCF_PAD_PAR_PSC3_PAR_TXD3 (0x4) -#define MCF_PAD_PAR_PSC3_PAR_RXD3 (0x8) -#define MCF_PAD_PAR_PSC3_PAR_RTS3(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PSC3_PAR_RTS3_GPIO (0) -#define MCF_PAD_PAR_PSC3_PAR_RTS3_FSYNC (0x20) -#define MCF_PAD_PAR_PSC3_PAR_RTS3_RTS (0x30) -#define MCF_PAD_PAR_PSC3_PAR_CTS3(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PSC3_PAR_CTS3_GPIO (0) -#define MCF_PAD_PAR_PSC3_PAR_CTS3_BCLK (0x80) -#define MCF_PAD_PAR_PSC3_PAR_CTS3_CTS (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_PSC2 */ -#define MCF_PAD_PAR_PSC2_PAR_TXD2 (0x4) -#define MCF_PAD_PAR_PSC2_PAR_RXD2 (0x8) -#define MCF_PAD_PAR_PSC2_PAR_RTS2(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PSC2_PAR_RTS2_GPIO (0) -#define MCF_PAD_PAR_PSC2_PAR_RTS2_FSYNC (0x20) -#define MCF_PAD_PAR_PSC2_PAR_RTS2_RTS (0x30) -#define MCF_PAD_PAR_PSC2_PAR_CTS2(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PSC2_PAR_CTS2_GPIO (0) -#define MCF_PAD_PAR_PSC2_PAR_CTS2_BCLK (0x80) -#define MCF_PAD_PAR_PSC2_PAR_CTS2_CTS (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_PSC1 */ -#define MCF_PAD_PAR_PSC1_PAR_TXD1 (0x4) -#define MCF_PAD_PAR_PSC1_PAR_RXD1 (0x8) -#define MCF_PAD_PAR_PSC1_PAR_RTS1(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PSC1_PAR_RTS1_GPIO (0) -#define MCF_PAD_PAR_PSC1_PAR_RTS1_FSYNC (0x20) -#define MCF_PAD_PAR_PSC1_PAR_RTS1_RTS (0x30) -#define MCF_PAD_PAR_PSC1_PAR_CTS1(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PSC1_PAR_CTS1_GPIO (0) -#define MCF_PAD_PAR_PSC1_PAR_CTS1_BCLK (0x80) -#define MCF_PAD_PAR_PSC1_PAR_CTS1_CTS (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_PSC0 */ -#define MCF_PAD_PAR_PSC0_PAR_TXD0 (0x4) -#define MCF_PAD_PAR_PSC0_PAR_RXD0 (0x8) -#define MCF_PAD_PAR_PSC0_PAR_RTS0(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_PSC0_PAR_RTS0_GPIO (0) -#define MCF_PAD_PAR_PSC0_PAR_RTS0_FSYNC (0x20) -#define MCF_PAD_PAR_PSC0_PAR_RTS0_RTS (0x30) -#define MCF_PAD_PAR_PSC0_PAR_CTS0(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_PSC0_PAR_CTS0_GPIO (0) -#define MCF_PAD_PAR_PSC0_PAR_CTS0_BCLK (0x80) -#define MCF_PAD_PAR_PSC0_PAR_CTS0_CTS (0xC0) - -/* Bit definitions and macros for MCF_PAD_PAR_DSPI */ -#define MCF_PAD_PAR_DSPI_PAR_SOUT(x) (((x)&0x3)<<0) -#define MCF_PAD_PAR_DSPI_PAR_SOUT_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_SOUT_TXD (0x2) -#define MCF_PAD_PAR_DSPI_PAR_SOUT_SOUT (0x3) -#define MCF_PAD_PAR_DSPI_PAR_SIN(x) (((x)&0x3)<<0x2) -#define MCF_PAD_PAR_DSPI_PAR_SIN_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_SIN_RXD (0x8) -#define MCF_PAD_PAR_DSPI_PAR_SIN_SIN (0xC) -#define MCF_PAD_PAR_DSPI_PAR_SCK(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_DSPI_PAR_SCK_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_SCK_BCLK (0x10) -#define MCF_PAD_PAR_DSPI_PAR_SCK_CTS (0x20) -#define MCF_PAD_PAR_DSPI_PAR_SCK_SCK (0x30) -#define MCF_PAD_PAR_DSPI_PAR_CS0(x) (((x)&0x3)<<0x6) -#define MCF_PAD_PAR_DSPI_PAR_CS0_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_CS0_FSYNC (0x40) -#define MCF_PAD_PAR_DSPI_PAR_CS0_RTS (0x80) -#define MCF_PAD_PAR_DSPI_PAR_CS0_DSPICS0 (0xC0) -#define MCF_PAD_PAR_DSPI_PAR_CS2(x) (((x)&0x3)<<0x8) -#define MCF_PAD_PAR_DSPI_PAR_CS2_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_CS2_TOUT2 (0x200) -#define MCF_PAD_PAR_DSPI_PAR_CS2_DSPICS2 (0x300) -#define MCF_PAD_PAR_DSPI_PAR_CS3(x) (((x)&0x3)<<0xA) -#define MCF_PAD_PAR_DSPI_PAR_CS3_GPIO (0) -#define MCF_PAD_PAR_DSPI_PAR_CS3_TOUT3 (0x800) -#define MCF_PAD_PAR_DSPI_PAR_CS3_DSPICS3 (0xC00) -#define MCF_PAD_PAR_DSPI_PAR_CS5 (0x1000) - -/* Bit definitions and macros for MCF_PAD_PAR_TIMER */ -#define MCF_PAD_PAR_TIMER_PAR_TOUT2 (0x1) -#define MCF_PAD_PAR_TIMER_PAR_TIN2(x) (((x)&0x3)<<0x1) -#define MCF_PAD_PAR_TIMER_PAR_TIN2_IRQ2 (0x4) -#define MCF_PAD_PAR_TIMER_PAR_TIN2_TIN2 (0x6) -#define MCF_PAD_PAR_TIMER_PAR_TOUT3 (0x8) -#define MCF_PAD_PAR_TIMER_PAR_TIN3(x) (((x)&0x3)<<0x4) -#define MCF_PAD_PAR_TIMER_PAR_TIN3_IRQ3 (0x20) -#define MCF_PAD_PAR_TIMER_PAR_TIN3_TIN3 (0x30) - - -#endif /* __MCF5475_PAD_H__ */ diff --git a/tos/vmem_test/include/MCF5475_PCI.h b/tos/vmem_test/include/MCF5475_PCI.h deleted file mode 100644 index 3eb3341..0000000 --- a/tos/vmem_test/include/MCF5475_PCI.h +++ /dev/null @@ -1,376 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_PCI_H__ -#define __MCF5475_PCI_H__ - - -/********************************************************************* -* -* PCI Bus Controller (PCI) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PCI_PCIIDR (*(volatile uint32_t*)(&_MBAR[0xB00])) -#define MCF_PCI_PCISCR (*(volatile uint32_t*)(&_MBAR[0xB04])) -#define MCF_PCI_PCICCRIR (*(volatile uint32_t*)(&_MBAR[0xB08])) -#define MCF_PCI_PCICR1 (*(volatile uint32_t*)(&_MBAR[0xB0C])) -#define MCF_PCI_PCIBAR0 (*(volatile uint32_t*)(&_MBAR[0xB10])) -#define MCF_PCI_PCIBAR1 (*(volatile uint32_t*)(&_MBAR[0xB14])) -#define MCF_PCI_PCICCPR (*(volatile uint32_t*)(&_MBAR[0xB28])) -#define MCF_PCI_PCISID (*(volatile uint32_t*)(&_MBAR[0xB2C])) -#define MCF_PCI_PCICR2 (*(volatile uint32_t*)(&_MBAR[0xB3C])) -#define MCF_PCI_PCIGSCR (*(volatile uint32_t*)(&_MBAR[0xB60])) -#define MCF_PCI_PCITBATR0 (*(volatile uint32_t*)(&_MBAR[0xB64])) -#define MCF_PCI_PCITBATR1 (*(volatile uint32_t*)(&_MBAR[0xB68])) -#define MCF_PCI_PCITCR (*(volatile uint32_t*)(&_MBAR[0xB6C])) -#define MCF_PCI_PCIIW0BTAR (*(volatile uint32_t*)(&_MBAR[0xB70])) -#define MCF_PCI_PCIIW1BTAR (*(volatile uint32_t*)(&_MBAR[0xB74])) -#define MCF_PCI_PCIIW2BTAR (*(volatile uint32_t*)(&_MBAR[0xB78])) -#define MCF_PCI_PCIIWCR (*(volatile uint32_t*)(&_MBAR[0xB80])) -#define MCF_PCI_PCIICR (*(volatile uint32_t*)(&_MBAR[0xB84])) -#define MCF_PCI_PCIISR (*(volatile uint32_t*)(&_MBAR[0xB88])) -#define MCF_PCI_PCICAR (*(volatile uint32_t*)(&_MBAR[0xBF8])) -#define MCF_PCI_PCITPSR (*(volatile uint32_t*)(&_MBAR[0x8400])) -#define MCF_PCI_PCITSAR (*(volatile uint32_t*)(&_MBAR[0x8404])) -#define MCF_PCI_PCITTCR (*(volatile uint32_t*)(&_MBAR[0x8408])) -#define MCF_PCI_PCITER (*(volatile uint32_t*)(&_MBAR[0x840C])) -#define MCF_PCI_PCITNAR (*(volatile uint32_t*)(&_MBAR[0x8410])) -#define MCF_PCI_PCITLWR (*(volatile uint32_t*)(&_MBAR[0x8414])) -#define MCF_PCI_PCITDCR (*(volatile uint32_t*)(&_MBAR[0x8418])) -#define MCF_PCI_PCITSR (*(volatile uint32_t*)(&_MBAR[0x841C])) -#define MCF_PCI_PCITFDR (*(volatile uint32_t*)(&_MBAR[0x8440])) -#define MCF_PCI_PCITFSR (*(volatile uint32_t*)(&_MBAR[0x8444])) -#define MCF_PCI_PCITFCR (*(volatile uint32_t*)(&_MBAR[0x8448])) -#define MCF_PCI_PCITFAR (*(volatile uint32_t*)(&_MBAR[0x844C])) -#define MCF_PCI_PCITFRPR (*(volatile uint32_t*)(&_MBAR[0x8450])) -#define MCF_PCI_PCITFWPR (*(volatile uint32_t*)(&_MBAR[0x8454])) -#define MCF_PCI_PCIRPSR (*(volatile uint32_t*)(&_MBAR[0x8480])) -#define MCF_PCI_PCIRSAR (*(volatile uint32_t*)(&_MBAR[0x8484])) -#define MCF_PCI_PCIRTCR (*(volatile uint32_t*)(&_MBAR[0x8488])) -#define MCF_PCI_PCIRER (*(volatile uint32_t*)(&_MBAR[0x848C])) -#define MCF_PCI_PCIRNAR (*(volatile uint32_t*)(&_MBAR[0x8490])) -#define MCF_PCI_PCIRDCR (*(volatile uint32_t*)(&_MBAR[0x8498])) -#define MCF_PCI_PCIRSR (*(volatile uint32_t*)(&_MBAR[0x849C])) -#define MCF_PCI_PCIRFDR (*(volatile uint32_t*)(&_MBAR[0x84C0])) -#define MCF_PCI_PCIRFSR (*(volatile uint32_t*)(&_MBAR[0x84C4])) -#define MCF_PCI_PCIRFCR (*(volatile uint32_t*)(&_MBAR[0x84C8])) -#define MCF_PCI_PCIRFAR (*(volatile uint32_t*)(&_MBAR[0x84CC])) -#define MCF_PCI_PCIRFRPR (*(volatile uint32_t*)(&_MBAR[0x84D0])) -#define MCF_PCI_PCIRFWPR (*(volatile uint32_t*)(&_MBAR[0x84D4])) - - -/* Bit definitions and macros for MCF_PCI_PCIIDR */ -#define MCF_PCI_PCIIDR_VENDORID(x) (((x)&0xFFFF)<<0) -#define MCF_PCI_PCIIDR_DEVICEID(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCISCR */ -#define MCF_PCI_PCISCR_IO (0x1) -#define MCF_PCI_PCISCR_M (0x2) -#define MCF_PCI_PCISCR_B (0x4) -#define MCF_PCI_PCISCR_SP (0x8) -#define MCF_PCI_PCISCR_MW (0x10) -#define MCF_PCI_PCISCR_V (0x20) -#define MCF_PCI_PCISCR_PER (0x40) -#define MCF_PCI_PCISCR_ST (0x80) -#define MCF_PCI_PCISCR_S (0x100) -#define MCF_PCI_PCISCR_F (0x200) -#define MCF_PCI_PCISCR_C (0x100000) -#define MCF_PCI_PCISCR_66M (0x200000) -#define MCF_PCI_PCISCR_R (0x400000) -#define MCF_PCI_PCISCR_FC (0x800000) -#define MCF_PCI_PCISCR_DP (0x1000000) -#define MCF_PCI_PCISCR_DT(x) (((x)&0x3)<<0x19) -#define MCF_PCI_PCISCR_TS (0x8000000) -#define MCF_PCI_PCISCR_TR (0x10000000) -#define MCF_PCI_PCISCR_MA (0x20000000) -#define MCF_PCI_PCISCR_SE (0x40000000) -#define MCF_PCI_PCISCR_PE (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCICCRIR */ -#define MCF_PCI_PCICCRIR_REVISIONID(x) (((x)&0xFF)<<0) -#define MCF_PCI_PCICCRIR_CLASSCODE(x) (((x)&0xFFFFFF)<<0x8) - -/* Bit definitions and macros for MCF_PCI_PCICR1 */ -#define MCF_PCI_PCICR1_CACHELINESIZE(x) (((x)&0xFF)<<0) -#define MCF_PCI_PCICR1_LATTIMER(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCICR1_HEADERTYPE(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCICR1_BIST(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIBAR0 */ -#define MCF_PCI_PCIBAR0_IOM (0x1) -#define MCF_PCI_PCIBAR0_RANGE(x) (((x)&0x3)<<0x1) -#define MCF_PCI_PCIBAR0_PREF (0x8) -#define MCF_PCI_PCIBAR0_BAR0(x) (((x)&0x3FFF)<<0x12) - -/* Bit definitions and macros for MCF_PCI_PCIBAR1 */ -#define MCF_PCI_PCIBAR1_IOM (0x1) -#define MCF_PCI_PCIBAR1_RANGE(x) (((x)&0x3)<<0x1) -#define MCF_PCI_PCIBAR1_PREF (0x8) -#define MCF_PCI_PCIBAR1_BAR1(x) (((x)&0x3)<<0x1E) - -/* Bit definitions and macros for MCF_PCI_PCICCPR */ -#define MCF_PCI_PCICCPR_PCICCP(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCISID */ -#define MCF_PCI_PCISID_VENDORID(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCICR2 */ -#define MCF_PCI_PCICR2_INTLINE(x) (((x)&0xFF)<<0) -#define MCF_PCI_PCICR2_INTPIN(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCICR2_MINGNT(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCICR2_MAXLAT(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIGSCR */ -#define MCF_PCI_PCIGSCR_PR (0x1) -#define MCF_PCI_PCIGSCR_SEE (0x1000) -#define MCF_PCI_PCIGSCR_PEE (0x2000) -#define MCF_PCI_PCIGSCR_CLKINRESERVED(x) (((x)&0x7)<<0x10) -#define MCF_PCI_PCIGSCR_XLB2CLKIN(x) (((x)&0x7)<<0x18) -#define MCF_PCI_PCIGSCR_SE (0x10000000) -#define MCF_PCI_PCIGSCR_PE (0x20000000) - -/* Bit definitions and macros for MCF_PCI_PCITBATR0 */ -#define MCF_PCI_PCITBATR0_EN (0x1) -#define MCF_PCI_PCITBATR0_BAT0(x) (((x)&0x3FFF)<<0x12) - -/* Bit definitions and macros for MCF_PCI_PCITBATR1 */ -#define MCF_PCI_PCITBATR1_EN (0x1) -#define MCF_PCI_PCITBATR1_BAT1(x) (((x)&0x3)<<0x1E) - -/* Bit definitions and macros for MCF_PCI_PCITCR */ -#define MCF_PCI_PCITCR_P (0x10000) -#define MCF_PCI_PCITCR_LD (0x1000000) - -/* Bit definitions and macros for MCF_PCI_PCIIW0BTAR */ -#define MCF_PCI_PCIIW0BTAR_WTA0(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCIIW0BTAR_WAM0(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCIIW0BTAR_WBA0(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIIW1BTAR */ -#define MCF_PCI_PCIIW1BTAR_WTA1(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCIIW1BTAR_WAM1(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCIIW1BTAR_WBA1(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIIW2BTAR */ -#define MCF_PCI_PCIIW2BTAR_WTA2(x) (((x)&0xFF)<<0x8) -#define MCF_PCI_PCIIW2BTAR_WAM2(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCIIW2BTAR_WBA2(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIIWCR */ -#define MCF_PCI_PCIIWCR_WINCTRL2_E (0x100) -#define MCF_PCI_PCIIWCR_WINCTRL2_PRC(x) (((x)&0x3)<<0x9) -#define MCF_PCI_PCIIWCR_WINCTRL2_IOM (0x800) -#define MCF_PCI_PCIIWCR_WINCTRL1_E (0x10000) -#define MCF_PCI_PCIIWCR_WINCTRL1_PRC(x) (((x)&0x3)<<0x11) -#define MCF_PCI_PCIIWCR_WINCTRL1_IOM (0x80000) -#define MCF_PCI_PCIIWCR_WINCTRL0_E (0x1000000) -#define MCF_PCI_PCIIWCR_WINCTRL0_PRC(x) (((x)&0x3)<<0x19) -#define MCF_PCI_PCIIWCR_WINCTRL0_IOM (0x8000000) -#define MCF_PCI_PCIIWCR_WINCTRL2_MEMREAD (0x100) -#define MCF_PCI_PCIIWCR_WINCTRL2_MEMRDLINE (0x300) -#define MCF_PCI_PCIIWCR_WINCTRL2_MEMRDMUL (0x500) -#define MCF_PCI_PCIIWCR_WINCTRL2_IO (0x900) -#define MCF_PCI_PCIIWCR_WINCTRL1_MEMREAD (0x10000) -#define MCF_PCI_PCIIWCR_WINCTRL1_MEMRDLINE (0x30000) -#define MCF_PCI_PCIIWCR_WINCTRL1_MEMRDMUL (0x50000) -#define MCF_PCI_PCIIWCR_WINCTRL1_IO (0x90000) -#define MCF_PCI_PCIIWCR_WINCTRL0_MEMREAD (0x1000000) -#define MCF_PCI_PCIIWCR_WINCTRL0_MEMRDLINE (0x3000000) -#define MCF_PCI_PCIIWCR_WINCTRL0_MEMRDMUL (0x5000000) -#define MCF_PCI_PCIIWCR_WINCTRL0_IO (0x9000000) - -/* Bit definitions and macros for MCF_PCI_PCIICR */ -#define MCF_PCI_PCIICR_MAXRETRY(x) (((x)&0xFF)<<0) -#define MCF_PCI_PCIICR_TAE (0x1000000) -#define MCF_PCI_PCIICR_IAE (0x2000000) -#define MCF_PCI_PCIICR_REE (0x4000000) - -/* Bit definitions and macros for MCF_PCI_PCIISR */ -#define MCF_PCI_PCIISR_TA (0x1000000) -#define MCF_PCI_PCIISR_IA (0x2000000) -#define MCF_PCI_PCIISR_RE (0x4000000) - -/* Bit definitions and macros for MCF_PCI_PCICAR */ -#define MCF_PCI_PCICAR_DWORD(x) (((x)&0x3F)<<0x2) -#define MCF_PCI_PCICAR_FUNCNUM(x) (((x)&0x7)<<0x8) -#define MCF_PCI_PCICAR_DEVNUM(x) (((x)&0x1F)<<0xB) -#define MCF_PCI_PCICAR_BUSNUM(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCICAR_E (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCITPSR */ -#define MCF_PCI_PCITPSR_PKTSIZE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCITSAR */ -#define MCF_PCI_PCITSAR_STARTADD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITTCR */ -#define MCF_PCI_PCITTCR_DI (0x1) -#define MCF_PCI_PCITTCR_W (0x10) -#define MCF_PCI_PCITTCR_MAXBEATS(x) (((x)&0x7)<<0x8) -#define MCF_PCI_PCITTCR_MAXRETRY(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCITTCR_PCICMD(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCITER */ -#define MCF_PCI_PCITER_NE (0x10000) -#define MCF_PCI_PCITER_IAE (0x20000) -#define MCF_PCI_PCITER_TAE (0x40000) -#define MCF_PCI_PCITER_RE (0x80000) -#define MCF_PCI_PCITER_SE (0x100000) -#define MCF_PCI_PCITER_FEE (0x200000) -#define MCF_PCI_PCITER_ME (0x1000000) -#define MCF_PCI_PCITER_BE (0x8000000) -#define MCF_PCI_PCITER_CM (0x10000000) -#define MCF_PCI_PCITER_RF (0x40000000) -#define MCF_PCI_PCITER_RC (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCITNAR */ -#define MCF_PCI_PCITNAR_NEXTADDRESS(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITLWR */ -#define MCF_PCI_PCITLWR_LASTWORD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITDCR */ -#define MCF_PCI_PCITDCR_PKTSDONE(x) (((x)&0xFFFF)<<0) -#define MCF_PCI_PCITDCR_BYTESDONE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCITSR */ -#define MCF_PCI_PCITSR_IA (0x10000) -#define MCF_PCI_PCITSR_TA (0x20000) -#define MCF_PCI_PCITSR_RE (0x40000) -#define MCF_PCI_PCITSR_SE (0x80000) -#define MCF_PCI_PCITSR_FE (0x100000) -#define MCF_PCI_PCITSR_BE1 (0x200000) -#define MCF_PCI_PCITSR_BE2 (0x400000) -#define MCF_PCI_PCITSR_BE3 (0x800000) -#define MCF_PCI_PCITSR_NT (0x1000000) - -/* Bit definitions and macros for MCF_PCI_PCITFDR */ -#define MCF_PCI_PCITFDR_FIFODATAWORD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITFSR */ -#define MCF_PCI_PCITFSR_EMPTY (0x10000) -#define MCF_PCI_PCITFSR_ALARM (0x20000) -#define MCF_PCI_PCITFSR_FULL (0x40000) -#define MCF_PCI_PCITFSR_FR (0x80000) -#define MCF_PCI_PCITFSR_OF (0x100000) -#define MCF_PCI_PCITFSR_UF (0x200000) -#define MCF_PCI_PCITFSR_RXW (0x400000) -#define MCF_PCI_PCITFSR_FAE (0x800000) -#define MCF_PCI_PCITFSR_TXW (0x40000000) -#define MCF_PCI_PCITFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCITFCR */ -#define MCF_PCI_PCITFCR_TXW_MASK (0x40000) -#define MCF_PCI_PCITFCR_OF_MASK (0x80000) -#define MCF_PCI_PCITFCR_UF_MASK (0x100000) -#define MCF_PCI_PCITFCR_RXW_MASK (0x200000) -#define MCF_PCI_PCITFCR_FAE_MASK (0x400000) -#define MCF_PCI_PCITFCR_IP_MASK (0x800000) -#define MCF_PCI_PCITFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_PCI_PCITFCR_WFR (0x20000000) - -/* Bit definitions and macros for MCF_PCI_PCITFAR */ -#define MCF_PCI_PCITFAR_ALARM(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITFRPR */ -#define MCF_PCI_PCITFRPR_READPTR(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_PCI_PCITFWPR */ -#define MCF_PCI_PCITFWPR_WRITEPTR(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRPSR */ -#define MCF_PCI_PCIRPSR_PKTSIZE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCIRSAR */ -#define MCF_PCI_PCIRSAR_STARTADD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRTCR */ -#define MCF_PCI_PCIRTCR_DI (0x1) -#define MCF_PCI_PCIRTCR_W (0x10) -#define MCF_PCI_PCIRTCR_MAXBEATS(x) (((x)&0x7)<<0x8) -#define MCF_PCI_PCIRTCR_FB (0x1000) -#define MCF_PCI_PCIRTCR_MAXRETRY(x) (((x)&0xFF)<<0x10) -#define MCF_PCI_PCIRTCR_PCICMD(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_PCI_PCIRER */ -#define MCF_PCI_PCIRER_NE (0x10000) -#define MCF_PCI_PCIRER_IAE (0x20000) -#define MCF_PCI_PCIRER_TAE (0x40000) -#define MCF_PCI_PCIRER_RE (0x80000) -#define MCF_PCI_PCIRER_SE (0x100000) -#define MCF_PCI_PCIRER_FEE (0x200000) -#define MCF_PCI_PCIRER_ME (0x1000000) -#define MCF_PCI_PCIRER_BE (0x8000000) -#define MCF_PCI_PCIRER_CM (0x10000000) -#define MCF_PCI_PCIRER_FE (0x20000000) -#define MCF_PCI_PCIRER_RF (0x40000000) -#define MCF_PCI_PCIRER_RC (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCIRNAR */ -#define MCF_PCI_PCIRNAR_NEXTADDRESS(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRDCR */ -#define MCF_PCI_PCIRDCR_PKTSDONE(x) (((x)&0xFFFF)<<0) -#define MCF_PCI_PCIRDCR_BYTESDONE(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PCI_PCIRSR */ -#define MCF_PCI_PCIRSR_IA (0x10000) -#define MCF_PCI_PCIRSR_TA (0x20000) -#define MCF_PCI_PCIRSR_RE (0x40000) -#define MCF_PCI_PCIRSR_SE (0x80000) -#define MCF_PCI_PCIRSR_FE (0x100000) -#define MCF_PCI_PCIRSR_BE1 (0x200000) -#define MCF_PCI_PCIRSR_BE2 (0x400000) -#define MCF_PCI_PCIRSR_BE3 (0x800000) -#define MCF_PCI_PCIRSR_NT (0x1000000) - -/* Bit definitions and macros for MCF_PCI_PCIRFDR */ -#define MCF_PCI_PCIRFDR_FIFODATAWORD(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRFSR */ -#define MCF_PCI_PCIRFSR_EMPTY (0x10000) -#define MCF_PCI_PCIRFSR_ALARM (0x20000) -#define MCF_PCI_PCIRFSR_FULL (0x40000) -#define MCF_PCI_PCIRFSR_FR (0x80000) -#define MCF_PCI_PCIRFSR_OF (0x100000) -#define MCF_PCI_PCIRFSR_UF (0x200000) -#define MCF_PCI_PCIRFSR_RXW (0x400000) -#define MCF_PCI_PCIRFSR_FAE (0x800000) -#define MCF_PCI_PCIRFSR_TXW (0x40000000) -#define MCF_PCI_PCIRFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_PCI_PCIRFCR */ -#define MCF_PCI_PCIRFCR_TXW_MASK (0x40000) -#define MCF_PCI_PCIRFCR_OF_MASK (0x80000) -#define MCF_PCI_PCIRFCR_UF_MASK (0x100000) -#define MCF_PCI_PCIRFCR_RXW_MASK (0x200000) -#define MCF_PCI_PCIRFCR_FAE_MASK (0x400000) -#define MCF_PCI_PCIRFCR_IP_MASK (0x800000) -#define MCF_PCI_PCIRFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_PCI_PCIRFCR_WFR (0x20000000) - -/* Bit definitions and macros for MCF_PCI_PCIRFAR */ -#define MCF_PCI_PCIRFAR_ALARM(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRFRPR */ -#define MCF_PCI_PCIRFRPR_READPTR(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_PCI_PCIRFWPR */ -#define MCF_PCI_PCIRFWPR_WRITEPTR(x) (((x)&0x7F)<<0) - - -#endif /* __MCF5475_PCI_H__ */ diff --git a/tos/vmem_test/include/MCF5475_PCIARB.h b/tos/vmem_test/include/MCF5475_PCIARB.h deleted file mode 100644 index 9e8c05b..0000000 --- a/tos/vmem_test/include/MCF5475_PCIARB.h +++ /dev/null @@ -1,43 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_PCIARB_H__ -#define __MCF5475_PCIARB_H__ - - -/********************************************************************* -* -* PCI Bus Arbiter Module (PCIARB) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PCIARB_PACR (*(volatile uint32_t*)(&_MBAR[0xC00])) -#define MCF_PCIARB_PASR (*(volatile uint32_t*)(&_MBAR[0xC04])) - - -/* Bit definitions and macros for MCF_PCIARB_PACR */ -#define MCF_PCIARB_PACR_INTMPRI (0x1) -#define MCF_PCIARB_PACR_EXTMPRI(x) (((x)&0x1F)<<0x1) -#define MCF_PCIARB_PACR_INTMINTEN (0x10000) -#define MCF_PCIARB_PACR_EXTMINTEN(x) (((x)&0x1F)<<0x11) -#define MCF_PCIARB_PACR_DS (0x80000000) - -/* Bit definitions and macros for MCF_PCIARB_PASR */ -#define MCF_PCIARB_PASR_ITLMBK (0x10000) -#define MCF_PCIARB_PASR_EXTMBK(x) (((x)&0x1F)<<0x11) - - -#endif /* __MCF5475_PCIARB_H__ */ diff --git a/tos/vmem_test/include/MCF5475_PSC.h b/tos/vmem_test/include/MCF5475_PSC.h deleted file mode 100644 index ffa9f3e..0000000 --- a/tos/vmem_test/include/MCF5475_PSC.h +++ /dev/null @@ -1,527 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_PSC_H__ -#define __MCF5475_PSC_H__ - - -/********************************************************************* -* -* Programmable Serial Controller (PSC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_PSC0_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8600])) -#define MCF_PSC0_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8600])) -#define MCF_PSC0_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8604])) -#define MCF_PSC0_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8604])) -#define MCF_PSC0_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8608])) -#define MCF_PSC0_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x860C])) -#define MCF_PSC0_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8610])) -#define MCF_PSC0_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8610])) -#define MCF_PSC0_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8614])) -#define MCF_PSC0_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8614])) -#define MCF_PSC0_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8618])) -#define MCF_PSC0_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x861C])) -#define MCF_PSC0_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8634])) -#define MCF_PSC0_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8638])) -#define MCF_PSC0_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x863C])) -#define MCF_PSC0_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8640])) -#define MCF_PSC0_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8644])) -#define MCF_PSC0_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8648])) -#define MCF_PSC0_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x864C])) -#define MCF_PSC0_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8650])) -#define MCF_PSC0_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8654])) -#define MCF_PSC0_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8658])) -#define MCF_PSC0_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x865C])) -#define MCF_PSC0_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8660])) -#define MCF_PSC0_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8664])) -#define MCF_PSC0_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8668])) -#define MCF_PSC0_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x866E])) -#define MCF_PSC0_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8672])) -#define MCF_PSC0_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8676])) -#define MCF_PSC0_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x867A])) -#define MCF_PSC0_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x867E])) -#define MCF_PSC0_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8680])) -#define MCF_PSC0_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8684])) -#define MCF_PSC0_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8688])) -#define MCF_PSC0_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x868E])) -#define MCF_PSC0_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8692])) -#define MCF_PSC0_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8696])) -#define MCF_PSC0_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x869A])) -#define MCF_PSC0_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x869E])) - -#define MCF_PSC1_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8700])) -#define MCF_PSC1_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8700])) -#define MCF_PSC1_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8704])) -#define MCF_PSC1_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8704])) -#define MCF_PSC1_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8708])) -#define MCF_PSC1_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x870C])) -#define MCF_PSC1_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8710])) -#define MCF_PSC1_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8710])) -#define MCF_PSC1_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8714])) -#define MCF_PSC1_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8714])) -#define MCF_PSC1_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8718])) -#define MCF_PSC1_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x871C])) -#define MCF_PSC1_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8734])) -#define MCF_PSC1_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8738])) -#define MCF_PSC1_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x873C])) -#define MCF_PSC1_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8740])) -#define MCF_PSC1_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8744])) -#define MCF_PSC1_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8748])) -#define MCF_PSC1_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x874C])) -#define MCF_PSC1_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8750])) -#define MCF_PSC1_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8754])) -#define MCF_PSC1_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8758])) -#define MCF_PSC1_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x875C])) -#define MCF_PSC1_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8760])) -#define MCF_PSC1_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8764])) -#define MCF_PSC1_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8768])) -#define MCF_PSC1_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x876E])) -#define MCF_PSC1_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8772])) -#define MCF_PSC1_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8776])) -#define MCF_PSC1_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x877A])) -#define MCF_PSC1_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x877E])) -#define MCF_PSC1_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8780])) -#define MCF_PSC1_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8784])) -#define MCF_PSC1_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8788])) -#define MCF_PSC1_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x878E])) -#define MCF_PSC1_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8792])) -#define MCF_PSC1_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8796])) -#define MCF_PSC1_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x879A])) -#define MCF_PSC1_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x879E])) - -#define MCF_PSC2_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8800])) -#define MCF_PSC2_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8800])) -#define MCF_PSC2_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8804])) -#define MCF_PSC2_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8804])) -#define MCF_PSC2_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8808])) -#define MCF_PSC2_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x880C])) -#define MCF_PSC2_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8810])) -#define MCF_PSC2_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8810])) -#define MCF_PSC2_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8814])) -#define MCF_PSC2_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8814])) -#define MCF_PSC2_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8818])) -#define MCF_PSC2_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x881C])) -#define MCF_PSC2_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8834])) -#define MCF_PSC2_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8838])) -#define MCF_PSC2_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x883C])) -#define MCF_PSC2_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8840])) -#define MCF_PSC2_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8844])) -#define MCF_PSC2_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8848])) -#define MCF_PSC2_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x884C])) -#define MCF_PSC2_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8850])) -#define MCF_PSC2_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8854])) -#define MCF_PSC2_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8858])) -#define MCF_PSC2_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x885C])) -#define MCF_PSC2_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8860])) -#define MCF_PSC2_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8864])) -#define MCF_PSC2_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8868])) -#define MCF_PSC2_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x886E])) -#define MCF_PSC2_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8872])) -#define MCF_PSC2_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8876])) -#define MCF_PSC2_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x887A])) -#define MCF_PSC2_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x887E])) -#define MCF_PSC2_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8880])) -#define MCF_PSC2_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8884])) -#define MCF_PSC2_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8888])) -#define MCF_PSC2_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x888E])) -#define MCF_PSC2_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8892])) -#define MCF_PSC2_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8896])) -#define MCF_PSC2_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x889A])) -#define MCF_PSC2_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x889E])) - -#define MCF_PSC3_PSCMR2 (*(volatile uint8_t *)(&_MBAR[0x8900])) -#define MCF_PSC3_PSCMR1 (*(volatile uint8_t *)(&_MBAR[0x8900])) -#define MCF_PSC3_PSCCSR (*(volatile uint8_t *)(&_MBAR[0x8904])) -#define MCF_PSC3_PSCSR (*(volatile uint16_t*)(&_MBAR[0x8904])) -#define MCF_PSC3_PSCCR (*(volatile uint8_t *)(&_MBAR[0x8908])) -#define MCF_PSC3_PSCRB_8BIT (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCTB_8BIT (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCRB_16BIT (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCTB_16BIT (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCRB_AC97 (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCTB_AC97 (*(volatile uint32_t*)(&_MBAR[0x890C])) -#define MCF_PSC3_PSCIPCR (*(volatile uint8_t *)(&_MBAR[0x8910])) -#define MCF_PSC3_PSCACR (*(volatile uint8_t *)(&_MBAR[0x8910])) -#define MCF_PSC3_PSCIMR (*(volatile uint16_t*)(&_MBAR[0x8914])) -#define MCF_PSC3_PSCISR (*(volatile uint16_t*)(&_MBAR[0x8914])) -#define MCF_PSC3_PSCCTUR (*(volatile uint8_t *)(&_MBAR[0x8918])) -#define MCF_PSC3_PSCCTLR (*(volatile uint8_t *)(&_MBAR[0x891C])) -#define MCF_PSC3_PSCIP (*(volatile uint8_t *)(&_MBAR[0x8934])) -#define MCF_PSC3_PSCOPSET (*(volatile uint8_t *)(&_MBAR[0x8938])) -#define MCF_PSC3_PSCOPRESET (*(volatile uint8_t *)(&_MBAR[0x893C])) -#define MCF_PSC3_PSCSICR (*(volatile uint8_t *)(&_MBAR[0x8940])) -#define MCF_PSC3_PSCIRCR1 (*(volatile uint8_t *)(&_MBAR[0x8944])) -#define MCF_PSC3_PSCIRCR2 (*(volatile uint8_t *)(&_MBAR[0x8948])) -#define MCF_PSC3_PSCIRSDR (*(volatile uint8_t *)(&_MBAR[0x894C])) -#define MCF_PSC3_PSCIRMDR (*(volatile uint8_t *)(&_MBAR[0x8950])) -#define MCF_PSC3_PSCIRFDR (*(volatile uint8_t *)(&_MBAR[0x8954])) -#define MCF_PSC3_PSCRFCNT (*(volatile uint16_t*)(&_MBAR[0x8958])) -#define MCF_PSC3_PSCTFCNT (*(volatile uint16_t*)(&_MBAR[0x895C])) -#define MCF_PSC3_PSCRFDR (*(volatile uint32_t*)(&_MBAR[0x8960])) -#define MCF_PSC3_PSCRFSR (*(volatile uint16_t*)(&_MBAR[0x8964])) -#define MCF_PSC3_PSCRFCR (*(volatile uint32_t*)(&_MBAR[0x8968])) -#define MCF_PSC3_PSCRFAR (*(volatile uint16_t*)(&_MBAR[0x896E])) -#define MCF_PSC3_PSCRFRP (*(volatile uint16_t*)(&_MBAR[0x8972])) -#define MCF_PSC3_PSCRFWP (*(volatile uint16_t*)(&_MBAR[0x8976])) -#define MCF_PSC3_PSCRLRFP (*(volatile uint16_t*)(&_MBAR[0x897A])) -#define MCF_PSC3_PSCRLWFP (*(volatile uint16_t*)(&_MBAR[0x897E])) -#define MCF_PSC3_PSCTFDR (*(volatile uint32_t*)(&_MBAR[0x8980])) -#define MCF_PSC3_PSCTFSR (*(volatile uint16_t*)(&_MBAR[0x8984])) -#define MCF_PSC3_PSCTFCR (*(volatile uint32_t*)(&_MBAR[0x8988])) -#define MCF_PSC3_PSCTFAR (*(volatile uint16_t*)(&_MBAR[0x898E])) -#define MCF_PSC3_PSCTFRP (*(volatile uint16_t*)(&_MBAR[0x8992])) -#define MCF_PSC3_PSCTFWP (*(volatile uint16_t*)(&_MBAR[0x8996])) -#define MCF_PSC3_PSCTLRFP (*(volatile uint16_t*)(&_MBAR[0x899A])) -#define MCF_PSC3_PSCTLWFP (*(volatile uint16_t*)(&_MBAR[0x899E])) - -#define MCF_PSC_PSCMR(x) (*(volatile uint8_t *)(&_MBAR[0x8600 + ((x)*0x100)])) -#define MCF_PSC_PSCCSR(x) (*(volatile uint8_t *)(&_MBAR[0x8604 + ((x)*0x100)])) -#define MCF_PSC_PSCSR(x) (*(volatile uint16_t*)(&_MBAR[0x8604 + ((x)*0x100)])) -#define MCF_PSC_PSCCR(x) (*(volatile uint8_t *)(&_MBAR[0x8608 + ((x)*0x100)])) -#define MCF_PSC_PSCRB_8BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCTB_8BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCRB_16BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCTB_16BIT(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCRB_AC97(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCTB_AC97(x) (*(volatile uint32_t*)(&_MBAR[0x860C + ((x)*0x100)])) -#define MCF_PSC_PSCIPCR(x) (*(volatile uint8_t *)(&_MBAR[0x8610 + ((x)*0x100)])) -#define MCF_PSC_PSCACR(x) (*(volatile uint8_t *)(&_MBAR[0x8610 + ((x)*0x100)])) -#define MCF_PSC_PSCIMR(x) (*(volatile uint16_t*)(&_MBAR[0x8614 + ((x)*0x100)])) -#define MCF_PSC_PSCISR(x) (*(volatile uint16_t*)(&_MBAR[0x8614 + ((x)*0x100)])) -#define MCF_PSC_PSCCTUR(x) (*(volatile uint8_t *)(&_MBAR[0x8618 + ((x)*0x100)])) -#define MCF_PSC_PSCCTLR(x) (*(volatile uint8_t *)(&_MBAR[0x861C + ((x)*0x100)])) -#define MCF_PSC_PSCIP(x) (*(volatile uint8_t *)(&_MBAR[0x8634 + ((x)*0x100)])) -#define MCF_PSC_PSCOPSET(x) (*(volatile uint8_t *)(&_MBAR[0x8638 + ((x)*0x100)])) -#define MCF_PSC_PSCOPRESET(x) (*(volatile uint8_t *)(&_MBAR[0x863C + ((x)*0x100)])) -#define MCF_PSC_PSCSICR(x) (*(volatile uint8_t *)(&_MBAR[0x8640 + ((x)*0x100)])) -#define MCF_PSC_PSCIRCR1(x) (*(volatile uint8_t *)(&_MBAR[0x8644 + ((x)*0x100)])) -#define MCF_PSC_PSCIRCR2(x) (*(volatile uint8_t *)(&_MBAR[0x8648 + ((x)*0x100)])) -#define MCF_PSC_PSCIRSDR(x) (*(volatile uint8_t *)(&_MBAR[0x864C + ((x)*0x100)])) -#define MCF_PSC_PSCIRMDR(x) (*(volatile uint8_t *)(&_MBAR[0x8650 + ((x)*0x100)])) -#define MCF_PSC_PSCIRFDR(x) (*(volatile uint8_t *)(&_MBAR[0x8654 + ((x)*0x100)])) -#define MCF_PSC_PSCRFCNT(x) (*(volatile uint16_t*)(&_MBAR[0x8658 + ((x)*0x100)])) -#define MCF_PSC_PSCTFCNT(x) (*(volatile uint16_t*)(&_MBAR[0x865C + ((x)*0x100)])) -#define MCF_PSC_PSCRFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8660 + ((x)*0x100)])) -#define MCF_PSC_PSCRFSR(x) (*(volatile uint16_t*)(&_MBAR[0x8664 + ((x)*0x100)])) -#define MCF_PSC_PSCRFCR(x) (*(volatile uint32_t*)(&_MBAR[0x8668 + ((x)*0x100)])) -#define MCF_PSC_PSCRFAR(x) (*(volatile uint16_t*)(&_MBAR[0x866E + ((x)*0x100)])) -#define MCF_PSC_PSCRFRP(x) (*(volatile uint16_t*)(&_MBAR[0x8672 + ((x)*0x100)])) -#define MCF_PSC_PSCRFWP(x) (*(volatile uint16_t*)(&_MBAR[0x8676 + ((x)*0x100)])) -#define MCF_PSC_PSCRLRFP(x) (*(volatile uint16_t*)(&_MBAR[0x867A + ((x)*0x100)])) -#define MCF_PSC_PSCRLWFP(x) (*(volatile uint16_t*)(&_MBAR[0x867E + ((x)*0x100)])) -#define MCF_PSC_PSCTFDR(x) (*(volatile uint32_t*)(&_MBAR[0x8680 + ((x)*0x100)])) -#define MCF_PSC_PSCTFSR(x) (*(volatile uint16_t*)(&_MBAR[0x8684 + ((x)*0x100)])) -#define MCF_PSC_PSCTFCR(x) (*(volatile uint32_t*)(&_MBAR[0x8688 + ((x)*0x100)])) -#define MCF_PSC_PSCTFAR(x) (*(volatile uint16_t*)(&_MBAR[0x868E + ((x)*0x100)])) -#define MCF_PSC_PSCTFRP(x) (*(volatile uint16_t*)(&_MBAR[0x8692 + ((x)*0x100)])) -#define MCF_PSC_PSCTFWP(x) (*(volatile uint16_t*)(&_MBAR[0x8696 + ((x)*0x100)])) -#define MCF_PSC_PSCTLRFP(x) (*(volatile uint16_t*)(&_MBAR[0x869A + ((x)*0x100)])) -#define MCF_PSC_PSCTLWFP(x) (*(volatile uint16_t*)(&_MBAR[0x869E + ((x)*0x100)])) - -/* Bit definitions and macros for MCF_PSC_PSCMR */ -#define MCF_PSC_PSCMR_SB(x) (((x)&0xF)<<0) -#define MCF_PSC_PSCMR_TXCTS (0x10) -#define MCF_PSC_PSCMR_TXRTS (0x20) -#define MCF_PSC_PSCMR_CM(x) (((x)&0x3)<<0x6) -#define MCF_PSC_PSCMR_CM_NORMAL (0) -#define MCF_PSC_PSCMR_CM_ECHO (0x40) -#define MCF_PSC_PSCMR_CM_LOCAL_LOOP (0x80) -#define MCF_PSC_PSCMR_CM_REMOTE_LOOP (0xC0) -#define MCF_PSC_PSCMR_SB_STOP_BITS_1 (0x7) -#define MCF_PSC_PSCMR_SB_STOP_BITS_15 (0x8) -#define MCF_PSC_PSCMR_SB_STOP_BITS_2 (0xF) -#define MCF_PSC_PSCMR_PM_MULTI_ADDR (0x1C) -#define MCF_PSC_PSCMR_PM_MULTI_DATA (0x18) -#define MCF_PSC_PSCMR_PM_NONE (0x10) -#define MCF_PSC_PSCMR_PM_FORCE_HI (0xC) -#define MCF_PSC_PSCMR_PM_FORCE_LO (0x8) -#define MCF_PSC_PSCMR_PM_ODD (0x4) -#define MCF_PSC_PSCMR_PM_EVEN (0) -#define MCF_PSC_PSCMR_BC(x) (((x)&0x3)<<0) -#define MCF_PSC_PSCMR_BC_5 (0) -#define MCF_PSC_PSCMR_BC_6 (0x1) -#define MCF_PSC_PSCMR_BC_7 (0x2) -#define MCF_PSC_PSCMR_BC_8 (0x3) -#define MCF_PSC_PSCMR_PT (0x4) -#define MCF_PSC_PSCMR_PM(x) (((x)&0x3)<<0x3) -#define MCF_PSC_PSCMR_ERR (0x20) -#define MCF_PSC_PSCMR_RXIRQ_FU (0x40) -#define MCF_PSC_PSCMR_RXRTS (0x80) - -/* Bit definitions and macros for MCF_PSC_PSCCSR */ -#define MCF_PSC_PSCCSR_TCSEL(x) (((x)&0xF)<<0) -#define MCF_PSC_PSCCSR_RCSEL(x) (((x)&0xF)<<0x4) -#define MCF_PSC_PSCCSR_TCSEL_SYS_CLK (0x0D) -#define MCF_PSC_PSCCSR_TCSEL_CTM16 (0x0E) -#define MCF_PSC_PSCCSR_TCSEL_CTM (0x0F) -#define MCF_PSC_PSCCSR_RCSEL_SYS_CLK (0xD0) -#define MCF_PSC_PSCCSR_RCSEL_CTM16 (0xE0) -#define MCF_PSC_PSCCSR_RCSEL_CTM (0xF0) - -/* Bit definitions and macros for MCF_PSC_PSCSR */ -#define MCF_PSC_PSCSR_ERR (0x40) -#define MCF_PSC_PSCSR_CDE_DEOF (0x80) -#define MCF_PSC_PSCSR_RXRDY (0x100) -#define MCF_PSC_PSCSR_FU (0x200) -#define MCF_PSC_PSCSR_TXRDY (0x400) -#define MCF_PSC_PSCSR_TXEMP_URERR (0x800) -#define MCF_PSC_PSCSR_OE (0x1000) -#define MCF_PSC_PSCSR_PE_CRCERR (0x2000) -#define MCF_PSC_PSCSR_FE_PHYERR (0x4000) -#define MCF_PSC_PSCSR_RB_NEOF (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCCR */ -#define MCF_PSC_PSCCR_RXC(x) (((x)&0x3)<<0) -#define MCF_PSC_PSCCR_RX_ENABLED (0x1) -#define MCF_PSC_PSCCR_RX_DISABLED (0x2) -#define MCF_PSC_PSCCR_TXC(x) (((x)&0x3)<<0x2) -#define MCF_PSC_PSCCR_TX_ENABLED (0x4) -#define MCF_PSC_PSCCR_TX_DISABLED (0x8) -#define MCF_PSC_PSCCR_MISC(x) (((x)&0x7)<<0x4) -#define MCF_PSC_PSCCR_NONE (0) -#define MCF_PSC_PSCCR_RESET_MR (0x10) -#define MCF_PSC_PSCCR_RESET_RX (0x20) -#define MCF_PSC_PSCCR_RESET_TX (0x30) -#define MCF_PSC_PSCCR_RESET_ERROR (0x40) -#define MCF_PSC_PSCCR_RESET_BKCHGINT (0x50) -#define MCF_PSC_PSCCR_START_BREAK (0x60) -#define MCF_PSC_PSCCR_STOP_BREAK (0x70) - -/* Bit definitions and macros for MCF_PSC_PSCRB_8BIT */ -#define MCF_PSC_PSCRB_8BIT_RB3(x) (((x)&0xFF)<<0) -#define MCF_PSC_PSCRB_8BIT_RB2(x) (((x)&0xFF)<<0x8) -#define MCF_PSC_PSCRB_8BIT_RB1(x) (((x)&0xFF)<<0x10) -#define MCF_PSC_PSCRB_8BIT_RB0(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PSC_PSCTB_8BIT */ -#define MCF_PSC_PSCTB_8BIT_TB3(x) (((x)&0xFF)<<0) -#define MCF_PSC_PSCTB_8BIT_TB2(x) (((x)&0xFF)<<0x8) -#define MCF_PSC_PSCTB_8BIT_TB1(x) (((x)&0xFF)<<0x10) -#define MCF_PSC_PSCTB_8BIT_TB0(x) (((x)&0xFF)<<0x18) - -/* Bit definitions and macros for MCF_PSC_PSCRB_16BIT */ -#define MCF_PSC_PSCRB_16BIT_RB1(x) (((x)&0xFFFF)<<0) -#define MCF_PSC_PSCRB_16BIT_RB0(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PSC_PSCTB_16BIT */ -#define MCF_PSC_PSCTB_16BIT_TB1(x) (((x)&0xFFFF)<<0) -#define MCF_PSC_PSCTB_16BIT_TB0(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_PSC_PSCRB_AC97 */ -#define MCF_PSC_PSCRB_AC97_SOF (0x800) -#define MCF_PSC_PSCRB_AC97_RB(x) (((x)&0xFFFFF)<<0xC) - -/* Bit definitions and macros for MCF_PSC_PSCTB_AC97 */ -#define MCF_PSC_PSCTB_AC97_TB(x) (((x)&0xFFFFF)<<0xC) - -/* Bit definitions and macros for MCF_PSC_PSCIPCR */ -#define MCF_PSC_PSCIPCR_RESERVED (0xC) -#define MCF_PSC_PSCIPCR_CTS (0xD) -#define MCF_PSC_PSCIPCR_D_CTS (0x1C) -#define MCF_PSC_PSCIPCR_SYNC (0x8C) - -/* Bit definitions and macros for MCF_PSC_PSCACR */ -#define MCF_PSC_PSCACR_IEC0 (0x1) - -/* Bit definitions and macros for MCF_PSC_PSCIMR */ -#define MCF_PSC_PSCIMR_ERR (0x40) -#define MCF_PSC_PSCIMR_DEOF (0x80) -#define MCF_PSC_PSCIMR_TXRDY (0x100) -#define MCF_PSC_PSCIMR_RXRDY_FU (0x200) -#define MCF_PSC_PSCIMR_DB (0x400) -#define MCF_PSC_PSCIMR_IPC (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCISR */ -#define MCF_PSC_PSCISR_ERR (0x40) -#define MCF_PSC_PSCISR_DEOF (0x80) -#define MCF_PSC_PSCISR_TXRDY (0x100) -#define MCF_PSC_PSCISR_RXRDY_FU (0x200) -#define MCF_PSC_PSCISR_DB (0x400) -#define MCF_PSC_PSCISR_IPC (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCCTUR */ -#define MCF_PSC_PSCCTUR_CT(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCCTLR */ -#define MCF_PSC_PSCCTLR_CT(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCIP */ -#define MCF_PSC_PSCIP_CTS (0x1) -#define MCF_PSC_PSCIP_TGL (0x40) -#define MCF_PSC_PSCIP_LPWR_B (0x80) - -/* Bit definitions and macros for MCF_PSC_PSCOPSET */ -#define MCF_PSC_PSCOPSET_RTS (0x1) - -/* Bit definitions and macros for MCF_PSC_PSCOPRESET */ -#define MCF_PSC_PSCOPRESET_RTS (0x1) - -/* Bit definitions and macros for MCF_PSC_PSCSICR */ -#define MCF_PSC_PSCSICR_SIM(x) (((x)&0x7)<<0) -#define MCF_PSC_PSCSICR_SIM_UART (0) -#define MCF_PSC_PSCSICR_SIM_MODEM8 (0x1) -#define MCF_PSC_PSCSICR_SIM_MODEM16 (0x2) -#define MCF_PSC_PSCSICR_SIM_AC97 (0x3) -#define MCF_PSC_PSCSICR_SIM_SIR (0x4) -#define MCF_PSC_PSCSICR_SIM_MIR (0x5) -#define MCF_PSC_PSCSICR_SIM_FIR (0x6) -#define MCF_PSC_PSCSICR_SHDIR (0x10) -#define MCF_PSC_PSCSICR_DTS1 (0x20) -#define MCF_PSC_PSCSICR_AWR (0x40) -#define MCF_PSC_PSCSICR_ACRB (0x80) - -/* Bit definitions and macros for MCF_PSC_PSCIRCR1 */ -#define MCF_PSC_PSCIRCR1_SPUL (0x1) -#define MCF_PSC_PSCIRCR1_SIPEN (0x2) -#define MCF_PSC_PSCIRCR1_FD (0x4) - -/* Bit definitions and macros for MCF_PSC_PSCIRCR2 */ -#define MCF_PSC_PSCIRCR2_NXTEOF (0x1) -#define MCF_PSC_PSCIRCR2_ABORT (0x2) -#define MCF_PSC_PSCIRCR2_SIPREQ (0x4) - -/* Bit definitions and macros for MCF_PSC_PSCIRSDR */ -#define MCF_PSC_PSCIRSDR_IRSTIM(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCIRMDR */ -#define MCF_PSC_PSCIRMDR_M_FDIV(x) (((x)&0x7F)<<0) -#define MCF_PSC_PSCIRMDR_FREQ (0x80) - -/* Bit definitions and macros for MCF_PSC_PSCIRFDR */ -#define MCF_PSC_PSCIRFDR_F_FDIV(x) (((x)&0xF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFCNT */ -#define MCF_PSC_PSCRFCNT_CNT(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFCNT */ -#define MCF_PSC_PSCTFCNT_CNT(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFDR */ -#define MCF_PSC_PSCRFDR_DATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFSR */ -#define MCF_PSC_PSCRFSR_EMT (0x1) -#define MCF_PSC_PSCRFSR_ALARM (0x2) -#define MCF_PSC_PSCRFSR_FU (0x4) -#define MCF_PSC_PSCRFSR_FRMRDY (0x8) -#define MCF_PSC_PSCRFSR_OF (0x10) -#define MCF_PSC_PSCRFSR_UF (0x20) -#define MCF_PSC_PSCRFSR_RXW (0x40) -#define MCF_PSC_PSCRFSR_FAE (0x80) -#define MCF_PSC_PSCRFSR_FRM(x) (((x)&0xF)<<0x8) -#define MCF_PSC_PSCRFSR_FRM_BYTE0 (0x800) -#define MCF_PSC_PSCRFSR_FRM_BYTE1 (0x400) -#define MCF_PSC_PSCRFSR_FRM_BYTE2 (0x200) -#define MCF_PSC_PSCRFSR_FRM_BYTE3 (0x100) -#define MCF_PSC_PSCRFSR_TAG(x) (((x)&0x3)<<0xC) -#define MCF_PSC_PSCRFSR_TXW (0x4000) -#define MCF_PSC_PSCRFSR_IP (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCRFCR */ -#define MCF_PSC_PSCRFCR_CNTR(x) (((x)&0xFFFF)<<0) -#define MCF_PSC_PSCRFCR_TXW_MSK (0x40000) -#define MCF_PSC_PSCRFCR_OF_MSK (0x80000) -#define MCF_PSC_PSCRFCR_UF_MSK (0x100000) -#define MCF_PSC_PSCRFCR_RXW_MSK (0x200000) -#define MCF_PSC_PSCRFCR_FAE_MSK (0x400000) -#define MCF_PSC_PSCRFCR_IP_MSK (0x800000) -#define MCF_PSC_PSCRFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_PSC_PSCRFCR_FRMEN (0x8000000) -#define MCF_PSC_PSCRFCR_TIMER (0x10000000) - -/* Bit definitions and macros for MCF_PSC_PSCRFAR */ -#define MCF_PSC_PSCRFAR_ALARM(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFRP */ -#define MCF_PSC_PSCRFRP_READ(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRFWP */ -#define MCF_PSC_PSCRFWP_WRITE(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRLRFP */ -#define MCF_PSC_PSCRLRFP_LRFP(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCRLWFP */ -#define MCF_PSC_PSCRLWFP_LWFP(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFDR */ -#define MCF_PSC_PSCTFDR_DATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFSR */ -#define MCF_PSC_PSCTFSR_EMT (0x1) -#define MCF_PSC_PSCTFSR_ALARM (0x2) -#define MCF_PSC_PSCTFSR_FU (0x4) -#define MCF_PSC_PSCTFSR_FRMRDY (0x8) -#define MCF_PSC_PSCTFSR_OF (0x10) -#define MCF_PSC_PSCTFSR_UF (0x20) -#define MCF_PSC_PSCTFSR_RXW (0x40) -#define MCF_PSC_PSCTFSR_FAE (0x80) -#define MCF_PSC_PSCTFSR_FRM(x) (((x)&0xF)<<0x8) -#define MCF_PSC_PSCTFSR_FRM_BYTE0 (0x800) -#define MCF_PSC_PSCTFSR_FRM_BYTE1 (0x400) -#define MCF_PSC_PSCTFSR_FRM_BYTE2 (0x200) -#define MCF_PSC_PSCTFSR_FRM_BYTE3 (0x100) -#define MCF_PSC_PSCTFSR_TAG(x) (((x)&0x3)<<0xC) -#define MCF_PSC_PSCTFSR_TXW (0x4000) -#define MCF_PSC_PSCTFSR_IP (0x8000) - -/* Bit definitions and macros for MCF_PSC_PSCTFCR */ -#define MCF_PSC_PSCTFCR_CNTR(x) (((x)&0xFFFF)<<0) -#define MCF_PSC_PSCTFCR_TXW_MSK (0x40000) -#define MCF_PSC_PSCTFCR_OF_MSK (0x80000) -#define MCF_PSC_PSCTFCR_UF_MSK (0x100000) -#define MCF_PSC_PSCTFCR_RXW_MSK (0x200000) -#define MCF_PSC_PSCTFCR_FAE_MSK (0x400000) -#define MCF_PSC_PSCTFCR_IP_MSK (0x800000) -#define MCF_PSC_PSCTFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_PSC_PSCTFCR_FRMEN (0x8000000) -#define MCF_PSC_PSCTFCR_TIMER (0x10000000) -#define MCF_PSC_PSCTFCR_WFR (0x20000000) - -/* Bit definitions and macros for MCF_PSC_PSCTFAR */ -#define MCF_PSC_PSCTFAR_ALARM(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFRP */ -#define MCF_PSC_PSCTFRP_READ(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTFWP */ -#define MCF_PSC_PSCTFWP_WRITE(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTLRFP */ -#define MCF_PSC_PSCTLRFP_LRFP(x) (((x)&0x1FF)<<0) - -/* Bit definitions and macros for MCF_PSC_PSCTLWFP */ -#define MCF_PSC_PSCTLWFP_LWFP(x) (((x)&0x1FF)<<0) - - -#endif /* __MCF5475_PSC_H__ */ diff --git a/tos/vmem_test/include/MCF5475_SDRAMC.h b/tos/vmem_test/include/MCF5475_SDRAMC.h deleted file mode 100644 index 6cdbd68..0000000 --- a/tos/vmem_test/include/MCF5475_SDRAMC.h +++ /dev/null @@ -1,106 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SDRAMC_H__ -#define __MCF5475_SDRAMC_H__ - - -/********************************************************************* -* -* Synchronous DRAM Controller (SDRAMC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SDRAMC_SDRAMDS (*(volatile uint32_t*)(&_MBAR[0x4])) -#define MCF_SDRAMC_CS0CFG (*(volatile uint32_t*)(&_MBAR[0x20])) -#define MCF_SDRAMC_CS1CFG (*(volatile uint32_t*)(&_MBAR[0x24])) -#define MCF_SDRAMC_CS2CFG (*(volatile uint32_t*)(&_MBAR[0x28])) -#define MCF_SDRAMC_CS3CFG (*(volatile uint32_t*)(&_MBAR[0x2C])) -#define MCF_SDRAMC_SDMR (*(volatile uint32_t*)(&_MBAR[0x100])) -#define MCF_SDRAMC_SDCR (*(volatile uint32_t*)(&_MBAR[0x104])) -#define MCF_SDRAMC_SDCFG1 (*(volatile uint32_t*)(&_MBAR[0x108])) -#define MCF_SDRAMC_SDCFG2 (*(volatile uint32_t*)(&_MBAR[0x10C])) -#define MCF_SDRAMC_CSCFG(x) (*(volatile uint32_t*)(&_MBAR[0x20 + ((x)*0x4)])) - - -/* Bit definitions and macros for MCF_SDRAMC_SDRAMDS */ -#define MCF_SDRAMC_SDRAMDS_SB_D(x) (((x)&0x3)<<0) -#define MCF_SDRAMC_SDRAMDS_SB_S(x) (((x)&0x3)<<0x2) -#define MCF_SDRAMC_SDRAMDS_SB_A(x) (((x)&0x3)<<0x4) -#define MCF_SDRAMC_SDRAMDS_SB_C(x) (((x)&0x3)<<0x6) -#define MCF_SDRAMC_SDRAMDS_SB_E(x) (((x)&0x3)<<0x8) -#define MCF_SDRAMC_SDRAMDS_DRIVE_24MA (0) -#define MCF_SDRAMC_SDRAMDS_DRIVE_16MA (0x1) -#define MCF_SDRAMC_SDRAMDS_DRIVE_8MA (0x2) -#define MCF_SDRAMC_SDRAMDS_DRIVE_NONE (0x3) - -/* Bit definitions and macros for MCF_SDRAMC_CSCFG */ -#define MCF_SDRAMC_CSCFG_CSSZ(x) (((x)&0x1F)<<0) -#define MCF_SDRAMC_CSCFG_CSSZ_DISABLED (0) -#define MCF_SDRAMC_CSCFG_CSSZ_1MBYTE (0x13) -#define MCF_SDRAMC_CSCFG_CSSZ_2MBYTE (0x14) -#define MCF_SDRAMC_CSCFG_CSSZ_4MBYTE (0x15) -#define MCF_SDRAMC_CSCFG_CSSZ_8MBYTE (0x16) -#define MCF_SDRAMC_CSCFG_CSSZ_16MBYTE (0x17) -#define MCF_SDRAMC_CSCFG_CSSZ_32MBYTE (0x18) -#define MCF_SDRAMC_CSCFG_CSSZ_64MBYTE (0x19) -#define MCF_SDRAMC_CSCFG_CSSZ_128MBYTE (0x1A) -#define MCF_SDRAMC_CSCFG_CSSZ_256MBYTE (0x1B) -#define MCF_SDRAMC_CSCFG_CSSZ_512MBYTE (0x1C) -#define MCF_SDRAMC_CSCFG_CSSZ_1GBYTE (0x1D) -#define MCF_SDRAMC_CSCFG_CSSZ_2GBYTE (0x1E) -#define MCF_SDRAMC_CSCFG_CSSZ_4GBYTE (0x1F) -#define MCF_SDRAMC_CSCFG_CSBA(x) (((x)&0xFFF)<<0x14) -#define MCF_SDRAMC_CSCFG_BA(x) ((x)&0xFFF00000) - -/* Bit definitions and macros for MCF_SDRAMC_SDMR */ -#define MCF_SDRAMC_SDMR_CMD (0x10000) -#define MCF_SDRAMC_SDMR_AD(x) (((x)&0xFFF)<<0x12) -#define MCF_SDRAMC_SDMR_BNKAD(x) (((x)&0x3)<<0x1E) -#define MCF_SDRAMC_SDMR_BK_LMR (0) -#define MCF_SDRAMC_SDMR_BK_LEMR (0x40000000) - -/* Bit definitions and macros for MCF_SDRAMC_SDCR */ -#define MCF_SDRAMC_SDCR_IPALL (0x2) -#define MCF_SDRAMC_SDCR_IREF (0x4) -#define MCF_SDRAMC_SDCR_BUFF (0x10) -#define MCF_SDRAMC_SDCR_DQS_OE(x) (((x)&0xF)<<0x8) -#define MCF_SDRAMC_SDCR_RCNT(x) (((x)&0x3F)<<0x10) -#define MCF_SDRAMC_SDCR_DRIVE (0x400000) -#define MCF_SDRAMC_SDCR_AP (0x800000) -#define MCF_SDRAMC_SDCR_MUX(x) (((x)&0x3)<<0x18) -#define MCF_SDRAMC_SDCR_REF (0x10000000) -#define MCF_SDRAMC_SDCR_DDR (0x20000000) -#define MCF_SDRAMC_SDCR_CKE (0x40000000) -#define MCF_SDRAMC_SDCR_MODE_EN (0x80000000) - -/* Bit definitions and macros for MCF_SDRAMC_SDCFG1 */ -#define MCF_SDRAMC_SDCFG1_WTLAT(x) (((x)&0x7)<<0x4) -#define MCF_SDRAMC_SDCFG1_REF2ACT(x) (((x)&0xF)<<0x8) -#define MCF_SDRAMC_SDCFG1_PRE2ACT(x) (((x)&0x7)<<0xC) -#define MCF_SDRAMC_SDCFG1_ACT2RW(x) (((x)&0x7)<<0x10) -#define MCF_SDRAMC_SDCFG1_RDLAT(x) (((x)&0xF)<<0x14) -#define MCF_SDRAMC_SDCFG1_SWT2RD(x) (((x)&0x7)<<0x18) -#define MCF_SDRAMC_SDCFG1_SRD2RW(x) (((x)&0xF)<<0x1C) - -/* Bit definitions and macros for MCF_SDRAMC_SDCFG2 */ -#define MCF_SDRAMC_SDCFG2_BL(x) (((x)&0xF)<<0x10) -#define MCF_SDRAMC_SDCFG2_BRD2WT(x) (((x)&0xF)<<0x14) -#define MCF_SDRAMC_SDCFG2_BWT2RW(x) (((x)&0xF)<<0x18) -#define MCF_SDRAMC_SDCFG2_BRD2PRE(x) (((x)&0xF)<<0x1C) - - -#endif /* __MCF5475_SDRAMC_H__ */ diff --git a/tos/vmem_test/include/MCF5475_SEC.h b/tos/vmem_test/include/MCF5475_SEC.h deleted file mode 100644 index 8deff0b..0000000 --- a/tos/vmem_test/include/MCF5475_SEC.h +++ /dev/null @@ -1,398 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SEC_H__ -#define __MCF5475_SEC_H__ - - -/********************************************************************* -* -* Integrated Security Engine (SEC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SEC_EUACRH (*(volatile uint32_t*)(&_MBAR[0x21000])) -#define MCF_SEC_EUACRL (*(volatile uint32_t*)(&_MBAR[0x21004])) -#define MCF_SEC_SIMRH (*(volatile uint32_t*)(&_MBAR[0x21008])) -#define MCF_SEC_SIMRL (*(volatile uint32_t*)(&_MBAR[0x2100C])) -#define MCF_SEC_SISRH (*(volatile uint32_t*)(&_MBAR[0x21010])) -#define MCF_SEC_SISRL (*(volatile uint32_t*)(&_MBAR[0x21014])) -#define MCF_SEC_SICRH (*(volatile uint32_t*)(&_MBAR[0x21018])) -#define MCF_SEC_SICRL (*(volatile uint32_t*)(&_MBAR[0x2101C])) -#define MCF_SEC_SIDR (*(volatile uint32_t*)(&_MBAR[0x21020])) -#define MCF_SEC_EUASRH (*(volatile uint32_t*)(&_MBAR[0x21028])) -#define MCF_SEC_EUASRL (*(volatile uint32_t*)(&_MBAR[0x2102C])) -#define MCF_SEC_SMCR (*(volatile uint32_t*)(&_MBAR[0x21030])) -#define MCF_SEC_MEAR (*(volatile uint32_t*)(&_MBAR[0x21038])) -#define MCF_SEC_CCCR0 (*(volatile uint32_t*)(&_MBAR[0x2200C])) -#define MCF_SEC_CCPSRH0 (*(volatile uint32_t*)(&_MBAR[0x22010])) -#define MCF_SEC_CCPSRL0 (*(volatile uint32_t*)(&_MBAR[0x22014])) -#define MCF_SEC_CDPR0 (*(volatile uint32_t*)(&_MBAR[0x22044])) -#define MCF_SEC_FR0 (*(volatile uint32_t*)(&_MBAR[0x2204C])) -#define MCF_SEC_CCCR1 (*(volatile uint32_t*)(&_MBAR[0x2300C])) -#define MCF_SEC_CCPSRH1 (*(volatile uint32_t*)(&_MBAR[0x23010])) -#define MCF_SEC_CCPSRL1 (*(volatile uint32_t*)(&_MBAR[0x23014])) -#define MCF_SEC_CDPR1 (*(volatile uint32_t*)(&_MBAR[0x23044])) -#define MCF_SEC_FR1 (*(volatile uint32_t*)(&_MBAR[0x2304C])) -#define MCF_SEC_AFRCR (*(volatile uint32_t*)(&_MBAR[0x28018])) -#define MCF_SEC_AFSR (*(volatile uint32_t*)(&_MBAR[0x28028])) -#define MCF_SEC_AFISR (*(volatile uint32_t*)(&_MBAR[0x28030])) -#define MCF_SEC_AFIMR (*(volatile uint32_t*)(&_MBAR[0x28038])) -#define MCF_SEC_DRCR (*(volatile uint32_t*)(&_MBAR[0x2A018])) -#define MCF_SEC_DSR (*(volatile uint32_t*)(&_MBAR[0x2A028])) -#define MCF_SEC_DISR (*(volatile uint32_t*)(&_MBAR[0x2A030])) -#define MCF_SEC_DIMR (*(volatile uint32_t*)(&_MBAR[0x2A038])) -#define MCF_SEC_MDRCR (*(volatile uint32_t*)(&_MBAR[0x2C018])) -#define MCF_SEC_MDSR (*(volatile uint32_t*)(&_MBAR[0x2C028])) -#define MCF_SEC_MDISR (*(volatile uint32_t*)(&_MBAR[0x2C030])) -#define MCF_SEC_MDIMR (*(volatile uint32_t*)(&_MBAR[0x2C038])) -#define MCF_SEC_RNGRCR (*(volatile uint32_t*)(&_MBAR[0x2E018])) -#define MCF_SEC_RNGSR (*(volatile uint32_t*)(&_MBAR[0x2E028])) -#define MCF_SEC_RNGISR (*(volatile uint32_t*)(&_MBAR[0x2E030])) -#define MCF_SEC_RNGIMR (*(volatile uint32_t*)(&_MBAR[0x2E038])) -#define MCF_SEC_AESRCR (*(volatile uint32_t*)(&_MBAR[0x32018])) -#define MCF_SEC_AESSR (*(volatile uint32_t*)(&_MBAR[0x32028])) -#define MCF_SEC_AESISR (*(volatile uint32_t*)(&_MBAR[0x32030])) -#define MCF_SEC_AESIMR (*(volatile uint32_t*)(&_MBAR[0x32038])) -#define MCF_SEC_CCCRn(x) (*(volatile uint32_t*)(&_MBAR[0x2200C + ((x)*0x1000)])) -#define MCF_SEC_CCPSRHn(x) (*(volatile uint32_t*)(&_MBAR[0x22010 + ((x)*0x1000)])) -#define MCF_SEC_CCPSRLn(x) (*(volatile uint32_t*)(&_MBAR[0x22014 + ((x)*0x1000)])) -#define MCF_SEC_CDPRn(x) (*(volatile uint32_t*)(&_MBAR[0x22044 + ((x)*0x1000)])) -#define MCF_SEC_FRn(x) (*(volatile uint32_t*)(&_MBAR[0x2204C + ((x)*0x1000)])) - - -/* Bit definitions and macros for MCF_SEC_EUACRH */ -#define MCF_SEC_EUACRH_AFEU(x) (((x)&0xF)<<0) -#define MCF_SEC_EUACRH_AFFEU_NOASSIGN (0) -#define MCF_SEC_EUACRH_AFFEU_CHA0 (0x1) -#define MCF_SEC_EUACRH_AFFEU_CHA1 (0x2) -#define MCF_SEC_EUACRH_MDEU(x) (((x)&0xF)<<0x8) -#define MCF_SEC_EUACRH_MDEU_NOASSIGN (0) -#define MCF_SEC_EUACRH_MDEU_CHA0 (0x100) -#define MCF_SEC_EUACRH_MDEU_CHA1 (0x200) -#define MCF_SEC_EUACRH_RNG(x) (((x)&0xF)<<0x18) -#define MCF_SEC_EUACRH_RNG_NOASSIGN (0) -#define MCF_SEC_EUACRH_RNG_CHA0 (0x1000000) -#define MCF_SEC_EUACRH_RNG_CHA1 (0x2000000) - -/* Bit definitions and macros for MCF_SEC_EUACRL */ -#define MCF_SEC_EUACRL_AESU(x) (((x)&0xF)<<0x10) -#define MCF_SEC_EUACRL_AESU_NOASSIGN (0) -#define MCF_SEC_EUACRL_AESU_CHA0 (0x10000) -#define MCF_SEC_EUACRL_AESU_CHA1 (0x20000) -#define MCF_SEC_EUACRL_DEU(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SEC_SIMRH */ -#define MCF_SEC_SIMRH_AERR (0x8000000) -#define MCF_SEC_SIMRH_CHA_0_DN (0x10000000) -#define MCF_SEC_SIMRH_CHA_0_ERR (0x20000000) -#define MCF_SEC_SIMRH_CHA_1_DN (0x40000000) -#define MCF_SEC_SIMRH_CHA_1_ERR (0x80000000) - -/* Bit definitions and macros for MCF_SEC_SIMRL */ -#define MCF_SEC_SIMRL_TEA (0x40) -#define MCF_SEC_SIMRL_DEU_DN (0x100) -#define MCF_SEC_SIMRL_DEU_ERR (0x200) -#define MCF_SEC_SIMRL_AESU_DN (0x1000) -#define MCF_SEC_SIMRL_AESU_ERR (0x2000) -#define MCF_SEC_SIMRL_MDEU_DN (0x10000) -#define MCF_SEC_SIMRL_MDEU_ERR (0x20000) -#define MCF_SEC_SIMRL_AFEU_DN (0x100000) -#define MCF_SEC_SIMRL_AFEU_ERR (0x200000) -#define MCF_SEC_SIMRL_RNG_DN (0x1000000) -#define MCF_SEC_SIMRL_RNG_ERR (0x2000000) - -/* Bit definitions and macros for MCF_SEC_SISRH */ -#define MCF_SEC_SISRH_AERR (0x8000000) -#define MCF_SEC_SISRH_CHA_0_DN (0x10000000) -#define MCF_SEC_SISRH_CHA_0_ERR (0x20000000) -#define MCF_SEC_SISRH_CHA_1_DN (0x40000000) -#define MCF_SEC_SISRH_CHA_1_ERR (0x80000000) - -/* Bit definitions and macros for MCF_SEC_SISRL */ -#define MCF_SEC_SISRL_TEA (0x40) -#define MCF_SEC_SISRL_DEU_DN (0x100) -#define MCF_SEC_SISRL_DEU_ERR (0x200) -#define MCF_SEC_SISRL_AESU_DN (0x1000) -#define MCF_SEC_SISRL_AESU_ERR (0x2000) -#define MCF_SEC_SISRL_MDEU_DN (0x10000) -#define MCF_SEC_SISRL_MDEU_ERR (0x20000) -#define MCF_SEC_SISRL_AFEU_DN (0x100000) -#define MCF_SEC_SISRL_AFEU_ERR (0x200000) -#define MCF_SEC_SISRL_RNG_DN (0x1000000) -#define MCF_SEC_SISRL_RNG_ERR (0x2000000) - -/* Bit definitions and macros for MCF_SEC_SICRH */ -#define MCF_SEC_SICRH_AERR (0x8000000) -#define MCF_SEC_SICRH_CHA_0_DN (0x10000000) -#define MCF_SEC_SICRH_CHA_0_ERR (0x20000000) -#define MCF_SEC_SICRH_CHA_1_DN (0x40000000) -#define MCF_SEC_SICRH_CHA_1_ERR (0x80000000) - -/* Bit definitions and macros for MCF_SEC_SICRL */ -#define MCF_SEC_SICRL_TEA (0x40) -#define MCF_SEC_SICRL_DEU_DN (0x100) -#define MCF_SEC_SICRL_DEU_ERR (0x200) -#define MCF_SEC_SICRL_AESU_DN (0x1000) -#define MCF_SEC_SICRL_AESU_ERR (0x2000) -#define MCF_SEC_SICRL_MDEU_DN (0x10000) -#define MCF_SEC_SICRL_MDEU_ERR (0x20000) -#define MCF_SEC_SICRL_AFEU_DN (0x100000) -#define MCF_SEC_SICRL_AFEU_ERR (0x200000) -#define MCF_SEC_SICRL_RNG_DN (0x1000000) -#define MCF_SEC_SICRL_RNG_ERR (0x2000000) - -/* Bit definitions and macros for MCF_SEC_SIDR */ -#define MCF_SEC_SIDR_VERSION(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SEC_EUASRH */ -#define MCF_SEC_EUASRH_AFEU(x) (((x)&0xF)<<0) -#define MCF_SEC_EUASRH_MDEU(x) (((x)&0xF)<<0x8) -#define MCF_SEC_EUASRH_RNG(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SEC_EUASRL */ -#define MCF_SEC_EUASRL_AESU(x) (((x)&0xF)<<0x10) -#define MCF_SEC_EUASRL_DEU(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SEC_SMCR */ -#define MCF_SEC_SMCR_CURR_CHAN(x) (((x)&0xF)<<0x4) -#define MCF_SEC_SMCR_CURR_CHAN_1 (0x10) -#define MCF_SEC_SMCR_CURR_CHAN_2 (0x20) -#define MCF_SEC_SMCR_SWR (0x1000000) - -/* Bit definitions and macros for MCF_SEC_MEAR */ -#define MCF_SEC_MEAR_ADDRESS(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SEC_CCCRn */ -#define MCF_SEC_CCCRn_RST (0x1) -#define MCF_SEC_CCCRn_CDIE (0x2) -#define MCF_SEC_CCCRn_NT (0x4) -#define MCF_SEC_CCCRn_NE (0x8) -#define MCF_SEC_CCCRn_WE (0x10) -#define MCF_SEC_CCCRn_BURST_SIZE(x) (((x)&0x7)<<0x8) -#define MCF_SEC_CCCRn_BURST_SIZE_2 (0) -#define MCF_SEC_CCCRn_BURST_SIZE_8 (0x100) -#define MCF_SEC_CCCRn_BURST_SIZE_16 (0x200) -#define MCF_SEC_CCCRn_BURST_SIZE_24 (0x300) -#define MCF_SEC_CCCRn_BURST_SIZE_32 (0x400) -#define MCF_SEC_CCCRn_BURST_SIZE_40 (0x500) -#define MCF_SEC_CCCRn_BURST_SIZE_48 (0x600) -#define MCF_SEC_CCCRn_BURST_SIZE_56 (0x700) - -/* Bit definitions and macros for MCF_SEC_CCPSRHn */ -#define MCF_SEC_CCPSRHn_STATE(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_SEC_CCPSRLn */ -#define MCF_SEC_CCPSRLn_PAIR_PTR(x) (((x)&0xFF)<<0) -#define MCF_SEC_CCPSRLn_EUERR (0x100) -#define MCF_SEC_CCPSRLn_SERR (0x200) -#define MCF_SEC_CCPSRLn_DERR (0x400) -#define MCF_SEC_CCPSRLn_PERR (0x1000) -#define MCF_SEC_CCPSRLn_TEA (0x2000) -#define MCF_SEC_CCPSRLn_SD (0x10000) -#define MCF_SEC_CCPSRLn_PD (0x20000) -#define MCF_SEC_CCPSRLn_SRD (0x40000) -#define MCF_SEC_CCPSRLn_PRD (0x80000) -#define MCF_SEC_CCPSRLn_SG (0x100000) -#define MCF_SEC_CCPSRLn_PG (0x200000) -#define MCF_SEC_CCPSRLn_SR (0x400000) -#define MCF_SEC_CCPSRLn_PR (0x800000) -#define MCF_SEC_CCPSRLn_MO (0x1000000) -#define MCF_SEC_CCPSRLn_MI (0x2000000) -#define MCF_SEC_CCPSRLn_STAT (0x4000000) - -/* Bit definitions and macros for MCF_SEC_CDPRn */ -#define MCF_SEC_CDPRn_CDP(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SEC_FRn */ -#define MCF_SEC_FRn_FETCH_ADDR(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SEC_AFRCR */ -#define MCF_SEC_AFRCR_SR (0x1000000) -#define MCF_SEC_AFRCR_MI (0x2000000) -#define MCF_SEC_AFRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_AFSR */ -#define MCF_SEC_AFSR_RD (0x1000000) -#define MCF_SEC_AFSR_ID (0x2000000) -#define MCF_SEC_AFSR_IE (0x4000000) -#define MCF_SEC_AFSR_OFR (0x8000000) -#define MCF_SEC_AFSR_IFW (0x10000000) -#define MCF_SEC_AFSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_AFISR */ -#define MCF_SEC_AFISR_DSE (0x10000) -#define MCF_SEC_AFISR_KSE (0x20000) -#define MCF_SEC_AFISR_CE (0x40000) -#define MCF_SEC_AFISR_ERE (0x80000) -#define MCF_SEC_AFISR_IE (0x100000) -#define MCF_SEC_AFISR_OFU (0x2000000) -#define MCF_SEC_AFISR_IFO (0x4000000) -#define MCF_SEC_AFISR_IFE (0x10000000) -#define MCF_SEC_AFISR_OFE (0x20000000) -#define MCF_SEC_AFISR_AE (0x40000000) -#define MCF_SEC_AFISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_AFIMR */ -#define MCF_SEC_AFIMR_DSE (0x10000) -#define MCF_SEC_AFIMR_KSE (0x20000) -#define MCF_SEC_AFIMR_CE (0x40000) -#define MCF_SEC_AFIMR_ERE (0x80000) -#define MCF_SEC_AFIMR_IE (0x100000) -#define MCF_SEC_AFIMR_OFU (0x2000000) -#define MCF_SEC_AFIMR_IFO (0x4000000) -#define MCF_SEC_AFIMR_IFE (0x10000000) -#define MCF_SEC_AFIMR_OFE (0x20000000) -#define MCF_SEC_AFIMR_AE (0x40000000) -#define MCF_SEC_AFIMR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_DRCR */ -#define MCF_SEC_DRCR_SR (0x1000000) -#define MCF_SEC_DRCR_MI (0x2000000) -#define MCF_SEC_DRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_DSR */ -#define MCF_SEC_DSR_RD (0x1000000) -#define MCF_SEC_DSR_ID (0x2000000) -#define MCF_SEC_DSR_IE (0x4000000) -#define MCF_SEC_DSR_OFR (0x8000000) -#define MCF_SEC_DSR_IFW (0x10000000) -#define MCF_SEC_DSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_DISR */ -#define MCF_SEC_DISR_DSE (0x10000) -#define MCF_SEC_DISR_KSE (0x20000) -#define MCF_SEC_DISR_CE (0x40000) -#define MCF_SEC_DISR_ERE (0x80000) -#define MCF_SEC_DISR_IE (0x100000) -#define MCF_SEC_DISR_KPE (0x200000) -#define MCF_SEC_DISR_OFU (0x2000000) -#define MCF_SEC_DISR_IFO (0x4000000) -#define MCF_SEC_DISR_IFE (0x10000000) -#define MCF_SEC_DISR_OFE (0x20000000) -#define MCF_SEC_DISR_AE (0x40000000) -#define MCF_SEC_DISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_DIMR */ -#define MCF_SEC_DIMR_DSE (0x10000) -#define MCF_SEC_DIMR_KSE (0x20000) -#define MCF_SEC_DIMR_CE (0x40000) -#define MCF_SEC_DIMR_ERE (0x80000) -#define MCF_SEC_DIMR_IE (0x100000) -#define MCF_SEC_DIMR_KPE (0x200000) -#define MCF_SEC_DIMR_OFU (0x2000000) -#define MCF_SEC_DIMR_IFO (0x4000000) -#define MCF_SEC_DIMR_IFE (0x10000000) -#define MCF_SEC_DIMR_OFE (0x20000000) -#define MCF_SEC_DIMR_AE (0x40000000) -#define MCF_SEC_DIMR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_MDRCR */ -#define MCF_SEC_MDRCR_SR (0x1000000) -#define MCF_SEC_MDRCR_MI (0x2000000) -#define MCF_SEC_MDRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_MDSR */ -#define MCF_SEC_MDSR_RD (0x1000000) -#define MCF_SEC_MDSR_ID (0x2000000) -#define MCF_SEC_MDSR_IE (0x4000000) -#define MCF_SEC_MDSR_IFW (0x10000000) -#define MCF_SEC_MDSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_MDISR */ -#define MCF_SEC_MDISR_DSE (0x10000) -#define MCF_SEC_MDISR_KSE (0x20000) -#define MCF_SEC_MDISR_CE (0x40000) -#define MCF_SEC_MDISR_ERE (0x80000) -#define MCF_SEC_MDISR_IE (0x100000) -#define MCF_SEC_MDISR_IFO (0x4000000) -#define MCF_SEC_MDISR_AE (0x40000000) -#define MCF_SEC_MDISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_MDIMR */ -#define MCF_SEC_MDIMR_DSE (0x10000) -#define MCF_SEC_MDIMR_KSE (0x20000) -#define MCF_SEC_MDIMR_CE (0x40000) -#define MCF_SEC_MDIMR_ERE (0x80000) -#define MCF_SEC_MDIMR_IE (0x100000) -#define MCF_SEC_MDIMR_IFO (0x4000000) -#define MCF_SEC_MDIMR_AE (0x40000000) -#define MCF_SEC_MDIMR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_RNGRCR */ -#define MCF_SEC_RNGRCR_SR (0x1000000) -#define MCF_SEC_RNGRCR_MI (0x2000000) -#define MCF_SEC_RNGRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_RNGSR */ -#define MCF_SEC_RNGSR_RD (0x1000000) -#define MCF_SEC_RNGSR_IE (0x4000000) -#define MCF_SEC_RNGSR_OFR (0x8000000) -#define MCF_SEC_RNGSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_RNGISR */ -#define MCF_SEC_RNGISR_IE (0x100000) -#define MCF_SEC_RNGISR_OFU (0x2000000) -#define MCF_SEC_RNGISR_AE (0x40000000) -#define MCF_SEC_RNGISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_RNGIMR */ -#define MCF_SEC_RNGIMR_IE (0x100000) -#define MCF_SEC_RNGIMR_OFU (0x2000000) -#define MCF_SEC_RNGIMR_AE (0x40000000) -#define MCF_SEC_RNGIMR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_AESRCR */ -#define MCF_SEC_AESRCR_SR (0x1000000) -#define MCF_SEC_AESRCR_MI (0x2000000) -#define MCF_SEC_AESRCR_RI (0x4000000) - -/* Bit definitions and macros for MCF_SEC_AESSR */ -#define MCF_SEC_AESSR_RD (0x1000000) -#define MCF_SEC_AESSR_ID (0x2000000) -#define MCF_SEC_AESSR_IE (0x4000000) -#define MCF_SEC_AESSR_OFR (0x8000000) -#define MCF_SEC_AESSR_IFW (0x10000000) -#define MCF_SEC_AESSR_HALT (0x20000000) - -/* Bit definitions and macros for MCF_SEC_AESISR */ -#define MCF_SEC_AESISR_DSE (0x10000) -#define MCF_SEC_AESISR_KSE (0x20000) -#define MCF_SEC_AESISR_CE (0x40000) -#define MCF_SEC_AESISR_ERE (0x80000) -#define MCF_SEC_AESISR_IE (0x100000) -#define MCF_SEC_AESISR_OFU (0x2000000) -#define MCF_SEC_AESISR_IFO (0x4000000) -#define MCF_SEC_AESISR_IFE (0x10000000) -#define MCF_SEC_AESISR_OFE (0x20000000) -#define MCF_SEC_AESISR_AE (0x40000000) -#define MCF_SEC_AESISR_ME (0x80000000) - -/* Bit definitions and macros for MCF_SEC_AESIMR */ -#define MCF_SEC_AESIMR_DSE (0x10000) -#define MCF_SEC_AESIMR_KSE (0x20000) -#define MCF_SEC_AESIMR_CE (0x40000) -#define MCF_SEC_AESIMR_ERE (0x80000) -#define MCF_SEC_AESIMR_IE (0x100000) -#define MCF_SEC_AESIMR_OFU (0x2000000) -#define MCF_SEC_AESIMR_IFO (0x4000000) -#define MCF_SEC_AESIMR_IFE (0x10000000) -#define MCF_SEC_AESIMR_OFE (0x20000000) -#define MCF_SEC_AESIMR_AE (0x40000000) -#define MCF_SEC_AESIMR_ME (0x80000000) - - -#endif /* __MCF5475_SEC_H__ */ diff --git a/tos/vmem_test/include/MCF5475_SIU.h b/tos/vmem_test/include/MCF5475_SIU.h deleted file mode 100644 index efb2896..0000000 --- a/tos/vmem_test/include/MCF5475_SIU.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SIU_H__ -#define __MCF5475_SIU_H__ - - -/********************************************************************* -* -* System Integration Unit (SIU) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SIU_SBCR (*(volatile uint32_t*)(&_MBAR[0x10])) -#define MCF_SIU_SECSACR (*(volatile uint32_t*)(&_MBAR[0x38])) -#define MCF_SIU_RSR (*(volatile uint32_t*)(&_MBAR[0x44])) -#define MCF_SIU_JTAGID (*(volatile uint32_t*)(&_MBAR[0x50])) - - -/* Bit definitions and macros for MCF_SIU_SBCR */ -#define MCF_SIU_SBCR_PIN2DSPI (0x8000000) -#define MCF_SIU_SBCR_DMA2CPU (0x10000000) -#define MCF_SIU_SBCR_CPU2DMA (0x20000000) -#define MCF_SIU_SBCR_PIN2DMA (0x40000000) -#define MCF_SIU_SBCR_PIN2CPU (0x80000000) - -/* Bit definitions and macros for MCF_SIU_SECSACR */ -#define MCF_SIU_SECSACR_SEQEN (0x1) - -/* Bit definitions and macros for MCF_SIU_RSR */ -#define MCF_SIU_RSR_RST (0x1) -#define MCF_SIU_RSR_RSTWD (0x2) -#define MCF_SIU_RSR_RSTJTG (0x8) - -/* Bit definitions and macros for MCF_SIU_JTAGID */ -#define MCF_SIU_JTAGID_JTAGID(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SIU_JTAGID */ -#define MCF_SIU_JTAGID_REV (0xF0000000) -#define MCF_SIU_JTAGID_PROCESSOR (0x0FFFFFFF) -#define MCF_SIU_JTAGID_MCF5485 (0x0800C01D) -#define MCF_SIU_JTAGID_MCF5484 (0x0800D01D) -#define MCF_SIU_JTAGID_MCF5483 (0x0800E01D) -#define MCF_SIU_JTAGID_MCF5482 (0x0800F01D) -#define MCF_SIU_JTAGID_MCF5481 (0x0801001D) -#define MCF_SIU_JTAGID_MCF5480 (0x0801101D) -#define MCF_SIU_JTAGID_MCF5475 (0x0801201D) -#define MCF_SIU_JTAGID_MCF5474 (0x0801301D) -#define MCF_SIU_JTAGID_MCF5473 (0x0801401D) -#define MCF_SIU_JTAGID_MCF5472 (0x0801501D) -#define MCF_SIU_JTAGID_MCF5471 (0x0801601D) -#define MCF_SIU_JTAGID_MCF5470 (0x0801701D) - -#endif /* __MCF5475_SIU_H__ */ diff --git a/tos/vmem_test/include/MCF5475_SLT.h b/tos/vmem_test/include/MCF5475_SLT.h deleted file mode 100644 index 20e8558..0000000 --- a/tos/vmem_test/include/MCF5475_SLT.h +++ /dev/null @@ -1,59 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SLT_H__ -#define __MCF5475_SLT_H__ - - -/********************************************************************* -* -* Slice Timers (SLT) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SLT0_STCNT (*(volatile uint32_t*)(&_MBAR[0x900])) -#define MCF_SLT0_SCR (*(volatile uint32_t*)(&_MBAR[0x904])) -#define MCF_SLT0_SCNT (*(volatile uint32_t*)(&_MBAR[0x908])) -#define MCF_SLT0_SSR (*(volatile uint32_t*)(&_MBAR[0x90C])) - -#define MCF_SLT1_STCNT (*(volatile uint32_t*)(&_MBAR[0x910])) -#define MCF_SLT1_SCR (*(volatile uint32_t*)(&_MBAR[0x914])) -#define MCF_SLT1_SCNT (*(volatile uint32_t*)(&_MBAR[0x918])) -#define MCF_SLT1_SSR (*(volatile uint32_t*)(&_MBAR[0x91C])) - -#define MCF_SLT_STCNT(x) (*(volatile uint32_t*)(&_MBAR[0x900 + ((x)*0x10)])) -#define MCF_SLT_SCR(x) (*(volatile uint32_t*)(&_MBAR[0x904 + ((x)*0x10)])) -#define MCF_SLT_SCNT(x) (*(volatile int32_t*)(&_MBAR[0x908 + ((x)*0x10)])) -#define MCF_SLT_SSR(x) (*(volatile uint32_t*)(&_MBAR[0x90C + ((x)*0x10)])) - - -/* Bit definitions and macros for MCF_SLT_STCNT */ -#define MCF_SLT_STCNT_TC(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SLT_SCR */ -#define MCF_SLT_SCR_TEN (0x1000000) -#define MCF_SLT_SCR_IEN (0x2000000) -#define MCF_SLT_SCR_RUN (0x4000000) - -/* Bit definitions and macros for MCF_SLT_SCNT */ -#define MCF_SLT_SCNT_CNT(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_SLT_SSR */ -#define MCF_SLT_SSR_ST (0x1000000) -#define MCF_SLT_SSR_BE (0x2000000) - - -#endif /* __MCF5475_SLT_H__ */ diff --git a/tos/vmem_test/include/MCF5475_SRAM.h b/tos/vmem_test/include/MCF5475_SRAM.h deleted file mode 100644 index d111f13..0000000 --- a/tos/vmem_test/include/MCF5475_SRAM.h +++ /dev/null @@ -1,62 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_SRAM_H__ -#define __MCF5475_SRAM_H__ - - -/********************************************************************* -* -* System SRAM Module (SRAM) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_SRAM_SSCR (*(volatile uint32_t*)(&__MBAR[0x1FFC0])) -#define MCF_SRAM_TCCR (*(volatile uint32_t*)(&__MBAR[0x1FFC4])) -#define MCF_SRAM_TCCRDR (*(volatile uint32_t*)(&__MBAR[0x1FFC8])) -#define MCF_SRAM_TCCRDW (*(volatile uint32_t*)(&__MBAR[0x1FFCC])) -#define MCF_SRAM_TCCRSEC (*(volatile uint32_t*)(&__MBAR[0x1FFD0])) - - -/* Bit definitions and macros for MCF_SRAM_SSCR */ -#define MCF_SRAM_SSCR_INLV (0x10000) - -/* Bit definitions and macros for MCF_SRAM_TCCR */ -#define MCF_SRAM_TCCR_BANK0_TC(x) (((x)&0xF)<<0) -#define MCF_SRAM_TCCR_BANK1_TC(x) (((x)&0xF)<<0x8) -#define MCF_SRAM_TCCR_BANK2_TC(x) (((x)&0xF)<<0x10) -#define MCF_SRAM_TCCR_BANK3_TC(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SRAM_TCCRDR */ -#define MCF_SRAM_TCCRDR_BANK0_TC(x) (((x)&0xF)<<0) -#define MCF_SRAM_TCCRDR_BANK1_TC(x) (((x)&0xF)<<0x8) -#define MCF_SRAM_TCCRDR_BANK2_TC(x) (((x)&0xF)<<0x10) -#define MCF_SRAM_TCCRDR_BANK3_TC(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SRAM_TCCRDW */ -#define MCF_SRAM_TCCRDW_BANK0_TC(x) (((x)&0xF)<<0) -#define MCF_SRAM_TCCRDW_BANK1_TC(x) (((x)&0xF)<<0x8) -#define MCF_SRAM_TCCRDW_BANK2_TC(x) (((x)&0xF)<<0x10) -#define MCF_SRAM_TCCRDW_BANK3_TC(x) (((x)&0xF)<<0x18) - -/* Bit definitions and macros for MCF_SRAM_TCCRSEC */ -#define MCF_SRAM_TCCRSEC_BANK0_TC(x) (((x)&0xF)<<0) -#define MCF_SRAM_TCCRSEC_BANK1_TC(x) (((x)&0xF)<<0x8) -#define MCF_SRAM_TCCRSEC_BANK2_TC(x) (((x)&0xF)<<0x10) -#define MCF_SRAM_TCCRSEC_BANK3_TC(x) (((x)&0xF)<<0x18) - - -#endif /* __MCF5475_SRAM_H__ */ diff --git a/tos/vmem_test/include/MCF5475_USB.h b/tos/vmem_test/include/MCF5475_USB.h deleted file mode 100644 index c60273c..0000000 --- a/tos/vmem_test/include/MCF5475_USB.h +++ /dev/null @@ -1,554 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_USB_H__ -#define __MCF5475_USB_H__ - - -/********************************************************************* -* -* Universal Serial Bus Interface (USB) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_USB_USBAISR (*(volatile uint8_t *)(&__MBAR[0xB000])) -#define MCF_USB_USBAIMR (*(volatile uint8_t *)(&__MBAR[0xB001])) -#define MCF_USB_EPINFO (*(volatile uint8_t *)(&__MBAR[0xB003])) -#define MCF_USB_CFGR (*(volatile uint8_t *)(&__MBAR[0xB004])) -#define MCF_USB_CFGAR (*(volatile uint8_t *)(&__MBAR[0xB005])) -#define MCF_USB_SPEEDR (*(volatile uint8_t *)(&__MBAR[0xB006])) -#define MCF_USB_FRMNUMR (*(volatile uint16_t*)(&__MBAR[0xB00E])) -#define MCF_USB_EPTNR (*(volatile uint16_t*)(&__MBAR[0xB010])) -#define MCF_USB_IFUR (*(volatile uint16_t*)(&__MBAR[0xB014])) -#define MCF_USB_IFR0 (*(volatile uint16_t*)(&__MBAR[0xB040])) -#define MCF_USB_IFR1 (*(volatile uint16_t*)(&__MBAR[0xB042])) -#define MCF_USB_IFR2 (*(volatile uint16_t*)(&__MBAR[0xB044])) -#define MCF_USB_IFR3 (*(volatile uint16_t*)(&__MBAR[0xB046])) -#define MCF_USB_IFR4 (*(volatile uint16_t*)(&__MBAR[0xB048])) -#define MCF_USB_IFR5 (*(volatile uint16_t*)(&__MBAR[0xB04A])) -#define MCF_USB_IFR6 (*(volatile uint16_t*)(&__MBAR[0xB04C])) -#define MCF_USB_IFR7 (*(volatile uint16_t*)(&__MBAR[0xB04E])) -#define MCF_USB_IFR8 (*(volatile uint16_t*)(&__MBAR[0xB050])) -#define MCF_USB_IFR9 (*(volatile uint16_t*)(&__MBAR[0xB052])) -#define MCF_USB_IFR10 (*(volatile uint16_t*)(&__MBAR[0xB054])) -#define MCF_USB_IFR11 (*(volatile uint16_t*)(&__MBAR[0xB056])) -#define MCF_USB_IFR12 (*(volatile uint16_t*)(&__MBAR[0xB058])) -#define MCF_USB_IFR13 (*(volatile uint16_t*)(&__MBAR[0xB05A])) -#define MCF_USB_IFR14 (*(volatile uint16_t*)(&__MBAR[0xB05C])) -#define MCF_USB_IFR15 (*(volatile uint16_t*)(&__MBAR[0xB05E])) -#define MCF_USB_IFR16 (*(volatile uint16_t*)(&__MBAR[0xB060])) -#define MCF_USB_IFR17 (*(volatile uint16_t*)(&__MBAR[0xB062])) -#define MCF_USB_IFR18 (*(volatile uint16_t*)(&__MBAR[0xB064])) -#define MCF_USB_IFR19 (*(volatile uint16_t*)(&__MBAR[0xB066])) -#define MCF_USB_IFR20 (*(volatile uint16_t*)(&__MBAR[0xB068])) -#define MCF_USB_IFR21 (*(volatile uint16_t*)(&__MBAR[0xB06A])) -#define MCF_USB_IFR22 (*(volatile uint16_t*)(&__MBAR[0xB06C])) -#define MCF_USB_IFR23 (*(volatile uint16_t*)(&__MBAR[0xB06E])) -#define MCF_USB_IFR24 (*(volatile uint16_t*)(&__MBAR[0xB070])) -#define MCF_USB_IFR25 (*(volatile uint16_t*)(&__MBAR[0xB072])) -#define MCF_USB_IFR26 (*(volatile uint16_t*)(&__MBAR[0xB074])) -#define MCF_USB_IFR27 (*(volatile uint16_t*)(&__MBAR[0xB076])) -#define MCF_USB_IFR28 (*(volatile uint16_t*)(&__MBAR[0xB078])) -#define MCF_USB_IFR29 (*(volatile uint16_t*)(&__MBAR[0xB07A])) -#define MCF_USB_IFR30 (*(volatile uint16_t*)(&__MBAR[0xB07C])) -#define MCF_USB_IFR31 (*(volatile uint16_t*)(&__MBAR[0xB07E])) -#define MCF_USB_PPCNT (*(volatile uint16_t*)(&__MBAR[0xB080])) -#define MCF_USB_DPCNT (*(volatile uint16_t*)(&__MBAR[0xB082])) -#define MCF_USB_CRCECNT (*(volatile uint16_t*)(&__MBAR[0xB084])) -#define MCF_USB_BSECNT (*(volatile uint16_t*)(&__MBAR[0xB086])) -#define MCF_USB_PIDECNT (*(volatile uint16_t*)(&__MBAR[0xB088])) -#define MCF_USB_FRMECNT (*(volatile uint16_t*)(&__MBAR[0xB08A])) -#define MCF_USB_TXPCNT (*(volatile uint16_t*)(&__MBAR[0xB08C])) -#define MCF_USB_CNTOVR (*(volatile uint8_t *)(&__MBAR[0xB08E])) -#define MCF_USB_EP0ACR (*(volatile uint8_t *)(&__MBAR[0xB101])) -#define MCF_USB_EP0MPSR (*(volatile uint16_t*)(&__MBAR[0xB102])) -#define MCF_USB_EP0IFR (*(volatile uint8_t *)(&__MBAR[0xB104])) -#define MCF_USB_EP0SR (*(volatile uint8_t *)(&__MBAR[0xB105])) -#define MCF_USB_BMRTR (*(volatile uint8_t *)(&__MBAR[0xB106])) -#define MCF_USB_BRTR (*(volatile uint8_t *)(&__MBAR[0xB107])) -#define MCF_USB_WVALUER (*(volatile uint16_t*)(&__MBAR[0xB108])) -#define MCF_USB_WINDEXR (*(volatile uint16_t*)(&__MBAR[0xB10A])) -#define MCF_USB_WLENGTHR (*(volatile uint16_t*)(&__MBAR[0xB10C])) -#define MCF_USB_EP1OUTACR (*(volatile uint8_t *)(&__MBAR[0xB131])) -#define MCF_USB_EP1OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB132])) -#define MCF_USB_EP1OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB134])) -#define MCF_USB_EP1OUTSR (*(volatile uint8_t *)(&__MBAR[0xB135])) -#define MCF_USB_EP1OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB13E])) -#define MCF_USB_EP1INACR (*(volatile uint8_t *)(&__MBAR[0xB149])) -#define MCF_USB_EP1INMPSR (*(volatile uint16_t*)(&__MBAR[0xB14A])) -#define MCF_USB_EP1INIFR (*(volatile uint8_t *)(&__MBAR[0xB14C])) -#define MCF_USB_EP1INSR (*(volatile uint8_t *)(&__MBAR[0xB14D])) -#define MCF_USB_EP1INSFR (*(volatile uint16_t*)(&__MBAR[0xB156])) -#define MCF_USB_EP2OUTACR (*(volatile uint8_t *)(&__MBAR[0xB161])) -#define MCF_USB_EP2OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB162])) -#define MCF_USB_EP2OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB164])) -#define MCF_USB_EP2OUTSR (*(volatile uint8_t *)(&__MBAR[0xB165])) -#define MCF_USB_EP2OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB16E])) -#define MCF_USB_EP2INACR (*(volatile uint8_t *)(&__MBAR[0xB179])) -#define MCF_USB_EP2INMPSR (*(volatile uint16_t*)(&__MBAR[0xB17A])) -#define MCF_USB_EP2INIFR (*(volatile uint8_t *)(&__MBAR[0xB17C])) -#define MCF_USB_EP2INSR (*(volatile uint8_t *)(&__MBAR[0xB17D])) -#define MCF_USB_EP2INSFR (*(volatile uint16_t*)(&__MBAR[0xB186])) -#define MCF_USB_EP3OUTACR (*(volatile uint8_t *)(&__MBAR[0xB191])) -#define MCF_USB_EP3OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB192])) -#define MCF_USB_EP3OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB194])) -#define MCF_USB_EP3OUTSR (*(volatile uint8_t *)(&__MBAR[0xB195])) -#define MCF_USB_EP3OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB19E])) -#define MCF_USB_EP3INACR (*(volatile uint8_t *)(&__MBAR[0xB1A9])) -#define MCF_USB_EP3INMPSR (*(volatile uint16_t*)(&__MBAR[0xB1AA])) -#define MCF_USB_EP3INIFR (*(volatile uint8_t *)(&__MBAR[0xB1AC])) -#define MCF_USB_EP3INSR (*(volatile uint8_t *)(&__MBAR[0xB1AD])) -#define MCF_USB_EP3INSFR (*(volatile uint16_t*)(&__MBAR[0xB1B6])) -#define MCF_USB_EP4OUTACR (*(volatile uint8_t *)(&__MBAR[0xB1C1])) -#define MCF_USB_EP4OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB1C2])) -#define MCF_USB_EP4OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB1C4])) -#define MCF_USB_EP4OUTSR (*(volatile uint8_t *)(&__MBAR[0xB1C5])) -#define MCF_USB_EP4OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB1CE])) -#define MCF_USB_EP4INACR (*(volatile uint8_t *)(&__MBAR[0xB1D9])) -#define MCF_USB_EP4INMPSR (*(volatile uint16_t*)(&__MBAR[0xB1DA])) -#define MCF_USB_EP4INIFR (*(volatile uint8_t *)(&__MBAR[0xB1DC])) -#define MCF_USB_EP4INSR (*(volatile uint8_t *)(&__MBAR[0xB1DD])) -#define MCF_USB_EP4INSFR (*(volatile uint16_t*)(&__MBAR[0xB1E6])) -#define MCF_USB_EP5OUTACR (*(volatile uint8_t *)(&__MBAR[0xB1F1])) -#define MCF_USB_EP5OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB1F2])) -#define MCF_USB_EP5OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB1F4])) -#define MCF_USB_EP5OUTSR (*(volatile uint8_t *)(&__MBAR[0xB1F5])) -#define MCF_USB_EP5OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB1FE])) -#define MCF_USB_EP5INACR (*(volatile uint8_t *)(&__MBAR[0xB209])) -#define MCF_USB_EP5INMPSR (*(volatile uint16_t*)(&__MBAR[0xB20A])) -#define MCF_USB_EP5INIFR (*(volatile uint8_t *)(&__MBAR[0xB20C])) -#define MCF_USB_EP5INSR (*(volatile uint8_t *)(&__MBAR[0xB20D])) -#define MCF_USB_EP5INSFR (*(volatile uint16_t*)(&__MBAR[0xB216])) -#define MCF_USB_EP6OUTACR (*(volatile uint8_t *)(&__MBAR[0xB221])) -#define MCF_USB_EP6OUTMPSR (*(volatile uint16_t*)(&__MBAR[0xB222])) -#define MCF_USB_EP6OUTIFR (*(volatile uint8_t *)(&__MBAR[0xB224])) -#define MCF_USB_EP6OUTSR (*(volatile uint8_t *)(&__MBAR[0xB225])) -#define MCF_USB_EP6OUTSFR (*(volatile uint16_t*)(&__MBAR[0xB22E])) -#define MCF_USB_EP6INACR (*(volatile uint8_t *)(&__MBAR[0xB239])) -#define MCF_USB_EP6INMPSR (*(volatile uint16_t*)(&__MBAR[0xB23A])) -#define MCF_USB_EP6INIFR (*(volatile uint8_t *)(&__MBAR[0xB23C])) -#define MCF_USB_EP6INSR (*(volatile uint8_t *)(&__MBAR[0xB23D])) -#define MCF_USB_EP6INSFR (*(volatile uint16_t*)(&__MBAR[0xB246])) -#define MCF_USB_USBSR (*(volatile uint32_t*)(&__MBAR[0xB400])) -#define MCF_USB_USBCR (*(volatile uint32_t*)(&__MBAR[0xB404])) -#define MCF_USB_DRAMCR (*(volatile uint32_t*)(&__MBAR[0xB408])) -#define MCF_USB_DRAMDR (*(volatile uint32_t*)(&__MBAR[0xB40C])) -#define MCF_USB_USBISR (*(volatile uint32_t*)(&__MBAR[0xB410])) -#define MCF_USB_USBIMR (*(volatile uint32_t*)(&__MBAR[0xB414])) -#define MCF_USB_EP0STAT (*(volatile uint32_t*)(&__MBAR[0xB440])) -#define MCF_USB_EP0ISR (*(volatile uint32_t*)(&__MBAR[0xB444])) -#define MCF_USB_EP0IMR (*(volatile uint32_t*)(&__MBAR[0xB448])) -#define MCF_USB_EP0FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB44C])) -#define MCF_USB_EP0FDR (*(volatile uint32_t*)(&__MBAR[0xB450])) -#define MCF_USB_EP0FSR (*(volatile uint32_t*)(&__MBAR[0xB454])) -#define MCF_USB_EP0FCR (*(volatile uint32_t*)(&__MBAR[0xB458])) -#define MCF_USB_EP0FAR (*(volatile uint32_t*)(&__MBAR[0xB45C])) -#define MCF_USB_EP0FRP (*(volatile uint32_t*)(&__MBAR[0xB460])) -#define MCF_USB_EP0FWP (*(volatile uint32_t*)(&__MBAR[0xB464])) -#define MCF_USB_EP0LRFP (*(volatile uint32_t*)(&__MBAR[0xB468])) -#define MCF_USB_EP0LWFP (*(volatile uint32_t*)(&__MBAR[0xB46C])) -#define MCF_USB_EP1STAT (*(volatile uint32_t*)(&__MBAR[0xB470])) -#define MCF_USB_EP1ISR (*(volatile uint32_t*)(&__MBAR[0xB474])) -#define MCF_USB_EP1IMR (*(volatile uint32_t*)(&__MBAR[0xB478])) -#define MCF_USB_EP1FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB47C])) -#define MCF_USB_EP1FDR (*(volatile uint32_t*)(&__MBAR[0xB480])) -#define MCF_USB_EP1FSR (*(volatile uint32_t*)(&__MBAR[0xB484])) -#define MCF_USB_EP1FCR (*(volatile uint32_t*)(&__MBAR[0xB488])) -#define MCF_USB_EP1FAR (*(volatile uint32_t*)(&__MBAR[0xB48C])) -#define MCF_USB_EP1FRP (*(volatile uint32_t*)(&__MBAR[0xB490])) -#define MCF_USB_EP1FWP (*(volatile uint32_t*)(&__MBAR[0xB494])) -#define MCF_USB_EP1LRFP (*(volatile uint32_t*)(&__MBAR[0xB498])) -#define MCF_USB_EP1LWFP (*(volatile uint32_t*)(&__MBAR[0xB49C])) -#define MCF_USB_EP2STAT (*(volatile uint32_t*)(&__MBAR[0xB4A0])) -#define MCF_USB_EP2ISR (*(volatile uint32_t*)(&__MBAR[0xB4A4])) -#define MCF_USB_EP2IMR (*(volatile uint32_t*)(&__MBAR[0xB4A8])) -#define MCF_USB_EP2FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB4AC])) -#define MCF_USB_EP2FDR (*(volatile uint32_t*)(&__MBAR[0xB4B0])) -#define MCF_USB_EP2FSR (*(volatile uint32_t*)(&__MBAR[0xB4B4])) -#define MCF_USB_EP2FCR (*(volatile uint32_t*)(&__MBAR[0xB4B8])) -#define MCF_USB_EP2FAR (*(volatile uint32_t*)(&__MBAR[0xB4BC])) -#define MCF_USB_EP2FRP (*(volatile uint32_t*)(&__MBAR[0xB4C0])) -#define MCF_USB_EP2FWP (*(volatile uint32_t*)(&__MBAR[0xB4C4])) -#define MCF_USB_EP2LRFP (*(volatile uint32_t*)(&__MBAR[0xB4C8])) -#define MCF_USB_EP2LWFP (*(volatile uint32_t*)(&__MBAR[0xB4CC])) -#define MCF_USB_EP3STAT (*(volatile uint32_t*)(&__MBAR[0xB4D0])) -#define MCF_USB_EP3ISR (*(volatile uint32_t*)(&__MBAR[0xB4D4])) -#define MCF_USB_EP3IMR (*(volatile uint32_t*)(&__MBAR[0xB4D8])) -#define MCF_USB_EP3FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB4DC])) -#define MCF_USB_EP3FDR (*(volatile uint32_t*)(&__MBAR[0xB4E0])) -#define MCF_USB_EP3FSR (*(volatile uint32_t*)(&__MBAR[0xB4E4])) -#define MCF_USB_EP3FCR (*(volatile uint32_t*)(&__MBAR[0xB4E8])) -#define MCF_USB_EP3FAR (*(volatile uint32_t*)(&__MBAR[0xB4EC])) -#define MCF_USB_EP3FRP (*(volatile uint32_t*)(&__MBAR[0xB4F0])) -#define MCF_USB_EP3FWP (*(volatile uint32_t*)(&__MBAR[0xB4F4])) -#define MCF_USB_EP3LRFP (*(volatile uint32_t*)(&__MBAR[0xB4F8])) -#define MCF_USB_EP3LWFP (*(volatile uint32_t*)(&__MBAR[0xB4FC])) -#define MCF_USB_EP4STAT (*(volatile uint32_t*)(&__MBAR[0xB500])) -#define MCF_USB_EP4ISR (*(volatile uint32_t*)(&__MBAR[0xB504])) -#define MCF_USB_EP4IMR (*(volatile uint32_t*)(&__MBAR[0xB508])) -#define MCF_USB_EP4FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB50C])) -#define MCF_USB_EP4FDR (*(volatile uint32_t*)(&__MBAR[0xB510])) -#define MCF_USB_EP4FSR (*(volatile uint32_t*)(&__MBAR[0xB514])) -#define MCF_USB_EP4FCR (*(volatile uint32_t*)(&__MBAR[0xB518])) -#define MCF_USB_EP4FAR (*(volatile uint32_t*)(&__MBAR[0xB51C])) -#define MCF_USB_EP4FRP (*(volatile uint32_t*)(&__MBAR[0xB520])) -#define MCF_USB_EP4FWP (*(volatile uint32_t*)(&__MBAR[0xB524])) -#define MCF_USB_EP4LRFP (*(volatile uint32_t*)(&__MBAR[0xB528])) -#define MCF_USB_EP4LWFP (*(volatile uint32_t*)(&__MBAR[0xB52C])) -#define MCF_USB_EP5STAT (*(volatile uint32_t*)(&__MBAR[0xB530])) -#define MCF_USB_EP5ISR (*(volatile uint32_t*)(&__MBAR[0xB534])) -#define MCF_USB_EP5IMR (*(volatile uint32_t*)(&__MBAR[0xB538])) -#define MCF_USB_EP5FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB53C])) -#define MCF_USB_EP5FDR (*(volatile uint32_t*)(&__MBAR[0xB540])) -#define MCF_USB_EP5FSR (*(volatile uint32_t*)(&__MBAR[0xB544])) -#define MCF_USB_EP5FCR (*(volatile uint32_t*)(&__MBAR[0xB548])) -#define MCF_USB_EP5FAR (*(volatile uint32_t*)(&__MBAR[0xB54C])) -#define MCF_USB_EP5FRP (*(volatile uint32_t*)(&__MBAR[0xB550])) -#define MCF_USB_EP5FWP (*(volatile uint32_t*)(&__MBAR[0xB554])) -#define MCF_USB_EP5LRFP (*(volatile uint32_t*)(&__MBAR[0xB558])) -#define MCF_USB_EP5LWFP (*(volatile uint32_t*)(&__MBAR[0xB55C])) -#define MCF_USB_EP6STAT (*(volatile uint32_t*)(&__MBAR[0xB560])) -#define MCF_USB_EP6ISR (*(volatile uint32_t*)(&__MBAR[0xB564])) -#define MCF_USB_EP6IMR (*(volatile uint32_t*)(&__MBAR[0xB568])) -#define MCF_USB_EP6FRCFGR (*(volatile uint32_t*)(&__MBAR[0xB56C])) -#define MCF_USB_EP6FDR (*(volatile uint32_t*)(&__MBAR[0xB570])) -#define MCF_USB_EP6FSR (*(volatile uint32_t*)(&__MBAR[0xB574])) -#define MCF_USB_EP6FCR (*(volatile uint32_t*)(&__MBAR[0xB578])) -#define MCF_USB_EP6FAR (*(volatile uint32_t*)(&__MBAR[0xB57C])) -#define MCF_USB_EP6FRP (*(volatile uint32_t*)(&__MBAR[0xB580])) -#define MCF_USB_EP6FWP (*(volatile uint32_t*)(&__MBAR[0xB584])) -#define MCF_USB_EP6LRFP (*(volatile uint32_t*)(&__MBAR[0xB588])) -#define MCF_USB_EP6LWFP (*(volatile uint32_t*)(&__MBAR[0xB58C])) -#define MCF_USB_IFR(x) (*(volatile uint16_t*)(&__MBAR[0xB040 + ((x)*0x2)])) -#define MCF_USB_EPOUTACR(x) (*(volatile uint8_t *)(&__MBAR[0xB131 + ((x-1)*0x30)])) -#define MCF_USB_EPOUTMPSR(x) (*(volatile uint16_t*)(&__MBAR[0xB132 + ((x-1)*0x30)])) -#define MCF_USB_EPOUTIFR(x) (*(volatile uint8_t *)(&__MBAR[0xB134 + ((x-1)*0x30)])) -#define MCF_USB_EPOUTSR(x) (*(volatile uint8_t *)(&__MBAR[0xB135 + ((x-1)*0x30)])) -#define MCF_USB_EPOUTSFR(x) (*(volatile uint16_t*)(&__MBAR[0xB13E + ((x-1)*0x30)])) -#define MCF_USB_EPINACR(x) (*(volatile uint8_t *)(&__MBAR[0xB149 + ((x-1)*0x30)])) -#define MCF_USB_EPINMPSR(x) (*(volatile uint16_t*)(&__MBAR[0xB14A + ((x-1)*0x30)])) -#define MCF_USB_EPINIFR(x) (*(volatile uint8_t *)(&__MBAR[0xB14C + ((x-1)*0x30)])) -#define MCF_USB_EPINSR(x) (*(volatile uint8_t *)(&__MBAR[0xB14D + ((x-1)*0x30)])) -#define MCF_USB_EPINSFR(x) (*(volatile uint16_t*)(&__MBAR[0xB156 + ((x-1)*0x30)])) -#define MCF_USB_EPSTAT(x) (*(volatile uint32_t*)(&__MBAR[0xB440 + ((x)*0x30)])) -#define MCF_USB_EPISR(x) (*(volatile uint32_t*)(&__MBAR[0xB444 + ((x)*0x30)])) -#define MCF_USB_EPIMR(x) (*(volatile uint32_t*)(&__MBAR[0xB448 + ((x)*0x30)])) -#define MCF_USB_EPFRCFGR(x) (*(volatile uint32_t*)(&__MBAR[0xB44C + ((x)*0x30)])) -#define MCF_USB_EPFDR(x) (*(volatile uint32_t*)(&__MBAR[0xB450 + ((x)*0x30)])) -#define MCF_USB_EPFSR(x) (*(volatile uint32_t*)(&__MBAR[0xB454 + ((x)*0x30)])) -#define MCF_USB_EPFCR(x) (*(volatile uint32_t*)(&__MBAR[0xB458 + ((x)*0x30)])) -#define MCF_USB_EPFAR(x) (*(volatile uint32_t*)(&__MBAR[0xB45C + ((x)*0x30)])) -#define MCF_USB_EPFRP(x) (*(volatile uint32_t*)(&__MBAR[0xB460 + ((x)*0x30)])) -#define MCF_USB_EPFWP(x) (*(volatile uint32_t*)(&__MBAR[0xB464 + ((x)*0x30)])) -#define MCF_USB_EPLRFP(x) (*(volatile uint32_t*)(&__MBAR[0xB468 + ((x)*0x30)])) -#define MCF_USB_EPLWFP(x) (*(volatile uint32_t*)(&__MBAR[0xB46C + ((x)*0x30)])) - - -/* Bit definitions and macros for MCF_USB_USBAISR */ -#define MCF_USB_USBAISR_SETUP (0x1) -#define MCF_USB_USBAISR_IN (0x2) -#define MCF_USB_USBAISR_OUT (0x4) -#define MCF_USB_USBAISR_EPHALT (0x8) -#define MCF_USB_USBAISR_TRANSERR (0x10) -#define MCF_USB_USBAISR_ACK (0x20) -#define MCF_USB_USBAISR_CTROVFL (0x40) -#define MCF_USB_USBAISR_EPSTALL (0x80) - -/* Bit definitions and macros for MCF_USB_USBAIMR */ -#define MCF_USB_USBAIMR_SETUPEN (0x1) -#define MCF_USB_USBAIMR_INEN (0x2) -#define MCF_USB_USBAIMR_OUTEN (0x4) -#define MCF_USB_USBAIMR_EPHALTEN (0x8) -#define MCF_USB_USBAIMR_TRANSERREN (0x10) -#define MCF_USB_USBAIMR_ACKEN (0x20) -#define MCF_USB_USBAIMR_CTROVFLEN (0x40) -#define MCF_USB_USBAIMR_EPSTALLEN (0x80) - -/* Bit definitions and macros for MCF_USB_EPINFO */ -#define MCF_USB_EPINFO_EPDIR (0x1) -#define MCF_USB_EPINFO_EPNUM(x) (((x)&0x7)<<0x1) - -/* Bit definitions and macros for MCF_USB_CFGR */ -#define MCF_USB_CFGR_Configuration_Value(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_CFGAR */ -#define MCF_USB_CFGAR_RESERVED (0xA0) -#define MCF_USB_CFGAR_RMTWKEUP (0xE0) - -/* Bit definitions and macros for MCF_USB_SPEEDR */ -#define MCF_USB_SPEEDR_SPEED(x) (((x)&0x3)<<0) - -/* Bit definitions and macros for MCF_USB_FRMNUMR */ -#define MCF_USB_FRMNUMR_FRMNUM(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPTNR */ -#define MCF_USB_EPTNR_EP1T(x) (((x)&0x3)<<0) -#define MCF_USB_EPTNR_EP2T(x) (((x)&0x3)<<0x2) -#define MCF_USB_EPTNR_EP3T(x) (((x)&0x3)<<0x4) -#define MCF_USB_EPTNR_EP4T(x) (((x)&0x3)<<0x6) -#define MCF_USB_EPTNR_EP5T(x) (((x)&0x3)<<0x8) -#define MCF_USB_EPTNR_EP6T(x) (((x)&0x3)<<0xA) -#define MCF_USB_EPTNR_EPnT1 (0) -#define MCF_USB_EPTNR_EPnT2 (0x1) -#define MCF_USB_EPTNR_EPnT3 (0x2) - -/* Bit definitions and macros for MCF_USB_IFUR */ -#define MCF_USB_IFUR_ALTSET(x) (((x)&0xFF)<<0) -#define MCF_USB_IFUR_IFNUM(x) (((x)&0xFF)<<0x8) - -/* Bit definitions and macros for MCF_USB_IFR */ -#define MCF_USB_IFR_ALTSET(x) (((x)&0xFF)<<0) -#define MCF_USB_IFR_IFNUM(x) (((x)&0xFF)<<0x8) - -/* Bit definitions and macros for MCF_USB_PPCNT */ -#define MCF_USB_PPCNT_PPCNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_DPCNT */ -#define MCF_USB_DPCNT_DPCNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_CRCECNT */ -#define MCF_USB_CRCECNT_CRCECNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_BSECNT */ -#define MCF_USB_BSECNT_BSECNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_PIDECNT */ -#define MCF_USB_PIDECNT_PIDECNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_FRMECNT */ -#define MCF_USB_FRMECNT_FRMECNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_TXPCNT */ -#define MCF_USB_TXPCNT_TXPCNT(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_CNTOVR */ -#define MCF_USB_CNTOVR_PPCNT (0x1) -#define MCF_USB_CNTOVR_DPCNT (0x2) -#define MCF_USB_CNTOVR_CRCECNT (0x4) -#define MCF_USB_CNTOVR_BSECNT (0x8) -#define MCF_USB_CNTOVR_PIDECNT (0x10) -#define MCF_USB_CNTOVR_FRMECNT (0x20) -#define MCF_USB_CNTOVR_TXPCNT (0x40) - -/* Bit definitions and macros for MCF_USB_EP0ACR */ -#define MCF_USB_EP0ACR_TTYPE(x) (((x)&0x3)<<0) -#define MCF_USB_EP0ACR_TTYPE_CTRL (0) -#define MCF_USB_EP0ACR_TTYPE_ISOC (0x1) -#define MCF_USB_EP0ACR_TTYPE_BULK (0x2) -#define MCF_USB_EP0ACR_TTYPE_INT (0x3) - -/* Bit definitions and macros for MCF_USB_EP0MPSR */ -#define MCF_USB_EP0MPSR_MAXPKTSZ(x) (((x)&0x7FF)<<0) -#define MCF_USB_EP0MPSR_ADDTRANS(x) (((x)&0x3)<<0xB) - -/* Bit definitions and macros for MCF_USB_EP0IFR */ -#define MCF_USB_EP0IFR_IFNUM(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_EP0SR */ -#define MCF_USB_EP0SR_HALT (0x1) -#define MCF_USB_EP0SR_ACTIVE (0x2) -#define MCF_USB_EP0SR_PSTALL (0x4) -#define MCF_USB_EP0SR_CCOMP (0x8) -#define MCF_USB_EP0SR_TXZERO (0x20) -#define MCF_USB_EP0SR_INT (0x80) - -/* Bit definitions and macros for MCF_USB_BMRTR */ -#define MCF_USB_BMRTR_REC(x) (((x)&0x1F)<<0) -#define MCF_USB_BMRTR_REC_DEVICE (0) -#define MCF_USB_BMRTR_REC_INTERFACE (0x1) -#define MCF_USB_BMRTR_REC_ENDPOINT (0x2) -#define MCF_USB_BMRTR_REC_OTHER (0x3) -#define MCF_USB_BMRTR_TYPE(x) (((x)&0x3)<<0x5) -#define MCF_USB_BMRTR_TYPE_STANDARD (0) -#define MCF_USB_BMRTR_TYPE_CLASS (0x20) -#define MCF_USB_BMRTR_TYPE_VENDOR (0x40) -#define MCF_USB_BMRTR_DIR (0x80) - -/* Bit definitions and macros for MCF_USB_BRTR */ -#define MCF_USB_BRTR_BREQ(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_WVALUER */ -#define MCF_USB_WVALUER_WVALUE(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_WINDEXR */ -#define MCF_USB_WINDEXR_WINDEX(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_WLENGTHR */ -#define MCF_USB_WLENGTHR_WLENGTH(x) (((x)&0xFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPOUTACR */ -#define MCF_USB_EPOUTACR_TTYPE(x) (((x)&0x3)<<0) -#define MCF_USB_EPOUTACR_TTYPE_ISOC (0x1) -#define MCF_USB_EPOUTACR_TTYPE_BULK (0x2) -#define MCF_USB_EPOUTACR_TTYPE_INT (0x3) - -/* Bit definitions and macros for MCF_USB_EPOUTMPSR */ -#define MCF_USB_EPOUTMPSR_MAXPKTSZ(x) (((x)&0x7FF)<<0) -#define MCF_USB_EPOUTMPSR_ADDTRANS(x) (((x)&0x3)<<0xB) - -/* Bit definitions and macros for MCF_USB_EPOUTIFR */ -#define MCF_USB_EPOUTIFR_IFNUM(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPOUTSR */ -#define MCF_USB_EPOUTSR_HALT (0x1) -#define MCF_USB_EPOUTSR_ACTIVE (0x2) -#define MCF_USB_EPOUTSR_PSTALL (0x4) -#define MCF_USB_EPOUTSR_CCOMP (0x8) -#define MCF_USB_EPOUTSR_TXZERO (0x20) -#define MCF_USB_EPOUTSR_INT (0x80) - -/* Bit definitions and macros for MCF_USB_EPOUTSFR */ -#define MCF_USB_EPOUTSFR_FRMNUM(x) (((x)&0x7FF)<<0) - -/* Bit definitions and macros for MCF_USB_EPINACR */ -#define MCF_USB_EPINACR_TTYPE(x) (((x)&0x3)<<0) -#define MCF_USB_EPINACR_TTYPE_ISOC (0x1) -#define MCF_USB_EPINACR_TTYPE_BULK (0x2) -#define MCF_USB_EPINACR_TTYPE_INT (0x3) - -/* Bit definitions and macros for MCF_USB_EPINMPSR */ -#define MCF_USB_EPINMPSR_MAXPKTSZ(x) (((x)&0x7FF)<<0) -#define MCF_USB_EPINMPSR_ADDTRANS(x) (((x)&0x3)<<0xB) - -/* Bit definitions and macros for MCF_USB_EPINIFR */ -#define MCF_USB_EPINIFR_IFNUM(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPINSR */ -#define MCF_USB_EPINSR_HALT (0x1) -#define MCF_USB_EPINSR_ACTIVE (0x2) -#define MCF_USB_EPINSR_PSTALL (0x4) -#define MCF_USB_EPINSR_CCOMP (0x8) -#define MCF_USB_EPINSR_TXZERO (0x20) -#define MCF_USB_EPINSR_INT (0x80) - -/* Bit definitions and macros for MCF_USB_EPINSFR */ -#define MCF_USB_EPINSFR_FRMNUM(x) (((x)&0x7FF)<<0) - -/* Bit definitions and macros for MCF_USB_USBSR */ -#define MCF_USB_USBSR_ISOERREP(x) (((x)&0xF)<<0) -#define MCF_USB_USBSR_SUSP (0x80) - -/* Bit definitions and macros for MCF_USB_USBCR */ -#define MCF_USB_USBCR_RESUME (0x1) -#define MCF_USB_USBCR_APPLOCK (0x2) -#define MCF_USB_USBCR_RST (0x4) -#define MCF_USB_USBCR_RAMEN (0x8) -#define MCF_USB_USBCR_RAMSPLIT (0x20) - -/* Bit definitions and macros for MCF_USB_DRAMCR */ -#define MCF_USB_DRAMCR_DADR(x) (((x)&0x3FF)<<0) -#define MCF_USB_DRAMCR_DSIZE(x) (((x)&0x7FF)<<0x10) -#define MCF_USB_DRAMCR_BSY (0x40000000) -#define MCF_USB_DRAMCR_START (0x80000000) - -/* Bit definitions and macros for MCF_USB_DRAMDR */ -#define MCF_USB_DRAMDR_DDAT(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_USB_USBISR */ -#define MCF_USB_USBISR_ISOERR (0x1) -#define MCF_USB_USBISR_FTUNLCK (0x2) -#define MCF_USB_USBISR_SUSP (0x4) -#define MCF_USB_USBISR_RES (0x8) -#define MCF_USB_USBISR_UPDSOF (0x10) -#define MCF_USB_USBISR_RSTSTOP (0x20) -#define MCF_USB_USBISR_SOF (0x40) -#define MCF_USB_USBISR_MSOF (0x80) - -/* Bit definitions and macros for MCF_USB_USBIMR */ -#define MCF_USB_USBIMR_ISOERR (0x1) -#define MCF_USB_USBIMR_FTUNLCK (0x2) -#define MCF_USB_USBIMR_SUSP (0x4) -#define MCF_USB_USBIMR_RES (0x8) -#define MCF_USB_USBIMR_UPDSOF (0x10) -#define MCF_USB_USBIMR_RSTSTOP (0x20) -#define MCF_USB_USBIMR_SOF (0x40) -#define MCF_USB_USBIMR_MSOF (0x80) - -/* Bit definitions and macros for MCF_USB_EPSTAT */ -#define MCF_USB_EPSTAT_RST (0x1) -#define MCF_USB_EPSTAT_FLUSH (0x2) -#define MCF_USB_EPSTAT_DIR (0x80) -#define MCF_USB_EPSTAT_BYTECNT(x) (((x)&0xFFF)<<0x10) - -/* Bit definitions and macros for MCF_USB_EPISR */ -#define MCF_USB_EPISR_EOF (0x1) -#define MCF_USB_EPISR_EOT (0x4) -#define MCF_USB_EPISR_FIFOLO (0x10) -#define MCF_USB_EPISR_FIFOHI (0x20) -#define MCF_USB_EPISR_ERR (0x40) -#define MCF_USB_EPISR_EMT (0x80) -#define MCF_USB_EPISR_FU (0x100) - -/* Bit definitions and macros for MCF_USB_EPIMR */ -#define MCF_USB_EPIMR_EOF (0x1) -#define MCF_USB_EPIMR_EOT (0x4) -#define MCF_USB_EPIMR_FIFOLO (0x10) -#define MCF_USB_EPIMR_FIFOHI (0x20) -#define MCF_USB_EPIMR_ERR (0x40) -#define MCF_USB_EPIMR_EMT (0x80) -#define MCF_USB_EPIMR_FU (0x100) - -/* Bit definitions and macros for MCF_USB_EPFRCFGR */ -#define MCF_USB_EPFRCFGR_DEPTH(x) (((x)&0x1FFF)<<0) -#define MCF_USB_EPFRCFGR_BASE(x) (((x)&0xFFF)<<0x10) - -/* Bit definitions and macros for MCF_USB_EPFDR */ -#define MCF_USB_EPFDR_RX_TXDATA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPFSR */ -#define MCF_USB_EPFSR_EMT (0x10000) -#define MCF_USB_EPFSR_ALRM (0x20000) -#define MCF_USB_EPFSR_FU (0x40000) -#define MCF_USB_EPFSR_FR (0x80000) -#define MCF_USB_EPFSR_OF (0x100000) -#define MCF_USB_EPFSR_UF (0x200000) -#define MCF_USB_EPFSR_RXW (0x400000) -#define MCF_USB_EPFSR_FAE (0x800000) -#define MCF_USB_EPFSR_FRM(x) (((x)&0xF)<<0x18) -#define MCF_USB_EPFSR_TXW (0x40000000) -#define MCF_USB_EPFSR_IP (0x80000000) - -/* Bit definitions and macros for MCF_USB_EPFCR */ -#define MCF_USB_EPFCR_COUNTER(x) (((x)&0xFFFF)<<0) -#define MCF_USB_EPFCR_TXWMSK (0x40000) -#define MCF_USB_EPFCR_OFMSK (0x80000) -#define MCF_USB_EPFCR_UFMSK (0x100000) -#define MCF_USB_EPFCR_RXWMSK (0x200000) -#define MCF_USB_EPFCR_FAEMSK (0x400000) -#define MCF_USB_EPFCR_IPMSK (0x800000) -#define MCF_USB_EPFCR_GR(x) (((x)&0x7)<<0x18) -#define MCF_USB_EPFCR_FRM (0x8000000) -#define MCF_USB_EPFCR_TMR (0x10000000) -#define MCF_USB_EPFCR_WFR (0x20000000) -#define MCF_USB_EPFCR_SHAD (0x80000000) - -/* Bit definitions and macros for MCF_USB_EPFAR */ -#define MCF_USB_EPFAR_ALRMP(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPFRP */ -#define MCF_USB_EPFRP_RP(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPFWP */ -#define MCF_USB_EPFWP_WP(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPLRFP */ -#define MCF_USB_EPLRFP_LRFP(x) (((x)&0xFFF)<<0) - -/* Bit definitions and macros for MCF_USB_EPLWFP */ -#define MCF_USB_EPLWFP_LWFP(x) (((x)&0xFFF)<<0) - - -#endif /* __MCF5475_USB_H__ */ diff --git a/tos/vmem_test/include/MCF5475_XLB.h b/tos/vmem_test/include/MCF5475_XLB.h deleted file mode 100644 index af25ae7..0000000 --- a/tos/vmem_test/include/MCF5475_XLB.h +++ /dev/null @@ -1,101 +0,0 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_XLB_H__ -#define __MCF5475_XLB_H__ - - -/********************************************************************* -* -* XL Bus Arbiter (XLB) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_XLB_XARB_CFG (*(volatile uint32_t*)(&_MBAR[0x240])) -#define MCF_XLB_XARB_VER (*(volatile uint32_t*)(&_MBAR[0x244])) -#define MCF_XLB_XARB_SR (*(volatile uint32_t*)(&_MBAR[0x248])) -#define MCF_XLB_XARB_IMR (*(volatile uint32_t*)(&_MBAR[0x24C])) -#define MCF_XLB_XARB_ADRCAP (*(volatile uint32_t*)(&_MBAR[0x250])) -#define MCF_XLB_XARB_SIGCAP (*(volatile uint32_t*)(&_MBAR[0x254])) -#define MCF_XLB_XARB_ADRTO (*(volatile uint32_t*)(&_MBAR[0x258])) -#define MCF_XLB_XARB_DATTO (*(volatile uint32_t*)(&_MBAR[0x25C])) -#define MCF_XLB_XARB_BUSTO (*(volatile uint32_t*)(&_MBAR[0x260])) -#define MCF_XLB_XARB_PRIEN (*(volatile uint32_t*)(&_MBAR[0x264])) -#define MCF_XLB_XARB_PRI (*(volatile uint32_t*)(&_MBAR[0x268])) - - -/* Bit definitions and macros for MCF_XLB_XARB_CFG */ -#define MCF_XLB_XARB_CFG_AT (0x2) -#define MCF_XLB_XARB_CFG_DT (0x4) -#define MCF_XLB_XARB_CFG_BA (0x8) -#define MCF_XLB_XARB_CFG_PM(x) (((x)&0x3)<<0x5) -#define MCF_XLB_XARB_CFG_SP(x) (((x)&0x7)<<0x8) -#define MCF_XLB_XARB_CFG_PLDIS (0x80000000) - -/* Bit definitions and macros for MCF_XLB_XARB_VER */ -#define MCF_XLB_XARB_VER_VER(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_SR */ -#define MCF_XLB_XARB_SR_AT (0x1) -#define MCF_XLB_XARB_SR_DT (0x2) -#define MCF_XLB_XARB_SR_BA (0x4) -#define MCF_XLB_XARB_SR_TTM (0x8) -#define MCF_XLB_XARB_SR_ECW (0x10) -#define MCF_XLB_XARB_SR_TTR (0x20) -#define MCF_XLB_XARB_SR_TTA (0x40) -#define MCF_XLB_XARB_SR_MM (0x80) -#define MCF_XLB_XARB_SR_SEA (0x100) - -/* Bit definitions and macros for MCF_XLB_XARB_IMR */ -#define MCF_XLB_XARB_IMR_ATE (0x1) -#define MCF_XLB_XARB_IMR_DTE (0x2) -#define MCF_XLB_XARB_IMR_BAE (0x4) -#define MCF_XLB_XARB_IMR_TTME (0x8) -#define MCF_XLB_XARB_IMR_ECWE (0x10) -#define MCF_XLB_XARB_IMR_TTRE (0x20) -#define MCF_XLB_XARB_IMR_TTAE (0x40) -#define MCF_XLB_XARB_IMR_MME (0x80) -#define MCF_XLB_XARB_IMR_SEAE (0x100) - -/* Bit definitions and macros for MCF_XLB_XARB_ADRCAP */ -#define MCF_XLB_XARB_ADRCAP_ADRCAP(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_SIGCAP */ -#define MCF_XLB_XARB_SIGCAP_TT(x) (((x)&0x1F)<<0) -#define MCF_XLB_XARB_SIGCAP_TBST (0x20) -#define MCF_XLB_XARB_SIGCAP_TSIZ(x) (((x)&0x7)<<0x7) - -/* Bit definitions and macros for MCF_XLB_XARB_ADRTO */ -#define MCF_XLB_XARB_ADRTO_ADRTO(x) (((x)&0xFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_DATTO */ -#define MCF_XLB_XARB_DATTO_DATTO(x) (((x)&0xFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_BUSTO */ -#define MCF_XLB_XARB_BUSTO_BUSTO(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_XLB_XARB_PRIEN */ -#define MCF_XLB_XARB_PRIEN_M0 (0x1) -#define MCF_XLB_XARB_PRIEN_M2 (0x4) -#define MCF_XLB_XARB_PRIEN_M3 (0x8) - -/* Bit definitions and macros for MCF_XLB_XARB_PRI */ -#define MCF_XLB_XARB_PRI_M0P(x) (((x)&0x7)<<0) -#define MCF_XLB_XARB_PRI_M2P(x) (((x)&0x7)<<0x8) -#define MCF_XLB_XARB_PRI_M3P(x) (((x)&0x7)<<0xC) - - -#endif /* __MCF5475_XLB_H__ */ diff --git a/tos/vmem_test/include/bas_printf.h b/tos/vmem_test/include/bas_printf.h deleted file mode 100644 index 5b42c28..0000000 --- a/tos/vmem_test/include/bas_printf.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - */ - -#ifndef _BAS_PRINTF_H_ -#define _BAS_PRINTF_H_ -#include -#include - -extern void xvsnprintf(char *str, size_t size, const char *fmt, va_list va); -extern void xvprintf(const char *fmt, va_list va); -extern void xprintf(const char *fmt, ...); -extern void xsnprintf(char *str, size_t size, const char *fmt, ...); -extern void xputchar(int c); -extern int sprintf(char *str, const char *format, ...); - - -extern void display_progress(void); -extern void hexdump(uint8_t buffer[], int size); -#endif /* _BAS_PRINTF_H_ */ diff --git a/tos/vmem_test/include/bas_string.h b/tos/vmem_test/include/bas_string.h deleted file mode 100644 index c743c95..0000000 --- a/tos/vmem_test/include/bas_string.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * bas_string.h - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#ifndef BAS_STRING_H_ -#define BAS_STRING_H_ - -#include - -extern int strncmp(const char *s1, const char *s2, size_t max); -extern char *strcpy(char *dst, const char *src); -char *strncpy(char *dst, const char *src, size_t max); -extern int strcmp(const char *s1, const char *s2); -extern size_t strlen(const char *str); -extern char *strcat(char *dst, const char *src); -extern char *strncat(char *dst, const char *src, size_t max); -extern int atoi(const char *c); -extern void *memcpy(void *dst, const void *src, size_t n); -extern void *memset(void *s, int c, size_t n); -extern int memcmp(const void *s1, const void *s2, size_t max); -extern void bzero(void *s, size_t n); - -#define isdigit(c) (((c) >= '0') && ((c) <= '9')) -#define isupper(c) ((c) >= 'A' && ((c) <= 'Z')) -#define islower(c) ((c) >= 'a' && ((c) <= 'z')) -#define isalpha(c) (isupper((c)) || islower(c)) -#define tolower(c) (isupper(c) ? ((c) + 'a' - 'A') : (c)) - -#endif /* BAS_STRING_H_ */ diff --git a/tos/vmem_test/include/driver_vec.h b/tos/vmem_test/include/driver_vec.h deleted file mode 100644 index 8b9352a..0000000 --- a/tos/vmem_test/include/driver_vec.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * driver_vec.h - * - * Interface for exposure of BaS drivers to the OS - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 24.10.2013 - * Author: Markus Fröschle - */ - -#ifndef _DRIVER_VEC_H_ -#define _DRIVER_VEC_H_ - - -enum driver_type -{ - END_OF_DRIVERS, /* marks end of driver list */ - BLOCKDEV_DRIVER, - CHARDEV_DRIVER, - VIDEO_DRIVER, - XHDI_DRIVER, - MCD_DRIVER, -}; - -struct generic_driver_interface -{ - uint32_t (*init)(void); - uint32_t (*read)(void *buf, size_t count); - uint32_t (*write)(const void *buf, size_t count); - uint32_t (*ioctl)(uint32_t request, ...); -}; - - -/* Chained buffer descriptor */ -typedef volatile struct MCD_bufDesc_struct MCD_bufDesc; -struct MCD_bufDesc_struct { - uint32_t flags; /* flags describing the DMA */ - uint32_t csumResult; /* checksum from checksumming performed since last checksum reset */ - int8_t *srcAddr; /* the address to move data from */ - int8_t *destAddr; /* the address to move data to */ - int8_t *lastDestAddr; /* the last address written to */ - uint32_t dmaSize; /* the number of bytes to transfer independent of the transfer size */ - MCD_bufDesc *next; /* next buffer descriptor in chain */ - uint32_t info; /* private information about this descriptor; DMA does not affect it */ -}; - -/* Progress Query struct */ -typedef volatile struct MCD_XferProg_struct { - int8_t *lastSrcAddr; /* the most-recent or last, post-increment source address */ - int8_t *lastDestAddr; /* the most-recent or last, post-increment destination address */ - uint32_t dmaSize; /* the amount of data transferred for the current buffer */ - MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */ -} MCD_XferProg; - -struct dma_driver_interface -{ - int32_t version; - int32_t magic; - int32_t (*dma_set_initiator)(int initiator); - uint32_t (*dma_get_initiator)(int requestor); - void (*dma_free_initiator)(int requestor); - int32_t (*dma_set_channel)(int requestor, void (*handler)(void)); - int (*dma_get_channel)(int requestor); - void (*dma_free_channel)(int requestor); - void (*dma_clear_channel)(int channel); - int (*MCD_startDma)(int channel, int8_t *srcAddr, int16_t srcIncr, int8_t *destAddr, int16_t destIncr, - uint32_t dmaSize, uint32_t xferSize, uint32_t initiator, int32_t priority, uint32_t flags, - uint32_t funcDesc); - int (*MCD_dmaStatus)(int channel); - int (*MCD_XferProgrQuery)(int channel, MCD_XferProg *progRep); - int (*MCD_killDma)(int channel); - int (*MCD_continDma)(int channel); - int (*MCD_pauseDma)(int channel); - int (*MCD_resumeDma)(int channel); - int (*MCD_csumQuery)(int channel, uint32_t *csum); - void *(*dma_malloc)(long amount); - int (*dma_free)(void *addr); -}; - -struct xhdi_driver_interface -{ - uint32_t (*xhdivec)(); -}; - -union interface -{ - struct generic_driver_interface *gdi; - struct xhdi_driver_interface *xhdi; - struct dma_driver_interface *dma; -}; - -struct generic_interface -{ - enum driver_type type; - char name[16]; - char description[64]; - int version; - int revision; - union interface interface; -}; - -struct driver_table -{ - uint32_t bas_version; - uint32_t bas_revision; - uint32_t (*remove_handler)(); /* calling this will disable the BaS' hook into trap #0 */ - struct generic_interface *interfaces; -}; - - -#endif /* _DRIVER_VEC_H_ */ diff --git a/tos/vmem_test/sources/bas_printf.c b/tos/vmem_test/sources/bas_printf.c deleted file mode 100644 index d0d2f30..0000000 --- a/tos/vmem_test/sources/bas_printf.c +++ /dev/null @@ -1,456 +0,0 @@ -/* - * tc.printf.c: A public-domain, minimal printf/sprintf routine that prints - * through the putchar() routine. Feel free to use for - * anything... -- 7/17/87 Paul Placeway - */ -/*- - * Copyright (c) 1980, 1991 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "MCF5475.h" -#include "bas_printf.h" -#include "bas_string.h" - -/* - * Lexical definitions. - * - * All lexical space is allocated dynamically. - * The eighth/sixteenth bit of characters is used to prevent recognition, - * and eventually stripped. - */ -#define META 0200 -#define ASCII 0177 -#define QUOTE ((char) 0200) /* Eighth char bit used for 'ing */ -#define TRIM 0177 /* Mask to strip quote bit */ -#define UNDER 0000000 /* No extra bits to do both */ -#define BOLD 0000000 /* Bold flag */ -#define STANDOUT META /* Standout flag */ -#define LITERAL 0000000 /* Literal character flag */ -#define ATTRIBUTES 0200 /* The bits used for attributes */ -#define CHAR 0000177 /* Mask to mask out the character */ - -#define INF 32766 /* should be bigger than any field to print */ - -static char snil[] = "(nil)"; - -void xputchar(int c) -{ - __asm__ __volatile__ - ( - ".extern printf_helper\n\t" - "move.b %0,d0\n\t" - "bsr printf_helper\n\t" - /* output */: - /* input */: "r" (c) - /* clobber */: "d0","d2","a0","memory" - ); -} - -static void doprnt(void (*addchar)(int), const char *sfmt, va_list ap) -{ - char buf[128]; - char *bp; - const char *f; - float flt; - long l; - unsigned long u; - int i; - int fmt; - unsigned char pad = ' '; - int flush_left = 0; - int f_width = 0; - int prec = INF; - int hash = 0; - int do_long = 0; - int sign = 0; - int attributes = 0; - - f = sfmt; - for (; *f; f++) - { - if (*f != '%') - { - /* then just out the char */ - (*addchar)((int) (((unsigned char) *f) | attributes)); - } - else - { - f++; /* skip the % */ - - if (*f == '-') - { /* minus: flush left */ - flush_left = 1; - f++; - } - - if (*f == '0' || *f == '.') - { - /* padding with 0 rather than blank */ - pad = '0'; - f++; - } - if (*f == '*') - { - /* field width */ - f_width = va_arg(ap, int); - f++; - } - else if (isdigit((unsigned char)*f)) - { - f_width = atoi(f); - while (isdigit((unsigned char)*f)) - f++; /* skip the digits */ - } - - if (*f == '.') - { /* precision */ - f++; - if (*f == '*') - { - prec = va_arg(ap, int); - f++; - } - else if (isdigit((unsigned char)*f)) - { - prec = atoi(f); - while (isdigit((unsigned char)*f)) - f++; /* skip the digits */ - } - } - - if (*f == '#') - { /* alternate form */ - hash = 1; - f++; - } - - if (*f == 'l') - { /* long format */ - do_long++; - f++; - if (*f == 'l') - { - do_long++; - f++; - } - } - - fmt = (unsigned char) *f; - if (fmt != 'S' && fmt != 'Q' && isupper(fmt)) - { - do_long = 1; - fmt = tolower(fmt); - } - bp = buf; - switch (fmt) - { /* do the format */ - case 'd': - switch (do_long) - { - case 0: - l = (long) (va_arg(ap, int)); - break; - case 1: - default: - l = va_arg(ap, long); - break; - } - - if (l < 0) - { - sign = 1; - l = -l; - } - do - { - *bp++ = (char) (l % 10) + '0'; - } while ((l /= 10) > 0); - if (sign) - *bp++ = '-'; - f_width = f_width - (int) (bp - buf); - if (!flush_left) - while (f_width-- > 0) - (*addchar)((int) (pad | attributes)); - for (bp--; bp >= buf; bp--) - (*addchar)((int) (((unsigned char) *bp) | attributes)); - if (flush_left) - while (f_width-- > 0) - (*addchar)((int) (' ' | attributes)); - break; - - case 'f': - /* this is actually more than stupid, but does work for now */ - flt = (float) (va_arg(ap, double)); /* beware: va_arg() extends float to double! */ - if (flt < 0) - { - sign = 1; - flt = -flt; - } - { - int quotient, remainder; - - quotient = (int) flt; - remainder = (flt - quotient) * 10E5; - - for (i = 0; i < 6; i++) - { - *bp++ = (char) (remainder % 10) + '0'; - remainder /= 10; - } - *bp++ = '.'; - do - { - *bp++ = (char) (quotient % 10) + '0'; - } while ((quotient /= 10) > 0); - if (sign) - *bp++ = '-'; - f_width = f_width - (int) (bp - buf); - if (!flush_left) - while (f_width-- > 0) - (*addchar)((int) (pad | attributes)); - for (bp--; bp >= buf; bp--) - (*addchar)((int) (((unsigned char) *bp) | attributes)); - if (flush_left) - while (f_width-- > 0) - (*addchar)((int) (' ' | attributes)); - } - break; - - case 'p': - do_long = 1; - hash = 1; - fmt = 'x'; - /* no break */ - case 'o': - case 'x': - case 'u': - switch (do_long) - { - case 0: - u = (unsigned long) (va_arg(ap, unsigned int)); - break; - case 1: - default: - u = va_arg(ap, unsigned long); - break; - } - if (fmt == 'u') - { /* unsigned decimal */ - do - { - *bp++ = (char) (u % 10) + '0'; - } while ((u /= 10) > 0); - } - else if (fmt == 'o') - { /* octal */ - do - { - *bp++ = (char) (u % 8) + '0'; - } while ((u /= 8) > 0); - if (hash) - *bp++ = '0'; - } - else if (fmt == 'x') - { /* hex */ - do - { - i = (int) (u % 16); - if (i < 10) - *bp++ = i + '0'; - else - *bp++ = i - 10 + 'a'; - } while ((u /= 16) > 0); - if (hash) - { - *bp++ = 'x'; - *bp++ = '0'; - } - } - i = f_width - (int) (bp - buf); - if (!flush_left) - while (i-- > 0) - (*addchar)((int) (pad | attributes)); - for (bp--; bp >= buf; bp--) - (*addchar)((int) (((unsigned char) *bp) | attributes)); - if (flush_left) - while (i-- > 0) - (*addchar)((int) (' ' | attributes)); - break; - - case 'c': - i = va_arg(ap, int); - (*addchar)((int) (i | attributes)); - break; - - case 'S': - case 'Q': - case 's': - case 'q': - bp = va_arg(ap, char *); - if (!bp) - bp = snil; - f_width = f_width - strlen((char *) bp); - if (!flush_left) - while (f_width-- > 0) - (*addchar)((int) (pad | attributes)); - for (i = 0; *bp && i < prec; i++) - { - if (fmt == 'q' && (*bp & QUOTE)) - (*addchar)((int) ('\\' | attributes)); - (*addchar)( - (int) (((unsigned char) *bp & TRIM) | attributes)); - bp++; - } - if (flush_left) - while (f_width-- > 0) - (*addchar)((int) (' ' | attributes)); - break; - - case 'a': - attributes = va_arg(ap, int); - break; - - case '%': - (*addchar)((int) ('%' | attributes)); - break; - - default: - break; - } - flush_left = 0, f_width = 0, prec = INF, hash = 0, do_long = 0; - sign = 0; - pad = ' '; - } - } -} - -static char *xstring, *xestring; - -void xaddchar(int c) -{ - if (xestring == xstring) - *xstring = '\0'; - else - *xstring++ = (char) c; -} - -int sprintf(char *str, const char *format, ...) -{ - va_list va; - va_start(va, format); - - xstring = str; - - doprnt(xaddchar, format, va); - va_end(va); - *xstring++ = '\0'; - - return 0; -} - -void xsnprintf(char *str, size_t size, const char *fmt, ...) -{ - va_list va; - va_start(va, fmt); - - xstring = str; - xestring = str + size - 1; - doprnt(xaddchar, fmt, va); - va_end(va); - *xstring++ = '\0'; -} - -void xprintf(const char *fmt, ...) -{ - va_list va; - va_start(va, fmt); - doprnt(xputchar, fmt, va); - va_end(va); -} - -void xvprintf(const char *fmt, va_list va) -{ - doprnt(xputchar, fmt, va); -} - -void xvsnprintf(char *str, size_t size, const char *fmt, va_list va) -{ - xstring = str; - xestring = str + size - 1; - doprnt(xaddchar, fmt, va); - *xstring++ = '\0'; -} - - -void display_progress() -{ - static int _progress_index; - char progress_char[] = "|/-\\"; - - xputchar(progress_char[_progress_index++ % strlen(progress_char)]); - xputchar('\r'); -} - -void hexdump(uint8_t buffer[], int size) -{ - int i; - int line = 0; - uint8_t *bp = buffer; - - while (bp < buffer + size) { - uint8_t *lbp = bp; - - xprintf("%08x ", line); - - for (i = 0; i < 16; i++) { - if (bp + i > buffer + size) { - break; - } - xprintf("%02x ", (uint8_t) *lbp++); - } - - lbp = bp; - for (i = 0; i < 16; i++) { - int8_t c = *lbp++; - - if (bp + i > buffer + size) { - break; - } - if (c > ' ' && c < '~') { - xprintf("%c", c); - } else { - xprintf("."); - } - } - xprintf("\r\n"); - - bp += 16; - line += 16; - } -} diff --git a/tos/vmem_test/sources/bas_string.c b/tos/vmem_test/sources/bas_string.c deleted file mode 100644 index b8d6a0f..0000000 --- a/tos/vmem_test/sources/bas_string.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * bas_string.c - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#include "bas_types.h" -#include -#include "bas_string.h" - -void *memcpy(void *dst, const void *src, size_t n) -{ - uint8_t *to = dst; - - while (to < (uint8_t *) dst + n) - *to++ = * (uint8_t *) src++; - - return dst; -} - -void bzero(void *s, size_t n) -{ - size_t i; - - for (i = 0; i < n; i++) - ((unsigned char *) s)[i] = '\0'; -} - -void *memset(void *s, int c, size_t n) -{ - uint8_t *dst = s; - - do - { - *dst++ = c; - } while ((dst - (uint8_t *) s) < n); - - return s; -} - - -int memcmp(const void *s1, const void *s2, size_t max) -{ - int i; - int cmp; - - for (i = 0; i < max; i++) - { - cmp = (* (const char *) s1 - * (const char *) s2); - if (cmp != 0) return cmp; - } - return cmp; -} - -int strcmp(const char *s1, const char *s2) -{ - int i; - int cmp; - - for (i = 0; *s1++ && *s2++; i++) - { - cmp = (*s1 - *s2); - if (cmp != 0) return cmp; - } - return cmp; -} - -int strncmp(const char *s1, const char *s2, size_t max) -{ - int i; - int cmp; - - for (i = 0; i < max && *s1++ && *s2++; i++); - { - cmp = (*s1 - *s2); - if (cmp != 0) return cmp; - } - return cmp; -} - -char *strcpy(char *dst, const char *src) -{ - char *ptr = dst; - - while ((*dst++ = *src++) != '\0'); - return ptr; -} - -char *strncpy(char *dst, const char *src, size_t max) -{ - char *ptr = dst; - - while ((*dst++ = *src++) != '\0' && max-- >= 0); - return ptr; -} - -int atoi(const char *c) -{ - int value = 0; - while (isdigit(*c)) - { - value *= 10; - value += (int) (*c - '0'); - c++; - } - return value; -} - -size_t strlen(const char *s) -{ - const char *start = s; - - while (*s++); - - return s - start - 1; -} - - -char *strcat(char *dst, const char *src) -{ - char *ret = dst; - dst = &dst[strlen(dst)]; - while ((*dst++ = *src++) != '\0'); - return ret; -} - -char *strncat(char *dst, const char *src, size_t max) -{ - size_t i; - char *ret = dst; - - dst = &dst[strlen(dst)]; - for (i = 0; i < max && *src; i++) - { - *dst++ = *src++; - } - *dst++ = '\0'; - - return ret; -} diff --git a/tos/vmem_test/sources/printf_helper.S b/tos/vmem_test/sources/printf_helper.S deleted file mode 100644 index 7d8eec1..0000000 --- a/tos/vmem_test/sources/printf_helper.S +++ /dev/null @@ -1,38 +0,0 @@ -/* - * printf_helper.S - * - * assembler trampoline to let printf (compiled -mpcrel) indirectly reference __MBAR - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - */ - - - .global printf_helper -printf_helper: - .extern __MBAR -.wait_txready: - move.w __MBAR+0x8604,d2 // PSCSCR0 status register - btst #10,d2 // space left in TX fifo? - beq.s .wait_txready // no, loop - lea __MBAR+0x860C,a0 // PSCSTB0 transmitter buffer register - move.b d0,(a0) // send byte - rts - -// vim: set syntax=asm68k : diff --git a/tos/vmem_test/sources/vmem_test.c b/tos/vmem_test/sources/vmem_test.c deleted file mode 100644 index 43e6b3d..0000000 --- a/tos/vmem_test/sources/vmem_test.c +++ /dev/null @@ -1,309 +0,0 @@ -#include -#include -#include -#include - -#include "bas_printf.h" -#include "MCF5475.h" -#include "driver_vec.h" - -#define FPGA_CONFIG (1 << 2) -#define FPGA_CONF_DONE (1 << 5) - -#define SRAM1_START 0xff101000 -#define SRAM1_END SRAM1_START + 0x1000 -#define SAFE_STACK SRAM1_END - 4 - -#define NOP() __asm__ __volatile__("nop\n\t" : : : "memory") - -#define SYSCLK 132000 - -long bas_start = 0xe0000000; -extern volatile uint32_t _VRAM[]; - -volatile int32_t time, start, end; -int i; - -void do_tests(void) -{ - /* read out shifter registers */ - uint8_t * _vmem_hi = (uint8_t *) 0xff8201; - uint8_t * _vmem_mid = (uint8_t *) 0xff8203; - uint8_t * _vmem_lo = (uint8_t *) 0xff820d; - - xprintf("vmem_hi = %x\r\n", *_vmem_hi); - xprintf("vmem_mid = %x\r\n", *_vmem_mid); - xprintf("vmem_lo = %x\r\n", *_vmem_lo); - - /* try to write to them */ - - xprintf("trying to write to _vbas_ad\r\n"); - - *_vmem_hi = 0xd0; - *_vmem_mid = 0x00; - *_vmem_lo = 0x00; - - xprintf("read back values\r\n"); - - xprintf("vmem_hi = %x\r\n", *_vmem_hi); - xprintf("vmem_mid = %x\r\n", *_vmem_mid); - xprintf("vmem_lo = %x\r\n", *_vmem_lo); - - xprintf("read Firebee clut\r\n"); - - hexdump((uint8_t *) 0xf0000000, 0x400); - - xprintf("set Firebee clut\r\n"); - - long i; - for (i = 0; i < 0x400; i++) - { - * (unsigned char *) (0xf0000000 + i) = (uint8_t) i; - } - - hexdump((uint8_t *) 0xf0000000, 0x400); - - xprintf("try to access Firebee FPGA memory\r\n"); - - xprintf("read\r\n"); - start = MCF_SLT0_SCNT; - hexdump((uint8_t *) _VRAM, 64); - end = MCF_SLT0_SCNT; - time = (start - end) / (SYSCLK / 1000) / 1000; - - xprintf("finished (took %f seconds).\r\n", time / 1000.0); - - xprintf("write\r\n"); - start = MCF_SLT0_SCNT; - for (i = 0; i < 64; i++) - { - ((uint8_t *) _VRAM)[i] = (uint32_t) i; - } - end = MCF_SLT0_SCNT; - time = (start - end) / (SYSCLK / 1000) / 1000; - - xprintf("finished (took %f seconds).\r\n", time / 1000.0); - - xprintf("read\r\n"); - start = MCF_SLT0_SCNT; - hexdump((uint8_t *) _VRAM, 64); - end = MCF_SLT0_SCNT; - time = (start - end) / (SYSCLK / 1000) / 1000; - - xprintf("finished (took %f seconds).\r\n", time / 1000.0); -} - -/* - * INIT VIDEO DDR RAM - */ - -void init_video_ddr(void) -{ - xprintf("init video RAM: "); - - * (volatile uint16_t *) 0xf0000400 = 0xb; /* set cke = 1, cs=1, config = 1 */ - NOP(); - - _VRAM[0] = 0x00050400; /* IPALL */ - NOP(); - - _VRAM[0] = 0x00072000; /* load EMR pll on */ - NOP(); - - _VRAM[0] = 0x00070122; /* load MR: reset pll, cl=2, burst=4lw */ - NOP(); - - _VRAM[0] = 0x00050400; /* IPALL */ - NOP(); - - _VRAM[0] = 0x00060000; /* auto refresh */ - NOP(); - - _VRAM[0] = 0x00060000; /* auto refresh */ - NOP(); - - _VRAM[0] = 0000070022; /* load MR dll on */ - NOP(); - - * (uint32_t *) 0xf0000400 = 0x01070002; /* fifo on, refresh on, ddrcs und cke on, video dac on */ - - // vram control register cannot be read -#ifdef _NOT_USED_ - xprintf("read out the Firebee vram control register to verify correct settings: %lx\r\n", * (uint32_t *) 0xf0000400); - if (* (uint32_t *) 0xf0000400 != 0x01070002) - { - xprintf("initializing firebee video RAM DDR controller failed.\r\nINFO: infinite loop. Press reset.\r\n"); - while (1); - } -#endif /* _NOT_USED_ */ - xprintf("finished\r\n"); -} - -void wait_pll(void) -{ - int32_t trgt = MCF_SLT0_SCNT - 100000; - do - { - ; - } while ((* (volatile int16_t *) 0xf0000800 < 0) && MCF_SLT0_SCNT > trgt); -} - -static volatile uint8_t *pll_base = (volatile uint8_t *) 0xf0000600; - -void init_pll(void) -{ - xprintf("FPGA PLL initialization: "); - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x48) = 27; /* loopfilter r */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x08) = 1; /* charge pump 1 */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x00) = 12; /* N counter high = 12 */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x40) = 12; /* N counter low = 12 */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x114) = 1; /* ck1 bypass */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x118) = 1; /* ck2 bypass */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x11c) = 1; /* ck3 bypass */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x10) = 1; /* ck0 high = 1 */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x50) = 1; /* ck0 low = 1 */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x144) = 1; /* M odd division */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x44) = 1; /* M low = 1 */ - - wait_pll(); - * (volatile uint16_t *) (pll_base + 0x04) = 145; /* M high = 145 = 146 MHz */ - - wait_pll(); - - * (volatile uint8_t *) 0xf0000800 = 0; /* set */ - - xprintf("finished\r\n"); -} - -void wait_for_jtag(void) -{ - long i; - - /* set supervisor stack to end of SRAM1 */ - __asm__ __volatile__ ( - " move #0x2700,sr\n\t" /* disable interrupts */ - " move.l %[stack],d0\n\t" /* 4KB on-chip core SRAM1 */ - " move.l d0,sp\n\t" /* set stack pointer */ - : - : [stack] "i" (SAFE_STACK) - : "d0", "cc" /* clobber */ - ); - - MCF_EPORT_EPIER = 0x0; /* disable EPORT interrupts */ - MCF_INTC_IMRL = 0xffffffff; - MCF_INTC_IMRH = 0xffffffff; /* disable interrupt controller */ - - MCF_MMU_MMUCR &= ~MCF_MMU_MMUCR_EN; /* disable MMU */ - - xprintf("relocated supervisor stack, disabled interrupts and disabled MMU\r\n"); - - /* - * configure FEC1L port directions to enable external JTAG configuration download to FPGA - */ - MCF_GPIO_PDDR_FEC1L = 0 | - MCF_GPIO_PDDR_FEC1L_PDDR_FEC1L4; /* bit 4 = LED => output */ - /* all other bits = input */ - - /* - * configure DSPI_CS3 as GPIO input to avoid the MCU driving against the FPGA blink - */ - MCF_PAD_PAR_DSPI &= ~MCF_PAD_PAR_DSPI_PAR_CS3(MCF_PAD_PAR_DSPI_PAR_CS3_DSPICS3); - /* - * now that GPIO ports have been switched to input, we can poll for FPGA config - * started from the JTAG interface (CONF_DONE goes low) and finish (CONF_DONE goes high) - */ - xprintf("waiting for JTAG configuration start\r\n"); - while ((MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)); /* wait for JTAG config load started */ - - xprintf("waiting for JTAG configuration to finish\r\n"); - while (!(MCF_GPIO_PPDSDR_FEC1L & FPGA_CONF_DONE)); /* wait for JTAG config load finished */ - - xprintf("JTAG configuration finished.\r\n"); - - /* wait */ - xprintf("wait a little to let things settle...\r\n"); - for (i = 0; i < 100000L; i++); - - /* initialize FPGA PLL's */ - init_pll(); - - /* initialize DDR RAM controller */ - init_video_ddr(); - - xprintf("disable caches\r\n"); - __asm__ __volatile( - "move.l #0x01000000,d0 \r\n" - "movec d0,CACR \r\n" - : /* no output */ - : /* no input */ - : "d0", "memory"); - /* begin of tests */ - do_tests(); - - xprintf("wait a little to let things settle...\r\n"); - for (i = 0; i < 100000L; i++); - - xprintf("INFO: endless loop now. Press reset to reboot\r\n"); - while (1) - ; -} - -int main(int argc, char *argv[]) -{ - printf("\033E\r\nFPGA JTAG configuration support\r\n"); - printf(" 2014 M. Froeschle\r\n"); - - printf("You may now savely load a new FPGA configuration through the JTAG interface\r\n" - "and your Firebee will reboot once finished using that new configuration.\r\n"); - if (argc == 2) - { - /* - * we got an argument. This is supposed to be the address that we need to jump to after JTAG - * configuration has been finished. Meant to support BaS in RAM testing - */ - char *addr_str = argv[1]; - char *addr = NULL; - char *end = NULL; - - addr = (char *) strtol(addr_str, &end, 16); - if (addr != NULL && addr <= (char *) 0xe0000000 && addr >= (char *) 0x10000000) - { - /* - * seems to be a valid address - */ - bas_start = (long) addr; - - printf("BaS start address set to %p\r\n", (void *) bas_start); - } - else - { - printf("\r\nNote: BaS start address %p not valid. Stick to %p.\r\n", addr, (void *) bas_start); - } - } - Supexec(wait_for_jtag); - - return 0; /* just to make the compiler happy, we will never return */ -} - diff --git a/tos/vmem_test/vmem_test.config b/tos/vmem_test/vmem_test.config deleted file mode 100644 index 8cec188..0000000 --- a/tos/vmem_test/vmem_test.config +++ /dev/null @@ -1 +0,0 @@ -// ADD PREDEFINED MACROS HERE! diff --git a/tos/vmem_test/vmem_test.creator b/tos/vmem_test/vmem_test.creator deleted file mode 100644 index e94cbbd..0000000 --- a/tos/vmem_test/vmem_test.creator +++ /dev/null @@ -1 +0,0 @@ -[General] diff --git a/tos/vmem_test/vmem_test.files b/tos/vmem_test/vmem_test.files deleted file mode 100644 index 198470f..0000000 --- a/tos/vmem_test/vmem_test.files +++ /dev/null @@ -1,3 +0,0 @@ -include/driver_vec.h -sources/jtagwait.c -Makefile diff --git a/tos/vmem_test/vmem_test.includes b/tos/vmem_test/vmem_test.includes deleted file mode 100644 index 2996fba..0000000 --- a/tos/vmem_test/vmem_test.includes +++ /dev/null @@ -1 +0,0 @@ -include \ No newline at end of file diff --git a/usb/usb.c b/usb/usb.c deleted file mode 100644 index a35ac75..0000000 --- a/usb/usb.c +++ /dev/null @@ -1,1348 +0,0 @@ -/* - * - * Most of this source has been derived from the Linux USB - * project: - * (C) Copyright Linus Torvalds 1999 - * (C) Copyright Johannes Erdfelt 1999-2001 - * (C) Copyright Andreas Gal 1999 - * (C) Copyright Gregory P. Smith 1999 - * (C) Copyright Deti Fliegl 1999 (new USB architecture) - * (C) Copyright Randy Dunlap 2000 - * (C) Copyright David Brownell 2000 (kernel hotplug, usb_device_id) - * (C) Copyright Yggdrasil Computing, Inc. 2000 - * (usb_device_id matching changes by Adam J. Richter) - * - * Adapted for U-Boot: - * (C) Copyright 2001 Denis Peter, MPL AG Switzerland - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -/* - * How it works: - * - * Since this is a bootloader, the devices will not be automatic - * (re)configured on hotplug, but after a restart of the USB the - * device should work. - * - * For each transfer (except "Interrupt") we wait for completion. - */ - -#include -#include "bas_string.h" -#include "bas_printf.h" -#include "util.h" /* for byte swap funcs */ -#include "wait.h" -#include -#include "usb.h" -#include "usb_hub.h" - -#define DEBUG_USB -#ifdef DEBUG_USB -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DEBUG_USB */ -#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0) -#define info(format, arg...) do { xprintf("INFO: %s(): " format, __FUNCTION__, ##arg); } while (0) - -struct hci -{ - /* ------- common part -------- */ - long handle; /* PCI BIOS */ - const struct pci_device_id *ent; - int usbnum; - /* ---- end of common part ---- */ -}; - -static struct usb_device *usb_dev; -int bus_index; -static int dev_index[USB_MAX_BUS]; -static struct hci *controller_priv[USB_MAX_BUS]; -static int asynch_allowed; -static struct devrequest *setup_packet; - -char usb_started; /* flag for the started/stopped USB status */ - - -/* - * some forward declarations... - */ -void usb_scan_devices(void *priv); - -/* - * Init USB device controller - */ -int usb_init(int32_t handle, const struct pci_device_id *ent) -{ - struct hci *priv; - int res = 0; - - bus_index = 0; - if (bus_index >= USB_MAX_BUS) - { - dbg("bus_index >= USB_MAX_BUS"); - return -1; - } - - dev_index[bus_index] = 0; - asynch_allowed = 1; - - if (handle && (ent != NULL)) - { - if (driver_mem_init()) - { - usb_started = 0; - dbg("driver_mem_init failed\r\n"); - - return -1; /* out of memory */ - } - - if (usb_dev == NULL) - { - usb_dev = (struct usb_device *) driver_mem_alloc(sizeof(struct usb_device) * USB_MAX_BUS * USB_MAX_DEVICE); - } - - if (usb_dev == NULL) - { - usb_started = 0; - - dbg("could not allocate memory\r\n"); - - return -1; /* out of memory */ - } - } - else /* restart */ - { - int i; - - res = 0; - for (i = 0; i < USB_MAX_BUS; i++) - { - if (controller_priv[i] != NULL) - { - long handle = controller_priv[i]->handle; - - if (handle) - { - res |= usb_init(handle, NULL); /* FIXME: recursive call!? */ - } - } - } - return res; - } - - usb_hub_reset(bus_index); - - /* init low_level USB */ - - switch(ent->class) - { - case PCI_CLASS_SERIAL_USB_UHCI: - //res = uhci_usb_lowlevel_init(handle, ent, &priv); - dbg("sorry, no uhci driver available\r\n"); - break; - - case PCI_CLASS_SERIAL_USB_OHCI: - dbg("initialize ohci host controller interface\r\n"); - //res = ohci_usb_lowlevel_init(handle, ent, (void *) &priv); - break; - - case PCI_CLASS_SERIAL_USB_EHCI: - dbg("initialize ehci host controller interface\r\n"); - res = ehci_usb_lowlevel_init(handle, ent, (void *) &priv); - break; - - default: - res = -1; - break; - } - - if (!res) - { - /* - * if lowlevel init is OK, scan the bus for devices - * i.e. search HUBs and configure them - */ - if (setup_packet == NULL) - { - setup_packet = driver_mem_alloc(sizeof(struct devrequest)); - if (setup_packet == NULL) - { - usb_started = 0; - - dbg("could not allocate memory\r\n"); - - return -1; /* no memory, no USB */ - } - } - - xprintf("Scanning bus for devices... "); - - controller_priv[bus_index] = priv; - controller_priv[bus_index]->usbnum = bus_index; - - usb_scan_devices(priv); - bus_index++; - usb_started = 1; - - xprintf("done.\r\n"); - - return 0; - } - else - { - xprintf("\r\nError, couldn't init Lowlevel part\r\n"); - usb_started = 0; - - return -1; - } -} - -/* - * Stop USB. This stops the LowLevel Part and deregisters USB devices. - */ -int usb_stop(void) -{ - int i; - int res = 0; - - if (usb_started) - { - asynch_allowed = 1; - usb_started = 0; - usb_hub_reset(bus_index); - driver_mem_free(setup_packet); - for (i = 0; i < USB_MAX_BUS; i++) - { - struct hci *priv = controller_priv[i]; - if (priv != NULL) - { - switch(priv->ent->class) - { -#ifdef CONFIG_USB_UHCI - case PCI_CLASS_SERIAL_USB_UHCI: - res |= uhci_usb_lowlevel_stop(priv); - break; -#endif -#ifdef CONFIG_USB_OHCI - case PCI_CLASS_SERIAL_USB_OHCI: - res |= ohci_usb_lowlevel_stop(priv); - break; -#endif -#ifdef CONFIG_USB_EHCI - case PCI_CLASS_SERIAL_USB_EHCI: - res |= ehci_usb_lowlevel_stop(priv); - break; -#endif - } - } - } - bus_index = 0; - driver_mem_release(); /* release all driver mem */ - } - return res; -} - - -void usb_enable_interrupt(int enable) -{ - ohci_usb_enable_interrupt(enable); - ehci_usb_enable_interrupt(enable); -} - - -/* - * disables the asynch behaviour of the control message. This is used for data - * transfers that uses the exclusiv access to the control and bulk messages. - */ -void usb_disable_asynch(int disable) -{ - asynch_allowed = !disable; -} - -/* - * Message wrappers. - * - */ - -/* - * submits an Interrupt Message - */ -int usb_submit_int_msg(struct usb_device *dev, uint32_t pipe, void *buffer, int transfer_len, int interval) -{ - struct hci *priv = (struct hci *) dev->priv_hcd; - int ret = 0; - - switch(priv->ent->class) - { - case PCI_CLASS_SERIAL_USB_OHCI: - ret = ohci_submit_int_msg(dev, pipe, buffer, transfer_len, interval); - break; - - case PCI_CLASS_SERIAL_USB_EHCI: - ret = ehci_submit_int_msg(dev, pipe, buffer, transfer_len, interval); - break; - - default: - ret = -1; - break; - } - return ret; -} - -/* - * submits a control message and waits for completion (at least timeout * 1ms) - * If timeout is 0, we don't wait for completion (used for example to set and - * clear keyboards LEDs). For data transfers, (storage transfers) we don't - * allow control messages with 0 timeout, by previousely resetting the flag - * asynch_allowed (usb_disable_asynch(1)). - * returns the transfered length if OK or -1 if error. The transfered length - * and the current status are stored in the dev->act_len and dev->status. - */ -int usb_control_msg(struct usb_device *dev, unsigned int pipe, - unsigned char request, unsigned char requesttype, - unsigned short value, unsigned short index, - void *data, unsigned short size, int timeout) -{ - struct hci *priv = (struct hci *) dev->priv_hcd; - - if ((timeout == 0) && (!asynch_allowed)) - { - /* request for a asynch control pipe is not allowed */ - - dbg("request for an async control pipe is not allowed\r\n"); - return -1; - } - - /* set setup command */ - setup_packet->requesttype = requesttype; - setup_packet->request = request; - setup_packet->value = swpw(value); - setup_packet->index = swpw(index); - setup_packet->length = swpw(size); - - dbg("usb_control_msg: request: 0x%X, requesttype: 0x%X, value 0x%X index 0x%X length 0x%X\r\n", request, requesttype, value, index, size); - - switch(priv->ent->class) - { - case PCI_CLASS_SERIAL_USB_OHCI: - dev->status = USB_ST_NOT_PROC; /* not yet processed */ - ohci_submit_control_msg(dev, pipe, data, size, setup_packet); - break; - - case PCI_CLASS_SERIAL_USB_EHCI: - dev->status = USB_ST_NOT_PROC; /* not yet processed */ - ehci_submit_control_msg(dev, pipe, data, size, setup_packet); - break; - - default: - return -1; - } - - if (timeout == 0) - { - return (int) size; - } - - if (dev->status != 0) - { - /* - * Let's wait a while for the timeout to elapse. - * It has no real use, but it keeps the interface happy. - */ - return -1; - } - return dev->act_len; -} - -/* - * submits bulk message, and waits for completion. returns 0 if Ok or - * -1 if Error. - * synchronous behavior - */ -int usb_bulk_msg(struct usb_device *dev, unsigned int pipe, void *data, int len, int *actual_length, int timeout) -{ - struct hci *priv = (struct hci *) dev->priv_hcd; - - if (len < 0) - { - return -1; - } - - switch(priv->ent->class) - { - case PCI_CLASS_SERIAL_USB_OHCI: - dev->status = USB_ST_NOT_PROC; /* not yet processed */ - ohci_submit_bulk_msg(dev, pipe, data, len); - break; - - case PCI_CLASS_SERIAL_USB_EHCI: - dev->status = USB_ST_NOT_PROC; /* not yet processed */ - ehci_submit_bulk_msg(dev, pipe, data, len); - break; - - default: - return -1; - } - - while (timeout--) - { - if (!((volatile uint32_t) dev->status & USB_ST_NOT_PROC)) /* FIXME: this volatile does nothing! */ - break; - wait(1); - } - - *actual_length = dev->act_len; - - if (dev->status == 0) - { - return 0; - } - else - { - return -1; - } -} - - -/* - * Max Packet stuff - */ - -/* - * returns the max packet size, depending on the pipe direction and - * the configurations values - */ -int usb_maxpacket(struct usb_device *dev, uint32_t pipe) -{ - /* direction is out -> use emaxpacket out */ - if ((pipe & USB_DIR_IN) == 0) - { - return dev->epmaxpacketout[((pipe >> 15) & 0xf)]; - } - else - { - return dev->epmaxpacketin[((pipe >> 15) & 0xf)]; - } -} - -/* - * The routine usb_set_maxpacket_ep() is extracted from the loop of routine - * usb_set_maxpacket(), because the optimizer of GCC 4.x chokes on this routine - * when it is inlined in 1 single routine. What happens is that the register r3 - * is used as loop-count 'i', but gets overwritten later on. - * This is clearly a compiler bug, but it is easier to workaround it here than - * to update the compiler (Occurs with at least several GCC 4.{1,2},x - * CodeSourcery compilers like e.g. 2007q3, 2008q1, 2008q3 lite editions on ARM) - * - * We probably do not need that for Coldfire - at least I hope so. - */ -static void usb_set_maxpacket_ep(struct usb_device *dev, struct usb_endpoint_descriptor *ep) -{ - int b; - - b = ep->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; - - if ((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_CONTROL) - { - /* Control => bidirectional */ - dev->epmaxpacketout[b] = ep->wMaxPacketSize; - dev->epmaxpacketin[b] = ep->wMaxPacketSize; - dbg("##Control EP epmaxpacketout/in[%d] = %d\r\n", b, dev->epmaxpacketin[b]); - } - else - { - if ((ep->bEndpointAddress & 0x80) == 0) - { - /* OUT Endpoint */ - if (ep->wMaxPacketSize > dev->epmaxpacketout[b]) - { - dev->epmaxpacketout[b] = ep->wMaxPacketSize; - dbg("##EP epmaxpacketout[%d] = %d\r\n", b, dev->epmaxpacketout[b]); - } - } - else - { - /* IN Endpoint */ - if (ep->wMaxPacketSize > dev->epmaxpacketin[b]) - { - dev->epmaxpacketin[b] = ep->wMaxPacketSize; - dbg("##EP epmaxpacketin[%d] = %d\r\n", b, dev->epmaxpacketin[b]); - } - } /* if out */ - } /* if control */ -} - -/* - * set the max packed value of all endpoints in the given configuration - */ -int usb_set_maxpacket(struct usb_device *dev) -{ - int i; - int ii; - - for (i = 0; i < dev->config.bNumInterfaces; i++) - { - for (ii = 0; ii < dev->config.if_desc[i].bNumEndpoints; ii++) - { - usb_set_maxpacket_ep(dev,&dev->config.if_desc[i].ep_desc[ii]); - } - } - return 0; -} - -/* - * Parse the config, located in buffer, and fills the dev->config structure. - * Note that all little/big endian swapping are done automatically. - */ -int usb_parse_config(struct usb_device *dev, unsigned char *buffer, int cfgno) -{ - struct usb_descriptor_header *head; - int index; - int ifno; - int epno; - int curr_if_num; - - ifno = -1; - epno = -1; - curr_if_num = -1; - dev->configno = cfgno; - head = (struct usb_descriptor_header *) &buffer[0]; - - if (head->bDescriptorType != USB_DT_CONFIG) - { - dbg(" ERROR: NOT USB_CONFIG_DESC (0x%x instead of 0x%x)\r\n", head->bDescriptorType, USB_DT_CONFIG); - return -1; - } - memcpy(&dev->config, buffer, buffer[0]); - dev->config.wTotalLength = swpw(dev->config.wTotalLength); - dev->config.no_of_if = 0; - index = dev->config.bLength; - - /* - * Ok the first entry must be a configuration entry, - * now process the others - */ - head = (struct usb_descriptor_header *) &buffer[index]; - - while (index + 1 < dev->config.wTotalLength) - { - switch (head->bDescriptorType) - { - case USB_DT_INTERFACE: - if (((struct usb_interface_descriptor *) &buffer[index])->bInterfaceNumber != curr_if_num) - { - /* this is a new interface, copy new desc */ - ifno = dev->config.no_of_if; - dev->config.no_of_if++; - memcpy(&dev->config.if_desc[ifno], &buffer[index], buffer[index]); - dev->config.if_desc[ifno].no_of_ep = 0; - dev->config.if_desc[ifno].num_altsetting = 1; - curr_if_num = dev->config.if_desc[ifno].bInterfaceNumber; - } - else - { - /* found alternate setting for the interface */ - dev->config.if_desc[ifno].num_altsetting++; - } - break; - - case USB_DT_ENDPOINT: - epno = dev->config.if_desc[ifno].no_of_ep; - /* found an endpoint */ - dev->config.if_desc[ifno].no_of_ep++; - memcpy(&dev->config.if_desc[ifno].ep_desc[epno], &buffer[index], buffer[index]); - dev->config.if_desc[ifno].ep_desc[epno].wMaxPacketSize = swpw(dev->config.if_desc[ifno].ep_desc[epno].wMaxPacketSize); - dbg("if %d, ep %d\r\n", ifno, epno); - break; - - default: - if (head->bLength == 0) - return 1; - dbg("unknown Descriptor Type : %x\r\n", head->bDescriptorType); -#ifdef USB_DEBUG - { - unsigned char *ch; - int i; - - ch = (unsigned char *) head; - for (i = 0; i < head->bLength; i++) - { - dbg(" %02X", *ch++); - } - dbg("\r\n"); - } -#endif /* USB_DEBUG */ - break; - } - index += head->bLength; - head = (struct usb_descriptor_header *) &buffer[index]; - } - return 1; -} - -/* - * Clears an endpoint - * endp: endpoint number in bits 0-3; - * direction flag in bit 7 (1 = IN, 0 = OUT) - */ -int usb_clear_halt(struct usb_device *dev, int pipe) -{ - int result; - int endp = usb_pipeendpoint(pipe) | (usb_pipein(pipe) << 7); - - result = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), - USB_REQ_CLEAR_FEATURE, USB_RECIP_ENDPOINT, 0, endp, NULL, 0, USB_CNTL_TIMEOUT * 3); - - /* don't clear if failed */ - if (result < 0) - { - return result; - } - - /* - * NOTE: we do not get status and verify reset was successful - * as some devices are reported to lock up upon this check.. - */ - usb_endpoint_running(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)); - - /* toggle is reset on clear */ - usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 0); - - return 0; -} - -/* - * get_descriptor type - */ -int usb_get_descriptor(struct usb_device *dev, unsigned char type, unsigned char index, void *buf, int size) -{ - int res; - - res = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), - USB_REQ_GET_DESCRIPTOR, USB_DIR_IN, (type << 8) + index, 0, buf, size, USB_CNTL_TIMEOUT); - return res; -} - -/* - * gets configuration cfgno and store it in the buffer - */ -int usb_get_configuration_no(struct usb_device *dev, unsigned char *buffer, int cfgno) -{ - int result; - unsigned int tmp; - struct usb_config_descriptor *config; - - config = (struct usb_config_descriptor *) &buffer[0]; - result = usb_get_descriptor(dev, USB_DT_CONFIG, cfgno, buffer, 9); - - if (result < 9) - { - if (result < 0) - { - dbg("unable to get descriptor, error %lX\r\n", dev->status); - } - else - { - dbg("config descriptor too short (expected %i, got %i)\n", 9, result); - } - return -1; - } - - tmp = swpw(config->wTotalLength); - - if (tmp > USB_BUFSIZ) - { - dbg("usb_get_configuration_no: failed to get descriptor - too long: %d\r\n", tmp); - return -1; - } - result = usb_get_descriptor(dev, USB_DT_CONFIG, cfgno, buffer, tmp); - dbg("get_conf_no %d Result %d, wLength %d\r\n", cfgno, result, tmp); - - return result; -} - -/* - * set address of a device to the value in dev->devnum. - * This can only be done by addressing the device via the default address (0) - */ -int usb_set_address(struct usb_device *dev) -{ - int res; - - dbg("set address %d\r\n", dev->devnum); - res = usb_control_msg(dev, usb_snddefctrl(dev), USB_REQ_SET_ADDRESS, 0, (dev->devnum), 0, NULL, 0, USB_CNTL_TIMEOUT); - return res; -} - -/* - * set interface number to interface - */ -int usb_set_interface(struct usb_device *dev, int interface, int alternate) -{ - struct usb_interface_descriptor *if_face = NULL; - int ret, i; - - for (i = 0; i < dev->config.bNumInterfaces; i++) - { - if (dev->config.if_desc[i].bInterfaceNumber == interface) - { - if_face = &dev->config.if_desc[i]; - - break; - } - } - - if (!if_face) - { - dbg("selecting invalid interface %d", interface); - - return -1; - } - - /* - * We should return now for devices with only one alternate setting. - * According to 9.4.10 of the Universal Serial Bus Specification - * Revision 2.0 such devices can return with a STALL. This results in - * some USB sticks timeouting during initialization and then being - * unusable in U-Boot. - */ - if (if_face->num_altsetting == 1) - { - return 0; - } - - ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), - USB_REQ_SET_INTERFACE, USB_RECIP_INTERFACE, alternate, interface, NULL, 0, USB_CNTL_TIMEOUT * 5); - if (ret < 0) - { - return ret; - } - - return 0; -} - -/* - * set configuration number to configuration - */ -int usb_set_configuration(struct usb_device *dev, int configuration) -{ - int res; - - dbg("set configuration %d\r\n", configuration); - /* set setup command */ - res = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), - USB_REQ_SET_CONFIGURATION, 0, configuration, 0, NULL, 0, USB_CNTL_TIMEOUT); - if (res == 0) - { - dev->toggle[0] = 0; - dev->toggle[1] = 0; - - return 0; - } - else - { - return -1; - } -} - -/* - * set protocol to protocol - */ -int usb_set_protocol(struct usb_device *dev, int ifnum, int protocol) -{ - return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), - USB_REQ_SET_PROTOCOL, USB_TYPE_CLASS | USB_RECIP_INTERFACE, - protocol, ifnum, NULL, 0, USB_CNTL_TIMEOUT); -} - -/* - * set idle - */ -int usb_set_idle(struct usb_device *dev, int ifnum, int duration, int report_id) -{ - return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), - USB_REQ_SET_IDLE, USB_TYPE_CLASS | USB_RECIP_INTERFACE, - (duration << 8) | report_id, ifnum, NULL, 0, USB_CNTL_TIMEOUT); -} - -/* - * get report - */ -int usb_get_report(struct usb_device *dev, int ifnum, unsigned char type, - unsigned char id, void *buf, int size) -{ - return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), - USB_REQ_GET_REPORT, USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_INTERFACE, - (type << 8) + id, ifnum, buf, size, USB_CNTL_TIMEOUT); -} - -/* - * get class descriptor - */ -int usb_get_class_descriptor(struct usb_device *dev, int ifnum, - unsigned char type, unsigned char id, void *buf, int size) -{ - return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), - USB_REQ_GET_DESCRIPTOR, USB_RECIP_INTERFACE | USB_DIR_IN, - (type << 8) + id, ifnum, buf, size, USB_CNTL_TIMEOUT); -} - -/* - * get string index in buffer - */ -int usb_get_string(struct usb_device *dev, unsigned short langid, unsigned char index, void *buf, int size) -{ - int i; - int result; - - for (i = 0; i < 3; ++i) - { - /* some devices are flaky */ - result = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), USB_REQ_GET_DESCRIPTOR, USB_DIR_IN, - (USB_DT_STRING << 8) + index, langid, buf, size, USB_CNTL_TIMEOUT); - if (result > 0) - { - break; - } - } - return result; -} - -static void usb_try_string_workarounds(unsigned char *buf, int *length) -{ - int newlength; - int oldlength = *length; - - for (newlength = 2; newlength + 1 < oldlength; newlength += 2) - { - char c = buf[newlength]; - - if ((c < ' ') || (c >= 127) || buf[newlength + 1]) - break; - } - - if (newlength > 2) - { - buf[0] = newlength; - *length = newlength; - } -} - -static int usb_string_sub(struct usb_device *dev, unsigned int langid, unsigned int index, unsigned char *buf) -{ - int rc; - - /* - * Try to read the string descriptor by asking for the maximum - * possible number of bytes - */ - rc = usb_get_string(dev, langid, index, buf, 255); - - /* - * If that failed try to read the descriptor length, then - * ask for just that many bytes - */ - if (rc < 2) - { - rc = usb_get_string(dev, langid, index, buf, 2); - if (rc == 2) - { - rc = usb_get_string(dev, langid, index, buf, buf[0]); - } - } - - if (rc >= 2) - { - if (!buf[0] && !buf[1]) - { - usb_try_string_workarounds(buf, &rc); - } - - /* There might be extra junk at the end of the descriptor */ - if (buf[0] < rc) - { - rc = buf[0]; - } - rc = rc - (rc & 1); /* force a multiple of two */ - } - - if (rc < 2) - { - rc = -1; - } - - return rc; -} - -/* - * usb_string: - * Get string index and translate it to ascii. - * returns string length (> 0) or error (< 0) - */ -int usb_string(struct usb_device *dev, int index, char *buf, size_t size) -{ - unsigned char *tbuf; - int err; - unsigned int u, idx; - - if (size <= 0 || !buf || !index) - { - return -1; - } - - buf[0] = 0; - tbuf = (unsigned char *) driver_mem_alloc(USB_BUFSIZ); - - if (tbuf == NULL) - { - dbg("usb_string: malloc failure\r\n"); - return -1; - } - - /* get langid for strings if it's not yet known */ - if (!dev->have_langid) - { - err = usb_string_sub(dev, 0, 0, tbuf); - if (err < 0) - { - dbg("error getting string descriptor 0 (error=%lx)\r\n", dev->status); - driver_mem_free(tbuf); - return -1; - } - else if (tbuf[0] < 4) - { - dbg("string descriptor 0 too short\r\n"); - driver_mem_free(tbuf); - return -1; - } - else - { - dev->have_langid = -1; - dev->string_langid = tbuf[2] | (tbuf[3] << 8); - /* always use the first langid listed */ - dbg("USB device number %d default language ID 0x%x\r\n", dev->devnum, dev->string_langid); - } - } - err = usb_string_sub(dev, dev->string_langid, index, tbuf); - if (err < 0) - { - driver_mem_free(tbuf); - return err; - } - - size--; /* leave room for trailing NULL char in output buffer */ - for (idx = 0, u = 2; u < err; u += 2) - { - if (idx >= size) - { - break; - } - if (tbuf[u + 1]) /* high byte */ - { - buf[idx++] = '?'; /* non-ASCII character */ - } - else - { - buf[idx++] = tbuf[u]; - } - } - buf[idx] = 0; - err = idx; - driver_mem_free(tbuf); - return err; -} - -/* - * USB device handling: - * the USB device are static allocated [USB_MAX_DEVICE]. - */ - -/* - * Something got disconnected. Get rid of it, and all of its children. - */ -void usb_disconnect(struct usb_device **pdev) -{ - struct usb_device *dev = *pdev; - if (dev != NULL) - { - int i; - - dbg("USB %d disconnect on device %d\r\n", dev->parent->usbnum, dev->parent->devnum); - dbg("USB %d disconnected, device number %d\r\n", dev->usbnum, dev->devnum); - - if (dev->deregister != NULL) - { - dev->deregister(dev); - } - - /* Free up all the children.. */ - for (i = 0; i < USB_MAXCHILDREN; i++) - { - if (dev->children[i] != NULL) - { - dbg("USB %d, disconnect children %d\r\n", dev->usbnum, dev->children[i]->devnum); - usb_disconnect(&dev->children[i]); - dev->children[i] = NULL; - } - } - - /* Free up the device itself, including its device number */ - if (dev->devnum > 0) - { - dev_index[dev->usbnum]--; - memset(dev, 0, sizeof(struct usb_device)); - dev->devnum = -1; - } - *pdev = NULL; - } -} - -/* - * returns a pointer to the device with the index [index]. - * if the device is not assigned (dev->devnum==-1) returns NULL - */ -struct usb_device *usb_get_dev_index(int index, int index_bus) -{ - struct usb_device *dev; - - if ((index_bus >= USB_MAX_BUS) || (index_bus < 0) - || (index >= USB_MAX_DEVICE) || (index < 0)) - { - return NULL; - } - - dev = &usb_dev[(index_bus * USB_MAX_DEVICE) + index]; - - if ((controller_priv[index_bus] == NULL) || (dev->devnum == -1)) - { - return NULL; - } - - return dev; -} - -/* - * returns a pointer of a new device structure or NULL, if - * no device struct is available - */ -struct usb_device *usb_alloc_new_device(int bus_index, void *priv) -{ - int i; - int index = dev_index[bus_index]; - struct usb_device *dev; - - dbg("USB %d new device %d\r\n", bus_index, index); - if (index >= USB_MAX_DEVICE) - { - dbg("ERROR, too many USB Devices, max=%d\r\n", USB_MAX_DEVICE); - return NULL; - } - - /* default Address is 0, real addresses start with 1 */ - dev = &usb_dev[(bus_index * USB_MAX_DEVICE) + index]; - dev->devnum = index + 1; - dev->maxchild = 0; - - for (i = 0; i < USB_MAXCHILDREN; dev->children[i++] = NULL) - ; - - dev->parent = NULL; - dev->priv_hcd = priv; - dev->usbnum = bus_index; - dev_index[bus_index]++; - - return dev; -} - -// #define CONFIG_LEGACY_USB_INIT_SEQ -/* - * By the time we get here, the device has gotten a new device ID - * and is in the default state. We need to identify the thing and - * get the ball rolling.. - * - * Returns 0 for success, != 0 for error. - */ -int usb_new_device(struct usb_device *dev) -{ - int addr; - int err; - int tmp; - unsigned char *tmpbuf; - - dbg("\r\n"); - -#ifndef CONFIG_LEGACY_USB_INIT_SEQ - struct usb_device_descriptor *desc; - int port = -1; - struct usb_device *parent = dev->parent; - unsigned short portstatus; -#endif - - if (dev == NULL) - { - dbg("called with NULL device\r\n"); - return 1; - } - - /* We still haven't set the Address yet */ - addr = dev->devnum; - dev->devnum = 0; - - tmpbuf = (unsigned char *) driver_mem_alloc(USB_BUFSIZ); - if (tmpbuf == NULL) - { - dbg("malloc failure\r\n"); - return 1; - } - -//#define CONFIG_LEGACY_USB_INIT_SEQ -#ifdef CONFIG_LEGACY_USB_INIT_SEQ - /* - * this is the old and known way of initializing devices, it is - * different than what Windows and Linux are doing. Windows and Linux - * both retrieve 64 bytes while reading the device descriptor - * Several USB stick devices report ERR: CTL_TIMEOUT, caused by an - * invalid header while reading 8 bytes as device descriptor. - */ - dev->descriptor.bMaxPacketSize0 = 8; /* Start off at 8 bytes */ - dev->maxpacketsize = PACKET_SIZE_8; - dev->epmaxpacketin[0] = 8; - dev->epmaxpacketout[0] = 8; - err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, &dev->descriptor, 8); - if (err < 8) - { - dbg("\r\nUSB device not responding, giving up (status=%lX)\r\n", dev->status); - driver_mem_free(tmpbuf); - return 1; - } -#else - /* - * This is a Windows scheme of initialization sequence, with double - * reset of the device (Linux uses the same sequence) - * Some equipment is said to work only with such init sequence; this - * patch is based on the work by Alan Stern: - * http://sourceforge.net/mailarchive/forum.php? - * thread_id=5729457&forum_id=5398 - */ - - /* - * send 64-byte GET-DEVICE-DESCRIPTOR request. Since the descriptor is - * only 18 bytes long, this will terminate with a short packet. But if - * the maxpacket size is 8 or 16 the device may be waiting to transmit - * some more, or keeps on retransmitting the 8 byte header. - */ - desc = (struct usb_device_descriptor *) tmpbuf; - dev->descriptor.bMaxPacketSize0 = 64; /* Start off at 64 bytes */ - - /* Default to 64 byte max packet size */ - dev->maxpacketsize = PACKET_SIZE_64; - dev->epmaxpacketin[0] = 64; - dev->epmaxpacketout[0] = 64; - err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, desc, 64); - - if (err < 0) - { - dbg("usb_new_device: usb_get_descriptor() failed\r\n"); - driver_mem_free(tmpbuf); - return 1; - } - dev->descriptor.bMaxPacketSize0 = desc->bMaxPacketSize0; - - /* find the port number we're at */ - if (parent) - { - int j; - for (j = 0; j < parent->maxchild; j++) - { - if (parent->children[j] == dev) - { - port = j; - break; - } - } - dbg("port = %d\r\n", port); - - if (port < 0) - { - dbg("usb_new_device: cannot locate device's port.\r\n"); - driver_mem_free(tmpbuf); - - return 1; - } - - /* reset the port for the second time */ - err = hub_port_reset(dev->parent, port, &portstatus); - if (err < 0) - { - dbg("\r\nCouldn't reset port %d\r\n", port); - driver_mem_free(tmpbuf); - - return 1; - } - } -#endif - dev->epmaxpacketin[0] = dev->descriptor.bMaxPacketSize0; - dev->epmaxpacketout[0] = dev->descriptor.bMaxPacketSize0; - - switch (dev->descriptor.bMaxPacketSize0) - { - case 8: dev->maxpacketsize = PACKET_SIZE_8; break; - case 16: dev->maxpacketsize = PACKET_SIZE_16; break; - case 32: dev->maxpacketsize = PACKET_SIZE_32; break; - case 64: dev->maxpacketsize = PACKET_SIZE_64; break; - } - - dev->devnum = addr; - err = usb_set_address(dev); /* set address */ - - if (err < 0) - { - dbg("\r\nUSB device not accepting new address (error=%lX)\r\n", dev->status); - driver_mem_free(tmpbuf); - - return 1; - } - - wait(10); /* Let the SET_ADDRESS settle */ - tmp = sizeof(dev->descriptor); - err = usb_get_descriptor(dev, USB_DT_DEVICE, 0, &dev->descriptor, sizeof(dev->descriptor)); - if (err < tmp) - { - if (err < 0) - { - dbg("unable to get device descriptor (error=%d)\r\n", err); - } - else - { - dbg("USB device descriptor short read (expected %i, got %i)\r\n", tmp, err); - } - driver_mem_free(tmpbuf); - - return 1; - } - - /* correct values */ - dev->descriptor.bcdUSB = swpw(dev->descriptor.bcdUSB); - dev->descriptor.idVendor = swpw(dev->descriptor.idVendor); - dev->descriptor.idProduct = swpw(dev->descriptor.idProduct); - dev->descriptor.bcdDevice = swpw(dev->descriptor.bcdDevice); - - dbg("vendor: 0x%x, prod: 0x%x, dev: 0x%x\r\n", - dev->descriptor.idVendor, dev->descriptor.idProduct, dev->descriptor.bcdDevice); - - /* only support for one config for now */ - usb_get_configuration_no(dev, &tmpbuf[0], 0); - usb_parse_config(dev, &tmpbuf[0], 0); - usb_set_maxpacket(dev); - - /* we set the default configuration here */ - if (usb_set_configuration(dev, dev->config.bConfigurationValue)) - { - dbg("failed to set default configuration len %d, status %lX\r\n", dev->act_len, dev->status); - driver_mem_free(tmpbuf); - return -1; - } - dbg("new device strings: Mfr=%d, Product=%d, SerialNumber=%d\r\n", - dev->descriptor.iManufacturer, dev->descriptor.iProduct, - dev->descriptor.iSerialNumber); - - memset(dev->mf, 0, sizeof(dev->mf)); - memset(dev->prod, 0, sizeof(dev->prod)); - memset(dev->serial, 0, sizeof(dev->serial)); - - if (dev->descriptor.iManufacturer) - { - usb_string(dev, dev->descriptor.iManufacturer, dev->mf, sizeof(dev->mf)); - } - if (dev->descriptor.iProduct) - { - usb_string(dev, dev->descriptor.iProduct, dev->prod, sizeof(dev->prod)); - } - if (dev->descriptor.iSerialNumber) - { - usb_string(dev, dev->descriptor.iSerialNumber, dev->serial, sizeof(dev->serial)); - } - dbg("Manufacturer %s\r\n", dev->mf); - dbg("Product %s\r\n", dev->prod); - dbg("SerialNumber %s\r\n", dev->serial); - - /* now probe if the device is a hub */ - usb_hub_probe(dev, 0); - driver_mem_free(tmpbuf); - - return 0; -} - -/* - * build device Tree - */ -void usb_scan_devices(void *priv) -{ - int i; - struct usb_device *dev; - - /* first make all devices unknown */ - for (i = 0; i < USB_MAX_DEVICE; i++) - { - memset(&usb_dev[(bus_index * USB_MAX_DEVICE) + i], 0, sizeof(struct usb_device)); - usb_dev[(bus_index * USB_MAX_DEVICE) + i].devnum = -1; - } - dev_index[bus_index] = 0; - - /* - * device 0 is always present (root hub, so let it analyze) - */ - dev = usb_alloc_new_device(bus_index, priv); - if (usb_new_device(dev)) - { - xprintf("No USB Device found\r\n"); - if (dev != NULL) - { - dev_index[bus_index]--; - } - } - else - { - xprintf("%d USB Device(s) found\r\n", dev_index[bus_index]); - } - - /* insert "driver" if possible */ - if (drv_usb_kbd_init() < 0) - { - xprintf("No USB keyboard found\r\n"); - } - else - { - xprintf("USB HID keyboard driver installed\r\n"); - } - - if (drv_usb_mouse_init() < 0) - { - xprintf("No USB mouse found\r\n"); - } - else - { - xprintf("USB HID mouse driver installed\r\n"); - } - xprintf("Scan end\r\n"); -} - diff --git a/usb/usb_hub.c b/usb/usb_hub.c deleted file mode 100644 index 03b774f..0000000 --- a/usb/usb_hub.c +++ /dev/null @@ -1,630 +0,0 @@ -/* - * HUB "Driver" - * Probes device for being a hub and configure it - */ - -#include -#include "bas_string.h" -#include "bas_printf.h" -#include "util.h" /* for byte swap funcs */ -#include "wait.h" -#include -#include "usb.h" -#include "usb_hub.h" - -#define DEBUG_HUB -#ifdef DEBUG_HUB -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DEBUG_HUB */ -#define err(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#define info(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) - -static struct usb_hub_device hub_dev[USB_MAX_BUS][USB_MAX_HUB]; -static int usb_hub_index[USB_MAX_BUS]; - -int usb_get_hub_descriptor(struct usb_device *dev, void *data, int size) -{ - return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), - USB_REQ_GET_DESCRIPTOR, USB_DIR_IN | USB_RT_HUB, USB_DT_HUB << 8, 0, data, size, USB_CNTL_TIMEOUT); -} - -int usb_clear_hub_feature(struct usb_device *dev, int feature) -{ - return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), - USB_REQ_CLEAR_FEATURE, USB_RT_HUB, feature, 0, NULL, 0, USB_CNTL_TIMEOUT); -} - -int usb_clear_port_feature(struct usb_device *dev, int port, int feature) -{ - return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), - USB_REQ_CLEAR_FEATURE, USB_RT_PORT, feature, port, NULL, 0, USB_CNTL_TIMEOUT); -} - -int usb_set_port_feature(struct usb_device *dev, int port, int feature) -{ - return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), - USB_REQ_SET_FEATURE, USB_RT_PORT, feature, port, NULL, 0, USB_CNTL_TIMEOUT); -} - -int usb_get_hub_status(struct usb_device *dev, void *data) -{ - return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), - USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_HUB, 0, 0, data, sizeof(struct usb_hub_status), USB_CNTL_TIMEOUT); -} - -int usb_get_port_status(struct usb_device *dev, int port, void *data) -{ - return usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), - USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_PORT, 0, port, data, sizeof(struct usb_hub_status), USB_CNTL_TIMEOUT); -} - -static void usb_hub_power_on(struct usb_hub_device *hub) -{ - int i; - struct usb_device *dev; - - dev = hub->pusb_dev; - /* Enable power to the ports */ - dbg("enabling power on all ports\r\n"); - for (i = 0; i < dev->maxchild; i++) - { - usb_set_port_feature(dev, i + 1, USB_PORT_FEAT_POWER); - dbg("port %d returns %lx\r\n", i + 1, dev->status); - wait(hub->desc.bPwrOn2PwrGood * 2 * 1000); - } -} - -void usb_hub_reset(int bus_index) -{ - usb_hub_index[bus_index] = 0; -} - -struct usb_hub_device *usb_hub_allocate(void) -{ - if (usb_hub_index[bus_index] < USB_MAX_HUB) - { - return &hub_dev[bus_index][usb_hub_index[bus_index]++]; - } - - dbg("ERROR: USB_MAX_HUB (%d) reached\r\n", USB_MAX_HUB); - - return NULL; -} - -#define MAX_TRIES 5 - -static inline char *portspeed(int portstatus) -{ - if (portstatus & (1 << USB_PORT_FEAT_HIGHSPEED)) - { - return "480 Mb/s"; - } - else if (portstatus & (1 << USB_PORT_FEAT_LOWSPEED)) - { - return "1.5 Mb/s"; - } - else - { - return "12 Mb/s"; - } -} - -int hub_port_reset(struct usb_device *dev, int port, unsigned short *portstat) -{ - int tries; - struct usb_port_status portsts; - unsigned short portstatus, portchange; - - dbg(""); - dbg("hub_port_reset: resetting port %d...\r\n", port + 1); - - for (tries = 0; tries < MAX_TRIES; tries++) - { - usb_set_port_feature(dev, port + 1, USB_PORT_FEAT_RESET); - -#ifdef USB_POLL_HUB - if (pxCurrentTCB != NULL) - vTaskDelay((200 * configTICK_RATE_HZ) / 1000); - else -#endif - wait(10 * 1000); - if (usb_get_port_status(dev, port + 1, &portsts) < 0) - { - dbg("get_port_status failed status %lX\r\n", dev->status); - return -1; - } - - portstatus = swpw(portsts.wPortStatus); - portchange = swpw(portsts.wPortChange); - - dbg("USB %d portstatus 0x%x, change 0x%x, %s\r\n", dev->usbnum, portstatus, portchange, portspeed(portstatus)); - dbg("STAT_C_CONNECTION = %d STAT_CONNECTION = %d USB_PORT_STAT_ENABLE = %d\r\n", - (portchange & USB_PORT_STAT_C_CONNECTION) ? 1 : 0, - (portstatus & USB_PORT_STAT_CONNECTION) ? 1 : 0, - (portstatus & USB_PORT_STAT_ENABLE) ? 1 : 0); - - if ((portchange & USB_PORT_STAT_C_CONNECTION) || !(portstatus & USB_PORT_STAT_CONNECTION)) - { - return -1; - } - - if (portstatus & USB_PORT_STAT_ENABLE) - { - break; - } - -#ifdef USB_POLL_HUB - if (pxCurrentTCB != NULL) - vTaskDelay((200*configTICK_RATE_HZ)/1000); - else -#endif - wait(20 * 1000); - } - - if (tries == MAX_TRIES) - { - dbg("USB %d, cannot enable port %d after %d retries, disabling port.\r\n", dev->usbnum, port + 1, MAX_TRIES); - dbg("Maybe the USB cable is bad?\r\n"); - - return -1; - } - usb_clear_port_feature(dev, port + 1, USB_PORT_FEAT_C_RESET); - - *portstat = portstatus; - - return 0; -} - -void usb_hub_port_connect_change(struct usb_device *dev, int port) -{ - struct usb_device *usb; - struct usb_port_status portsts; - unsigned short portstatus; - - /* Check status */ - if (usb_get_port_status(dev, port + 1, &portsts) < 0) - { - dbg("USB %d get_port_status failed\r\n", dev->usbnum); - - return; - } - - portstatus = swpw(portsts.wPortStatus); -#ifdef USB_DEBUG - { - unsigned short portchange; - - portchange = swpw(portsts.wPortChange); - dbg("USB %d, portstatus %x, change %x, %s\r\n", dev->usbnum, portstatus, portchange, portspeed(portstatus)); - } -#endif /* USB_DEBUG */ - - /* Clear the connection change status */ - usb_clear_port_feature(dev, port + 1, USB_PORT_FEAT_C_CONNECTION); - - /* Disconnect any existing devices under this port */ - - if (((!(portstatus & USB_PORT_STAT_CONNECTION)) - && (!(portstatus & USB_PORT_STAT_ENABLE))) || (dev->children[port])) - { - dbg("USB %d port %i disconnected\r\n", dev->usbnum, port + 1); - usb_disconnect(&dev->children[port]); - - /* Return now if nothing is connected */ - if (!(portstatus & USB_PORT_STAT_CONNECTION)) - { - return; - } - } -#ifdef USB_POLL_HUB - if (pxCurrentTCB != NULL) - vTaskDelay((200*configTICK_RATE_HZ)/1000); - else -#endif - wait(2000); - /* Reset the port */ - if (hub_port_reset(dev, port, &portstatus) < 0) - { - dbg("USB %d cannot reset port %i!?\r\n", dev->usbnum, port + 1); - - return; - } -#ifdef USB_POLL_HUB - if (pxCurrentTCB != NULL) - vTaskDelay((200*configTICK_RATE_HZ)/1000); - else -#endif - wait(2000); - - /* Allocate a new device struct for it */ - usb = usb_alloc_new_device(dev->usbnum, dev->priv_hcd); - - if (portstatus & USB_PORT_STAT_HIGH_SPEED) - { - usb->speed = USB_SPEED_HIGH; - } - else if (portstatus & USB_PORT_STAT_LOW_SPEED) - { - usb->speed = USB_SPEED_LOW; - } - else - { - usb->speed = USB_SPEED_FULL; - } - - dbg("usb device = %p\r\n", usb); - dev->children[port] = usb; - usb->parent = dev; - - /* Run it through the hoops (find a driver, etc) */ - if (usb_new_device(usb)) - { - /* Woops, disable the port */ - dbg("USB %d hub: disabling port %d\r\n", dev->usbnum, port + 1); - usb_clear_port_feature(dev, port + 1, USB_PORT_FEAT_ENABLE); - } - -#ifdef USB_POLL_HUB - else if (pxCurrentTCB != NULL) - { - usb_kbd_register(usb); - usb_mouse_register(usb); -#ifdef CONFIG_USB_STORAGE - usb_stor_register(usb); -#endif /* CONFIG_USB_STORAGE */ - } -#endif -} - -static void usb_hub_events(struct usb_device *dev) -{ - int i; - struct usb_hub_device *hub = dev->hub; - - if (hub == NULL) - { - return; - } - - for (i = 0; i < dev->maxchild; i++) - { - struct usb_port_status portsts; - unsigned short portstatus, portchange; - - if (usb_get_port_status(dev, i + 1, &portsts) < 0) - { - dbg("get_port_status failed\r\n"); - - continue; - } - portstatus = swpw(portsts.wPortStatus); - portchange = swpw(portsts.wPortChange); - - dbg("USB %d Port %d Status %X Change %X\r\n", dev->usbnum, i + 1, portstatus, portchange); - - if (portchange & USB_PORT_STAT_C_CONNECTION) - { - dbg("USB %d port %d connection change\r\n", dev->usbnum, i + 1); - usb_hub_port_connect_change(dev, i); - } - - if (portchange & USB_PORT_STAT_C_ENABLE) - { - dbg("USB %d port %d enable change, status %x\r\n", dev->usbnum, i + 1, portstatus); - usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_ENABLE); - - /* - * EM interference sometimes causes bad shielded USB - * devices to be shutdown by the hub, this hack enables - * them again. Works at least with mouse driver - */ - if (!(portstatus & USB_PORT_STAT_ENABLE) && (portstatus & USB_PORT_STAT_CONNECTION) && ((dev->children[i]))) - { - dbg("USB %d already running port %i disabled by hub (EMI?), re-enabling...\r\n", dev->usbnum, i + 1); - usb_hub_port_connect_change(dev, i); - } - } - - if (portstatus & USB_PORT_STAT_SUSPEND) - { - dbg("USB %d port %d suspend change\r\n", dev->usbnum, i + 1); - usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_SUSPEND); - } - - if (portchange & USB_PORT_STAT_C_OVERCURRENT) - { - dbg("USB %d port %d over-current change\r\n", dev->usbnum, i + 1); - usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_OVER_CURRENT); - usb_hub_power_on(hub); - } - - if (portchange & USB_PORT_STAT_C_RESET) - { - dbg("USB %d port %d reset change\r\n", dev->usbnum, i + 1); - usb_clear_port_feature(dev, i + 1, USB_PORT_FEAT_C_RESET); - } - } /* end for i all ports */ -} - -#ifdef USB_POLL_HUB -void usb_poll_hub_task(void *pvParameters) -{ - int index_bus = 0; - portTickType timeout = configTICK_RATE_HZ/10; - if (pvParameters); - while(1) - { - if (xQueueAltReceive(queue_poll_hub, &index_bus, timeout) == pdPASS) - { - if ((index_bus >= 0) && (index_bus < USB_MAX_BUS) && (controller_priv[index_bus] != NULL)) - { - dbg("USB %d event change\r\n", index_bus); -#ifdef CONFIG_USB_INTERRUPT_POLLING - *vblsem = 0; -#endif - usb_hub_events(&usb_dev[index_bus * USB_MAX_DEVICE]); -#ifdef CONFIG_USB_INTERRUPT_POLLING - *vblsem = 1; -#endif - } - } - else /* timeout */ - { - int i; -#ifdef CONFIG_USB_INTERRUPT_POLLING - *vblsem = 0; -#endif - for (i = 0; i < USB_MAX_BUS ; i++) - { - if (controller_priv[i] != NULL) - usb_hub_events(&usb_dev[i * USB_MAX_DEVICE]); - } -#ifdef CONFIG_USB_INTERRUPT_POLLING - *vblsem = 1; -#endif - } - timeout = portMAX_DELAY; - } -} -#endif /* USB_POLL_HUB */ - -int usb_hub_configure(struct usb_device *dev) -{ - unsigned char *buffer; - unsigned char *bitmap; - struct usb_hub_descriptor *descriptor; - int i; - struct usb_hub_device *hub; - - /* "allocate" Hub device */ - hub = usb_hub_allocate(); - dev->hub = hub; - - if (hub == NULL) - { - dbg("could not allocate hub\r\n"); - - return -1; - } - - hub->pusb_dev = dev; - buffer = (unsigned char *) driver_mem_alloc(USB_BUFSIZ); - - if (buffer == NULL) - { - dbg("driver_mem_alloc() failure\r\n"); - return -1; - } - - /* Get the the hub descriptor */ - if (usb_get_hub_descriptor(dev, buffer, 4) < 0) - { - dbg("failed to get hub descriptor, giving up %lX\r\n", dev->status); - driver_mem_free(buffer); - return -1; - } - - dbg("bLength:0x%02X bDescriptorType:0x%02X bNbrPorts:0x%02X\r\n", buffer[0], buffer[1], buffer[2]); - descriptor = (struct usb_hub_descriptor *)buffer; - - /* silence compiler warning if USB_BUFSIZ is > 256 [= sizeof(char)] */ - i = descriptor->bLength; - - if (i > USB_BUFSIZ) - { - dbg("failed to get hub descriptor - too long: %d\r\n", descriptor->bLength); - driver_mem_free(buffer); - - return -1; - } - - if (usb_get_hub_descriptor(dev, buffer, descriptor->bLength) < 0) - { - dbg("failed to get hub descriptor 2nd giving up %lX\r\n", dev->status); - driver_mem_free(buffer); - - return -1; - } - - memcpy((unsigned char *) &hub->desc, buffer, descriptor->bLength); - - /* adjust 16bit values */ - hub->desc.wHubCharacteristics = swpw(descriptor->wHubCharacteristics); - - /* set the bitmap */ - bitmap = (unsigned char *) &hub->desc.DeviceRemovable[0]; - - /* devices not removable by default */ - - memset(bitmap, 0xff, (USB_MAXCHILDREN + 1 + 7) / 8); - bitmap = (unsigned char *) &hub->desc.PortPowerCtrlMask[0]; - memset(bitmap, 0xff, (USB_MAXCHILDREN + 1 + 7) / 8); /* PowerMask = 1B */ - - for (i = 0; i < ((hub->desc.bNbrPorts + 1 + 7) / 8); i++) - { - hub->desc.DeviceRemovable[i] = descriptor->DeviceRemovable[i]; - } - - for (i = 0; i < ((hub->desc.bNbrPorts + 1 + 7) / 8); i++) - { - hub->desc.DeviceRemovable[i] = descriptor->PortPowerCtrlMask[i]; - } - - dev->maxchild = descriptor->bNbrPorts; - dbg("USB %d, %d ports detected\r\n", dev->usbnum, dev->maxchild); - if (dev->maxchild >= 10) - { - dev->maxchild = 10; - } - - switch(hub->desc.wHubCharacteristics & HUB_CHAR_LPSM) - { - case 0x00: dbg("ganged power switching\r\n"); break; - case 0x01: dbg("individual port power switching\r\n"); break; - case 0x02: - case 0x03: dbg("unknown reserved power switching mode\r\n"); break; - } - - if (hub->desc.wHubCharacteristics & HUB_CHAR_COMPOUND) - { - dbg("part of a compound device\r\n"); - } - else - { - dbg("standalone hub\r\n"); - } - - switch(hub->desc.wHubCharacteristics & HUB_CHAR_OCPM) - { - case 0x00: dbg("global over-current protection\r\n"); break; - case 0x08: dbg("individual port over-current protection\r\n"); break; - case 0x10: - case 0x18: dbg("no over-current protection\r\n"); break; - } - - dbg("power on to power good time: %dms\r\n", descriptor->bPwrOn2PwrGood * 2); - dbg("hub controller current requirement: %dmA\r\n", descriptor->bHubContrCurrent); - - for (i = 0; i < dev->maxchild; i++) - { - dbg("USB %d port %d is%s removable\r\n", - dev->usbnum, i + 1, - hub->desc.DeviceRemovable[(i + 1) / 8] & (1 << ((i + 1) % 8)) ? " not" : ""); - } - - if (sizeof(struct usb_hub_status) > USB_BUFSIZ) - { - dbg("usb_hub_configure: failed to get Status - too long: %d\r\n", descriptor->bLength); - driver_mem_free(buffer); - - return -1; - } - - if (usb_get_hub_status(dev, buffer) < 0) - { - dbg("usb_hub_configure: failed to get Status %lX\r\n", dev->status); - driver_mem_free(buffer); - - return -1; - } - -#ifdef DEBUG_HUB - { - struct usb_hub_status *hubsts; - - hubsts = (struct usb_hub_status *) buffer; - dbg("get_hub_status returned status %X, change %X\r\n", - swpw(hubsts->wHubStatus), swpw(hubsts->wHubChange)); - dbg("local power source is %s\r\n", - (swpw(hubsts->wHubStatus) & HUB_STATUS_LOCAL_POWER) ? "lost (inactive)" : "good"); - dbg("%sover-current condition exists\r\n", - (swpw(hubsts->wHubStatus) & HUB_STATUS_OVERCURRENT) ? "" : "no "); - } -#endif /* USB_DEBUG */ - - usb_hub_power_on(hub); - -#ifdef USB_POLL_HUB - if ((queue_poll_hub == NULL) && (pxCurrentTCB != NULL)) - { - queue_poll_hub = xQueueCreate(64, sizeof(int)); - if (queue_poll_hub != NULL) - { - /* Create poll/event task */ - if (xTaskCreate(usb_poll_hub_task, (void *)"USBHub", configMINIMAL_STACK_SIZE, NULL, 16, NULL) != pdPASS) - { - vQueueDelete(queue_poll_hub); - queue_poll_hub = NULL; - } - } - vTaskDelay(configTICK_RATE_HZ); - } - if (queue_poll_hub == NULL) -#endif - - usb_hub_events(dev); - driver_mem_free(buffer); - - return 0; -} - -int usb_hub_probe(struct usb_device *dev, int ifnum) -{ - struct usb_interface_descriptor *iface; - struct usb_endpoint_descriptor *ep; - int ret; - - iface = &dev->config.if_desc[ifnum]; - - /* Is it a hub? */ - if (iface->bInterfaceClass != USB_CLASS_HUB) - { - dbg("iface->bInterfaceClass != USB_CLASS_HUB (%d), %d instead\r\n", USB_CLASS_HUB, iface->bInterfaceClass); - return 0; - } - - /* - * Some hubs have a subclass of 1, which AFAICT according to the - * specs is not defined, but it works - */ - if ((iface->bInterfaceSubClass != 0) && (iface->bInterfaceSubClass != 1)) - { - dbg("iface->bInterfaceSubClass != {0, 1} (%d instead)\r\n", iface->bInterfaceSubClass); - - return 0; - } - - /* Multiple endpoints? What kind of mutant ninja-hub is this? */ - if (iface->bNumEndpoints != 1) - { - dbg("iface->bNumEndpoints != 1 (%d instead)\r\n", iface->bNumEndpoints); - return 0; - } - - ep = &iface->ep_desc[0]; - - /* Output endpoint? Curiousier and curiousier.. */ - if (!(ep->bEndpointAddress & USB_DIR_IN)) - { - dbg("!(ep->bEndpointAddress != USB_DIR_IN (0x%x instead)\r\n", ep->bEndpointAddress); - - return 0; - } - - /* If it's not an interrupt endpoint, we'd better punt! */ - if ((ep->bmAttributes & 3) != 3) - { - return 0; - } - - /* We found a hub */ - dbg("USB %d hub found\r\n", dev->usbnum); - - ret = usb_hub_configure(dev); - - return ret; -} - - diff --git a/usb/usb_kbd.c b/usb/usb_kbd.c deleted file mode 100644 index 8a36a09..0000000 --- a/usb/usb_kbd.c +++ /dev/null @@ -1,1389 +0,0 @@ -/* - * (C) Copyright 2001 - * Denis Peter, MPL AG Switzerland - * - * Part of this source has been derived from the Linux USB - * project. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#include "usb.h" - -//#define DEBUG_USBKBD -#ifdef DEBUG_USBKBD -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DEBUG_USBKBD */ -#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0) - -#ifdef USE_COUNTRYCODE -static int usb_kbd_get_hid_desc(struct usb_device *dev); -#endif - -/* under TOS Repeat keys are build by timer C so infinite (0) or 1000 is a good value */ -#define REPEAT_RATE 0 // 40 /* 40msec -> 25cps */ - -#define MAX_VALUE_LOOKUP 0x90 -#define MAX_VALUE_ATARI 0x75 - -#define NUM_LOCK 0x53 -#define CAPS_LOCK 0x39 -#define SCROLL_LOCK 0x47 - -/* Modifier bits */ -#define LEFT_CNTR 0 -#define LEFT_SHIFT 1 -#define LEFT_ALT 2 -#define LEFT_GUI 3 -#define RIGHT_CNTR 4 -#define RIGHT_SHIFT 5 -#define RIGHT_ALT 6 -#define RIGHT_GUI 7 - -/* HID bCountryCode */ -#define CC_NOT 0 -#define CC_ISO 13 -#define CC_USA 33 -#define CC_FRG 9 -#define CC_FRA 8 -#define CC_UK 32 -#define CC_SPA 25 -#define CC_ITA 14 -#define CC_SWE 29 -#define CC_SWF 27 -#define CC_SWG 28 - -/* Language cookie */ -#define USA 0 /* English */ -#define FRG 1 /* German */ -#define FRA 2 /* French */ -#define UK 3 /* English */ -#define SPA 4 /* Spanish */ -#define ITA 5 /* Italian */ -#define SWE 6 /* Swiss */ -#define SWF 7 /* Swiss French */ -#define SWG 8 /* Swiss German */ - -//extern _IOREC *iorec; -//extern void (**ikbdvec)(); - -static unsigned char *new_packet; -static unsigned char old_packet[8]; -static unsigned char num_lock; -static unsigned char caps_lock; -static unsigned char scroll_lock; -static unsigned char old_modifier; -static union -{ - struct - { - unsigned reserved1:3; - unsigned force_alt_shift:1; - unsigned right_shift_host:1; - unsigned left_shift_host:1; - unsigned alt_host:1; - unsigned ctrl_host:1; - unsigned key_forced:1; - unsigned reserved2:3; - unsigned altgr_usb:1; - unsigned shift_usb:1; - unsigned altgr_usb_break:1; - unsigned shift_usb_break:1; - } b; - unsigned short s; -} flags; - -static unsigned char *leds; -static int kbd_installed; - -static unsigned char usb_kbd_to_atari_scancode[] = -{ - // A(Q) B C D - 0x00, 0x00, 0x00, 0x00, 0x1E, 0x30, 0x2E, 0x20, - // E F G H I J K L - 0x12, 0x21, 0x22, 0x23, 0x17, 0x24, 0x25, 0x26, - // M(,) N O P Q(A) R S T - 0x32, 0x31, 0x18, 0x19, 0x10, 0x13, 0x1F, 0x14, - // U V W(Z) X Y Z(W) 1 2 - 0x16, 0x2F, 0x11, 0x2D, 0x15, 0x2C, 0x02, 0x03, - // 3 4 5 6 7 8 9 0 - 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, - // RET ESC BACK TAB SPACE -()) = [(^) - 0x1C, 0x01, 0x0E, 0x0F, 0x39, 0x0C, 0x0D, 0x1A, - // ]($) \(*) EUR1 ;(M) ' ` ,(;) .(:) - 0x1B, 0x2B, 0x2B, 0x27, 0x28, 0x5B, 0x33, 0x34, - // /(!) CAPS F1 F2 F3 F4 F5 F6 - 0x35, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F, 0x40, - // F7 F8 F9 F10 F11 F12 PrtSc ScLoc - 0x41, 0x42, 0x43, 0x44, 0x62, 0x61, 0x49, 0x4C, - //PAUSE INS HOME PgUp DEL END PgDn -> - 0x4F, 0x52, 0x47, 0x45, 0x53, 0x55, 0x46, 0x4D, - // <- DOWN UP NuLoc KP/ KP* KP- KP+ - 0x4B, 0x50, 0x48, 0x54, 0x65, 0x66, 0x4A, 0x4E, - // ENT KP1 KP2 KP3 KP4 KP5 KP6 KP7 - 0x72, 0x6D, 0x6E, 0x6F, 0x6A, 0x6B, 0x6C, 0x67, - // KP8 KP9 KP0 KP. >< APP POWER KP= - 0x68, 0x69, 0x70, 0x71, 0x60, 0x00, 0x00, 0x00, - // F13, F14, F15 F16 F17 F18 F19 F20 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // F21 F22 F23 F24 EXEC HELP MENU SEL - 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x60, 0x00, - // STOP AGAIN UNDO CUT COPY PASTE FIND MUTE - 0x00, 0x00, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, - //VolUp Vold_packetn - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - //LCTRL LSHFT LALT LGUI RCTRL RSHFT RALT RGUI - 0x1D, 0x2A, 0x38, 0x56, 0x1D, 0x36, 0x38, 0x57 // virtual codes -}; - -static unsigned char usb_kbd_to_atari_fr_modifier[] = -{ - /* This table can change host SHIFT & ALT states for each scancode, values */ - /* are in hexa : bit 7: 1 for a valid entry */ - /* bit 6: 1 for force CTRL */ - /* bit 5: ALT, bit 4: SHIFT states for the AltGR table */ - /* bit 3: ALT, bit 2: SHIFT states for the Shift table */ - /* bit 1: ALT, bit 0: SHIFT states for the Unshift table */ - // A(Q) B C D - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // E F G H I J K L - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // M(,) N O P Q(A) R S T - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // U V W(Z) X Y Z(W) 1 2 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB4, - // 3 4 5 6 7 8 9 0 - 0x00, 0xB4, 0xA4, 0x94, 0x00, 0xA5, 0x84, 0xA4, - // RET ESC BACK TAB SPACE -()) = [(^) - 0x00, 0x00, 0x00, 0x00, 0x00, 0xA4, 0xB4, 0x00, - // ]($) \(*) ;(M) ' ` ,(;) .(:) - 0x00, 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // /(!) CAPS F1 F2 F3 F4 F5 F6 - 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // F7 F8 F9 F10 F11 F12 PrtSc ScLoc - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xAA, 0x00, - //PAUSE INS HOME PgUp DEL END PgDn -> - 0x00, 0x00, 0x00, 0x95, 0x00, 0x95, 0x95, 0x00, - // <- DOWN UP NuLoc KP/ KP* KP- KP+ - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // ENT KP1 KP2 KP3 KP4 KP5 KP6 KP7 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // KP8 KP9 KP0 KP. >< APP POWER KP= - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // F13, F14, F15 F16 F17 F18 F19 F20 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // F21 F22 F23 F24 EXEC HELP MENU SEL - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xBF, 0x00, - // STOP AGAIN UNDO CUT COPY PASTE FIND MUTE - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - //VolUp Vold_packetn - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - //LCTRL LSHFT LALT LGUI RCTRL RSHFT RALT RGUI - 0x00, 0x00, 0x00, 0xEA, 0x00, 0x00, 0x00, 0xEA -}; - -static unsigned char usb_kbd_to_atari_fr_unshift[] = -{ - // A(Q) B C D - 0x00, 0x00, 0x00, 0x00, 0x1E, 0x30, 0x2E, 0x20, - // E F G H I J K L - 0x12, 0x21, 0x22, 0x23, 0x17, 0x24, 0x25, 0x26, - // M(,) N O P Q(A) R S T - 0x32, 0x31, 0x18, 0x19, 0x10, 0x13, 0x1F, 0x14, - // U V W(Z) X Y Z(W) 1 2 - 0x16, 0x2F, 0x11, 0x2D, 0x15, 0x2C, 0x02, 0x03, - // 3 4 5 6 7 8 9 0 - 0x04, 0x05, 0x06, 0x0D, 0x08, 0x0D, 0x0A, 0x0B, - // RET ESC BACK TAB SPACE -()) = [(^) - 0x1C, 0x01, 0x0E, 0x0F, 0x39, 0x0C, 0x35, 0x1A, - // ]($) \(*) ;(M) ' ` ,(;) .(:) - 0x1B, 0x1B, 0x00, 0x27, 0x28, 0x00, 0x33, 0x34, - // /(!) CAPS F1 F2 F3 F4 F5 F6 - 0x09, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F, 0x40, - // F7 F8 F9 F10 F11 F12 PrtSc ScLoc - 0x41, 0x42, 0x43, 0x44, 0x62, 0x61, 0x62, 0x4C, - //PAUSE INS HOME PgUp DEL END PgDn -> - 0x4F, 0x52, 0x47, 0x45, 0x53, 0x47, 0x46, 0x4D, - // <- DOWN UP NuLoc KP/ KP* KP- KP+ - 0x4B, 0x50, 0x48, 0x00, 0x65, 0x66, 0x4A, 0x4E, - // ENT KP1 KP2 KP3 KP4 KP5 KP6 KP7 - 0x72, 0x6D, 0x6E, 0x6F, 0x6A, 0x6B, 0x6C, 0x67, - // KP8 KP9 KP0 KP. >< APP KP= - 0x68, 0x69, 0x70, 0x71, 0x60, 0x00, 0x00, 0x00, - // F13, F14, F15 F16 F17 F18 F19 F20 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // F21 F22 F23 F24 EXEC HELP MENU SEL - 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x60, 0x00, - // STOP AGAIN UNDO CUT COPY PASTE FIND MUTE - 0x00, 0x00, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, - //VolUp Vold_packetn - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - //LCTRL LSHFT LALT LGUI RCTRL RSHFT RALT RGUI - 0x1D, 0x2A, 0x38, 0x0F, 0x1D, 0x36, 0x00, 0x0F -}; - -static unsigned char usb_kbd_to_atari_fr_shift[] = -{ - /* Hexa values, 00: unused => use the Unshift table */ - /* FF: invalid => no scancode */ - // A(Q) B C D - 0x00, 0x00, 0x00, 0x00, 0x1E, 0x30, 0x2E, 0x20, - // E F G H I J K L - 0x12, 0x21, 0x22, 0x23, 0x17, 0x24, 0x25, 0x26, - // M(,) N O P Q(A) R S T - 0x32, 0x31, 0x18, 0x19, 0x10, 0x13, 0x1F, 0x14, - // U V W(Z) X Y Z(W) 1 2 - 0x16, 0x2F, 0x11, 0x2D, 0x15, 0x2C, 0x02, 0x03, - // 3 4 5 6 7 8 9 0 - 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, - // RET ESC BACK TAB SPACE -()) = [(^) - 0x1C, 0x01, 0x0E, 0x0F, 0x39, 0x0C, 0x35, 0x1A, - // ]($) \(*) ;(M) ' ` ,(;) .(:) - 0x29, 0xFF, 0x00, 0x27, 0x28, 0x00, 0x33, 0x34, - // /(!) CAPS F1 F2 F3 F4 F5 F6 - 0x07, 0x3A, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, - // F7 F8 F9 F10 F11 F12 PrtSc ScLoc - 0x5A, 0x5B, 0x5C, 0x5D, 0x62, 0x61, 0x62, 0x4C, - //PAUSE INS HOME PgUp DEL END PgDn -> - 0x4F, 0x52, 0x47, 0x48, 0x53, 0x47, 0x50, 0x4D, - // <- DOWN UP NuLoc KP/ KP* KP- KP+ - 0x4B, 0x50, 0x48, 0x00, 0x65, 0x66, 0x4A, 0x4E, - // ENT KP1 KP2 KP3 KP4 KP5 KP6 KP7 - 0x72, 0x6D, 0x6E, 0x6F, 0x6A, 0x6B, 0x6C, 0x67, - // KP8 KP9 KP0 KP. >< APP KP= - 0x68, 0x69, 0x70, 0x71, 0x60, 0x00, 0x00, 0x00, - // F13, F14, F15 F16 F17 F18 F19 F20 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // F21 F22 F23 F24 EXEC HELP MENU SEL - 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x60, 0x00, - // STOP AGAIN UNDO CUT COPY PASTE FIND MUTE - 0x00, 0x00, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, - //VolUp Vold_packetn - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - //LCTRL LSHFT LALT LGUI RCTRL RSHFT RALT RGUI - 0x1D, 0x2A, 0x38, 0x0F, 0x1D, 0x36, 0x00, 0x0F -}; - -static unsigned char usb_kbd_to_atari_fr_altgr[] = -{ - /* Hexa values, 00: unused => use the Unshift table */ - /* FF: invalid => no scancode */ - // A(Q) B C D - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // E F G H I J K L - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // M(,) N O P Q(A) R S T - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // U V W(Z) X Y Z(W) 1 2 - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x2B, - // 3 4 5 6 7 8 9 0 - 0x2B, 0x1A, 0x1A, 0x2B, 0x29, 0x28, 0x1A, 0x2B, - // RET ESC BACK TAB SPACE -()) = [(^) - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x1B, 0x1B, 0xFF, - // ]($) \(*) ;(M) ' ` ,(;) .(:) - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // /(!) CAPS F1 F2 F3 F4 F5 F6 - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // F7 F8 F9 F10 F11 F12 PrtSc ScLoc - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - //PAUSE INS HOME PgUp DEL END PgDn -> - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // <- DOWN UP NuLoc KP/ KP* KP- KP+ - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x4E, - // ENT KP1 KP2 KP3 KP4 KP5 KP6 KP7 - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // KP8 KP9 KP0 KP. >< APP KP= - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // F13, F14, F15 F16 F17 F18 F19 F20 - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // F21 F22 F23 F24 EXEC HELP MENU SEL - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x62, 0xFF, 0xFF, - // STOP AGAIN UNDO CUT COPY PASTE FIND MUTE - 0xFF, 0xFF, 0x61, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - //VolUp Vold_packetn - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - //LCTRL LSHFT LALT LGUI RCTRL RSHFT RALT RGUI - 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0xFF -}; - -static unsigned char usb_kbd_to_atari_de_modifier[] = -{ - /* This table can change host SHIFT & ALT states for each scancode, values */ - /* are in hexa : bit 7: 1 for a valid entry */ - /* bit 6: 1 for force CTRL */ - /* bit 5: ALT, bit 4: SHIFT states for the AltGR table */ - /* bit 3: ALT, bit 2: SHIFT states for the Shift table */ - /* bit 1: ALT, bit 0: SHIFT states for the Unshift table */ - // A(Q) B C D - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // E F G H I J K L - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // M(,) N O P Q(A) R S T - 0x00, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x00, - // U V W(Z) X Y Z(W) 1 2 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // 3 4 5 6 7 8 9 0 - 0x00, 0x00, 0x00, 0x00, 0xB4, 0xA4, 0xA4, 0xB4, - // RET ESC BACK TAB SPACE -()) = [(^) - 0x00, 0x00, 0x00, 0x00, 0x00, 0xB4, 0x00, 0x00, - // ]($) \(*) ;(M) ' ` ,(;) .(:) - 0x00, 0x80, 0x00, 0x00, 0x00, 0x91, 0x00, 0x00, - // /(!) CAPS F1 F2 F3 F4 F5 F6 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // F7 F8 F9 F10 F11 F12 PrtSc ScLoc - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - //PAUSE INS HOME PgUp DEL END PgDn -> - 0x00, 0x00, 0x00, 0x81, 0x00, 0x95, 0x81, 0x00, - // <- DOWN UP NuLoc KP/ KP* KP- KP+ - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // ENT KP1 KP2 KP3 KP4 KP5 KP6 KP7 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // KP8 KP9 KP0 KP. >< APP POWER KP= - 0x00, 0x00, 0x00, 0x00, 0x94, 0x00, 0x00, 0x00, - // F13, F14, F15 F16 F17 F18 F19 F20 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // F21 F22 F23 F24 EXEC HELP MENU SEL - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xBF, 0x00, - // STOP AGAIN UNDO CUT COPY PASTE FIND MUTE - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - //VolUp Vold_packetn - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - //LCTRL LSHFT LALT LGUI RCTRL RSHFT RALT RGUI - 0x00, 0x00, 0x00, 0xEA, 0x00, 0x00, 0x00, 0xEA -}; - -static unsigned char usb_kbd_to_atari_de_unshift[] = -{ - // A(Q) B C D - 0x00, 0x00, 0x00, 0x00, 0x1E, 0x30, 0x2E, 0x20, - // E F G H I J K L - 0x12, 0x21, 0x22, 0x23, 0x17, 0x24, 0x25, 0x26, - // M(,) N O P Q(A) R S T - 0x32, 0x31, 0x18, 0x19, 0x10, 0x13, 0x1F, 0x14, - // U V W(Z) X Y Z(W) 1 2 - 0x16, 0x2F, 0x11, 0x2D, 0x15, 0x2C, 0x02, 0x03, - // 3 4 5 6 7 8 9 0 - 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, - // RET ESC BACK TAB SPACE -()) = [(^) - 0x1C, 0x01, 0x0E, 0x0F, 0x39, 0x0C, 0x0D, 0x1A, - // ]($) \(*) ;(M) ' ` ,(;) .(:) - 0x1B, 0x29, 0x00, 0x27, 0x28, 0x29, 0x33, 0x34, - // /(!) CAPS F1 F2 F3 F4 F5 F6 - 0x35, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F, 0x40, - // F7 F8 F9 F10 F11 F12 PrtSc ScLoc - 0x41, 0x42, 0x43, 0x44, 0x63, 0x64, 0x62, 0x50, - //PAUSE INS HOME PgUp DEL END PgDn -> - 0x61, 0x52, 0x47, 0x48, 0x53, 0x47, 0x50, 0x4D, - // <- DOWN UP NuLoc KP/ KP* KP- KP+ - 0x4B, 0x50, 0x48, 0x54, 0x65, 0x66, 0x4A, 0x4E, - // ENT KP1 KP2 KP3 KP4 KP5 KP6 KP7 - 0x72, 0x6D, 0x6E, 0x6F, 0x6A, 0x6B, 0x6C, 0x67, - // KP8 KP9 KP0 KP. >< APP KP= - 0x68, 0x69, 0x70, 0x71, 0x60, 0x00, 0x00, 0x00, - // F13, F14, F15 F16 F17 F18 F19 F20 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // F21 F22 F23 F24 EXEC HELP MENU SEL - 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x60, 0x00, - // STOP AGAIN UNDO CUT COPY PASTE FIND MUTE - 0x00, 0x00, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, - //VolUp Vold_packetn - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - //LCTRL LSHFT LALT LGUI RCTRL RSHFT RALT RGUI - 0x1D, 0x2A, 0x38, 0x0F, 0x1D, 0x36, 0x00, 0x0F -}; - -static unsigned char usb_kbd_to_atari_de_shift[] = -{ - /* Hexa values, 00: unused => use the Unshift table */ - /* FF: invalid => no scancode */ - // A(Q) B C D - 0x00, 0x00, 0x00, 0x00, 0x1E, 0x30, 0x2E, 0x20, - // E F G H I J K L - 0x12, 0x21, 0x22, 0x23, 0x17, 0x24, 0x25, 0x26, - // M(,) N O P Q(A) R S T - 0x32, 0x31, 0x18, 0x19, 0x10, 0x13, 0x1F, 0x14, - // U V W(Z) X Y Z(W) 1 2 - 0x16, 0x2F, 0x11, 0x2D, 0x15, 0x2C, 0x02, 0x03, - // 3 4 5 6 7 8 9 0 - 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, - // RET ESC BACK TAB SPACE -()) = [(^) - 0x1C, 0x01, 0x0E, 0x0F, 0x39, 0x0C, 0x0D, 0x1A, - // ]($) \(*) ;(M) ' ` ,(;) .(:) - 0x1B, 0x0D, 0x00, 0x27, 0x28, 0x34, 0x33, 0x34, - // /(!) CAPS F1 F2 F3 F4 F5 F6 - 0x35, 0x3A, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, - // F7 F8 F9 F10 F11 F12 PrtSc ScLoc - 0x5A, 0x5B, 0x5C, 0x5D, 0x63, 0x64, 0x62, 0x50, - //PAUSE INS HOME PgUp DEL END PgDn -> - 0x61, 0x52, 0x47, 0x48, 0x53, 0x47, 0x50, 0x4D, - // <- DOWN UP NuLoc KP/ KP* KP- KP+ - 0x4B, 0x50, 0x48, 0x54, 0x65, 0x66, 0x4A, 0x4E, - // ENT KP1 KP2 KP3 KP4 KP5 KP6 KP7 - 0x72, 0x6D, 0x6E, 0x6F, 0x6A, 0x6B, 0x6C, 0x67, - // KP8 KP9 KP0 KP. >< APP KP= - 0x68, 0x69, 0x70, 0x71, 0x60, 0x00, 0x00, 0x00, - // F13, F14, F15 F16 F17 F18 F19 F20 - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - // F21 F22 F23 F24 EXEC HELP MENU SEL - 0x00, 0x00, 0x00, 0x00, 0x00, 0x62, 0x60, 0x00, - // STOP AGAIN UNDO CUT COPY PASTE FIND MUTE - 0x00, 0x00, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, - //VolUp Vold_packetn - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - //LCTRL LSHFT LALT LGUI RCTRL RSHFT RALT RGUI - 0x1D, 0x2A, 0x38, 0x0F, 0x1D, 0x36, 0x00, 0x0F -}; - -static unsigned char usb_kbd_to_atari_de_altgr[] = -{ - /* Hexa values, 00: unused => use the Unshift table */ - /* FF: invalid => no scancode */ - // A(Q) B C D - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // E F G H I J K L - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // M(,) N O P Q(A) R S T - 0xFF, 0xFF, 0xFF, 0xFF, 0x1A, 0xFF, 0xFF, 0xFF, - // U V W(Z) X Y Z(W) 1 2 - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // 3 4 5 6 7 8 9 0 - 0xFF, 0xFF, 0xFF, 0xFF, 0x27, 0x27, 0x28, 0x28, - // RET ESC BACK TAB SPACE -()) = [(^) - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x1A, 0x2B, 0xFF, - // ]($) \(*) ;(M) ' ` ,(;) .(:) - 0x2B, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // /(!) CAPS F1 F2 F3 F4 F5 F6 - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // F7 F8 F9 F10 F11 F12 PrtSc ScLoc - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - //PAUSE INS HOME PgUp DEL END PgDn -> - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // <- DOWN UP NuLoc KP/ KP* KP- KP+ - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x4E, - // ENT KP1 KP2 KP3 KP4 KP5 KP6 KP7 - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // KP8 KP9 KP0 KP. >< APP KP= - 0xFF, 0xFF, 0xFF, 0xFF, 0x2B, 0xFF, 0xFF, 0xFF, - // F13, F14, F15 F16 F17 F18 F19 F20 - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - // F21 F22 F23 F24 EXEC HELP MENU SEL - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x62, 0xFF, 0xFF, - // STOP AGAIN UNDO CUT COPY PASTE FIND MUTE - 0xFF, 0xFF, 0x61, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - //VolUp Vold_packetn - 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, - //LCTRL LSHFT LALT LGUI RCTRL RSHFT RALT RGUI - 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0xFF -}; - -static void *memscan(void *addr, int c, int size) -{ - unsigned char *p = (unsigned char *) addr; - - while (size) - { - if (*p == (char) c) - return (void *) p; - p++; - size--; - } - return (void *) p; -} - -static int usb_kbd_probe(struct usb_device *dev, unsigned int ifnum); - -/* - * deregistering the keyboard - */ -int usb_kbd_deregister(struct usb_device *dev) -{ - dev->irq_handle = NULL; - - if (new_packet != NULL) - { - driver_mem_free(new_packet); - new_packet = NULL; - } - - if (leds != NULL) - { - driver_mem_free(leds); - leds = NULL; - } - kbd_installed = 0; - - dbg("USB KBD deregistered\r\n"); - - return 1; -} - -/* registering the keyboard */ -int usb_kbd_register(struct usb_device *dev) -{ - if(!kbd_installed && (dev->devnum != -1) && (usb_kbd_probe(dev, 0) == 1)) - { /* Ok, we found a keyboard */ - //dbg("USB KBD found (iorec: 0x%x, USB: %d, devnum: %d)\r\n", iorec, dev->usbnum, dev->devnum); - num_lock = caps_lock = scroll_lock = old_modifier = 0; - flags.s = 0; - kbd_installed = 1; - dev->deregister = usb_kbd_deregister; - return 1; - } - /* no USB Keyboard found */ - return -1; -} - -/* search for keyboard and register it if found */ -int drv_usb_kbd_init(void) -{ - int i, j; - if(kbd_installed) - return -1; - /* scan all USB Devices */ - for(j = 0; j < USB_MAX_BUS; j++) - { - for(i = 0; i < USB_MAX_DEVICE; i++) - { - struct usb_device *dev = usb_get_dev_index(i, j); /* get device */ - if(dev == NULL) - break; - if(usb_kbd_register(dev) > 0) - return 1; - } - } - /* no USB Keyboard found */ - return -1; -} - -/************************************************************************** - * Low Level drivers - */ - -/* set the LEDs. Since this is used in the irq routine, the control job - is issued with a timeout of 0. This means, that the job is queued without - waiting for job completion */ - -static void usb_kbd_setled(struct usb_device *dev) -{ - struct usb_interface_descriptor *iface = &dev->config.if_desc[0]; - unsigned char *pleds = (unsigned char *)(((unsigned long)leds + 3) & ~3); - if(scroll_lock != 0) - *pleds = 4; - else - *pleds = 0; - if(caps_lock != 0) - *pleds |= 2; - if(num_lock != 0) - *pleds |= 1; - usb_control_msg(dev, usb_sndctrlpipe(dev, 0), - USB_REQ_SET_REPORT, USB_TYPE_CLASS | USB_RECIP_INTERFACE, 0x200, iface->bInterfaceNumber, pleds, 1, 0); -} - -static void usb_kbd_send_code(unsigned char code) -{ - //if((iorec != NULL) && (ikbdvec != NULL)) - // call_ikbdvec(code, iorec, ikbdvec); -} - -/* - * Translate the scancode - */ -static int usb_kbd_translate(unsigned char scancode, unsigned char modifier, int pressed) -{ - unsigned char keycode = 0; - unsigned char atari_modifier = 0; -#ifdef CONFIG_USB_INTERRUPT_POLLING - int level; -#endif - - int type = USA; - - dbg("USB KBD scancode: 0x%02x, modifier:0x%02x, pressed: %d\r\n", scancode, modifier, pressed); - flags.b.force_alt_shift = 0; - - if(scancode > MAX_VALUE_LOOKUP) - { - keycode = 0; - } - else - { - if(scancode == 0x8A) /* LEFT ALT */ - { - keycode = 0x38; /* Alt Atari */ - } - else - { - unsigned char *unshift_table = NULL; - unsigned char *shift_table = NULL; - unsigned char *altgr_table = NULL; - unsigned char *modifier_table = NULL; - unsigned long lang = USA; - - //USB_COOKIE *p = usb_get_cookie('_AKP'); - //if(p != NULL) - // lang = (p->v.l >> 8) & 0xFF; - -#ifdef USE_COUNTRYCODE - switch(usb_kbd_hid_desc.bCountryCode) - { - case CC_USA: lang = USA; break; - case CC_FRG: lang = FRG; break; - case CC_FRA: lang = FRA; break; - case CC_UK: lang = UK; break; - case CC_SPA: lang = SPA; break; - case CC_ITA: lang = ITA; break; - case CC_SWE: lang = SWE; break; - case CC_SWF: lang = SWF; break; - case CC_SWG: lang = SWG; break; - } -#endif - switch(lang) - { - case FRA: - case SWF: - unshift_table = usb_kbd_to_atari_fr_unshift; - shift_table = usb_kbd_to_atari_fr_shift; - altgr_table = usb_kbd_to_atari_fr_altgr; - modifier_table = usb_kbd_to_atari_fr_modifier; - type = FRA; - break; - - case FRG: - case SWG: - unshift_table = usb_kbd_to_atari_de_unshift; - shift_table = usb_kbd_to_atari_de_shift; - altgr_table = usb_kbd_to_atari_de_altgr; - modifier_table = usb_kbd_to_atari_de_modifier; - type = FRG; - break; - - default: - unshift_table = usb_kbd_to_atari_scancode; - break; - } - - if (modifier != old_modifier) - { - if (((modifier & (1 << LEFT_SHIFT)) != 0) || ((modifier & (1 << RIGHT_SHIFT)) != 0)) - { - if (!flags.b.shift_usb) - { - flags.b.shift_usb = 1; - flags.b.shift_usb_break = 1; - } - } - else - { - flags.b.shift_usb = 0; - } - - if ((modifier & (1 << RIGHT_ALT)) != 0) - { - if (!flags.b.altgr_usb) - { - flags.b.altgr_usb = 1; - flags.b.altgr_usb_break = 1; - } - } - else - { - flags.b.altgr_usb = 0; - } - old_modifier = modifier; - } - else if (pressed) - { - if (!flags.b.altgr_usb) - { - flags.b.altgr_usb_break = 0; - } - if (!flags.b.shift_usb) - { - flags.b.shift_usb_break = 0; - } - } - keycode = unshift_table[scancode]; - - if ((modifier & (1 << LEFT_ALT)) == 0) - { - /* - * This modifier table can change host SHIFT & ALT states for each scancode, values - * are in hexa : bit 7: 1 for a valid entry - * bit 6: 1 for force CTRL - * bit 5: ALT, bit 4: SHIFT states for the AltGR table - * bit 3: ALT, bit 2: SHIFT states for the Shift table - * bit 1: ALT, bit 0: SHIFT states for the Unshift table - */ - if (modifier_table != NULL) - { - atari_modifier = modifier_table[scancode]; - } - else - { - atari_modifier = 0; - } - - if ((atari_modifier & (1 << 7)) != 0) - { - flags.b.force_alt_shift = 1; - } - else - { - atari_modifier = 0; - } - - if (flags.b.altgr_usb_break) - { - if (altgr_table[scancode]) - { - keycode = altgr_table[scancode]; - if ((atari_modifier & (1 << 6)) != 0) - { - atari_modifier = (atari_modifier >> 4) | (atari_modifier & (1 << 6)); - } - else - { - atari_modifier >>= 4; - } - } - } - else if (flags.b.shift_usb_break) - { - if (shift_table[scancode]) - { - keycode = shift_table[scancode]; - if ((atari_modifier & (1 << 6)) != 0) - { - atari_modifier = (atari_modifier >> 2) | (atari_modifier & (1 << 6)); - } - else - { - atari_modifier >>= 2; - } - } - } - } - } - } - dbg("USB KBD atari-%s keycode:0x%02x, modifier:0x%02x, flags:0x%04x\r\n", (type == FRA) ? "fr" : (type == FRG) ? "de" : "us", keycode, atari_modifier, flags.s); - - if (keycode == 0x1D) /* CTRL */ - { - if(pressed) - flags.b.ctrl_host = 1; - else - flags.b.ctrl_host = 0; - } - if(keycode == 0x36) /* RSHIFT */ - { - if(pressed) - flags.b.right_shift_host = 1; - else - flags.b.right_shift_host = 0; - } - if(keycode == 0x2A) /* LSHIFT */ - { - if(pressed) - flags.b.left_shift_host = 1; - else - flags.b.left_shift_host = 0; - } -#ifdef CONFIG_USB_INTERRUPT_POLLING - level = asm_set_ipl(7); /* mask interrupts for use call_ikbdvec() */ -#endif - if(pressed && (flags.b.force_alt_shift)) - { - flags.b.key_forced = 1; - if(((atari_modifier & (1 << 6)) != 0) && flags.b.ctrl_host) - usb_kbd_send_code(0x1D); /* CTRL */ - if((atari_modifier & (1 << 0)) == 0) - { - if(flags.b.left_shift_host) - usb_kbd_send_code(0xAA); /* !LSHIFT */ - if(flags.b.right_shift_host) - usb_kbd_send_code(0xB6); /* !RSHIFT */ - } - else - { - if(!flags.b.left_shift_host) - usb_kbd_send_code(0x2A); /* LSHIFT */ - if(!flags.b.right_shift_host && (keycode != 0x60)) /* < */ - usb_kbd_send_code(0x36); /* RSHIFT */ - } - if((atari_modifier & (1 << 1)) == 0) - { - if(flags.b.alt_host) - usb_kbd_send_code(0xB8); /* !ALT */ - } - else - { - if(!flags.b.alt_host) - usb_kbd_send_code(0x38); /* ALT */ - } - } - if((keycode !=0) && (keycode <= MAX_VALUE_ATARI)) - usb_kbd_send_code(pressed ? keycode : keycode | 0x80); - if(!pressed && (flags.b.force_alt_shift)) - { - flags.b.key_forced = 0; - if(((atari_modifier & (1 << 6)) != 0) && flags.b.ctrl_host) - usb_kbd_send_code(0x9D); /* !CTRL */ - if((atari_modifier & (1 << 0)) == 0) - { - if(flags.b.left_shift_host) - usb_kbd_send_code(0x2A); /* LSHIFT */ - if(flags.b.right_shift_host) - usb_kbd_send_code(0x36); /* RSHIFT */ - } - else - { - if(!flags.b.left_shift_host) - usb_kbd_send_code(0xAA); /* !LSHIFT */ - if(!flags.b.right_shift_host) - usb_kbd_send_code(0xB6); /* !RSHIFT */ - } - if((atari_modifier & (1 << 1)) == 0) - { - if(flags.b.alt_host) - usb_kbd_send_code(0x38); /* ALT */ - } - else - { - if(!flags.b.alt_host) - usb_kbd_send_code(0xB8); /* !ALT */ - } - } -#ifdef CONFIG_USB_INTERRUPT_POLLING - asm_set_ipl(level); -#endif - if(pressed == 1) - { - if(scancode == NUM_LOCK) - { - num_lock = ~num_lock; - return 1; - } - if(scancode == CAPS_LOCK) - { - caps_lock = ~caps_lock; - return 1; - } - if(scancode == SCROLL_LOCK) - { - scroll_lock = ~scroll_lock; - return 1; - } - } - return 0; -} - -/* Interrupt service routine */ -static int usb_kbd_irq(struct usb_device *dev) -{ - int i,res; - if((dev->irq_status != 0) || (dev->irq_act_len != 8)) - { - dbg("USB KBD error %lX, len %d\r\n",dev->irq_status,dev->irq_act_len); - return 1; - } - res = 0; - for(i = 2; i < 8; i++) - { - if(old_packet[i] > 3 && memscan(&new_packet[2], old_packet[i], 6) == &new_packet[8]) - { - res |= usb_kbd_translate(old_packet[i], new_packet[0], 0); - old_packet[0] = new_packet[0]; - } - if(new_packet[i] > 3 && memscan(&old_packet[2], new_packet[i], 6) == &old_packet[8]) - { - res |= usb_kbd_translate(new_packet[i], new_packet[0], 1); - old_packet[0] = new_packet[0]; - } - } - if(new_packet[0] != old_packet[0]) /* modifier change */ - { - unsigned char modifier_change = new_packet[0] ^ old_packet[0]; - if(modifier_change & (1 << LEFT_CNTR)) - res |= usb_kbd_translate(0x88, new_packet[0], (new_packet[0] & (1 << LEFT_CNTR)) ? 1 : 0); - if(modifier_change & (1 << LEFT_SHIFT)) - res |= usb_kbd_translate(0x89, new_packet[0], (new_packet[0] & (1 << LEFT_SHIFT)) ? 1 : 0); - if(modifier_change & (1 << LEFT_ALT)) - res |= usb_kbd_translate(0x8A, new_packet[0], (new_packet[0] & (1 << LEFT_ALT)) ? 1 : 0); - if(modifier_change & (1 << LEFT_GUI)) - res |= usb_kbd_translate(0x8B, new_packet[0], (new_packet[0] & (1 << LEFT_GUI)) ? 1 : 0); - if(modifier_change & (1 << RIGHT_CNTR)) - res |= usb_kbd_translate(0x8C, new_packet[0], (new_packet[0] & (1 << RIGHT_CNTR)) ? 1 : 0); - if(modifier_change & (1 << RIGHT_SHIFT)) - res |= usb_kbd_translate(0x8D, new_packet[0], (new_packet[0] & (1 << RIGHT_SHIFT)) ? 1 : 0); - if(modifier_change & (1 << RIGHT_ALT)) - res |= usb_kbd_translate(0x8E, new_packet[0], (new_packet[0] & (1 << RIGHT_ALT)) ? 1 : 0); - if(modifier_change & (1 << RIGHT_GUI)) - res |= usb_kbd_translate(0x8F, new_packet[0], (new_packet[0] & (1 << RIGHT_GUI)) ? 1 : 0); - } - if(res == 1) - usb_kbd_setled(dev); - memcpy(&old_packet[0], &new_packet[0], 8); - return 1; /* install IRQ Handler again */ -} - -/* - * probes the USB device dev for keyboard type - */ -static int usb_kbd_probe(struct usb_device *dev, unsigned int ifnum) -{ - struct usb_interface_descriptor *iface; - struct usb_endpoint_descriptor *ep; - int pipe; - int maxp; - - if (dev->descriptor.bNumConfigurations != 1) - { - dbg("device has more than one single configuration\r\n"); - - return 0; - } - - iface = &dev->config.if_desc[ifnum]; - - if (iface->bInterfaceClass != USB_CLASS_HID) - { - dbg("device is not a HID device\r\n"); - - return 0; - } - - if(iface->bInterfaceSubClass != 1) - { - dbg("device interface subclass != USB_SUB_HID_BOOT\r\n"); - - return 0; - } - - if (iface->bInterfaceProtocol != USB_PROT_HID_KEYBOARD) - { - dbg("device is not a keyboard\r\n"); - - return 0; - } - - if (iface->bNumEndpoints != 1) - { - dbg("device has %d endpoints instead of 1\r\n", iface->bNumEndpoints); - - return 0; - } - - ep = &iface->ep_desc[0]; - - if (!(ep->bEndpointAddress & 0x80)) - { - dbg("ep->bEndpointAddress & 0x80 = 0x%x\r\n", ep->bEndpointAddress & 0x80); - - return 0; - } - - if ((ep->bmAttributes & 3) != 3) - { - dbg("ep->bmAttributes & 3 != 3 (%d)\r\n", ep->bmAttributes & 3); - - return 0; - } - - leds = (unsigned char *) driver_mem_alloc(8); - - if (leds == NULL) - { - dbg("could not allocate memory for leds\r\n"); - - return 0; - } - - new_packet = (unsigned char *) driver_mem_alloc(8); - if (new_packet == NULL) - { - dbg("could not allocate memory for new_packed\r\n"); - - driver_mem_free(leds); - - return 0; - } - - dbg("USB KBD found, set protocol...\r\n"); - - /* ok, we found a USB Keyboard, install it */ -#ifdef USE_COUNTRYCODE - if(usb_kbd_get_hid_desc(dev) < 0) - usb_kbd_hid_desc.bCountryCode = CC_NOT; -#endif - - usb_set_protocol(dev, iface->bInterfaceNumber, 0); - - dbg("USB KBD found, set idle...\r\n"); - usb_set_idle(dev, iface->bInterfaceNumber, REPEAT_RATE, 0); - - memset(&new_packet[0], 0, 8); - memset(&old_packet[0], 0, 8); - - pipe = usb_rcvintpipe(dev, ep->bEndpointAddress); - - maxp = usb_maxpacket(dev, pipe); - - dev->irq_handle = usb_kbd_irq; - - dbg("USB KBD enable interrupt pipe (maxp: %d)...\r\n", maxp); - usb_submit_int_msg(dev, pipe, &new_packet[0], maxp > 8 ? 8 : maxp, ep->bInterval); - - return 1; -} - -#ifdef USE_COUNTRYCODE - -/* - * We parse each description item into this structure. Short items data - * values are expanded to 32-bit signed int, long items contain a pointer - * into the data area. - */ - -struct hid_item -{ - unsigned char format; - unsigned char size; - unsigned char type; - unsigned char tag; - union - { - unsigned char u_8; - char s_8; - unsigned short u_16; - short s_16; - unsigned long u_32; - long s_32; - unsigned char *longdata; - } data; -}; - -/* HID report item format */ -#define HID_ITEM_FORMAT_SHORT 0 -#define HID_ITEM_FORMAT_LONG 1 - -/* Special tag indicating long items */ -#define HID_ITEM_TAG_LONG 15 - -#ifdef USB_KBD_DEBUG - -void usb_kbd_display_hid(struct usb_hid_descriptor *hid) -{ - board_printf("USB_HID_DESC:\r\n"); - board_printf(" bLenght 0x%x\r\n",hid->bLength); - board_printf(" bcdHID 0x%x\r\n",hid->bcdHID); - board_printf(" bCountryCode %d\r\n",hid->bCountryCode); - board_printf(" bNumDescriptors 0x%x\r\n",hid->bNumDescriptors); - board_printf(" bReportDescriptorType 0x%x\r\n",hid->bReportDescriptorType); - board_printf(" wDescriptorLength 0x%x\r\n",hid->wDescriptorLength); -} - -/* - * Fetch a report description item from the data stream. We support long - * items, though they are not used yet. - */ - -static int fetch_item(unsigned char *start, unsigned char *end, struct hid_item *item) -{ - if((end - start) > 0) - { - unsigned char b = *start++; - item->type = (b >> 2) & 3; - item->tag = (b >> 4) & 15; - if(item->tag == HID_ITEM_TAG_LONG) - { - item->format = HID_ITEM_FORMAT_LONG; - if((end - start) >= 2) - { - item->size = *start++; - item->tag = *start++; - if((end - start) >= item->size) - { - item->data.longdata = start; - start += item->size; - return item->size; - } - } - } - else - { - item->format = HID_ITEM_FORMAT_SHORT; - item->size = b & 3; - switch(item->size) - { - case 0: - return item->size; - case 1: - if((end - start) >= 1) - { - item->data.u_8 = *start++; - return item->size; - } - break; - case 2: - if((end - start) >= 2) - { - item->data.u_16 = le16_to_cpu(*(unsigned short *)start); - start+=2; - return item->size; - } - case 3: - item->size++; - if((end - start) >= 4) - { - item->data.u_32 = le32_to_cpu(*(unsigned long *)start); - start+=4; - return item->size; - } - } - } - } - return -1; -} - -#endif /* USB_KBD_DEBUG */ - -/* - * HID report descriptor item type (prefix bit 2,3) - */ - -#define HID_ITEM_TYPE_MAIN 0 -#define HID_ITEM_TYPE_GLOBAL 1 -#define HID_ITEM_TYPE_LOCAL 2 -#define HID_ITEM_TYPE_RESERVED 3 -/* - * HID report descriptor main item tags - */ - -#define HID_MAIN_ITEM_TAG_INPUT 8 -#define HID_MAIN_ITEM_TAG_OUTPUT 9 -#define HID_MAIN_ITEM_TAG_FEATURE 11 -#define HID_MAIN_ITEM_TAG_BEGIN_COLLECTION 10 -#define HID_MAIN_ITEM_TAG_END_COLLECTION 12 -/* - * HID report descriptor main item contents - */ - -#define HID_MAIN_ITEM_CONSTANT 0x001 -#define HID_MAIN_ITEM_VARIABLE 0x002 -#define HID_MAIN_ITEM_RELATIVE 0x004 -#define HID_MAIN_ITEM_WRAP 0x008 -#define HID_MAIN_ITEM_NONLINEAR 0x010 -#define HID_MAIN_ITEM_NO_PREFERRED 0x020 -#define HID_MAIN_ITEM_NULL_STATE 0x040 -#define HID_MAIN_ITEM_VOLATILE 0x080 -#define HID_MAIN_ITEM_BUFFERED_BYTE 0x100 - -/* - * HID report descriptor collection item types - */ - -#define HID_COLLECTION_PHYSICAL 0 -#define HID_COLLECTION_APPLICATION 1 -#define HID_COLLECTION_LOGICAL 2 -/* - * HID report descriptor global item tags - */ - -#define HID_GLOBAL_ITEM_TAG_USAGE_PAGE 0 -#define HID_GLOBAL_ITEM_TAG_LOGICAL_MINIMUM 1 -#define HID_GLOBAL_ITEM_TAG_LOGICAL_MAXIMUM 2 -#define HID_GLOBAL_ITEM_TAG_PHYSICAL_MINIMUM 3 -#define HID_GLOBAL_ITEM_TAG_PHYSICAL_MAXIMUM 4 -#define HID_GLOBAL_ITEM_TAG_UNIT_EXPONENT 5 -#define HID_GLOBAL_ITEM_TAG_UNIT 6 -#define HID_GLOBAL_ITEM_TAG_REPORT_SIZE 7 -#define HID_GLOBAL_ITEM_TAG_REPORT_ID 8 -#define HID_GLOBAL_ITEM_TAG_REPORT_COUNT 9 -#define HID_GLOBAL_ITEM_TAG_PUSH 10 -#define HID_GLOBAL_ITEM_TAG_POP 11 - -/* - * HID report descriptor local item tags - */ - -#define HID_LOCAL_ITEM_TAG_USAGE 0 -#define HID_LOCAL_ITEM_TAG_USAGE_MINIMUM 1 -#define HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM 2 -#define HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX 3 -#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MINIMUM 4 -#define HID_LOCAL_ITEM_TAG_DESIGNATOR_MAXIMUM 5 -#define HID_LOCAL_ITEM_TAG_STRING_INDEX 7 -#define HID_LOCAL_ITEM_TAG_STRING_MINIMUM 8 -#define HID_LOCAL_ITEM_TAG_STRING_MAXIMUM 9 -#define HID_LOCAL_ITEM_TAG_DELIMITER 10 - -#ifdef USB_KBD_DEBUG -static void usb_kbd_show_item(struct hid_item *item) -{ - switch(item->type) - { - case HID_ITEM_TYPE_MAIN: - switch(item->tag) - { - case HID_MAIN_ITEM_TAG_INPUT: board_printf("Main Input"); break; - case HID_MAIN_ITEM_TAG_OUTPUT: board_printf("Main Output"); break; - case HID_MAIN_ITEM_TAG_FEATURE: board_printf("Main Feature"); break; - case HID_MAIN_ITEM_TAG_BEGIN_COLLECTION: board_printf("Main Begin Collection"); break; - case HID_MAIN_ITEM_TAG_END_COLLECTION: board_printf("Main End Collection"); break; - default: board_printf("Main reserved %d",item->tag); break; - } - break; - case HID_ITEM_TYPE_GLOBAL: - switch(item->tag) - { - case HID_GLOBAL_ITEM_TAG_USAGE_PAGE: board_printf("- Global Usage Page"); break; - case HID_GLOBAL_ITEM_TAG_LOGICAL_MINIMUM: board_printf("- Global Logical Minimum"); break; - case HID_GLOBAL_ITEM_TAG_LOGICAL_MAXIMUM: board_printf("- Global Logical Maximum"); break; - case HID_GLOBAL_ITEM_TAG_PHYSICAL_MINIMUM: board_printf("- Global physical Minimum"); break; - case HID_GLOBAL_ITEM_TAG_PHYSICAL_MAXIMUM: board_printf("- Global physical Maximum"); break; - case HID_GLOBAL_ITEM_TAG_UNIT_EXPONENT: board_printf("- Global Unit Exponent"); break; - case HID_GLOBAL_ITEM_TAG_UNIT: board_printf("- Global Unit"); break; - case HID_GLOBAL_ITEM_TAG_REPORT_SIZE: board_printf("- Global Report Size"); break; - case HID_GLOBAL_ITEM_TAG_REPORT_ID: board_printf("- Global Report ID"); break; - case HID_GLOBAL_ITEM_TAG_REPORT_COUNT: board_printf("- Global Report Count"); break; - case HID_GLOBAL_ITEM_TAG_PUSH: board_printf("- Global Push"); break; - case HID_GLOBAL_ITEM_TAG_POP: board_printf("- Global Pop"); break; - default: board_printf("- Global reserved %d",item->tag); break; - } - break; - case HID_ITEM_TYPE_LOCAL: - switch(item->tag) - { - case HID_LOCAL_ITEM_TAG_USAGE: board_printf("-- Local Usage"); break; - case HID_LOCAL_ITEM_TAG_USAGE_MINIMUM: board_printf("-- Local Usage Minimum"); break; - case HID_LOCAL_ITEM_TAG_USAGE_MAXIMUM: board_printf("-- Local Usage Maximum"); break; - case HID_LOCAL_ITEM_TAG_DESIGNATOR_INDEX: board_printf("-- Local Designator Index"); break; - case HID_LOCAL_ITEM_TAG_DESIGNATOR_MINIMUM: board_printf("-- Local Designator Minimum"); break; - case HID_LOCAL_ITEM_TAG_DESIGNATOR_MAXIMUM: board_printf("-- Local Designator Maximum"); break; - case HID_LOCAL_ITEM_TAG_STRING_INDEX: board_printf("-- Local String Index"); break; - case HID_LOCAL_ITEM_TAG_STRING_MINIMUM: board_printf("-- Local String Minimum"); break; - case HID_LOCAL_ITEM_TAG_STRING_MAXIMUM: board_printf("-- Local String Maximum"); break; - case HID_LOCAL_ITEM_TAG_DELIMITER: board_printf("-- Local Delimiter"); break; - default: board_printf("-- Local reserved %d",item->tag); break; - } - break; - default: - board_printf("--- reserved %d",item->type); - break; - } - board_printf(" "); - switch(item->size) - { - case 1: board_printf("%d",item->data.u_8); break; - case 2: board_printf("%d",item->data.u_16); break; - case 4: board_printf("%ld",item->data.u_32); break; - } - board_printf("\r\n"); -} -#endif /* USB_KBD_DEBUG */ - -static int usb_kbd_get_hid_desc(struct usb_device *dev) -{ - unsigned char *buffer = (unsigned char *)driver_mem_alloc(256); - struct usb_descriptor_header *head; - struct usb_config_descriptor *config; - int index, len; -#ifdef USB_KBD_DEBUG - int i; - unsigned char *start, *end; - struct hid_item item; -#endif - if(buffer == NULL) - return -1; - if(usb_get_configuration_no(dev, &buffer[0], 0) == -1) - { - driver_mem_free(buffer); - return -1; - } - head = (struct usb_descriptor_header *)&buffer[0]; - if(head->bDescriptorType!=USB_DT_CONFIG) - { - dbg(" ERROR: NOT USB_CONFIG_DESC %x\r\n",head->bDescriptorType); - driver_mem_free(buffer); - return -1; - } - index = head->bLength; - config = (struct usb_config_descriptor *)&buffer[0]; - len = le16_to_cpu(config->wTotalLength); - /* Ok the first entry must be a configuration entry, now process the others */ - head = (struct usb_descriptor_header *)&buffer[index]; - while(index+1 < len) - { - if(head->bDescriptorType == USB_DT_HID) - { - dbg("HID desc found\r\n"); - memcpy(&usb_kbd_hid_desc, &buffer[index],buffer[index]); - le16_to_cpus(&usb_kbd_hid_desc.bcdHID); - le16_to_cpus(&usb_kbd_hid_desc.wDescriptorLength); -#ifdef USB_KBD_DEBUG - usb_kbd_display_hid(&usb_kbd_hid_desc); -#endif - len = 0; - break; - } - index += head->bLength; - head = (struct usb_descriptor_header *)&buffer[index]; - } - if(len > 0) - { - driver_mem_free(buffer); - return -1; - } -#ifdef USB_KBD_DEBUG - len = usb_kbd_hid_desc.wDescriptorLength; - if((index = usb_get_class_descriptor(dev, 0, USB_DT_REPORT, 0, &buffer[0], len)) < 0) - { - dbg("reading report descriptor failed\r\n"); - driver_mem_free(buffer); - return -1; - } - dbg(" report descriptor (size %u, read %d)\r\n", len, index); - start = &buffer[0]; - end = &buffer[len]; - i = 0; - do - { - index = fetch_item(start, end, &item); - i += index; - i++; - if(index >= 0) - usb_kbd_show_item(&item); - start += index; - start++; - } - while(index >= 0); -#endif /* USB_KBD_DEBUG */ - driver_mem_free(buffer); - return 0; -} - -#endif /* USE_COUNTRYCODE */ - -/* - usb_get_report(dev, 0, 0, 1, &new_packet[0], 8); -*/ - diff --git a/usb/usb_mouse.c b/usb/usb_mouse.c deleted file mode 100644 index d5f9e4b..0000000 --- a/usb/usb_mouse.c +++ /dev/null @@ -1,301 +0,0 @@ -/* - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#include -#include "bas_printf.h" -#include "usb.h" -#include "exceptions.h" -#include "driver_mem.h" - -#define DEBUG_USBMOUSE -#ifdef DEBUG_USBMOUSE -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DEBUG_USBMOUSE */ -#define err(format, arg...) do { xprintf("ERROR: %s(): " format, __FUNCTION__, ##arg); } while (0) - -extern void ltoa(char *buf, long n, unsigned long base); -extern void call_mousevec(unsigned char *data, void (**mousevec)(void *)); -//extern void call_ikbdvec(unsigned char code, _IOREC *iorec, void (**ikbdvec)()); - -static unsigned char *new; -static unsigned char old[8]; -static int mouse_installed; - -/* forward declaration */ -static int usb_mouse_probe(struct usb_device *dev, unsigned int ifnum); - -/* deregistering the mouse */ -int usb_mouse_deregister(struct usb_device *dev) -{ - dev->irq_handle = NULL; - if (new != NULL) - { - driver_mem_free(new); - new = NULL; - } - mouse_installed = 0; - dbg("USB MOUSE deregister\r\n"); - return 1; -} - -/* registering the mouse */ -int usb_mouse_register(struct usb_device *dev) -{ - if (!mouse_installed && (dev->devnum != -1) && (usb_mouse_probe(dev, 0) == 1)) - { - /* Ok, we found a mouse */ - dbg("USB MOUSE found (USB: %d, devnum: %d)\r\n", dev->usbnum, dev->devnum); - mouse_installed = 1; - dev->deregister = usb_mouse_deregister; - return 1; - } - /* no USB Mouse found */ - return -1; -} - -/* search for mouse and register it if found */ -int drv_usb_mouse_init(void) -{ - int i; - int j; - - /* - * check if mouse is already initialized - */ - if (mouse_installed) - { - xprintf("USB mouse already initialized\r\n"); - - return -1; - } - - /* scan all USB Devices */ - for (j = 0; j < USB_MAX_BUS; j++) - { - for (i = 0; i < USB_MAX_DEVICE; i++) - { - struct usb_device *dev = usb_get_dev_index(i, j); /* get device */ - - if (dev == NULL) - { - break; - } - - xprintf("Try to register usb device %d,%d as mouse\r\n", i, j); - if (usb_mouse_register(dev) > 0) - return 1; - } - } - /* no USB Mouse found */ - return -1; -} - -/************************************************************************** - * Low Level drivers - */ -static void usb_kbd_send_code(unsigned char code) -{ - dbg("FIXME: usb_kbd_send_code 0x%x not implemented\r\n", code); -} - -/* Interrupt service routine */ -static int usb_mouse_irq(struct usb_device *dev) -{ -#ifdef CONFIG_USB_INTERRUPT_POLLING - int level; -#endif - int i, change = 0; - if ((dev->irq_status != 0) || (dev->irq_act_len < 3) || (dev->irq_act_len > 8)) - { - dbg("USB MOUSE error %lX, len %d\r\n", dev->irq_status, dev->irq_act_len); - return 1; - } - for (i = 0; i < dev->irq_act_len; i++) - { - if (new[i] != old[i]) - { - change = 1; - break; - } - } - if (change) - { - char wheel = 0, buttons, old_buttons; - dbg("USB MOUSE len:%d %02X %02X %02X %02X %02X %02X\r\n", dev->irq_act_len, new[0], new[1], new[2], new[3], new[4], new[5]); -#ifdef CONFIG_USB_INTERRUPT_POLLING - level = set_ipl(7); /* mask interrupts */ -#endif - if ((dev->irq_act_len >= 6) && (new[0] == 1)) /* report-ID */ - { - buttons = new[1]; - old_buttons = old[1]; - new[0] = ((new[1] & 1) << 1) + ((new[1] & 2) >> 1) + 0xF8; - new[1] = new[2]; - new[2] = new[3]; - wheel = new[4]; - } - else /* boot report */ - { - buttons = new[0]; - old_buttons = old[0]; - new[0] = ((new[0] & 1) << 1) + ((new[0] & 2) >> 1) + 0xF8; - if (dev->irq_act_len >= 3) - wheel = new[3]; - } - if ((buttons ^ old_buttons) & 4) /* 3rd button */ - { - if (buttons & 4) - { - usb_kbd_send_code(0x72); /* ENTER */ - usb_kbd_send_code(0xF2); - } - } - if (wheel != 0) /* actually like Eiffel */ - { -#define REPEAT_WHEEL 3 - int i; - if (wheel > 0) - { - for (i = 0; i < REPEAT_WHEEL; i++) - { - usb_kbd_send_code(0x48); /* UP */ - usb_kbd_send_code(0xC8); - } - } - else - { - for (i = 0; i < REPEAT_WHEEL; i++) - { - usb_kbd_send_code(0x50); /* DOWN */ - usb_kbd_send_code(0xD0); - } - } - } - xprintf("FIXME: call_mousevec(new, mousevec) not implemented\r\n"); - //if(mousevec != NULL) - //call_mousevec(new, mousevec); -#ifdef CONFIG_USB_INTERRUPT_POLLING - set_ipl(level); -#endif - old[0] = new[0]; - old[1] = new[1]; - old[2] = new[2]; - old[3] = new[3]; - old[4] = new[4]; - old[5] = new[5]; - } - return 1; /* install IRQ Handler again */ -} - -/* probes the USB device dev for mouse type */ -static int usb_mouse_probe(struct usb_device *dev, unsigned int ifnum) -{ - struct usb_interface_descriptor *iface; - struct usb_endpoint_descriptor *ep; - int pipe; - int maxp; - -#ifdef _NOT_USED_ - if (dev->descriptor.bNumConfigurations != 1) - { - dbg("dev->descriptor.bNumConfigurations != 1\r\n"); - - return 0; - } -#endif - - iface = &dev->config.if_desc[ifnum]; - - if (iface->bInterfaceClass != USB_CLASS_HID) - { - dbg("iface->bInterfaceClass != USB_CLASS_HID (%d instead)\r\n", iface->bInterfaceClass); - - return 0; - } - - - if (iface->bInterfaceSubClass != USB_SUB_HID_BOOT) - { - dbg("iface->bInterfaceSubClass != USB_SUB_HID_BOOT (%d instead)\r\n", iface->bInterfaceSubClass); - - return 0; - } - - if (iface->bInterfaceProtocol != USB_PROT_HID_MOUSE) - { - dbg("iface->bInterfaceProtocol != USB_PROT_HID_MOUSE (%d)\r\n", iface->bInterfaceProtocol); - - return 0; - } - - if (iface->bNumEndpoints != 1) - { - dbg("iface->bNumEndpoints != 1\r\n"); - - return 0; - } - - ep = &iface->ep_desc[0]; - - if (!(ep->bEndpointAddress & 0x80)) - { - dbg("! ep->bEndpointAddress & 0x80\r\n"); - - return 0; - } - - if ((ep->bmAttributes & 3) != 3) - { - dbg("ep->bmAttributes & 3 != 3\r\n"); - - return 0; - } - - new = (unsigned char *) driver_mem_alloc(8); - if (new == NULL) - { - dbg("new == NULL\r\n"); - - return 0; - } - - dbg("USB MOUSE found set protocol...\r\n"); - - /* ok, we found a USB Mouse, install it */ - pipe = usb_rcvintpipe(dev, ep->bEndpointAddress); - maxp = usb_maxpacket(dev, pipe); -// if(maxp < 6) -// usb_set_protocol(dev, iface->bInterfaceNumber, 0); /* boot */ -// else - usb_set_protocol(dev, iface->bInterfaceNumber, 1); /* report */ - dbg("USB MOUSE found set idle...\r\n"); - usb_set_idle(dev, iface->bInterfaceNumber, 0, 0); /* report infinite */ - memset(&new[0], 0, 8); - memset(&old[0], 0, 8); - dev->irq_handle = usb_mouse_irq; - dbg("USB MOUSE enable interrupt pipe (maxp: %d)...\r\n", maxp); - usb_submit_int_msg(dev, pipe, &new[0], maxp > 8 ? 8 : maxp, ep->bInterval); - return 1; -} - diff --git a/util/bas_printf.c b/util/bas_printf.c deleted file mode 100644 index bfe67ac..0000000 --- a/util/bas_printf.c +++ /dev/null @@ -1,456 +0,0 @@ -/* - * tc.printf.c: A public-domain, minimal printf/sprintf routine that prints - * through the putchar() routine. Feel free to use for - * anything... -- 7/17/87 Paul Placeway - */ -/*- - * Copyright (c) 1980, 1991 The Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -#include "MCF5475.h" -#include "bas_printf.h" -#include "bas_string.h" - -/* - * Lexical definitions. - * - * All lexical space is allocated dynamically. - * The eighth/sixteenth bit of characters is used to prevent recognition, - * and eventually stripped. - */ -#define META 0200 -#define ASCII 0177 -#define QUOTE ((char) 0200) /* Eighth char bit used for 'ing */ -#define TRIM 0177 /* Mask to strip quote bit */ -#define UNDER 0000000 /* No extra bits to do both */ -#define BOLD 0000000 /* Bold flag */ -#define STANDOUT META /* Standout flag */ -#define LITERAL 0000000 /* Literal character flag */ -#define ATTRIBUTES 0200 /* The bits used for attributes */ -#define CHAR 0000177 /* Mask to mask out the character */ - -#define INF 32766 /* should be bigger than any field to print */ - -static char snil[] = "(nil)"; - -void xputchar(int c) -{ - __asm__ __volatile__ - ( - ".extern printf_helper\n\t" - "move.b %0,d0\n\t" - "bsr printf_helper\n\t" - /* output */: - /* input */: "r" (c) - /* clobber */: "d0","d2","a0","memory" - ); -} - -static void doprnt(void (*addchar)(int), const char *sfmt, va_list ap) -{ - char buf[128]; - char *bp; - const char *f; - float flt; - long l; - unsigned long u; - int i; - int fmt; - unsigned char pad = ' '; - int flush_left = 0; - int f_width = 0; - int prec = INF; - int hash = 0; - int do_long = 0; - int sign = 0; - int attributes = 0; - - f = sfmt; - for (; *f; f++) - { - if (*f != '%') - { - /* then just out the char */ - (*addchar)((int) (((unsigned char) *f) | attributes)); - } - else - { - f++; /* skip the % */ - - if (*f == '-') - { /* minus: flush left */ - flush_left = 1; - f++; - } - - if (*f == '0' || *f == '.') - { - /* padding with 0 rather than blank */ - pad = '0'; - f++; - } - if (*f == '*') - { - /* field width */ - f_width = va_arg(ap, int); - f++; - } - else if (isdigit((unsigned char)*f)) - { - f_width = atoi(f); - while (isdigit((unsigned char)*f)) - f++; /* skip the digits */ - } - - if (*f == '.') - { /* precision */ - f++; - if (*f == '*') - { - prec = va_arg(ap, int); - f++; - } - else if (isdigit((unsigned char)*f)) - { - prec = atoi(f); - while (isdigit((unsigned char)*f)) - f++; /* skip the digits */ - } - } - - if (*f == '#') - { /* alternate form */ - hash = 1; - f++; - } - - if (*f == 'l') - { /* long format */ - do_long++; - f++; - if (*f == 'l') - { - do_long++; - f++; - } - } - - fmt = (unsigned char) *f; - if (fmt != 'S' && fmt != 'Q' && isupper(fmt)) - { - do_long = 1; - fmt = tolower(fmt); - } - bp = buf; - switch (fmt) - { /* do the format */ - case 'd': - switch (do_long) - { - case 0: - l = (long) (va_arg(ap, int)); - break; - case 1: - default: - l = va_arg(ap, long); - break; - } - - if (l < 0) - { - sign = 1; - l = -l; - } - do - { - *bp++ = (char) (l % 10) + '0'; - } while ((l /= 10) > 0); - if (sign) - *bp++ = '-'; - f_width = f_width - (int) (bp - buf); - if (!flush_left) - while (f_width-- > 0) - (*addchar)((int) (pad | attributes)); - for (bp--; bp >= buf; bp--) - (*addchar)((int) (((unsigned char) *bp) | attributes)); - if (flush_left) - while (f_width-- > 0) - (*addchar)((int) (' ' | attributes)); - break; - - case 'f': - /* this is actually more than stupid, but does work for now */ - flt = (float) (va_arg(ap, double)); /* beware: va_arg() extends float to double! */ - if (flt < 0) - { - sign = 1; - flt = -flt; - } - { - int quotient, remainder; - - quotient = (int) flt; - remainder = (flt - quotient) * 10E5; - - for (i = 0; i < 6; i++) - { - *bp++ = (char) (remainder % 10) + '0'; - remainder /= 10; - } - *bp++ = '.'; - do - { - *bp++ = (char) (quotient % 10) + '0'; - } while ((quotient /= 10) > 0); - if (sign) - *bp++ = '-'; - f_width = f_width - (int) (bp - buf); - if (!flush_left) - while (f_width-- > 0) - (*addchar)((int) (pad | attributes)); - for (bp--; bp >= buf; bp--) - (*addchar)((int) (((unsigned char) *bp) | attributes)); - if (flush_left) - while (f_width-- > 0) - (*addchar)((int) (' ' | attributes)); - } - break; - - case 'p': - do_long = 1; - hash = 1; - fmt = 'x'; - /* no break */ - case 'o': - case 'x': - case 'u': - switch (do_long) - { - case 0: - u = (unsigned long) (va_arg(ap, unsigned int)); - break; - case 1: - default: - u = va_arg(ap, unsigned long); - break; - } - if (fmt == 'u') - { /* unsigned decimal */ - do - { - *bp++ = (char) (u % 10) + '0'; - } while ((u /= 10) > 0); - } - else if (fmt == 'o') - { /* octal */ - do - { - *bp++ = (char) (u % 8) + '0'; - } while ((u /= 8) > 0); - if (hash) - *bp++ = '0'; - } - else if (fmt == 'x') - { /* hex */ - do - { - i = (int) (u % 16); - if (i < 10) - *bp++ = i + '0'; - else - *bp++ = i - 10 + 'a'; - } while ((u /= 16) > 0); - if (hash) - { - *bp++ = 'x'; - *bp++ = '0'; - } - } - i = f_width - (int) (bp - buf); - if (!flush_left) - while (i-- > 0) - (*addchar)((int) (pad | attributes)); - for (bp--; bp >= buf; bp--) - (*addchar)((int) (((unsigned char) *bp) | attributes)); - if (flush_left) - while (i-- > 0) - (*addchar)((int) (' ' | attributes)); - break; - - case 'c': - i = va_arg(ap, int); - (*addchar)((int) (i | attributes)); - break; - - case 'S': - case 'Q': - case 's': - case 'q': - bp = va_arg(ap, char *); - if (!bp) - bp = snil; - f_width = f_width - strlen((char *) bp); - if (!flush_left) - while (f_width-- > 0) - (*addchar)((int) (pad | attributes)); - for (i = 0; *bp && i < prec; i++) - { - if (fmt == 'q' && (*bp & QUOTE)) - (*addchar)((int) ('\\' | attributes)); - (*addchar)( - (int) (((unsigned char) *bp & TRIM) | attributes)); - bp++; - } - if (flush_left) - while (f_width-- > 0) - (*addchar)((int) (' ' | attributes)); - break; - - case 'a': - attributes = va_arg(ap, int); - break; - - case '%': - (*addchar)((int) ('%' | attributes)); - break; - - default: - break; - } - flush_left = 0, f_width = 0, prec = INF, hash = 0, do_long = 0; - sign = 0; - pad = ' '; - } - } -} - -static char *xstring, *xestring; - -void xaddchar(int c) -{ - if (xestring == xstring) - *xstring = '\0'; - else - *xstring++ = (char) c; -} - -int sprintf(char *str, const char *format, ...) -{ - va_list va; - va_start(va, format); - - xstring = str; - - doprnt(xaddchar, format, va); - va_end(va); - *xstring++ = '\0'; - - return 0; -} - -void xsnprintf(char *str, size_t size, const char *fmt, ...) -{ - va_list va; - va_start(va, fmt); - - xstring = str; - xestring = str + size - 1; - doprnt(xaddchar, fmt, va); - va_end(va); - *xstring++ = '\0'; -} - -void xprintf(const char *fmt, ...) -{ - va_list va; - va_start(va, fmt); - doprnt(xputchar, fmt, va); - va_end(va); -} - -void xvprintf(const char *fmt, va_list va) -{ - doprnt(xputchar, fmt, va); -} - -void xvsnprintf(char *str, size_t size, const char *fmt, va_list va) -{ - xstring = str; - xestring = str + size - 1; - doprnt(xaddchar, fmt, va); - *xstring++ = '\0'; -} - - -void display_progress() -{ - static int _progress_index; - char progress_char[] = "|/-\\"; - - xputchar(progress_char[_progress_index++ % strlen(progress_char)]); - xputchar('\r'); -} - -void hexdump(uint8_t buffer[], int size) -{ - int i; - int line = 0; - uint8_t *bp = buffer; - - while (bp < buffer + size) { - uint8_t *lbp = bp; - - xprintf("%08x ", line); - - for (i = 0; i < 16; i++) { - if (bp + i > buffer + size) { - break; - } - xprintf("%02x ", (uint8_t) *lbp++); - } - - lbp = bp; - for (i = 0; i < 16; i++) { - int8_t c = *lbp++; - - if (bp + i > buffer + size) { - break; - } - if (c > ' ' && c < '~') { - xprintf("%c", c); - } else { - xprintf("."); - } - } - xprintf("\r\n"); - - bp += 16; - line += 16; - } -} diff --git a/util/bas_string.c b/util/bas_string.c deleted file mode 100644 index 3960638..0000000 --- a/util/bas_string.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * bas_string.c - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */ - -#include "bas_types.h" -#include -#include "bas_string.h" - -void *memcpy(void *dst, const void *src, size_t n) -{ - uint8_t *to = dst; - - while (to < (uint8_t *) dst + n) - *to++ = * (uint8_t *) src++; - - return dst; -} - -void bzero(void *s, size_t n) -{ - size_t i; - - for (i = 0; i < n; i++) - ((unsigned char *) s)[i] = '\0'; -} - -void *memset(void *s, int c, size_t n) -{ - uint8_t *dst = s; - - do - { - *dst++ = c; - } while ((dst - (uint8_t *) s) < n); - - return s; -} - - -int memcmp(const void *s1, const void *s2, size_t max) -{ - int i; - int cmp; - - for (i = 0; i < max; i++) - { - cmp = (* (const char *) s1 - * (const char *) s2); - if (cmp != 0) return cmp; - } - return cmp; -} - -int strcmp(const char *s1, const char *s2) -{ - int i; - int cmp; - - for (i = 0; *s1++ && *s2++; i++) - { - cmp = (*s1 - *s2); - if (cmp != 0) return cmp; - } - return cmp; -} - -int strncmp(const char *s1, const char *s2, size_t max) -{ - int i; - int cmp; - - for (i = 0; i < max && *s1++ && *s2++; i++); - { - cmp = (*s1 - *s2); - if (cmp != 0) return cmp; - } - return cmp; -} - -char *strcpy(char *dst, const char *src) -{ - char *ptr = dst; - - while ((*dst++ = *src++) != '\0'); - return ptr; -} - -char *strncpy(char *dst, const char *src, size_t max) -{ - char *ptr = dst; - - while ((*dst++ = *src++) != '\0' && max-- >= 0); - return ptr; -} - -int atoi(const char *c) -{ - int value = 0; - while (isdigit(*c)) - { - value *= 10; - value += (int) (*c - '0'); - c++; - } - return value; -} - -size_t strlen(const char *s) -{ - const char *start = s; - - while (*s++); - - return s - start - 1; -} - - -char *strcat(char *dst, const char *src) -{ - char *ret = dst; - dst = &dst[strlen(dst)]; - while ((*dst++ = *src++) != '\0'); - return ret; -} - -char *strncat(char *dst, const char *src, size_t max) -{ - size_t i; - char *ret = dst; - - dst = &dst[strlen(dst)]; - for (i = 0; i < max && *src; i++) - { - *dst++ = *src++; - } - *dst++ = '\0'; - - return ret; -} diff --git a/util/printf_helper.S b/util/printf_helper.S deleted file mode 100644 index 7d8eec1..0000000 --- a/util/printf_helper.S +++ /dev/null @@ -1,38 +0,0 @@ -/* - * printf_helper.S - * - * assembler trampoline to let printf (compiled -mpcrel) indirectly reference __MBAR - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - */ - - - .global printf_helper -printf_helper: - .extern __MBAR -.wait_txready: - move.w __MBAR+0x8604,d2 // PSCSCR0 status register - btst #10,d2 // space left in TX fifo? - beq.s .wait_txready // no, loop - lea __MBAR+0x860C,a0 // PSCSTB0 transmitter buffer register - move.b d0,(a0) // send byte - rts - -// vim: set syntax=asm68k : diff --git a/util/wait.c b/util/wait.c deleted file mode 100644 index 621aa2f..0000000 --- a/util/wait.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * wait.c - * - * Created on: 10.12.2012 - * Author: mfro - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Copyright 2010 - 2012 F. Aschwanden - * Copyright 2011 - 2012 V. Riviere - * Copyright 2012 M. Froeschle - * - */ - -#include -#include -#include - -uint32_t get_timer(void) -{ - return MCF_SLT_SCNT(0); -} -/* - * wait for the specified number of us on slice timer 0. Replaces the original routines that had - * the number of useconds to wait for hardcoded in their name. - */ -void wait(uint32_t us) -{ - int32_t target = MCF_SLT_SCNT(0) - (us * (SYSCLK / 1000)); - - while (MCF_SLT_SCNT(0) - target > 0); -} -void wait_us() __attribute__ ((weak, alias("wait"))); - -/* - * same as above, but with milliseconds wait time - */ -void wait_ms(uint32_t ms) -{ - wait(ms * 1000); -} -/* - * the same as above, with a checker function which gets called while - * busy waiting and allows for an early return if it returns true - */ -bool waitfor(uint32_t us, checker_func condition) -{ - int32_t target = MCF_SLT_SCNT(0) - (us * (SYSCLK / 1000)); - bool res; - - do - { - if ((res = (*condition)())) - return res; - } while (MCF_SLT_SCNT(0) - target > 0); - return false; -} diff --git a/video/fbmem.c b/video/fbmem.c deleted file mode 100644 index d0787c1..0000000 --- a/video/fbmem.c +++ /dev/null @@ -1,185 +0,0 @@ -/* - * fbmem.c - * - * Copyright (C) 1994 Martin Schaller - * - * 2001 - Documented with DocBook - * - Brad Douglas - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -#include "bas_types.h" -#include "bas_printf.h" -#include "bas_string.h" -#include "fb.h" -#include "radeonfb.h" -#include "driver_mem.h" - -#define DBG_FBMEM -#ifdef DBG_FBMEM -#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_FBMEM */ - -long mem_cmp(char *p1, char *p2, long size) -{ - while(size--) - { - if (*p1++ != *p2++) - return(1); - } - return(0); -} - -/* - * Frame buffer device initialization and setup routines - */ - -#define FBPIXMAPSIZE (1024 * 8) - -int fb_pan_display(struct fb_info *info, struct fb_var_screeninfo *var) -{ - int xoffset = var->xoffset; - int yoffset = var->yoffset; - int err; - // DPRINT("fb_pan_display\r\n"); - if ((xoffset < 0) || (yoffset < 0) - || ((xoffset + info->var.xres) > info->var.xres_virtual)) - return -1; //-EINVAL; - if ((err = info->fbops->fb_pan_display(var, info))) - return err; - info->var.xoffset = var->xoffset; - info->var.yoffset = var->yoffset; - if (var->vmode & FB_VMODE_YWRAP) - info->var.vmode |= FB_VMODE_YWRAP; - else - info->var.vmode &= ~FB_VMODE_YWRAP; - return 0; -} - -int fb_set_var(struct fb_info *info, struct fb_var_screeninfo *var) -{ - int err; - // DPRINT("fb_set_var\r\n"); - if (var->activate & FB_ACTIVATE_INV_MODE) - /* return 1 if equal */ - return(!mem_cmp((char *)&info->var, (char *)var, sizeof(struct fb_var_screeninfo))); - if ((var->activate & FB_ACTIVATE_FORCE) - || mem_cmp((char *)&info->var, (char *)var, sizeof(struct fb_var_screeninfo))) - { - if ((err = info->fbops->fb_check_var(var, info))) - return err; - if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) - { - memcpy(&info->var, var, sizeof(struct fb_var_screeninfo)); - info->fbops->fb_set_par(info); - fb_pan_display(info, &info->var); - } - } - return 0; -} - -int fb_blank(struct fb_info *info, int blank) -{ - dbg("fb_blank\r\n"); - if (blank > FB_BLANK_POWERDOWN) - blank = FB_BLANK_POWERDOWN; - return(info->fbops->fb_blank(blank, info)); -} - -int fb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) -{ - struct fb_var_screeninfo var; - struct fb_fix_screeninfo fix; - void *argp = (void *) arg; - int i; - - switch(cmd) - { - case FBIOGET_VSCREENINFO: - memcpy(argp, &info->var, sizeof(var)); - return 0; - case FBIOPUT_VSCREENINFO: - memcpy(&var, argp, sizeof(var)); - i = fb_set_var(info, &var); - if (i) - return i; - memcpy(argp, &var, sizeof(var)); - return 0; - case FBIOGET_FSCREENINFO: - memcpy(argp, &info->fix, sizeof(fix)); - return 0; - case FBIOPAN_DISPLAY: - memcpy(&var, argp, sizeof(var)); - i = fb_pan_display(info, &var); - if (i) - return i; - memcpy(argp, &var, sizeof(var)); - return 0; - case FBIOBLANK: - i = fb_blank(info, arg); - return i; - case FBIO_ALLOC: - return(offscreen_alloc(info,(long)arg)); - case FBIO_FREE: - return(offscreen_free(info,(long)arg)); - default: - return(info->fbops->fb_ioctl(cmd, arg, info)); - } -} - - -/** - * framebuffer_alloc - creates a new frame buffer info structure - * - * @size: size of driver private data, can be zero - * @dev: pointer to the device for this fb, this can be NULL - * - * Creates a new frame buffer info structure. Also reserves @size bytes - * for driver private data (info->par). info->par (if any) will be - * aligned to sizeof(long). - * - * Returns the new structure, or NULL if an error occured. - * - */ -struct fb_info *framebuffer_alloc(unsigned long size) -{ - struct fb_info *info = driver_mem_alloc(sizeof(struct fb_info)); - - if (info == NULL) - { - dbg("%s: could not allocate fb_info structure\r\n", __FUNCTION__); - return 0; - } - memset(info, 0, sizeof(struct fb_info)); - - if (size) - { - char *p = driver_mem_alloc(size); - - if (!p) - return NULL; - memset(p, 0, size); - info->par = p; - } - return info; -} - -/** - * framebuffer_release - marks the structure available for freeing - * - * @info: frame buffer info structure - * - * Drop the reference count of the class_device embedded in the - * framebuffer info structure. - * - */ -void framebuffer_release(struct fb_info *info) -{ - driver_mem_free(info->par); -} - diff --git a/video/fbmodedb.c b/video/fbmodedb.c deleted file mode 100644 index 5490273..0000000 --- a/video/fbmodedb.c +++ /dev/null @@ -1,596 +0,0 @@ -/* - * fb_modedb.c -- Standard video mode database management - * - * Copyright (C) 1999 Geert Uytterhoeven - * - * 2001 - Documented with DocBook - * - Brad Douglas - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#include "fb.h" -#include "bas_types.h" -#include "bas_printf.h" -#include "bas_string.h" - -#define DBG_MODES -#ifdef DBG_MODES -#define dbg(format, arg...) do { xprintf("DEBUG: " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_MODES */ - -#define name_matches(v, s, l) \ - ((v).name && !strncmp((s), (v).name, (l)) && strlen((v).name) == (l)) -#define res_matches(v, x, y) \ - ((v).xres == (x) && (v).yres == (y)) - - /* - * Standard video mode definitions (taken from XFree86) - */ - -#define DEFAULT_MODEDB_INDEX 0 - -const struct fb_videomode modedb[] = -{ - { - /* 640x400 @ 70 Hz, 31.5 kHz hsync */ - 70, 640, 400, 39721, 40, 24, 39, 9, 96, 2, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 640x480 @ 60 Hz, 31.5 kHz hsync */ - 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 800x600 @ 56 Hz, 35.15 kHz hsync */ - 56, 800, 600, 27777, 128, 24, 22, 1, 72, 2, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1024x768 @ 87 Hz interlaced, 35.5 kHz hsync */ - 87, 1024, 768, 22271, 56, 24, 33, 8, 160, 8, - 0, FB_VMODE_INTERLACED - }, - { - /* 640x400 @ 85 Hz, 37.86 kHz hsync */ - 85, 640, 400, 31746, 96, 32, 41, 1, 64, 3, - FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, - { - /* 640x480 @ 72 Hz, 36.5 kHz hsync */ - 72, 640, 480, 31746, 144, 40, 30, 8, 40, 3, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 640x480 @ 75 Hz, 37.50 kHz hsync */ - 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 800x600 @ 60 Hz, 37.8 kHz hsync */ - 60, 800, 600, 25000, 88, 40, 23, 1, 128, 4, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, - { - /* 640x480 @ 85 Hz, 43.27 kHz hsync */ - 85, 640, 480, 27777, 80, 56, 25, 1, 56, 3, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1152x864 @ 89 Hz interlaced, 44 kHz hsync */ - 69, 1152, 864, 15384, 96, 16, 110, 1, 216, 10, - 0, FB_VMODE_INTERLACED - }, - { - /* 800x600 @ 72 Hz, 48.0 kHz hsync */ - 72, 800, 600, 20000, 64, 56, 23, 37, 120, 6, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, - { - /* 1024x768 @ 60 Hz, 48.4 kHz hsync */ - 60, 1024, 768, 15384, 168, 8, 29, 3, 144, 6, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 640x480 @ 100 Hz, 53.01 kHz hsync */ - 100, 640, 480, 21834, 96, 32, 36, 8, 96, 6, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1152x864 @ 60 Hz, 53.5 kHz hsync */ - 60, 1152, 864, 11123, 208, 64, 16, 4, 256, 8, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 800x600 @ 85 Hz, 55.84 kHz hsync */ - 85, 800, 600, 16460, 160, 64, 36, 16, 64, 5, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1024x768 @ 70 Hz, 56.5 kHz hsync */ - 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */ - 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12, - 0, FB_VMODE_INTERLACED - }, - { - /* 800x600 @ 100 Hz, 64.02 kHz hsync */ - 100, 800, 600, 14357, 160, 64, 30, 4, 64, 6, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1024x768 @ 76 Hz, 62.5 kHz hsync */ - 76, 1024, 768, 11764, 208, 8, 36, 16, 120, 3, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1152x864 @ 70 Hz, 62.4 kHz hsync */ - 70, 1152, 864, 10869, 106, 56, 20, 1, 160, 10, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1280x1024 @ 61 Hz, 64.2 kHz hsync */ - 61, 1280, 1024, 9090, 200, 48, 26, 1, 184, 3, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1400x1050 @ 60Hz, 63.9 kHz hsync */ - 68, 1400, 1050, 9259, 136, 40, 13, 1, 112, 3, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1400x1050 @ 75,107 Hz, 82,392 kHz +hsync +vsync*/ - 75, 1400, 1050, 9271, 120, 56, 13, 0, 112, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, - { - /* 1400x1050 @ 60 Hz, ? kHz +hsync +vsync*/ - 60, 1400, 1050, 9259, 128, 40, 12, 0, 112, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, - { - /* 1024x768 @ 85 Hz, 70.24 kHz hsync */ - 85, 1024, 768, 10111, 192, 32, 34, 14, 160, 6, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1152x864 @ 78 Hz, 70.8 kHz hsync */ - 78, 1152, 864, 9090, 228, 88, 32, 0, 84, 12, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1280x1024 @ 70 Hz, 74.59 kHz hsync */ - 70, 1280, 1024, 7905, 224, 32, 28, 8, 160, 8, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1600x1200 @ 60Hz, 75.00 kHz hsync */ - 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, - { - /* 1152x864 @ 84 Hz, 76.0 kHz hsync */ - 84, 1152, 864, 7407, 184, 312, 32, 0, 128, 12, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1280x1024 @ 74 Hz, 78.85 kHz hsync */ - 74, 1280, 1024, 7407, 256, 32, 34, 3, 144, 3, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1024x768 @ 100Hz, 80.21 kHz hsync */ - 100, 1024, 768, 8658, 192, 32, 21, 3, 192, 10, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1280x1024 @ 76 Hz, 81.13 kHz hsync */ - 76, 1280, 1024, 7407, 248, 32, 34, 3, 104, 3, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1600x1200 @ 70 Hz, 87.50 kHz hsync */ - 70, 1600, 1200, 5291, 304, 64, 46, 1, 192, 3, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1152x864 @ 100 Hz, 89.62 kHz hsync */ - 100, 1152, 864, 7264, 224, 32, 17, 2, 128, 19, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1280x1024 @ 85 Hz, 91.15 kHz hsync */ - 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, - { - /* 1600x1200 @ 75 Hz, 93.75 kHz hsync */ - 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, - { - /* 1600x1200 @ 85 Hz, 105.77 kHz hsync */ - 85, 1600, 1200, 4545, 272, 16, 37, 4, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, - { - /* 1280x1024 @ 100 Hz, 107.16 kHz hsync */ - 100, 1280, 1024, 5502, 256, 32, 26, 7, 128, 15, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1800x1440 @ 64Hz, 96.15 kHz hsync */ - 64, 1800, 1440, 4347, 304, 96, 46, 1, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, - { - /* 1800x1440 @ 70Hz, 104.52 kHz hsync */ - 70, 1800, 1440, 4000, 304, 96, 46, 1, 192, 3, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, - { - /* 512x384 @ 78 Hz, 31.50 kHz hsync */ - 78, 512, 384, 49603, 48, 16, 16, 1, 64, 3, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 512x384 @ 85 Hz, 34.38 kHz hsync */ - 85, 512, 384, 45454, 48, 16, 16, 1, 64, 3, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 320x200 @ 70 Hz, 31.5 kHz hsync, 8:5 aspect ratio */ - 70, 320, 200, 79440, 16, 16, 20, 4, 48, 1, - 0, FB_VMODE_DOUBLE - }, - { - /* 320x240 @ 60 Hz, 31.5 kHz hsync, 4:3 aspect ratio */ - 60, 320, 240, 79440, 16, 16, 16, 5, 48, 1, - 0, FB_VMODE_DOUBLE - }, - { - /* 320x240 @ 72 Hz, 36.5 kHz hsync */ - 72, 320, 240, 63492, 16, 16, 16, 4, 48, 2, - 0, FB_VMODE_DOUBLE - }, - { - /* 400x300 @ 56 Hz, 35.2 kHz hsync, 4:3 aspect ratio */ - 56, 400, 300, 55555, 64, 16, 10, 1, 32, 1, - 0, FB_VMODE_DOUBLE - }, - { - /* 400x300 @ 60 Hz, 37.8 kHz hsync */ - 60, 400, 300, 50000, 48, 16, 11, 1, 64, 2, - 0, FB_VMODE_DOUBLE - }, - { - /* 400x300 @ 72 Hz, 48.0 kHz hsync */ - 72, 400, 300, 40000, 32, 24, 11, 19, 64, 3, - 0, FB_VMODE_DOUBLE - }, - { - /* 480x300 @ 56 Hz, 35.2 kHz hsync, 8:5 aspect ratio */ - 56, 480, 300, 46176, 80, 16, 10, 1, 40, 1, - 0, FB_VMODE_DOUBLE - }, - { - /* 480x300 @ 60 Hz, 37.8 kHz hsync */ - 60, 480, 300, 41858, 56, 16, 11, 1, 80, 2, - 0, FB_VMODE_DOUBLE - }, - { - /* 480x300 @ 63 Hz, 39.6 kHz hsync */ - 63, 480, 300, 40000, 56, 16, 11, 1, 80, 2, - 0, FB_VMODE_DOUBLE - }, - { - /* 480x300 @ 72 Hz, 48.0 kHz hsync */ - 72, 480, 300, 33386, 40, 24, 11, 19, 80, 3, - 0, FB_VMODE_DOUBLE - }, - { - /* 1920x1200 @ 60 Hz, 74.5 Khz hsync */ - 60, 1920, 1200, 5177, 128, 336, 1, 38, 208, 3, - FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - FB_VMODE_NONINTERLACED - }, - { - /* 1152x768, 60 Hz, PowerBook G4 Titanium I and II */ - 60, 1152, 768, 14047, 158, 26, 29, 3, 136, 6, - FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED - }, - { - /* 1920x1080, 60 Hz, 1080pf */ - 60, 1920, 1080, 6741, 148, 44, 36, 4, 88, 5, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1366x768, 60 Hz, 47.403 kHz hsync, WXGA 16:9 aspect ratio */ - 60, 1366, 768, 13806, 120, 10, 14, 3, 32, 5, - 0, FB_VMODE_NONINTERLACED - }, - { - /* 1280x800, 60 Hz, 47.403 kHz hsync, WXGA 16:10 aspect ratio */ - 60, 1280, 800, 12048, 200, 64, 24, 1, 136, 3, - 0, FB_VMODE_NONINTERLACED - }, -}; - -long total_modedb = sizeof(modedb) / sizeof(*modedb); - -const struct fb_videomode vesa_modes[] = -{ - /* 0 640x350-85 VESA */ - { 85, 640, 350, 31746, 96, 32, 60, 32, 64, 3, FB_SYNC_HOR_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA}, - /* 1 640x400-85 VESA */ - { 85, 640, 400, 31746, 96, 32, 41, 01, 64, 3, FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 2 720x400-85 VESA */ - { 85, 721, 400, 28169, 108, 36, 42, 01, 72, 3, FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 3 640x480-60 VESA */ - { 60, 640, 480, 39682, 48, 16, 33, 10, 96, 2, 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 4 640x480-72 VESA */ - { 72, 640, 480, 31746, 128, 24, 29, 9, 40, 2, 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 5 640x480-75 VESA */ - { 75, 640, 480, 31746, 120, 16, 16, 01, 64, 3, 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 6 640x480-85 VESA */ - { 85, 640, 480, 27777, 80, 56, 25, 01, 56, 3, 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 7 800x600-56 VESA */ - { 56, 800, 600, 27777, 128, 24, 22, 01, 72, 2, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 8 800x600-60 VESA */ - { 60, 800, 600, 25000, 88, 40, 23, 01, 128, 4, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 9 800x600-72 VESA */ - { 72, 800, 600, 20000, 64, 56, 23, 37, 120, 6, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 10 800x600-75 VESA */ - { 75, 800, 600, 20202, 160, 16, 21, 01, 80, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 11 800x600-85 VESA */ - { 85, 800, 600, 17761, 152, 32, 27, 01, 64, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 12 1024x768i-43 VESA */ - { 53, 1024, 768, 22271, 56, 8, 41, 0, 176, 8, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_INTERLACED, FB_MODE_IS_VESA }, - /* 13 1024x768-60 VESA */ - { 60, 1024, 768, 15384, 160, 24, 29, 3, 136, 6, 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 14 1024x768-70 VESA */ - { 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6, 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 15 1024x768-75 VESA */ - { 75, 1024, 768, 12690, 176, 16, 28, 1, 96, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 16 1024x768-85 VESA */ - { 85, 1024, 768, 10582, 208, 48, 36, 1, 96, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 17 1152x864-75 VESA */ - { 75, 1153, 864, 9259, 256, 64, 32, 1, 128, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 18 1280x960-60 VESA */ - { 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 19 1280x960-85 VESA */ - { 85, 1280, 960, 6734, 224, 64, 47, 1, 160, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 20 1280x1024-60 VESA */ - { 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 21 1280x1024-75 VESA */ - { 75, 1280, 1024, 7407, 248, 16, 38, 1, 144, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 22 1280x1024-85 VESA */ - { 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 23 1600x1200-60 VESA */ - { 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 24 1600x1200-65 VESA */ - { 65, 1600, 1200, 5698, 304, 64, 46, 1, 192, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 25 1600x1200-70 VESA */ - { 70, 1600, 1200, 5291, 304, 64, 46, 1, 192, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 26 1600x1200-75 VESA */ - { 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 27 1600x1200-85 VESA */ - { 85, 1600, 1200, 4357, 304, 64, 46, 1, 192, 3, FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 28 1792x1344-60 VESA */ - { 60, 1792, 1344, 4882, 328, 128, 46, 1, 200, 3, FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 29 1792x1344-75 VESA */ - { 75, 1792, 1344, 3831, 352, 96, 69, 1, 216, 3, FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 30 1856x1392-60 VESA */ - { 60, 1856, 1392, 4580, 352, 96, 43, 1, 224, 3, FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 31 1856x1392-75 VESA */ - { 75, 1856, 1392, 3472, 352, 128, 104, 1, 224, 3, FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 32 1920x1440-60 VESA */ - { 60, 1920, 1440, 4273, 344, 128, 56, 1, 200, 3, FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, - /* 33 1920x1440-75 VESA */ - { 60, 1920, 1440, 3367, 352, 144, 56, 1, 224, 3, FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, -}; - -/** - * fb_try_mode - test a video mode - * @var: frame buffer user defined part of display - * @info: frame buffer info structure - * @mode: frame buffer video mode structure - * @bpp: color depth in bits per pixel - * - * Tries a video mode to test it's validity for device @info. - * - * Returns 1 on success. - * - */ - -static int fb_try_mode(struct fb_var_screeninfo *var, struct fb_info *info, - const struct fb_videomode *mode, unsigned int bpp) -{ - int err = 0; - - dbg("Trying mode %d x %d - %d @ %d\r\n", mode->xres, mode->yres, bpp, mode->refresh); - var->xres = mode->xres; - var->yres = mode->yres; - var->xres_virtual = mode->xres; - var->yres_virtual = mode->yres; - var->xoffset = 0; - var->yoffset = 0; - var->bits_per_pixel = bpp; - var->activate |= FB_ACTIVATE_TEST; - var->pixclock = mode->pixclock; - var->left_margin = mode->left_margin; - var->right_margin = mode->right_margin; - var->upper_margin = mode->upper_margin; - var->lower_margin = mode->lower_margin; - var->hsync_len = mode->hsync_len; - var->vsync_len = mode->vsync_len; - var->sync = mode->sync; - var->vmode = mode->vmode; - var->refresh = mode->refresh; - err = info->fbops->fb_check_var(var, info); - - var->activate &= ~FB_ACTIVATE_TEST; - - return err; -} - -/** - * fb_find_mode - finds a valid video mode - * @var: frame buffer user defined part of display - * @info: frame buffer info structure - * @resolution: fVDI structure mode_option - * @db: video mode database - * @dbsize: size of @db - * @default_mode: default video mode to fall back to - * @default_bpp: default color depth in bits per pixel - * - * Finds a suitable video mode, starting with the specified mode - * in @resolution with fallback to @default_mode. If - * @default_mode fails, all modes in the video mode database will - * be tried. - * - * Valid mode specifiers for @resolution: - * - * x[-][@] or - * [-][@] - * - * with , , and decimal numbers and - * a string. - * - * NOTE: The passed struct @var is _not_ cleared! This allows you - * to supply values for e.g. the grayscale and accel_flags fields. - * - * Returns zero for failure, 1 if using specified @resolution, - * 2 if using specified @resolution with an ignored refresh rate, - * 3 if default mode is used, 4 if fall back to any valid mode. - * - */ - -int fb_find_mode(struct fb_var_screeninfo *var, - struct fb_info *info, struct mode_option *resolution , - const struct fb_videomode *db, unsigned int dbsize, - const struct fb_videomode *default_mode, - unsigned int default_bpp) -{ - int i,abs; - int res_specified = 0, bpp_specified = 0, refresh_specified = 0; - unsigned int xres = 0, yres = 0, bpp = default_bpp, refresh = 0; - int yres_specified = 0; - unsigned long best, diff; - - dbg("fb_find_mode\r\n"); - - /* Set up defaults */ - if (!db) - { - dbg("fb_find_mode, use default modedb\r\n"); - if (resolution->used && (resolution->flags & MODE_VESA_FLAG)) - { - db = vesa_modes; - dbsize = sizeof(vesa_modes)/sizeof(*vesa_modes); - } - else - { - db = modedb; - dbsize = sizeof(modedb)/sizeof(*modedb); - } - } - if (!default_mode) - default_mode = &modedb[DEFAULT_MODEDB_INDEX]; - if (!default_bpp) - default_bpp = 8; - - /* Did the user specify a video mode? */ - if (resolution->used) /* fVDI mode */ - { - refresh = (unsigned int)resolution->freq; - if (refresh) - refresh_specified = 1; - bpp = (unsigned int)resolution->bpp; - if (resolution->flags & MODE_EMUL_MONO_FLAG) - bpp = 8; - if (bpp) - bpp_specified = 1; - yres = (unsigned int)resolution->height; - if (yres) - yres_specified = 1; - xres = (unsigned int)resolution->width; - if (xres) - res_specified = 1; - } - dbg("Trying specified video mode %d x %d\r\n", xres, yres); - - diff = refresh; - best = -1; - for (i = 0; i < dbsize; i++) - { - if (res_specified && res_matches(db[i], xres, yres)) - { - if (!fb_try_mode(var, info, &db[i], bpp)) - { - if (!refresh_specified || db[i].refresh == refresh) - return 1; - else - { - abs = db[i].refresh - refresh; - if (abs < 0) - abs = -abs; - if (diff > abs) - { - diff = abs; - best = i; - } - } - } - } - } - - if (best != -1) - { - fb_try_mode(var, info, &db[best], bpp); - return 2; - } - diff = xres + yres; - dbg("Trying best-fit modes\r\n"); - best = -1; - for (i = 0; i < dbsize; i++) - { - if (xres <= db[i].xres && yres <= db[i].yres) - { - dbg("Trying %d x %d\r\n", db[i].xres, db[i].yres); - - if (!fb_try_mode(var, info, &db[i], bpp)) - { - if (diff > (db[i].xres - xres) + (db[i].yres - yres)) - { - diff = (db[i].xres - xres) + (db[i].yres - yres); - best = i; - } - } - } - } - if (best != -1) - { - fb_try_mode(var, info, &db[best], bpp); - return 5; - } - dbg("Trying default video mode\r\n"); - if (!fb_try_mode(var, info, default_mode, default_bpp)) - return 3; - dbg("Trying all modes\r\n"); - for (i = 0; i < dbsize; i++) - { - if (!fb_try_mode(var, info, &db[i], default_bpp)) - return 4; - } - dbg("No valid mode found\r\n"); - return 0; -} diff --git a/video/fbmon.c b/video/fbmon.c deleted file mode 100644 index 8f2b081..0000000 --- a/video/fbmon.c +++ /dev/null @@ -1,1303 +0,0 @@ -/* - * fbmon.c - * - * Copyright (C) 2002 James Simmons - * - * Credits: - * - * The EDID Parser is a conglomeration from the following sources: - * - * 1. SciTech SNAP Graphics Architecture - * Copyright (C) 1991-2002 SciTech Software, Inc. All rights reserved. - * - * 2. XFree86 4.3.0, interpret_edid.c - * Copyright 1998 by Egbert Eich - * - * 3. John Fremlin and - * Ani Joshi - * - * Generalized Timing Formula is derived from: - * - * GTF Spreadsheet by Andy Morrish (1/5/97) - * available at http://www.vesa.org - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - * - */ - -#include "bas_string.h" -#include "fb.h" -#include "edid.h" - -/* - * EDID parser - */ - -#define FBMON_FIX_HEADER 1 -#define FBMON_FIX_INPUT 2 - -#ifdef CONFIG_FB_MODE_HELPERS -struct broken_edid { - unsigned char manufacturer[4]; - unsigned long model; - unsigned long fix; -}; - -static struct broken_edid brokendb[] = { - /* DEC FR-PCXAV-YZ */ - { - .manufacturer = "DEC", - .model = 0x073a, - .fix = FBMON_FIX_HEADER, - }, - /* ViewSonic PF775a */ - { - .manufacturer = "VSC", - .model = 0x5a44, - .fix = FBMON_FIX_INPUT, - }, -}; - -static const unsigned char edid_v1_header[] = { 0x00, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0x00 -}; - -static void copy_string(unsigned char *c, unsigned char *s) -{ - int i; - c = c + 5; - for (i = 0; (i < 13 && *c != 0x0A); i++) - *(s++) = *(c++); - *s = 0; - while (i-- && (*--s == 0x20)) *s = 0; -} - -static int check_edid(unsigned char *edid) -{ - unsigned char *block = edid + ID_MANUFACTURER_NAME, manufacturer[4]; - unsigned char *b; - unsigned long model; - int i, fix = 0, ret = 0; - manufacturer[0] = ((block[0] & 0x7c) >> 2) + '@'; - manufacturer[1] = ((block[0] & 0x03) << 3) + ((block[1] & 0xe0) >> 5) + '@'; - manufacturer[2] = (block[1] & 0x1f) + '@'; - manufacturer[3] = 0; - model = block[2] + (block[3] << 8); - for(i = 0; i < sizeof(brokendb)/sizeof(*brokendb); i++) - { - if(manufacturer[0] == brokendb[i].manufacturer[0] - && manufacturer[1] == brokendb[i].manufacturer[1] - && manufacturer[2] == brokendb[i].manufacturer[2] - && manufacturer[3] == brokendb[i].manufacturer[3] - && brokendb[i].model == model) - { - fix = brokendb[i].fix; - break; - } - } - switch(fix) - { - case FBMON_FIX_HEADER: - for(i = 0; i < 8; i++) - { - if(edid[i] != edid_v1_header[i]) - ret = fix; - } - break; - case FBMON_FIX_INPUT: - b = edid + EDID_STRUCT_DISPLAY; - /* Only if display is GTF capable will - the input type be reset to analog */ - if(b[4] & 0x01 && b[0] & 0x80) - ret = fix; - break; - } - return ret; -} - -static void fix_edid(unsigned char *edid, int fix) -{ - unsigned char *b; - switch(fix) - { - case FBMON_FIX_HEADER: - memcpy(edid, edid_v1_header, 8); - break; - case FBMON_FIX_INPUT: - b = edid + EDID_STRUCT_DISPLAY; - b[0] &= ~0x80; - edid[127] += 0x80; - break; - } -} - -static int edid_checksum(unsigned char *edid) -{ - unsigned char i, csum = 0, all_null = 0; - int err = 0, fix = check_edid(edid); - if(fix) - fix_edid(edid, fix); - for(i = 0; i < EDID_LENGTH; i++) - { - csum += edid[i]; - all_null |= edid[i]; - } - if((csum == 0x00) && all_null) - /* checksum passed, everything's good */ - err = 1; - if(!err) - DPRINT("edid bad checksum\r\n"); - return err; -} - -static int edid_check_header(unsigned char *edid) -{ - int i, err = 1, fix = check_edid(edid); - if(fix) - fix_edid(edid, fix); - for(i = 0; i < 8; i++) - { - if(edid[i] != edid_v1_header[i]) - err = 0; - } - if(!err) - DPRINT("edid bad header\r\n"); - return err; -} - -static void parse_vendor_block(unsigned char *block, struct fb_monspecs *specs) -{ - specs->manufacturer[0] = ((block[0] & 0x7c) >> 2) + '@'; - specs->manufacturer[1] = ((block[0] & 0x03) << 3) + ((block[1] & 0xe0) >> 5) + '@'; - specs->manufacturer[2] = (block[1] & 0x1f) + '@'; - specs->manufacturer[3] = 0; - specs->model = block[2] + (block[3] << 8); - specs->serial = block[4] + (block[5] << 8) + (block[6] << 16) + (block[7] << 24); - specs->year = block[9] + 1990; - specs->week = block[8]; - DPRINT(" Manufacturer: "); - DPRINT((void *)specs->manufacturer); - DPRINTVAL("\r\n Model: ",specs->model); - DPRINTVAL("\r\n Serial#: ",specs->serial); - DPRINTVAL("\r\n Year: ",specs->year); - DPRINTVAL(" Week ",specs->week); - DPRINT("\r\n"); -} - -static void get_dpms_capabilities(unsigned char flags, struct fb_monspecs *specs) -{ - specs->dpms = 0; - if(flags & DPMS_ACTIVE_OFF) - specs->dpms |= FB_DPMS_ACTIVE_OFF; - if(flags & DPMS_SUSPEND) - specs->dpms |= FB_DPMS_SUSPEND; - if(flags & DPMS_STANDBY) - specs->dpms |= FB_DPMS_STANDBY; - DPRINT(" DPMS: Active "); - DPRINT((flags & DPMS_ACTIVE_OFF) ? "yes" : "no"); - DPRINT(", Suspend "); - DPRINT((flags & DPMS_SUSPEND) ? "yes" : "no"); - DPRINT(", Standby "); - DPRINT((flags & DPMS_STANDBY) ? "yes\r\n" : "no\r\n"); -} - -static void get_chroma(unsigned char *block, struct fb_monspecs *specs) -{ - int tmp; - DPRINT(" Chroma\r\n"); - /* Chromaticity data */ - tmp = ((block[5] & (3 << 6)) >> 6) | (block[0x7] << 2); - tmp *= 1000; - tmp += 512; - specs->chroma.redx = tmp/1024; - DPRINTVAL(" RedX: ",specs->chroma.redx/10); - tmp = ((block[5] & (3 << 4)) >> 4) | (block[0x8] << 2); - tmp *= 1000; - tmp += 512; - specs->chroma.redy = tmp/1024; - DPRINTVAL("% RedY: ",specs->chroma.redy/10); - tmp = ((block[5] & (3 << 2)) >> 2) | (block[0x9] << 2); - tmp *= 1000; - tmp += 512; - specs->chroma.greenx = tmp/1024; - DPRINTVAL("%\r\n GreenX: ",specs->chroma.greenx/10); - tmp = (block[5] & 3) | (block[0xa] << 2); - tmp *= 1000; - tmp += 512; - specs->chroma.greeny = tmp/1024; - DPRINTVAL("% GreenY: ",specs->chroma.greeny/10); - tmp = ((block[6] & (3 << 6)) >> 6) | (block[0xb] << 2); - tmp *= 1000; - tmp += 512; - specs->chroma.bluex = tmp/1024; - DPRINTVAL("%\r\n BlueX: ",specs->chroma.bluex/10); - tmp = ((block[6] & (3 << 4)) >> 4) | (block[0xc] << 2); - tmp *= 1000; - tmp += 512; - specs->chroma.bluey = tmp/1024; - DPRINTVAL("% BlueY: ",specs->chroma.bluey/10); - tmp = ((block[6] & (3 << 2)) >> 2) | (block[0xd] << 2); - tmp *= 1000; - tmp += 512; - specs->chroma.whitex = tmp/1024; - DPRINTVAL("%\r\n WhiteX: ",specs->chroma.whitex/10); - tmp = (block[6] & 3) | (block[0xe] << 2); - tmp *= 1000; - tmp += 512; - specs->chroma.whitey = tmp/1024; - DPRINTVAL("% WhiteY: ",specs->chroma.whitey/10); - DPRINT("%\r\n"); -} - -static int edid_is_serial_block(unsigned char *block) -{ - if((block[0] == 0x00) && (block[1] == 0x00) - && (block[2] == 0x00) && (block[3] == 0xff) && (block[4] == 0x00)) - return 1; - else - return 0; -} - -static int edid_is_ascii_block(unsigned char *block) -{ - if((block[0] == 0x00) && (block[1] == 0x00) - && (block[2] == 0x00) && (block[3] == 0xfe) && (block[4] == 0x00)) - return 1; - else - return 0; -} - -static int edid_is_limits_block(unsigned char *block) -{ - if((block[0] == 0x00) && (block[1] == 0x00) - && (block[2] == 0x00) && (block[3] == 0xfd) && (block[4] == 0x00)) - return 1; - else - return 0; -} - -static int edid_is_monitor_block(unsigned char *block) -{ - if((block[0] == 0x00) && (block[1] == 0x00) - && (block[2] == 0x00) && (block[3] == 0xfc) && (block[4] == 0x00)) - return 1; - else - return 0; -} - -static void calc_mode_timings(int xres, int yres, int refresh, struct fb_videomode *mode) -{ - struct fb_var_screeninfo var; - struct fb_info info; - var.xres = xres; - var.yres = yres; - fb_get_mode(FB_VSYNCTIMINGS | FB_IGNOREMON, refresh, &var, &info); - mode->xres = xres; - mode->yres = yres; - mode->pixclock = var.pixclock; - mode->refresh = refresh; - mode->left_margin = var.left_margin; - mode->right_margin = var.right_margin; - mode->upper_margin = var.upper_margin; - mode->lower_margin = var.lower_margin; - mode->hsync_len = var.hsync_len; - mode->vsync_len = var.vsync_len; - mode->vmode = 0; - mode->sync = 0; -} - -static int get_est_timing(unsigned char *block, struct fb_videomode *mode) -{ - int num = 0; - unsigned char c; - c = block[0]; - if(c&0x80) - { - calc_mode_timings(720, 400, 70, &mode[num]); - mode[num++].flag = FB_MODE_IS_CALCULATED; - DPRINT(" 720x400@70Hz\r\n"); - } - if(c&0x40) - { - calc_mode_timings(720, 400, 88, &mode[num]); - mode[num++].flag = FB_MODE_IS_CALCULATED; - DPRINT(" 720x400@88Hz\r\n"); - } - if(c&0x20) - { - mode[num++] = vesa_modes[3]; - DPRINT(" 640x480@60Hz\r\n"); - } - if(c&0x10) - { - calc_mode_timings(640, 480, 67, &mode[num]); - mode[num++].flag = FB_MODE_IS_CALCULATED; - DPRINT(" 640x480@67Hz\r\n"); - } - if(c&0x08) - { - mode[num++] = vesa_modes[4]; - DPRINT(" 640x480@72Hz\r\n"); - } - if(c&0x04) - { - mode[num++] = vesa_modes[5]; - DPRINT(" 640x480@75Hz\r\n"); - } - if(c&0x02) - { - mode[num++] = vesa_modes[7]; - DPRINT(" 800x600@56Hz\r\n"); - } - if(c&0x01) - { - mode[num++] = vesa_modes[8]; - DPRINT(" 800x600@60Hz\r\n"); - } - c = block[1]; - if(c&0x80) - { - mode[num++] = vesa_modes[9]; - DPRINT(" 800x600@72Hz\r\n"); - } - if(c&0x40) - { - mode[num++] = vesa_modes[10]; - DPRINT(" 800x600@75Hz\r\n"); - } - if(c&0x20) - { - calc_mode_timings(832, 624, 75, &mode[num]); - mode[num++].flag = FB_MODE_IS_CALCULATED; - DPRINT(" 832x624@75Hz\r\n"); - } - if(c&0x10) - { - mode[num++] = vesa_modes[12]; - DPRINT(" 1024x768@87Hz Interlaced\r\n"); - } - if(c&0x08) - { - mode[num++] = vesa_modes[13]; - DPRINT(" 1024x768@60Hz\r\n"); - } - if(c&0x04) - { - mode[num++] = vesa_modes[14]; - DPRINT(" 1024x768@70Hz\r\n"); - } - if(c&0x02) - { - mode[num++] = vesa_modes[15]; - DPRINT(" 1024x768@75Hz\r\n"); - } - if(c&0x01) - { - mode[num++] = vesa_modes[21]; - DPRINT(" 1280x1024@75Hz\r\n"); - } - c = block[2]; - if(c&0x80) - { - mode[num++] = vesa_modes[17]; - DPRINT(" 1152x870@75Hz\r\n"); - } - DPRINTVAL(" Manufacturer's mask: ",c&0x7F); - DPRINT("\r\n"); - return num; -} - -static int get_std_timing(unsigned char *block, struct fb_videomode *mode) -{ - int xres, yres = 0, refresh, ratio, i; - xres = (block[0] + 31) * 8; - if(xres <= 256) - return 0; - ratio = (block[1] & 0xc0) >> 6; - switch(ratio) - { - case 0: yres = xres; break; - case 1: yres = (xres * 3)/4; break; - case 2: yres = (xres * 4)/5; break; - case 3: yres = (xres * 9)/16; break; - } - refresh = (block[1] & 0x3f) + 60; - DPRINTVAL(" ",xres); - DPRINTVAL("x",yres); - DPRINTVAL("@",refresh); - DPRINT("Hz\r\n"); - for(i = 0; i < VESA_MODEDB_SIZE; i++) - { - if(vesa_modes[i].xres == xres && vesa_modes[i].yres == yres - && vesa_modes[i].refresh == refresh) - { - *mode = vesa_modes[i]; - mode->flag |= FB_MODE_IS_STANDARD; - return 1; - } - } - calc_mode_timings(xres, yres, refresh, mode); - return 1; -} - -static int get_dst_timing(unsigned char *block, struct fb_videomode *mode) -{ - int j, num = 0; - for(j = 0; j < 6; j++, block+= STD_TIMING_DESCRIPTION_SIZE) - num += get_std_timing(block, &mode[num]); - return num; -} - -static void get_detailed_timing(unsigned char *block, struct fb_videomode *mode) -{ - mode->xres = H_ACTIVE; - mode->yres = V_ACTIVE; - mode->pixclock = PIXEL_CLOCK; - mode->pixclock /= 1000; - mode->pixclock = KHZ2PICOS(mode->pixclock); - mode->right_margin = H_SYNC_OFFSET; - mode->left_margin = (H_ACTIVE + H_BLANKING) - (H_ACTIVE + H_SYNC_OFFSET + H_SYNC_WIDTH); - mode->upper_margin = V_BLANKING - V_SYNC_OFFSET - V_SYNC_WIDTH; - mode->lower_margin = V_SYNC_OFFSET; - mode->hsync_len = H_SYNC_WIDTH; - mode->vsync_len = V_SYNC_WIDTH; - if(HSYNC_POSITIVE) - mode->sync |= FB_SYNC_HOR_HIGH_ACT; - if(VSYNC_POSITIVE) - mode->sync |= FB_SYNC_VERT_HIGH_ACT; - mode->refresh = PIXEL_CLOCK/((H_ACTIVE + H_BLANKING) * (V_ACTIVE + V_BLANKING)); - mode->vmode = 0; - mode->flag = FB_MODE_IS_DETAILED; - DPRINTVAL(" ",PIXEL_CLOCK/1000000); - DPRINTVAL(" MHz ",H_ACTIVE); - DPRINTVAL(" ",H_ACTIVE + H_SYNC_OFFSET); - DPRINTVAL(" ",H_ACTIVE + H_SYNC_OFFSET + H_SYNC_WIDTH); - DPRINTVAL(" ",H_ACTIVE + H_BLANKING); - DPRINTVAL(" ",V_ACTIVE); - DPRINTVAL(" ",V_ACTIVE + V_SYNC_OFFSET); - DPRINTVAL(" ",V_ACTIVE + V_SYNC_OFFSET + V_SYNC_WIDTH); - DPRINTVAL(" ",V_ACTIVE + V_BLANKING); - DPRINT((HSYNC_POSITIVE) ? " +" : " -"); - DPRINT("HSync "); - DPRINT((VSYNC_POSITIVE) ? "+" : "-"); - DPRINT("VSync\r\n"); -} - -#define MAX_DB_ALLOC 100 -static struct fb_videomode tab_db[MAX_DB_ALLOC]; -static struct fb_videomode *db_used[MAX_DB_ALLOC]; - -static struct fb_videomode *alloc_db(int num) -{ - int i = 0; - if(!num) - return(NULL); - while(i < MAX_DB_ALLOC) - { - if((db_used[i] == NULL) && ((i + num) <= MAX_DB_ALLOC)) - { - int j; /* search contiguous num db free */ - for(j = 0; j < num; j++) - { - if(db_used[i+j] != NULL) - break; /* already used */ - } - if(j >= num) - { - struct fb_videomode *p = &tab_db[i]; - for(j = 0; j < num; db_used[i+j] = p, j++); - return(p); - } - } - i++; - } - return(NULL); -} - -static void free_db(struct fb_videomode *db) -{ - int i; - for(i = 0; i < MAX_DB_ALLOC; i++) - { - if(db_used[i] == db) - db_used[i] = NULL; - } -} - -/** - * fb_destroy_modedb - destroys mode database - * @modedb: mode database to destroy - * - * DESCRIPTION: - * Destroy mode database created by fb_create_modedb - */ -void fb_destroy_modedb(struct fb_videomode *modedb) -{ -// Funcs_free(modedb); - free_db(modedb); -} - -/** - * fb_create_modedb - create video mode database - * @edid: EDID data - * @dbsize: database size - * - * RETURNS: struct fb_videomode, @dbsize contains length of database - * - * DESCRIPTION: - * This function builds a mode database using the contents of the EDID - * data - */ -static struct fb_videomode *fb_create_modedb(unsigned char *edid, int *dbsize) -{ - struct fb_videomode *mode, *m; - unsigned char *block; - int num = 0, i; -// mode = Funcs_malloc(50 * sizeof(struct fb_videomode), 3); - mode = alloc_db(50); - if(mode == NULL) - return NULL; - memset((char *)mode, 0, 50 * sizeof(struct fb_videomode)); - if(edid == NULL || !edid_checksum(edid) || !edid_check_header(edid)) - { - fb_destroy_modedb(mode); - return NULL; - } - *dbsize = 0; - DPRINT(" Supported VESA Modes\r\n"); - block = edid + ESTABLISHED_TIMING_1; - num += get_est_timing(block, &mode[num]); - DPRINT(" Standard Timings\r\n"); - block = edid + STD_TIMING_DESCRIPTIONS_START; - for(i = 0; i < STD_TIMING; i++, block += STD_TIMING_DESCRIPTION_SIZE) - num += get_std_timing(block, &mode[num]); - DPRINT(" Detailed Timings\r\n"); - block = edid + DETAILED_TIMING_DESCRIPTIONS_START; - for(i = 0; i < 4; i++, block+= DETAILED_TIMING_DESCRIPTION_SIZE) - { - int first = 1; - if(block[0] == 0x00 && block[1] == 0x00) - { - if(block[3] == 0xfa) - num += get_dst_timing(block + 5, &mode[num]); - } - else - { - get_detailed_timing(block, &mode[num]); - if(first) - { - mode[num].flag |= FB_MODE_IS_FIRST; - first = 0; - } - num++; - } - } - /* Yikes, EDID data is totally useless */ - if(!num) - { - fb_destroy_modedb(mode); - return NULL; - } - *dbsize = num; -// m = Funcs_malloc(num * sizeof(struct fb_videomode), 3); - m = alloc_db(num); - if(!m) - return mode; - memcpy(m, mode, num * sizeof(struct fb_videomode)); - fb_destroy_modedb(mode); - return m; -} - -static int fb_get_monitor_limits(unsigned char *edid, struct fb_monspecs *specs) -{ - int i, retval = 1; - unsigned char *block; - block = edid + DETAILED_TIMING_DESCRIPTIONS_START; - DPRINT(" Monitor Operating Limits: "); - for(i = 0; i < 4; i++, block += DETAILED_TIMING_DESCRIPTION_SIZE) - { - if(edid_is_limits_block(block)) - { - specs->hfmin = H_MIN_RATE * 1000; - specs->hfmax = H_MAX_RATE * 1000; - specs->vfmin = V_MIN_RATE; - specs->vfmax = V_MAX_RATE; - specs->dclkmax = MAX_PIXEL_CLOCK * 1000000; - specs->gtf = (GTF_SUPPORT) ? 1 : 0; - retval = 0; - DPRINT("From EDID\r\n"); - break; - } - } - /* estimate monitor limits based on modes supported */ - if(retval) - { - struct fb_videomode *modes; - int num_modes, i, hz, hscan, pixclock; - modes = fb_create_modedb(edid, &num_modes); - if(!modes) - { - DPRINT("None Available\r\n"); - return 1; - } - retval = 0; - for(i = 0; i < num_modes; i++) - { - hz = modes[i].refresh; - pixclock = PICOS2KHZ(modes[i].pixclock) * 1000; - hscan = (modes[i].yres * 105 * hz + 5000)/100; - if(specs->dclkmax == 0 || specs->dclkmax < pixclock) - specs->dclkmax = pixclock; - if(specs->dclkmin == 0 || specs->dclkmin > pixclock) - specs->dclkmin = pixclock; - if(specs->hfmax == 0 || specs->hfmax < hscan) - specs->hfmax = hscan; - if(specs->hfmin == 0 || specs->hfmin > hscan) - specs->hfmin = hscan; - if(specs->vfmax == 0 || specs->vfmax < hz) - specs->vfmax = hz; - if(specs->vfmin == 0 || specs->vfmin > hz) - specs->vfmin = hz; - } - DPRINT("Extrapolated\r\n"); - fb_destroy_modedb(modes); - } - DPRINTVAL(" H: ",specs->hfmin/1000); - DPRINTVAL("-",specs->hfmax/1000); - DPRINTVAL("KHz V: ",specs->vfmin); - DPRINTVAL("-",specs->vfmax); - DPRINTVAL("Hz DCLK: ",specs->dclkmax/1000000); - DPRINT("MHz\r\n"); - return retval; -} - -static void get_monspecs(unsigned char *edid, struct fb_monspecs *specs) -{ - unsigned char c, *block; - block = edid + EDID_STRUCT_DISPLAY; - fb_get_monitor_limits(edid, specs); - c = block[0] & 0x80; - specs->input = 0; - if(c) - { - specs->input |= FB_DISP_DDI; - DPRINT(" Digital Display Input"); - } - else - { - DPRINT(" Analog Display Input: Input Voltage - "); - switch ((block[0] & 0x60) >> 5) - { - case 0: - DPRINT("0.700V/0.300V"); - specs->input |= FB_DISP_ANA_700_300; - break; - case 1: - DPRINT("0.714V/0.286V"); - specs->input |= FB_DISP_ANA_714_286; - break; - case 2: - DPRINT("1.000V/0.400V"); - specs->input |= FB_DISP_ANA_1000_400; - break; - case 3: - DPRINT("0.700V/0.000V"); - specs->input |= FB_DISP_ANA_700_000; - break; - } - } - DPRINT("\r\n Sync: "); - c = block[0] & 0x10; - if(c) - { - DPRINT(" Configurable signal level\r\n"); - } - c = block[0] & 0x0f; - specs->signal = 0; - if(c & 0x10) - { - DPRINT("Blank to Blank "); - specs->signal |= FB_SIGNAL_BLANK_BLANK; - } - if(c & 0x08) - { - DPRINT("Separate "); - specs->signal |= FB_SIGNAL_SEPARATE; - } - if(c & 0x04) - { - DPRINT("Composite "); - specs->signal |= FB_SIGNAL_COMPOSITE; - } - if(c & 0x02) - { - DPRINT("Sync on Green "); - specs->signal |= FB_SIGNAL_SYNC_ON_GREEN; - } - if(c & 0x01) - { - DPRINT("Serration on "); - specs->signal |= FB_SIGNAL_SERRATION_ON; - } - DPRINT("\r\n"); - specs->max_x = block[1]; - specs->max_y = block[2]; - DPRINT(" Max H-size in cm: "); - if(specs->max_x) - { - DPRINTVAL("",specs->max_x); - DPRINT("\r\n"); - } - else - { - DPRINT("variable\r\n"); - } - DPRINT(" Max V-size in cm: "); - if(specs->max_y) - { - DPRINTVAL("",specs->max_y); - DPRINT("\r\n"); - } - else - { - DPRINT("variable\r\n"); - } - c = block[3]; - specs->gamma = c+100; - DPRINTVAL(" Gamma: ",specs->gamma/100); - DPRINT("\r\n"); - get_dpms_capabilities(block[4], specs); - switch ((block[4] & 0x18) >> 3) - { - case 0: - DPRINT(" Monochrome/Grayscale\r\n"); - specs->input |= FB_DISP_MONO; - break; - case 1: - DPRINT(" RGB Color Display\r\n"); - specs->input |= FB_DISP_RGB; - break; - case 2: - DPRINT(" Non-RGB Multicolor Display\r\n"); - specs->input |= FB_DISP_MULTI; - break; - default: - DPRINT(" Unknown\r\n"); - specs->input |= FB_DISP_UNKNOWN; - break; - } - get_chroma(block, specs); - specs->misc = 0; - c = block[4] & 0x7; - if(c & 0x04) - { - DPRINT(" Default color format is primary\r\n"); - specs->misc |= FB_MISC_PRIM_COLOR; - } - if(c & 0x02) - { - DPRINT(" First DETAILED Timing is preferred\r\n"); - specs->misc |= FB_MISC_1ST_DETAIL; - } - if(c & 0x01) - { - DPRINT(" Display is GTF capable\r\n"); - specs->gtf = 1; - } -} - -static int edid_is_timing_block(unsigned char *block) -{ - if((block[0] != 0x00) || (block[1] != 0x00) - || (block[2] != 0x00) || (block[4] != 0x00)) - return 1; - else - return 0; -} - -int fb_parse_edid(unsigned char *edid, struct fb_var_screeninfo *var) -{ - int i; - unsigned char *block; - if(edid == NULL || var == NULL) - return 1; - if(!(edid_checksum(edid))) - return 1; - if(!(edid_check_header(edid))) - return 1; - block = edid + DETAILED_TIMING_DESCRIPTIONS_START; - for(i = 0; i < 4; i++, block += DETAILED_TIMING_DESCRIPTION_SIZE) - { - if(edid_is_timing_block(block)) - { - var->xres = var->xres_virtual = H_ACTIVE; - var->yres = var->yres_virtual = V_ACTIVE; - var->height = var->width = -1; - var->right_margin = H_SYNC_OFFSET; - var->left_margin = (H_ACTIVE + H_BLANKING) - (H_ACTIVE + H_SYNC_OFFSET + H_SYNC_WIDTH); - var->upper_margin = V_BLANKING - V_SYNC_OFFSET - V_SYNC_WIDTH; - var->lower_margin = V_SYNC_OFFSET; - var->hsync_len = H_SYNC_WIDTH; - var->vsync_len = V_SYNC_WIDTH; - var->pixclock = PIXEL_CLOCK; - var->pixclock /= 1000; - var->pixclock = KHZ2PICOS(var->pixclock); - if(HSYNC_POSITIVE) - var->sync |= FB_SYNC_HOR_HIGH_ACT; - if(VSYNC_POSITIVE) - var->sync |= FB_SYNC_VERT_HIGH_ACT; - return 0; - } - } - DPRINT("edid no timing block\r\n"); - return 1; -} - -void fb_edid_to_monspecs(unsigned char *edid, struct fb_monspecs *specs) -{ - unsigned char *block; - int i; - if(edid == NULL) - return; - if(!(edid_checksum(edid))) - return; - if(!(edid_check_header(edid))) - return; - if(specs->modedb != NULL) - fb_destroy_modedb(specs->modedb); - memset((char *)specs, 0, sizeof(struct fb_monspecs)); - specs->version = edid[EDID_STRUCT_VERSION]; - specs->revision = edid[EDID_STRUCT_REVISION]; - DPRINT("========================================\r\n"); - DPRINT("Display Information (EDID)\r\n"); - DPRINT("========================================\r\n"); - DPRINTVAL(" EDID Version ",specs->version); - DPRINTVAL(".",specs->revision); - DPRINT("\r\n"); - parse_vendor_block(edid + ID_MANUFACTURER_NAME, specs); - block = edid + DETAILED_TIMING_DESCRIPTIONS_START; - for(i = 0; i < 4; i++, block += DETAILED_TIMING_DESCRIPTION_SIZE) - { - if(edid_is_serial_block(block)) - { - copy_string(block, specs->serial_no); - DPRINT(" Serial Number: "); - DPRINT((void *)specs->serial_no); - DPRINT("\r\n"); - } - else if(edid_is_ascii_block(block)) - { - copy_string(block, specs->ascii); - DPRINT(" ASCII Block: "); - DPRINT((void *)specs->ascii); - DPRINT("\r\n"); - } - else if(edid_is_monitor_block(block)) - { - copy_string(block, specs->monitor); - DPRINT(" Monitor Name: "); - DPRINT((void *)specs->monitor); - DPRINT("\r\n"); - } - } - DPRINT(" Display Characteristics:\r\n"); - get_monspecs(edid, specs); - specs->modedb = fb_create_modedb(edid, (int *)&specs->modedb_len); - DPRINT("========================================\r\n"); -} - -/* - * VESA Generalized Timing Formula (GTF) - */ - -#define FLYBACK 550 -#define V_FRONTPORCH 1 -#define H_OFFSET 40 -#define H_SCALEFACTOR 20 -#define H_BLANKSCALE 128 -#define H_GRADIENT 600 -#define C_VAL 30 -#define M_VAL 300 - -struct __fb_timings { - unsigned long dclk; - unsigned long hfreq; - unsigned long vfreq; - unsigned long hactive; - unsigned long vactive; - unsigned long hblank; - unsigned long vblank; - unsigned long htotal; - unsigned long vtotal; -}; - -/** - * fb_get_vblank - get vertical blank time - * @hfreq: horizontal freq - * - * DESCRIPTION: - * vblank = right_margin + vsync_len + left_margin - * - * given: right_margin = 1 (V_FRONTPORCH) - * vsync_len = 3 - * flyback = 550 - * - * flyback * hfreq - * left_margin = --------------- - vsync_len - * 1000000 - */ -static unsigned long fb_get_vblank(unsigned long hfreq) -{ - unsigned long vblank; - vblank = (hfreq * FLYBACK)/1000; - vblank = (vblank + 500)/1000; - return (vblank + V_FRONTPORCH); -} - -/** - * fb_get_hblank_by_freq - get horizontal blank time given hfreq - * @hfreq: horizontal freq - * @xres: horizontal resolution in pixels - * - * DESCRIPTION: - * - * xres * duty_cycle - * hblank = ------------------ - * 100 - duty_cycle - * - * duty cycle = percent of htotal assigned to inactive display - * duty cycle = C - (M/Hfreq) - * - * where: C = ((offset - scale factor) * blank_scale) - * -------------------------------------- + scale factor - * 256 - * M = blank_scale * gradient - * - */ -static unsigned long fb_get_hblank_by_hfreq(unsigned long hfreq, unsigned long xres) -{ - unsigned long c_val, m_val, duty_cycle, hblank; - c_val = (((H_OFFSET - H_SCALEFACTOR) * H_BLANKSCALE)/256 + H_SCALEFACTOR) * 1000; - m_val = (H_BLANKSCALE * H_GRADIENT)/256; - m_val = (m_val * 1000000)/hfreq; - duty_cycle = c_val - m_val; - hblank = (xres * duty_cycle)/(100000 - duty_cycle); - return (hblank); -} - -/* Quick integer square root using binomial theorem (from Dr. Dobbs journal) */ -static int int_sqrt(int N) -{ - unsigned long l2, u, v, u2, n; - if(N < 2) - return N; - u = N; - l2 = 0; - /* 1/2 * log_2 N = highest bit in the result */ - while ((u >>= 2)) - l2++; - u = 1L << l2; - v = u; - u2 = u << l2; - while (l2--) - { - v >>= 1; - n = (u + u + v) << l2; - n += u2; - if (n <= N) - { - u += v; - u2 = n; - } - } - return u; -} - -/** - * fb_get_hblank_by_dclk - get horizontal blank time given pixelclock - * @dclk: pixelclock in Hz - * @xres: horizontal resolution in pixels - * - * DESCRIPTION: - * - * xres * duty_cycle - * hblank = ------------------ - * 100 - duty_cycle - * - * duty cycle = percent of htotal assigned to inactive display - * duty cycle = C - (M * h_period) - * - * where: h_period = SQRT(100 - C + (0.4 * xres * M)/dclk) + C - 100 - * ----------------------------------------------- - * 2 * M - * M = 300; - * C = 30; - - */ -static unsigned long fb_get_hblank_by_dclk(unsigned long dclk, unsigned long xres) -{ - unsigned long duty_cycle, h_period, hblank; - dclk /= 1000; - h_period = 100 - C_VAL; - h_period *= h_period; - h_period += (M_VAL * xres * 2 * 1000)/(5 * dclk); - h_period *=10000; - h_period = int_sqrt(h_period); - h_period -= (100 - C_VAL) * 100; - h_period *= 1000; - h_period /= 2 * M_VAL; - duty_cycle = C_VAL * 1000 - (M_VAL * h_period)/100; - hblank = (xres * duty_cycle)/(100000 - duty_cycle) + 8; - hblank &= ~15; - return (hblank); -} - -/** - * fb_get_hfreq - estimate hsync - * @vfreq: vertical refresh rate - * @yres: vertical resolution - * - * DESCRIPTION: - * - * (yres + front_port) * vfreq * 1000000 - * hfreq = ------------------------------------- - * (1000000 - (vfreq * FLYBACK) - * - */ - -static unsigned long fb_get_hfreq(unsigned long vfreq, unsigned long yres) -{ - unsigned long divisor, hfreq; - divisor = (1000000 - (vfreq * FLYBACK))/1000; - hfreq = (yres + V_FRONTPORCH) * vfreq * 1000; - return (hfreq/divisor); -} - -static void fb_timings_vfreq(struct __fb_timings *timings) -{ - timings->hfreq = fb_get_hfreq(timings->vfreq, timings->vactive); - timings->vblank = fb_get_vblank(timings->hfreq); - timings->vtotal = timings->vactive + timings->vblank; - timings->hblank = fb_get_hblank_by_hfreq(timings->hfreq, - timings->hactive); - timings->htotal = timings->hactive + timings->hblank; - timings->dclk = timings->htotal * timings->hfreq; -} - -static void fb_timings_hfreq(struct __fb_timings *timings) -{ - timings->vblank = fb_get_vblank(timings->hfreq); - timings->vtotal = timings->vactive + timings->vblank; - timings->vfreq = timings->hfreq/timings->vtotal; - timings->hblank = fb_get_hblank_by_hfreq(timings->hfreq, timings->hactive); - timings->htotal = timings->hactive + timings->hblank; - timings->dclk = timings->htotal * timings->hfreq; -} - -static void fb_timings_dclk(struct __fb_timings *timings) -{ - timings->hblank = fb_get_hblank_by_dclk(timings->dclk, timings->hactive); - timings->htotal = timings->hactive + timings->hblank; - timings->hfreq = timings->dclk/timings->htotal; - timings->vblank = fb_get_vblank(timings->hfreq); - timings->vtotal = timings->vactive + timings->vblank; - timings->vfreq = timings->hfreq/timings->vtotal; -} - -/* - * fb_get_mode - calculates video mode using VESA GTF - * @flags: if: 0 - maximize vertical refresh rate - * 1 - vrefresh-driven calculation; - * 2 - hscan-driven calculation; - * 3 - pixelclock-driven calculation; - * @val: depending on @flags, ignored, vrefresh, hsync or pixelclock - * @var: pointer to fb_var_screeninfo - * @info: pointer to fb_info - * - * DESCRIPTION: - * Calculates video mode based on monitor specs using VESA GTF. - * The GTF is best for VESA GTF compliant monitors but is - * specifically formulated to work for older monitors as well. - * - * If @flag==0, the function will attempt to maximize the - * refresh rate. Otherwise, it will calculate timings based on - * the flag and accompanying value. - * - * If FB_IGNOREMON bit is set in @flags, monitor specs will be - * ignored and @var will be filled with the calculated timings. - * - * All calculations are based on the VESA GTF Spreadsheet - * available at VESA's public ftp (http://www.vesa.org). - * - * NOTES: - * The timings generated by the GTF will be different from VESA - * DMT. It might be a good idea to keep a table of standard - * VESA modes as well. The GTF may also not work for some displays, - * such as, and especially, analog TV. - * - * REQUIRES: - * A valid info->monspecs, otherwise 'safe numbers' will be used. - */ -int fb_get_mode(int flags, unsigned long val, struct fb_var_screeninfo *var, struct fb_info *info) -{ - struct __fb_timings timings; - unsigned long interlace = 1, dscan = 1; - unsigned long hfmin, hfmax, vfmin, vfmax, dclkmin, dclkmax; - /* - * If monspecs are invalid, use values that are enough - * for 640x480@60 - */ - if(!info->monspecs.hfmax || !info->monspecs.vfmax - || !info->monspecs.dclkmax || info->monspecs.hfmax < info->monspecs.hfmin - || info->monspecs.vfmax < info->monspecs.vfmin || info->monspecs.dclkmax < info->monspecs.dclkmin) - { - hfmin = 29000; hfmax = 30000; - vfmin = 60; vfmax = 60; - dclkmin = 0; dclkmax = 25000000; - } - else - { - hfmin = info->monspecs.hfmin; - hfmax = info->monspecs.hfmax; - vfmin = info->monspecs.vfmin; - vfmax = info->monspecs.vfmax; - dclkmin = info->monspecs.dclkmin; - dclkmax = info->monspecs.dclkmax; - } - memset((char *)&timings, 0, sizeof(struct __fb_timings)); - timings.hactive = var->xres; - timings.vactive = var->yres; - if(var->vmode & FB_VMODE_INTERLACED) - { - timings.vactive /= 2; - interlace = 2; - } - if(var->vmode & FB_VMODE_DOUBLE) - { - timings.vactive *= 2; - dscan = 2; - } - switch(flags & ~FB_IGNOREMON) - { - case FB_MAXTIMINGS: /* maximize refresh rate */ - timings.hfreq = hfmax; - fb_timings_hfreq(&timings); - if(timings.vfreq > vfmax) - { - timings.vfreq = vfmax; - fb_timings_vfreq(&timings); - } - if(timings.dclk > dclkmax) - { - timings.dclk = dclkmax; - fb_timings_dclk(&timings); - } - break; - case FB_VSYNCTIMINGS: /* vrefresh driven */ - timings.vfreq = val; - fb_timings_vfreq(&timings); - break; - case FB_HSYNCTIMINGS: /* hsync driven */ - timings.hfreq = val; - fb_timings_hfreq(&timings); - break; - case FB_DCLKTIMINGS: /* pixelclock driven */ - timings.dclk = PICOS2KHZ(val) * 1000; - fb_timings_dclk(&timings); - break; - default: - return -1; // -EINVAL; - } - if(!(flags & FB_IGNOREMON) - && (timings.vfreq < vfmin || timings.vfreq > vfmax - || timings.hfreq < hfmin || timings.hfreq > hfmax - || timings.dclk < dclkmin || timings.dclk > dclkmax)) - return -1; //-EINVAL; - var->pixclock = KHZ2PICOS(timings.dclk/1000); - var->hsync_len = (timings.htotal * 8)/100; - var->right_margin = (timings.hblank/2) - var->hsync_len; - var->left_margin = timings.hblank - var->right_margin - var->hsync_len; - var->vsync_len = (3 * interlace)/dscan; - var->lower_margin = (1 * interlace)/dscan; - var->upper_margin = (timings.vblank * interlace)/dscan - (var->vsync_len + var->lower_margin); - return 0; -} - -#else - -int fb_parse_edid(unsigned char *edid, struct fb_var_screeninfo *var) -{ - return 1; -} - -void fb_edid_to_monspecs(unsigned char *edid, struct fb_monspecs *specs) -{ - specs = NULL; -} - -void fb_destroy_modedb(struct fb_videomode *modedb) -{ -} - -int fb_get_mode(int flags, unsigned long val, struct fb_var_screeninfo *var, struct fb_info *info) -{ - return -1; // -EINVAL; -} - -#endif /* CONFIG_FB_MODE_HELPERS */ - -/* - * fb_validate_mode - validates var against monitor capabilities - * @var: pointer to fb_var_screeninfo - * @info: pointer to fb_info - * - * DESCRIPTION: - * Validates video mode against monitor capabilities specified in - * info->monspecs. - * - * REQUIRES: - * A valid info->monspecs. - */ -int fb_validate_mode(const struct fb_var_screeninfo *var, struct fb_info *info) -{ - unsigned long hfreq, vfreq, htotal, vtotal, pixclock; - unsigned long hfmin, hfmax, vfmin, vfmax, dclkmin, dclkmax; - /* - * If monspecs are invalid, use values that are enough - * for 640x480@60 - */ - if(!info->monspecs.hfmax || !info->monspecs.vfmax || !info->monspecs.dclkmax - || info->monspecs.hfmax < info->monspecs.hfmin - || info->monspecs.vfmax < info->monspecs.vfmin - || info->monspecs.dclkmax < info->monspecs.dclkmin) - { - hfmin = 29000; hfmax = 30000; - vfmin = 60; vfmax = 60; - dclkmin = 0; dclkmax = 25000000; - } - else - { - hfmin = info->monspecs.hfmin; - hfmax = info->monspecs.hfmax; - vfmin = info->monspecs.vfmin; - vfmax = info->monspecs.vfmax; - dclkmin = info->monspecs.dclkmin; - dclkmax = info->monspecs.dclkmax; - } - if(!var->pixclock) - return -1; // -EINVAL; - pixclock = PICOS2KHZ(var->pixclock) * 1000; - htotal = var->xres + var->right_margin + var->hsync_len + var->left_margin; - vtotal = var->yres + var->lower_margin + var->vsync_len + var->upper_margin; - if(var->vmode & FB_VMODE_INTERLACED) - vtotal /= 2; - if(var->vmode & FB_VMODE_DOUBLE) - vtotal *= 2; - hfreq = pixclock/htotal; - vfreq = hfreq/vtotal; - return (vfreq < vfmin || vfreq > vfmax || hfreq < hfmin || hfreq > hfmax - || pixclock < dclkmin || pixclock > dclkmax) ? -1 /* -EINVAL */ : 0; -} - diff --git a/video/fnt_st_8x16.c b/video/fnt_st_8x16.c deleted file mode 100644 index 5015cca..0000000 --- a/video/fnt_st_8x16.c +++ /dev/null @@ -1,337 +0,0 @@ -/* - * fnt-8x16.c - 8x16 font for Atari ST encoding - * - * Copyright (C) 2001-2002 The EmuTOS development team - * - * This file is distributed under the GPL, version 2 or at your - * option any later version. See doc/license.txt for details. - */ - -#include "bas_types.h" -#include "font.h" - -static const uint16_t off_table[] = -{ - 0x0000, 0x0008, 0x0010, 0x0018, 0x0020, 0x0028, 0x0030, 0x0038, - 0x0040, 0x0048, 0x0050, 0x0058, 0x0060, 0x0068, 0x0070, 0x0078, - 0x0080, 0x0088, 0x0090, 0x0098, 0x00a0, 0x00a8, 0x00b0, 0x00b8, - 0x00c0, 0x00c8, 0x00d0, 0x00d8, 0x00e0, 0x00e8, 0x00f0, 0x00f8, - 0x0100, 0x0108, 0x0110, 0x0118, 0x0120, 0x0128, 0x0130, 0x0138, - 0x0140, 0x0148, 0x0150, 0x0158, 0x0160, 0x0168, 0x0170, 0x0178, - 0x0180, 0x0188, 0x0190, 0x0198, 0x01a0, 0x01a8, 0x01b0, 0x01b8, - 0x01c0, 0x01c8, 0x01d0, 0x01d8, 0x01e0, 0x01e8, 0x01f0, 0x01f8, - 0x0200, 0x0208, 0x0210, 0x0218, 0x0220, 0x0228, 0x0230, 0x0238, - 0x0240, 0x0248, 0x0250, 0x0258, 0x0260, 0x0268, 0x0270, 0x0278, - 0x0280, 0x0288, 0x0290, 0x0298, 0x02a0, 0x02a8, 0x02b0, 0x02b8, - 0x02c0, 0x02c8, 0x02d0, 0x02d8, 0x02e0, 0x02e8, 0x02f0, 0x02f8, - 0x0300, 0x0308, 0x0310, 0x0318, 0x0320, 0x0328, 0x0330, 0x0338, - 0x0340, 0x0348, 0x0350, 0x0358, 0x0360, 0x0368, 0x0370, 0x0378, - 0x0380, 0x0388, 0x0390, 0x0398, 0x03a0, 0x03a8, 0x03b0, 0x03b8, - 0x03c0, 0x03c8, 0x03d0, 0x03d8, 0x03e0, 0x03e8, 0x03f0, 0x03f8, - 0x0400, 0x0408, 0x0410, 0x0418, 0x0420, 0x0428, 0x0430, 0x0438, - 0x0440, 0x0448, 0x0450, 0x0458, 0x0460, 0x0468, 0x0470, 0x0478, - 0x0480, 0x0488, 0x0490, 0x0498, 0x04a0, 0x04a8, 0x04b0, 0x04b8, - 0x04c0, 0x04c8, 0x04d0, 0x04d8, 0x04e0, 0x04e8, 0x04f0, 0x04f8, - 0x0500, 0x0508, 0x0510, 0x0518, 0x0520, 0x0528, 0x0530, 0x0538, - 0x0540, 0x0548, 0x0550, 0x0558, 0x0560, 0x0568, 0x0570, 0x0578, - 0x0580, 0x0588, 0x0590, 0x0598, 0x05a0, 0x05a8, 0x05b0, 0x05b8, - 0x05c0, 0x05c8, 0x05d0, 0x05d8, 0x05e0, 0x05e8, 0x05f0, 0x05f8, - 0x0600, 0x0608, 0x0610, 0x0618, 0x0620, 0x0628, 0x0630, 0x0638, - 0x0640, 0x0648, 0x0650, 0x0658, 0x0660, 0x0668, 0x0670, 0x0678, - 0x0680, 0x0688, 0x0690, 0x0698, 0x06a0, 0x06a8, 0x06b0, 0x06b8, - 0x06c0, 0x06c8, 0x06d0, 0x06d8, 0x06e0, 0x06e8, 0x06f0, 0x06f8, - 0x0700, 0x0708, 0x0710, 0x0718, 0x0720, 0x0728, 0x0730, 0x0738, - 0x0740, 0x0748, 0x0750, 0x0758, 0x0760, 0x0768, 0x0770, 0x0778, - 0x0780, 0x0788, 0x0790, 0x0798, 0x07a0, 0x07a8, 0x07b0, 0x07b8, - 0x07c0, 0x07c8, 0x07d0, 0x07d8, 0x07e0, 0x07e8, 0x07f0, 0x07f8, - 0x0800, -}; - -static const uint16_t dat_table[] = -{ - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1104, - 0x0000, 0x0000, 0x1800, 0x3800, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x4000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x003c, - 0x0600, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x6032, 0x3200, 0x0000, 0x0000, 0x00f1, - 0x00f6, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0060, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0018, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x05a0, - 0x7c00, 0x7c7c, 0x007c, 0x7c7c, 0x7c7c, 0x0000, 0x0000, 0x0b28, - 0x0000, 0x0000, 0x1800, 0x7c00, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1000, - 0x6000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x000e, 0x18e0, 0x0000, - 0x0000, 0x0618, 0x0060, 0x1c00, 0x1800, 0x6000, 0x1860, 0x6666, - 0x0c00, 0x3e18, 0x0060, 0x1860, 0x0066, 0x6600, 0x0e00, 0x0000, - 0x0606, 0x0606, 0x3232, 0x0000, 0x0000, 0x0060, 0x6000, 0x0000, - 0x3232, 0x0100, 0x0000, 0x307a, 0x7a66, 0x0610, 0x0000, 0x005b, - 0x66f6, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0060, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x7c00, 0x001e, 0x0e00, 0x0000, - 0x0000, 0x0000, 0x0018, 0x0000, 0x3838, 0x0000, 0x0000, 0x00fe, - 0x0000, 0x0030, 0x0c7c, 0xfeee, 0x0100, 0x0008, 0x7838, 0x05a0, - 0xba02, 0x3a3a, 0x82b8, 0xb8ba, 0xbaba, 0x0078, 0x0000, 0x0dd8, - 0x0018, 0x6666, 0x3e66, 0x6c18, 0x0660, 0x6600, 0x0000, 0x0006, - 0x3c18, 0x3c7e, 0x0c7e, 0x1c7e, 0x3c3c, 0x0000, 0x0000, 0x003c, - 0x3818, 0x7c3c, 0x787e, 0x7e3e, 0x667e, 0x06cc, 0x60c6, 0x663c, - 0x7c3c, 0xf83e, 0x7e66, 0x66c6, 0x6666, 0x7e1e, 0x6078, 0x1000, - 0x7000, 0x6000, 0x0600, 0x0e00, 0x6018, 0x0cc0, 0x3800, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0018, 0x1830, 0x0000, - 0x3c66, 0x0c3c, 0x6630, 0x3600, 0x3c66, 0x3066, 0x3c30, 0x663c, - 0x1800, 0x7e3c, 0x6630, 0x3c30, 0x6666, 0x6618, 0x1e66, 0x180e, - 0x0c0c, 0x0c0c, 0x7a7a, 0x0000, 0x1800, 0x0020, 0x2000, 0x0000, - 0x7a7a, 0x3d00, 0x007e, 0x184c, 0x4c66, 0x0c7c, 0x7a7c, 0x7c5f, - 0x6666, 0x667c, 0x1e7e, 0x7e38, 0x1e7e, 0x6e3c, 0x3c7e, 0x6c1c, - 0xfe36, 0x7e6e, 0x3e7c, 0xd67e, 0x387e, 0x7e7e, 0x6e1c, 0x0000, - 0x0018, 0xfe00, 0xfe00, 0x0000, 0x103c, 0x383e, 0x1e10, 0x3e7c, - 0x0000, 0x6006, 0x0e18, 0x0000, 0x6c7c, 0x0000, 0x3030, 0x78fe, - 0x0018, 0x3c38, 0x1c38, 0xfec6, 0x013c, 0x000e, 0x4040, 0x05a0, - 0xc606, 0x0606, 0xc6c0, 0xc0c6, 0xc6c6, 0x0040, 0x0000, 0x0628, - 0x0018, 0x6666, 0x7e66, 0x6c18, 0x0c30, 0x6618, 0x0000, 0x0006, - 0x7e18, 0x7e7e, 0x0c7e, 0x3c7e, 0x7e7e, 0x0000, 0x0e00, 0xe07e, - 0x7c3c, 0x7e7e, 0x7c7e, 0x7e7e, 0x667e, 0x06cc, 0x60c6, 0x667e, - 0x7e7e, 0xfc7e, 0x7e66, 0x66c6, 0x6666, 0x7e1e, 0x6078, 0x3800, - 0x3800, 0x6000, 0x0600, 0x1e00, 0x6018, 0x0cc0, 0x3800, 0x0000, - 0x0000, 0x0000, 0x1800, 0x0000, 0x0000, 0x0018, 0x1830, 0x0000, - 0x7e66, 0x1866, 0x6618, 0x1c00, 0x6666, 0x1866, 0x6618, 0x1818, - 0x7e00, 0xf866, 0x6618, 0x6618, 0x6600, 0x0018, 0x3866, 0x3c1e, - 0x1818, 0x1818, 0x4c4c, 0x0000, 0x1800, 0x0020, 0x2018, 0x0000, - 0x4c4c, 0x7e00, 0x00fe, 0x0000, 0x0000, 0x1810, 0xcac6, 0xc655, - 0x0066, 0x767c, 0x1e7e, 0x7e38, 0x1e7e, 0x6e3c, 0x3e7e, 0x6e1c, - 0xfe36, 0x7e6e, 0x3e7e, 0xd67e, 0x387e, 0x3e7e, 0x6e36, 0x0000, - 0x003c, 0x7e00, 0xfe00, 0x0002, 0x107e, 0x6c20, 0x1010, 0x7efe, - 0x0018, 0x700e, 0x1918, 0x1802, 0x447c, 0x0000, 0x7848, 0x1800, - 0x003c, 0x242c, 0x34ba, 0xfed6, 0x0366, 0x180f, 0x7040, 0x05a0, - 0xc606, 0x0606, 0xc6c0, 0xc0c6, 0xc6c6, 0x0070, 0x0000, 0x07d0, - 0x0018, 0x66ff, 0x606c, 0x3818, 0x1c38, 0x3c18, 0x0000, 0x0006, - 0x6638, 0x660c, 0x1c60, 0x7006, 0x6666, 0x1818, 0x1c7e, 0x7066, - 0xe67e, 0x6666, 0x6e60, 0x6060, 0x6618, 0x06d8, 0x60ee, 0x6666, - 0x6666, 0xcc60, 0x1866, 0x66c6, 0x6666, 0x0c18, 0x6018, 0x3800, - 0x1c00, 0x6000, 0x0600, 0x1800, 0x6000, 0x00c0, 0x1800, 0x0000, - 0x0000, 0x0000, 0x1800, 0x0000, 0x0000, 0x0018, 0x1830, 0x0000, - 0x6600, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x3c3c, - 0x7e00, 0xd800, 0x0000, 0x0000, 0x003c, 0x663c, 0x3066, 0x6618, - 0x0000, 0x0000, 0x0000, 0x3c3c, 0x0000, 0x0023, 0x2318, 0x0000, - 0x0000, 0x6601, 0x00d8, 0x3c3c, 0x3c00, 0x0010, 0xca82, 0x8251, - 0xe666, 0x760c, 0x060c, 0x0618, 0x0466, 0x660c, 0x0606, 0x3e0c, - 0xfe36, 0x6666, 0x3e06, 0xd666, 0x1806, 0x3666, 0x6632, 0x0066, - 0x6266, 0x6202, 0x601e, 0x007e, 0x7c66, 0xc630, 0x7c7c, 0xe0c6, - 0x7e18, 0x381c, 0x1b18, 0x183e, 0x6c7c, 0x0000, 0x4818, 0x3000, - 0x0066, 0x24e6, 0x6792, 0xfc92, 0x03c3, 0x3c09, 0x4040, 0x0db0, - 0xc606, 0x0606, 0xc6c0, 0xc0c6, 0xc6c6, 0x7c40, 0x0000, 0x2e10, - 0x0018, 0x66ff, 0x600c, 0x3818, 0x1818, 0x3c18, 0x0000, 0x000c, - 0x6638, 0x660c, 0x1c60, 0x6006, 0x6666, 0x1818, 0x387e, 0x3866, - 0xc266, 0x6666, 0x6660, 0x6060, 0x6618, 0x06d8, 0x60ee, 0x7666, - 0x6666, 0xcc60, 0x1866, 0x66c6, 0x3c66, 0x0c18, 0x3018, 0x6c00, - 0x0c3c, 0x7c3c, 0x3e3c, 0x183e, 0x7c38, 0x0ccc, 0x186c, 0x3c3c, - 0x7c3e, 0x7c3e, 0x7e66, 0x66c6, 0x6666, 0x7e18, 0x1830, 0x6218, - 0x6666, 0x3c3c, 0x3c3c, 0x3c3c, 0x3c3c, 0x3c38, 0x3838, 0x7e7e, - 0x6076, 0xd83c, 0x3c3c, 0x6666, 0x667e, 0x667e, 0x3066, 0x6618, - 0x3c38, 0x3c66, 0x3c66, 0x3e7e, 0x1800, 0x0026, 0x2600, 0x0000, - 0x3c3c, 0x663d, 0x7ed8, 0x7e7e, 0x7e00, 0x0010, 0xcaba, 0xba00, - 0x6666, 0x3e0c, 0x060c, 0x6618, 0x0c66, 0x660c, 0x0606, 0x360c, - 0xc636, 0x6636, 0x0606, 0xd666, 0x1806, 0x3666, 0x7618, 0x10f7, - 0xf666, 0x607e, 0x3038, 0x66fc, 0xc642, 0xc618, 0xd6d6, 0xc0c6, - 0x7e18, 0x1c38, 0x1b18, 0x007c, 0x3838, 0x001f, 0x4830, 0x1800, - 0x00c3, 0x2483, 0xc1d6, 0xfcba, 0x0691, 0x3c08, 0x4038, 0x0db0, - 0x8202, 0x3a3a, 0xbab8, 0xb882, 0xbaba, 0x7e78, 0x0000, 0x39e0, - 0x0018, 0x6666, 0x7c18, 0x7018, 0x1818, 0xff7e, 0x007e, 0x000c, - 0x6618, 0x0c18, 0x3c7c, 0x600c, 0x3c7e, 0x1818, 0x7000, 0x1c0c, - 0xda66, 0x7e60, 0x667c, 0x7c6e, 0x7e18, 0x06f0, 0x60fe, 0x7666, - 0x6666, 0xcc70, 0x1866, 0x66c6, 0x3c3c, 0x1818, 0x3018, 0x6c00, - 0x043e, 0x7e7c, 0x7e7e, 0x7e7e, 0x7e38, 0x0cdc, 0x18fe, 0x7e7e, - 0x7e7e, 0x7e7e, 0x7e66, 0x66c6, 0x6666, 0x7e38, 0x1838, 0xf218, - 0x6066, 0x7e3e, 0x3e3e, 0x3e7c, 0x7e7e, 0x7e38, 0x3838, 0x6666, - 0x607f, 0xde7e, 0x7e7e, 0x6666, 0x6666, 0x6666, 0x307e, 0x6618, - 0x3e38, 0x7e66, 0x7e66, 0x0666, 0x1800, 0x002c, 0x2c18, 0x1ab0, - 0x3e7e, 0x6e7e, 0xffde, 0x6666, 0x6600, 0x0010, 0xcaa2, 0xaa00, - 0x6666, 0x3c0c, 0x0e0c, 0x6618, 0x0c66, 0x6600, 0x0606, 0x660c, - 0xc636, 0x763e, 0x0606, 0xf666, 0x1806, 0x3676, 0x3e3c, 0x1099, - 0xdc66, 0x60fc, 0x186c, 0x6690, 0x8242, 0xc63c, 0x9292, 0xc0c6, - 0x007e, 0x0e70, 0x1818, 0x7e40, 0x0000, 0x0010, 0x4860, 0x4800, - 0x0081, 0xe783, 0xc1c6, 0xf838, 0x0691, 0x3c08, 0x0000, 0x1db8, - 0x0000, 0x7c7c, 0x7c7c, 0x7c00, 0x7c7c, 0x0600, 0x0000, 0x3800, - 0x0018, 0x6666, 0x3e18, 0x7018, 0x1818, 0xff7e, 0x007e, 0x0018, - 0x6e18, 0x0c18, 0x3c7e, 0x7c0c, 0x3c3e, 0x1818, 0xe000, 0x0e0c, - 0xd666, 0x7c60, 0x667c, 0x7c6e, 0x7e18, 0x06f0, 0x60d6, 0x7e66, - 0x6666, 0xfc38, 0x1866, 0x66d6, 0x183c, 0x1818, 0x1818, 0xc600, - 0x0006, 0x6660, 0x6666, 0x7e66, 0x6618, 0x0cf8, 0x18fe, 0x6666, - 0x6666, 0x6660, 0x1866, 0x66d6, 0x3c66, 0x0cf0, 0x181e, 0xbe3c, - 0x6066, 0x6606, 0x0606, 0x0660, 0x6666, 0x6618, 0x1818, 0x6666, - 0x7c1b, 0xde66, 0x6666, 0x6666, 0x6666, 0x6660, 0x303c, 0x7c7e, - 0x0618, 0x6666, 0x6676, 0x3e66, 0x1800, 0x0018, 0x1818, 0x36d8, - 0x0666, 0x6e66, 0xdbde, 0x6666, 0x6600, 0x0010, 0xcaa2, 0xb200, - 0x6666, 0x3c0c, 0x1e0c, 0x6618, 0x0c66, 0x6600, 0x060e, 0x660c, - 0xc636, 0x7618, 0x3606, 0xf666, 0x1806, 0x3676, 0x0e66, 0x3899, - 0x887c, 0x60a8, 0x0cc6, 0x6630, 0x827e, 0xc666, 0x9292, 0xfcc6, - 0x7e7e, 0x1c38, 0x1818, 0x7e02, 0x0000, 0x00d0, 0x4878, 0x3000, - 0x00e7, 0x81e6, 0x67d6, 0xfaba, 0x8c9d, 0x3c78, 0x1e1c, 0x399c, - 0x8202, 0xb83a, 0x3a3a, 0xba02, 0xba3a, 0x060e, 0x07f0, 0x0000, - 0x0018, 0x00ff, 0x0630, 0xde00, 0x1818, 0x3c18, 0x0000, 0x0018, - 0x7618, 0x180c, 0x6c06, 0x7e18, 0x6606, 0x0000, 0x707e, 0x1c18, - 0xd67e, 0x6660, 0x6660, 0x6066, 0x6618, 0x06d8, 0x60d6, 0x7e66, - 0x7e66, 0xf81c, 0x1866, 0x66d6, 0x1818, 0x3018, 0x1818, 0xc600, - 0x003e, 0x6660, 0x6666, 0x1866, 0x6618, 0x0cf0, 0x18d6, 0x6666, - 0x6666, 0x6070, 0x1866, 0x66d6, 0x3c66, 0x18f0, 0x181e, 0x9c24, - 0x6066, 0x663e, 0x3e3e, 0x3e60, 0x6666, 0x6618, 0x1818, 0x7e7e, - 0x7c7b, 0xf866, 0x6666, 0x6666, 0x6666, 0x6660, 0xfe18, 0x6618, - 0x3e18, 0x6666, 0x667e, 0x7e66, 0x3000, 0x0030, 0x3218, 0x6c6c, - 0x3e66, 0x766e, 0xdbd8, 0x7e7e, 0x6600, 0x0000, 0x7aa2, 0xba00, - 0x6666, 0x6e0c, 0x360c, 0x6618, 0x0c66, 0x6600, 0x061c, 0x660c, - 0xc636, 0x061c, 0x3606, 0xc666, 0x1806, 0x3606, 0x0666, 0x38ef, - 0x8866, 0x6028, 0x0cc6, 0x6630, 0x8242, 0x6c42, 0x9292, 0xfcc6, - 0x7e18, 0x381c, 0x1818, 0x003e, 0x0000, 0x00d0, 0x0000, 0x0000, - 0x0024, 0xc32c, 0x3492, 0xf292, 0x8c81, 0x3cf8, 0x1012, 0x799e, - 0xc606, 0xc006, 0x0606, 0xc606, 0xc606, 0x7e10, 0x0ff8, 0x0000, - 0x0018, 0x00ff, 0x0636, 0xde00, 0x1818, 0x3c18, 0x0000, 0x0030, - 0x6618, 0x180c, 0x6c06, 0x6618, 0x6606, 0x0000, 0x387e, 0x3818, - 0xdc7e, 0x6660, 0x6660, 0x6066, 0x6618, 0x06d8, 0x60c6, 0x6e66, - 0x7c66, 0xd80e, 0x1866, 0x66fe, 0x3c18, 0x3018, 0x0c18, 0x0000, - 0x007e, 0x6660, 0x667e, 0x1866, 0x6618, 0x0cf8, 0x18d6, 0x6666, - 0x6666, 0x603c, 0x1866, 0x66fe, 0x1866, 0x1838, 0x1838, 0x0066, - 0x6066, 0x7e7e, 0x7e7e, 0x7e60, 0x7e7e, 0x7e18, 0x1818, 0x7e7e, - 0x60ff, 0xf866, 0x6666, 0x6666, 0x6666, 0x6666, 0x307e, 0x6618, - 0x7e18, 0x6666, 0x667e, 0x6666, 0x307e, 0x7e6e, 0x6618, 0xd836, - 0x7e66, 0x767e, 0xdfd8, 0x7e7e, 0x6600, 0x0000, 0x0aba, 0xaa00, - 0x6666, 0x6e0c, 0x360c, 0x6618, 0x0c66, 0x6600, 0x0630, 0x6e0c, - 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0x0000, 0x0000, 0x3000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0040, 0x0000, 0x0000, 0x8000, 0x7c00, 0x0000, 0xe000, 0x0000, - 0x0000, 0x0000, 0x1800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x1754, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x2000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0020, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x007c, 0x0000, 0x7800, 0x0000, 0x0000, - 0x6006, 0x0000, 0x0000, 0x0000, 0x007c, 0x0000, 0x0000, 0x0000, - 0x3800, 0x0000, 0x0000, 0x0038, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x7c00, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x3878, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x1800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, -}; - -const struct font_head fnt_st_8x16 = { - 1, /* WORD font_id */ - 10, /* WORD point */ - "8x16 system font", /* BYTE name[32] */ - 0, /* WORD first_ade */ - 255, /* WORD last_ade */ - 13, /* UWORD top */ - 11, /* UWORD ascent */ - 8, /* UWORD half */ - 2, /* UWORD descent */ - 2, /* UWORD bottom */ - 7, /* UWORD max_char_width */ - 8, /* UWORD max_cell_width */ - 1, /* UWORD left_offset */ - 7, /* UWORD right_offset */ - 1, /* UWORD thicken */ - 1, /* UWORD ul_size */ - 0x5555, /* UWORD lighten */ - 0x5555, /* UWORD skew */ - F_STDFORM | F_MONOSPACE | F_DEFAULT, /* UWORD flags */ - 0, /* UBYTE *hor_table */ - off_table, /* UWORD *off_table */ - dat_table, /* UWORD *dat_table */ - 256, /* UWORD form_width */ - 16, /* UWORD form_height */ - 0, /* struct font * next_font */ - 0 /* UWORD next_seg */ -}; diff --git a/video/offscreen.c b/video/offscreen.c deleted file mode 100644 index 853b446..0000000 --- a/video/offscreen.c +++ /dev/null @@ -1,294 +0,0 @@ -/* - * offscreen.c - * - * based from Emutos / BDOS - * - * Copyright (c) 2001 Lineo, Inc. - * - * Authors: Karl T. Braun, Martin Doering, Laurent Vogel - * - * This file is distributed under the GPL, version 2 or at your - * option any later version. - */ - -#include "bas_types.h" -#include "bas_string.h" -#include "fb.h" - -#undef DEBUG - -/* MD - Memory Descriptor */ - -#define MD struct _md_ - -MD -{ - MD *m_link; - long m_start; - long m_length; - void *m_own; -}; - -/* MPB - Memory Partition Block */ - -#define MPB struct _mpb - -MPB -{ - MD *mp_mfl; - MD *mp_mal; - MD *mp_rover; -}; - -#define MAXMD 256 - -static MD tab_md[MAXMD]; -static MPB pmd; -static long wrap; - -static void *xmgetblk(void) -{ - int i; - for (i = 0; i < MAXMD; i++) - { - if(tab_md[i].m_own == NULL) - { - tab_md[i].m_own = (void*)1L; - return(&tab_md[i]); - } - } - return(NULL); -} - -static void xmfreblk(void *m) -{ - int i = (int)(((long)m - (long)tab_md) / sizeof(MD)); - if((i > 0) && (i < MAXMD)) - tab_md[i].m_own = NULL; -} - -static MD *ffit(long amount, MPB *mp) -{ - MD *p,*q,*p1; /* free list is composed of MD's */ - int maxflg; - long maxval; - if(amount != -1) - { -#if 1 - amount += (wrap - 1); - amount /= wrap; - amount *= wrap; /* screen line alignment */ -#else - amount += 15; /* 16 bytes alignment */ - amount &= 0xFFFFFFF0; -#endif - } - if((q = mp->mp_rover) == 0) /* get rotating pointer */ - return(0) ; - maxval = 0; - maxflg = ((amount == -1) ? true : false) ; - p = q->m_link; /* start with next MD */ - do /* search the list for an MD with enough space */ - { - if(p == NULL) - { - /* at end of list, wrap back to start */ - q = (MD *) &mp->mp_mfl; /* q => mfl field */ - p = q->m_link; /* p => 1st MD */ - } - if((!maxflg) && (p->m_length >= amount)) - { - /* big enough */ - if(p->m_length == amount) - q->m_link = p->m_link; /* take the whole thing */ - else - { - /* break it up - 1st allocate a new - MD to describe the remainder */ - p1 = xmgetblk(); - if(p1 == NULL) - return(NULL); - /* init new MD */ - p1->m_length = p->m_length - amount; - p1->m_start = p->m_start + amount; - p1->m_link = p->m_link; - p->m_length = amount; /* adjust allocated block */ - q->m_link = p1; - } - /* link allocate block into allocated list, - mark owner of block, & adjust rover */ - p->m_link = mp->mp_mal; - mp->mp_mal = p; - mp->mp_rover = (q == (MD *) &mp->mp_mfl ? q->m_link : q); - return(p); /* got some */ - } - else if(p->m_length > maxval) - maxval = p->m_length; - p = ( q=p )->m_link; - } - while(q != mp->mp_rover); - /* return either the max, or 0 (error) */ - if(maxflg) - { - maxval -= 15; /* 16 bytes alignment */ - if(maxval < 0) - maxval = 0; - else - maxval &= 0xFFFFFFF0; - } - return(maxflg ? (MD *) maxval : 0); -} - -static void freeit(MD *m, MPB *mp) -{ - MD *p, *q; - q = NULL; - for (p = mp->mp_mfl; p ; p = (q=p) -> m_link) - { - if(m->m_start <= p->m_start) - break; - } - m->m_link = p; - if(q) - q->m_link = m; - else - mp->mp_mfl = m; - if(!mp->mp_rover) - mp->mp_rover = m; - if(p) - { - if(m->m_start + m->m_length == p->m_start) - { /* join to higher neighbor */ - m->m_length += p->m_length; - m->m_link = p->m_link; - if(p == mp->mp_rover) - mp->mp_rover = m; - xmfreblk(p); - } - } - if(q) - { - if(q->m_start + q->m_length == m->m_start) - { /* join to lower neighbor */ - q->m_length += m->m_length; - q->m_link = m->m_link; - if(m == mp->mp_rover) - mp->mp_rover = q; - xmfreblk(m); - } - } -} - -long offscreen_free(struct fb_info *info, long addr) -{ - MD *p,**q; - MPB *mpb; -#ifdef DEBUG - char buf[10]; - Funcs_puts("radeon_offscreen_free(0x"); - Funcs_ltoa(buf, addr, 16); - Funcs_puts(buf); - Funcs_puts("\r\n"); -#endif - //*vblsem = 0; - mpb = &pmd; - for (p = *(q = &mpb->mp_mal); p; p = *(q = &p->m_link)) - { - if(addr == p->m_start) - break; - } - if(!p) - { - // *vblsem = 1; - return -1; //(EFAULT); - } - *q = p->m_link; - freeit(p,mpb); - //*vblsem = 1; - return(0); -} - -long offscreen_alloc(struct fb_info *info, long amount) -{ - long ret; - MD *m; -#ifdef DEBUG - char buf[10]; - Funcs_puts("radeon_offscreen_alloc(0x"); - Funcs_ltoa(buf, amount, 16); - Funcs_puts(buf); - Funcs_puts(") = 0x"); -#endif - // *vblsem = 0; - if(amount == -1L) - { - ret = (long)ffit(-1L,&pmd); - // *vblsem = 1; - return(ret); - } - if(amount <= 0 ) - { - // *vblsem = 1; - return(0); - } - if((amount & 1)) - amount++; - m = ffit(amount,&pmd); - if(m == NULL) - { -#ifdef DEBUG - Funcs_puts("0\r\n"); -#endif - // *vblsem = 1; - return(0); - } -#ifdef DEBUG - Funcs_ltoa(buf, m->m_start, 16); - Funcs_puts(buf); - Funcs_puts("\r\n"); -#endif - ret = (long)m->m_start; - // *vblsem = 1; - return(ret); -} - -long offscren_reserved(struct fb_info *info) -{ - return((long) info->ram_base + (long) info->ram_size); -} - -void offscreen_init(struct fb_info *info) -{ -#ifdef DEBUG - char buf[10]; -#endif - long size_screen, max_offscreen_size; - wrap = (long) info->var.xres_virtual * (long)(info->var.bits_per_pixel / 8); - size_screen = (long)info->var.yres_virtual * wrap; - if(!size_screen) - size_screen = (long)info->screen_size; - pmd.mp_mfl = pmd.mp_rover = &tab_md[0]; - tab_md[0].m_link = (MD *)NULL; - tab_md[0].m_start = (long)((unsigned long)info->ram_base + (unsigned long)size_screen); - tab_md[0].m_length = (long)info->ram_size - size_screen; - tab_md[0].m_own = (void *)1L; - max_offscreen_size = ((long)info->var.xres_virtual * 8192L * (long)(info->var.bits_per_pixel / 8)) - size_screen; - if(max_offscreen_size < 0) - max_offscreen_size = 0; - if(tab_md[0].m_length > max_offscreen_size) - tab_md[0].m_length = max_offscreen_size; -#ifdef DEBUG - Funcs_puts("offscreen_init start 0x"); - Funcs_ltoa(buf, tab_md[0].m_start, 16); - Funcs_puts(buf); - Funcs_puts(", length 0x"); - Funcs_ltoa(buf, tab_md[0].m_length, 16); - Funcs_puts(buf); - Funcs_puts(", ram_size 0x"); - Funcs_ltoa(buf, (long)info->ram_size, 16); - Funcs_puts(buf); - Funcs_puts("\r\n"); -#endif - pmd.mp_mal = (MD *)NULL; -} - diff --git a/video/vdi_fill.c b/video/vdi_fill.c deleted file mode 100644 index 6b789a9..0000000 --- a/video/vdi_fill.c +++ /dev/null @@ -1,1112 +0,0 @@ -/* - * - * - * Copyright 1982 by Digital Research Inc. All rights reserved. - * Copyright 1999 by Caldera, Inc. and Authors: - * Copyright 2002-2013 The EmuTOS development team - * - * This file is distributed under the GPL, version 2 or at your - * option any later version. See doc/license.txt for details. - */ - - - -#include "config.h" -#include "portab.h" -#include "vdi_defs.h" -#include "tosvars.h" -#include "lineavars.h" - -#define EMPTY 0xffff -#define DOWN_FLAG 0x8000 -#define QSIZE 200 -#define QMAX QSIZE-1 - - - -#define ABS(v) (v & 0x7FFF) - - - -/* prototypes */ -static void crunch_queue(void); -static BOOL clipbox(Vwk * vwk, Rect * rect); - - - -/* Global variables */ -static UWORD search_color; /* the color of the border */ - - -/* some kind of stack for the segments to fill */ -static WORD queue[QSIZE]; /* storage for the seed points */ -static WORD qbottom; /* the bottom of the queue (zero) */ -static WORD qtop; /* points top seed +3 */ -static WORD qptr; /* points to the active point */ -static WORD qtmp; -static WORD qhole; /* an empty space in the queue */ - - -/* the storage for the used defined fill pattern */ -const UWORD ROM_UD_PATRN[16] = { - 0x07E0, 0x0FF0, 0x1FD8, 0x1808, 0x1808, 0x1008, 0x1E78, 0x1348, - 0x1108, 0x0810, 0x0B70, 0x0650, 0x07A0, 0x1E20, 0x1BC0, 0x1800 -}; - -static const UWORD OEMMSKPAT = 7; -static const UWORD OEMPAT[128] = { - /* Brick */ - 0xFFFF, 0x8080, 0x8080, 0x8080, 0xFFFF, 0x0808, 0x0808, 0x0808, - /* Diagonal Bricks */ - 0x2020, 0x4040, 0x8080, 0x4141, 0x2222, 0x1414, 0x0808, 0x1010, - /* Grass */ - 0x0000, 0x0000, 0x1010, 0x2828, 0x0000, 0x0000, 0x0101, 0x8282, - /* Trees */ - 0x0202, 0x0202, 0xAAAA, 0x5050, 0x2020, 0x2020, 0xAAAA, 0x0505, - /* Dashed x's */ - 0x4040, 0x8080, 0x0000, 0x0808, 0x0404, 0x0202, 0x0000, 0x2020, - /* Cobble Stones */ - 0x6606, 0xC6C6, 0xD8D8, 0x1818, 0x8181, 0x8DB1, 0x0C33, 0x6000, - /* Sand */ - 0x0000, 0x0000, 0x0400, 0x0000, 0x0010, 0x0000, 0x8000, 0x0000, - /* Rough Weave */ - 0xF8F8, 0x6C6C, 0xC6C6, 0x8F8F, 0x1F1F, 0x3636, 0x6363, 0xF1F1, - /* Quilt */ - 0xAAAA, 0x0000, 0x8888, 0x1414, 0x2222, 0x4141, 0x8888, 0x0000, - /* Paterned Cross */ - 0x0808, 0x0000, 0xAAAA, 0x0000, 0x0808, 0x0000, 0x8888, 0x0000, - /* Balls */ - 0x7777, 0x9898, 0xF8F8, 0xF8F8, 0x7777, 0x8989, 0x8F8F, 0x8F8F, - /* Verticle Scales */ - 0x8080, 0x8080, 0x4141, 0x3E3E, 0x0808, 0x0808, 0x1414, 0xE3E3, - /* Diagonal scales */ - 0x8181, 0x4242, 0x2424, 0x1818, 0x0606, 0x0101, 0x8080, 0x8080, - /* Checker Board */ - 0xF0F0, 0xF0F0, 0xF0F0, 0xF0F0, 0x0F0F, 0x0F0F, 0x0F0F, 0x0F0F, - /* Filled Diamond */ - 0x0808, 0x1C1C, 0x3E3E, 0x7F7F, 0xFFFF, 0x7F7F, 0x3E3E, 0x1C1C, - /* Herringbone */ - 0x1111, 0x2222, 0x4444, 0xFFFF, 0x8888, 0x4444, 0x2222, 0xFFFF -}; - -static const UWORD DITHRMSK = 3; /* mask off all but four scans */ -static const UWORD DITHER[32] = { - 0x0000, 0x4444, 0x0000, 0x1111, /* intensity level 2 */ - 0x0000, 0x5555, 0x0000, 0x5555, /* intensity level 4 */ - 0x8888, 0x5555, 0x2222, 0x5555, /* intensity level 6 */ - 0xAAAA, 0x5555, 0xAAAA, 0x5555, /* intensity level 8 */ - 0xAAAA, 0xDDDD, 0xAAAA, 0x7777, /* intensity level 10 */ - 0xAAAA, 0xFFFF, 0xAAAA, 0xFFFF, /* intensity level 12 */ - 0xEEEE, 0xFFFF, 0xBBBB, 0xFFFF, /* intensity level 14 */ - 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF /* intensity level 16 */ -}; - -static const UWORD HAT_0_MSK = 7; -static const UWORD HATCH0[48] = { - /* narrow spaced + 45 */ - 0x0101, 0x0202, 0x0404, 0x0808, 0x1010, 0x2020, 0x4040, 0x8080, - /* medium spaced thick 45 deg */ - 0x6060, 0xC0C0, 0x8181, 0x0303, 0x0606, 0x0C0C, 0x1818, 0x3030, - /* medium +-45 deg */ - 0x4242, 0x8181, 0x8181, 0x4242, 0x2424, 0x1818, 0x1818, 0x2424, - /* medium spaced vertical */ - 0x8080, 0x8080, 0x8080, 0x8080, 0x8080, 0x8080, 0x8080, 0x8080, - /* medium spaced horizontal */ - 0xFFFF, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - /* medium spaced cross */ - 0xFFFF, 0x8080, 0x8080, 0x8080, 0x8080, 0x8080, 0x8080, 0x8080 -}; - -static const UWORD HAT_1_MSK = 0xF; -static const UWORD HATCH1[96] = { - /* wide +45 deg */ - 0x0001, 0x0002, 0x0004, 0x0008, 0x0010, 0x0020, 0x0040, 0x0080, - 0x0100, 0x0200, 0x0400, 0x0800, 0x1000, 0x2000, 0x4000, 0x8000, - /* widely spaced thick 45 deg */ - 0x8003, 0x0007, 0x000E, 0x001C, 0x0038, 0x0070, 0x00E0, 0x01C0, - 0x0380, 0x0700, 0x0E00, 0x1C00, 0x3800, 0x7000, 0x0E000, 0x0C001, - /* widely +- 45 deg */ - 0x8001, 0x4002, 0x2004, 0x1008, 0x0810, 0x0420, 0x0240, 0x0180, - 0x0180, 0x0240, 0x0420, 0x0810, 0x1008, 0x2004, 0x4002, 0x8001, - /* widely spaced vertical */ - 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, - 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, - /* widely spaced horizontal */ - 0xFFFF, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - /* widely spaced horizontal/vert cross */ - 0xFFFF, 0x8080, 0x8080, 0x8080, 0x8080, 0x8080, 0x8080, 0x8080, - 0xFFFF, 0x8080, 0x8080, 0x8080, 0x8080, 0x8080, 0x8080, 0x8080, -}; - -const UWORD HOLLOW = 0; -const UWORD SOLID = 0xFFFF; - - - -/* - * dsf_udpat - Update pattern - */ - -void -dsf_udpat(Vwk * vwk) -{ - WORD *sp, *dp, i, count; - - count = CONTRL[3]; - - if (count == 16) - vwk->multifill = 0; /* Single Plane Pattern */ - else if (count == (INQ_TAB[4] * 16)) - vwk->multifill = 1; /* Valid Multi-plane pattern */ - else - return; /* Invalid pattern, return */ - - sp = INTIN; - dp = &vwk->ud_patrn[0]; - for (i = 0; i < count; i++) - *dp++ = *sp++; -} - - - -/* - * _vsf_interior - Set fill style - */ - -void -_vsf_interior(Vwk * vwk) -{ - WORD fs; - - CONTRL[4] = 1; - fs = *INTIN; - if ((fs > MX_FIL_STYLE) || (fs < 0)) - fs = 0; - *INTOUT = vwk->fill_style = fs; - st_fl_ptr(vwk); -} - - - -/* S_FILL_INDEX: */ -void -_vsf_style(Vwk * vwk) -{ - WORD fi; - - CONTRL[4] = 1; - fi = *INTIN; - - if (vwk->fill_style == 2) { - if ((fi > MX_FIL_PAT_INDEX) || (fi < 1)) - fi = 1; - } else { - if ((fi > MX_FIL_HAT_INDEX) || (fi < 1)) - fi = 1; - } - vwk->fill_index = (*INTOUT = fi) - 1; - st_fl_ptr(vwk); -} - - - -/* S_FILL_COLOR: */ -void -_vsf_color(Vwk * vwk) -{ - WORD fc; - - *(CONTRL + 4) = 1; - fc = *INTIN; - if ((fc >= DEV_TAB[13]) || (fc < 0)) - fc = 1; - - *INTOUT = fc; - vwk->fill_color = MAP_COL[fc]; -} - - - -/* ST_FILLPERIMETER: */ -void -_vsf_perimeter(Vwk * vwk) -{ - WORD *int_out; - - int_out = INTOUT; - - if (*INTIN == 0) { - *int_out = 0; - vwk->fill_per = FALSE; - } else { - *(int_out) = 1; - vwk->fill_per = TRUE; - } - CONTRL[4] = 1; -} - - -/* - * dr_recfl - draw filled rectangle - */ - -void -dr_recfl(Vwk * vwk) -{ - Rect * rect = (Rect*)PTSIN; - - if (vwk->clip) - if (!clipbox(vwk, rect)) - return; - - /* do the real work... */ - draw_rect(vwk, rect, vwk->fill_color); -} - - - -/* - * _v_cellarray - Draw a square of sqares (just color devices) - */ -void -_v_cellarray(Vwk * vwk) -{ - /* not implemented */ -} - - - -/* - * _vq_cellarray - - */ -void -_vq_cellarray(Vwk * vwk) -{ - /* not implemented */ -} - - - -/* - * vql_attr - Inquire current fill area attributes - */ - -void -vqf_attr(Vwk * vwk) -{ - WORD *pointer; - - pointer = INTOUT; - *pointer++ = vwk->fill_style; - *pointer++ = REV_MAP_COL[vwk->fill_color]; - *pointer++ = vwk->fill_index + 1; - *pointer++ = vwk->wrt_mode + 1; - *pointer = vwk->fill_per; - - CONTRL[4] = 5; -} - - - -/* - * st_fl_ptr - set fill pattern? - */ - -void -st_fl_ptr(Vwk * vwk) -{ - WORD fi, pm; - const UWORD *pp = NULL; - - fi = vwk->fill_index; - pm = 0; - switch (vwk->fill_style) { - case 0: - pp = &HOLLOW; - break; - - case 1: - pp = &SOLID; - break; - - case 2: - if (fi < 8) { - pm = DITHRMSK; - pp = &DITHER[fi * (pm + 1)]; - } else { - pm = OEMMSKPAT; - pp = &OEMPAT[(fi - 8) * (pm + 1)]; - } - break; - case 3: - if (fi < 6) { - pm = HAT_0_MSK; - pp = &HATCH0[fi * (pm + 1)]; - } else { - pm = HAT_1_MSK; - pp = &HATCH1[(fi - 6) * (pm + 1)]; - } - break; - case 4: - pm = 0x000f; - pp = (UWORD *)&vwk->ud_patrn[0]; - break; - } - vwk->patptr = (UWORD *)pp; - vwk->patmsk = pm; -} - - - -/* - * bub_sort - sorts an array of words - * - * This routine bubble-sorts an array of words into ascending order. - * - * input: - * buf - ptr to start of array. - * count - number of words in array. - */ - -static void -bub_sort (WORD * buf, WORD count) -{ - int i, j; - - for (i = count-1; i > 0; i--) { - WORD * ptr = buf; /* reset pointer to the array */ - for (j = 0; j < i; j++) { - WORD val = *ptr++; /* word */ /* get next value */ - if ( val > *ptr ) { /* yes - do nothing */ - *(ptr-1) = *ptr; /* word */ /* nope - swap them */ - *ptr = val; /* word */ - } - } - } -} - - - -/* - * clc_flit - draw a filled polygon - * - * (Sutherland and Hodgman Polygon Clipping Algorithm) - * - * For each non-horizontal scanline crossing poly, do: - * - find intersection points of scan line with poly edges. - * - Sort intersections left to right - * - Draw pixels between each pair of points (x coords) on the scan line - */ -/* - * the buffer used by clc_flit() has been temporarily moved from the - * stack to a local static area. this avoids some cases of stack - * overflow when the VDI is called from the AES (and the stack is the - * small one located in the UDA). this fix allows GemAmigo to run. - * - * this change restores the situation that existed in the original - * DRI code, when clc_flit() was written in assembler; the buffer - * was moved to the stack when clc_flit() was re-implemented in C. - */ -#define MAX_INTERSECTIONS 256 -static WORD fill_buffer[MAX_INTERSECTIONS]; - -void -clc_flit (const VwkAttrib * attr, const VwkClip * clipper, const Point * point, WORD y, int vectors) -{ -// WORD fill_buffer[256]; /* must be 256 words or it will fail */ - WORD * bufptr; /* point to array of x-values. */ - int intersections; /* count of intersections */ - int i; - - /* Initialize the pointers and counters. */ - intersections = 0; /* reset counter */ - bufptr = fill_buffer; - - /* find intersection points of scan line with poly edges. */ - for (i = vectors - 1; i >= 0; i--) { - WORD x1, x2, y1, y2, dy; - - x1 = point->x; /* fetch x-value of 1st endpoint. */ - y1 = point->y; /* fetch y-value of 1st endpoint. */ - point++; - x2 = point->x; /* fetch x-value of 2nd endpoint. */ - y2 = point->y; /* fetch y-value of 2nd endpoint. */ - - /* if the current vector is horizontal, ignore it. */ - dy = y2 - y1; - if ( dy ) { - LONG dy1, dy2; - - /* fetch scan-line y. */ - dy1 = y - y1; /* d4 - delta y1. */ - dy2 = y - y2; /* d3 - delta y2. */ - - /* - * Determine whether the current vector intersects with the scan - * line we wish to draw. This test is performed by computing the - * y-deltas of the two endpoints from the scan line. - * If both deltas have the same sign, then the line does - * not intersect and can be ignored. The origin for this - * test is found in Newman and Sproull. - */ - if ((dy1 < 0) != (dy2 < 0)) { - int dx = (x2 - x1) << 1; /* so we can round by adding 1 below */ - if (++intersections > MAX_INTERSECTIONS) - break; - /* fill edge buffer with x-values */ - if ( dx < 0 ) { - *bufptr++ = ((dy2 * dx / dy + 1) >> 1) + x2; - } - else { - *bufptr++ = ((dy1 * dx / dy + 1) >> 1) + x1; - } - } - } - } - - /* - * All of the points of intersection have now been found. If there - * were none then there is nothing more to do. Otherwise, sort the - * list of points of intersection in ascending order. - * (The list contains only the x-coordinates of the points.) - */ - - /* anything to do? */ - if (intersections == 0) - return; - - /* bubblesort the intersections, if it makes sense */ - if ( intersections > 1 ) - bub_sort(fill_buffer, intersections); - - if (attr->clip) { - /* Clipping is in force. Once the endpoints of the line segment have */ - /* been adjusted for the border, clip them to the left and right sides */ - /* of the clipping rectangle. */ - - /* The x-coordinates of each line segment are adjusted so that the */ - /* border of the figure will not be drawn with the fill pattern. */ - - /* loop through buffered points */ - WORD * ptr = fill_buffer; - for (i = intersections / 2 - 1; i >= 0; i--) { - WORD x1, x2; - Rect rect; - - /* grab a pair of adjusted intersections */ - x1 = *ptr++ + 1; - x2 = *ptr++ - 1; - - /* do nothing, if starting point greater than ending point */ - if ( x1 > x2 ) - continue; - - if ( x1 < clipper->xmn_clip ) { - if ( x2 < clipper->xmn_clip ) - continue; /* entire segment clipped left */ - x1 = clipper->xmn_clip; /* clip left end of line */ - } - - if ( x2 > clipper->xmx_clip ) { - if ( x1 > clipper->xmx_clip ) - continue; /* entire segment clippped */ - x2 = clipper->xmx_clip; /* clip right end of line */ - } - rect.x1 = x1; - rect.y1 = y; - rect.x2 = x2; - rect.y2 = y; - - /* rectangle fill routine draws horizontal line */ - draw_rect_common(attr, &rect); - } - } - else { - /* Clipping is not in force. Draw from point to point. */ - - /* This code has been modified from the version in the screen driver. */ - /* The x-coordinates of each line segment are adjusted so that the */ - /* border of the figure will not be drawn with the fill pattern. If */ - /* the starting point is greater than the ending point then nothing is */ - /* done. */ - - /* loop through buffered points */ - WORD * ptr = fill_buffer; - for (i = intersections / 2 - 1; i >= 0; i--) { - WORD x1, x2; - Rect rect; - - /* grab a pair of adjusted endpoints */ - x1 = *ptr++ + 1 ; /* word */ - x2 = *ptr++ - 1 ; /* word */ - - /* If starting point greater than ending point, nothing is done. */ /* is start still to left of end? */ - if ( x1 <= x2 ) { - rect.x1 = x1; - rect.y1 = y; - rect.x2 = x2; - rect.y2 = y; - - /* rectangle fill routine draws horizontal line */ - draw_rect_common(attr, &rect); - } - } - } -} - - -/* - * polygon - draw a filled polygon - */ - -void -polygon(Vwk * vwk, Point * ptsin, int count) -{ - WORD i, k, y; - WORD fill_maxy, fill_miny; - Point * point, * ptsget, * ptsput; - VwkClip *clipper; - VwkAttrib attr; - - LSTLIN = FALSE; - - /* find out the total min and max y values */ - point = ptsin; - fill_maxy = fill_miny = point->y; - for (i = count - 1; i > 0; i--) { - point++; - k = point->y; - - if (k < fill_miny) - fill_miny = k; - else - if (k > fill_maxy) - fill_maxy = k; - } - - if (vwk->clip) { - if (fill_miny < vwk->ymn_clip) { - if (fill_maxy >= vwk->ymn_clip) { - /* polygon starts before clip */ - fill_miny = vwk->ymn_clip - 1; /* polygon partial overlap */ - if (fill_miny < 1) - fill_miny = 1; - } else - return; /* polygon entirely before clip */ - } - if (fill_maxy > vwk->ymx_clip) { - if (fill_miny <= vwk->ymx_clip) /* polygon ends after clip */ - fill_maxy = vwk->ymx_clip; /* polygon partial overlap */ - else - return; /* polygon entirely after clip */ - } - } - - /* close the polygon, connect last and first point */ - ptsget = ptsin; - ptsput = ptsin + count; - ptsput->x = ptsget->x; - ptsput->y = ptsget->y; - - /* cast structure needed by clc_flit */ - clipper = VDI_CLIP(vwk); - /* copy data needed by clc_flit -> draw_rect_common */ - Vwk2Attrib(vwk, &attr, vwk->fill_color); - - /* really draw it */ - for (y = fill_maxy; y > fill_miny; y--) { - clc_flit(&attr, clipper, ptsin, y, count); - } - if (vwk->fill_per == TRUE) { - LN_MASK = 0xffff; - polyline(vwk, ptsin, count+1, vwk->fill_color); - } -} - - - -/* - * _v_fillarea - Fill an area - */ - -void -_v_fillarea(Vwk * vwk) -{ - Point * point = (Point*)PTSIN; - int count = CONTRL[1]; - -#if 0 -#if HAVE_BEZIER - /* check, if we want to draw a filled bezier curve */ - if (CONTRL[5] == 13 && vwk->bez_qual ) - v_bez_fill(vwk, point, count); - else -#endif -#endif - polygon(vwk, point, count); -} - - - -/* - * clipbox - Just clips and copies the inputs for use by "rectfill" - * - * input: - * X1 = x coord of upper left corner. - * Y1 = y coord of upper left corner. - * X2 = x coord of lower right corner. - * Y2 = y coord of lower right corner. - * vwk->clip = clipping flag. (0 => no clipping.) - * vwk->xmn_clip = x clipping minimum. - * vwk->xmx_clip = x clipping maximum. - * vwk->ymn_clip = y clipping minimum. - * vwk->ymx_clip = y clipping maximum. - * - * output: - * X1 = x coord of upper left corner. - * Y1 = y coord of upper left corner. - * X2 = x coord of lower right corner. - * Y2 = y coord of lower right corner. - */ - -static BOOL -clipbox(Vwk * vwk, Rect * rect) -{ - WORD x1, y1, x2, y2; - - x1 = rect->x1; - y1 = rect->y1; - x2 = rect->x2; - y2 = rect->y2; - - /* clip x coordinates */ - if ( x1 < vwk->xmn_clip) { - if (x2 < vwk->xmn_clip) { - return(FALSE); /* clipped box is null */ - } - rect->x1 = vwk->xmn_clip; - } - if ( x2 > vwk->xmx_clip) { - if (x1 > vwk->xmx_clip) { - return(FALSE); /* clipped box is null */ - } - rect->x2 = vwk->xmx_clip; - } - /* clip y coordinates */ - if ( y1 < vwk->ymn_clip) { - if (y2 < vwk->ymn_clip) { - return(FALSE); /* clipped box is null */ - } - rect->y1 = vwk->ymn_clip; - } - if ( y2 > vwk->ymx_clip) { - if (y1 > vwk->ymx_clip) { - return(FALSE); /* clipped box is null */ - } - rect->y2 = vwk->ymx_clip; - } - return (TRUE); -} - - -/* - * get_color - Get color value of requested pixel. - */ -static UWORD -get_color (UWORD mask, UWORD * addr) -{ - UWORD color = 0; /* clear the pixel value accumulator. */ - WORD plane = v_planes; - - while(1) { - /* test the bit. */ - if ( *--addr & mask ) - color |= 1; /* if 1, set color accumulator bit. */ - - if ( --plane == 0 ) - break; - - color <<= 1; /* shift accumulator for next bit_plane. */ - } - - return color; /* this is the color we are searching for */ -} - -/* - * pixelread - gets a pixel's color index value - * - * input: - * PTSIN(0) = x coordinate. - * PTSIN(1) = y coordinate. - * output: - * pixel value - */ - -static UWORD -pixelread(const WORD x, const WORD y) -{ - UWORD *addr; - UWORD mask; - - /* convert x,y to start adress and bit mask */ - addr = get_start_addr(x, y); - addr += v_planes; /* start at highest-order bit_plane */ - mask = 0x8000 >> (x&0xf); /* initial bit position in WORD */ - - return get_color(mask, addr); /* return the composed color value */ -} - -static UWORD -search_to_right (Vwk * vwk, WORD x, UWORD mask, const UWORD search_col, UWORD * addr) -{ - /* is x coord < x resolution ? */ - while( x++ < vwk->xmx_clip ) { - UWORD color; - - /* need to jump over interleaved bit_plane? */ - mask = mask >> 1 | mask << 15; /* roll right */ - if ( mask & 0x8000 ) - addr += v_planes; - - /* search, while pixel color != search color */ - color = get_color(mask, addr); - if ( search_col != color ) { - break; - } - - } - - return x - 1; /* output x coord -1 to endxright. */ -} - -static UWORD -search_to_left (Vwk * vwk, WORD x, UWORD mask, const UWORD search_col, UWORD * addr) -{ - /* Now, search to the left. */ - while (x-- > vwk->xmn_clip) { - UWORD color; - - /* need to jump over interleaved bit_plane? */ - mask = mask >> 15 | mask << 1; /* roll left */ - if ( mask & 0x0001 ) - addr -= v_planes; - - /* search, while pixel color != search color */ - color = get_color(mask, addr); - if ( search_col != color ) - break; - - } - - return x + 1; /* output x coord + 1 to endxleft. */ -} - -/* - * end_pts - find the endpoints of a section of solid color - * - * (for the _seed_fill routine.) - * - * input: 4(sp) = xstart. - * 6(sp) = ystart. - * 8(sp) = ptr to endxleft. - * C(sp) = ptr to endxright. - * - * output: endxleft := left endpoint of solid color. - * endxright := right endpoint of solid color. - * d0 := success flag. - * 0 => no endpoints or xstart on edge. - * 1 => endpoints found. - * seed_type indicates the type of fill - */ - -static WORD -end_pts(Vwk * vwk, WORD x, WORD y, WORD *xleftout, WORD *xrightout, - BOOL seed_type) -{ - UWORD color; - UWORD * addr; - UWORD mask; - - /* see, if we are in the y clipping range */ - if ( y < vwk->ymn_clip || y > vwk->ymx_clip) - return 0; - - /* convert x,y to start adress and bit mask */ - addr = get_start_addr(x, y); - addr += v_planes; /* start at highest-order bit_plane */ - mask = 0x8000 >> (x & 0x000f); /* fetch the pixel mask. */ - - /* get search color and the left and right end */ - color = get_color (mask, addr); - *xrightout = search_to_right (vwk, x, mask, color, addr); - *xleftout = search_to_left (vwk, x, mask, color, addr); - - /* see, if the whole found segment is of search color? */ - if ( color != search_color ) { - return seed_type ^ 1; /* return segment not of search color */ - } - return seed_type ^ 0; /* return segment is of search color */ -} - -/* Prototypes local to this module */ -static WORD -get_seed(Vwk * vwk, WORD xin, WORD yin, WORD *xleftout, WORD *xrightout, - BOOL seed_type); - - -void -d_contourfill(Vwk * vwk) -{ - WORD newxleft; /* ends of line at oldy + */ - WORD newxright; /* the current direction */ - WORD oldxleft; /* left end of line at oldy */ - WORD oldxright; /* right end */ - WORD oldy; /* the previous scan line */ - WORD xleft; /* temporary endpoints */ - WORD xright; /* */ - WORD direction; /* is next scan line up or down */ - BOOL notdone; /* does seedpoint==search_color */ - BOOL gotseed; /* a seed was put in the Q */ - BOOL seed_type; /* indicates the type of fill */ - - xleft = PTSIN[0]; - oldy = PTSIN[1]; - - if (xleft < vwk->xmn_clip || xleft > vwk->xmx_clip || - oldy < vwk->ymn_clip || oldy > vwk->ymx_clip) - return; - - search_color = INTIN[0]; - - if ((WORD)search_color < 0) { - search_color = pixelread(xleft,oldy); - seed_type = 1; - } else { - const WORD plane_mask[] = { 1, 3, 7, 15 }; - - /* Range check the color and convert the index to a pixel value */ - if (search_color >= DEV_TAB[13]) - return; - - /* - * We mandate that white is all bits on. Since this yields 15 - * in rom, we must limit it to how many planes there really are. - * Anding with the mask is only necessary when the driver supports - * move than one resolution. - */ - search_color = - (MAP_COL[search_color] & plane_mask[INQ_TAB[4] - 1]); - seed_type = 0; - } - - /* Initialize the line drawing parameters */ - LSTLIN = FALSE; - - notdone = end_pts(vwk, xleft, oldy, &oldxleft, &oldxright, seed_type); - - qptr = qbottom = 0; - qtop = 3; /* one above highest seed point */ - queue[0] = (oldy | DOWN_FLAG); - queue[1] = oldxleft; - queue[2] = oldxright; /* stuff a point going down into the Q */ - - if (notdone) { - /* couldn't get point out of Q or draw it */ - while (1) { - Rect rect; - - direction = (oldy & DOWN_FLAG) ? 1 : -1; - gotseed = get_seed(vwk, oldxleft, (oldy + direction), - &newxleft, &newxright, seed_type); - - if ((newxleft < (oldxleft - 1)) && gotseed) { - xleft = oldxleft; - while (xleft > newxleft) { - --xleft; - get_seed(vwk, xleft, oldy ^ DOWN_FLAG, - &xleft, &xright, seed_type); - } - } - while (newxright < oldxright) { - ++newxright; - gotseed = get_seed(vwk, newxright, oldy + direction, - &xleft, &newxright, seed_type); - } - if ((newxright > (oldxright + 1)) && gotseed) { - xright = oldxright; - while (xright < newxright) { - ++xright; - get_seed(vwk, xright, oldy ^ DOWN_FLAG, - &xleft, &xright, seed_type); - } - } - - /* Eventually jump out here */ - if (qtop == qbottom) - break; - - while (queue[qptr] == EMPTY) { - qptr += 3; - if (qptr == qtop) - qptr = qbottom; - } - - oldy = queue[qptr]; - queue[qptr++] = EMPTY; - oldxleft = queue[qptr++]; - oldxright = queue[qptr++]; - if (qptr == qtop) - crunch_queue(); - - rect.x1 = oldxleft; - rect.y1 = ABS(oldy); - rect.x2 = oldxright; - rect.y2 = ABS(oldy); - - /* rectangle fill routine draws horizontal line */ - draw_rect(vwk, &rect, vwk->fill_color); - } - } -} /* end of fill() */ - -/* - * crunch_queue - move qtop down to remove unused seeds - */ -static void -crunch_queue(void) -{ - while ((queue[qtop - 3] == EMPTY) && (qtop > qbottom)) - qtop -= 3; - if (qptr >= qtop) - qptr = qbottom; -} - -/* - * get_seed - put seeds into Q, if (xin,yin) is not of search_color - */ -static WORD -get_seed(Vwk * vwk, WORD xin, WORD yin, WORD *xleftout, WORD *xrightout, - BOOL seed_type) -{ - if (end_pts(vwk, xin, ABS(yin), xleftout, xrightout, seed_type)) { - /* false if of search_color */ - for (qtmp = qbottom, qhole = EMPTY; qtmp < qtop; qtmp += 3) { - /* see, if we ran into another seed */ - if ( ((queue[qtmp] ^ DOWN_FLAG) == yin) && (queue[qtmp] != EMPTY) && - (queue[qtmp + 1] == *xleftout) ) - - { - /* we ran into another seed so remove it and fill the line */ - Rect rect; - - rect.x1 = *xleftout; - rect.y1 = ABS(yin); - rect.x2 = *xrightout; - rect.y2 = ABS(yin); - - /* rectangle fill routine draws horizontal line */ - draw_rect(vwk, &rect, vwk->fill_color); - - queue[qtmp] = EMPTY; - if ((qtmp + 3) == qtop) - crunch_queue(); - return 0; - } - if ((queue[qtmp] == EMPTY) && (qhole == EMPTY)) - qhole = qtmp; - } - - if (qhole == EMPTY) { - if ((qtop += 3) > QMAX) { - qtmp = qbottom; - qtop -= 3; - } - } else - qtmp = qhole; - - queue[qtmp++] = yin; /* put the y and endpoints in the Q */ - queue[qtmp++] = *xleftout; - queue[qtmp] = *xrightout; - return 1; /* we put a seed in the Q */ - } - - return 0; /* we didnt put a seed in the Q */ -} - - - -void -_v_get_pixel(Vwk * vwk) -{ - WORD pel; - WORD *int_out; - const WORD x = PTSIN[0]; /* fetch x coord. */ - const WORD y = PTSIN[1]; /* fetch y coord. */ - - /* Get the requested pixel */ - pel = (WORD)pixelread(x,y); - - int_out = INTOUT; - *int_out++ = pel; - - *int_out = REV_MAP_COL[pel]; - CONTRL[4] = 2; -} - - - -/* - * get_pix - gets a pixel (just for linea!) - * - * input: - * PTSIN(0) = x coordinate. - * PTSIN(1) = y coordinate. - * output: - * pixel value - */ -WORD -get_pix(void) -{ - /* return the composed color value */ - return pixelread(PTSIN[0], PTSIN[1]); -} - -/* - * put_pix - plot a pixel (just for linea!) - * - * input: - * INTIN(0) = pixel value. - * PTSIN(0) = x coordinate. - * PTSIN(1) = y coordinate. - */ -void -put_pix(void) -{ - UWORD *addr; - UWORD color; - UWORD mask; - int plane; - - const WORD x = PTSIN[0]; - const WORD y = PTSIN[1]; - - /* convert x,y to start adress */ - addr = get_start_addr(x, y); - /* co-ordinates can wrap, but cannot write outside screen, - * alternatively this could check against v_bas_ad+vram_size() - */ - if (addr < (UWORD*)v_bas_ad || addr >= get_start_addr(v_hz_rez, v_vt_rez)) { - return; - } - color = INTIN[0]; /* device dependent encoded color bits */ - mask = 0x8000 >> (x&0xf); /* initial bit position in WORD */ - - for (plane = v_planes-1; plane >= 0; plane-- ) { - color = color >> 1| color << 15; /* rotate color bits */ - if (color&0x8000) - *addr++ |= mask; - else - *addr++ &= ~mask; - } -} diff --git a/video/videl.c b/video/videl.c deleted file mode 100644 index 55eb450..0000000 --- a/video/videl.c +++ /dev/null @@ -1,885 +0,0 @@ -/* - * videl.c - Falcon VIDEL support - * - * Copyright (c) 2013 The EmuTOS development team - * - * Authors: - * PES Petr Stehlik - * RFB Roger Burrows - * - * This file is distributed under the GPL, version 2 or at your - * option any later version. See doc/license.txt for details. - */ - -#define DBG_VIDEL -#ifdef DBG_VIDEL -#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_VIDEL */ - -#include -#include -#include -#include "bas_printf.h" -#include "screen.h" -#include "videl.h" - -uint16_t *colorptr; - -static const int32_t videl_dflt_palette[] = { - FRGB_WHITE, FRGB_RED, FRGB_GREEN, FRGB_YELLOW, - FRGB_BLUE, FRGB_MAGENTA, FRGB_CYAN, FRGB_LTGRAY, - FRGB_GRAY, FRGB_LTRED, FRGB_LTGREEN, FRGB_LTYELLOW, - FRGB_LTBLUE, FRGB_LTMAGENTA, FRGB_LTCYAN, FRGB_BLACK, - 0xffff00ff, 0xeded00ed, 0xdddd00dd, 0xcccc00cc, - 0xbaba00ba, 0xaaaa00aa, 0x99990099, 0x87870087, - 0x77770077, 0x66660066, 0x54540054, 0x44440044, - 0x33330033, 0x21210021, 0x11110011, 0x00000000, - 0xff000000, 0xff000011, 0xff000021, 0xff000033, - 0xff000044, 0xff000054, 0xff000066, 0xff000077, - 0xff000087, 0xff000099, 0xff0000aa, 0xff0000ba, - 0xff0000cc, 0xff0000dd, 0xff0000ed, 0xff0000ff, - 0xed0000ff, 0xdd0000ff, 0xcc0000ff, 0xba0000ff, - 0xaa0000ff, 0x990000ff, 0x870000ff, 0x770000ff, - 0x660000ff, 0x540000ff, 0x440000ff, 0x330000ff, - 0x210000ff, 0x110000ff, 0x000000ff, 0x001100ff, - 0x002100ff, 0x003300ff, 0x004400ff, 0x005400ff, - 0x006600ff, 0x007700ff, 0x008700ff, 0x009900ff, - 0x00aa00ff, 0x00ba00ff, 0x00cc00ff, 0x00dd00ff, - 0x00ed00ff, 0x00ff00ff, 0x00ff00ed, 0x00ff00dd, - 0x00ff00cc, 0x00ff00ba, 0x00ff00aa, 0x00ff0099, - 0x00ff0087, 0x00ff0077, 0x00ff0066, 0x00ff0054, - 0x00ff0044, 0x00ff0033, 0x00ff0021, 0x00ff0011, - 0x00ff0000, 0x11ff0000, 0x21ff0000, 0x33ff0000, - 0x44ff0000, 0x54ff0000, 0x66ff0000, 0x77ff0000, - 0x87ff0000, 0x99ff0000, 0xaaff0000, 0xbaff0000, - 0xccff0000, 0xddff0000, 0xedff0000, 0xffff0000, - 0xffed0000, 0xffdd0000, 0xffcc0000, 0xffba0000, - 0xffaa0000, 0xff990000, 0xff870000, 0xff770000, - 0xff660000, 0xff540000, 0xff440000, 0xff330000, - 0xff210000, 0xff110000, 0xba000000, 0xba000011, - 0xba000021, 0xba000033, 0xba000044, 0xba000054, - 0xba000066, 0xba000077, 0xba000087, 0xba000099, - 0xba0000aa, 0xba0000ba, 0xaa0000ba, 0x990000ba, - 0x870000ba, 0x770000ba, 0x660000ba, 0x540000ba, - 0x440000ba, 0x330000ba, 0x210000ba, 0x110000ba, - 0x000000ba, 0x001100ba, 0x002100ba, 0x003300ba, - 0x004400ba, 0x005400ba, 0x006600ba, 0x007700ba, - 0x008700ba, 0x009900ba, 0x00aa00ba, 0x00ba00ba, - 0x00ba00aa, 0x00ba0099, 0x00ba0087, 0x00ba0077, - 0x00ba0066, 0x00ba0054, 0x00ba0044, 0x00ba0033, - 0x00ba0021, 0x00ba0011, 0x00ba0000, 0x11ba0000, - 0x21ba0000, 0x33ba0000, 0x44ba0000, 0x54ba0000, - 0x66ba0000, 0x77ba0000, 0x87ba0000, 0x99ba0000, - 0xaaba0000, 0xbaba0000, 0xbaaa0000, 0xba990000, - 0xba870000, 0xba770000, 0xba660000, 0xba540000, - 0xba440000, 0xba330000, 0xba210000, 0xba110000, - 0x77000000, 0x77000011, 0x77000021, 0x77000033, - 0x77000044, 0x77000054, 0x77000066, 0x77000077, - 0x66000077, 0x54000077, 0x44000077, 0x33000077, - 0x21000077, 0x11000077, 0x00000077, 0x00110077, - 0x00210077, 0x00330077, 0x00440077, 0x00540077, - 0x00660077, 0x00770077, 0x00770066, 0x00770054, - 0x00770044, 0x00770033, 0x00770021, 0x00770011, - 0x00770000, 0x11770000, 0x21770000, 0x33770000, - 0x44770000, 0x54770000, 0x66770000, 0x77770000, - 0x77660000, 0x77540000, 0x77440000, 0x77330000, - 0x77210000, 0x77110000, 0x44000000, 0x44000011, - 0x44000021, 0x44000033, 0x44000044, 0x33000044, - 0x21000044, 0x11000044, 0x00000044, 0x00110044, - 0x00210044, 0x00330044, 0x00440044, 0x00440033, - 0x00440021, 0x00440011, 0x00440000, 0x11440000, - 0x21440000, 0x33440000, 0x44440000, 0x44330000, - 0x44210000, 0x44110000, FRGB_WHITE, FRGB_BLACK -}; - -int32_t falcon_shadow_palette[256]; /* real Falcon does this, used by vectors.S */ -static int16_t ste_shadow_palette[16]; - -#define MON_ALL -1 /* code used in VMODE_ENTRY for match on mode only */ - -/* - * tables that cover all(?) valid Falcon modes - * note: - * . 256-colour and Truecolor modes are not currently supported by the VDI - */ -static const VMODE_ENTRY vga_init_table[] = { - /* the entries in this table are for VGA/NTSC (i.e. VGA 60Hz) and VGA/PAL - * (i.e. VGA 50Hz). in *this* table, each entry applies to four video modes: - * mode, mode|VIDEL_VERTICAL, mode|VIDEL_PAL, mode|VIDEL_VERTICAL|VIDEL_PAL - */ - { 0x0011, MON_ALL, 0x0017, 0x0012, 0x0001, 0x020a, 0x0009, 0x0011, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x0012, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x028a, 0x006b, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x0013, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x029a, 0x007b, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x0014, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x02ac, 0x0091, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x0018, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x0273, 0x0050, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x0019, MON_ALL, 0x0017, 0x0012, 0x0001, 0x020e, 0x000d, 0x0011, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x001a, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x02a3, 0x007c, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x001b, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x02ab, 0x0084, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x0092, MON_ALL, 0x0017, 0x0012, 0x0001, 0x020e, 0x000d, 0x0011, 0x0419, 0x03af, 0x008f, 0x008f, 0x03af, 0x0415 }, - { 0x0098, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x0273, 0x0050, 0x0096, 0x0419, 0x03af, 0x008f, 0x008f, 0x03af, 0x0415 }, - { 0x0099, MON_ALL, 0x0017, 0x0012, 0x0001, 0x020e, 0x000d, 0x0011, 0x0419, 0x03af, 0x008f, 0x008f, 0x03af, 0x0415 }, - { -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } -}; - -static const VMODE_ENTRY nonvga_init_table[] = { - /* the remaining entries are for TV+NTSC, TV+PAL, TV+NTSC+overscan, TV+PAL+overscan */ - { 0x0001, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0239, 0x0012, 0x0034, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x0002, MON_ALL, 0x00fe, 0x00c9, 0x0027, 0x000c, 0x006d, 0x00d8, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x0003, MON_ALL, 0x00fe, 0x00c9, 0x0027, 0x001c, 0x007d, 0x00d8, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x0004, MON_ALL, 0x00fe, 0x00c9, 0x0027, 0x002e, 0x008f, 0x00d8, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x0008, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x03f0, 0x009f, 0x01b4, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x0009, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0002, 0x0020, 0x0034, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x000a, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x004d, 0x00fd, 0x01b4, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x000b, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x005d, 0x010d, 0x01b4, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x0021, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0239, 0x0012, 0x0034, 0x0271, 0x0265, 0x002f, 0x007f, 0x020f, 0x026b }, - { 0x0022, MON_ALL, 0x00fe, 0x00cb, 0x0027, 0x000c, 0x006d, 0x00d8, 0x0271, 0x0265, 0x002f, 0x007f, 0x020f, 0x026b }, - { 0x0023, MON_ALL, 0x00fe, 0x00cb, 0x0027, 0x001c, 0x007d, 0x00d8, 0x0271, 0x0265, 0x002f, 0x007f, 0x020f, 0x026b }, - { 0x0024, MON_ALL, 0x00fe, 0x00cb, 0x0027, 0x002e, 0x008f, 0x00d8, 0x0271, 0x0265, 0x002f, 0x007f, 0x020f, 0x026b }, - { 0x0028, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x03ef, 0x00a0, 0x01b2, 0x0271, 0x0265, 0x002f, 0x007f, 0x020f, 0x026b }, - { 0x0029, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0002, 0x0020, 0x0034, 0x0271, 0x0265, 0x002f, 0x007f, 0x020f, 0x026b }, - { 0x002a, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x004d, 0x00fe, 0x01b2, 0x0271, 0x0265, 0x002f, 0x007f, 0x020f, 0x026b }, - { 0x002b, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x005d, 0x010e, 0x01b2, 0x0271, 0x0265, 0x002f, 0x007f, 0x020f, 0x026b }, - { 0x0041, MON_VGA, 0x003e, 0x0030, 0x0008, 0x0239, 0x0012, 0x0034, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x0041, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0232, 0x001b, 0x0034, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x0042, MON_VGA, 0x00fe, 0x00c9, 0x0027, 0x000c, 0x006d, 0x00d8, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x0042, MON_ALL, 0x00fe, 0x00c9, 0x0027, 0x02ec, 0x008d, 0x00d8, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x0043, MON_VGA, 0x00fe, 0x00c9, 0x0027, 0x001c, 0x007d, 0x00d8, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x0043, MON_ALL, 0x00fe, 0x00c9, 0x0027, 0x02fc, 0x009d, 0x00d8, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x0044, MON_VGA, 0x00fe, 0x00c9, 0x0027, 0x002e, 0x008f, 0x00d8, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x0044, MON_ALL, 0x00fe, 0x00c9, 0x0027, 0x000e, 0x00af, 0x00d8, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x0048, MON_VGA, 0x01ff, 0x0197, 0x0050, 0x03f0, 0x009f, 0x01b4, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x0048, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x03b0, 0x00df, 0x01b4, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x0049, MON_VGA, 0x003e, 0x0030, 0x0008, 0x023b, 0x001c, 0x0034, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x0049, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0237, 0x0020, 0x0034, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x004a, MON_VGA, 0x01ff, 0x0197, 0x0050, 0x004d, 0x00fd, 0x01b4, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x004a, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x000d, 0x013d, 0x01b4, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x004b, MON_VGA, 0x01ff, 0x0197, 0x0050, 0x005d, 0x010d, 0x01b4, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x004b, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x001d, 0x014d, 0x01b4, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x0061, MON_VGA, 0x003e, 0x0030, 0x0008, 0x0239, 0x0012, 0x0034, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x0061, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0232, 0x001b, 0x0034, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x0062, MON_VGA, 0x00fe, 0x00cb, 0x0027, 0x000c, 0x006d, 0x00d8, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x0062, MON_ALL, 0x00fe, 0x00cb, 0x0027, 0x02ec, 0x008d, 0x00d8, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x0063, MON_VGA, 0x00fe, 0x00cb, 0x0027, 0x001c, 0x007d, 0x00d8, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x0063, MON_ALL, 0x00fe, 0x00cb, 0x0027, 0x02fc, 0x009d, 0x00d8, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x0064, MON_VGA, 0x00fe, 0x00cb, 0x0027, 0x002e, 0x008f, 0x00d8, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x0064, MON_ALL, 0x00fe, 0x00cb, 0x0027, 0x000e, 0x00af, 0x00d8, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x0068, MON_VGA, 0x01fe, 0x0199, 0x0050, 0x03ef, 0x00a0, 0x01b2, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x0068, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x03af, 0x00e0, 0x01b2, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x0069, MON_VGA, 0x003e, 0x0030, 0x0008, 0x023b, 0x001c, 0x0034, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x0069, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0237, 0x0020, 0x0034, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x006a, MON_VGA, 0x01fe, 0x0199, 0x0050, 0x004d, 0x00fe, 0x01b2, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x006a, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x000d, 0x013e, 0x01b2, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x006b, MON_VGA, 0x01fe, 0x0199, 0x0050, 0x005d, 0x010e, 0x01b2, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x006b, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x001d, 0x014e, 0x01b2, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x0082, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x0088, MON_MONO, 0x001a, 0x0000, 0x0000, 0x020f, 0x000c, 0x0014, 0x03e9, 0x0000, 0x0000, 0x0043, 0x0363, 0x03e7 }, - { 0x0088, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x03f0, 0x009f, 0x01b4, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x0089, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x00a2, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x0271, 0x0265, 0x002f, 0x006f, 0x01ff, 0x026b }, - { 0x00a8, MON_MONO, 0x001a, 0x0000, 0x0000, 0x020f, 0x000c, 0x0014, 0x03e9, 0x0000, 0x0000, 0x0043, 0x0363, 0x03e7 }, - { 0x00a8, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x03ef, 0x00a0, 0x01b2, 0x0271, 0x0265, 0x002f, 0x007f, 0x020f, 0x026b }, - { 0x00a9, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x0271, 0x0265, 0x002f, 0x006f, 0x01ff, 0x026b }, - { 0x00c2, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x00c8, MON_MONO, 0x001a, 0x0000, 0x0000, 0x020f, 0x000c, 0x0014, 0x03e9, 0x0000, 0x0000, 0x0043, 0x0363, 0x03e7 }, - { 0x00c8, MON_VGA, 0x01ff, 0x0197, 0x0050, 0x03f0, 0x009f, 0x01b4, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x00c8, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x03b0, 0x00df, 0x01b4, 0x020d, 0x0201, 0x0016, 0x0025, 0x0205, 0x0207 }, - { 0x00c9, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x00e2, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x0271, 0x0265, 0x002f, 0x006f, 0x01ff, 0x026b }, - { 0x00e8, MON_MONO, 0x001a, 0x0000, 0x0000, 0x020f, 0x000c, 0x0014, 0x03e9, 0x0000, 0x0000, 0x0043, 0x0363, 0x03e7 }, - { 0x00e8, MON_VGA, 0x01fe, 0x0199, 0x0050, 0x03ef, 0x00a0, 0x01b2, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x00e8, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x03af, 0x00e0, 0x01b2, 0x0271, 0x0265, 0x002f, 0x0057, 0x0237, 0x026b }, - { 0x00e9, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x0271, 0x0265, 0x002f, 0x006f, 0x01ff, 0x026b }, - { 0x0101, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0239, 0x0012, 0x0034, 0x020c, 0x0201, 0x0016, 0x004c, 0x01dc, 0x0207 }, - { 0x0102, MON_ALL, 0x00fe, 0x00c9, 0x0027, 0x000c, 0x006d, 0x00d8, 0x020c, 0x0201, 0x0016, 0x004c, 0x01dc, 0x0207 }, - { 0x0103, MON_ALL, 0x00fe, 0x00c9, 0x0027, 0x001c, 0x007d, 0x00d8, 0x020c, 0x0201, 0x0016, 0x004c, 0x01dc, 0x0207 }, - { 0x0104, MON_ALL, 0x00fe, 0x00c9, 0x0027, 0x002e, 0x008f, 0x00d8, 0x020c, 0x0201, 0x0016, 0x004c, 0x01dc, 0x0207 }, - { 0x0108, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x03f0, 0x009f, 0x01b4, 0x020c, 0x0201, 0x0016, 0x004c, 0x01dc, 0x0207 }, - { 0x0109, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0002, 0x0020, 0x0034, 0x020c, 0x0201, 0x0016, 0x004c, 0x01dc, 0x0207 }, - { 0x010a, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x004d, 0x00fd, 0x01b4, 0x020c, 0x0201, 0x0016, 0x004c, 0x01dc, 0x0207 }, - { 0x010b, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x005d, 0x010d, 0x01b4, 0x020c, 0x0201, 0x0016, 0x004c, 0x01dc, 0x0207 }, - { 0x0121, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0239, 0x0012, 0x0034, 0x0270, 0x0265, 0x002f, 0x007e, 0x020e, 0x026b }, - { 0x0122, MON_ALL, 0x00fe, 0x00cb, 0x0027, 0x000c, 0x006d, 0x00d8, 0x0270, 0x0265, 0x002f, 0x007e, 0x020e, 0x026b }, - { 0x0123, MON_ALL, 0x00fe, 0x00cb, 0x0027, 0x001c, 0x007d, 0x00d8, 0x0270, 0x0265, 0x002f, 0x007e, 0x020e, 0x026b }, - { 0x0124, MON_ALL, 0x00fe, 0x00cb, 0x0027, 0x002e, 0x008f, 0x00d8, 0x0270, 0x0265, 0x002f, 0x007e, 0x020e, 0x026b }, - { 0x0128, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x03ef, 0x00a0, 0x01b2, 0x0270, 0x0265, 0x002f, 0x007e, 0x020e, 0x026b }, - { 0x0129, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0002, 0x0020, 0x0034, 0x0270, 0x0265, 0x002f, 0x007e, 0x020e, 0x026b }, - { 0x012a, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x004d, 0x00fe, 0x01b2, 0x0270, 0x0265, 0x002f, 0x007e, 0x020e, 0x026b }, - { 0x012b, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x005d, 0x010e, 0x01b2, 0x0270, 0x0265, 0x002f, 0x007e, 0x020e, 0x026b }, - { 0x0141, MON_VGA, 0x003e, 0x0030, 0x0008, 0x0239, 0x0012, 0x0034, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x0141, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0232, 0x001b, 0x0034, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x0142, MON_VGA, 0x00fe, 0x00c9, 0x0027, 0x000c, 0x006d, 0x00d8, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x0142, MON_ALL, 0x00fe, 0x00c9, 0x0027, 0x02ec, 0x008d, 0x00d8, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x0143, MON_VGA, 0x00fe, 0x00c9, 0x0027, 0x001c, 0x007d, 0x00d8, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x0143, MON_ALL, 0x00fe, 0x00c9, 0x0027, 0x02fc, 0x009d, 0x00d8, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x0144, MON_VGA, 0x00fe, 0x00c9, 0x0027, 0x002e, 0x008f, 0x00d8, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x0144, MON_ALL, 0x00fe, 0x00c9, 0x0027, 0x000e, 0x00af, 0x00d8, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x0148, MON_VGA, 0x01ff, 0x0197, 0x0050, 0x03f0, 0x009f, 0x01b4, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x0148, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x03b0, 0x00df, 0x01b4, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x0149, MON_VGA, 0x003e, 0x0030, 0x0008, 0x023b, 0x001c, 0x0034, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x0149, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0237, 0x0020, 0x0034, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x014a, MON_VGA, 0x01ff, 0x0197, 0x0050, 0x004d, 0x00fd, 0x01b4, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x014a, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x000d, 0x013d, 0x01b4, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x014b, MON_VGA, 0x01ff, 0x0197, 0x0050, 0x005d, 0x010d, 0x01b4, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x014b, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x001d, 0x014d, 0x01b4, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x0161, MON_VGA, 0x003e, 0x0030, 0x0008, 0x0239, 0x0012, 0x0034, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x0161, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0232, 0x001b, 0x0034, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x0162, MON_VGA, 0x00fe, 0x00cb, 0x0027, 0x000c, 0x006d, 0x00d8, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x0162, MON_ALL, 0x00fe, 0x00cb, 0x0027, 0x02ec, 0x008d, 0x00d8, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x0163, MON_VGA, 0x00fe, 0x00cb, 0x0027, 0x001c, 0x007d, 0x00d8, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x0163, MON_ALL, 0x00fe, 0x00cb, 0x0027, 0x02fc, 0x009d, 0x00d8, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x0164, MON_VGA, 0x00fe, 0x00cb, 0x0027, 0x002e, 0x008f, 0x00d8, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x0164, MON_ALL, 0x00fe, 0x00cb, 0x0027, 0x000e, 0x00af, 0x00d8, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x0168, MON_VGA, 0x01fe, 0x0199, 0x0050, 0x03ef, 0x00a0, 0x01b2, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x0168, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x03af, 0x00e0, 0x01b2, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x0169, MON_VGA, 0x003e, 0x0030, 0x0008, 0x023b, 0x001c, 0x0034, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x0169, MON_ALL, 0x003e, 0x0030, 0x0008, 0x0237, 0x0020, 0x0034, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x016a, MON_VGA, 0x01fe, 0x0199, 0x0050, 0x004d, 0x00fe, 0x01b2, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x016a, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x000d, 0x013e, 0x01b2, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x016b, MON_VGA, 0x01fe, 0x0199, 0x0050, 0x005d, 0x010e, 0x01b2, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x016b, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x001d, 0x014e, 0x01b2, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x0182, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x0188, MON_MONO, 0x001a, 0x0000, 0x0000, 0x020f, 0x000c, 0x0014, 0x03e9, 0x0000, 0x0000, 0x0043, 0x0363, 0x03e7 }, - { 0x0188, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x03f0, 0x009f, 0x01b4, 0x020c, 0x0201, 0x0016, 0x004c, 0x01dc, 0x0207 }, - { 0x0189, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x01a2, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x0271, 0x0265, 0x002f, 0x006f, 0x01ff, 0x026b }, - { 0x01a8, MON_MONO, 0x001a, 0x0000, 0x0000, 0x020f, 0x000c, 0x0014, 0x03e9, 0x0000, 0x0000, 0x0043, 0x0363, 0x03e7 }, - { 0x01a8, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x03ef, 0x00a0, 0x01b2, 0x0270, 0x0265, 0x002f, 0x007e, 0x020e, 0x026b }, - { 0x01a9, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x0271, 0x0265, 0x002f, 0x006f, 0x01ff, 0x026b }, - { 0x01c2, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x01c8, MON_MONO, 0x001a, 0x0000, 0x0000, 0x020f, 0x000c, 0x0014, 0x03e9, 0x0000, 0x0000, 0x0043, 0x0363, 0x03e7 }, - { 0x01c8, MON_VGA, 0x01ff, 0x0197, 0x0050, 0x03f0, 0x009f, 0x01b4, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x01c8, MON_ALL, 0x01ff, 0x0197, 0x0050, 0x03b0, 0x00df, 0x01b4, 0x020c, 0x0201, 0x0016, 0x0024, 0x0204, 0x0207 }, - { 0x01c9, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x020d, 0x0201, 0x0016, 0x004d, 0x01dd, 0x0207 }, - { 0x01e2, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x0271, 0x0265, 0x002f, 0x006f, 0x01ff, 0x026b }, - { 0x01e8, MON_MONO, 0x001a, 0x0000, 0x0000, 0x020f, 0x000c, 0x0014, 0x03e9, 0x0000, 0x0000, 0x0043, 0x0363, 0x03e7 }, - { 0x01e8, MON_VGA, 0x01fe, 0x0199, 0x0050, 0x03ef, 0x00a0, 0x01b2, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x01e8, MON_ALL, 0x01fe, 0x0199, 0x0050, 0x03af, 0x00e0, 0x01b2, 0x0270, 0x0265, 0x002f, 0x0056, 0x0236, 0x026b }, - { 0x01e9, MON_ALL, 0x003e, 0x0032, 0x0009, 0x023f, 0x001c, 0x0034, 0x0271, 0x0265, 0x002f, 0x006f, 0x01ff, 0x026b }, - { -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } -}; - -void set_palette(uint16_t *colorptr) -{ - int i; - uint16_t *palette_regs = (uint16_t *) 0xffff9800; - - do - { - *palette_regs++ = *colorptr++; - } while (palette_regs < 0xffff9600 + 16 * 2); -} - -/* - * functions for VIDEL programming - */ - -static uint16_t get_videl_bpp(void) -{ - uint16_t f_shift = *(volatile uint16_t *)SPSHIFT; - uint8_t st_shift = *(volatile uint8_t *)ST_SHIFTER; - /* to get bpp, we must examine f_shift and st_shift. - * f_shift is valid if any of bits no. 10, 8 or 4 - * is set. Priority in f_shift is: 10 ">" 8 ">" 4, i.e. - * if bit 10 set then bit 8 and bit 4 don't care... - * If all these bits are 0 get display depth from st_shift - * (as for ST and STe) - */ - int bits_per_pixel = 1; - if (f_shift & 0x400) /* 2 colors */ - bits_per_pixel = 1; - else if (f_shift & 0x100) /* hicolor */ - bits_per_pixel = 16; - else if (f_shift & 0x010) /* 8 bitplanes */ - bits_per_pixel = 8; - else if (st_shift == 0) - bits_per_pixel = 4; - else if (st_shift == 0x1) - bits_per_pixel = 2; - else /* if (st_shift == 0x2) */ - bits_per_pixel = 1; - - return bits_per_pixel; -} - -static uint16_t get_videl_width(void) -{ - return ( * (volatile uint16_t *) 0xffff8210) * 16 / get_videl_bpp(); -} - -static uint16_t get_videl_height(void) -{ - uint16_t vdb = * (volatile uint16_t *) 0xffff82a8; - uint16_t vde = * (volatile uint16_t *) 0xffff82aa; - uint16_t vmode = * (volatile uint16_t *) 0xffff82c2; - - /* visible y resolution: - * Graphics display starts at line VDB and ends at line - * VDE. If interlace mode off unit of VC-registers is - * half lines, else lines. - */ - uint16_t yres = vde - vdb; - if (!(vmode & 0x02)) /* interlace */ - yres >>= 1; - if (vmode & 0x01) /* double */ - yres >>= 1; - - return yres; -} - - -/* - * lookup videl initialisation data for specified mode/monitor - * returns NULL if mode/monitor combination is invalid - */ -const VMODE_ENTRY *lookup_videl_mode(int16_t mode,int16_t monitor) -{ - const VMODE_ENTRY *vmode_init_table, *p; - - if (mode&VIDEL_VGA) - { - vmode_init_table = vga_init_table; - /* ignore bits that don't affect initialisation data */ - mode &= ~(VIDEL_VERTICAL|VIDEL_PAL); - } - else - { - vmode_init_table = nonvga_init_table; - } - - for (p = vmode_init_table; p->vmode >= 0; p++) - if (p->vmode == mode) - if ((p->monitor == MON_ALL) || (p->monitor == monitor)) - return p; - - return NULL; -} - - -/* - * determine scanline width based on video mode - */ -static int16_t determine_width(int16_t mode) -{ - int16_t linewidth; - - linewidth = (mode&VIDEL_80COL) ? 40 : 20; - linewidth <<= (mode & VIDEL_BPPMASK); - if (mode&VIDEL_OVERSCAN) - linewidth = linewidth * 12 / 10; /* multiply by 1.2 */ - - return linewidth; -} - - -/* - * determine vctl based on video mode and monitor type - */ -static int16_t determine_vctl(int16_t mode, int16_t monitor) -{ - int16_t vctl; - - if (mode & VIDEL_VGA) - { - vctl = (mode & VIDEL_80COL) ? 0x08 : 0x04; - if (mode & VIDEL_VERTICAL) - vctl |= 0x01; - } - else - { - vctl = (mode & VIDEL_80COL) ? 0x04 : 0x00; - if (mode & VIDEL_VERTICAL) - vctl |= 0x02; - } - - if (!(mode & VIDEL_COMPAT)) - return vctl; - - switch (mode & VIDEL_BPPMASK) - { - case VIDEL_1BPP: - if (!(mode & VIDEL_VGA) && (monitor == MON_MONO)) - vctl = 0x08; - break; - case VIDEL_2BPP: - vctl = (mode & VIDEL_VGA)? 0x09 : 0x04; - break; - case VIDEL_4BPP: - vctl = (mode & VIDEL_VGA)? 0x05 : 0x00; - break; - } - - return vctl; -} - - -/* - * determine regc0 based on video mode & monitor type - */ -static int16_t determine_regc0(int16_t mode,int16_t monitor) -{ - if (mode & VIDEL_VGA) - return 0x0186; - - if (!(mode & VIDEL_COMPAT)) - return (monitor == MON_TV) ? 0x0183 : 0x0181; - - /* handle ST-compatible modes */ - if ((mode & (VIDEL_80COL | VIDEL_BPPMASK)) == (VIDEL_80COL | VIDEL_1BPP)) - { - /* 80-column, 2-colour */ - switch(monitor) - { - case MON_MONO: - return 0x0080; - case MON_TV: - return 0x0183; - default: - return 0x0181; - } - } - - return (monitor == MON_TV) ? 0x0083 : 0x0081; -} - - -/* - * this routine can set VIDEL to 1,2,4 or 8 bitplanes mode on VGA - */ -static int set_videl_vga(int16_t mode) -{ - volatile char *videlregs = (char *)0xffff8200; -#define videlword(n) (*(volatile uint16_t *)(videlregs+(n))) - const VMODE_ENTRY *p; - int16_t linewidth, monitor, vctl; - - monitor = vmontype(); - - p = lookup_videl_mode(mode,monitor);/* validate mode */ - if (!p) - return -1; - - videlregs[0x0a] = (mode & VIDEL_PAL) ? 2 : 0; /* video sync to 50Hz if PAL */ - - // FIXME: vsync() can't work if the screen is initially turned off - //vsync(); /* wait for vbl so we're not interrupted :-) */ - - videlword(0x82) = p->hht; /* H hold timer */ - videlword(0x84) = p->hbb; /* H border begin */ - videlword(0x86) = p->hbe; /* H border end */ - videlword(0x88) = p->hdb; /* H display begin */ - videlword(0x8a) = p->hde; /* H display end */ - videlword(0x8c) = p->hss; /* H SS */ - - videlword(0xa2) = p->vft; /* V freq timer */ - videlword(0xa4) = p->vbb; /* V border begin */ - videlword(0xa6) = p->vbe; /* V border end */ - videlword(0xa8) = p->vdb; /* V display begin */ - videlword(0xaa) = p->vde; /* V display end */ - videlword(0xac) = p->vss; /* V SS */ - - videlregs[0x60] = 0x00; /* clear ST shift for safety */ - - videlword(0x0e) = 0; /* offset */ - - linewidth = determine_width(mode); - vctl = determine_vctl(mode,monitor); - - videlword(0x10) = linewidth; /* scanline width */ - videlword(0xc2) = vctl; /* video control */ - videlword(0xc0) = determine_regc0(mode,monitor); - videlword(0x66) = 0x0000; /* clear SPSHIFT */ - - switch(mode & VIDEL_BPPMASK) - { - /* set SPSHIFT / ST shift */ - case VIDEL_1BPP: /* 2 colours (mono) */ - if (monitor == MON_MONO) - videlregs[0x60] = 0x02; - else videlword(0x66) = 0x0400; - break; - case VIDEL_2BPP: /* 4 colours */ - videlregs[0x60] = 0x01; - videlword(0x10) = linewidth; /* writing to the ST shifter has */ - videlword(0xc2) = vctl; /* just overwritten these registers */ - break; - case VIDEL_4BPP: /* 16 colours */ - /* if not ST-compatible, SPSHIFT was already set correctly above */ - if (mode & VIDEL_COMPAT) - videlregs[0x60] = 0x00; /* else set ST shifter */ - break; - case VIDEL_8BPP: /* 256 colours */ - videlword(0x66) = 0x0010; - break; - case VIDEL_TRUECOLOR: /* 65536 colours (Truecolor) */ - videlword(0x66) = 0x0100; - break; - } - - return 0; -} - -/* - * the current Falcon video mode; used by vsetmode() & vfixmode() - */ -int16_t current_video_mode; - -/* - * Set Falcon video mode - */ -int16_t vsetmode(int16_t mode) -{ - int16_t ret; - - if (mode == -1) - return current_video_mode; - -#ifdef DBG_VIDEL - xprintf("vsetmode(0x%04x)\n", mode); -#endif - - if (set_videl_vga(mode) < 0) /* invalid mode */ - return current_video_mode; - - ret = current_video_mode; - current_video_mode = mode; - - return ret; -} - -/* - * Get Videl monitor type - */ -int16_t vmontype(void) -{ - return ((*(volatile uint8_t *)0xffff8006) >> 6) & 3; -} - -/* - * Set external video sync mode - */ -int16_t vsetsync(int16_t external) -{ - uint16_t spshift; - - if (external & 0x01) /* external clock wanted? */ - *(volatile int8_t *)SYNCMODE |= 0x01; - else *(volatile int8_t *)SYNCMODE &= 0xfe; - - spshift = *(volatile uint16_t *)SPSHIFT; - - if (external&0x02) /* external vertical sync wanted? */ - spshift |= 0x0020; - else spshift &= 0xffdf; - - if (external&0x04) /* external horizontal sync wanted? */ - spshift |= 0x0040; - else spshift &= 0xffbf; - - *(volatile uint16_t *)SPSHIFT = spshift; - - return 0; /* OK */ -} - -/* - * get video ram size according to mode - */ -int32_t vgetsize(int16_t mode) -{ - const VMODE_ENTRY *p; - int height; - int16_t vctl, monitor; - - monitor = vmontype(); - - mode &= VIDEL_VALID; /* ignore invalid bits */ - if ((mode & VIDEL_BPPMASK) > VIDEL_TRUECOLOR) - { - /* fixup invalid bpp */ - mode &= ~VIDEL_BPPMASK; - mode |= VIDEL_TRUECOLOR; - } - - p = lookup_videl_mode(mode, monitor); - if (!p) - { - /* invalid mode */ - if (mode & VIDEL_COMPAT) - return ST_VRAM_SIZE; - mode &= ~(VIDEL_OVERSCAN|VIDEL_PAL);/* ignore less-important bits */ - p = lookup_videl_mode(mode, monitor);/* & try again */ - if (!p) /* "can't happen" */ - return FALCON_VRAM_SIZE; - } - - vctl = determine_vctl(mode, monitor); - height = p->vde - p->vdb; - if (!(vctl & 0x02)) - height >>= 1; - if (vctl & 0x01) - height >>= 1; - - return (int32_t)determine_width(mode) * 2 * height; -} - -/* - * convert from Falcon palette format to STe palette format - */ -#define falc2ste(a) ((((a) >> 1) & 0x08) | (((a) >> 5) & 0x07)) - -static void convert2ste(int16_t *ste,int32_t *falcon) -{ - union - { - int32_t l; - uint8_t b[4]; - } u; - int i; - - for (i = 0; i < 16; i++) - { - u.l = *falcon++; - *ste++ = (falc2ste(u.b[0]) << 8) | (falc2ste(u.b[1]) << 4) | falc2ste(u.b[3]); - } -} - -/* - * determine whether to update STe or Falcon h/w palette registers - * returns true if we need to update the STe h/w palette - */ -static int use_ste_palette(int16_t videomode) -{ - if (vmontype() == MON_MONO) /* always for ST mono monitor */ - return true; - - if ((videomode & VIDEL_BPPMASK) == VIDEL_2BPP) /* always for 4-colour modes */ - return true; - - if ((videomode & VIDEL_COMPAT) && ((videomode & VIDEL_BPPMASK) == VIDEL_4BPP)) - return true; /* and for ST low */ - - return false; -} - -/* - * set palette registers - * - * note that the actual update of the hardware registers is done by the - * VBL interrupt handler, according to the setting of 'colorptr'. since - * the address in colorptr must be even, we use bit 0 as a flag. - * - * colorptr contents VBL interrupt handler action - * ----------------- ---------------------------- - * 0 do nothing - * address load STe palette regs from address - * address | 0x01 load first 16 Falcon palette regs from address - * 0 | 0x01 load 256 Falcon palette regs from falcon_shadow_palette[] - */ -int16_t vsetrgb(int16_t index,int16_t count, int32_t *rgb) -{ - int32_t *shadow, *source; - union - { - int32_t l; - uint8_t b[4]; - } u; - int16_t limit; - - if ((index < 0) || (count <= 0)) - return -1; /* Generic error */ - - limit = (get_videl_bpp() <= 4) ? 16 : 256; - if ((index + count) > limit) - return -1; /* Generic error */ - - /* - * we always update the Falcon shadow palette, since that's - * what we'll return for VgetRGB() - */ - shadow = falcon_shadow_palette + index; - source = rgb; - while (count--) { - u.l = *source++; - u.b[0] = u.b[1]; /* shift R & G */ - u.b[1] = u.b[2]; - u.b[2] = 0x00; - *shadow++ = u.l; - } - - /* - * for ST low or 4-colour modes, we need to convert the - * Falcon shadow registers to STe palette register format, and - * request the VBL interrupt handler to update the STe palette - * registers rather than the Falcon registers - */ - if (use_ste_palette(vsetmode(-1))) { - convert2ste(ste_shadow_palette, falcon_shadow_palette); - colorptr = ste_shadow_palette; - - - return 0; /* OK */ - } - - colorptr = (limit == 256) ? (int16_t *) 0x01L : (int16_t *) ((int32_t) falcon_shadow_palette|0x01L); - - set_palette(colorptr); - return 0; /* OK */ -} - -/* - * get palette registers - */ -int16_t vgetrgb(int16_t index,int16_t count,int32_t *rgb) -{ - int32_t *shadow; - union - { - int32_t l; - uint8_t b[4]; - } u; - int16_t limit; - - if ((index < 0) || (count <= 0)) - return -1; /* Generic error */ - - limit = (get_videl_bpp() <= 4) ? 16 : 256; - if ((index + count) > limit) - return -1; /* Generic error */ - - shadow = falcon_shadow_palette + index; - while (count--) - { - u.l = *shadow++; - u.b[2] = u.b[1]; /* shift R & G right*/ - u.b[1] = u.b[0]; - u.b[0] = 0x00; - *rgb++ = u.l; - } - - return 0; /* OK */ -} - -/* - * Fix Videl mode - * - * This converts an (assumed legal) input mode into the - * corresponding output mode for the current monitor type - */ -int16_t vfixmode(int16_t mode) -{ - int16_t monitor, currentmode; - - monitor = vmontype(); - if (monitor == MON_MONO) - return FALCON_ST_HIGH; - - currentmode = vsetmode(-1); - if (currentmode & VIDEL_PAL) /* set PAL bit per current value */ - mode |= VIDEL_PAL; - else mode &= ~VIDEL_PAL; - - /* handle VGA monitor */ - if (monitor == MON_VGA) { - mode &= ~VIDEL_OVERSCAN; /* turn off overscan (not used with VGA) */ - if (!(mode & VIDEL_VGA)) /* if mode doesn't have VGA set, */ - mode ^= (VIDEL_VERTICAL | VIDEL_VGA); /* set it & flip vertical */ - if (mode & VIDEL_COMPAT) { - if ((mode&VIDEL_BPPMASK) == VIDEL_1BPP) - mode &= ~VIDEL_VERTICAL; /* clear vertical for ST high */ - else mode |= VIDEL_VERTICAL; /* set it for ST medium, low */ - } - return mode; - } - - /* handle RGB or TV */ - if (mode & VIDEL_VGA) /* if mode has VGA set, */ - mode ^= (VIDEL_VERTICAL | VIDEL_VGA); /* clear it & flip vertical */ - if (mode & VIDEL_COMPAT) { - if ((mode & VIDEL_BPPMASK) == VIDEL_1BPP) - mode |= VIDEL_VERTICAL; /* set vertical for ST high */ - else mode &= ~VIDEL_VERTICAL; /* clear it for ST medium, low */ - } - - return mode; -} - -int16_t videl_check_moderez(int16_t moderez) -{ - int16_t current_mode, return_mode; - - if (moderez < 0) /* ignore rez values */ - return 0; - - current_mode = get_videl_mode(); - return_mode = vfixmode(moderez);/* adjust */ - return (return_mode == current_mode) ? 0 : return_mode; -} - -uint32_t videl_vram_size(void) -{ - return get_videl_width() / 8L * get_videl_height() * get_videl_bpp(); -} - -void videl_get_current_mode_info(uint16_t *planes, uint16_t *hz_rez, uint16_t *vt_rez) -{ - *planes = get_videl_bpp(); - *hz_rez = get_videl_width(); - *vt_rez = get_videl_height(); -} - -/* - * Initialise Falcon palette - */ -void initialise_falcon_palette(int16_t mode) -{ - volatile int16_t *col_regs = (int16_t *) ST_PALETTE_REGS; - volatile int32_t *fcol_regs = (int32_t *) FALCON_PALETTE_REGS; - int i, limit; - - /* first, set up Falcon shadow palette and real registers */ - for (i = 0; i < 256; i++) - falcon_shadow_palette[i] = videl_dflt_palette[i]; - - switch(mode&VIDEL_BPPMASK) { - case VIDEL_1BPP: /* 2-colour mode */ - falcon_shadow_palette[1] = falcon_shadow_palette[15]; - break; - case VIDEL_2BPP: /* 4-colour mode */ - falcon_shadow_palette[3] = falcon_shadow_palette[15]; - break; - } - - /* a 'feature' of the Falcon hardware: if we're in a mode with less - * than 256 colours, and we attempt to set the Falcon hardware - * palette registers for colours 16 & above, it will screw up the - * values in the first 16 hardware palette registers, resulting in - * a messed-up display ... - * NOTE: what happens in the Truecolor case is yet to be determined, - * although it is probably not important since we don't use those - * registers. - */ - limit = ((mode & VIDEL_BPPMASK) == VIDEL_8BPP) ? 256 : 16; - for (i = 0; i < limit; i++) - fcol_regs[i] = falcon_shadow_palette[i]; - - /* - * if appropriate, set up the STe shadow & real palette registers - */ - if (use_ste_palette(mode)) { - convert2ste(ste_shadow_palette, falcon_shadow_palette); - for (i = 0; i < 16; i++) - col_regs[i] = ste_shadow_palette[i]; - } -} - -/* - * Get videl mode - * This is the same as vsetmode(-1) except that it returns - * zero when there is no videl. Used by app_save(). - */ -int16_t get_videl_mode(void) -{ - return vsetmode(-1); -} - diff --git a/video/video.c b/video/video.c deleted file mode 100644 index 20b6ae4..0000000 --- a/video/video.c +++ /dev/null @@ -1,358 +0,0 @@ -#include "video.h" -#include "videl.h" -#include "screen.h" -#include "pci.h" -#include "pci_ids.h" -#include "mod_devicetable.h" -#include "fb.h" -#include "radeonfb.h" - -//#define DBG_VIDEO -#ifdef DBG_VIDEO -#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_VIDEO */ - -#ifdef _USE_VIDEL_ -#define MON_ALL -1 /* code used in VMODE_ENTRY for match on mode only */ - -/* - * tables that cover all(?) valid Falcon modes - * note: - * . 256-colour and Truecolor modes are not currently supported by the VDI - */ -static const VMODE_ENTRY vga_init_table[] = { - /* the entries in this table are for VGA/NTSC (i.e. VGA 60Hz) and VGA/PAL - * (i.e. VGA 50Hz). in *this* table, each entry applies to four video modes: - * mode, mode|VIDEL_VERTICAL, mode|VIDEL_PAL, mode|VIDEL_VERTICAL|VIDEL_PAL - */ - { 0x0011, MON_ALL, 0x0017, 0x0012, 0x0001, 0x020a, 0x0009, 0x0011, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x0012, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x028a, 0x006b, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x0013, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x029a, 0x007b, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x0014, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x02ac, 0x0091, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x0018, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x0273, 0x0050, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x0019, MON_ALL, 0x0017, 0x0012, 0x0001, 0x020e, 0x000d, 0x0011, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x001a, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x02a3, 0x007c, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x001b, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x02ab, 0x0084, 0x0096, 0x0419, 0x03ff, 0x003f, 0x003f, 0x03ff, 0x0415 }, - { 0x0092, MON_ALL, 0x0017, 0x0012, 0x0001, 0x020e, 0x000d, 0x0011, 0x0419, 0x03af, 0x008f, 0x008f, 0x03af, 0x0415 }, - { 0x0098, MON_ALL, 0x00c6, 0x008d, 0x0015, 0x0273, 0x0050, 0x0096, 0x0419, 0x03af, 0x008f, 0x008f, 0x03af, 0x0415 }, - { 0x0099, MON_ALL, 0x0017, 0x0012, 0x0001, 0x020e, 0x000d, 0x0011, 0x0419, 0x03af, 0x008f, 0x008f, 0x03af, 0x0415 }, - { -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } -}; - -/* - * Initialise palette registers - * This routine is also used by resolution change - */ -void initialise_palette_registers(int16_t rez,int16_t mode) -{ - initialise_falcon_palette(mode); -} - - -/* - * determine regc0 based on video mode & monitor type - */ -static int16_t determine_regc0(int16_t mode, int16_t monitor) -{ - if (mode&VIDEL_VGA) - return 0x0186; - - if (!(mode&VIDEL_COMPAT)) - return (monitor==MON_TV)?0x0183:0x0181; - - /* handle ST-compatible modes */ - if ((mode&(VIDEL_80COL|VIDEL_BPPMASK)) == (VIDEL_80COL|VIDEL_1BPP)) { /* 80-column, 2-colour */ - switch(monitor) { - case MON_MONO: - return 0x0080; - case MON_TV: - return 0x0183; - default: - return 0x0181; - } - } - - return (monitor==MON_TV)?0x0083:0x0081; -} - -/* - * determine vctl based on video mode and monitor type - */ -static int16_t determine_vctl(int16_t mode,int16_t monitor) -{ - int16_t vctl; - - if (mode&VIDEL_VGA) { - vctl = (mode&VIDEL_80COL) ? 0x08 : 0x04; - if (mode&VIDEL_VERTICAL) - vctl |= 0x01; - } else { - vctl = (mode&VIDEL_80COL) ? 0x04 : 0x00; - if (mode&VIDEL_VERTICAL) - vctl |= 0x02; - } - - if (!(mode&VIDEL_COMPAT)) - return vctl; - - switch(mode&VIDEL_BPPMASK) { - case VIDEL_1BPP: - if (!(mode&VIDEL_VGA) && (monitor == MON_MONO)) - vctl = 0x08; - break; - case VIDEL_2BPP: - vctl = (mode&VIDEL_VGA)? 0x09 : 0x04; - break; - case VIDEL_4BPP: - vctl = (mode&VIDEL_VGA)? 0x05 : 0x00; - break; - } - - return vctl; -} - - -/* - * determine scanline width based on video mode - */ -static int16_t determine_width(int16_t mode) -{ - int16_t linewidth; - - linewidth = (mode&VIDEL_80COL) ? 40 : 20; - linewidth <<= (mode & VIDEL_BPPMASK); - if (mode&VIDEL_OVERSCAN) - linewidth = linewidth * 12 / 10; /* multiply by 1.2 */ - - return linewidth; -} - -static int set_videl_vga(int16_t mode) -{ - volatile char *videlregs = (char *)0xffff8200; -#define videlword(n) (*(volatile uint16_t *)(videlregs+(n))) - const VMODE_ENTRY *p; - int16_t linewidth, monitor, vctl; - - monitor = vmontype(); - - p = lookup_videl_mode(mode,monitor);/* validate mode */ - if (!p) - return -1; - - videlregs[0x0a] = (mode&VIDEL_PAL) ? 2 : 0; /* video sync to 50Hz if PAL */ - - // FIXME: vsync() can't work if the screen is initially turned off - //vsync(); /* wait for vbl so we're not interrupted :-) */ - - videlword(0x82) = p->hht; /* H hold timer */ - videlword(0x84) = p->hbb; /* H border begin */ - videlword(0x86) = p->hbe; /* H border end */ - videlword(0x88) = p->hdb; /* H display begin */ - videlword(0x8a) = p->hde; /* H display end */ - videlword(0x8c) = p->hss; /* H SS */ - - videlword(0xa2) = p->vft; /* V freq timer */ - videlword(0xa4) = p->vbb; /* V border begin */ - videlword(0xa6) = p->vbe; /* V border end */ - videlword(0xa8) = p->vdb; /* V display begin */ - videlword(0xaa) = p->vde; /* V display end */ - videlword(0xac) = p->vss; /* V SS */ - - videlregs[0x60] = 0x00; /* clear ST shift for safety */ - - videlword(0x0e) = 0; /* offset */ - - linewidth = determine_width(mode); - vctl = determine_vctl(mode,monitor); - - videlword(0x10) = linewidth; /* scanline width */ - videlword(0xc2) = vctl; /* video control */ - videlword(0xc0) = determine_regc0(mode,monitor); - videlword(0x66) = 0x0000; /* clear SPSHIFT */ - - switch(mode&VIDEL_BPPMASK) { /* set SPSHIFT / ST shift */ - case VIDEL_1BPP: /* 2 colours (mono) */ - if (monitor == MON_MONO) - videlregs[0x60] = 0x02; - else videlword(0x66) = 0x0400; - break; - case VIDEL_2BPP: /* 4 colours */ - videlregs[0x60] = 0x01; - videlword(0x10) = linewidth; /* writing to the ST shifter has */ - videlword(0xc2) = vctl; /* just overwritten these registers */ - break; - case VIDEL_4BPP: /* 16 colours */ - /* if not ST-compatible, SPSHIFT was already set correctly above */ - if (mode&VIDEL_COMPAT) - videlregs[0x60] = 0x00; /* else set ST shifter */ - break; - case VIDEL_8BPP: /* 256 colours */ - videlword(0x66) = 0x0010; - break; - case VIDEL_TRUECOLOR: /* 65536 colours (Truecolor) */ - videlword(0x66) = 0x0100; - break; - } - - return 0; -} - -int16_t current_video_mode; - -/* Set physical screen address */ - -static void setphys(int32_t addr,int checkaddr) -{ - *(volatile uint8_t *) VIDEOBASE_ADDR_HI = ((uint32_t) addr) >> 16; - *(volatile uint8_t *) VIDEOBASE_ADDR_MID = ((uint32_t) addr) >> 8; - *(volatile uint8_t *) VIDEOBASE_ADDR_LOW = ((uint32_t) addr); -} - -/* - * In the original TOS there used to be an early screen init, - * before memory configuration. This is not used here, and all is - * done at the same time from C. - */ - -void videl_screen_init(void) -{ - uint32_t screen_start; - uint16_t boot_resolution = FALCON_DEFAULT_BOOT; - int16_t monitor_type, sync_mode; - int16_t rez = 0; /* avoid 'may be uninitialized' warning */ - - /* Initialize the interrupt handlers. - * It is important to do this first because the initialization code below - * may call vsync(), which temporarily enables the interrupts. */ - - /* TODO: VEC_HBL = int_hbl; */ - /* TODO: VEC_VBL = int_vbl; */ - -/* - * first, see what we're connected to, and set the - * resolution / video mode appropriately - */ - monitor_type = MON_COLOR; - xprintf("monitor_type = %d\r\n", monitor_type); - - /* reset VIDEL on boot-up */ - /* first set the physbase to a safe memory */ - setphys(0xd00000, 0); - - if (!lookup_videl_mode(boot_resolution, monitor_type)) { /* mode isn't in table */ - xprintf("Invalid video mode 0x%04x changed to 0x%04x\r\n", - boot_resolution, FALCON_DEFAULT_BOOT); - boot_resolution = FALCON_DEFAULT_BOOT; /* so pick one that is */ - } - - if (!VALID_VDI_BPP(boot_resolution)) { /* mustn't confuse VDI */ - xprintf("VDI doesn't support video mode 0x%04x, changed to 0x%04x\r\n", - boot_resolution, FALCON_DEFAULT_BOOT); - boot_resolution = FALCON_DEFAULT_BOOT; /* so use default */ - } - - vsetmode(boot_resolution); - rez = FALCON_REZ; /* fake value indicates Falcon/Videl */ - sync_mode = (boot_resolution & VIDEL_PAL) ? 0x02 : 0x00; - *(volatile uint8_t *) SYNCMODE = sync_mode; - - /* - * next, set up the palette(s) - */ - initialise_palette_registers(rez, boot_resolution); - /* FIXME: sshiftmod = rez; */ - - /* videoram is placed just below the phystop */ - screen_start = 0xd00000; - - /* correct physical address */ - setphys(screen_start, 1); -} - -#endif /* _USE_VIDEL_ */ - -static struct fb_info fb; -struct fb_info *info_fb = &fb; - -const char monitor_layout[1024] = "CRT,CRT"; -int16_t ignore_edid; - -struct mode_option resolution = -{ - .used = 0, - .width = 640, - .height = 480, - .bpp = 8, - .freq = 60, - .flags = 0 -}; -int16_t force_measure_pll; - -void install_vbl_timer(void *func, int remove) -{ - dbg("%s: not implemented\r\n", __FUNCTION__); -} - -/* - * detect and initialise PCI graphics cards - */ -void video_init(void) -{ - /* - * detect PCI video card - */ - - int index = 0; - int32_t handle; - struct pci_device_id *board; - int32_t id; - bool radeon_found = false; - - dbg("%s\r\n", __FUNCTION__); - do - { - /* - * scan PCI bus for graphics cards - */ - handle = pci_find_classcode(PCI_BASE_CLASS_DISPLAY | PCI_FIND_BASE_CLASS, index); - if (handle > 0) /* found a display device */ - { - dbg("%s: handle = 0x%x\r\n", __FUNCTION__, handle); - - id = swpl(pci_read_config_longword(handle, PCIIDR)); /* get vendor + device id */ - dbg("%s: PCIIDR=0x%x\r\n", __FUNCTION__, id); - - board = &radeonfb_pci_table[0]; - - do - { - /* check it against elements of table */ - dbg("%s: check %x %x against %08x\r\n", __FUNCTION__, board->device, board->vendor, id); - if ((board->device == (id >> 16)) && (board->vendor == (id & 0xffff))) - { - radeon_found = true; - - dbg("%s: matched\r\n", __FUNCTION__); - if (radeonfb_pci_register(handle, board) >= 0) - { - xprintf("RADEON video card found and registered\r\n"); - } - else - { - dbg("%s: failed to register RADEON PCI video card\r\n", __FUNCTION__); - } - return; - } - board++; - } while (board->vendor); - } - index++; - } while (handle > 0); - xprintf("%s: RADEON video card %sfound and %sregistered\r\n", __FUNCTION__, - (radeon_found ? "" : "not "), (radeon_found ? "" : "not ")); -} - - diff --git a/x86emu/x86biosemu.c b/x86emu/x86biosemu.c deleted file mode 100644 index 131be8b..0000000 --- a/x86emu/x86biosemu.c +++ /dev/null @@ -1,403 +0,0 @@ -#define RINFO_ONLY -#include "x86debug.h" -#include "radeonfb.h" -#include "bas_printf.h" -#include "bas_string.h" -#include "util.h" -#include "driver_mem.h" -#include "x86emu.h" -#include "pci.h" -#include "pci_ids.h" - -#define USE_SDRAM -#define DIRECT_ACCESS - -#define MEM_WB(where, what) wrb(where, what) -#define MEM_WW(where, what) wrw(where, what) -#define MEM_WL(where, what) wrl(where, what) - -#define MEM_RB(where) rdb(where) -#define MEM_RW(where) rdw(where) -#define MEM_RL(where) rdl(where) - -#define PCI_VGA_RAM_IMAGE_START 0xC0000 -#define PCI_RAM_IMAGE_START 0xD0000 -#define SYS_BIOS 0xF0000 -#define SIZE_EMU 0x100000 - -typedef struct -{ - long ident; - union - { - long l; - short i[2]; - char c[4]; - } v; -} COOKIE; - -struct rom_header -{ - uint16_t signature; - uint8_t size; - uint8_t init[3]; - uint8_t reserved[0x12]; - uint16_t data; -}; - -struct pci_data -{ - uint32_t signature; - uint16_t vendor; - uint16_t device; - uint16_t reserved_1; - uint16_t dlen; - uint8_t drevision; - uint8_t class_lo; - uint16_t class_hi; - uint16_t ilen; - uint16_t irevision; - uint8_t type; - uint8_t indicator; - uint16_t reserved_2; -}; - -static struct radeonfb_info *rinfo_biosemu; -uint16_t offset_port; -uint32_t offset_mem; -static uint32_t offset_io; -static uint32_t config_address_reg; - -extern int x86_pcibios_emulator(); -extern COOKIE *get_cookie(long id); -extern short restart, os_magic; - -X86EMU_sysEnv _X86EMU_env; - -/* general software interrupt handler */ -uint32_t getIntVect(int num) -{ - return MEM_RW(num << 2) + (MEM_RW((num << 2) + 2) << 4); -} - -/* FixME: There is already a push_word() in the emulator */ -void pushw(uint16_t val) -{ - X86_ESP -= 2; - MEM_WW(((uint32_t) X86_SS << 4) + X86_SP, val); -} - -int run_bios_int(int num) -{ - uint32_t eflags; - eflags = X86_EFLAGS; - pushw(eflags); - pushw(X86_CS); - pushw(X86_IP); - X86_CS = MEM_RW((num << 2) + 2); - X86_IP = MEM_RW(num << 2); - return 1; -} - -uint8_t inb(uint16_t port) -{ - uint8_t val = 0; - - if ((port >= offset_port) && (port <= offset_port + 0xFF)) - { - val = * (uint8_t *) (offset_io + (uint32_t) port); - //dbg("%s: inb(0x%x) = 0x%x\r\n", __FUNCTION__, port, val); - } - return val; -} - -uint16_t inw(uint16_t port) -{ - uint16_t val = 0; - - if ((port >= offset_port) && (port <= offset_port + 0xFF)) - { - val = swpw(*(uint16_t *)(offset_io + (uint32_t) port)); - //dbg("inw(0x%x) = 0x%x\r\n", port, val); - } - return val; -} - -uint32_t inl(uint16_t port) -{ - uint32_t val = 0; - if ((port >= offset_port) && (port <= offset_port + 0xFF)) - { - val = swpl(*(uint32_t *)(offset_io + (uint32_t) port)); - //dbg("0x%x) = 0x%x\r\n", port, val); - } - else if (port == 0xCF8) - { - val = config_address_reg; - dbg("inl(0x%x) = 0x%x\r\n", port, val); - } - else if ((port == 0xCFC) && ((config_address_reg & 0x80000000) != 0)) - { - dbg("%s: PCI BIOS access to register %x\r\n", __FUNCTION__, config_address_reg); - switch (config_address_reg & 0xFC) - { - case PCIIDR: - val = ((uint32_t) rinfo_biosemu->chipset << 16) + PCI_VENDOR_ID_ATI; - break; - - case PCIBAR1: - val = (uint32_t) offset_port + 1; - break; - - default: - val = pci_read_config_longword(rinfo_biosemu->handle, config_address_reg & 0xFC); - break; - } - dbg("inl(0x%x) = 0x%x\r\n", port, val); - } - return val; -} - -void outb(uint8_t val, uint16_t port) -{ - if ((port >= offset_port) && (port <= offset_port + 0xFF)) - { - //dbg("outb(0x%x, 0x%x)\r\n", port, val); - *(uint8_t *)(offset_io + (uint32_t) port) = val; - } -} - -void outw(uint16_t val, uint16_t port) -{ - if ((port >= offset_port) && (port <= offset_port + 0xFF)) - { - //dbg("outw(0x%x, 0x%x)\r\n", port, val); - *(uint16_t *)(offset_io + (uint32_t) port) = swpw(val); - } -} - -void outl(uint32_t val, uint16_t port) -{ - if ((port >= offset_port) && (port <= offset_port + 0xFF)) - { - //dbg("outl(0x%x, 0x%x)\r\n", port, val); - *(uint32_t *)(offset_io + (uint32_t) port) = swpl(val); - } - else if (port == 0xCF8) - { - dbg("outl(0x%x, 0x%x)\r\n", port, val); - config_address_reg = val; - } - else if ((port == 0xCFC) && ((config_address_reg & 0x80000000) !=0)) - { - if ((config_address_reg & 0xFC) == PCIBAR1) - offset_port = (uint16_t)val & 0xFFFC; - else - { - dbg("outl(0x%x, 0x%x) to PCI config space\r\n", port, val); - pci_write_config_longword(rinfo_biosemu->handle, config_address_reg & 0xFC, val); - } - } -} - -/* Interrupt multiplexer */ - -void do_int(int num) -{ - int ret = 0; - - switch (num) - { -#ifndef _PC - case 0x10: - case 0x42: - case 0x6D: - if (getIntVect(num) == 0x0000) - dbg("uninitialised int vector\r\n"); - if (getIntVect(num) == 0xFF065) - { - //ret = int42_handler(); - ret = 1; - } - break; -#endif - case 0x15: - //ret = int15_handler(); - ret = 1; - break; - case 0x16: - //ret = int16_handler(); - ret = 0; - break; - case 0x1A: - ret = x86_pcibios_emulator(); - ret = 1; - break; - case 0xe6: - //ret = intE6_handler(); - ret = 0; - break; - default: - break; - } - if (!ret) - ret = run_bios_int(num); -} - -static int setup_system_bios(void *base_addr) -{ - char *base = (char *) base_addr; - int i; - /* - * we trap the "industry standard entry points" to the BIOS - * and all other locations by filling them with "hlt" - * TODO: implement hlt-handler for these - */ - for(i = 0; i < SIZE_EMU + 4; base[i++] = 0xF4); - - return(1); -} - -void run_bios(struct radeonfb_info *rinfo) -{ - long i, j; - unsigned char *ptr; - struct rom_header *rom_header; - struct pci_data *rom_data; - unsigned long rom_size=0; - unsigned long image_size=0; - void *biosmem = (void *) 0x0100000; /* when run_bios() is called, SDRAM is valid but not added to the system */ - unsigned long addr; - unsigned short initialcs; - unsigned short initialip; - unsigned short devfn = (unsigned short) rinfo->handle; - X86EMU_intrFuncs intFuncs[256]; - - if ((rinfo->mmio_base == NULL) || (rinfo->io_base == NULL)) - { - dbg("%s: rinfo->mmio_base = %p, rinfo->io_base = %p\r\n", - __FUNCTION__, rinfo->mmio_base, rinfo->io_base); - return; - } - - rinfo_biosemu = rinfo; - config_address_reg = 0; - offset_port = 0x300; - offset_io = (uint32_t) rinfo->io_base - (uint32_t) offset_port; - offset_mem = (uint32_t) rinfo->fb_base - 0xA0000; - - rom_header = NULL; - do - { - rom_header = (struct rom_header *) ((unsigned long) rom_header + image_size); // get next image - rom_data = (struct pci_data *) ((unsigned long)rom_header + (unsigned long) BIOS_IN16((long) &rom_header->data)); - image_size = (unsigned long) BIOS_IN16((long) &rom_data->ilen) * 512; - } while ((BIOS_IN8((long) &rom_data->type) != 0) && (BIOS_IN8((long) &rom_data->indicator) != 0)); // make sure we got x86 version - - if (BIOS_IN8((long) &rom_data->type) != 0) - { - dbg("%s: ROM data type = 0x%x\r\n", __FUNCTION__, BIOS_IN8((long) &rom_data->type)); - return; - } - - rom_size = (unsigned long) BIOS_IN8((long) &rom_header->size) * 512; - - if (PCI_CLASS_DISPLAY_VGA == BIOS_IN16((long) &rom_data->class_hi)) - { - memset((char *) biosmem, 0, SIZE_EMU); - setup_system_bios((char *) biosmem); - - dbg("%s: Copying VGA ROM Image from %p to %p (0x%lx bytes)\r\n", - __FUNCTION__, (long) rinfo->bios_seg + (long) rom_header, - biosmem + PCI_VGA_RAM_IMAGE_START, rom_size); - { - long bytes_align = (long) rom_header & 3; - - ptr = (unsigned char *) biosmem; - i = (long) rom_header; - j = PCI_VGA_RAM_IMAGE_START; - - if (bytes_align) - for(; i < 4 - bytes_align; ptr[j++] = BIOS_IN8(i++)); - - for(; i < (long) rom_header + rom_size; i += 4, j += 4) - *((unsigned long *) &ptr[j]) = swpl(BIOS_IN32(i)); - } - addr = PCI_VGA_RAM_IMAGE_START; - } - else - { - memset((char *) biosmem, 0, SIZE_EMU); - setup_system_bios((char *) biosmem); - - dbg("%s: Copying non-VGA ROM Image from %p to %p (0x%lx bytes)\r\n", __FUNCTION__, - (long) rinfo->bios_seg + (long) rom_header, - biosmem + PCI_RAM_IMAGE_START, - rom_size); - ptr = (unsigned char *) biosmem; - for (i = (long) rom_header, j = PCI_RAM_IMAGE_START; i < (long) rom_header+rom_size; ptr[j++] = BIOS_IN8(i++)); - addr = PCI_RAM_IMAGE_START; - } - - initialcs = (addr & 0xF0000) >> 4; - initialip = (addr + 3) & 0xFFFF; - - X86EMU_setMemBase((void *) biosmem, SIZE_EMU); - - for (i = 0; i < 256; i++) - intFuncs[i] = do_int; - - X86EMU_setupIntrFuncs(intFuncs); - { - char *date = "01/01/99"; - for (i = 0; date[i]; i++) - wrb(0xffff5 + i, date[i]); - wrb(0xffff7, '/'); - wrb(0xffffa, '/'); - } - { - /* FixME: move PIT init to its own file */ - outb(0x36, 0x43); - outb(0x00, 0x40); - outb(0x00, 0x40); - } -// setup_int_vect(); - - /* cpu setup */ - X86_AX = devfn ? devfn : 0xff; - X86_DX = 0x80; - X86_EIP = initialip; - X86_CS = initialcs; - - /* Initialize stack and data segment */ - X86_SS = initialcs; - X86_SP = 0xfffe; - X86_DS = 0x0040; - X86_ES = 0x0000; - - /* - * We need a sane way to return from bios - * execution. A hlt instruction and a pointer - * to it, both kept on the stack, will do. - */ - pushw(0xf4f4); /* hlt; hlt */ - -// pushw(0x10cd); /* int #0x10 */ -// pushw(0x0013); /* 320 x 200 x 256 colors */ -// // pushw(0x000F); /* 640 x 350 x mono */ -// pushw(0xb890); /* nop, mov ax,#0x13 */ - pushw(X86_SS); - pushw(X86_SP + 2); -#ifdef DBG_X86EMU - X86EMU_trace_on(); - X86EMU_set_debug(DEBUG_DECODE_F | DEBUG_TRACE_F); -#endif - - dbg("%s: X86EMU entering emulator\r\n", __FUNCTION__); - //*vblsem = 0; - X86EMU_exec(); - //*vblsem = 1; - dbg("%s: X86EMU halted\r\n", __FUNCTION__); -// biosfn_set_video_mode(0x13); /* 320 x 200 x 256 colors */ - memset((char *) biosmem, 0, SIZE_EMU); -} diff --git a/x86emu/x86debug.c b/x86emu/x86debug.c deleted file mode 100644 index 647889a..0000000 --- a/x86emu/x86debug.c +++ /dev/null @@ -1,451 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1991-2004 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: This file contains the code to handle debugging of the - * emulator. - * - ****************************************************************************/ - -#include "bas_types.h" -#include "bas_printf.h" -#include "bas_string.h" -#include "x86debug.h" -#include "x86emui.h" - -/*----------------------------- Implementation ----------------------------*/ - -#ifdef DBG_X86EMU - -static void print_encoded_bytes (uint16_t s, uint16_t o); -static void print_decoded_instruction (void); -//static int parse_line (char *s, int *ps, int *n); - -/* should look something like debug's output. */ -void X86EMU_trace_regs (void) -{ - if (DEBUG_TRACE()) { - x86emu_dump_regs(); - } - if (DEBUG_DECODE() && !DEBUG_DECODE_NOPRINT()) - { - xprintf("%04x:%04x ", M.x86.saved_cs, M.x86.saved_ip); - print_encoded_bytes(M.x86.saved_cs, M.x86.saved_ip); - print_decoded_instruction(); - } -} - -void X86EMU_trace_xregs (void) -{ - if (DEBUG_TRACE()) { - x86emu_dump_xregs(); - } -} - -void x86emu_just_disassemble (void) -{ - /* - * This routine called if the flag DEBUG_DISASSEMBLE is set kind - * of a hack! - */ - xprintf("%x:%x ", M.x86.saved_cs, M.x86.saved_ip); - print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip); - print_decoded_instruction(); -} - -#if 0 -static void disassemble_forward (uint16_t seg, uint16_t off, int n) -{ - X86EMU_sysEnv tregs; - int i; - u8 op1; - /* - * hack, hack, hack. What we do is use the exact machinery set up - * for execution, except that now there is an additional state - * flag associated with the "execution", and we are using a copy - * of the register struct. All the major opcodes, once fully - * decoded, have the following two steps: TRACE_REGS(r,m); - * SINGLE_STEP(r,m); which disappear if DEBUG is not defined to - * the preprocessor. The TRACE_REGS macro expands to: - * - * if (debug&DEBUG_DISASSEMBLE) - * {just_disassemble(); goto EndOfInstruction;} - * if (debug&DEBUG_TRACE) trace_regs(r,m); - * - * ...... and at the last line of the routine. - * - * EndOfInstruction: end_instr(); - * - * Up to the point where TRACE_REG is expanded, NO modifications - * are done to any register EXCEPT the IP register, for fetch and - * decoding purposes. - * - * This was done for an entirely different reason, but makes a - * nice way to get the system to help debug codes. - */ - tregs = M; - tregs.x86.R_IP = off; - tregs.x86.R_CS = seg; - - /* reset the decoding buffers */ - tregs.x86.enc_str_pos = 0; - tregs.x86.enc_pos = 0; - - /* turn on the "disassemble only, no execute" flag */ - tregs.x86.debug |= DEBUG_DISASSEMBLE_F; - - /* DUMP NEXT n instructions to screen in straight_line fashion */ - /* - * This looks like the regular instruction fetch stream, except - * that when this occurs, each fetched opcode, upon seeing the - * DEBUG_DISASSEMBLE flag set, exits immediately after decoding - * the instruction. XXX --- CHECK THAT MEM IS NOT AFFECTED!!! - * Note the use of a copy of the register structure... - */ - for (i=0; i 256) - return; - - seg = fetch_data_word_abs(0, iv * 4); - off = fetch_data_word_abs(0, iv *4 + 2); - xprintf("%04x:%04x", seg, off); -} - -void X86EMU_dump_memory (uint16_t seg, uint16_t off, uint32_t amt) -{ - uint32_t start = off & 0xfffffff0; - uint32_t end = (off + 16) & 0xfffffff0; - uint32_t i; - uint32_t current; - - current = start; - while (end <= off + amt) { - xprintf("%04x:%04x ", seg, start); - - for (i = start; i < off; i++) - xprintf(" "); - for ( ; i< end; i++) - xprintf("%02x", fetch_data_byte_abs(seg, i)); - xprintf("\r\n"); - start = end; - end = start + 16; - } -} - -void x86emu_single_step (void) -{ -#if 0 - char s[1024]; - int ps[10]; - int ntok; - int cmd; - int done; - int segment; - int offset; - static int breakpoint; - static int noDecode = 1; - - char *p; - - if (DEBUG_BREAK()) { - if (M.x86.saved_ip != breakpoint) { - return; - } else { - M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F; - M.x86.debug |= DEBUG_TRACE_F; - M.x86.debug &= ~DEBUG_BREAK_F; - print_decoded_instruction (); - X86EMU_trace_regs(); - } - } - done=0; - offset = M.x86.saved_ip; - while (!done) { - DPRINT("-"); - p = fgets(s, 1023, stdin); - cmd = parse_line(s, ps, &ntok); - switch(cmd) { - case 'u': - disassemble_forward(M.x86.saved_cs,(uint16_t)offset,10); - break; - case 'd': - if (ntok == 2) { - segment = M.x86.saved_cs; - offset = ps[1]; - X86EMU_dump_memory(segment,(uint16_t)offset,16); - offset += 16; - } else if (ntok == 3) { - segment = ps[1]; - offset = ps[2]; - X86EMU_dump_memory(segment,(uint16_t)offset,16); - offset += 16; - } else { - segment = M.x86.saved_cs; - X86EMU_dump_memory(segment,(uint16_t)offset,16); - offset += 16; - } - break; - case 'c': - M.x86.debug ^= DEBUG_TRACECALL_F; - break; - case 's': - M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F; - break; - case 'r': - X86EMU_trace_regs(); - break; - case 'x': - X86EMU_trace_xregs(); - break; - case 'g': - if (ntok == 2) { - breakpoint = ps[1]; - if (noDecode) { - M.x86.debug |= DEBUG_DECODE_NOPRINT_F; - } else { - M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F; - } - M.x86.debug &= ~DEBUG_TRACE_F; - M.x86.debug |= DEBUG_BREAK_F; - done = 1; - } - break; - case 'q': - M.x86.debug |= DEBUG_EXIT; - return; - case 'P': - noDecode = (noDecode)?0:1; - DPRINT("Toggled decoding to "); - DPRINT((noDecode)?"FALSE":"TRUE"); - DPRINT("\r\n"); - break; - case 't': - case 0: - done = 1; - break; - } - } -#endif -} - -int X86EMU_trace_on(void) -{ - return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F; -} - -int X86EMU_trace_off(void) -{ - return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F); -} - -int X86EMU_set_debug(int debug) -{ - return M.x86.debug = debug; -} - -#if 0 -static int parse_line (char *s, int *ps, int *n) -{ - int cmd; - - *n = 0; - while (*s == ' ' || *s == '\t') s++; - ps[*n] = *s; - switch (*s) { - case '\n': - *n += 1; - return 0; - default: - cmd = *s; - *n += 1; - } - - while (1) { - while (*s != ' ' && *s != '\t' && *s != '\n') s++; - - if (*s == '\n') - return cmd; - - while (*s == ' ' || *s == '\t') s++; - - sscanf(s,"%x",&ps[*n]); - *n += 1; - } -} -#endif - -#endif /* DBG_X86EMU */ - -void x86emu_dump_regs (void) -{ - xprintf("\tAX=%04x", M.x86.R_AX); - xprintf(" BX=%04x", M.x86.R_BX); - xprintf(" CX=%04x", M.x86.R_CX); - xprintf(" DX=%04x", M.x86.R_DX); - xprintf(" SP=%04x", M.x86.R_SP); - xprintf(" BP=%04x", M.x86.R_BP); - xprintf(" SI=%04x", M.x86.R_SI); - xprintf(" DI=%04x", M.x86.R_DI); - xprintf("\r\n"); - xprintf("\tDS=%04x", M.x86.R_DS); - xprintf(" ES=%04x", M.x86.R_ES); - xprintf(" SS=%04x", M.x86.R_SS); - xprintf(" CS=%04x", M.x86.R_CS); - xprintf(" IP=%04x", M.x86.R_IP); - if (ACCESS_FLAG(F_OF)) xprintf("OV "); /* CHECKED... */ - else xprintf("NV "); - if (ACCESS_FLAG(F_DF)) xprintf("DN "); - else xprintf("UP "); - if (ACCESS_FLAG(F_IF)) xprintf("EI "); - else xprintf("DI "); - if (ACCESS_FLAG(F_SF)) xprintf("NG "); - else xprintf("PL "); - if (ACCESS_FLAG(F_ZF)) xprintf("ZR "); - else xprintf("NZ "); - if (ACCESS_FLAG(F_AF)) xprintf("AC "); - else xprintf("NA "); - if (ACCESS_FLAG(F_PF)) xprintf("PE "); - else xprintf("PO "); - if (ACCESS_FLAG(F_CF)) xprintf("CY "); - else xprintf("NC "); - xprintf("\r\n"); -} - -void x86emu_dump_xregs (void) -{ - xprintf(" EAX=%08x", M.x86.R_EAX ); - xprintf(" EBX=%08x", M.x86.R_EBX ); - xprintf(" ECX=%08x", M.x86.R_ECX ); - xprintf(" EDX=%08x", M.x86.R_EDX ); - xprintf("\r\n"); - xprintf(" ESP=%08x", M.x86.R_ESP ); - xprintf(" EBP=%08x", M.x86.R_EBP ); - xprintf(" ESI=%08x", M.x86.R_ESI ); - xprintf(" EDI=%08x", M.x86.R_EDI ); - xprintf("\r\n"); - xprintf(" DS=%08x", M.x86.R_DS ); - xprintf(" ES=%08x", M.x86.R_ES ); - xprintf(" SS=%08x", M.x86.R_SS ); - xprintf(" CS=%08x", M.x86.R_CS ); - xprintf(" EIP%08x=", M.x86.R_EIP ); - xprintf("\r\n\t"); - if (ACCESS_FLAG(F_OF)) xprintf("OV "); /* CHECKED... */ - else xprintf("NV "); - if (ACCESS_FLAG(F_DF)) xprintf("DN "); - else xprintf("UP "); - if (ACCESS_FLAG(F_IF)) xprintf("EI "); - else xprintf("DI "); - if (ACCESS_FLAG(F_SF)) xprintf("NG "); - else xprintf("PL "); - if (ACCESS_FLAG(F_ZF)) xprintf("ZR "); - else xprintf("NZ "); - if (ACCESS_FLAG(F_AF)) xprintf("AC "); - else xprintf("NA "); - if (ACCESS_FLAG(F_PF)) xprintf("PE "); - else xprintf("PO "); - if (ACCESS_FLAG(F_CF)) xprintf("CY "); - else xprintf("NC "); - xprintf("\r\n"); -} diff --git a/x86emu/x86decode.c b/x86emu/x86decode.c deleted file mode 100644 index 6dd7edb..0000000 --- a/x86emu/x86decode.c +++ /dev/null @@ -1,1156 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1991-2004 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: This file includes subroutines which are related to - * instruction decoding and accessess of immediate data via IP. etc. - * - ****************************************************************************/ - -#include "x86emui.h" -#include -#include "bas_printf.h" -#include "x86debug.h" - -/*----------------------------- Implementation ----------------------------*/ - -/**************************************************************************** -REMARKS: -Handles any pending asychronous interrupts. - ****************************************************************************/ -static void x86emu_intr_handle(void) -{ - uint8_t intno; - - if (M.x86.intr & INTR_SYNCH) { - intno = M.x86.intno; - if (_X86EMU_intrTab[intno]) { - (*_X86EMU_intrTab[intno])(intno); - } else { - push_word((uint16_t) M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(intno * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(intno * 4); - M.x86.intr = 0; - } - } -} - -/**************************************************************************** -PARAMETERS: -intrnum - Interrupt number to raise - -REMARKS: -Raise the specified interrupt to be handled before the execution of the -next instruction. - ****************************************************************************/ -void x86emu_intr_raise(uint8_t intrnum) -{ - dbg("%s: Rasing exception 0x%02x\r\n", __FUNCTION__, intrnum); - x86emu_dump_regs(); - M.x86.intno = intrnum; - M.x86.intr |= INTR_SYNCH; -} - -/**************************************************************************** -REMARKS: -Main execution loop for the emulator. We return from here when the system -halts, which is normally caused by a stack fault when we return from the -original real mode call. - ****************************************************************************/ -void X86EMU_exec(void) -{ - uint8_t op1; - - M.x86.intr = 0; - DB(x86emu_end_instr();) - - for (;;) - { - if (CHECK_IP_FETCH()) - x86emu_check_ip_access(); - /* If debugging, save the IP and CS values. */ - SAVE_IP_CS(M.x86.R_CS, M.x86.R_IP); - INC_DECODED_INST_LEN(1); - if (M.x86.intr) - { - if (M.x86.intr & INTR_HALTED) - { - if (M.x86.R_SP != 0) - { - dbg("%s: halted\r\n", __FUNCTION__); - X86EMU_trace_regs(); - } - else - { - if (M.x86.debug) - dbg("%s: Service completed successfully\r\n", __FUNCTION__); - } - return; - } - if (((M.x86.intr & INTR_SYNCH) && (M.x86.intno == 0 || M.x86.intno == 2)) || - !ACCESS_FLAG(F_IF)) { - x86emu_intr_handle(); - } - } - op1 = (*sys_rdb)(((uint32_t)M.x86.R_CS << 4) + (M.x86.R_IP++)); - (*x86emu_optab[op1])(op1); - //if (M.x86.debug & DEBUG_EXIT) { - // M.x86.debug &= ~DEBUG_EXIT; - // return; - //} - } -} - -/**************************************************************************** -REMARKS: -Halts the system by setting the halted system flag. - ****************************************************************************/ -void X86EMU_halt_sys(void) -{ - M.x86.intr |= INTR_HALTED; -} - -/**************************************************************************** -PARAMETERS: -mod - Mod value from decoded byte -regh - Reg h value from decoded byte -regl - Reg l value from decoded byte - -REMARKS: -Raise the specified interrupt to be handled before the execution of the -next instruction. - -NOTE: Do not inline this function, as (*sys_rdb) is already inline! - ****************************************************************************/ -void fetch_decode_modrm( - int *mod, - int *regh, - int *regl) -{ - int fetched; - - DB( if (CHECK_IP_FETCH()) - x86emu_check_ip_access();) - fetched = (*sys_rdb)(((uint32_t)M.x86.R_CS << 4) + (M.x86.R_IP++)); - INC_DECODED_INST_LEN(1); - *mod = (fetched >> 6) & 0x03; - *regh = (fetched >> 3) & 0x07; - *regl = (fetched >> 0) & 0x07; -} - -/**************************************************************************** -RETURNS: -Immediate byte value read from instruction queue - -REMARKS: -This function returns the immediate byte from the instruction queue, and -moves the instruction pointer to the next value. - -NOTE: Do not inline this function, as (*sys_rdb) is already inline! - ****************************************************************************/ -uint8_t fetch_byte_imm(void) -{ - uint8_t fetched; - - DB( if (CHECK_IP_FETCH()) - x86emu_check_ip_access();) - fetched = (*sys_rdb)(((uint32_t)M.x86.R_CS << 4) + (M.x86.R_IP++)); - INC_DECODED_INST_LEN(1); - return fetched; -} - -/**************************************************************************** -RETURNS: -Immediate word value read from instruction queue - -REMARKS: -This function returns the immediate byte from the instruction queue, and -moves the instruction pointer to the next value. - -NOTE: Do not inline this function, as (*sys_rdw) is already inline! - ****************************************************************************/ -uint16_t fetch_word_imm(void) -{ - uint16_t fetched; - - DB( if (CHECK_IP_FETCH()) - x86emu_check_ip_access();) - fetched = (*sys_rdw)(((uint32_t)M.x86.R_CS << 4) + (M.x86.R_IP)); - M.x86.R_IP += 2; - INC_DECODED_INST_LEN(2); - return fetched; -} - -/**************************************************************************** -RETURNS: -Immediate lone value read from instruction queue - -REMARKS: -This function returns the immediate byte from the instruction queue, and -moves the instruction pointer to the next value. - -NOTE: Do not inline this function, as (*sys_rdw) is already inline! - ****************************************************************************/ -uint32_t fetch_long_imm(void) -{ - uint32_t fetched; - - DB( if (CHECK_IP_FETCH()) - x86emu_check_ip_access();) - fetched = (*sys_rdl)(((uint32_t)M.x86.R_CS << 4) + (M.x86.R_IP)); - M.x86.R_IP += 4; - INC_DECODED_INST_LEN(4); - return fetched; -} - -/**************************************************************************** -RETURNS: -Value of the default data segment - -REMARKS: -Inline function that returns the default data segment for the current -instruction. - -On the x86 processor, the default segment is not always DS if there is -no segment override. Address modes such as -3[BP] or 10[BP+SI] all refer to -addresses relative to SS (ie: on the stack). So, at the minimum, all -decodings of addressing modes would have to set/clear a bit describing -whether the access is relative to DS or SS. That is the function of the -cpu-state-varible M.x86.mode. There are several potential states: - -repe prefix seen (handled elsewhere) -repne prefix seen (ditto) - -cs segment override -ds segment override -es segment override -fs segment override -gs segment override -ss segment override - -ds/ss select (in absense of override) - -Each of the above 7 items are handled with a bit in the mode field. - ****************************************************************************/ -_INLINE uint32_t get_data_segment(void) -{ -#define GET_SEGMENT(segment) - switch (M.x86.mode & SYSMODE_SEGMASK) { - case 0: /* default case: use ds register */ - case SYSMODE_SEGOVR_DS: - case SYSMODE_SEGOVR_DS | SYSMODE_SEG_DS_SS: - return M.x86.R_DS; - case SYSMODE_SEG_DS_SS: /* non-overridden, use ss register */ - return M.x86.R_SS; - case SYSMODE_SEGOVR_CS: - case SYSMODE_SEGOVR_CS | SYSMODE_SEG_DS_SS: - return M.x86.R_CS; - case SYSMODE_SEGOVR_ES: - case SYSMODE_SEGOVR_ES | SYSMODE_SEG_DS_SS: - return M.x86.R_ES; - case SYSMODE_SEGOVR_FS: - case SYSMODE_SEGOVR_FS | SYSMODE_SEG_DS_SS: - return M.x86.R_FS; - case SYSMODE_SEGOVR_GS: - case SYSMODE_SEGOVR_GS | SYSMODE_SEG_DS_SS: - return M.x86.R_GS; - case SYSMODE_SEGOVR_SS: - case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS: - return M.x86.R_SS; - default: -#ifdef DEBUG - DPRINT("error: should not happen: multiple overrides.\r\n"); -#endif - HALT_SYS(); - return 0; - } -} - -/**************************************************************************** -PARAMETERS: -offset - Offset to load data from - -RETURNS: -Byte value read from the absolute memory location. - -NOTE: Do not inline this function as (*sys_rdX) is already inline! - ****************************************************************************/ -uint8_t fetch_data_byte( - unsigned int offset) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access((uint16_t)get_data_segment(), offset); -#endif - return (*sys_rdb)((get_data_segment() << 4) + offset); -} - -/**************************************************************************** -PARAMETERS: -offset - Offset to load data from - -RETURNS: -Word value read from the absolute memory location. - -NOTE: Do not inline this function as (*sys_rdX) is already inline! - ****************************************************************************/ -uint16_t fetch_data_word( - unsigned int offset) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access((uint16_t)get_data_segment(), offset); -#endif - return (*sys_rdw)((get_data_segment() << 4) + offset); -} - -/**************************************************************************** -PARAMETERS: -offset - Offset to load data from - -RETURNS: -Long value read from the absolute memory location. - -NOTE: Do not inline this function as (*sys_rdX) is already inline! - ****************************************************************************/ -uint32_t fetch_data_long( - unsigned int offset) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access((uint16_t)get_data_segment(), offset); -#endif - return (*sys_rdl)((get_data_segment() << 4) + offset); -} - -/**************************************************************************** -PARAMETERS: -segment - Segment to load data from -offset - Offset to load data from - -RETURNS: -Byte value read from the absolute memory location. - -NOTE: Do not inline this function as (*sys_rdX) is already inline! - ****************************************************************************/ -uint8_t fetch_data_byte_abs( - unsigned int segment, - unsigned int offset) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access(segment, offset); -#endif - return (*sys_rdb)(((uint32_t)segment << 4) + offset); -} - -/**************************************************************************** -PARAMETERS: -segment - Segment to load data from -offset - Offset to load data from - -RETURNS: -Word value read from the absolute memory location. - -NOTE: Do not inline this function as (*sys_rdX) is already inline! - ****************************************************************************/ -uint16_t fetch_data_word_abs( - unsigned int segment, - unsigned int offset) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access(segment, offset); -#endif - return (*sys_rdw)(((uint32_t)segment << 4) + offset); -} - -/**************************************************************************** -PARAMETERS: -segment - Segment to load data from -offset - Offset to load data from - -RETURNS: -Long value read from the absolute memory location. - -NOTE: Do not inline this function as (*sys_rdX) is already inline! - ****************************************************************************/ -uint32_t fetch_data_long_abs( - unsigned int segment, - unsigned int offset) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access(segment, offset); -#endif - return (*sys_rdl)(((uint32_t)segment << 4) + offset); -} - -/**************************************************************************** -PARAMETERS: -offset - Offset to store data at -val - Value to store - -REMARKS: -Writes a word value to an segmented memory location. The segment used is -the current 'default' segment, which may have been overridden. - -NOTE: Do not inline this function as (*sys_wrX) is already inline! - ****************************************************************************/ -void store_data_byte( - unsigned int offset, - uint8_t val) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access((uint16_t)get_data_segment(), offset); -#endif - (*sys_wrb)((get_data_segment() << 4) + offset, val); -} - -/**************************************************************************** -PARAMETERS: -offset - Offset to store data at -val - Value to store - -REMARKS: -Writes a word value to an segmented memory location. The segment used is -the current 'default' segment, which may have been overridden. - -NOTE: Do not inline this function as (*sys_wrX) is already inline! - ****************************************************************************/ -void store_data_word( - unsigned int offset, - uint16_t val) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access((uint16_t)get_data_segment(), offset); -#endif - (*sys_wrw)((get_data_segment() << 4) + offset, val); -} - -/**************************************************************************** -PARAMETERS: -offset - Offset to store data at -val - Value to store - -REMARKS: -Writes a long value to an segmented memory location. The segment used is -the current 'default' segment, which may have been overridden. - -NOTE: Do not inline this function as (*sys_wrX) is already inline! - ****************************************************************************/ -void store_data_long( - unsigned int offset, - uint32_t val) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access((uint16_t)get_data_segment(), offset); -#endif - (*sys_wrl)((get_data_segment() << 4) + offset, val); -} - -/**************************************************************************** -PARAMETERS: -segment - Segment to store data at -offset - Offset to store data at -val - Value to store - -REMARKS: -Writes a byte value to an absolute memory location. - -NOTE: Do not inline this function as (*sys_wrX) is already inline! - ****************************************************************************/ -void store_data_byte_abs( - unsigned int segment, - unsigned int offset, - uint8_t val) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access(segment, offset); -#endif - (*sys_wrb)(((uint32_t)segment << 4) + offset, val); -} - -/**************************************************************************** -PARAMETERS: -segment - Segment to store data at -offset - Offset to store data at -val - Value to store - -REMARKS: -Writes a word value to an absolute memory location. - -NOTE: Do not inline this function as (*sys_wrX) is already inline! - ****************************************************************************/ -void store_data_word_abs( - unsigned int segment, - unsigned int offset, - uint16_t val) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access(segment, offset); -#endif - (*sys_wrw)(((uint32_t)segment << 4) + offset, val); -} - -/**************************************************************************** -PARAMETERS: -segment - Segment to store data at -offset - Offset to store data at -val - Value to store - -REMARKS: -Writes a long value to an absolute memory location. - -NOTE: Do not inline this function as (*sys_wrX) is already inline! - ****************************************************************************/ -void store_data_long_abs( - unsigned int segment, - unsigned int offset, - uint32_t val) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access(segment, offset); -#endif - (*sys_wrl)(((uint32_t)segment << 4) + offset, val); -} - -/**************************************************************************** -PARAMETERS: -reg - Register to decode - -RETURNS: -Pointer to the appropriate register - -REMARKS: -Return a pointer to the register given by the R/RM field of the -modrm byte, for byte operands. Also enables the decoding of instructions. - ****************************************************************************/ -uint8_t* decode_rm_byte_register( - int reg) -{ - switch (reg) { - case 0: - DECODE_PRINTF("AL"); - return &M.x86.R_AL; - case 1: - DECODE_PRINTF("CL"); - return &M.x86.R_CL; - case 2: - DECODE_PRINTF("DL"); - return &M.x86.R_DL; - case 3: - DECODE_PRINTF("BL"); - return &M.x86.R_BL; - case 4: - DECODE_PRINTF("AH"); - return &M.x86.R_AH; - case 5: - DECODE_PRINTF("CH"); - return &M.x86.R_CH; - case 6: - DECODE_PRINTF("DH"); - return &M.x86.R_DH; - case 7: - DECODE_PRINTF("BH"); - return &M.x86.R_BH; - } - HALT_SYS(); - return NULL; /* NOT REACHED OR REACHED ON ERROR */ -} - -/**************************************************************************** -PARAMETERS: -reg - Register to decode - -RETURNS: -Pointer to the appropriate register - -REMARKS: -Return a pointer to the register given by the R/RM field of the -modrm byte, for word operands. Also enables the decoding of instructions. - ****************************************************************************/ -uint16_t* decode_rm_word_register( - int reg) -{ - switch (reg) { - case 0: - DECODE_PRINTF("AX"); - return &M.x86.R_AX; - case 1: - DECODE_PRINTF("CX"); - return &M.x86.R_CX; - case 2: - DECODE_PRINTF("DX"); - return &M.x86.R_DX; - case 3: - DECODE_PRINTF("BX"); - return &M.x86.R_BX; - case 4: - DECODE_PRINTF("SP"); - return &M.x86.R_SP; - case 5: - DECODE_PRINTF("BP"); - return &M.x86.R_BP; - case 6: - DECODE_PRINTF("SI"); - return &M.x86.R_SI; - case 7: - DECODE_PRINTF("DI"); - return &M.x86.R_DI; - } - HALT_SYS(); - return NULL; /* NOTREACHED OR REACHED ON ERROR */ -} - -/**************************************************************************** -PARAMETERS: -reg - Register to decode - -RETURNS: -Pointer to the appropriate register - -REMARKS: -Return a pointer to the register given by the R/RM field of the -modrm byte, for dword operands. Also enables the decoding of instructions. - ****************************************************************************/ -uint32_t* decode_rm_long_register( - int reg) -{ - switch (reg) { - case 0: - DECODE_PRINTF("EAX"); - return &M.x86.R_EAX; - case 1: - DECODE_PRINTF("ECX"); - return &M.x86.R_ECX; - case 2: - DECODE_PRINTF("EDX"); - return &M.x86.R_EDX; - case 3: - DECODE_PRINTF("EBX"); - return &M.x86.R_EBX; - case 4: - DECODE_PRINTF("ESP"); - return &M.x86.R_ESP; - case 5: - DECODE_PRINTF("EBP"); - return &M.x86.R_EBP; - case 6: - DECODE_PRINTF("ESI"); - return &M.x86.R_ESI; - case 7: - DECODE_PRINTF("EDI"); - return &M.x86.R_EDI; - } - HALT_SYS(); - return NULL; /* NOTREACHED OR REACHED ON ERROR */ -} - -/**************************************************************************** -PARAMETERS: -reg - Register to decode - -RETURNS: -Pointer to the appropriate register - -REMARKS: -Return a pointer to the register given by the R/RM field of the -modrm byte, for word operands, modified from above for the weirdo -special case of segreg operands. Also enables the decoding of instructions. - ****************************************************************************/ -uint16_t* decode_rm_seg_register( - int reg) -{ - switch (reg) { - case 0: - DECODE_PRINTF("ES"); - return &M.x86.R_ES; - case 1: - DECODE_PRINTF("CS"); - return &M.x86.R_CS; - case 2: - DECODE_PRINTF("SS"); - return &M.x86.R_SS; - case 3: - DECODE_PRINTF("DS"); - return &M.x86.R_DS; - case 4: - DECODE_PRINTF("FS"); - return &M.x86.R_FS; - case 5: - DECODE_PRINTF("GS"); - return &M.x86.R_GS; - case 6: - case 7: - DECODE_PRINTF("ILLEGAL SEGREG"); - break; - } - HALT_SYS(); - return NULL; /* NOT REACHED OR REACHED ON ERROR */ -} - -/**************************************************************************** -PARAMETERS: -scale - scale value of SIB byte -index - index value of SIB byte - -RETURNS: -Value of scale * index - -REMARKS: -Decodes scale/index of SIB byte and returns relevant offset part of -effective address. - ****************************************************************************/ -unsigned decode_sib_si( - int scale, - int index) -{ - scale = 1 << scale; - if (scale > 1) { - DECODE_PRINTF2("[%d*", scale); - } else { - DECODE_PRINTF("["); - } - switch (index) { - case 0: - DECODE_PRINTF("EAX]"); - return M.x86.R_EAX * index; - case 1: - DECODE_PRINTF("ECX]"); - return M.x86.R_ECX * index; - case 2: - DECODE_PRINTF("EDX]"); - return M.x86.R_EDX * index; - case 3: - DECODE_PRINTF("EBX]"); - return M.x86.R_EBX * index; - case 4: - DECODE_PRINTF("0]"); - return 0; - case 5: - DECODE_PRINTF("EBP]"); - return M.x86.R_EBP * index; - case 6: - DECODE_PRINTF("ESI]"); - return M.x86.R_ESI * index; - case 7: - DECODE_PRINTF("EDI]"); - return M.x86.R_EDI * index; - } - HALT_SYS(); - return 0; /* NOT REACHED OR REACHED ON ERROR */ -} - -/**************************************************************************** -PARAMETERS: -mod - MOD value of preceding ModR/M byte - -RETURNS: -Offset in memory for the address decoding - -REMARKS: -Decodes SIB addressing byte and returns calculated effective address. - ****************************************************************************/ -unsigned decode_sib_address( - int mod) -{ - int sib = fetch_byte_imm(); - int ss = (sib >> 6) & 0x03; - int index = (sib >> 3) & 0x07; - int base = sib & 0x07; - int offset = 0; - int displacement; - - switch (base) { - case 0: - DECODE_PRINTF("[EAX]"); - offset = M.x86.R_EAX; - break; - case 1: - DECODE_PRINTF("[ECX]"); - offset = M.x86.R_ECX; - break; - case 2: - DECODE_PRINTF("[EDX]"); - offset = M.x86.R_EDX; - break; - case 3: - DECODE_PRINTF("[EBX]"); - offset = M.x86.R_EBX; - break; - case 4: - DECODE_PRINTF("[ESP]"); - offset = M.x86.R_ESP; - break; - case 5: - switch (mod) { - case 0: - displacement = (int32_t)fetch_long_imm(); - DECODE_PRINTF2("[%d]", displacement); - offset = displacement; - break; - case 1: - displacement = (int8_t)fetch_byte_imm(); - DECODE_PRINTF2("[%d][EBP]", displacement); - offset = M.x86.R_EBP + displacement; - break; - case 2: - displacement = (int32_t)fetch_long_imm(); - DECODE_PRINTF2("[%d][EBP]", displacement); - offset = M.x86.R_EBP + displacement; - break; - default: - HALT_SYS(); - } - DECODE_PRINTF("[EAX]"); - offset = M.x86.R_EAX; - break; - case 6: - DECODE_PRINTF("[ESI]"); - offset = M.x86.R_ESI; - break; - case 7: - DECODE_PRINTF("[EDI]"); - offset = M.x86.R_EDI; - break; - default: - HALT_SYS(); - } - offset += decode_sib_si(ss, index); - return offset; -} - -/**************************************************************************** -PARAMETERS: -rm - RM value to decode - -RETURNS: -Offset in memory for the address decoding - -REMARKS: -Return the offset given by mod=00 addressing. Also enables the -decoding of instructions. - -NOTE: The code which specifies the corresponding segment (ds vs ss) -below in the case of [BP+..]. The assumption here is that at the -point that this subroutine is called, the bit corresponding to -SYSMODE_SEG_DS_SS will be zero. After every instruction -except the segment override instructions, this bit (as well -as any bits indicating segment overrides) will be clear. So -if a SS access is needed, set this bit. Otherwise, DS access -occurs (unless any of the segment override bits are set). - ****************************************************************************/ -unsigned decode_rm00_address( - int rm) -{ - unsigned offset; - - if (M.x86.mode & SYSMODE_PREFIX_ADDR) { - /* 32-bit addressing */ - switch (rm) { - case 0: - DECODE_PRINTF("[EAX]"); - return M.x86.R_EAX; - case 1: - DECODE_PRINTF("[ECX]"); - return M.x86.R_ECX; - case 2: - DECODE_PRINTF("[EDX]"); - return M.x86.R_EDX; - case 3: - DECODE_PRINTF("[EBX]"); - return M.x86.R_EBX; - case 4: - return decode_sib_address(0); - case 5: - offset = fetch_long_imm(); - DECODE_PRINTF2("[%x]", offset); - return offset; - case 6: - DECODE_PRINTF("[ESI]"); - return M.x86.R_ESI; - case 7: - DECODE_PRINTF("[EDI]"); - return M.x86.R_EDI; - } - } else { - /* 16-bit addressing */ - switch (rm) { - case 0: - DECODE_PRINTF("[BX+SI]"); - return (M.x86.R_BX + M.x86.R_SI) & 0xffff; - case 1: - DECODE_PRINTF("[BX+DI]"); - return (M.x86.R_BX + M.x86.R_DI) & 0xffff; - case 2: - DECODE_PRINTF("[BP+SI]"); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + M.x86.R_SI) & 0xffff; - case 3: - DECODE_PRINTF("[BP+DI]"); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + M.x86.R_DI) & 0xffff; - case 4: - DECODE_PRINTF("[SI]"); - return M.x86.R_SI; - case 5: - DECODE_PRINTF("[DI]"); - return M.x86.R_DI; - case 6: - offset = fetch_word_imm(); - DECODE_PRINTF2("[%x]", offset); - return offset; - case 7: - DECODE_PRINTF("[BX]"); - return M.x86.R_BX; - } - } - HALT_SYS(); - return 0; -} - -/**************************************************************************** -PARAMETERS: -rm - RM value to decode - -RETURNS: -Offset in memory for the address decoding - -REMARKS: -Return the offset given by mod=01 addressing. Also enables the -decoding of instructions. - ****************************************************************************/ -unsigned decode_rm01_address( - int rm) -{ - int displacement; - - if (M.x86.mode & SYSMODE_PREFIX_ADDR) { - /* 32-bit addressing */ - if (rm != 4) - displacement = (int8_t)fetch_byte_imm(); - else - displacement = 0; - - switch (rm) { - case 0: - DECODE_PRINTF2("%d[EAX]", displacement); - return M.x86.R_EAX + displacement; - case 1: - DECODE_PRINTF2("%d[ECX]", displacement); - return M.x86.R_ECX + displacement; - case 2: - DECODE_PRINTF2("%d[EDX]", displacement); - return M.x86.R_EDX + displacement; - case 3: - DECODE_PRINTF2("%d[EBX]", displacement); - return M.x86.R_EBX + displacement; - case 4: { - int offset = decode_sib_address(1); - displacement = (int8_t)fetch_byte_imm(); - DECODE_PRINTF2("[%d]", displacement); - return offset + displacement; - } - case 5: - DECODE_PRINTF2("%d[EBP]", displacement); - return M.x86.R_EBP + displacement; - case 6: - DECODE_PRINTF2("%d[ESI]", displacement); - return M.x86.R_ESI + displacement; - case 7: - DECODE_PRINTF2("%d[EDI]", displacement); - return M.x86.R_EDI + displacement; - } - } else { - /* 16-bit addressing */ - displacement = (int8_t)fetch_byte_imm(); - switch (rm) { - case 0: - DECODE_PRINTF2("%d[BX+SI]", displacement); - return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff; - case 1: - DECODE_PRINTF2("%d[BX+DI]", displacement); - return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff; - case 2: - DECODE_PRINTF2("%d[BP+SI]", displacement); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff; - case 3: - DECODE_PRINTF2("%d[BP+DI]", displacement); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff; - case 4: - DECODE_PRINTF2("%d[SI]", displacement); - return (M.x86.R_SI + displacement) & 0xffff; - case 5: - DECODE_PRINTF2("%d[DI]", displacement); - return (M.x86.R_DI + displacement) & 0xffff; - case 6: - DECODE_PRINTF2("%d[BP]", displacement); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + displacement) & 0xffff; - case 7: - DECODE_PRINTF2("%d[BX]", displacement); - return (M.x86.R_BX + displacement) & 0xffff; - } - } - HALT_SYS(); - return 0; /* SHOULD NOT HAPPEN */ -} - -/**************************************************************************** -PARAMETERS: -rm - RM value to decode - -RETURNS: -Offset in memory for the address decoding - -REMARKS: -Return the offset given by mod=10 addressing. Also enables the -decoding of instructions. - ****************************************************************************/ -unsigned decode_rm10_address( - int rm) -{ - if (M.x86.mode & SYSMODE_PREFIX_ADDR) { - int displacement; - - /* 32-bit addressing */ - if (rm != 4) - displacement = (int32_t)fetch_long_imm(); - else - displacement = 0; - - switch (rm) { - case 0: - DECODE_PRINTF2("%d[EAX]", displacement); - return M.x86.R_EAX + displacement; - case 1: - DECODE_PRINTF2("%d[ECX]", displacement); - return M.x86.R_ECX + displacement; - case 2: - DECODE_PRINTF2("%d[EDX]", displacement); - return M.x86.R_EDX + displacement; - case 3: - DECODE_PRINTF2("%d[EBX]", displacement); - return M.x86.R_EBX + displacement; - case 4: { - int offset = decode_sib_address(2); - displacement = (int32_t)fetch_long_imm(); - DECODE_PRINTF2("[%d]", displacement); - return offset + displacement; - } - case 5: - DECODE_PRINTF2("%d[EBP]", displacement); - return M.x86.R_EBP + displacement; - case 6: - DECODE_PRINTF2("%d[ESI]", displacement); - return M.x86.R_ESI + displacement; - case 7: - DECODE_PRINTF2("%d[EDI]", displacement); - return M.x86.R_EDI + displacement; - } - } else { - int displacement = (int16_t)fetch_word_imm(); - - /* 16-bit addressing */ - switch (rm) { - case 0: - DECODE_PRINTF2("%d[BX+SI]", displacement); - return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff; - case 1: - DECODE_PRINTF2("%d[BX+DI]", displacement); - return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff; - case 2: - DECODE_PRINTF2("%d[BP+SI]", displacement); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff; - case 3: - DECODE_PRINTF2("%d[BP+DI]", displacement); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff; - case 4: - DECODE_PRINTF2("%d[SI]", displacement); - return (M.x86.R_SI + displacement) & 0xffff; - case 5: - DECODE_PRINTF2("%d[DI]", displacement); - return (M.x86.R_DI + displacement) & 0xffff; - case 6: - DECODE_PRINTF2("%d[BP]", displacement); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + displacement) & 0xffff; - case 7: - DECODE_PRINTF2("%d[BX]", displacement); - return (M.x86.R_BX + displacement) & 0xffff; - } - } - HALT_SYS(); - return 0; /* SHOULD NOT HAPPEN */ -} - - -/**************************************************************************** -PARAMETERS: -mod - modifier -rm - RM value to decode - -RETURNS: -Offset in memory for the address decoding, multiplexing calls to -the decode_rmXX_address functions - -REMARKS: -Return the offset given by "mod" addressing. - ****************************************************************************/ - -unsigned decode_rmXX_address(int mod, int rm) -{ - if(mod == 0) - return decode_rm00_address(rm); - if(mod == 1) - return decode_rm01_address(rm); - return decode_rm10_address(rm); -} - - - diff --git a/x86emu/x86fpu.c b/x86emu/x86fpu.c deleted file mode 100644 index a1cdcef..0000000 --- a/x86emu/x86fpu.c +++ /dev/null @@ -1,999 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1991-2004 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: This file contains the code to implement the decoding and - * emulation of the FPU instructions. - * - ****************************************************************************/ - -#include "x86debug.h" -#include "x86emui.h" -#include "x86fpu.h" -#include "x86fpu_regs.h" - -/*----------------------------- Implementation ----------------------------*/ - -/* opcode=0xd8 */ -void x86emuOp_esc_coprocess_d8(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("ESC D8\r\n"); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU - -static char *x86emu_fpu_op_d9_tab[] = -{ - "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ", - "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t", - - "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ", - "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t", - - "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ", - "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t", -}; - -static char *x86emu_fpu_op_d9_tab1[] = -{ - "FLD\t", "FLD\t", "FLD\t", "FLD\t", - "FLD\t", "FLD\t", "FLD\t", "FLD\t", - - "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t", - "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t", - - "FNOP", "ESC_D9", "ESC_D9", "ESC_D9", - "ESC_D9", "ESC_D9", "ESC_D9", "ESC_D9", - - "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t", - "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t", - - "FCHS", "FABS", "ESC_D9", "ESC_D9", - "FTST", "FXAM", "ESC_D9", "ESC_D9", - - "FLD1", "FLDL2T", "FLDL2E", "FLDPI", - "FLDLG2", "FLDLN2", "FLDZ", "ESC_D9", - - "F2XM1", "FYL2X", "FPTAN", "FPATAN", - "FXTRACT", "ESC_D9", "FDECSTP", "FINCSTP", - - "FPREM", "FYL2XP1", "FSQRT", "ESC_D9", - "FRNDINT", "FSCALE", "ESC_D9", "ESC_D9", -}; - -#endif /* DBG_X86EMU */ - -/* opcode=0xd9 */ -void x86emuOp_esc_coprocess_d9(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t stkelem; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (mod != 3) - { - DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl); - } - else - { - DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]); - } -#endif - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 3: /* register to register */ - stkelem = (uint8_t)rl; - if (rh < 4) - { - DECODE_PRINTF2("ST(%d)\r\n", stkelem); - } - else - { - DECODE_PRINTF("\r\n"); - } - break; - } -#ifdef X86EMU_FPU_PRESENT - /* execute */ - switch (mod) - { - case 3: - switch (rh) - { - case 0: - x86emu_fpu_R_fld(X86EMU_FPU_STKTOP, stkelem); - break; - case 1: - x86emu_fpu_R_fxch(X86EMU_FPU_STKTOP, stkelem); - break; - case 2: - switch (rl) - { - case 0: - x86emu_fpu_R_nop(); - break; - default: - x86emu_fpu_illegal(); - break; - } - case 3: - x86emu_fpu_R_fstp(X86EMU_FPU_STKTOP, stkelem); - break; - case 4: - switch (rl) - { - case 0: - x86emu_fpu_R_fchs(X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fabs(X86EMU_FPU_STKTOP); - break; - case 4: - x86emu_fpu_R_ftst(X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fxam(X86EMU_FPU_STKTOP); - break; - default: - /* 2,3,6,7 */ - x86emu_fpu_illegal(); - break; - } - break; - - case 5: - switch (rl) - { - case 0: - x86emu_fpu_R_fld1(X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fldl2t(X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fldl2e(X86EMU_FPU_STKTOP); - break; - case 3: - x86emu_fpu_R_fldpi(X86EMU_FPU_STKTOP); - break; - case 4: - x86emu_fpu_R_fldlg2(X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fldln2(X86EMU_FPU_STKTOP); - break; - case 6: - x86emu_fpu_R_fldz(X86EMU_FPU_STKTOP); - break; - default: - /* 7 */ - x86emu_fpu_illegal(); - break; - } - break; - - case 6: - switch (rl) - { - case 0: - x86emu_fpu_R_f2xm1(X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fyl2x(X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fptan(X86EMU_FPU_STKTOP); - break; - case 3: - x86emu_fpu_R_fpatan(X86EMU_FPU_STKTOP); - break; - case 4: - x86emu_fpu_R_fxtract(X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_illegal(); - break; - case 6: - x86emu_fpu_R_decstp(); - break; - case 7: - x86emu_fpu_R_incstp(); - break; - } - break; - - case 7: - switch (rl) - { - case 0: - x86emu_fpu_R_fprem(X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fyl2xp1(X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fsqrt(X86EMU_FPU_STKTOP); - break; - case 3: - x86emu_fpu_illegal(); - break; - case 4: - x86emu_fpu_R_frndint(X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fscale(X86EMU_FPU_STKTOP); - break; - case 6: - case 7: - default: - x86emu_fpu_illegal(); - break; - } - break; - - default: - switch (rh) - { - case 0: - x86emu_fpu_M_fld(X86EMU_FPU_FLOAT, destoffset); - break; - case 1: - x86emu_fpu_illegal(); - break; - case 2: - x86emu_fpu_M_fst(X86EMU_FPU_FLOAT, destoffset); - break; - case 3: - x86emu_fpu_M_fstp(X86EMU_FPU_FLOAT, destoffset); - break; - case 4: - x86emu_fpu_M_fldenv(X86EMU_FPU_WORD, destoffset); - break; - case 5: - x86emu_fpu_M_fldcw(X86EMU_FPU_WORD, destoffset); - break; - case 6: - x86emu_fpu_M_fstenv(X86EMU_FPU_WORD, destoffset); - break; - case 7: - x86emu_fpu_M_fstcw(X86EMU_FPU_WORD, destoffset); - break; - } - } - } -#endif /* X86EMU_FPU_PRESENT */ - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU - -char *x86emu_fpu_op_da_tab[] = -{ - "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ", - "FICOMP\tDWORD PTR ", - "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ", - "FIDIVR\tDWORD PTR ", - - "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ", - "FICOMP\tDWORD PTR ", - "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ", - "FIDIVR\tDWORD PTR ", - - "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ", - "FICOMP\tDWORD PTR ", - "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ", - "FIDIVR\tDWORD PTR ", - - "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ", - "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ", -}; -#endif /* DBG_X86EMU */ - -/* opcode=0xda */ -void x86emuOp_esc_coprocess_da(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t stkelem; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTINSTR32(x86emu_fpu_op_da_tab, mod, rh, rl); - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 3: /* register to register */ - stkelem = (uint8_t)rl; - DECODE_PRINTF2("\tST(%d),ST\r\n", stkelem); - break; - } -#ifdef X86EMU_FPU_PRESENT - switch (mod) - { - case 3: - x86emu_fpu_illegal(); - break; - default: - switch (rh) - { - case 0: - x86emu_fpu_M_iadd(X86EMU_FPU_SHORT, destoffset); - break; - case 1: - x86emu_fpu_M_imul(X86EMU_FPU_SHORT, destoffset); - break; - case 2: - x86emu_fpu_M_icom(X86EMU_FPU_SHORT, destoffset); - break; - case 3: - x86emu_fpu_M_icomp(X86EMU_FPU_SHORT, destoffset); - break; - case 4: - x86emu_fpu_M_isub(X86EMU_FPU_SHORT, destoffset); - break; - case 5: - x86emu_fpu_M_isubr(X86EMU_FPU_SHORT, destoffset); - break; - case 6: - x86emu_fpu_M_idiv(X86EMU_FPU_SHORT, destoffset); - break; - case 7: - x86emu_fpu_M_idivr(X86EMU_FPU_SHORT, destoffset); - break; - } - } -#endif - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU - -char *x86emu_fpu_op_db_tab[] = -{ - "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ", - "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ", - - "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ", - "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ", - - "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ", - "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ", -}; - -#endif /* DBG_X86EMU */ - -/* opcode=0xdb */ -void x86emuOp_esc_coprocess_db(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (mod != 3) - { - DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl); - } - else if (rh == 4) - { /* === 11 10 0 nnn */ - switch (rl) - { - case 0: - DECODE_PRINTF("FENI\r\n"); - break; - case 1: - DECODE_PRINTF("FDISI\r\n"); - break; - case 2: - DECODE_PRINTF("FCLEX\r\n"); - break; - case 3: - DECODE_PRINTF("FINIT\r\n"); - break; - } - } - else - { - DECODE_PRINTF2("ESC_DB %0x\r\n", (mod << 6) + (rh << 3) + (rl)); - } -#endif /* DBG_X86EMU */ - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - break; - case 1: - destoffset = decode_rm01_address(rl); - break; - case 2: - destoffset = decode_rm10_address(rl); - break; - case 3: /* register to register */ - break; - } -#ifdef X86EMU_FPU_PRESENT - /* execute */ - switch (mod) - { - case 3: - switch (rh) - { - case 4: - switch (rl) - { - case 0: - x86emu_fpu_R_feni(); - break; - case 1: - x86emu_fpu_R_fdisi(); - break; - case 2: - x86emu_fpu_R_fclex(); - break; - case 3: - x86emu_fpu_R_finit(); - break; - default: - x86emu_fpu_illegal(); - break; - } - break; - default: - x86emu_fpu_illegal(); - break; - } - break; - default: - switch (rh) - { - case 0: - x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset); - break; - case 1: - x86emu_fpu_illegal(); - break; - case 2: - x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset); - break; - case 3: - x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset); - break; - case 4: - x86emu_fpu_illegal(); - break; - case 5: - x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset); - break; - case 6: - x86emu_fpu_illegal(); - break; - case 7: - x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset); - break; - } - } -#endif - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU -char *x86emu_fpu_op_dc_tab[] = -{ - "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ", - "FCOMP\tQWORD PTR ", - "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ", - "FDIVR\tQWORD PTR ", - - "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ", - "FCOMP\tQWORD PTR ", - "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ", - "FDIVR\tQWORD PTR ", - - "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ", - "FCOMP\tQWORD PTR ", - "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ", - "FDIVR\tQWORD PTR ", - - "FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t", - "FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t", -}; -#endif /* DBG_X86EMU */ - -/* opcode=0xdc */ -void x86emuOp_esc_coprocess_dc(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t stkelem; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTINSTR32(x86emu_fpu_op_dc_tab, mod, rh, rl); - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 3: /* register to register */ - stkelem = (uint8_t)rl; - DECODE_PRINTF2("\tST(%d),ST\r\n", stkelem); - break; - } -#ifdef X86EMU_FPU_PRESENT - /* execute */ - switch (mod) - { - case 3: - switch (rh) - { - case 0: - x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP); - break; - case 3: - x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP); - break; - case 4: - x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP); - break; - case 6: - x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP); - break; - case 7: - x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP); - break; - } - break; - default: - switch (rh) - { - case 0: - x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset); - break; - case 1: - x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset); - break; - case 2: - x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset); - break; - case 3: - x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset); - break; - case 4: - x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset); - break; - case 5: - x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset); - break; - case 6: - x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset); - break; - case 7: - x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset); - break; - } - } -#endif - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU - -static char *x86emu_fpu_op_dd_tab[] = -{ - "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ", - "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t", - - "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ", - "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t", - - "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ", - "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t", - - "FFREE\t", "FXCH\t", "FST\t", "FSTP\t", - "ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,", -}; - -#endif /* DBG_X86EMU */ - -/* opcode=0xdd */ -void x86emuOp_esc_coprocess_dd(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t stkelem; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTINSTR32(x86emu_fpu_op_dd_tab, mod, rh, rl); - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 3: /* register to register */ - stkelem = (uint8_t)rl; - DECODE_PRINTF2("\tST(%d),ST\r\n", stkelem); - break; - } -#ifdef X86EMU_FPU_PRESENT - switch (mod) - { - case 3: - switch (rh) - { - case 0: - x86emu_fpu_R_ffree(stkelem); - break; - case 1: - x86emu_fpu_R_fxch(stkelem); - break; - case 2: - x86emu_fpu_R_fst(stkelem); /* register version */ - break; - case 3: - x86emu_fpu_R_fstp(stkelem); /* register version */ - break; - default: - x86emu_fpu_illegal(); - break; - } - break; - default: - switch (rh) - { - case 0: - x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset); - break; - case 1: - x86emu_fpu_illegal(); - break; - case 2: - x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset); - break; - case 3: - x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset); - break; - case 4: - x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset); - break; - case 5: - x86emu_fpu_illegal(); - break; - case 6: - x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset); - break; - case 7: - x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset); - break; - } - } -#endif - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU - -static char *x86emu_fpu_op_de_tab[] = -{ - "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ", - "FICOMP\tWORD PTR ", - "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ", - "FIDIVR\tWORD PTR ", - - "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ", - "FICOMP\tWORD PTR ", - "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ", - "FIDIVR\tWORD PTR ", - - "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ", - "FICOMP\tWORD PTR ", - "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ", - "FIDIVR\tWORD PTR ", - - "FADDP\t", "FMULP\t", "FCOMP\t", "FCOMPP\t", - "FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t", -}; - -#endif /* DBG_X86EMU */ - -/* opcode=0xde */ -void x86emuOp_esc_coprocess_de(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t stkelem; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTINSTR32(x86emu_fpu_op_de_tab, mod, rh, rl); - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 3: /* register to register */ - stkelem = (uint8_t)rl; - DECODE_PRINTF2("\tST(%d),ST\r\n", stkelem); - break; - } -#ifdef X86EMU_FPU_PRESENT - switch (mod) - { - case 3: - switch (rh) - { - case 0: - x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fmulp(stkelem, X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP); - break; - case 3: - if (stkelem == 1) - x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP); - else - x86emu_fpu_illegal(); - break; - case 4: - x86emu_fpu_R_fsubrp(stkelem, X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fsubp(stkelem, X86EMU_FPU_STKTOP); - break; - case 6: - x86emu_fpu_R_fdivrp(stkelem, X86EMU_FPU_STKTOP); - break; - case 7: - x86emu_fpu_R_fdivp(stkelem, X86EMU_FPU_STKTOP); - break; - } - break; - default: - switch (rh) - { - case 0: - x86emu_fpu_M_fiadd(X86EMU_FPU_WORD, destoffset); - break; - case 1: - x86emu_fpu_M_fimul(X86EMU_FPU_WORD, destoffset); - break; - case 2: - x86emu_fpu_M_ficom(X86EMU_FPU_WORD, destoffset); - break; - case 3: - x86emu_fpu_M_ficomp(X86EMU_FPU_WORD, destoffset); - break; - case 4: - x86emu_fpu_M_fisub(X86EMU_FPU_WORD, destoffset); - break; - case 5: - x86emu_fpu_M_fisubr(X86EMU_FPU_WORD, destoffset); - break; - case 6: - x86emu_fpu_M_fidiv(X86EMU_FPU_WORD, destoffset); - break; - case 7: - x86emu_fpu_M_fidivr(X86EMU_FPU_WORD, destoffset); - break; - } - } -#endif - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU - -static char *x86emu_fpu_op_df_tab[] = -{ - /* mod == 00 */ - "FILD\tWORD PTR ", "ESC_DF\t39\n", "FIST\tWORD PTR ", "FISTP\tWORD PTR ", - "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ", - "FISTP\tQWORD PTR ", - - /* mod == 01 */ - "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ", - "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ", - "FISTP\tQWORD PTR ", - - /* mod == 10 */ - "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ", - "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ", - "FISTP\tQWORD PTR ", - - /* mod == 11 */ - "FFREE\t", "FXCH\t", "FST\t", "FSTP\t", - "ESC_DF\t3C,", "ESC_DF\t3D,", "ESC_DF\t3E,", "ESC_DF\t3F," -}; - -#endif /* DBG_X86EMU */ - -/* opcode=0xdf */ -void x86emuOp_esc_coprocess_df(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t stkelem; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTINSTR32(x86emu_fpu_op_df_tab, mod, rh, rl); - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 3: /* register to register */ - stkelem = (uint8_t)rl; - DECODE_PRINTF2("\tST(%d)\r\n", stkelem); - break; - } -#ifdef X86EMU_FPU_PRESENT - switch (mod) - { - case 3: - switch (rh) - { - case 0: - x86emu_fpu_R_ffree(stkelem); - break; - case 1: - x86emu_fpu_R_fxch(stkelem); - break; - case 2: - x86emu_fpu_R_fst(stkelem); /* register version */ - break; - case 3: - x86emu_fpu_R_fstp(stkelem); /* register version */ - break; - default: - x86emu_fpu_illegal(); - break; - } - break; - default: - switch (rh) - { - case 0: - x86emu_fpu_M_fild(X86EMU_FPU_WORD, destoffset); - break; - case 1: - x86emu_fpu_illegal(); - break; - case 2: - x86emu_fpu_M_fist(X86EMU_FPU_WORD, destoffset); - break; - case 3: - x86emu_fpu_M_fistp(X86EMU_FPU_WORD, destoffset); - break; - case 4: - x86emu_fpu_M_fbld(X86EMU_FPU_BSD, destoffset); - break; - case 5: - x86emu_fpu_M_fild(X86EMU_FPU_LONG, destoffset); - break; - case 6: - x86emu_fpu_M_fbstp(X86EMU_FPU_BSD, destoffset); - break; - case 7: - x86emu_fpu_M_fistp(X86EMU_FPU_LONG, destoffset); - break; - } - } -#endif - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} diff --git a/x86emu/x86ops.c b/x86emu/x86ops.c deleted file mode 100644 index 2ee7c7b..0000000 --- a/x86emu/x86ops.c +++ /dev/null @@ -1,5428 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1991-2004 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: This file includes subroutines to implement the decoding - * and emulation of all the x86 processor instructions. - * - * There are approximately 250 subroutines in here, which correspond - * to the 256 byte-"opcodes" found on the 8086. The table which - * dispatches this is found in the files optab.[ch]. - * - * Each opcode proc has a comment preceeding it which gives it's table - * address. Several opcodes are missing (undefined) in the table. - * - * Each proc includes information for decoding (DECODE_PRINTF and - * DECODE_PRINTF2), debugging (TRACE_REGS, SINGLE_STEP), and misc - * functions (START_OF_INSTR, END_OF_INSTR). - * - * Many of the procedures are *VERY* similar in coding. This has - * allowed for a very large amount of code to be generated in a fairly - * short amount of time (i.e. cut, paste, and modify). The result is - * that much of the code below could have been folded into subroutines - * for a large reduction in size of this file. The downside would be - * that there would be a penalty in execution speed. The file could - * also have been *MUCH* larger by inlining certain functions which - * were called. This could have resulted even faster execution. The - * prime directive I used to decide whether to inline the code or to - * modularize it, was basically: 1) no unnecessary subroutine calls, - * 2) no routines more than about 200 lines in size, and 3) modularize - * any code that I might not get right the first time. The fetch_* - * subroutines fall into the latter category. The The decode_* fall - * into the second category. The coding of the "switch(mod){ .... }" - * in many of the subroutines below falls into the first category. - * Especially, the coding of {add,and,or,sub,...}_{byte,word} - * subroutines are an especially glaring case of the third guideline. - * Since so much of the code is cloned from other modules (compare - * opcode #00 to opcode #01), making the basic operations subroutine - * calls is especially important; otherwise mistakes in coding an - * "add" would represent a nightmare in maintenance. - * - ****************************************************************************/ - -#include "x86debug.h" -#include "x86emui.h" - -extern unsigned decode_rmXX_address(int mod, int rm); - -/*----------------------------- Implementation ----------------------------*/ - -/* constant arrays to do several instructions in just one function */ - -#ifdef DBG_X86EMU -static char *x86emu_GenOpName[8] = -{ - "ADD", "OR", "ADC", "SBB", "AND", "SUB", "XOR", "CMP" -}; -#endif - -/* used by several opcodes */ -static uint8_t (*genop_byte_operation[])(uint8_t d, uint8_t s) = -{ - add_byte, /* 00 */ - or_byte, /* 01 */ - adc_byte, /* 02 */ - sbb_byte, /* 03 */ - and_byte, /* 04 */ - sub_byte, /* 05 */ - xor_byte, /* 06 */ - cmp_byte, /* 07 */ -}; - -static uint16_t (*genop_word_operation[])(uint16_t d, uint16_t s) = -{ - add_word, /*00 */ - or_word, /*01 */ - adc_word, /*02 */ - sbb_word, /*03 */ - and_word, /*04 */ - sub_word, /*05 */ - xor_word, /*06 */ - cmp_word, /*07 */ -}; - -static uint32_t (*genop_long_operation[])(uint32_t d, uint32_t s) = -{ - add_long, /*00 */ - or_long, /*01 */ - adc_long, /*02 */ - sbb_long, /*03 */ - and_long, /*04 */ - sub_long, /*05 */ - xor_long, /*06 */ - cmp_long, /*07 */ -}; - -/* used by opcodes 80, c0, d0, and d2. */ -static uint8_t(*opcD0_byte_operation[])(uint8_t d, uint8_t s) = -{ - rol_byte, - ror_byte, - rcl_byte, - rcr_byte, - shl_byte, - shr_byte, - shl_byte, /* sal_byte === shl_byte by definition */ - sar_byte, -}; - -/* used by opcodes c1, d1, and d3. */ -static uint16_t(*opcD1_word_operation[])(uint16_t s, uint8_t d) = -{ - rol_word, - ror_word, - rcl_word, - rcr_word, - shl_word, - shr_word, - shl_word, /* sal_byte === shl_byte by definition */ - sar_word, -}; - -/* used by opcodes c1, d1, and d3. */ -static uint32_t (*opcD1_long_operation[])(uint32_t s, uint8_t d) = -{ - rol_long, - ror_long, - rcl_long, - rcr_long, - shl_long, - shr_long, - shl_long, /* sal_byte === shl_byte by definition */ - sar_long, -}; - -#ifdef DBG_X86EMU - -static char *opF6_names[8] = -{ "TEST\t", "", "NOT\t", "NEG\t", "MUL\t", "IMUL\t", "DIV\t", "IDIV\t" }; - -#endif - -/* - * PARAMETERS: - * op1 - Instruction op code - * - * REMARKS: - * Handles illegal opcodes. - */ -void x86emuOp_illegal_op(uint8_t op1) -{ - START_OF_INSTR(); - if (M.x86.R_SP != 0) { - DECODE_PRINTF("ILLEGAL X86 OPCODE\r\n"); - TRACE_REGS(); - dbg("%04x:%04x: %02X ILLEGAL X86 OPCODE!\r\n", M.x86.R_CS, M.x86.R_IP - 1, op1); - dbg(" ILLEGAL X86 OPCODE!\r\n"); - HALT_SYS(); - } - else { - /* If we get here, it means the stack pointer is back to zero - * so we are just returning from an emulator service call - * so therte is no need to display an error message. We trap - * the emulator with an 0xF1 opcode to finish the service - * call. - */ - X86EMU_halt_sys(); - } - END_OF_INSTR(); -} - -/* - * REMARKS: - * Handles opcodes 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38 - */ -void x86emuOp_genop_byte_RM_R(uint8_t op1) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t *destreg, *srcreg; - uint8_t destval; - - op1 = (op1 >> 3) & 0x7; - - START_OF_INSTR(); - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) - { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = genop_byte_operation[op1](destval, *srcreg); - store_data_byte(destoffset, destval); - } - else - { - /* register to register */ - - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = genop_byte_operation[op1](*destreg, *srcreg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/* - * REMARKS: - * Handles opcodes 0x01, 0x09, 0x11, 0x19, 0x21, 0x29, 0x31, 0x39 - */ -void x86emuOp_genop_word_RM_R(uint8_t op1) -{ - int mod, rl, rh; - unsigned int destoffset; - - op1 = (op1 >> 3) & 0x7; - - START_OF_INSTR(); - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - - if (mod < 3) - { - destoffset = decode_rmXX_address(mod,rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) - { - uint32_t destval; - uint32_t *srcreg; - - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = genop_long_operation[op1](destval, *srcreg); - if (op1 != 7) - store_data_long(destoffset, destval); - } - else - { - uint16_t destval; - uint16_t *srcreg; - - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = genop_word_operation[op1](destval, *srcreg); - if (op1 != 7) - store_data_word(destoffset, destval); - } - } - else - { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) - { - uint32_t *destreg, *srcreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = genop_long_operation[op1](*destreg, *srcreg); - } - else - { - uint16_t *destreg, *srcreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = genop_word_operation[op1](*destreg, *srcreg); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/* - * REMARKS: - * Handles opcodes 0x02, 0x0a, 0x12, 0x1a, 0x22, 0x2a, 0x32, 0x3a - */ -void x86emuOp_genop_byte_R_RM(uint8_t op1) -{ - int mod, rl, rh; - uint8_t *destreg, *srcreg; - unsigned int srcoffset; - uint8_t srcval; - - op1 = (op1 >> 3) & 0x7; - - START_OF_INSTR(); - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod,rl); - srcval = fetch_data_byte(srcoffset); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - srcval = *srcreg; - } - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = genop_byte_operation[op1](*destreg, srcval); - - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcodes 0x03, 0x0b, 0x13, 0x1b, 0x23, 0x2b, 0x33, 0x3b - ****************************************************************************/ -void x86emuOp_genop_word_R_RM(uint8_t op1) -{ - int mod, rl, rh; - unsigned int srcoffset; - uint32_t *destreg32, srcval; - uint16_t *destreg; - - op1 = (op1 >> 3) & 0x7; - - START_OF_INSTR(); - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod,rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - destreg32 = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg32 = genop_long_operation[op1](*destreg32, srcval); - } else { - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = genop_word_operation[op1](*destreg, srcval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg; - destreg32 = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg32 = genop_long_operation[op1](*destreg32, *srcreg); - } else { - uint16_t *srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = genop_word_operation[op1](*destreg, *srcreg); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcodes 0x04, 0x0c, 0x14, 0x1c, 0x24, 0x2c, 0x34, 0x3c - ****************************************************************************/ -void x86emuOp_genop_byte_AL_IMM(uint8_t op1) -{ - uint8_t srcval; - - op1 = (op1 >> 3) & 0x7; - - START_OF_INSTR(); - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\tAL,"); - srcval = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - M.x86.R_AL = genop_byte_operation[op1](M.x86.R_AL, srcval); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcodes 0x05, 0x0d, 0x15, 0x1d, 0x25, 0x2d, 0x35, 0x3d - ****************************************************************************/ -void x86emuOp_genop_word_AX_IMM(uint8_t op1) -{ - uint32_t srcval; - - op1 = (op1 >> 3) & 0x7; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\tEAX,"); - srcval = fetch_long_imm(); - } else { - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\tAX,"); - srcval = fetch_word_imm(); - } - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = genop_long_operation[op1](M.x86.R_EAX, srcval); - } else { - M.x86.R_AX = genop_word_operation[op1](M.x86.R_AX, (uint16_t)srcval); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x06 - ****************************************************************************/ -void x86emuOp_push_ES(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("PUSH\tES\r\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_ES); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x07 - ****************************************************************************/ -void x86emuOp_pop_ES(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("POP\tES\r\n"); - TRACE_AND_STEP(); - M.x86.R_ES = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0e - ****************************************************************************/ -void x86emuOp_push_CS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("PUSH\tCS\r\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_CS); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f. Escape for two-byte opcode (286 or better) - ****************************************************************************/ -void x86emuOp_two_byte(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t op2 = (*sys_rdb)(((uint32_t)M.x86.R_CS << 4) + (M.x86.R_IP++)); - INC_DECODED_INST_LEN(1); - (*x86emu_optab2[op2])(op2); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x16 - ****************************************************************************/ -void x86emuOp_push_SS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("PUSH\tSS\r\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_SS); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x17 - ****************************************************************************/ -void x86emuOp_pop_SS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("POP\tSS\r\n"); - TRACE_AND_STEP(); - M.x86.R_SS = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x1e - ****************************************************************************/ -void x86emuOp_push_DS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("PUSH\tDS\r\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_DS); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x1f - ****************************************************************************/ -void x86emuOp_pop_DS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("POP\tDS\r\n"); - TRACE_AND_STEP(); - M.x86.R_DS = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x26 - ****************************************************************************/ -void x86emuOp_segovr_ES(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("ES:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_SEGOVR_ES; - /* - * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4 - * opcode subroutines we do not want to do this. - */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x27 - ****************************************************************************/ -void x86emuOp_daa(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("DAA\r\n"); - TRACE_AND_STEP(); - M.x86.R_AL = daa_byte(M.x86.R_AL); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x2e - ****************************************************************************/ -void x86emuOp_segovr_CS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("CS:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_SEGOVR_CS; - /* note no DECODE_CLEAR_SEGOVR here. */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x2f - ****************************************************************************/ -void x86emuOp_das(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("DAS\r\n"); - TRACE_AND_STEP(); - M.x86.R_AL = das_byte(M.x86.R_AL); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x36 - ****************************************************************************/ -void x86emuOp_segovr_SS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("SS:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_SEGOVR_SS; - /* no DECODE_CLEAR_SEGOVR ! */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x37 - ****************************************************************************/ -void x86emuOp_aaa(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("AAA\r\n"); - TRACE_AND_STEP(); - M.x86.R_AX = aaa_word(M.x86.R_AX); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x3e - ****************************************************************************/ -void x86emuOp_segovr_DS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("DS:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_SEGOVR_DS; - /* NO DECODE_CLEAR_SEGOVR! */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x3f - ****************************************************************************/ -void x86emuOp_aas(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("AAS\r\n"); - TRACE_AND_STEP(); - M.x86.R_AX = aas_word(M.x86.R_AX); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x40 - 0x47 - ****************************************************************************/ -void x86emuOp_inc_register(uint8_t op1) -{ - START_OF_INSTR(); - op1 &= 0x7; - DECODE_PRINTF("INC\t"); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *reg; - reg = DECODE_RM_LONG_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *reg = inc_long(*reg); - } else { - uint16_t *reg; - reg = DECODE_RM_WORD_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *reg = inc_word(*reg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x48 - 0x4F - ****************************************************************************/ -void x86emuOp_dec_register(uint8_t op1) -{ - START_OF_INSTR(); - op1 &= 0x7; - DECODE_PRINTF("DEC\t"); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *reg; - reg = DECODE_RM_LONG_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *reg = dec_long(*reg); - } else { - uint16_t *reg; - reg = DECODE_RM_WORD_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *reg = dec_word(*reg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x50 - 0x57 - ****************************************************************************/ -void x86emuOp_push_register(uint8_t op1) -{ - START_OF_INSTR(); - op1 &= 0x7; - DECODE_PRINTF("PUSH\t"); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *reg; - reg = DECODE_RM_LONG_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - push_long(*reg); - } else { - uint16_t *reg; - reg = DECODE_RM_WORD_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - push_word(*reg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x58 - 0x5F - ****************************************************************************/ -void x86emuOp_pop_register(uint8_t op1) -{ - START_OF_INSTR(); - op1 &= 0x7; - DECODE_PRINTF("POP\t"); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *reg; - reg = DECODE_RM_LONG_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *reg = pop_long(); - } else { - uint16_t *reg; - reg = DECODE_RM_WORD_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *reg = pop_word(); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x60 - ****************************************************************************/ -void x86emuOp_push_all(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSHAD\r\n"); - } else { - DECODE_PRINTF("PUSHA\r\n"); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t old_sp = M.x86.R_ESP; - - push_long(M.x86.R_EAX); - push_long(M.x86.R_ECX); - push_long(M.x86.R_EDX); - push_long(M.x86.R_EBX); - push_long(old_sp); - push_long(M.x86.R_EBP); - push_long(M.x86.R_ESI); - push_long(M.x86.R_EDI); - } else { - uint16_t old_sp = M.x86.R_SP; - - push_word(M.x86.R_AX); - push_word(M.x86.R_CX); - push_word(M.x86.R_DX); - push_word(M.x86.R_BX); - push_word(old_sp); - push_word(M.x86.R_BP); - push_word(M.x86.R_SI); - push_word(M.x86.R_DI); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x61 - ****************************************************************************/ -void x86emuOp_pop_all(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POPAD\r\n"); - } else { - DECODE_PRINTF("POPA\r\n"); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EDI = pop_long(); - M.x86.R_ESI = pop_long(); - M.x86.R_EBP = pop_long(); - M.x86.R_ESP += 4; /* skip ESP */ - M.x86.R_EBX = pop_long(); - M.x86.R_EDX = pop_long(); - M.x86.R_ECX = pop_long(); - M.x86.R_EAX = pop_long(); - } else { - M.x86.R_DI = pop_word(); - M.x86.R_SI = pop_word(); - M.x86.R_BP = pop_word(); - M.x86.R_SP += 2; /* skip SP */ - M.x86.R_BX = pop_word(); - M.x86.R_DX = pop_word(); - M.x86.R_CX = pop_word(); - M.x86.R_AX = pop_word(); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/*opcode 0x62 ILLEGAL OP, calls x86emuOp_illegal_op() */ -/*opcode 0x63 ILLEGAL OP, calls x86emuOp_illegal_op() */ - -/**************************************************************************** -REMARKS: -Handles opcode 0x64 - ****************************************************************************/ -void x86emuOp_segovr_FS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("FS:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_SEGOVR_FS; - /* - * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4 - * opcode subroutines we do not want to do this. - */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x65 - ****************************************************************************/ -void x86emuOp_segovr_GS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("GS:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_SEGOVR_GS; - /* - * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4 - * opcode subroutines we do not want to do this. - */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x66 - prefix for 32-bit register - ****************************************************************************/ -void x86emuOp_prefix_data(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("DATA:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_PREFIX_DATA; - /* note no DECODE_CLEAR_SEGOVR here. */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x67 - prefix for 32-bit address - ****************************************************************************/ -void x86emuOp_prefix_addr(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("ADDR:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_PREFIX_ADDR; - /* note no DECODE_CLEAR_SEGOVR here. */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x68 - ****************************************************************************/ -void x86emuOp_push_word_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t imm; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - imm = fetch_long_imm(); - } else { - imm = fetch_word_imm(); - } - DECODE_PRINTF2("PUSH\t%x\r\n", imm); - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(imm); - } else { - push_word((uint16_t)imm); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x69 - ****************************************************************************/ -void x86emuOp_imul_word_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("IMUL\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - uint32_t res_lo,res_hi; - int32_t imm; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcval = fetch_data_long(srcoffset); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(int32_t)srcval,(int32_t)imm); - if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) || - (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint32_t)res_lo; - } else { - uint16_t *destreg; - uint16_t srcval; - uint32_t res; - int16_t imm; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcval = fetch_data_word(srcoffset); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - res = (int16_t)srcval * (int16_t)imm; - if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) || - (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint16_t)res; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*srcreg; - uint32_t res_lo,res_hi; - int32_t imm; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(int32_t)*srcreg,(int32_t)imm); - if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) || - (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint32_t)res_lo; - } else { - uint16_t *destreg,*srcreg; - uint32_t res; - int16_t imm; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - res = (int16_t)*srcreg * (int16_t)imm; - if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) || - (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint16_t)res; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x6a - ****************************************************************************/ -void x86emuOp_push_byte_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int16_t imm; - - START_OF_INSTR(); - imm = (int8_t)fetch_byte_imm(); - DECODE_PRINTF2("PUSH\t%d\r\n", imm); - TRACE_AND_STEP(); - push_word(imm); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x6b - ****************************************************************************/ -void x86emuOp_imul_byte_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int srcoffset; - int8_t imm; - - START_OF_INSTR(); - DECODE_PRINTF("IMUL\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - uint32_t res_lo,res_hi; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcval = fetch_data_long(srcoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(int32_t)srcval,(int32_t)imm); - if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) || - (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint32_t)res_lo; - } else { - uint16_t *destreg; - uint16_t srcval; - uint32_t res; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcval = fetch_data_word(srcoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - res = (int16_t)srcval * (int16_t)imm; - if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) || - (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint16_t)res; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*srcreg; - uint32_t res_lo,res_hi; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(int32_t)*srcreg,(int32_t)imm); - if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) || - (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint32_t)res_lo; - } else { - uint16_t *destreg,*srcreg; - uint32_t res; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - res = (int16_t)*srcreg * (int16_t)imm; - if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) || - (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint16_t)res; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x6c - ****************************************************************************/ -void x86emuOp_ins_byte(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("INSB\r\n"); - ins(1); - TRACE_AND_STEP(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x6d - ****************************************************************************/ -void x86emuOp_ins_word(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INSD\r\n"); - ins(4); - } else { - DECODE_PRINTF("INSW\r\n"); - ins(2); - } - TRACE_AND_STEP(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x6e - ****************************************************************************/ -void x86emuOp_outs_byte(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("OUTSB\r\n"); - outs(1); - TRACE_AND_STEP(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x6f - ****************************************************************************/ -void x86emuOp_outs_word(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("OUTSD\r\n"); - outs(4); - } else { - DECODE_PRINTF("OUTSW\r\n"); - outs(2); - } - TRACE_AND_STEP(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x70 - 0x7F - ****************************************************************************/ -int x86emu_check_jump_condition(uint8_t op); - -void x86emuOp_jump_near_cond(uint8_t op1) -{ - int8_t offset; - uint16_t target; - int cond; - - /* jump to byte offset if overflow flag is set */ - START_OF_INSTR(); - cond = x86emu_check_jump_condition(op1 & 0xF); - offset = (int8_t)fetch_byte_imm(); - target = (uint16_t)(M.x86.R_IP + (int16_t)offset); - DECODE_PRINTF2("%x\r\n", target); - TRACE_AND_STEP(); - if (cond) - M.x86.R_IP = target; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x80 - ****************************************************************************/ -void x86emuOp_opc80_byte_RM_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t imm; - uint8_t destval; - - /* - * Weirdo special case instruction format. Part of the opcode - * held below in "RH". Doubly nested case would result, except - * that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - - switch (rh) { - case 0: - DECODE_PRINTF("ADD\t"); - break; - case 1: - DECODE_PRINTF("OR\t"); - break; - case 2: - DECODE_PRINTF("ADC\t"); - break; - case 3: - DECODE_PRINTF("SBB\t"); - break; - case 4: - DECODE_PRINTF("AND\t"); - break; - case 5: - DECODE_PRINTF("SUB\t"); - break; - case 6: - DECODE_PRINTF("XOR\t"); - break; - case 7: - DECODE_PRINTF("CMP\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - destval = (*genop_byte_operation[rh]) (destval, imm); - if (rh != 7) - store_data_byte(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - imm = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = (*genop_byte_operation[rh]) (*destreg, imm); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x81 - ****************************************************************************/ -void x86emuOp_opc81_word_RM_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - /* - * Weirdo special case instruction format. Part of the opcode - * held below in "RH". Doubly nested case would result, except - * that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - - switch (rh) { - case 0: - DECODE_PRINTF("ADD\t"); - break; - case 1: - DECODE_PRINTF("OR\t"); - break; - case 2: - DECODE_PRINTF("ADC\t"); - break; - case 3: - DECODE_PRINTF("SBB\t"); - break; - case 4: - DECODE_PRINTF("AND\t"); - break; - case 5: - DECODE_PRINTF("SUB\t"); - break; - case 6: - DECODE_PRINTF("XOR\t"); - break; - case 7: - DECODE_PRINTF("CMP\t"); - break; - } - } -#endif - /* - * Know operation, decode the mod byte to find the addressing - * mode. - */ - if (mod < 3) { - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval,imm; - - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - imm = fetch_long_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - destval = (*genop_long_operation[rh]) (destval, imm); - if (rh != 7) - store_data_long(destoffset, destval); - } else { - uint16_t destval,imm; - - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - imm = fetch_word_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - destval = (*genop_word_operation[rh]) (destval, imm); - if (rh != 7) - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg, imm; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - imm = fetch_long_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = (*genop_long_operation[rh]) (*destreg, imm); - } else { - uint16_t *destreg, imm; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - imm = fetch_word_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = (*genop_word_operation[rh]) (*destreg, imm); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x82 - ****************************************************************************/ -void x86emuOp_opc82_byte_RM_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t imm; - uint8_t destval; - - /* - * Weirdo special case instruction format. Part of the opcode - * held below in "RH". Doubly nested case would result, except - * that the decoded instruction Similar to opcode 81, except that - * the immediate byte is sign extended to a word length. - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ADD\t"); - break; - case 1: - DECODE_PRINTF("OR\t"); - break; - case 2: - DECODE_PRINTF("ADC\t"); - break; - case 3: - DECODE_PRINTF("SBB\t"); - break; - case 4: - DECODE_PRINTF("AND\t"); - break; - case 5: - DECODE_PRINTF("SUB\t"); - break; - case 6: - DECODE_PRINTF("XOR\t"); - break; - case 7: - DECODE_PRINTF("CMP\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - destval = fetch_data_byte(destoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - destval = (*genop_byte_operation[rh]) (destval, imm); - if (rh != 7) - store_data_byte(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = (*genop_byte_operation[rh]) (*destreg, imm); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x83 - ****************************************************************************/ -void x86emuOp_opc83_word_RM_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - /* - * Weirdo special case instruction format. Part of the opcode - * held below in "RH". Doubly nested case would result, except - * that the decoded instruction Similar to opcode 81, except that - * the immediate byte is sign extended to a word length. - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ADD\t"); - break; - case 1: - DECODE_PRINTF("OR\t"); - break; - case 2: - DECODE_PRINTF("ADC\t"); - break; - case 3: - DECODE_PRINTF("SBB\t"); - break; - case 4: - DECODE_PRINTF("AND\t"); - break; - case 5: - DECODE_PRINTF("SUB\t"); - break; - case 6: - DECODE_PRINTF("XOR\t"); - break; - case 7: - DECODE_PRINTF("CMP\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod,rl); - - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval,imm; - - destval = fetch_data_long(destoffset); - imm = (int8_t) fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - destval = (*genop_long_operation[rh]) (destval, imm); - if (rh != 7) - store_data_long(destoffset, destval); - } else { - uint16_t destval,imm; - - destval = fetch_data_word(destoffset); - imm = (int8_t) fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - destval = (*genop_word_operation[rh]) (destval, imm); - if (rh != 7) - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg, imm; - - destreg = DECODE_RM_LONG_REGISTER(rl); - imm = (int8_t) fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = (*genop_long_operation[rh]) (*destreg, imm); - } else { - uint16_t *destreg, imm; - - destreg = DECODE_RM_WORD_REGISTER(rl); - imm = (int8_t) fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = (*genop_word_operation[rh]) (*destreg, imm); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x84 - ****************************************************************************/ -void x86emuOp_test_byte_RM_R(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg, *srcreg; - unsigned int destoffset; - uint8_t destval; - - START_OF_INSTR(); - DECODE_PRINTF("TEST\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - test_byte(destval, *srcreg); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - test_byte(*destreg, *srcreg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x85 - ****************************************************************************/ -void x86emuOp_test_word_RM_R(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("TEST\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - uint32_t *srcreg; - - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - test_long(destval, *srcreg); - } else { - uint16_t destval; - uint16_t *srcreg; - - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - test_word(destval, *srcreg); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*srcreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - test_long(*destreg, *srcreg); - } else { - uint16_t *destreg,*srcreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - test_word(*destreg, *srcreg); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x86 - ****************************************************************************/ -void x86emuOp_xchg_byte_RM_R(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg, *srcreg; - unsigned int destoffset; - uint8_t destval; - uint8_t tmp; - - START_OF_INSTR(); - DECODE_PRINTF("XCHG\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_byte(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = *destreg; - *destreg = tmp; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x87 - ****************************************************************************/ -void x86emuOp_xchg_word_RM_R(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("XCHG\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg; - uint32_t destval,tmp; - - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_long(destoffset, destval); - } else { - uint16_t *srcreg; - uint16_t destval,tmp; - - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*srcreg; - uint32_t tmp; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = *destreg; - *destreg = tmp; - } else { - uint16_t *destreg,*srcreg; - uint16_t tmp; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = *destreg; - *destreg = tmp; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x88 - ****************************************************************************/ -void x86emuOp_mov_byte_RM_R(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg, *srcreg; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - store_data_byte(destoffset, *srcreg); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x89 - ****************************************************************************/ -void x86emuOp_mov_word_RM_R(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg; - - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - store_data_long(destoffset, *srcreg); - } else { - uint16_t *srcreg; - - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - store_data_word(destoffset, *srcreg); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*srcreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } else { - uint16_t *destreg,*srcreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x8a - ****************************************************************************/ -void x86emuOp_mov_byte_R_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg, *srcreg; - unsigned int srcoffset; - uint8_t srcval; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x8b - ****************************************************************************/ -void x86emuOp_mov_word_R_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - uint16_t *destreg; - uint16_t srcval; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg, *srcreg; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } else { - uint16_t *destreg, *srcreg; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x8c - ****************************************************************************/ -void x86emuOp_mov_word_RM_SR(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint16_t *destreg, *srcreg; - unsigned int destoffset; - uint16_t destval; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - srcreg = decode_rm_seg_register(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = *srcreg; - store_data_word(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = decode_rm_seg_register(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x8d - ****************************************************************************/ -void x86emuOp_lea_word_R_M(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint16_t *srcreg; - unsigned int destoffset; - - /* - * TODO: Need to handle address size prefix! - * - * lea eax,[eax+ebx*2] ?? - */ - - START_OF_INSTR(); - DECODE_PRINTF("LEA\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *srcreg = (uint16_t)destoffset; - } - /* } else { undefined. Do nothing. } */ -DECODE_CLEAR_SEGOVR(); -END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x8e - ****************************************************************************/ -void x86emuOp_mov_word_SR_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint16_t *destreg, *srcreg; - unsigned int srcoffset; - uint16_t srcval; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destreg = decode_rm_seg_register(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { /* register to register */ - destreg = decode_rm_seg_register(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - /* - * Clean up, and reset all the R_xSP pointers to the correct - * locations. This is about 3x too much overhead (doing all the - * segreg ptrs when only one is needed, but this instruction - * *cannot* be that common, and this isn't too much work anyway. - */ - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x8f - ****************************************************************************/ -void x86emuOp_pop_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("POP\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (rh != 0) { - DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\r\n"); - HALT_SYS(); - } - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = pop_long(); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = pop_word(); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = pop_long(); - } else { - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = pop_word(); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x90 - ****************************************************************************/ -void x86emuOp_nop(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("NOP\r\n"); - TRACE_AND_STEP(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x91-0x97 - ****************************************************************************/ -void x86emuOp_xchg_word_AX_register(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t tmp; - - op1 &= 0x7; - - START_OF_INSTR(); - - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *reg32; - DECODE_PRINTF("XCHG\tEAX,"); - reg32 = DECODE_RM_LONG_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = M.x86.R_EAX; - M.x86.R_EAX = *reg32; - *reg32 = tmp; - } else { - uint16_t *reg16; - DECODE_PRINTF("XCHG\tAX,"); - reg16 = DECODE_RM_WORD_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = M.x86.R_AX; - M.x86.R_AX = *reg16; - *reg16 = (uint16_t)tmp; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x98 - ****************************************************************************/ -void x86emuOp_cbw(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("CWDE\r\n"); - } else { - DECODE_PRINTF("CBW\r\n"); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - if (M.x86.R_AX & 0x8000) { - M.x86.R_EAX |= 0xffff0000; - } else { - M.x86.R_EAX &= 0x0000ffff; - } - } else { - if (M.x86.R_AL & 0x80) { - M.x86.R_AH = 0xff; - } else { - M.x86.R_AH = 0x0; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x99 - ****************************************************************************/ -void x86emuOp_cwd(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("CDQ\r\n"); - } else { - DECODE_PRINTF("CWD\r\n"); - } - DECODE_PRINTF("CWD\r\n"); - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - if (M.x86.R_EAX & 0x80000000) { - M.x86.R_EDX = 0xffffffff; - } else { - M.x86.R_EDX = 0x0; - } - } else { - if (M.x86.R_AX & 0x8000) { - M.x86.R_DX = 0xffff; - } else { - M.x86.R_DX = 0x0; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x9a - ****************************************************************************/ -void x86emuOp_call_far_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t farseg, faroff; - - START_OF_INSTR(); - DECODE_PRINTF("CALL\t"); - faroff = fetch_word_imm(); - farseg = fetch_word_imm(); - DECODE_PRINTF2("%x:", farseg); - DECODE_PRINTF2("%x\r\n", faroff); - CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, farseg, faroff, "FAR "); - - /* XXX - * - * Hooked interrupt vectors calling into our "BIOS" will cause - * problems unless all intersegment stuff is checked for BIOS - * access. Check needed here. For moment, let it alone. - */ - TRACE_AND_STEP(); - push_word(M.x86.R_CS); - M.x86.R_CS = farseg; - push_word(M.x86.R_IP); - M.x86.R_IP = faroff; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x9b - ****************************************************************************/ -void x86emuOp_wait(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("WAIT"); - TRACE_AND_STEP(); - /* NADA. */ - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x9c - ****************************************************************************/ -void x86emuOp_pushf_word(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t flags; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSHFD\r\n"); - } else { - DECODE_PRINTF("PUSHF\r\n"); - } - TRACE_AND_STEP(); - - /* clear out *all* bits not representing flags, and turn on real bits */ - flags = (M.x86.R_EFLG & F_MSK) | F_ALWAYS_ON; - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(flags); - } else { - push_word((uint16_t)flags); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x9d - ****************************************************************************/ -void x86emuOp_popf_word(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POPFD\r\n"); - } else { - DECODE_PRINTF("POPF\r\n"); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EFLG = pop_long(); - } else { - M.x86.R_FLG = pop_word(); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x9e - ****************************************************************************/ -void x86emuOp_sahf(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("SAHF\r\n"); - TRACE_AND_STEP(); - /* clear the lower bits of the flag register */ - M.x86.R_FLG &= 0xffffff00; - /* or in the AH register into the flags register */ - M.x86.R_FLG |= M.x86.R_AH; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x9f - ****************************************************************************/ -void x86emuOp_lahf(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("LAHF\r\n"); - TRACE_AND_STEP(); - M.x86.R_AH = (uint8_t)(M.x86.R_FLG & 0xff); - /*undocumented TC++ behavior??? Nope. It's documented, but - you have too look real hard to notice it. */ - M.x86.R_AH |= 0x2; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa0 - ****************************************************************************/ -void x86emuOp_mov_AL_M_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t offset; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\tAL,"); - offset = fetch_word_imm(); - DECODE_PRINTF2("[%x]\r\n", offset); - TRACE_AND_STEP(); - M.x86.R_AL = fetch_data_byte(offset); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa1 - ****************************************************************************/ -void x86emuOp_mov_AX_M_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t offset; - - START_OF_INSTR(); - offset = fetch_word_imm(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF2("MOV\tEAX,[%x]\r\n", offset); - } else { - DECODE_PRINTF2("MOV\tAX,[%x]\r\n", offset); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = fetch_data_long(offset); - } else { - M.x86.R_AX = fetch_data_word(offset); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa2 - ****************************************************************************/ -void x86emuOp_mov_M_AL_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t offset; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - offset = fetch_word_imm(); - DECODE_PRINTF2("[%x],AL\r\n", offset); - TRACE_AND_STEP(); - store_data_byte(offset, M.x86.R_AL); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa3 - ****************************************************************************/ -void x86emuOp_mov_M_AX_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t offset; - - START_OF_INSTR(); - offset = fetch_word_imm(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF2("MOV\t[%x],EAX\r\n", offset); - } else { - DECODE_PRINTF2("MOV\t[%x],AX\r\n", offset); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - store_data_long(offset, M.x86.R_EAX); - } else { - store_data_word(offset, M.x86.R_AX); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa4 - ****************************************************************************/ -void x86emuOp_movs_byte(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t val; - uint32_t count; - int inc; - - START_OF_INSTR(); - DECODE_PRINTF("MOVS\tBYTE\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; - else - inc = 1; - TRACE_AND_STEP(); - count = 1; - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - count = M.x86.R_CX; - M.x86.R_CX = 0; - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } - while (count--) { - val = fetch_data_byte(M.x86.R_SI); - store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, val); - M.x86.R_SI += inc; - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa5 - ****************************************************************************/ -void x86emuOp_movs_word(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t val; - int inc; - uint32_t count; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("MOVS\tDWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; - } else { - DECODE_PRINTF("MOVS\tWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; - } - TRACE_AND_STEP(); - count = 1; - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - count = M.x86.R_CX; - M.x86.R_CX = 0; - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } - while (count--) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val = fetch_data_long(M.x86.R_SI); - store_data_long_abs(M.x86.R_ES, M.x86.R_DI, val); - } else { - val = fetch_data_word(M.x86.R_SI); - store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (uint16_t)val); - } - M.x86.R_SI += inc; - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa6 - ****************************************************************************/ -void x86emuOp_cmps_byte(uint8_t X86EMU_UNUSED(op1)) -{ - int8_t val1, val2; - int inc; - - START_OF_INSTR(); - DECODE_PRINTF("CMPS\tBYTE\r\n"); - TRACE_AND_STEP(); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; - else - inc = 1; - - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* REPE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - val1 = fetch_data_byte(M.x86.R_SI); - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(val1, val2); - M.x86.R_CX -= 1; - M.x86.R_SI += inc; - M.x86.R_DI += inc; - if ( (M.x86.mode & SYSMODE_PREFIX_REPE) && (ACCESS_FLAG(F_ZF) == 0) ) break; - if ( (M.x86.mode & SYSMODE_PREFIX_REPNE) && ACCESS_FLAG(F_ZF) ) break; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } else { - val1 = fetch_data_byte(M.x86.R_SI); - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(val1, val2); - M.x86.R_SI += inc; - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa7 - ****************************************************************************/ -void x86emuOp_cmps_word(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t val1,val2; - int inc; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("CMPS\tDWORD\r\n"); - inc = 4; - } else { - DECODE_PRINTF("CMPS\tWORD\r\n"); - inc = 2; - } - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -inc; - - TRACE_AND_STEP(); - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* REPE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val1 = fetch_data_long(M.x86.R_SI); - val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(val1, val2); - } else { - val1 = fetch_data_word(M.x86.R_SI); - val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word((uint16_t)val1, (uint16_t)val2); - } - M.x86.R_CX -= 1; - M.x86.R_SI += inc; - M.x86.R_DI += inc; - if ( (M.x86.mode & SYSMODE_PREFIX_REPE) && ACCESS_FLAG(F_ZF) == 0 ) break; - if ( (M.x86.mode & SYSMODE_PREFIX_REPNE) && ACCESS_FLAG(F_ZF) ) break; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } else { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val1 = fetch_data_long(M.x86.R_SI); - val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(val1, val2); - } else { - val1 = fetch_data_word(M.x86.R_SI); - val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word((uint16_t)val1, (uint16_t)val2); - } - M.x86.R_SI += inc; - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa8 - ****************************************************************************/ -void x86emuOp_test_AL_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int imm; - - START_OF_INSTR(); - DECODE_PRINTF("TEST\tAL,"); - imm = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - test_byte(M.x86.R_AL, (uint8_t)imm); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa9 - ****************************************************************************/ -void x86emuOp_test_AX_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t srcval; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("TEST\tEAX,"); - srcval = fetch_long_imm(); - } else { - DECODE_PRINTF("TEST\tAX,"); - srcval = fetch_word_imm(); - } - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - test_long(M.x86.R_EAX, srcval); - } else { - test_word(M.x86.R_AX, (uint16_t)srcval); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xaa - ****************************************************************************/ -void x86emuOp_stos_byte(uint8_t X86EMU_UNUSED(op1)) -{ - int inc; - - START_OF_INSTR(); - DECODE_PRINTF("STOS\tBYTE\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; - else - inc = 1; - TRACE_AND_STEP(); - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL); - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } else { - store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL); - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xab - ****************************************************************************/ -void x86emuOp_stos_word(uint8_t X86EMU_UNUSED(op1)) -{ - int inc; - uint32_t count; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("STOS\tDWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; - } else { - DECODE_PRINTF("STOS\tWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; - } - TRACE_AND_STEP(); - count = 1; - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - count = M.x86.R_CX; - M.x86.R_CX = 0; - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } - while (count--) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - store_data_long_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_EAX); - } else { - store_data_word_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AX); - } - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xac - ****************************************************************************/ -void x86emuOp_lods_byte(uint8_t X86EMU_UNUSED(op1)) -{ - int inc; - - START_OF_INSTR(); - DECODE_PRINTF("LODS\tBYTE\r\n"); - TRACE_AND_STEP(); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; - else - inc = 1; - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - M.x86.R_AL = fetch_data_byte(M.x86.R_SI); - M.x86.R_CX -= 1; - M.x86.R_SI += inc; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } else { - M.x86.R_AL = fetch_data_byte(M.x86.R_SI); - M.x86.R_SI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xad - ****************************************************************************/ -void x86emuOp_lods_word(uint8_t X86EMU_UNUSED(op1)) -{ - int inc; - uint32_t count; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("LODS\tDWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; - } else { - DECODE_PRINTF("LODS\tWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; - } - TRACE_AND_STEP(); - count = 1; - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - count = M.x86.R_CX; - M.x86.R_CX = 0; - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } - while (count--) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = fetch_data_long(M.x86.R_SI); - } else { - M.x86.R_AX = fetch_data_word(M.x86.R_SI); - } - M.x86.R_SI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xae - ****************************************************************************/ -void x86emuOp_scas_byte(uint8_t X86EMU_UNUSED(op1)) -{ - int8_t val2; - int inc; - - START_OF_INSTR(); - DECODE_PRINTF("SCAS\tBYTE\r\n"); - TRACE_AND_STEP(); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; - else - inc = 1; - if (M.x86.mode & SYSMODE_PREFIX_REPE) { - /* REPE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(M.x86.R_AL, val2); - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF) == 0) - break; - } - M.x86.mode &= ~SYSMODE_PREFIX_REPE; - } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) { - /* REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(M.x86.R_AL, val2); - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF)) - break; /* zero flag set means equal */ - } - M.x86.mode &= ~SYSMODE_PREFIX_REPNE; - } else { - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(M.x86.R_AL, val2); - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xaf - ****************************************************************************/ -void x86emuOp_scas_word(uint8_t X86EMU_UNUSED(op1)) -{ - int inc; - uint32_t val; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("SCAS\tDWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; - } else { - DECODE_PRINTF("SCAS\tWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_REPE) { - /* REPE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(M.x86.R_EAX, val); - } else { - val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word(M.x86.R_AX, (uint16_t)val); - } - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF) == 0) - break; - } - M.x86.mode &= ~SYSMODE_PREFIX_REPE; - } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) { - /* REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(M.x86.R_EAX, val); - } else { - val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word(M.x86.R_AX, (uint16_t)val); - } - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF)) - break; /* zero flag set means equal */ - } - M.x86.mode &= ~SYSMODE_PREFIX_REPNE; - } else { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(M.x86.R_EAX, val); - } else { - val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word(M.x86.R_AX, (uint16_t)val); - } - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xb0 - 0xb7 - ****************************************************************************/ -void x86emuOp_mov_byte_register_IMM(uint8_t op1) -{ - uint8_t imm, *ptr; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - ptr = DECODE_RM_BYTE_REGISTER(op1 & 0x7); - DECODE_PRINTF(","); - imm = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - *ptr = imm; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xb8 - 0xbf - ****************************************************************************/ -void x86emuOp_mov_word_register_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t srcval; - - op1 &= 0x7; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *reg32; - reg32 = DECODE_RM_LONG_REGISTER(op1); - srcval = fetch_long_imm(); - DECODE_PRINTF2(",%x\r\n", srcval); - TRACE_AND_STEP(); - *reg32 = srcval; - } else { - uint16_t *reg16; - reg16 = DECODE_RM_WORD_REGISTER(op1); - srcval = fetch_word_imm(); - DECODE_PRINTF2(",%x\r\n", srcval); - TRACE_AND_STEP(); - *reg16 = (uint16_t)srcval; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc0 - ****************************************************************************/ -void x86emuOp_opcC0_byte_RM_MEM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t destval; - uint8_t amt; - - /* - * Yet another weirdo special case instruction format. Part of - * the opcode held below in "RH". Doubly nested case would - * result, except that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", amt); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, amt); - store_data_byte(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", amt); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (*destreg, amt); - *destreg = destval; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc1 - ****************************************************************************/ -void x86emuOp_opcC1_word_RM_MEM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t amt; - - /* - * Yet another weirdo special case instruction format. Part of - * the opcode held below in "RH". Doubly nested case would - * result, except that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", amt); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, amt); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", amt); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, amt); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", amt); - TRACE_AND_STEP(); - *destreg = (*opcD1_long_operation[rh]) (*destreg, amt); - } else { - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", amt); - TRACE_AND_STEP(); - *destreg = (*opcD1_word_operation[rh]) (*destreg, amt); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc2 - ****************************************************************************/ -void x86emuOp_ret_near_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t imm; - - START_OF_INSTR(); - DECODE_PRINTF("RET\t"); - imm = fetch_word_imm(); - DECODE_PRINTF2("%x\r\n", imm); - RETURN_TRACE("RET", M.x86.saved_cs,M.x86.saved_ip); - TRACE_AND_STEP(); - M.x86.R_IP = pop_word(); - M.x86.R_SP += imm; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc3 - ****************************************************************************/ -void x86emuOp_ret_near(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("RET\r\n"); - RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip); - TRACE_AND_STEP(); - M.x86.R_IP = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc4 - ****************************************************************************/ -void x86emuOp_les_R_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rh, rl; - uint16_t *dstreg; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("LES\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_ES = fetch_data_word(srcoffset + 2); - } - /* else UNDEFINED! register to register */ - - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc5 - ****************************************************************************/ -void x86emuOp_lds_R_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rh, rl; - uint16_t *dstreg; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("LDS\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_DS = fetch_data_word(srcoffset + 2); - } - /* else UNDEFINED! */ - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc6 - ****************************************************************************/ -void x86emuOp_mov_byte_RM_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t imm; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (rh != 0) { - DECODE_PRINTF("ILLEGAL DECODE OF OPCODE c6\r\n"); - HALT_SYS(); - } - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - store_data_byte(destoffset, imm); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = imm; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc7 - ****************************************************************************/ -void x86emuOp_mov_word_RM_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (rh != 0) { - DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\r\n"); - HALT_SYS(); - } - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t imm; - - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - store_data_long(destoffset, imm); - } else { - uint16_t imm; - - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - store_data_word(destoffset, imm); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t imm; - - destreg = DECODE_RM_LONG_REGISTER(rl); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = imm; - } else { - uint16_t *destreg; - uint16_t imm; - - destreg = DECODE_RM_WORD_REGISTER(rl); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = imm; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc8 - ****************************************************************************/ -void x86emuOp_enter(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t local,frame_pointer; - uint8_t nesting; - int i; - - START_OF_INSTR(); - local = fetch_word_imm(); - nesting = fetch_byte_imm(); - DECODE_PRINTF2("ENTER %x\r\n", local); - DECODE_PRINTF2(",%x\r\n", nesting); - TRACE_AND_STEP(); - push_word(M.x86.R_BP); - frame_pointer = M.x86.R_SP; - if (nesting > 0) { - for (i = 1; i < nesting; i++) { - M.x86.R_BP -= 2; - push_word(fetch_data_word_abs(M.x86.R_SS, M.x86.R_BP)); - } - push_word(frame_pointer); - } - M.x86.R_BP = frame_pointer; - M.x86.R_SP = (uint16_t)(M.x86.R_SP - local); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc9 - ****************************************************************************/ -void x86emuOp_leave(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("LEAVE\r\n"); - TRACE_AND_STEP(); - M.x86.R_SP = M.x86.R_BP; - M.x86.R_BP = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xca - ****************************************************************************/ -void x86emuOp_ret_far_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t imm; - - START_OF_INSTR(); - DECODE_PRINTF("RETF\t"); - imm = fetch_word_imm(); - DECODE_PRINTF2("%x\r\n", imm); - RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip); - TRACE_AND_STEP(); - M.x86.R_IP = pop_word(); - M.x86.R_CS = pop_word(); - M.x86.R_SP += imm; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xcb - ****************************************************************************/ -void x86emuOp_ret_far(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("RETF\r\n"); - RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip); - TRACE_AND_STEP(); - M.x86.R_IP = pop_word(); - M.x86.R_CS = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xcc - ****************************************************************************/ -void x86emuOp_int3(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t tmp; - - START_OF_INSTR(); - DECODE_PRINTF("INT 3\r\n"); - tmp = (uint16_t) mem_access_word(3 * 4 + 2); - /* access the segment register */ - TRACE_AND_STEP(); - if (_X86EMU_intrTab[3]) { - (*_X86EMU_intrTab[3])(3); - } else { - push_word((uint16_t)M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(3 * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(3 * 4); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xcd - ****************************************************************************/ -void x86emuOp_int_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t tmp; - uint8_t intnum; - - START_OF_INSTR(); - DECODE_PRINTF("INT\t"); - intnum = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", intnum); - tmp = mem_access_word(intnum * 4 + 2); - TRACE_AND_STEP(); - if (_X86EMU_intrTab[intnum]) { - (*_X86EMU_intrTab[intnum])(intnum); - } else { - push_word((uint16_t)M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(intnum * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(intnum * 4); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xce - ****************************************************************************/ -void x86emuOp_into(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t tmp; - - START_OF_INSTR(); - DECODE_PRINTF("INTO\r\n"); - TRACE_AND_STEP(); - if (ACCESS_FLAG(F_OF)) { - tmp = mem_access_word(4 * 4 + 2); - if (_X86EMU_intrTab[4]) { - (*_X86EMU_intrTab[4])(4); - } else { - push_word((uint16_t)M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(4 * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(4 * 4); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xcf - ****************************************************************************/ -void x86emuOp_iret(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("IRET\r\n"); - - TRACE_AND_STEP(); - - M.x86.R_IP = pop_word(); - M.x86.R_CS = pop_word(); - M.x86.R_FLG = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xd0 - ****************************************************************************/ -void x86emuOp_opcD0_byte_RM_1(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t destval; - - /* - * Yet another weirdo special case instruction format. Part of - * the opcode held below in "RH". Doubly nested case would - * result, except that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(",1\r\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, 1); - store_data_byte(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(",1\r\n"); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (*destreg, 1); - *destreg = destval; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xd1 - ****************************************************************************/ -void x86emuOp_opcD1_word_RM_1(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - /* - * Yet another weirdo special case instruction format. Part of - * the opcode held below in "RH". Doubly nested case would - * result, except that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(",1\r\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, 1); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(",1\r\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, 1); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(",1\r\n"); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (*destreg, 1); - *destreg = destval; - } else { - uint16_t destval; - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(",1\r\n"); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (*destreg, 1); - *destreg = destval; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xd2 - ****************************************************************************/ -void x86emuOp_opcD2_byte_RM_CL(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t destval; - uint8_t amt; - - /* - * Yet another weirdo special case instruction format. Part of - * the opcode held below in "RH". Doubly nested case would - * result, except that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - amt = M.x86.R_CL; - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(",CL\r\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, amt); - store_data_byte(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (*destreg, amt); - *destreg = destval; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xd3 - ****************************************************************************/ -void x86emuOp_opcD3_word_RM_CL(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t amt; - - /* - * Yet another weirdo special case instruction format. Part of - * the opcode held below in "RH". Doubly nested case would - * result, except that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - amt = M.x86.R_CL; - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(",CL\r\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, amt); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(",CL\r\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, amt); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - *destreg = (*opcD1_long_operation[rh]) (*destreg, amt); - } else { - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - *destreg = (*opcD1_word_operation[rh]) (*destreg, amt); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xd4 - ****************************************************************************/ -void x86emuOp_aam(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t a; - - START_OF_INSTR(); - DECODE_PRINTF("AAM\r\n"); - a = fetch_byte_imm(); /* this is a stupid encoding. */ - if (a != 10) { - DECODE_PRINTF("ERROR DECODING AAM\r\n"); - TRACE_REGS(); - HALT_SYS(); - } - TRACE_AND_STEP(); - /* note the type change here --- returning AL and AH in AX. */ - M.x86.R_AX = aam_word(M.x86.R_AL); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xd5 - ****************************************************************************/ -void x86emuOp_aad(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t a; - - START_OF_INSTR(); - DECODE_PRINTF("AAD\r\n"); - a = fetch_byte_imm(); - TRACE_AND_STEP(); - M.x86.R_AX = aad_word(M.x86.R_AX); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/* opcode 0xd6 ILLEGAL OPCODE */ - -/**************************************************************************** -REMARKS: -Handles opcode 0xd7 - ****************************************************************************/ -void x86emuOp_xlat(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t addr; - - START_OF_INSTR(); - DECODE_PRINTF("XLAT\r\n"); - TRACE_AND_STEP(); - addr = (uint16_t)(M.x86.R_BX + (uint8_t)M.x86.R_AL); - M.x86.R_AL = fetch_data_byte(addr); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/* instuctions D8 .. DF are in i87_ops.c */ - -/**************************************************************************** -REMARKS: -Handles opcode 0xe0 - ****************************************************************************/ -void x86emuOp_loopne(uint8_t X86EMU_UNUSED(op1)) -{ - int16_t ip; - - START_OF_INSTR(); - DECODE_PRINTF("LOOPNE\t"); - ip = (int8_t) fetch_byte_imm(); - ip += (int16_t) M.x86.R_IP; - DECODE_PRINTF2("%x\r\n", ip); - TRACE_AND_STEP(); - M.x86.R_CX -= 1; - if (M.x86.R_CX != 0 && !ACCESS_FLAG(F_ZF)) /* CX != 0 and !ZF */ - M.x86.R_IP = ip; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe1 - ****************************************************************************/ -void x86emuOp_loope(uint8_t X86EMU_UNUSED(op1)) -{ - int16_t ip; - - START_OF_INSTR(); - DECODE_PRINTF("LOOPE\t"); - ip = (int8_t) fetch_byte_imm(); - ip += (int16_t) M.x86.R_IP; - DECODE_PRINTF2("%x\r\n", ip); - TRACE_AND_STEP(); - M.x86.R_CX -= 1; - if (M.x86.R_CX != 0 && ACCESS_FLAG(F_ZF)) /* CX != 0 and ZF */ - M.x86.R_IP = ip; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe2 - ****************************************************************************/ -void x86emuOp_loop(uint8_t X86EMU_UNUSED(op1)) -{ - int16_t ip; - - START_OF_INSTR(); - DECODE_PRINTF("LOOP\t"); - ip = (int8_t) fetch_byte_imm(); - ip += (int16_t) M.x86.R_IP; - DECODE_PRINTF2("%x\r\n", ip); - TRACE_AND_STEP(); - M.x86.R_CX -= 1; - if (M.x86.R_CX != 0) - M.x86.R_IP = ip; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe3 - ****************************************************************************/ -void x86emuOp_jcxz(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t target; - int8_t offset; - - /* jump to byte offset if overflow flag is set */ - START_OF_INSTR(); - DECODE_PRINTF("JCXZ\t"); - offset = (int8_t)fetch_byte_imm(); - target = (uint16_t)(M.x86.R_IP + offset); - DECODE_PRINTF2("%x\r\n", target); - TRACE_AND_STEP(); - if (M.x86.R_CX == 0) - M.x86.R_IP = target; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe4 - ****************************************************************************/ -void x86emuOp_in_byte_AL_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t port; - - START_OF_INSTR(); - DECODE_PRINTF("IN\t"); - port = (uint8_t) fetch_byte_imm(); - DECODE_PRINTF2("%x,AL\r\n", port); - TRACE_AND_STEP(); - M.x86.R_AL = (*sys_inb)(port); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe5 - ****************************************************************************/ -void x86emuOp_in_word_AX_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t port; - - START_OF_INSTR(); - DECODE_PRINTF("IN\t"); - port = (uint8_t) fetch_byte_imm(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF2("EAX,%x\r\n", port); - } else { - DECODE_PRINTF2("AX,%x\r\n", port); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = (*sys_inl)(port); - } else { - M.x86.R_AX = (*sys_inw)(port); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe6 - ****************************************************************************/ -void x86emuOp_out_byte_IMM_AL(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t port; - - START_OF_INSTR(); - DECODE_PRINTF("OUT\t"); - port = (uint8_t) fetch_byte_imm(); - DECODE_PRINTF2("%x,AL\r\n", port); - TRACE_AND_STEP(); - (*sys_outb)(port, M.x86.R_AL); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe7 - ****************************************************************************/ -void x86emuOp_out_word_IMM_AX(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t port; - - START_OF_INSTR(); - DECODE_PRINTF("OUT\t"); - port = (uint8_t) fetch_byte_imm(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF2("%x,EAX\r\n", port); - } else { - DECODE_PRINTF2("%x,AX\r\n", port); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - (*sys_outl)(port, M.x86.R_EAX); - } else { - (*sys_outw)(port, M.x86.R_AX); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe8 - ****************************************************************************/ -void x86emuOp_call_near_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int16_t ip; - - START_OF_INSTR(); - DECODE_PRINTF("CALL\t"); - ip = (int16_t) fetch_word_imm(); - ip += (int16_t) M.x86.R_IP; /* CHECK SIGN */ - DECODE_PRINTF2("%x\r\n", ip); - CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, ip, ""); - TRACE_AND_STEP(); - push_word(M.x86.R_IP); - M.x86.R_IP = ip; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe9 - ****************************************************************************/ -void x86emuOp_jump_near_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int ip; - - START_OF_INSTR(); - DECODE_PRINTF("JMP\t"); - ip = (int16_t)fetch_word_imm(); - ip += (int16_t)M.x86.R_IP; - DECODE_PRINTF2("%x\r\n", ip); - TRACE_AND_STEP(); - M.x86.R_IP = (uint16_t)ip; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xea - ****************************************************************************/ -void x86emuOp_jump_far_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t cs, ip; - - START_OF_INSTR(); - DECODE_PRINTF("JMP\tFAR "); - ip = fetch_word_imm(); - cs = fetch_word_imm(); - DECODE_PRINTF2("%x:", cs); - DECODE_PRINTF2("%x\r\n", ip); - TRACE_AND_STEP(); - M.x86.R_IP = ip; - M.x86.R_CS = cs; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xeb - ****************************************************************************/ -void x86emuOp_jump_byte_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t target; - int8_t offset; - - START_OF_INSTR(); - DECODE_PRINTF("JMP\t"); - offset = (int8_t)fetch_byte_imm(); - target = (uint16_t)(M.x86.R_IP + offset); - DECODE_PRINTF2("%x\r\n", target); - TRACE_AND_STEP(); - M.x86.R_IP = target; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xec - ****************************************************************************/ -void x86emuOp_in_byte_AL_DX(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("IN\tAL,DX\r\n"); - TRACE_AND_STEP(); - M.x86.R_AL = (*sys_inb)(M.x86.R_DX); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xed - ****************************************************************************/ -void x86emuOp_in_word_AX_DX(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("IN\tEAX,DX\r\n"); - } else { - DECODE_PRINTF("IN\tAX,DX\r\n"); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = (*sys_inl)(M.x86.R_DX); - } else { - M.x86.R_AX = (*sys_inw)(M.x86.R_DX); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xee - ****************************************************************************/ -void x86emuOp_out_byte_DX_AL(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("OUT\tDX,AL\r\n"); - TRACE_AND_STEP(); - (*sys_outb)(M.x86.R_DX, M.x86.R_AL); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xef - ****************************************************************************/ -void x86emuOp_out_word_DX_AX(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("OUT\tDX,EAX\r\n"); - } else { - DECODE_PRINTF("OUT\tDX,AX\r\n"); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) - (*sys_outl)(M.x86.R_DX, M.x86.R_EAX); - else - (*sys_outw)(M.x86.R_DX, M.x86.R_AX); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf0 - ****************************************************************************/ -void x86emuOp_lock(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("LOCK:\r\n"); - TRACE_AND_STEP(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/*opcode 0xf1 ILLEGAL OPERATION */ - -/**************************************************************************** -REMARKS: -Handles opcode 0xf2 - ****************************************************************************/ -void x86emuOp_repne(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("REPNE\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_PREFIX_REPNE; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf3 - ****************************************************************************/ -void x86emuOp_repe(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("REPE\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_PREFIX_REPE; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf4 - ****************************************************************************/ -void x86emuOp_halt(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("HALT\r\n"); - TRACE_AND_STEP(); - HALT_SYS(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf5 - ****************************************************************************/ -void x86emuOp_cmc(uint8_t X86EMU_UNUSED(op1)) -{ - /* complement the carry flag. */ - START_OF_INSTR(); - DECODE_PRINTF("CMC\r\n"); - TRACE_AND_STEP(); - TOGGLE_FLAG(F_CF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf6 - ****************************************************************************/ -void x86emuOp_opcF6_byte_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t destval, srcval; - - /* long, drawn out code follows. Double switch for a total - of 32 cases. */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTF(opF6_names[rh]); - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - destval = fetch_data_byte(destoffset); - - switch (rh) { - case 0: /* test byte imm */ - DECODE_PRINTF(","); - srcval = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - test_byte(destval, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\r\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = not_byte(destval); - store_data_byte(destoffset, destval); - break; - case 3: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = neg_byte(destval); - store_data_byte(destoffset, destval); - break; - case 4: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - mul_byte(destval); - break; - case 5: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - imul_byte(destval); - break; - case 6: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - div_byte(destval); - break; - default: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - idiv_byte(destval); - break; - } - } else { /* mod=11 */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - switch (rh) { - case 0: /* test byte imm */ - DECODE_PRINTF(","); - srcval = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - test_byte(*destreg, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\r\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = not_byte(*destreg); - break; - case 3: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = neg_byte(*destreg); - break; - case 4: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - mul_byte(*destreg); /*!!! */ - break; - case 5: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - imul_byte(*destreg); - break; - case 6: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - div_byte(*destreg); - break; - default: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - idiv_byte(*destreg); - break; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf7 - ****************************************************************************/ -void x86emuOp_opcF7_word_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTF(opF6_names[rh]); - if (mod < 3) { - - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval, srcval; - - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - destval = fetch_data_long(destoffset); - - switch (rh) { - case 0: - DECODE_PRINTF(","); - srcval = fetch_long_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - test_long(destval, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\r\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = not_long(destval); - store_data_long(destoffset, destval); - break; - case 3: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = neg_long(destval); - store_data_long(destoffset, destval); - break; - case 4: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - mul_long(destval); - break; - case 5: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - imul_long(destval); - break; - case 6: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - div_long(destval); - break; - case 7: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - idiv_long(destval); - break; - } - } else { - uint16_t destval, srcval; - - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - destval = fetch_data_word(destoffset); - - switch (rh) { - case 0: /* test word imm */ - DECODE_PRINTF(","); - srcval = fetch_word_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - test_word(destval, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\r\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = not_word(destval); - store_data_word(destoffset, destval); - break; - case 3: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = neg_word(destval); - store_data_word(destoffset, destval); - break; - case 4: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - mul_word(destval); - break; - case 5: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - imul_word(destval); - break; - case 6: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - div_word(destval); - break; - case 7: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - idiv_word(destval); - break; - } - } - - } else { /* mod=11 */ - - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - - destreg = DECODE_RM_LONG_REGISTER(rl); - - switch (rh) { - case 0: /* test word imm */ - DECODE_PRINTF(","); - srcval = fetch_long_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - test_long(*destreg, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\r\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = not_long(*destreg); - break; - case 3: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = neg_long(*destreg); - break; - case 4: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - mul_long(*destreg); /*!!! */ - break; - case 5: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - imul_long(*destreg); - break; - case 6: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - div_long(*destreg); - break; - case 7: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - idiv_long(*destreg); - break; - } - } else { - uint16_t *destreg; - uint16_t srcval; - - destreg = DECODE_RM_WORD_REGISTER(rl); - - switch (rh) { - case 0: /* test word imm */ - DECODE_PRINTF(","); - srcval = fetch_word_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - test_word(*destreg, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\r\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = not_word(*destreg); - break; - case 3: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = neg_word(*destreg); - break; - case 4: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - mul_word(*destreg); /*!!! */ - break; - case 5: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - imul_word(*destreg); - break; - case 6: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - div_word(*destreg); - break; - case 7: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - idiv_word(*destreg); - break; - } - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf8 - ****************************************************************************/ -void x86emuOp_clc(uint8_t X86EMU_UNUSED(op1)) -{ - /* clear the carry flag. */ - START_OF_INSTR(); - DECODE_PRINTF("CLC\r\n"); - TRACE_AND_STEP(); - CLEAR_FLAG(F_CF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf9 - ****************************************************************************/ -void x86emuOp_stc(uint8_t X86EMU_UNUSED(op1)) -{ - /* set the carry flag. */ - START_OF_INSTR(); - DECODE_PRINTF("STC\r\n"); - TRACE_AND_STEP(); - SET_FLAG(F_CF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xfa - ****************************************************************************/ -void x86emuOp_cli(uint8_t X86EMU_UNUSED(op1)) -{ - /* clear interrupts. */ - START_OF_INSTR(); - DECODE_PRINTF("CLI\r\n"); - TRACE_AND_STEP(); - CLEAR_FLAG(F_IF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xfb - ****************************************************************************/ -void x86emuOp_sti(uint8_t X86EMU_UNUSED(op1)) -{ - /* enable interrupts. */ - START_OF_INSTR(); - DECODE_PRINTF("STI\r\n"); - TRACE_AND_STEP(); - SET_FLAG(F_IF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xfc - ****************************************************************************/ -void x86emuOp_cld(uint8_t X86EMU_UNUSED(op1)) -{ - /* clear interrupts. */ - START_OF_INSTR(); - DECODE_PRINTF("CLD\r\n"); - TRACE_AND_STEP(); - CLEAR_FLAG(F_DF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xfd - ****************************************************************************/ -void x86emuOp_std(uint8_t X86EMU_UNUSED(op1)) -{ - /* clear interrupts. */ - START_OF_INSTR(); - DECODE_PRINTF("STD\r\n"); - TRACE_AND_STEP(); - SET_FLAG(F_DF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xfe - ****************************************************************************/ -void x86emuOp_opcFE_byte_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rh, rl; - uint8_t destval; - unsigned int destoffset; - uint8_t *destreg; - - /* Yet another special case instruction. */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - - switch (rh) { - case 0: - DECODE_PRINTF("INC\t"); - break; - case 1: - DECODE_PRINTF("DEC\t"); - break; - case 2: - case 3: - case 4: - case 5: - case 6: - case 7: - DECODE_PRINTF2("ILLEGAL OP MAJOR OP 0xFE MINOR OP %x \r\n", mod); - HALT_SYS(); - break; - } - } -#endif - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - if (rh == 0) - destval = inc_byte(destval); - else - destval = dec_byte(destval); - store_data_byte(destoffset, destval); - } else { - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - if (rh == 0) - *destreg = inc_byte(*destreg); - else - *destreg = dec_byte(*destreg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xff - ****************************************************************************/ -void x86emuOp_opcFF_word_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rh, rl; - unsigned int destoffset = 0; - uint16_t *destreg; - uint16_t destval,destval2; - - /* Yet another special case instruction. */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - - switch (rh) { - case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INC\tDWORD PTR "); - } else { - DECODE_PRINTF("INC\tWORD PTR "); - } - break; - case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("DEC\tDWORD PTR "); - } else { - DECODE_PRINTF("DEC\tWORD PTR "); - } - break; - case 2: - DECODE_PRINTF("CALL\t "); - break; - case 3: - DECODE_PRINTF("CALL\tFAR "); - break; - case 4: - DECODE_PRINTF("JMP\t"); - break; - case 5: - DECODE_PRINTF("JMP\tFAR "); - break; - case 6: - DECODE_PRINTF("PUSH\t"); - break; - case 7: - DECODE_PRINTF("ILLEGAL DECODING OF OPCODE FF\t"); - HALT_SYS(); - break; - } - } -#endif - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - switch (rh) { - case 0: /* inc word ptr ... */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = inc_long(destval); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = inc_word(destval); - store_data_word(destoffset, destval); - } - break; - case 1: /* dec word ptr ... */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = dec_long(destval); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = dec_word(destval); - store_data_word(destoffset, destval); - } - break; - case 2: /* call word ptr ... */ - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - push_word(M.x86.R_IP); - M.x86.R_IP = destval; - break; - case 3: /* call far ptr ... */ - destval = fetch_data_word(destoffset); - destval2 = fetch_data_word(destoffset + 2); - TRACE_AND_STEP(); - push_word(M.x86.R_CS); - M.x86.R_CS = destval2; - push_word(M.x86.R_IP); - M.x86.R_IP = destval; - break; - case 4: /* jmp word ptr ... */ - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - M.x86.R_IP = destval; - break; - case 5: /* jmp far ptr ... */ - destval = fetch_data_word(destoffset); - destval2 = fetch_data_word(destoffset + 2); - TRACE_AND_STEP(); - M.x86.R_IP = destval; - M.x86.R_CS = destval2; - break; - case 6: /* push word ptr ... */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - push_long(destval); - } else { - uint16_t destval; - - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - push_word(destval); - } - break; - } - } else { - switch (rh) { - case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = inc_long(*destreg); - } else { - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = inc_word(*destreg); - } - break; - case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = dec_long(*destreg); - } else { - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = dec_word(*destreg); - } - break; - case 2: /* call word ptr ... */ - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_IP); - M.x86.R_IP = *destreg; - break; - case 3: /* jmp far ptr ... */ - DECODE_PRINTF("OPERATION UNDEFINED 0XFF \r\n"); - TRACE_AND_STEP(); - HALT_SYS(); - break; - - case 4: /* jmp ... */ - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - M.x86.R_IP = (uint16_t) (*destreg); - break; - case 5: /* jmp far ptr ... */ - DECODE_PRINTF("OPERATION UNDEFINED 0XFF \r\n"); - TRACE_AND_STEP(); - HALT_SYS(); - break; - case 6: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - push_long(*destreg); - } else { - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - push_word(*destreg); - } - break; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/*************************************************************************** - * Single byte operation code table: - **************************************************************************/ -void (*x86emu_optab[256])(uint8_t) = -{ - /* 0x00 */ x86emuOp_genop_byte_RM_R, - /* 0x01 */ x86emuOp_genop_word_RM_R, - /* 0x02 */ x86emuOp_genop_byte_R_RM, - /* 0x03 */ x86emuOp_genop_word_R_RM, - /* 0x04 */ x86emuOp_genop_byte_AL_IMM, - /* 0x05 */ x86emuOp_genop_word_AX_IMM, - /* 0x06 */ x86emuOp_push_ES, - /* 0x07 */ x86emuOp_pop_ES, - - /* 0x08 */ x86emuOp_genop_byte_RM_R, - /* 0x09 */ x86emuOp_genop_word_RM_R, - /* 0x0a */ x86emuOp_genop_byte_R_RM, - /* 0x0b */ x86emuOp_genop_word_R_RM, - /* 0x0c */ x86emuOp_genop_byte_AL_IMM, - /* 0x0d */ x86emuOp_genop_word_AX_IMM, - /* 0x0e */ x86emuOp_push_CS, - /* 0x0f */ x86emuOp_two_byte, - - /* 0x10 */ x86emuOp_genop_byte_RM_R, - /* 0x11 */ x86emuOp_genop_word_RM_R, - /* 0x12 */ x86emuOp_genop_byte_R_RM, - /* 0x13 */ x86emuOp_genop_word_R_RM, - /* 0x14 */ x86emuOp_genop_byte_AL_IMM, - /* 0x15 */ x86emuOp_genop_word_AX_IMM, - /* 0x16 */ x86emuOp_push_SS, - /* 0x17 */ x86emuOp_pop_SS, - - /* 0x18 */ x86emuOp_genop_byte_RM_R, - /* 0x19 */ x86emuOp_genop_word_RM_R, - /* 0x1a */ x86emuOp_genop_byte_R_RM, - /* 0x1b */ x86emuOp_genop_word_R_RM, - /* 0x1c */ x86emuOp_genop_byte_AL_IMM, - /* 0x1d */ x86emuOp_genop_word_AX_IMM, - /* 0x1e */ x86emuOp_push_DS, - /* 0x1f */ x86emuOp_pop_DS, - - /* 0x20 */ x86emuOp_genop_byte_RM_R, - /* 0x21 */ x86emuOp_genop_word_RM_R, - /* 0x22 */ x86emuOp_genop_byte_R_RM, - /* 0x23 */ x86emuOp_genop_word_R_RM, - /* 0x24 */ x86emuOp_genop_byte_AL_IMM, - /* 0x25 */ x86emuOp_genop_word_AX_IMM, - /* 0x26 */ x86emuOp_segovr_ES, - /* 0x27 */ x86emuOp_daa, - - /* 0x28 */ x86emuOp_genop_byte_RM_R, - /* 0x29 */ x86emuOp_genop_word_RM_R, - /* 0x2a */ x86emuOp_genop_byte_R_RM, - /* 0x2b */ x86emuOp_genop_word_R_RM, - /* 0x2c */ x86emuOp_genop_byte_AL_IMM, - /* 0x2d */ x86emuOp_genop_word_AX_IMM, - /* 0x2e */ x86emuOp_segovr_CS, - /* 0x2f */ x86emuOp_das, - - /* 0x30 */ x86emuOp_genop_byte_RM_R, - /* 0x31 */ x86emuOp_genop_word_RM_R, - /* 0x32 */ x86emuOp_genop_byte_R_RM, - /* 0x33 */ x86emuOp_genop_word_R_RM, - /* 0x34 */ x86emuOp_genop_byte_AL_IMM, - /* 0x35 */ x86emuOp_genop_word_AX_IMM, - /* 0x36 */ x86emuOp_segovr_SS, - /* 0x37 */ x86emuOp_aaa, - - /* 0x38 */ x86emuOp_genop_byte_RM_R, - /* 0x39 */ x86emuOp_genop_word_RM_R, - /* 0x3a */ x86emuOp_genop_byte_R_RM, - /* 0x3b */ x86emuOp_genop_word_R_RM, - /* 0x3c */ x86emuOp_genop_byte_AL_IMM, - /* 0x3d */ x86emuOp_genop_word_AX_IMM, - /* 0x3e */ x86emuOp_segovr_DS, - /* 0x3f */ x86emuOp_aas, - - /* 0x40 */ x86emuOp_inc_register, - /* 0x41 */ x86emuOp_inc_register, - /* 0x42 */ x86emuOp_inc_register, - /* 0x43 */ x86emuOp_inc_register, - /* 0x44 */ x86emuOp_inc_register, - /* 0x45 */ x86emuOp_inc_register, - /* 0x46 */ x86emuOp_inc_register, - /* 0x47 */ x86emuOp_inc_register, - - /* 0x48 */ x86emuOp_dec_register, - /* 0x49 */ x86emuOp_dec_register, - /* 0x4a */ x86emuOp_dec_register, - /* 0x4b */ x86emuOp_dec_register, - /* 0x4c */ x86emuOp_dec_register, - /* 0x4d */ x86emuOp_dec_register, - /* 0x4e */ x86emuOp_dec_register, - /* 0x4f */ x86emuOp_dec_register, - - /* 0x50 */ x86emuOp_push_register, - /* 0x51 */ x86emuOp_push_register, - /* 0x52 */ x86emuOp_push_register, - /* 0x53 */ x86emuOp_push_register, - /* 0x54 */ x86emuOp_push_register, - /* 0x55 */ x86emuOp_push_register, - /* 0x56 */ x86emuOp_push_register, - /* 0x57 */ x86emuOp_push_register, - - /* 0x58 */ x86emuOp_pop_register, - /* 0x59 */ x86emuOp_pop_register, - /* 0x5a */ x86emuOp_pop_register, - /* 0x5b */ x86emuOp_pop_register, - /* 0x5c */ x86emuOp_pop_register, - /* 0x5d */ x86emuOp_pop_register, - /* 0x5e */ x86emuOp_pop_register, - /* 0x5f */ x86emuOp_pop_register, - - /* 0x60 */ x86emuOp_push_all, - /* 0x61 */ x86emuOp_pop_all, - /* 0x62 */ x86emuOp_illegal_op, /* bound */ - /* 0x63 */ x86emuOp_illegal_op, /* arpl */ - /* 0x64 */ x86emuOp_segovr_FS, - /* 0x65 */ x86emuOp_segovr_GS, - /* 0x66 */ x86emuOp_prefix_data, - /* 0x67 */ x86emuOp_prefix_addr, - - /* 0x68 */ x86emuOp_push_word_IMM, - /* 0x69 */ x86emuOp_imul_word_IMM, - /* 0x6a */ x86emuOp_push_byte_IMM, - /* 0x6b */ x86emuOp_imul_byte_IMM, - /* 0x6c */ x86emuOp_ins_byte, - /* 0x6d */ x86emuOp_ins_word, - /* 0x6e */ x86emuOp_outs_byte, - /* 0x6f */ x86emuOp_outs_word, - - /* 0x70 */ x86emuOp_jump_near_cond, - /* 0x71 */ x86emuOp_jump_near_cond, - /* 0x72 */ x86emuOp_jump_near_cond, - /* 0x73 */ x86emuOp_jump_near_cond, - /* 0x74 */ x86emuOp_jump_near_cond, - /* 0x75 */ x86emuOp_jump_near_cond, - /* 0x76 */ x86emuOp_jump_near_cond, - /* 0x77 */ x86emuOp_jump_near_cond, - - /* 0x78 */ x86emuOp_jump_near_cond, - /* 0x79 */ x86emuOp_jump_near_cond, - /* 0x7a */ x86emuOp_jump_near_cond, - /* 0x7b */ x86emuOp_jump_near_cond, - /* 0x7c */ x86emuOp_jump_near_cond, - /* 0x7d */ x86emuOp_jump_near_cond, - /* 0x7e */ x86emuOp_jump_near_cond, - /* 0x7f */ x86emuOp_jump_near_cond, - - /* 0x80 */ x86emuOp_opc80_byte_RM_IMM, - /* 0x81 */ x86emuOp_opc81_word_RM_IMM, - /* 0x82 */ x86emuOp_opc82_byte_RM_IMM, - /* 0x83 */ x86emuOp_opc83_word_RM_IMM, - /* 0x84 */ x86emuOp_test_byte_RM_R, - /* 0x85 */ x86emuOp_test_word_RM_R, - /* 0x86 */ x86emuOp_xchg_byte_RM_R, - /* 0x87 */ x86emuOp_xchg_word_RM_R, - - /* 0x88 */ x86emuOp_mov_byte_RM_R, - /* 0x89 */ x86emuOp_mov_word_RM_R, - /* 0x8a */ x86emuOp_mov_byte_R_RM, - /* 0x8b */ x86emuOp_mov_word_R_RM, - /* 0x8c */ x86emuOp_mov_word_RM_SR, - /* 0x8d */ x86emuOp_lea_word_R_M, - /* 0x8e */ x86emuOp_mov_word_SR_RM, - /* 0x8f */ x86emuOp_pop_RM, - - /* 0x90 */ x86emuOp_nop, - /* 0x91 */ x86emuOp_xchg_word_AX_register, - /* 0x92 */ x86emuOp_xchg_word_AX_register, - /* 0x93 */ x86emuOp_xchg_word_AX_register, - /* 0x94 */ x86emuOp_xchg_word_AX_register, - /* 0x95 */ x86emuOp_xchg_word_AX_register, - /* 0x96 */ x86emuOp_xchg_word_AX_register, - /* 0x97 */ x86emuOp_xchg_word_AX_register, - - /* 0x98 */ x86emuOp_cbw, - /* 0x99 */ x86emuOp_cwd, - /* 0x9a */ x86emuOp_call_far_IMM, - /* 0x9b */ x86emuOp_wait, - /* 0x9c */ x86emuOp_pushf_word, - /* 0x9d */ x86emuOp_popf_word, - /* 0x9e */ x86emuOp_sahf, - /* 0x9f */ x86emuOp_lahf, - - /* 0xa0 */ x86emuOp_mov_AL_M_IMM, - /* 0xa1 */ x86emuOp_mov_AX_M_IMM, - /* 0xa2 */ x86emuOp_mov_M_AL_IMM, - /* 0xa3 */ x86emuOp_mov_M_AX_IMM, - /* 0xa4 */ x86emuOp_movs_byte, - /* 0xa5 */ x86emuOp_movs_word, - /* 0xa6 */ x86emuOp_cmps_byte, - /* 0xa7 */ x86emuOp_cmps_word, - /* 0xa8 */ x86emuOp_test_AL_IMM, - /* 0xa9 */ x86emuOp_test_AX_IMM, - /* 0xaa */ x86emuOp_stos_byte, - /* 0xab */ x86emuOp_stos_word, - /* 0xac */ x86emuOp_lods_byte, - /* 0xad */ x86emuOp_lods_word, - /* 0xac */ x86emuOp_scas_byte, - /* 0xad */ x86emuOp_scas_word, - - /* 0xb0 */ x86emuOp_mov_byte_register_IMM, - /* 0xb1 */ x86emuOp_mov_byte_register_IMM, - /* 0xb2 */ x86emuOp_mov_byte_register_IMM, - /* 0xb3 */ x86emuOp_mov_byte_register_IMM, - /* 0xb4 */ x86emuOp_mov_byte_register_IMM, - /* 0xb5 */ x86emuOp_mov_byte_register_IMM, - /* 0xb6 */ x86emuOp_mov_byte_register_IMM, - /* 0xb7 */ x86emuOp_mov_byte_register_IMM, - - /* 0xb8 */ x86emuOp_mov_word_register_IMM, - /* 0xb9 */ x86emuOp_mov_word_register_IMM, - /* 0xba */ x86emuOp_mov_word_register_IMM, - /* 0xbb */ x86emuOp_mov_word_register_IMM, - /* 0xbc */ x86emuOp_mov_word_register_IMM, - /* 0xbd */ x86emuOp_mov_word_register_IMM, - /* 0xbe */ x86emuOp_mov_word_register_IMM, - /* 0xbf */ x86emuOp_mov_word_register_IMM, - - /* 0xc0 */ x86emuOp_opcC0_byte_RM_MEM, - /* 0xc1 */ x86emuOp_opcC1_word_RM_MEM, - /* 0xc2 */ x86emuOp_ret_near_IMM, - /* 0xc3 */ x86emuOp_ret_near, - /* 0xc4 */ x86emuOp_les_R_IMM, - /* 0xc5 */ x86emuOp_lds_R_IMM, - /* 0xc6 */ x86emuOp_mov_byte_RM_IMM, - /* 0xc7 */ x86emuOp_mov_word_RM_IMM, - /* 0xc8 */ x86emuOp_enter, - /* 0xc9 */ x86emuOp_leave, - /* 0xca */ x86emuOp_ret_far_IMM, - /* 0xcb */ x86emuOp_ret_far, - /* 0xcc */ x86emuOp_int3, - /* 0xcd */ x86emuOp_int_IMM, - /* 0xce */ x86emuOp_into, - /* 0xcf */ x86emuOp_iret, - - /* 0xd0 */ x86emuOp_opcD0_byte_RM_1, - /* 0xd1 */ x86emuOp_opcD1_word_RM_1, - /* 0xd2 */ x86emuOp_opcD2_byte_RM_CL, - /* 0xd3 */ x86emuOp_opcD3_word_RM_CL, - /* 0xd4 */ x86emuOp_aam, - /* 0xd5 */ x86emuOp_aad, - /* 0xd6 */ x86emuOp_illegal_op, /* Undocumented SETALC instruction */ - /* 0xd7 */ x86emuOp_xlat, - /* 0xd8 */ x86emuOp_esc_coprocess_d8, - /* 0xd9 */ x86emuOp_esc_coprocess_d9, - /* 0xda */ x86emuOp_esc_coprocess_da, - /* 0xdb */ x86emuOp_esc_coprocess_db, - /* 0xdc */ x86emuOp_esc_coprocess_dc, - /* 0xdd */ x86emuOp_esc_coprocess_dd, - /* 0xde */ x86emuOp_esc_coprocess_de, - /* 0xdf */ x86emuOp_esc_coprocess_df, - - /* 0xe0 */ x86emuOp_loopne, - /* 0xe1 */ x86emuOp_loope, - /* 0xe2 */ x86emuOp_loop, - /* 0xe3 */ x86emuOp_jcxz, - /* 0xe4 */ x86emuOp_in_byte_AL_IMM, - /* 0xe5 */ x86emuOp_in_word_AX_IMM, - /* 0xe6 */ x86emuOp_out_byte_IMM_AL, - /* 0xe7 */ x86emuOp_out_word_IMM_AX, - - /* 0xe8 */ x86emuOp_call_near_IMM, - /* 0xe9 */ x86emuOp_jump_near_IMM, - /* 0xea */ x86emuOp_jump_far_IMM, - /* 0xeb */ x86emuOp_jump_byte_IMM, - /* 0xec */ x86emuOp_in_byte_AL_DX, - /* 0xed */ x86emuOp_in_word_AX_DX, - /* 0xee */ x86emuOp_out_byte_DX_AL, - /* 0xef */ x86emuOp_out_word_DX_AX, - - /* 0xf0 */ x86emuOp_lock, - /* 0xf1 */ x86emuOp_illegal_op, - /* 0xf2 */ x86emuOp_repne, - /* 0xf3 */ x86emuOp_repe, - /* 0xf4 */ x86emuOp_halt, - /* 0xf5 */ x86emuOp_cmc, - /* 0xf6 */ x86emuOp_opcF6_byte_RM, - /* 0xf7 */ x86emuOp_opcF7_word_RM, - - /* 0xf8 */ x86emuOp_clc, - /* 0xf9 */ x86emuOp_stc, - /* 0xfa */ x86emuOp_cli, - /* 0xfb */ x86emuOp_sti, - /* 0xfc */ x86emuOp_cld, - /* 0xfd */ x86emuOp_std, - /* 0xfe */ x86emuOp_opcFE_byte_RM, - /* 0xff */ x86emuOp_opcFF_word_RM, -}; diff --git a/x86emu/x86ops2.c b/x86emu/x86ops2.c deleted file mode 100644 index 3167ea0..0000000 --- a/x86emu/x86ops2.c +++ /dev/null @@ -1,1768 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1991-2004 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: This file includes subroutines to implement the decoding - * and emulation of all the x86 extended two-byte processor - * instructions. - * - ****************************************************************************/ - -#include "x86debug.h" -#include "x86emui.h" - -extern unsigned decode_rmXX_address(int mod, int rm); - -/*----------------------------- Implementation ----------------------------*/ - -/**************************************************************************** -PARAMETERS: -op1 - Instruction op code - -REMARKS: -Handles illegal opcodes. - ****************************************************************************/ -void x86emuOp2_illegal_op( - uint8_t op2) -{ - START_OF_INSTR(); - DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\r\n"); - TRACE_REGS(); - dbg("%x:%x: %x", M.x86.R_CS, M.x86.R_IP - 2, op2); - dbg(" ILLEGAL EXTENDED X86 OPCODE!\r\n"); - HALT_SYS(); - END_OF_INSTR(); -} - -#define xorl(a,b) (((a) && !(b)) || (!(a) && (b))) - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0x80-0x8F - ****************************************************************************/ -int x86emu_check_jump_condition(uint8_t op) -{ - switch (op) { - case 0x0: - DECODE_PRINTF("JO\t"); - return ACCESS_FLAG(F_OF); - case 0x1: - DECODE_PRINTF("JNO\t"); - return !ACCESS_FLAG(F_OF); - break; - case 0x2: - DECODE_PRINTF("JB\t"); - return ACCESS_FLAG(F_CF); - break; - case 0x3: - DECODE_PRINTF("JNB\t"); - return !ACCESS_FLAG(F_CF); - break; - case 0x4: - DECODE_PRINTF("JZ\t"); - return ACCESS_FLAG(F_ZF); - break; - case 0x5: - DECODE_PRINTF("JNZ\t"); - return !ACCESS_FLAG(F_ZF); - break; - case 0x6: - DECODE_PRINTF("JBE\t"); - return ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF); - break; - case 0x7: - DECODE_PRINTF("JNBE\t"); - return !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)); - break; - case 0x8: - DECODE_PRINTF("JS\t"); - return ACCESS_FLAG(F_SF); - break; - case 0x9: - DECODE_PRINTF("JNS\t"); - return !ACCESS_FLAG(F_SF); - break; - case 0xa: - DECODE_PRINTF("JP\t"); - return ACCESS_FLAG(F_PF); - break; - case 0xb: - DECODE_PRINTF("JNP\t"); - return !ACCESS_FLAG(F_PF); - break; - case 0xc: - DECODE_PRINTF("JL\t"); - return xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); - break; - case 0xd: - DECODE_PRINTF("JNL\t"); - return !xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); - break; - case 0xe: - DECODE_PRINTF("JLE\t"); - return (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || - ACCESS_FLAG(F_ZF)); - break; - default: - DECODE_PRINTF("JNLE\t"); - return !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || - ACCESS_FLAG(F_ZF)); - } -} - -void x86emuOp2_long_jump(uint8_t op2) -{ - int32_t target; - int cond; - - /* conditional jump to word offset. */ - START_OF_INSTR(); - cond = x86emu_check_jump_condition(op2 & 0xF); - target = (int16_t) fetch_word_imm(); - target += (int16_t) M.x86.R_IP; - DECODE_PRINTF2("%x\r\n", target); - TRACE_AND_STEP(); - if (cond) - M.x86.R_IP = (uint16_t)target; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0x90-0x9F - ****************************************************************************/ -void x86emuOp2_set_byte(uint8_t op2) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t *destreg; - char *name = 0; - int cond = 0; - - START_OF_INSTR(); - switch (op2) { - case 0x90: - name = "SETO\t"; - cond = ACCESS_FLAG(F_OF); - break; - case 0x91: - name = "SETNO\t"; - cond = !ACCESS_FLAG(F_OF); - break; - case 0x92: - name = "SETB\t"; - cond = ACCESS_FLAG(F_CF); - break; - case 0x93: - name = "SETNB\t"; - cond = !ACCESS_FLAG(F_CF); - break; - case 0x94: - name = "SETZ\t"; - cond = ACCESS_FLAG(F_ZF); - break; - case 0x95: - name = "SETNZ\t"; - cond = !ACCESS_FLAG(F_ZF); - break; - case 0x96: - name = "SETBE\t"; - cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF); - break; - case 0x97: - name = "SETNBE\t"; - cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)); - break; - case 0x98: - name = "SETS\t"; - cond = ACCESS_FLAG(F_SF); - break; - case 0x99: - name = "SETNS\t"; - cond = !ACCESS_FLAG(F_SF); - break; - case 0x9a: - name = "SETP\t"; - cond = ACCESS_FLAG(F_PF); - break; - case 0x9b: - name = "SETNP\t"; - cond = !ACCESS_FLAG(F_PF); - break; - case 0x9c: - name = "SETL\t"; - cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); - break; - case 0x9d: - name = "SETNL\t"; - cond = !xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); - break; - case 0x9e: - name = "SETLE\t"; - cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || - ACCESS_FLAG(F_ZF)); - break; - case 0x9f: - name = "SETNLE\t"; - cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || - ACCESS_FLAG(F_ZF)); - break; - } - DECODE_PRINTF(name); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - TRACE_AND_STEP(); - store_data_byte(destoffset, cond ? 0x01 : 0x00); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - TRACE_AND_STEP(); - *destreg = cond ? 0x01 : 0x00; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa0 - ****************************************************************************/ -void x86emuOp2_push_FS(uint8_t X86EMU_UNUSED(op2)) -{ - START_OF_INSTR(); - DECODE_PRINTF("PUSH\tFS\r\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_FS); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa1 - ****************************************************************************/ -void x86emuOp2_pop_FS(uint8_t X86EMU_UNUSED(op2)) -{ - START_OF_INSTR(); - DECODE_PRINTF("POP\tFS\n"); - TRACE_AND_STEP(); - M.x86.R_FS = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa3 - ****************************************************************************/ -void x86emuOp2_bt_R(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - int bit,disp; - - START_OF_INSTR(); - DECODE_PRINTF("BT\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval; - uint32_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (int16_t)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); - } else { - uint16_t srcval; - uint16_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (int16_t)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); - CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg,*shiftreg; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF); - } else { - uint16_t *srcreg,*shiftreg; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa4 - ****************************************************************************/ -void x86emuOp2_shld_IMM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t shift; - - START_OF_INSTR(); - DECODE_PRINTF("SHLD\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - uint32_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shld_long(destval,*shiftreg,shift); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - uint16_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shld_word(destval,*shiftreg,shift); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*shiftreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - *destreg = shld_long(*destreg,*shiftreg,shift); - } else { - uint16_t *destreg,*shiftreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - *destreg = shld_word(*destreg,*shiftreg,shift); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa5 - ****************************************************************************/ -void x86emuOp2_shld_CL(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("SHLD\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - uint32_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shld_long(destval,*shiftreg,M.x86.R_CL); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - uint16_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shld_word(destval,*shiftreg,M.x86.R_CL); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*shiftreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - *destreg = shld_long(*destreg,*shiftreg,M.x86.R_CL); - } else { - uint16_t *destreg,*shiftreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - *destreg = shld_word(*destreg,*shiftreg,M.x86.R_CL); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa8 - ****************************************************************************/ -void x86emuOp2_push_GS(uint8_t X86EMU_UNUSED(op2)) -{ - START_OF_INSTR(); - DECODE_PRINTF("PUSH\tGS\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_GS); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa9 - ****************************************************************************/ -void x86emuOp2_pop_GS(uint8_t X86EMU_UNUSED(op2)) -{ - START_OF_INSTR(); - DECODE_PRINTF("POP\tGS\r\n"); - TRACE_AND_STEP(); - M.x86.R_GS = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xaa - ****************************************************************************/ -void x86emuOp2_bts_R(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - int bit,disp; - - START_OF_INSTR(); - DECODE_PRINTF("BTS\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval,mask; - uint32_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (int16_t)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_long(srcoffset+disp, srcval | mask); - } else { - uint16_t srcval,mask; - uint16_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (int16_t)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); - mask = (uint16_t)(0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_word(srcoffset+disp, srcval | mask); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg,*shiftreg; - uint32_t mask; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg |= mask; - } else { - uint16_t *srcreg,*shiftreg; - uint16_t mask; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - mask = (uint16_t)(0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg |= mask; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xac - ****************************************************************************/ -void x86emuOp2_shrd_IMM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t shift; - - START_OF_INSTR(); - DECODE_PRINTF("SHLD\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - uint32_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shrd_long(destval,*shiftreg,shift); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - uint16_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shrd_word(destval,*shiftreg,shift); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*shiftreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - *destreg = shrd_long(*destreg,*shiftreg,shift); - } else { - uint16_t *destreg,*shiftreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - *destreg = shrd_word(*destreg,*shiftreg,shift); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xad - ****************************************************************************/ -void x86emuOp2_shrd_CL(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("SHLD\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - uint32_t *shiftreg; - - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shrd_long(destval,*shiftreg,M.x86.R_CL); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - uint16_t *shiftreg; - - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shrd_word(destval,*shiftreg,M.x86.R_CL); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*shiftreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - *destreg = shrd_long(*destreg,*shiftreg,M.x86.R_CL); - } else { - uint16_t *destreg,*shiftreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - *destreg = shrd_word(*destreg,*shiftreg,M.x86.R_CL); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xaf - ****************************************************************************/ -void x86emuOp2_imul_R_RM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("IMUL\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - uint32_t res_lo,res_hi; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_long(srcoffset); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(int32_t)*destreg,(int32_t)srcval); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (uint32_t)res_lo; - } else { - uint16_t *destreg; - uint16_t srcval; - uint32_t res; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_word(srcoffset); - TRACE_AND_STEP(); - res = (int16_t)*destreg * (int16_t)srcval; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (uint16_t)res; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*srcreg; - uint32_t res_lo,res_hi; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(int32_t)*destreg,(int32_t)*srcreg); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (uint32_t)res_lo; - } else { - uint16_t *destreg,*srcreg; - uint32_t res; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - res = (int16_t)*destreg * (int16_t)*srcreg; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (uint16_t)res; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xb2 - ****************************************************************************/ -void x86emuOp2_lss_R_IMM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rh, rl; - uint16_t *dstreg; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("LSS\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_SS = fetch_data_word(srcoffset + 2); - } else { /* register to register */ - /* UNDEFINED! */ - TRACE_AND_STEP(); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xb3 - ****************************************************************************/ -void x86emuOp2_btr_R(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - int bit,disp; - - START_OF_INSTR(); - DECODE_PRINTF("BTR\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval,mask; - uint32_t *shiftreg; - - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (int16_t)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_long(srcoffset+disp, srcval & ~mask); - } else { - uint16_t srcval,mask; - uint16_t *shiftreg; - - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (int16_t)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); - mask = (uint16_t)(0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_word(srcoffset+disp, (uint16_t)(srcval & ~mask)); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg,*shiftreg; - uint32_t mask; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg &= ~mask; - } else { - uint16_t *srcreg,*shiftreg; - uint16_t mask; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - mask = (uint16_t)(0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg &= ~mask; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xb4 - ****************************************************************************/ -void x86emuOp2_lfs_R_IMM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rh, rl; - uint16_t *dstreg; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("LFS\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_FS = fetch_data_word(srcoffset + 2); - } else { /* register to register */ - /* UNDEFINED! */ - TRACE_AND_STEP(); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xb5 - ****************************************************************************/ -void x86emuOp2_lgs_R_IMM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rh, rl; - uint16_t *dstreg; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("LGS\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_GS = fetch_data_word(srcoffset + 2); - } else { /* register to register */ - /* UNDEFINED! */ - TRACE_AND_STEP(); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xb6 - ****************************************************************************/ -void x86emuOp2_movzx_byte_R_RM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("MOVZX\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - uint16_t *destreg; - uint16_t srcval; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint8_t *srcreg; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } else { - uint16_t *destreg; - uint8_t *srcreg; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xb7 - ****************************************************************************/ -void x86emuOp2_movzx_word_R_RM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - uint32_t *destreg; - uint32_t srcval; - uint16_t *srcreg; - - START_OF_INSTR(); - DECODE_PRINTF("MOVZX\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { /* register to register */ - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xba - ****************************************************************************/ -void x86emuOp2_btX_I(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - uint8_t shift; - int bit; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - switch (rh) { - case 4: - DECODE_PRINTF("BT\t"); - break; - case 5: - DECODE_PRINTF("BTS\t"); - break; - case 6: - DECODE_PRINTF("BTR\t"); - break; - case 7: - DECODE_PRINTF("BTC\t"); - break; - default: - dbg("ILLEGAL EXTENDED X86 OPCODE\n"); - TRACE_REGS(); - dbg("%x:%x: %x", M.x86.R_CS, M.x86.R_IP - 3, op2); - dbg(" %x", (mod << 6) | (rh << 3) | rl); - dbg(" ILLEGAL EXTENDED X86 OPCODE EXTENSION!\r\n"); - HALT_SYS(); - } - if (mod < 3) { - - srcoffset = decode_rmXX_address(mod, rl); - shift = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", shift); - TRACE_AND_STEP(); - - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval, mask; - - bit = shift & 0x1F; - srcval = fetch_data_long(srcoffset); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - switch (rh) { - case 5: - store_data_long(srcoffset, srcval | mask); - break; - case 6: - store_data_long(srcoffset, srcval & ~mask); - break; - case 7: - store_data_long(srcoffset, srcval ^ mask); - break; - default: - break; - } - } else { - uint16_t srcval, mask; - - bit = shift & 0xF; - srcval = fetch_data_word(srcoffset); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - switch (rh) { - case 5: - store_data_word(srcoffset, srcval | mask); - break; - case 6: - store_data_word(srcoffset, srcval & ~mask); - break; - case 7: - store_data_word(srcoffset, srcval ^ mask); - break; - default: - break; - } - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg; - uint32_t mask; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - shift = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", shift); - TRACE_AND_STEP(); - bit = shift & 0x1F; - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - switch (rh) { - case 5: - *srcreg |= mask; - break; - case 6: - *srcreg &= ~mask; - break; - case 7: - *srcreg ^= mask; - break; - default: - break; - } - } else { - uint16_t *srcreg; - uint16_t mask; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - shift = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", shift); - TRACE_AND_STEP(); - bit = shift & 0xF; - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - switch (rh) { - case 5: - *srcreg |= mask; - break; - case 6: - *srcreg &= ~mask; - break; - case 7: - *srcreg ^= mask; - break; - default: - break; - } - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xbb - ****************************************************************************/ -void x86emuOp2_btc_R(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - int bit,disp; - - START_OF_INSTR(); - DECODE_PRINTF("BTC\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval,mask; - uint32_t *shiftreg; - - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (int16_t)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_long(srcoffset+disp, srcval ^ mask); - } else { - uint16_t srcval,mask; - uint16_t *shiftreg; - - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (int16_t)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); - mask = (uint16_t)(0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_word(srcoffset+disp, (uint16_t)(srcval ^ mask)); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg,*shiftreg; - uint32_t mask; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg ^= mask; - } else { - uint16_t *srcreg,*shiftreg; - uint16_t mask; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - mask = (uint16_t)(0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg ^= mask; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xbc - ****************************************************************************/ -void x86emuOp2_bsf(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("BSF\r\n"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval, *dstreg; - - dstreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - srcval = fetch_data_long(srcoffset); - CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); - for(*dstreg = 0; *dstreg < 32; (*dstreg)++) - if ((srcval >> *dstreg) & 1) break; - } else { - uint16_t srcval, *dstreg; - - dstreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - srcval = fetch_data_word(srcoffset); - CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); - for(*dstreg = 0; *dstreg < 16; (*dstreg)++) - if ((srcval >> *dstreg) & 1) break; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg, *dstreg; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - dstreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF); - for(*dstreg = 0; *dstreg < 32; (*dstreg)++) - if ((*srcreg >> *dstreg) & 1) break; - } else { - uint16_t *srcreg, *dstreg; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - dstreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF); - for(*dstreg = 0; *dstreg < 16; (*dstreg)++) - if ((*srcreg >> *dstreg) & 1) break; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xbd - ****************************************************************************/ -void x86emuOp2_bsr(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("BSF\r\n"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval, *dstreg; - - dstreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - srcval = fetch_data_long(srcoffset); - CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); - for(*dstreg = 31; *dstreg > 0; (*dstreg)--) - if ((srcval >> *dstreg) & 1) break; - } else { - uint16_t srcval, *dstreg; - - dstreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - srcval = fetch_data_word(srcoffset); - CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); - for(*dstreg = 15; *dstreg > 0; (*dstreg)--) - if ((srcval >> *dstreg) & 1) break; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg, *dstreg; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - dstreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF); - for(*dstreg = 31; *dstreg > 0; (*dstreg)--) - if ((*srcreg >> *dstreg) & 1) break; - } else { - uint16_t *srcreg, *dstreg; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - dstreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF); - for(*dstreg = 15; *dstreg > 0; (*dstreg)--) - if ((*srcreg >> *dstreg) & 1) break; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xbe - ****************************************************************************/ -void x86emuOp2_movsx_byte_R_RM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("MOVSX\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = (int32_t)((int8_t)fetch_data_byte(srcoffset)); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - uint16_t *destreg; - uint16_t srcval; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = (int16_t)((int8_t)fetch_data_byte(srcoffset)); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint8_t *srcreg; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = (int32_t)((int8_t)*srcreg); - } else { - uint16_t *destreg; - uint8_t *srcreg; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = (int16_t)((int8_t)*srcreg); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xbf - ****************************************************************************/ -void x86emuOp2_movsx_word_R_RM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - uint32_t *destreg; - uint32_t srcval; - uint16_t *srcreg; - - START_OF_INSTR(); - DECODE_PRINTF("MOVSX\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = (int32_t)((int16_t)fetch_data_word(srcoffset)); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { /* register to register */ - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = (int32_t)((int16_t)*srcreg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/*************************************************************************** - * Double byte operation code table: - **************************************************************************/ -void (*x86emu_optab2[256])(uint8_t) = -{ - /* 0x00 */ x86emuOp2_illegal_op, /* Group F (ring 0 PM) */ - /* 0x01 */ x86emuOp2_illegal_op, /* Group G (ring 0 PM) */ - /* 0x02 */ x86emuOp2_illegal_op, /* lar (ring 0 PM) */ - /* 0x03 */ x86emuOp2_illegal_op, /* lsl (ring 0 PM) */ - /* 0x04 */ x86emuOp2_illegal_op, - /* 0x05 */ x86emuOp2_illegal_op, /* loadall (undocumented) */ - /* 0x06 */ x86emuOp2_illegal_op, /* clts (ring 0 PM) */ - /* 0x07 */ x86emuOp2_illegal_op, /* loadall (undocumented) */ - /* 0x08 */ x86emuOp2_illegal_op, /* invd (ring 0 PM) */ - /* 0x09 */ x86emuOp2_illegal_op, /* wbinvd (ring 0 PM) */ - /* 0x0a */ x86emuOp2_illegal_op, - /* 0x0b */ x86emuOp2_illegal_op, - /* 0x0c */ x86emuOp2_illegal_op, - /* 0x0d */ x86emuOp2_illegal_op, - /* 0x0e */ x86emuOp2_illegal_op, - /* 0x0f */ x86emuOp2_illegal_op, - - /* 0x10 */ x86emuOp2_illegal_op, - /* 0x11 */ x86emuOp2_illegal_op, - /* 0x12 */ x86emuOp2_illegal_op, - /* 0x13 */ x86emuOp2_illegal_op, - /* 0x14 */ x86emuOp2_illegal_op, - /* 0x15 */ x86emuOp2_illegal_op, - /* 0x16 */ x86emuOp2_illegal_op, - /* 0x17 */ x86emuOp2_illegal_op, - /* 0x18 */ x86emuOp2_illegal_op, - /* 0x19 */ x86emuOp2_illegal_op, - /* 0x1a */ x86emuOp2_illegal_op, - /* 0x1b */ x86emuOp2_illegal_op, - /* 0x1c */ x86emuOp2_illegal_op, - /* 0x1d */ x86emuOp2_illegal_op, - /* 0x1e */ x86emuOp2_illegal_op, - /* 0x1f */ x86emuOp2_illegal_op, - - /* 0x20 */ x86emuOp2_illegal_op, /* mov reg32,creg (ring 0 PM) */ - /* 0x21 */ x86emuOp2_illegal_op, /* mov reg32,dreg (ring 0 PM) */ - /* 0x22 */ x86emuOp2_illegal_op, /* mov creg,reg32 (ring 0 PM) */ - /* 0x23 */ x86emuOp2_illegal_op, /* mov dreg,reg32 (ring 0 PM) */ - /* 0x24 */ x86emuOp2_illegal_op, /* mov reg32,treg (ring 0 PM) */ - /* 0x25 */ x86emuOp2_illegal_op, - /* 0x26 */ x86emuOp2_illegal_op, /* mov treg,reg32 (ring 0 PM) */ - /* 0x27 */ x86emuOp2_illegal_op, - /* 0x28 */ x86emuOp2_illegal_op, - /* 0x29 */ x86emuOp2_illegal_op, - /* 0x2a */ x86emuOp2_illegal_op, - /* 0x2b */ x86emuOp2_illegal_op, - /* 0x2c */ x86emuOp2_illegal_op, - /* 0x2d */ x86emuOp2_illegal_op, - /* 0x2e */ x86emuOp2_illegal_op, - /* 0x2f */ x86emuOp2_illegal_op, - - /* 0x30 */ x86emuOp2_illegal_op, - /* 0x31 */ x86emuOp2_illegal_op, - /* 0x32 */ x86emuOp2_illegal_op, - /* 0x33 */ x86emuOp2_illegal_op, - /* 0x34 */ x86emuOp2_illegal_op, - /* 0x35 */ x86emuOp2_illegal_op, - /* 0x36 */ x86emuOp2_illegal_op, - /* 0x37 */ x86emuOp2_illegal_op, - /* 0x38 */ x86emuOp2_illegal_op, - /* 0x39 */ x86emuOp2_illegal_op, - /* 0x3a */ x86emuOp2_illegal_op, - /* 0x3b */ x86emuOp2_illegal_op, - /* 0x3c */ x86emuOp2_illegal_op, - /* 0x3d */ x86emuOp2_illegal_op, - /* 0x3e */ x86emuOp2_illegal_op, - /* 0x3f */ x86emuOp2_illegal_op, - - /* 0x40 */ x86emuOp2_illegal_op, - /* 0x41 */ x86emuOp2_illegal_op, - /* 0x42 */ x86emuOp2_illegal_op, - /* 0x43 */ x86emuOp2_illegal_op, - /* 0x44 */ x86emuOp2_illegal_op, - /* 0x45 */ x86emuOp2_illegal_op, - /* 0x46 */ x86emuOp2_illegal_op, - /* 0x47 */ x86emuOp2_illegal_op, - /* 0x48 */ x86emuOp2_illegal_op, - /* 0x49 */ x86emuOp2_illegal_op, - /* 0x4a */ x86emuOp2_illegal_op, - /* 0x4b */ x86emuOp2_illegal_op, - /* 0x4c */ x86emuOp2_illegal_op, - /* 0x4d */ x86emuOp2_illegal_op, - /* 0x4e */ x86emuOp2_illegal_op, - /* 0x4f */ x86emuOp2_illegal_op, - - /* 0x50 */ x86emuOp2_illegal_op, - /* 0x51 */ x86emuOp2_illegal_op, - /* 0x52 */ x86emuOp2_illegal_op, - /* 0x53 */ x86emuOp2_illegal_op, - /* 0x54 */ x86emuOp2_illegal_op, - /* 0x55 */ x86emuOp2_illegal_op, - /* 0x56 */ x86emuOp2_illegal_op, - /* 0x57 */ x86emuOp2_illegal_op, - /* 0x58 */ x86emuOp2_illegal_op, - /* 0x59 */ x86emuOp2_illegal_op, - /* 0x5a */ x86emuOp2_illegal_op, - /* 0x5b */ x86emuOp2_illegal_op, - /* 0x5c */ x86emuOp2_illegal_op, - /* 0x5d */ x86emuOp2_illegal_op, - /* 0x5e */ x86emuOp2_illegal_op, - /* 0x5f */ x86emuOp2_illegal_op, - - /* 0x60 */ x86emuOp2_illegal_op, - /* 0x61 */ x86emuOp2_illegal_op, - /* 0x62 */ x86emuOp2_illegal_op, - /* 0x63 */ x86emuOp2_illegal_op, - /* 0x64 */ x86emuOp2_illegal_op, - /* 0x65 */ x86emuOp2_illegal_op, - /* 0x66 */ x86emuOp2_illegal_op, - /* 0x67 */ x86emuOp2_illegal_op, - /* 0x68 */ x86emuOp2_illegal_op, - /* 0x69 */ x86emuOp2_illegal_op, - /* 0x6a */ x86emuOp2_illegal_op, - /* 0x6b */ x86emuOp2_illegal_op, - /* 0x6c */ x86emuOp2_illegal_op, - /* 0x6d */ x86emuOp2_illegal_op, - /* 0x6e */ x86emuOp2_illegal_op, - /* 0x6f */ x86emuOp2_illegal_op, - - /* 0x70 */ x86emuOp2_illegal_op, - /* 0x71 */ x86emuOp2_illegal_op, - /* 0x72 */ x86emuOp2_illegal_op, - /* 0x73 */ x86emuOp2_illegal_op, - /* 0x74 */ x86emuOp2_illegal_op, - /* 0x75 */ x86emuOp2_illegal_op, - /* 0x76 */ x86emuOp2_illegal_op, - /* 0x77 */ x86emuOp2_illegal_op, - /* 0x78 */ x86emuOp2_illegal_op, - /* 0x79 */ x86emuOp2_illegal_op, - /* 0x7a */ x86emuOp2_illegal_op, - /* 0x7b */ x86emuOp2_illegal_op, - /* 0x7c */ x86emuOp2_illegal_op, - /* 0x7d */ x86emuOp2_illegal_op, - /* 0x7e */ x86emuOp2_illegal_op, - /* 0x7f */ x86emuOp2_illegal_op, - - /* 0x80 */ x86emuOp2_long_jump, - /* 0x81 */ x86emuOp2_long_jump, - /* 0x82 */ x86emuOp2_long_jump, - /* 0x83 */ x86emuOp2_long_jump, - /* 0x84 */ x86emuOp2_long_jump, - /* 0x85 */ x86emuOp2_long_jump, - /* 0x86 */ x86emuOp2_long_jump, - /* 0x87 */ x86emuOp2_long_jump, - /* 0x88 */ x86emuOp2_long_jump, - /* 0x89 */ x86emuOp2_long_jump, - /* 0x8a */ x86emuOp2_long_jump, - /* 0x8b */ x86emuOp2_long_jump, - /* 0x8c */ x86emuOp2_long_jump, - /* 0x8d */ x86emuOp2_long_jump, - /* 0x8e */ x86emuOp2_long_jump, - /* 0x8f */ x86emuOp2_long_jump, - - /* 0x90 */ x86emuOp2_set_byte, - /* 0x91 */ x86emuOp2_set_byte, - /* 0x92 */ x86emuOp2_set_byte, - /* 0x93 */ x86emuOp2_set_byte, - /* 0x94 */ x86emuOp2_set_byte, - /* 0x95 */ x86emuOp2_set_byte, - /* 0x96 */ x86emuOp2_set_byte, - /* 0x97 */ x86emuOp2_set_byte, - /* 0x98 */ x86emuOp2_set_byte, - /* 0x99 */ x86emuOp2_set_byte, - /* 0x9a */ x86emuOp2_set_byte, - /* 0x9b */ x86emuOp2_set_byte, - /* 0x9c */ x86emuOp2_set_byte, - /* 0x9d */ x86emuOp2_set_byte, - /* 0x9e */ x86emuOp2_set_byte, - /* 0x9f */ x86emuOp2_set_byte, - - /* 0xa0 */ x86emuOp2_push_FS, - /* 0xa1 */ x86emuOp2_pop_FS, - /* 0xa2 */ x86emuOp2_illegal_op, - /* 0xa3 */ x86emuOp2_bt_R, - /* 0xa4 */ x86emuOp2_shld_IMM, - /* 0xa5 */ x86emuOp2_shld_CL, - /* 0xa6 */ x86emuOp2_illegal_op, - /* 0xa7 */ x86emuOp2_illegal_op, - /* 0xa8 */ x86emuOp2_push_GS, - /* 0xa9 */ x86emuOp2_pop_GS, - /* 0xaa */ x86emuOp2_illegal_op, - /* 0xab */ x86emuOp2_bt_R, - /* 0xac */ x86emuOp2_shrd_IMM, - /* 0xad */ x86emuOp2_shrd_CL, - /* 0xae */ x86emuOp2_illegal_op, - /* 0xaf */ x86emuOp2_imul_R_RM, - - /* 0xb0 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */ - /* 0xb1 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */ - /* 0xb2 */ x86emuOp2_lss_R_IMM, - /* 0xb3 */ x86emuOp2_btr_R, - /* 0xb4 */ x86emuOp2_lfs_R_IMM, - /* 0xb5 */ x86emuOp2_lgs_R_IMM, - /* 0xb6 */ x86emuOp2_movzx_byte_R_RM, - /* 0xb7 */ x86emuOp2_movzx_word_R_RM, - /* 0xb8 */ x86emuOp2_illegal_op, - /* 0xb9 */ x86emuOp2_illegal_op, - /* 0xba */ x86emuOp2_btX_I, - /* 0xbb */ x86emuOp2_btc_R, - /* 0xbc */ x86emuOp2_bsf, - /* 0xbd */ x86emuOp2_bsr, - /* 0xbe */ x86emuOp2_movsx_byte_R_RM, - /* 0xbf */ x86emuOp2_movsx_word_R_RM, - - /* 0xc0 */ x86emuOp2_illegal_op, /* TODO: xadd */ - /* 0xc1 */ x86emuOp2_illegal_op, /* TODO: xadd */ - /* 0xc2 */ x86emuOp2_illegal_op, - /* 0xc3 */ x86emuOp2_illegal_op, - /* 0xc4 */ x86emuOp2_illegal_op, - /* 0xc5 */ x86emuOp2_illegal_op, - /* 0xc6 */ x86emuOp2_illegal_op, - /* 0xc7 */ x86emuOp2_illegal_op, - /* 0xc8 */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xc9 */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xca */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xcb */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xcc */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xcd */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xce */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xcf */ x86emuOp2_illegal_op, /* TODO: bswap */ - - /* 0xd0 */ x86emuOp2_illegal_op, - /* 0xd1 */ x86emuOp2_illegal_op, - /* 0xd2 */ x86emuOp2_illegal_op, - /* 0xd3 */ x86emuOp2_illegal_op, - /* 0xd4 */ x86emuOp2_illegal_op, - /* 0xd5 */ x86emuOp2_illegal_op, - /* 0xd6 */ x86emuOp2_illegal_op, - /* 0xd7 */ x86emuOp2_illegal_op, - /* 0xd8 */ x86emuOp2_illegal_op, - /* 0xd9 */ x86emuOp2_illegal_op, - /* 0xda */ x86emuOp2_illegal_op, - /* 0xdb */ x86emuOp2_illegal_op, - /* 0xdc */ x86emuOp2_illegal_op, - /* 0xdd */ x86emuOp2_illegal_op, - /* 0xde */ x86emuOp2_illegal_op, - /* 0xdf */ x86emuOp2_illegal_op, - - /* 0xe0 */ x86emuOp2_illegal_op, - /* 0xe1 */ x86emuOp2_illegal_op, - /* 0xe2 */ x86emuOp2_illegal_op, - /* 0xe3 */ x86emuOp2_illegal_op, - /* 0xe4 */ x86emuOp2_illegal_op, - /* 0xe5 */ x86emuOp2_illegal_op, - /* 0xe6 */ x86emuOp2_illegal_op, - /* 0xe7 */ x86emuOp2_illegal_op, - /* 0xe8 */ x86emuOp2_illegal_op, - /* 0xe9 */ x86emuOp2_illegal_op, - /* 0xea */ x86emuOp2_illegal_op, - /* 0xeb */ x86emuOp2_illegal_op, - /* 0xec */ x86emuOp2_illegal_op, - /* 0xed */ x86emuOp2_illegal_op, - /* 0xee */ x86emuOp2_illegal_op, - /* 0xef */ x86emuOp2_illegal_op, - - /* 0xf0 */ x86emuOp2_illegal_op, - /* 0xf1 */ x86emuOp2_illegal_op, - /* 0xf2 */ x86emuOp2_illegal_op, - /* 0xf3 */ x86emuOp2_illegal_op, - /* 0xf4 */ x86emuOp2_illegal_op, - /* 0xf5 */ x86emuOp2_illegal_op, - /* 0xf6 */ x86emuOp2_illegal_op, - /* 0xf7 */ x86emuOp2_illegal_op, - /* 0xf8 */ x86emuOp2_illegal_op, - /* 0xf9 */ x86emuOp2_illegal_op, - /* 0xfa */ x86emuOp2_illegal_op, - /* 0xfb */ x86emuOp2_illegal_op, - /* 0xfc */ x86emuOp2_illegal_op, - /* 0xfd */ x86emuOp2_illegal_op, - /* 0xfe */ x86emuOp2_illegal_op, - /* 0xff */ x86emuOp2_illegal_op, -}; diff --git a/x86emu/x86pcibios.c b/x86emu/x86pcibios.c deleted file mode 100644 index 441fb16..0000000 --- a/x86emu/x86pcibios.c +++ /dev/null @@ -1,165 +0,0 @@ -#include "radeonfb.h" -#include "pci.h" -#include "x86emu.h" -#include "x86pcibios.h" -#include "x86debug.h" - -extern unsigned short offset_port; - -int x86_pcibios_emulator() -{ - int ret = 0; - unsigned long dev; - - switch (X86_AX) - { - case PCI_BIOS_PRESENT: - dbg("%s: PCI_BIOS_PRESENT\r\n", __FUNCTION__); - X86_AH = 0x00; /* no config space/special cycle support */ - X86_AL = 0x01; /* config mechanism 1 */ - X86_EDX = 'P' | 'C' << 8 | 'I' << 16 | ' ' << 24; - X86_EBX = 0x0210; /* Version 2.10 */ - X86_ECX = 0xFF00; /* FixME: Max bus number */ - X86_EFLAGS &= ~FB_CF; /* clear carry flag */ - ret = 1; - break; - - case FIND_PCI_DEVICE: - dbg("%s: FIND_PCI_DEVICE vendor = %04x, device = %04x\r\n", __FUNCTION__, X86_DX, X86_CX); - dev = pci_find_device((unsigned long) X86_DX, ((unsigned long) X86_CX), 0); - - if (dev != 0) - { - dbg("%s: ... OK\r\n", __FUNCTION__); - X86_BH = PCI_BUS_FROM_HANDLE(dev); - //X86_BH = (char)(dev >> 16) / PCI_MAX_FUNCTION); // dev->bus->secondary; - X86_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev); - //X86_BL = (char)dev; // dev->path.u.pci.devfn; - X86_AH = SUCCESSFUL; - X86_EFLAGS &= ~FB_CF; /* clear carry flag */ - ret = 1; - } else { - dbg("%s: ... error\r\n", __FUNCTION__); - X86_AH = DEVICE_NOT_FOUND; - X86_EFLAGS |= FB_CF; /* set carry flag */ - ret = 0; - } - break; - - case FIND_PCI_CLASS_CODE: - /* FixME: support SI != 0 */ - dbg("%s: FIND_PCI_CLASS_CODE %x\r\n", __FUNCTION__, X86_ECX); - dev = pci_find_classcode(X86_ECX, 0); - if (dev != 0) { - dbg("%s: ... OK\r\n", __FUNCTION__); - X86_BH = PCI_BUS_FROM_HANDLE(dev); - X86_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev); - X86_AH = SUCCESSFUL; - X86_EFLAGS &= ~FB_CF; /* clear carry flag */ - ret = 1; - } - else - { - dbg("%s: ... error\r\n", __FUNCTION__); - X86_AH = DEVICE_NOT_FOUND; - X86_EFLAGS |= FB_CF; /* set carry flag */ - ret = 0; - } - break; - - case READ_CONFIG_BYTE: - // bus, devfn - dbg("%s: READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x\r\n", __FUNCTION__, X86_BH, X86_BL, X86_DI); - dev = PCI_HANDLE(X86_BH, X86_BL >> 3, X86_BL & 3); - X86_CL = pci_read_config_byte(dev, X86_DI); - dbg("%s: value = %x\r\n", __FUNCTION__, X86_CL); - X86_AH = SUCCESSFUL; - X86_EFLAGS &= ~FB_CF; /* clear carry flag */ - ret = 1; - break; - - case READ_CONFIG_WORD: - // bus, devfn - dbg("%s: READ_CONFIG_WORD bus = %x, devfn = %x, reg = %x\r\n", __FUNCTION__, X86_BH, X86_BL, X86_DI); - dev = PCI_HANDLE(X86_BH, X86_BL >> 3, X86_BL & 3); - if(X86_DI == PCIBAR1) - X86_CX = offset_port + 1; - else - X86_CX = pci_read_config_word(dev, X86_DI); - dbg("%s: value = %x\r\n", __FUNCTION__, X86_CX); - X86_AH = SUCCESSFUL; - X86_EFLAGS &= ~FB_CF; /* clear carry flag */ - ret = 1; - break; - - case READ_CONFIG_DWORD: - // bus, devfn - dbg("%s: READ_CONFIG_DWORD bus = %x, devfn = %x, reg = %x\r\n", __FUNCTION__, X86_BH, X86_BL, X86_DI); - dev = PCI_HANDLE(X86_BH, X86_BL >> 3, X86_BL & 3); - if (X86_DI == PCIBAR1) - X86_CX = (unsigned long) offset_port + 1; - else - X86_ECX = pci_read_config_longword(dev, X86_DI); - dbg("%s: value = %x\r\n", __FUNCTION__, X86_ECX); - X86_AH = SUCCESSFUL; - X86_EFLAGS &= ~FB_CF; /* clear carry flag */ - ret = 1; - break; - - case WRITE_CONFIG_BYTE: - // bus, devfn - dbg("%s: READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x, value = %x\r\n", __FUNCTION__, - X86_BH, X86_BL, X86_DI, X86_CL); - dev = PCI_HANDLE(X86_BH, X86_BL >> 3, X86_BL & 3); - pci_write_config_byte(dev, X86_DI, X86_CL); - X86_AH = SUCCESSFUL; - X86_EFLAGS &= ~FB_CF; /* clear carry flag */ - ret = 1; - break; - - case WRITE_CONFIG_WORD: - // bus, devfn - dev = PCI_HANDLE(X86_BH, X86_BL >> 3, X86_BL & 3); - dbg("%s: WRITE_CONFIG_WORD bus = %x, devfn = %x, reg = %x, value = %x\r\n", X86_BH, X86_BL, X86_DI, X86_CX); - if (X86_DI == PCIBAR1) - { - offset_port = X86_CX; - X86_AH = SUCCESSFUL; - X86_EFLAGS &= ~FB_CF; /* clear carry flag */ - ret = 1; - break; - } - pci_write_config_word(dev, X86_DI, X86_CX); - X86_AH = SUCCESSFUL; - X86_EFLAGS &= ~FB_CF; /* clear carry flag */ - ret = 1; - break; - - case WRITE_CONFIG_DWORD: - // bus, devfn - dev = PCI_HANDLE(X86_BH, X86_BL >> 3, X86_BL & 3); - dbg("%s: WRITE_CONFIG_DWORD bus = %x, devfn = %x, value = %x\r\n", __FUNCTION__, - X86_BH, X86_BL, X86_DI, X86_ECX); - if (X86_DI == PCIBAR1) - { - offset_port = (unsigned short) X86_ECX & 0xFFFC; - X86_AH = SUCCESSFUL; - X86_EFLAGS &= ~FB_CF; /* clear carry flag */ - ret = 1; - break; - } - pci_write_config_longword(dev, X86_DI, X86_ECX); - X86_AH = SUCCESSFUL; - X86_EFLAGS &= ~FB_CF; /* clear carry flag */ - ret = 1; - break; - - default: - dbg("%s: PCI_BIOS FUNC_NOT_SUPPORTED\r\n", __FUNCTION__); - X86_AH = FUNC_NOT_SUPPORTED; - X86_EFLAGS |= FB_CF; - break; - } - - return ret; -} diff --git a/x86emu/x86prim_ops.c b/x86emu/x86prim_ops.c deleted file mode 100644 index 152e07d..0000000 --- a/x86emu/x86prim_ops.c +++ /dev/null @@ -1,2452 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1991-2004 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: This file contains the code to implement the primitive -* machine operations used by the emulation code in ops.c -* -* Carry Chain Calculation -* -* This represents a somewhat expensive calculation which is -* apparently required to emulate the setting of the OF and AF flag. -* The latter is not so important, but the former is. The overflow -* flag is the XOR of the top two bits of the carry chain for an -* addition (similar for subtraction). Since we do not want to -* simulate the addition in a bitwise manner, we try to calculate the -* carry chain given the two operands and the result. -* -* So, given the following table, which represents the addition of two -* bits, we can derive a formula for the carry chain. -* -* a b cin r cout -* 0 0 0 0 0 -* 0 0 1 1 0 -* 0 1 0 1 0 -* 0 1 1 0 1 -* 1 0 0 1 0 -* 1 0 1 0 1 -* 1 1 0 0 1 -* 1 1 1 1 1 -* -* Construction of table for cout: -* -* ab -* r \ 00 01 11 10 -* |------------------ -* 0 | 0 1 1 1 -* 1 | 0 0 1 0 -* -* By inspection, one gets: cc = ab + r'(a + b) -* -* That represents alot of operations, but NO CHOICE.... -* -* Borrow Chain Calculation. -* -* The following table represents the subtraction of two bits, from -* which we can derive a formula for the borrow chain. -* -* a b bin r bout -* 0 0 0 0 0 -* 0 0 1 1 1 -* 0 1 0 1 1 -* 0 1 1 0 1 -* 1 0 0 1 0 -* 1 0 1 0 0 -* 1 1 0 0 0 -* 1 1 1 1 1 -* -* Construction of table for cout: -* -* ab -* r \ 00 01 11 10 -* |------------------ -* 0 | 0 1 0 0 -* 1 | 1 1 1 0 -* -* By inspection, one gets: bc = a'b + r(a' + b) -* -****************************************************************************/ - -#define PRIM_OPS_NO_REDEFINE_ASM -#include "x86debug.h" -#include "x86emui.h" - -#define abs(x) ({ \ - int __x = (x); \ - (__x < 0) ? -__x : __x; \ - }) - -#define labs(x) ({ \ - long __x = (x); \ - (__x < 0) ? -__x : __x; \ - }) - -/*------------------------- Global Variables ------------------------------*/ - -static uint32_t x86emu_parity_tab[8] = -{ - 0x96696996, - 0x69969669, - 0x69969669, - 0x96696996, - 0x69969669, - 0x96696996, - 0x96696996, - 0x69969669, -}; - -#define PARITY(x) (((x86emu_parity_tab[(x) / 32] >> ((x) % 32)) & 1) == 0) -#define XOR2(x) (((x) ^ ((x)>>1)) & 0x1) - -/*----------------------------- Implementation ----------------------------*/ - - -/*--------- Side effects helper functions -------*/ - -/**************************************************************************** -REMARKS: -implements side efects for byte operations that don't overflow -****************************************************************************/ - -static void set_parity_flag(uint32_t res) -{ - CONDITIONAL_SET_FLAG(PARITY(res & 0xFF), F_PF); -} - -static void set_szp_flags_8(uint8_t res) -{ - CONDITIONAL_SET_FLAG(res & 0x80, F_SF); - CONDITIONAL_SET_FLAG(res == 0, F_ZF); - set_parity_flag(res); -} - -static void set_szp_flags_16(uint16_t res) -{ - CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); - CONDITIONAL_SET_FLAG(res == 0, F_ZF); - set_parity_flag(res); -} - -static void set_szp_flags_32(uint32_t res) -{ - CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); - CONDITIONAL_SET_FLAG(res == 0, F_ZF); - set_parity_flag(res); -} - -static void no_carry_byte_side_eff(uint8_t res) -{ - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - set_szp_flags_8(res); -} - -static void no_carry_word_side_eff(uint16_t res) -{ - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - set_szp_flags_16(res); -} - -static void no_carry_long_side_eff(uint32_t res) -{ - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - set_szp_flags_32(res); -} - -static void calc_carry_chain(int bits, uint32_t d, uint32_t s, uint32_t res, int set_carry) -{ - uint32_t cc; - - cc = (s & d) | ((~res) & (s | d)); - CONDITIONAL_SET_FLAG(XOR2(cc >> (bits - 2)), F_OF); - CONDITIONAL_SET_FLAG(cc & 0x8, F_AF); - if (set_carry) { - CONDITIONAL_SET_FLAG(res & (1 << bits), F_CF); - } -} - -static void calc_borrow_chain(int bits, uint32_t d, uint32_t s, uint32_t res, int set_carry) -{ - uint32_t bc; - - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(XOR2(bc >> (bits - 2)), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - if (set_carry) { - CONDITIONAL_SET_FLAG(bc & (1 << (bits - 1)), F_CF); - } -} - -/**************************************************************************** -REMARKS: -Implements the AAA instruction and side effects. -****************************************************************************/ -uint16_t aaa_word(uint16_t d) -{ - uint16_t res; - if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) { - d += 0x6; - d += 0x100; - SET_FLAG(F_AF); - SET_FLAG(F_CF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - } - res = (uint16_t)(d & 0xFF0F); - set_szp_flags_16(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the AAA instruction and side effects. -****************************************************************************/ -uint16_t aas_word(uint16_t d) -{ - uint16_t res; - if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) { - d -= 0x6; - d -= 0x100; - SET_FLAG(F_AF); - SET_FLAG(F_CF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - } - res = (uint16_t)(d & 0xFF0F); - set_szp_flags_16(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the AAD instruction and side effects. -****************************************************************************/ -uint16_t aad_word(uint16_t d) -{ - uint16_t l; - uint8_t hb, lb; - - hb = (uint8_t)((d >> 8) & 0xff); - lb = (uint8_t)((d & 0xff)); - l = (uint16_t)((lb + 10 * hb) & 0xFF); - - no_carry_byte_side_eff(l & 0xFF); - return l; -} - -/**************************************************************************** -REMARKS: -Implements the AAM instruction and side effects. -****************************************************************************/ -uint16_t aam_word(uint8_t d) -{ - uint16_t h, l; - - h = (uint16_t)(d / 10); - l = (uint16_t)(d % 10); - l |= (uint16_t)(h << 8); - - no_carry_byte_side_eff(l & 0xFF); - return l; -} - -/**************************************************************************** -REMARKS: -Implements the ADC instruction and side effects. -****************************************************************************/ -uint8_t adc_byte(uint8_t d, uint8_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + s; - if (ACCESS_FLAG(F_CF)) res++; - - set_szp_flags_8(res); - calc_carry_chain(8,s,d,res,1); - - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ADC instruction and side effects. -****************************************************************************/ -uint16_t adc_word(uint16_t d, uint16_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + s; - if (ACCESS_FLAG(F_CF)) - res++; - - set_szp_flags_16((uint16_t)res); - calc_carry_chain(16,s,d,res,1); - - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ADC instruction and side effects. -****************************************************************************/ -uint32_t adc_long(uint32_t d, uint32_t s) -{ - uint32_t lo; /* all operands in native machine order */ - uint32_t hi; - uint32_t res; - - lo = (d & 0xFFFF) + (s & 0xFFFF); - res = d + s; - - if (ACCESS_FLAG(F_CF)) { - lo++; - res++; - } - - hi = (lo >> 16) + (d >> 16) + (s >> 16); - - set_szp_flags_32(res); - calc_carry_chain(32,s,d,res,0); - - CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the ADD instruction and side effects. -****************************************************************************/ -uint8_t add_byte(uint8_t d, uint8_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + s; - set_szp_flags_8((uint8_t)res); - calc_carry_chain(8,s,d,res,1); - - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ADD instruction and side effects. -****************************************************************************/ -uint16_t add_word(uint16_t d, uint16_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + s; - set_szp_flags_16((uint16_t)res); - calc_carry_chain(16,s,d,res,1); - - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ADD instruction and side effects. -****************************************************************************/ -uint32_t add_long(uint32_t d, uint32_t s) -{ - uint32_t res; - - res = d + s; - set_szp_flags_32(res); - calc_carry_chain(32,s,d,res,0); - - CONDITIONAL_SET_FLAG(res < d || res < s, F_CF); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the AND instruction and side effects. -****************************************************************************/ -uint8_t and_byte(uint8_t d, uint8_t s) -{ - uint8_t res; /* all operands in native machine order */ - - res = d & s; - - no_carry_byte_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the AND instruction and side effects. -****************************************************************************/ -uint16_t and_word(uint16_t d, uint16_t s) -{ - uint16_t res; /* all operands in native machine order */ - - res = d & s; - - no_carry_word_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the AND instruction and side effects. -****************************************************************************/ -uint32_t and_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d & s; - no_carry_long_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the CMP instruction and side effects. -****************************************************************************/ -uint8_t cmp_byte(uint8_t d, uint8_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d - s; - set_szp_flags_8((uint8_t)res); - calc_borrow_chain(8, d, s, res, 1); - - return d; -} - -/**************************************************************************** -REMARKS: -Implements the CMP instruction and side effects. -****************************************************************************/ -uint16_t cmp_word(uint16_t d, uint16_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d - s; - set_szp_flags_16((uint16_t)res); - calc_borrow_chain(16, d, s, res, 1); - - return d; -} - -/**************************************************************************** -REMARKS: -Implements the CMP instruction and side effects. -****************************************************************************/ -uint32_t cmp_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d - s; - set_szp_flags_32(res); - calc_borrow_chain(32, d, s, res, 1); - - return d; -} - -/**************************************************************************** -REMARKS: -Implements the DAA instruction and side effects. -****************************************************************************/ -uint8_t daa_byte(uint8_t d) -{ - uint32_t res = d; - if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) { - res += 6; - SET_FLAG(F_AF); - } - if (res > 0x9F || ACCESS_FLAG(F_CF)) { - res += 0x60; - SET_FLAG(F_CF); - } - set_szp_flags_8((uint8_t)res); - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the DAS instruction and side effects. -****************************************************************************/ -uint8_t das_byte(uint8_t d) -{ - if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) { - d -= 6; - SET_FLAG(F_AF); - } - if (d > 0x9F || ACCESS_FLAG(F_CF)) { - d -= 0x60; - SET_FLAG(F_CF); - } - set_szp_flags_8(d); - return d; -} - -/**************************************************************************** -REMARKS: -Implements the DEC instruction and side effects. -****************************************************************************/ -uint8_t dec_byte(uint8_t d) -{ - uint32_t res; /* all operands in native machine order */ - - res = d - 1; - set_szp_flags_8((uint8_t)res); - calc_borrow_chain(8, d, 1, res, 0); - - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the DEC instruction and side effects. -****************************************************************************/ -uint16_t dec_word(uint16_t d) -{ - uint32_t res; /* all operands in native machine order */ - - res = d - 1; - set_szp_flags_16((uint16_t)res); - calc_borrow_chain(16, d, 1, res, 0); - - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the DEC instruction and side effects. -****************************************************************************/ -uint32_t dec_long(uint32_t d) -{ - uint32_t res; /* all operands in native machine order */ - - res = d - 1; - - set_szp_flags_32(res); - calc_borrow_chain(32, d, 1, res, 0); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the INC instruction and side effects. -****************************************************************************/ -uint8_t inc_byte(uint8_t d) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + 1; - set_szp_flags_8((uint8_t)res); - calc_carry_chain(8, d, 1, res, 0); - - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the INC instruction and side effects. -****************************************************************************/ -uint16_t inc_word(uint16_t d) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + 1; - set_szp_flags_16((uint16_t)res); - calc_carry_chain(16, d, 1, res, 0); - - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the INC instruction and side effects. -****************************************************************************/ -uint32_t inc_long(uint32_t d) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + 1; - set_szp_flags_32(res); - calc_carry_chain(32, d, 1, res, 0); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the OR instruction and side effects. -****************************************************************************/ -uint8_t or_byte(uint8_t d, uint8_t s) -{ - uint8_t res; /* all operands in native machine order */ - - res = d | s; - no_carry_byte_side_eff(res); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the OR instruction and side effects. -****************************************************************************/ -uint16_t or_word(uint16_t d, uint16_t s) -{ - uint16_t res; /* all operands in native machine order */ - - res = d | s; - no_carry_word_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the OR instruction and side effects. -****************************************************************************/ -uint32_t or_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d | s; - no_carry_long_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the OR instruction and side effects. -****************************************************************************/ -uint8_t neg_byte(uint8_t s) -{ - uint8_t res; - - CONDITIONAL_SET_FLAG(s != 0, F_CF); - res = (uint8_t)-s; - set_szp_flags_8(res); - calc_borrow_chain(8, 0, s, res, 0); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the OR instruction and side effects. -****************************************************************************/ -uint16_t neg_word(uint16_t s) -{ - uint16_t res; - - CONDITIONAL_SET_FLAG(s != 0, F_CF); - res = (uint16_t)-s; - set_szp_flags_16((uint16_t)res); - calc_borrow_chain(16, 0, s, res, 0); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the OR instruction and side effects. -****************************************************************************/ -uint32_t neg_long(uint32_t s) -{ - uint32_t res; - - CONDITIONAL_SET_FLAG(s != 0, F_CF); - res = (uint32_t)-s; - set_szp_flags_32(res); - calc_borrow_chain(32, 0, s, res, 0); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the NOT instruction and side effects. -****************************************************************************/ -uint8_t not_byte(uint8_t s) -{ - return ~s; -} - -/**************************************************************************** -REMARKS: -Implements the NOT instruction and side effects. -****************************************************************************/ -uint16_t not_word(uint16_t s) -{ - return ~s; -} - -/**************************************************************************** -REMARKS: -Implements the NOT instruction and side effects. -****************************************************************************/ -uint32_t not_long(uint32_t s) -{ - return ~s; -} - -/**************************************************************************** -REMARKS: -Implements the RCL instruction and side effects. -****************************************************************************/ -uint8_t rcl_byte(uint8_t d, uint8_t s) -{ - unsigned int res, cnt, mask, cf; - - /* s is the rotate distance. It varies from 0 - 8. */ - /* have - - CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0 - - want to rotate through the carry by "s" bits. We could - loop, but that's inefficient. So the width is 9, - and we split into three parts: - - The new carry flag (was B_n) - the stuff in B_n-1 .. B_0 - the stuff in B_7 .. B_n+1 - - The new rotate is done mod 9, and given this, - for a rotation of n bits (mod 9) the new carry flag is - then located n bits from the MSB. The low part is - then shifted up cnt bits, and the high part is or'd - in. Using CAPS for new values, and lowercase for the - original values, this can be expressed as: - - IF n > 0 - 1) CF <- b_(8-n) - 2) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 - 3) B_(n-1) <- cf - 4) B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1)) - */ - res = d; - if ((cnt = s % 9) != 0) { - /* extract the new CARRY FLAG. */ - /* CF <- b_(8-n) */ - cf = (d >> (8 - cnt)) & 0x1; - - /* get the low stuff which rotated - into the range B_7 .. B_cnt */ - /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 */ - /* note that the right hand side done by the mask */ - res = (d << cnt) & 0xff; - - /* now the high stuff which rotated around - into the positions B_cnt-2 .. B_0 */ - /* B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1)) */ - /* shift it downward, 7-(n-2) = 9-n positions. - and mask off the result before or'ing in. - */ - mask = (1 << (cnt - 1)) - 1; - res |= (d >> (9 - cnt)) & mask; - - /* if the carry flag was set, or it in. */ - if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ - /* B_(n-1) <- cf */ - res |= 1 << (cnt - 1); - } - /* set the new carry flag, based on the variable "cf" */ - CONDITIONAL_SET_FLAG(cf, F_CF); - /* OVERFLOW is set *IFF* cnt==1, then it is the - xor of CF and the most significant bit. Blecck. */ - /* parenthesized this expression since it appears to - be causing OF to be misset */ - CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)), - F_OF); - - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the RCL instruction and side effects. -****************************************************************************/ -uint16_t rcl_word(uint16_t d, uint8_t s) -{ - unsigned int res, cnt, mask, cf; - - res = d; - if ((cnt = s % 17) != 0) { - cf = (d >> (16 - cnt)) & 0x1; - res = (d << cnt) & 0xffff; - mask = (1 << (cnt - 1)) - 1; - res |= (d >> (17 - cnt)) & mask; - if (ACCESS_FLAG(F_CF)) { - res |= 1 << (cnt - 1); - } - CONDITIONAL_SET_FLAG(cf, F_CF); - CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 14) & 0x2)), - F_OF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the RCL instruction and side effects. -****************************************************************************/ -uint32_t rcl_long(uint32_t d, uint8_t s) -{ - uint32_t res, cnt, mask, cf; - - res = d; - if ((cnt = s % 33) != 0) { - cf = (d >> (32 - cnt)) & 0x1; - res = (d << cnt) & 0xffffffff; - mask = (1 << (cnt - 1)) - 1; - res |= (d >> (33 - cnt)) & mask; - if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ - res |= 1 << (cnt - 1); - } - CONDITIONAL_SET_FLAG(cf, F_CF); - CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 30) & 0x2)), - F_OF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the RCR instruction and side effects. -****************************************************************************/ -uint8_t rcr_byte(uint8_t d, uint8_t s) -{ - uint32_t res, cnt; - uint32_t mask, cf, ocf = 0; - - /* rotate right through carry */ - /* - s is the rotate distance. It varies from 0 - 8. - d is the byte object rotated. - - have - - CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0 - - The new rotate is done mod 9, and given this, - for a rotation of n bits (mod 9) the new carry flag is - then located n bits from the LSB. The low part is - then shifted up cnt bits, and the high part is or'd - in. Using CAPS for new values, and lowercase for the - original values, this can be expressed as: - - IF n > 0 - 1) CF <- b_(n-1) - 2) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) - 3) B_(8-n) <- cf - 4) B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0) - */ - res = d; - if ((cnt = s % 9) != 0) { - /* extract the new CARRY FLAG. */ - /* CF <- b_(n-1) */ - if (cnt == 1) { - cf = d & 0x1; - /* note hackery here. Access_flag(..) evaluates to either - 0 if flag not set - non-zero if flag is set. - doing access_flag(..) != 0 casts that into either - 0..1 in any representation of the flags register - (i.e. packed bit array or unpacked.) - */ - ocf = ACCESS_FLAG(F_CF) != 0; - } else - cf = (d >> (cnt - 1)) & 0x1; - - /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_n */ - /* note that the right hand side done by the mask - This is effectively done by shifting the - object to the right. The result must be masked, - in case the object came in and was treated - as a negative number. Needed??? */ - - mask = (1 << (8 - cnt)) - 1; - res = (d >> cnt) & mask; - - /* now the high stuff which rotated around - into the positions B_cnt-2 .. B_0 */ - /* B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0) */ - /* shift it downward, 7-(n-2) = 9-n positions. - and mask off the result before or'ing in. - */ - res |= (d << (9 - cnt)); - - /* if the carry flag was set, or it in. */ - if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ - /* B_(8-n) <- cf */ - res |= 1 << (8 - cnt); - } - /* set the new carry flag, based on the variable "cf" */ - CONDITIONAL_SET_FLAG(cf, F_CF); - /* OVERFLOW is set *IFF* cnt==1, then it is the - xor of CF and the most significant bit. Blecck. */ - /* parenthesized... */ - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 6) & 0x2)), - F_OF); - } - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the RCR instruction and side effects. -****************************************************************************/ -uint16_t rcr_word(uint16_t d, uint8_t s) -{ - uint32_t res, cnt; - uint32_t mask, cf, ocf = 0; - - /* rotate right through carry */ - res = d; - if ((cnt = s % 17) != 0) { - if (cnt == 1) { - cf = d & 0x1; - ocf = ACCESS_FLAG(F_CF) != 0; - } else - cf = (d >> (cnt - 1)) & 0x1; - mask = (1 << (16 - cnt)) - 1; - res = (d >> cnt) & mask; - res |= (d << (17 - cnt)); - if (ACCESS_FLAG(F_CF)) { - res |= 1 << (16 - cnt); - } - CONDITIONAL_SET_FLAG(cf, F_CF); - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 14) & 0x2)), - F_OF); - } - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the RCR instruction and side effects. -****************************************************************************/ -uint32_t rcr_long(uint32_t d, uint8_t s) -{ - uint32_t res, cnt; - uint32_t mask, cf, ocf = 0; - - /* rotate right through carry */ - res = d; - if ((cnt = s % 33) != 0) { - if (cnt == 1) { - cf = d & 0x1; - ocf = ACCESS_FLAG(F_CF) != 0; - } else - cf = (d >> (cnt - 1)) & 0x1; - mask = (1 << (32 - cnt)) - 1; - res = (d >> cnt) & mask; - if (cnt != 1) - res |= (d << (33 - cnt)); - if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ - res |= 1 << (32 - cnt); - } - CONDITIONAL_SET_FLAG(cf, F_CF); - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 30) & 0x2)), - F_OF); - } - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the ROL instruction and side effects. -****************************************************************************/ -uint8_t rol_byte(uint8_t d, uint8_t s) -{ - unsigned int res, cnt, mask; - - /* rotate left */ - /* - s is the rotate distance. It varies from 0 - 8. - d is the byte object rotated. - - have - - CF B_7 ... B_0 - - The new rotate is done mod 8. - Much simpler than the "rcl" or "rcr" operations. - - IF n > 0 - 1) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0) - 2) B_(n-1) .. B_(0) <- b_(7) .. b_(8-n) - */ - res = d; - if ((cnt = s % 8) != 0) { - /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0) */ - res = (d << cnt); - - /* B_(n-1) .. B_(0) <- b_(7) .. b_(8-n) */ - mask = (1 << cnt) - 1; - res |= (d >> (8 - cnt)) & mask; - - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x1, F_CF); - /* OVERFLOW is set *IFF* s==1, then it is the - xor of CF and the most significant bit. Blecck. */ - CONDITIONAL_SET_FLAG(s == 1 && - XOR2((res & 0x1) + ((res >> 6) & 0x2)), - F_OF); - } if (s != 0) { - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x1, F_CF); - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ROL instruction and side effects. -****************************************************************************/ -uint16_t rol_word(uint16_t d, uint8_t s) -{ - unsigned int res, cnt, mask; - - res = d; - if ((cnt = s % 16) != 0) { - res = (d << cnt); - mask = (1 << cnt) - 1; - res |= (d >> (16 - cnt)) & mask; - CONDITIONAL_SET_FLAG(res & 0x1, F_CF); - CONDITIONAL_SET_FLAG(s == 1 && - XOR2((res & 0x1) + ((res >> 14) & 0x2)), - F_OF); - } if (s != 0) { - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x1, F_CF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ROL instruction and side effects. -****************************************************************************/ -uint32_t rol_long(uint32_t d, uint8_t s) -{ - uint32_t res, cnt, mask; - - res = d; - if ((cnt = s % 32) != 0) { - res = (d << cnt); - mask = (1 << cnt) - 1; - res |= (d >> (32 - cnt)) & mask; - CONDITIONAL_SET_FLAG(res & 0x1, F_CF); - CONDITIONAL_SET_FLAG(s == 1 && - XOR2((res & 0x1) + ((res >> 30) & 0x2)), - F_OF); - } if (s != 0) { - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x1, F_CF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the ROR instruction and side effects. -****************************************************************************/ -uint8_t ror_byte(uint8_t d, uint8_t s) -{ - unsigned int res, cnt, mask; - - /* rotate right */ - /* - s is the rotate distance. It varies from 0 - 8. - d is the byte object rotated. - - have - - B_7 ... B_0 - - The rotate is done mod 8. - - IF n > 0 - 1) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) - 2) B_(7) .. B_(8-n) <- b_(n-1) .. b_(0) - */ - res = d; - if ((cnt = s % 8) != 0) { /* not a typo, do nada if cnt==0 */ - /* B_(7) .. B_(8-n) <- b_(n-1) .. b_(0) */ - res = (d << (8 - cnt)); - - /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) */ - mask = (1 << (8 - cnt)) - 1; - res |= (d >> (cnt)) & mask; - - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x80, F_CF); - /* OVERFLOW is set *IFF* s==1, then it is the - xor of the two most significant bits. Blecck. */ - CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 6), F_OF); - } else if (s != 0) { - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x80, F_CF); - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ROR instruction and side effects. -****************************************************************************/ -uint16_t ror_word(uint16_t d, uint8_t s) -{ - unsigned int res, cnt, mask; - - res = d; - if ((cnt = s % 16) != 0) { - res = (d << (16 - cnt)); - mask = (1 << (16 - cnt)) - 1; - res |= (d >> (cnt)) & mask; - CONDITIONAL_SET_FLAG(res & 0x8000, F_CF); - CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 14), F_OF); - } else if (s != 0) { - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x8000, F_CF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ROR instruction and side effects. -****************************************************************************/ -uint32_t ror_long(uint32_t d, uint8_t s) -{ - uint32_t res, cnt, mask; - - res = d; - if ((cnt = s % 32) != 0) { - res = (d << (32 - cnt)); - mask = (1 << (32 - cnt)) - 1; - res |= (d >> (cnt)) & mask; - CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF); - CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 30), F_OF); - } else if (s != 0) { - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SHL instruction and side effects. -****************************************************************************/ -uint8_t shl_byte(uint8_t d, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 8) { - cnt = s % 8; - - /* last bit shifted out goes into carry flag */ - if (cnt > 0) { - res = d << cnt; - cf = d & (1 << (8 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_8((uint8_t)res); - } else { - res = (uint8_t) d; - } - - if (cnt == 1) { - /* Needs simplification. */ - CONDITIONAL_SET_FLAG( - (((res & 0x80) == 0x80) ^ - (ACCESS_FLAG(F_CF) != 0)), - /* was (M.x86.R_FLG&F_CF)==F_CF)), */ - F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80, F_CF); - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_PF); - SET_FLAG(F_ZF); - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SHL instruction and side effects. -****************************************************************************/ -uint16_t shl_word(uint16_t d, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 16) { - cnt = s % 16; - if (cnt > 0) { - res = d << cnt; - cf = d & (1 << (16 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_16((uint16_t)res); - } else { - res = (uint16_t) d; - } - - if (cnt == 1) { - CONDITIONAL_SET_FLAG( - (((res & 0x8000) == 0x8000) ^ - (ACCESS_FLAG(F_CF) != 0)), - F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF); - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_PF); - SET_FLAG(F_ZF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SHL instruction and side effects. -****************************************************************************/ -uint32_t shl_long(uint32_t d, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 32) { - cnt = s % 32; - if (cnt > 0) { - res = d << cnt; - cf = d & (1 << (32 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_32((uint32_t)res); - } else { - res = d; - } - if (cnt == 1) { - CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^ - (ACCESS_FLAG(F_CF) != 0)), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF); - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_PF); - SET_FLAG(F_ZF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SHR instruction and side effects. -****************************************************************************/ -uint8_t shr_byte(uint8_t d, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 8) { - cnt = s % 8; - if (cnt > 0) { - cf = d & (1 << (cnt - 1)); - res = d >> cnt; - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_8((uint8_t)res); - } else { - res = (uint8_t) d; - } - - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(res >> 6), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CONDITIONAL_SET_FLAG((d >> (s-1)) & 0x1, F_CF); - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_PF); - SET_FLAG(F_ZF); - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SHR instruction and side effects. -****************************************************************************/ -uint16_t shr_word(uint16_t d, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 16) { - cnt = s % 16; - if (cnt > 0) { - cf = d & (1 << (cnt - 1)); - res = d >> cnt; - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_16((uint16_t)res); - } else { - res = d; - } - - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SHR instruction and side effects. -****************************************************************************/ -uint32_t shr_long(uint32_t d, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 32) { - cnt = s % 32; - if (cnt > 0) { - cf = d & (1 << (cnt - 1)); - res = d >> cnt; - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_32((uint32_t)res); - } else { - res = d; - } - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SAR instruction and side effects. -****************************************************************************/ -uint8_t sar_byte(uint8_t d, uint8_t s) -{ - unsigned int cnt, res, cf, mask, sf; - - res = d; - sf = d & 0x80; - cnt = s % 8; - if (cnt > 0 && cnt < 8) { - mask = (1 << (8 - cnt)) - 1; - cf = d & (1 << (cnt - 1)); - res = (d >> cnt) & mask; - CONDITIONAL_SET_FLAG(cf, F_CF); - if (sf) { - res |= ~mask; - } - set_szp_flags_8((uint8_t)res); - } else if (cnt >= 8) { - if (sf) { - res = 0xff; - SET_FLAG(F_CF); - CLEAR_FLAG(F_ZF); - SET_FLAG(F_SF); - SET_FLAG(F_PF); - } else { - res = 0; - CLEAR_FLAG(F_CF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SAR instruction and side effects. -****************************************************************************/ -uint16_t sar_word(uint16_t d, uint8_t s) -{ - unsigned int cnt, res, cf, mask, sf; - - sf = d & 0x8000; - cnt = s % 16; - res = d; - if (cnt > 0 && cnt < 16) { - mask = (1 << (16 - cnt)) - 1; - cf = d & (1 << (cnt - 1)); - res = (d >> cnt) & mask; - CONDITIONAL_SET_FLAG(cf, F_CF); - if (sf) { - res |= ~mask; - } - set_szp_flags_16((uint16_t)res); - } else if (cnt >= 16) { - if (sf) { - res = 0xffff; - SET_FLAG(F_CF); - CLEAR_FLAG(F_ZF); - SET_FLAG(F_SF); - SET_FLAG(F_PF); - } else { - res = 0; - CLEAR_FLAG(F_CF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SAR instruction and side effects. -****************************************************************************/ -uint32_t sar_long(uint32_t d, uint8_t s) -{ - uint32_t cnt, res, cf, mask, sf; - - sf = d & 0x80000000; - cnt = s % 32; - res = d; - if (cnt > 0 && cnt < 32) { - mask = (1 << (32 - cnt)) - 1; - cf = d & (1 << (cnt - 1)); - res = (d >> cnt) & mask; - CONDITIONAL_SET_FLAG(cf, F_CF); - if (sf) { - res |= ~mask; - } - set_szp_flags_32(res); - } else if (cnt >= 32) { - if (sf) { - res = 0xffffffff; - SET_FLAG(F_CF); - CLEAR_FLAG(F_ZF); - SET_FLAG(F_SF); - SET_FLAG(F_PF); - } else { - res = 0; - CLEAR_FLAG(F_CF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SHLD instruction and side effects. -****************************************************************************/ -uint16_t shld_word (uint16_t d, uint16_t fill, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 16) { - cnt = s % 16; - if (cnt > 0) { - res = (d << cnt) | (fill >> (16-cnt)); - cf = d & (1 << (16 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_16((uint16_t)res); - } else { - res = d; - } - if (cnt == 1) { - CONDITIONAL_SET_FLAG((((res & 0x8000) == 0x8000) ^ - (ACCESS_FLAG(F_CF) != 0)), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF); - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_PF); - SET_FLAG(F_ZF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SHLD instruction and side effects. -****************************************************************************/ -uint32_t shld_long (uint32_t d, uint32_t fill, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 32) { - cnt = s % 32; - if (cnt > 0) { - res = (d << cnt) | (fill >> (32-cnt)); - cf = d & (1 << (32 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_32((uint32_t)res); - } else { - res = d; - } - if (cnt == 1) { - CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^ - (ACCESS_FLAG(F_CF) != 0)), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF); - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_PF); - SET_FLAG(F_ZF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SHRD instruction and side effects. -****************************************************************************/ -uint16_t shrd_word (uint16_t d, uint16_t fill, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 16) { - cnt = s % 16; - if (cnt > 0) { - cf = d & (1 << (cnt - 1)); - res = (d >> cnt) | (fill << (16 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_16((uint16_t)res); - } else { - res = d; - } - - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SHRD instruction and side effects. -****************************************************************************/ -uint32_t shrd_long (uint32_t d, uint32_t fill, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 32) { - cnt = s % 32; - if (cnt > 0) { - cf = d & (1 << (cnt - 1)); - res = (d >> cnt) | (fill << (32 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_32((uint32_t)res); - } else { - res = d; - } - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SBB instruction and side effects. -****************************************************************************/ -uint8_t sbb_byte(uint8_t d, uint8_t s) -{ - uint32_t res; /* all operands in native machine order */ - uint32_t bc; - - if (ACCESS_FLAG(F_CF)) - res = d - s - 1; - else - res = d - s; - set_szp_flags_8((uint8_t)res); - - /* calculate the borrow chain. See note at top */ - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(bc & 0x80, F_CF); - CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SBB instruction and side effects. -****************************************************************************/ -uint16_t sbb_word(uint16_t d, uint16_t s) -{ - uint32_t res; /* all operands in native machine order */ - uint32_t bc; - - if (ACCESS_FLAG(F_CF)) - res = d - s - 1; - else - res = d - s; - set_szp_flags_16((uint16_t)res); - - /* calculate the borrow chain. See note at top */ - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF); - CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SBB instruction and side effects. -****************************************************************************/ -uint32_t sbb_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - uint32_t bc; - - if (ACCESS_FLAG(F_CF)) - res = d - s - 1; - else - res = d - s; - - set_szp_flags_32(res); - - /* calculate the borrow chain. See note at top */ - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF); - CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SUB instruction and side effects. -****************************************************************************/ -uint8_t sub_byte(uint8_t d, uint8_t s) -{ - uint32_t res; /* all operands in native machine order */ - uint32_t bc; - - res = d - s; - set_szp_flags_8((uint8_t)res); - - /* calculate the borrow chain. See note at top */ - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(bc & 0x80, F_CF); - CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SUB instruction and side effects. -****************************************************************************/ -uint16_t sub_word(uint16_t d, uint16_t s) -{ - uint32_t res; /* all operands in native machine order */ - uint32_t bc; - - res = d - s; - set_szp_flags_16((uint16_t)res); - - /* calculate the borrow chain. See note at top */ - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF); - CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SUB instruction and side effects. -****************************************************************************/ -uint32_t sub_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - uint32_t bc; - - res = d - s; - set_szp_flags_32(res); - - /* calculate the borrow chain. See note at top */ - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF); - CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the TEST instruction and side effects. -****************************************************************************/ -void test_byte(uint8_t d, uint8_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d & s; - - CLEAR_FLAG(F_OF); - set_szp_flags_8((uint8_t)res); - /* AF == dont care */ - CLEAR_FLAG(F_CF); -} - -/**************************************************************************** -REMARKS: -Implements the TEST instruction and side effects. -****************************************************************************/ -void test_word(uint16_t d, uint16_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d & s; - - CLEAR_FLAG(F_OF); - set_szp_flags_16((uint16_t)res); - /* AF == dont care */ - CLEAR_FLAG(F_CF); -} - -/**************************************************************************** -REMARKS: -Implements the TEST instruction and side effects. -****************************************************************************/ -void test_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d & s; - - CLEAR_FLAG(F_OF); - set_szp_flags_32(res); - /* AF == dont care */ - CLEAR_FLAG(F_CF); -} - -/**************************************************************************** -REMARKS: -Implements the XOR instruction and side effects. -****************************************************************************/ -uint8_t xor_byte(uint8_t d, uint8_t s) -{ - uint8_t res; /* all operands in native machine order */ - - res = d ^ s; - no_carry_byte_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the XOR instruction and side effects. -****************************************************************************/ -uint16_t xor_word(uint16_t d, uint16_t s) -{ - uint16_t res; /* all operands in native machine order */ - - res = d ^ s; - no_carry_word_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the XOR instruction and side effects. -****************************************************************************/ -uint32_t xor_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d ^ s; - no_carry_long_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the IMUL instruction and side effects. -****************************************************************************/ -void imul_byte(uint8_t s) -{ - int16_t res = (int16_t)((int8_t)M.x86.R_AL * (int8_t)s); - - M.x86.R_AX = res; - if (((M.x86.R_AL & 0x80) == 0 && M.x86.R_AH == 0x00) || - ((M.x86.R_AL & 0x80) != 0 && M.x86.R_AH == 0xFF)) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } -} - -/**************************************************************************** -REMARKS: -Implements the IMUL instruction and side effects. -****************************************************************************/ -void imul_word(uint16_t s) -{ - int32_t res = (int16_t)M.x86.R_AX * (int16_t)s; - - M.x86.R_AX = (uint16_t)res; - M.x86.R_DX = (uint16_t)(res >> 16); - if (((M.x86.R_AX & 0x8000) == 0 && M.x86.R_DX == 0x0000) || - ((M.x86.R_AX & 0x8000) != 0 && M.x86.R_DX == 0xFFFF)) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } -} - -/**************************************************************************** -REMARKS: -Implements the IMUL instruction and side effects. -****************************************************************************/ -void imul_long_direct(uint32_t *res_lo, uint32_t* res_hi,uint32_t d, uint32_t s) -{ -#ifdef __HAS_LONG_LONG__ - s64 res = (s64)d * (s64)s; - - *res_lo = (uint32_t)res; - *res_hi = (uint32_t)(res >> 32); -#else - uint32_t d_lo,d_hi,d_sign; - uint32_t s_lo,s_hi,s_sign; - uint32_t rlo_lo,rlo_hi,rhi_lo; - - if ((d_sign = d & 0x80000000) != 0) - d = -d; - d_lo = d & 0xFFFF; - d_hi = d >> 16; - if ((s_sign = s & 0x80000000) != 0) - s = -s; - s_lo = s & 0xFFFF; - s_hi = s >> 16; - rlo_lo = d_lo * s_lo; - rlo_hi = (d_hi * s_lo + d_lo * s_hi) + (rlo_lo >> 16); - rhi_lo = d_hi * s_hi + (rlo_hi >> 16); - *res_lo = (rlo_hi << 16) | (rlo_lo & 0xFFFF); - *res_hi = rhi_lo; - if (d_sign != s_sign) { - d = ~*res_lo; - s = (((d & 0xFFFF) + 1) >> 16) + (d >> 16); - *res_lo = ~*res_lo+1; - *res_hi = ~*res_hi+(s >> 16); - } -#endif -} - -/**************************************************************************** -REMARKS: -Implements the IMUL instruction and side effects. -****************************************************************************/ -void imul_long(uint32_t s) -{ - imul_long_direct(&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s); - if (((M.x86.R_EAX & 0x80000000) == 0 && M.x86.R_EDX == 0x00000000) || - ((M.x86.R_EAX & 0x80000000) != 0 && M.x86.R_EDX == 0xFFFFFFFF)) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } -} - -/**************************************************************************** -REMARKS: -Implements the MUL instruction and side effects. -****************************************************************************/ -void mul_byte(uint8_t s) -{ - uint16_t res = (uint16_t)(M.x86.R_AL * s); - - M.x86.R_AX = res; - if (M.x86.R_AH == 0) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } -} - -/**************************************************************************** -REMARKS: -Implements the MUL instruction and side effects. -****************************************************************************/ -void mul_word(uint16_t s) -{ - uint32_t res = M.x86.R_AX * s; - - M.x86.R_AX = (uint16_t)res; - M.x86.R_DX = (uint16_t)(res >> 16); - if (M.x86.R_DX == 0) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } -} - -/**************************************************************************** -REMARKS: -Implements the MUL instruction and side effects. -****************************************************************************/ -void mul_long(uint32_t s) -{ -#ifdef __HAS_LONG_LONG__ - u64 res = (uint32_t)M.x86.R_EAX * (uint32_t)s; - - M.x86.R_EAX = (uint32_t)res; - M.x86.R_EDX = (uint32_t)(res >> 32); -#else - uint32_t a,a_lo,a_hi; - uint32_t s_lo,s_hi; - uint32_t rlo_lo,rlo_hi,rhi_lo; - - a = M.x86.R_EAX; - a_lo = a & 0xFFFF; - a_hi = a >> 16; - s_lo = s & 0xFFFF; - s_hi = s >> 16; - rlo_lo = a_lo * s_lo; - rlo_hi = (a_hi * s_lo + a_lo * s_hi) + (rlo_lo >> 16); - rhi_lo = a_hi * s_hi + (rlo_hi >> 16); - M.x86.R_EAX = (rlo_hi << 16) | (rlo_lo & 0xFFFF); - M.x86.R_EDX = rhi_lo; -#endif - if (M.x86.R_EDX == 0) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } -} - -/**************************************************************************** -REMARKS: -Implements the IDIV instruction and side effects. -****************************************************************************/ -void idiv_byte(uint8_t s) -{ - int32_t dvd, div, mod; - - dvd = (int16_t)M.x86.R_AX; - if (s == 0) { - x86emu_intr_raise(0); - return; - } - div = dvd / (int8_t)s; - mod = dvd % (int8_t)s; - if (abs(div) > 0x7f) { - x86emu_intr_raise(0); - return; - } - M.x86.R_AL = (int8_t) div; - M.x86.R_AH = (int8_t) mod; -} - -/**************************************************************************** -REMARKS: -Implements the IDIV instruction and side effects. -****************************************************************************/ -void idiv_word(uint16_t s) -{ - int32_t dvd, div, mod; - - dvd = (((int32_t)M.x86.R_DX) << 16) | M.x86.R_AX; - if (s == 0) { - x86emu_intr_raise(0); - return; - } - div = dvd / (int16_t)s; - mod = dvd % (int16_t)s; - if (abs(div) > 0x7fff) { - x86emu_intr_raise(0); - return; - } - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_SF); - CONDITIONAL_SET_FLAG(div == 0, F_ZF); - set_parity_flag(mod); - - M.x86.R_AX = (uint16_t)div; - M.x86.R_DX = (uint16_t)mod; -} - -/**************************************************************************** -REMARKS: -Implements the IDIV instruction and side effects. -****************************************************************************/ -void idiv_long(uint32_t s) -{ -#ifdef __HAS_LONG_LONG__ - s64 dvd, div, mod; - - dvd = (((s64)M.x86.R_EDX) << 32) | M.x86.R_EAX; - if (s == 0) { - x86emu_intr_raise(0); - return; - } - div = dvd / (int32_t)s; - mod = dvd % (int32_t)s; - if (abs(div) > 0x7fffffff) { - x86emu_intr_raise(0); - return; - } -#else - int32_t div = 0, mod; - int32_t h_dvd = M.x86.R_EDX; - uint32_t l_dvd = M.x86.R_EAX; - uint32_t abs_s = s & 0x7FFFFFFF; - uint32_t abs_h_dvd = h_dvd & 0x7FFFFFFF; - uint32_t h_s = abs_s >> 1; - uint32_t l_s = abs_s << 31; - int counter = 31; - int carry; - - if (s == 0) { - x86emu_intr_raise(0); - return; - } - do { - div <<= 1; - carry = (l_dvd >= l_s) ? 0 : 1; - - if (abs_h_dvd < (h_s + carry)) { - h_s >>= 1; - l_s = abs_s << (--counter); - continue; - } else { - abs_h_dvd -= (h_s + carry); - l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1) - : (l_dvd - l_s); - h_s >>= 1; - l_s = abs_s << (--counter); - div |= 1; - continue; - } - - } while (counter > -1); - /* overflow */ - if (abs_h_dvd || (l_dvd > abs_s)) { - x86emu_intr_raise(0); - return; - } - /* sign */ - div |= ((h_dvd & 0x10000000) ^ (s & 0x10000000)); - mod = l_dvd; - -#endif - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_ZF); - set_parity_flag(mod); - - M.x86.R_EAX = (uint32_t)div; - M.x86.R_EDX = (uint32_t)mod; -} - -/**************************************************************************** -REMARKS: -Implements the DIV instruction and side effects. -****************************************************************************/ -void div_byte(uint8_t s) -{ - uint32_t dvd, div, mod; - - dvd = M.x86.R_AX; - if (s == 0) { - x86emu_intr_raise(0); - return; - } - div = dvd / (uint8_t)s; - mod = dvd % (uint8_t)s; - if (abs(div) > 0xff) { - x86emu_intr_raise(0); - return; - } - M.x86.R_AL = (uint8_t)div; - M.x86.R_AH = (uint8_t)mod; -} - -/**************************************************************************** -REMARKS: -Implements the DIV instruction and side effects. -****************************************************************************/ -void div_word(uint16_t s) -{ - uint32_t dvd, div, mod; - - dvd = (((uint32_t)M.x86.R_DX) << 16) | M.x86.R_AX; - if (s == 0) { - x86emu_intr_raise(0); - return; - } - div = dvd / (uint16_t)s; - mod = dvd % (uint16_t)s; - if (abs(div) > 0xffff) { - x86emu_intr_raise(0); - return; - } - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_SF); - CONDITIONAL_SET_FLAG(div == 0, F_ZF); - set_parity_flag(mod); - - M.x86.R_AX = (uint16_t)div; - M.x86.R_DX = (uint16_t)mod; -} - -/**************************************************************************** -REMARKS: -Implements the DIV instruction and side effects. -****************************************************************************/ -void div_long(uint32_t s) -{ -#ifdef __HAS_LONG_LONG__ - u64 dvd, div, mod; - - dvd = (((u64)M.x86.R_EDX) << 32) | M.x86.R_EAX; - if (s == 0) { - x86emu_intr_raise(0); - return; - } - div = dvd / (uint32_t)s; - mod = dvd % (uint32_t)s; - if (abs(div) > 0xffffffff) { - x86emu_intr_raise(0); - return; - } -#else - int32_t div = 0, mod; - int32_t h_dvd = M.x86.R_EDX; - uint32_t l_dvd = M.x86.R_EAX; - - uint32_t h_s = s; - uint32_t l_s = 0; - int counter = 32; - int carry; - - if (s == 0) { - x86emu_intr_raise(0); - return; - } - do { - div <<= 1; - carry = (l_dvd >= l_s) ? 0 : 1; - - if (h_dvd < (h_s + carry)) { - h_s >>= 1; - l_s = s << (--counter); - continue; - } else { - h_dvd -= (h_s + carry); - l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1) - : (l_dvd - l_s); - h_s >>= 1; - l_s = s << (--counter); - div |= 1; - continue; - } - - } while (counter > -1); - /* overflow */ - if (h_dvd || (l_dvd > s)) { - x86emu_intr_raise(0); - return; - } - mod = l_dvd; -#endif - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_ZF); - set_parity_flag(mod); - - M.x86.R_EAX = (uint32_t)div; - M.x86.R_EDX = (uint32_t)mod; -} - -/**************************************************************************** -REMARKS: -Implements the IN string instruction and side effects. -****************************************************************************/ - -static void single_in(int size) -{ - if(size == 1) - store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inb)(M.x86.R_DX)); - else if (size == 2) - store_data_word_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inw)(M.x86.R_DX)); - else - store_data_long_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inl)(M.x86.R_DX)); -} - -void ins(int size) -{ - int inc = size; - - if (ACCESS_FLAG(F_DF)) { - inc = -size; - } - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* in until CX is ZERO. */ - uint32_t count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ? - M.x86.R_ECX : M.x86.R_CX); - - while (count--) { - single_in(size); - M.x86.R_DI += inc; - } - M.x86.R_CX = 0; - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ECX = 0; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } else { - single_in(size); - M.x86.R_DI += inc; - } -} - -/**************************************************************************** -REMARKS: -Implements the OUT string instruction and side effects. -****************************************************************************/ - -static void single_out(int size) -{ - if(size == 1) - (*sys_outb)(M.x86.R_DX,fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI)); - else if (size == 2) - (*sys_outw)(M.x86.R_DX,fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI)); - else - (*sys_outl)(M.x86.R_DX,fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI)); -} - -void outs(int size) -{ - int inc = size; - - if (ACCESS_FLAG(F_DF)) { - inc = -size; - } - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* out until CX is ZERO. */ - uint32_t count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ? - M.x86.R_ECX : M.x86.R_CX); - while (count--) { - single_out(size); - M.x86.R_SI += inc; - } - M.x86.R_CX = 0; - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ECX = 0; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } else { - single_out(size); - M.x86.R_SI += inc; - } -} - -/**************************************************************************** -PARAMETERS: -addr - Address to fetch word from - -REMARKS: -Fetches a word from emulator memory using an absolute address. -****************************************************************************/ -uint16_t mem_access_word(int addr) -{ -DB( if (CHECK_MEM_ACCESS()) - x86emu_check_mem_access(addr);) - return (*sys_rdw)(addr); -} - -/**************************************************************************** -REMARKS: -Pushes a word onto the stack. - -NOTE: Do not inline this, as (*sys_wrX) is already inline! -****************************************************************************/ -void push_word(uint16_t w) -{ -DB( if (CHECK_SP_ACCESS()) - x86emu_check_sp_access();) - M.x86.R_SP -= 2; - (*sys_wrw)(((uint32_t)M.x86.R_SS << 4) + M.x86.R_SP, w); -} - -/**************************************************************************** -REMARKS: -Pushes a long onto the stack. - -NOTE: Do not inline this, as (*sys_wrX) is already inline! -****************************************************************************/ -void push_long(uint32_t w) -{ -DB( if (CHECK_SP_ACCESS()) - x86emu_check_sp_access();) - M.x86.R_SP -= 4; - (*sys_wrl)(((uint32_t)M.x86.R_SS << 4) + M.x86.R_SP, w); -} - -/**************************************************************************** -REMARKS: -Pops a word from the stack. - -NOTE: Do not inline this, as (*sys_rdX) is already inline! -****************************************************************************/ -uint16_t pop_word(void) -{ - uint16_t res; - -DB( if (CHECK_SP_ACCESS()) - x86emu_check_sp_access();) - res = (*sys_rdw)(((uint32_t)M.x86.R_SS << 4) + M.x86.R_SP); - M.x86.R_SP += 2; - return res; -} - -/**************************************************************************** -REMARKS: -Pops a long from the stack. - -NOTE: Do not inline this, as (*sys_rdX) is already inline! -****************************************************************************/ -uint32_t pop_long(void) -{ - uint32_t res; - -DB( if (CHECK_SP_ACCESS()) - x86emu_check_sp_access();) - res = (*sys_rdl)(((uint32_t)M.x86.R_SS << 4) + M.x86.R_SP); - M.x86.R_SP += 4; - return res; -} - diff --git a/x86emu/x86sys.c b/x86emu/x86sys.c deleted file mode 100644 index 1984587..0000000 --- a/x86emu/x86sys.c +++ /dev/null @@ -1,470 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: This file includes subroutines which are related to -* programmed I/O and memory access. Included in this module -* are default functions with limited usefulness. For real -* uses these functions will most likely be overriden by the -* user library. -* -****************************************************************************/ -/* $XFree86: xc/extras/x86emu/src/x86emu/sys.c,v 1.5 2000/08/23 22:10:01 tsi Exp $ */ - -#include "radeonfb.h" -#include "pci.h" - -#include "x86emu.h" -#include "x86regs.h" -#include "x86debug.h" -#include "x86prim_ops.h" - -extern uint8_t inb(uint16_t port); -extern uint16_t inw(uint16_t port); -extern uint32_t inl(uint16_t port); -extern void outb(uint8_t val, uint16_t port); -extern void outw(uint16_t val, uint16_t port); -extern void outl(uint32_t val, uint16_t port); - -/*------------------------- Global Variables ------------------------------*/ - -X86EMU_sysEnv _X86EMU_env; /* Global emulator machine state */ -X86EMU_intrFuncs _X86EMU_intrTab[256]; -extern struct radeonfb_info *rinfo_biosemu; -extern uint32_t offset_mem; - -/*----------------------------- Implementation ----------------------------*/ - -/* - * PARAMETERS: - * addr - Emulator memory address to read - * - * RETURNS: - * Byte value read from emulator memory. - * - * REMARKS: - * Reads a byte value from the emulator memory. - */ -inline uint8_t X86API rdb(uint32_t addr) -{ - uint8_t val; - - if ((addr >= 0xA0000) && (addr <= 0xBFFFF)) - { - val = *(uint8_t *) (offset_mem + addr); - dbg("%s: rdb(%x) = %x\r\n", __FUNCTION__, addr, val); - } - else - { - DB(if (DEBUG_MEM_TRACE()) - { - dbg("%s: %p 1 -> %x\r\n", __FUNCTION__, addr, val); - } ) - } - return val; -} -/* - * PARAMETERS: - * addr - Emulator memory address to read - * - * RETURNS: - * Word value read from emulator memory. - * - * REMARKS: - * Reads a word value from the emulator memory. - */ -uint16_t X86API rdw(uint32_t addr) -{ - uint16_t val; - - if ((addr >= 0xA0000) && (addr <= 0xBFFFF)) - { - val = swpw(*(uint16_t *)(offset_mem+addr)); - dbg("%s: rdw(%x) = %x\r\n", __FUNCTION__, addr, val); - } - else - { - val = (uint16_t) (* (uint8_t *)(M.mem_base + addr)); - val |= (((uint16_t)( *(uint8_t *)(M.mem_base + addr + 1))) << 8); - } - DB(if (DEBUG_MEM_TRACE()) - { - dbg("%s: %p 2 -> %x\r\n", __FUNCTION__, addr, val); - } ) - return val; -} - -/* - * PARAMETERS: - * addr - Emulator memory address to read - * - * RETURNS: - * Long value read from emulator memory. - * REMARKS: - * Reads a long value from the emulator memory. - */ -inline uint32_t X86API rdl(uint32_t addr) -{ - uint32_t val; - - if ((addr >= 0xA0000) && (addr <= 0xBFFFF)) - { - val = swpl(*(uint32_t *)(offset_mem + addr)); - dbg("%s: rdl(%x) = %x\r\n", __FUNCTION__, addr, val); - } - else - { - val = swpl(*(uint32_t *)(M.mem_base + addr)); - } - DB(if (DEBUG_MEM_TRACE()) - { - - dbg("%s: %p 4 -> %x\r\n", __FUNCTION__, addr, val); - } ) - return val; -} - -/* - * PARAMETERS: - * addr - Emulator memory address to read - * val - Value to store - * - * REMARKS: - * Writes a byte value to emulator memory. - */ -inline void X86API wrb(uint32_t addr, uint8_t val) -{ - if ((addr >= 0xA0000) && (addr <= 0xBFFFF)) - { - *(uint8_t *)(offset_mem + addr) = val; - dbg("%s: wrb(%x) = %x\r\n", __FUNCTION__, addr, val); - } - else - { - if (addr >= M.mem_size) - { - DB( - { - dbg("%s: mem_ptr: %p out of range!\r\n", __FUNCTION__, addr); - }) - HALT_SYS(); - } - *(uint8_t *)(M.mem_base + addr) = val; - } - DB(if (DEBUG_MEM_TRACE()) - { - dbg("%s: %p 1 < %x\r\n", __FUNCTION__, addr, val); - } ) -} - -/* - * PARAMETERS: - * addr - Emulator memory address to read - * val - Value to store - * - * REMARKS: - * Writes a word value to emulator memory. - */ -inline void X86API wrw(uint32_t addr, uint16_t val) -{ - if ((addr >= 0xA0000) && (addr <= 0xBFFFF)) - { - dbg("%s: wrw(%x) = %x\r\n", __FUNCTION__, addr, val); - *(uint16_t *)(offset_mem+addr) = swpw(val); - } - else - { - if (addr > M.mem_size - 2) - { - DB( - { - dbg("%s: mem_ptr: %p out of range\r\n", __FUNCTION__, addr); - }) - HALT_SYS(); - } - *(uint8_t *)(M.mem_base + addr) = (uint8_t) val; - *(uint8_t *)(M.mem_base + addr + 1) = (uint8_t) (val >> 8); - } - DB(if (DEBUG_MEM_TRACE()) - { - dbg("%s: %p 2 <- %x\r\n", __FUNCTION__, addr, val); - } ) -} - -/* - * PARAMETERS: - * addr - Emulator memory address to read - * val - Value to store - * - * REMARKS: - * Writes a long value to emulator memory. - */ -inline void X86API wrl(uint32_t addr, uint32_t val) -{ - if ((addr >= 0xA0000) && (addr <= 0xBFFFF)) - { - dbg("%s: wrl(%x) = %x\r\n", __FUNCTION__, addr, val); - *(uint32_t *)(offset_mem+addr) = swpl(val); - } - else - { - if (addr > M.mem_size - 4) - { - DB( - { - dbg("%s: mem_ptr: address %x out of range!\r\n", __FUNCTION__, addr); - } - ) - HALT_SYS(); - } - *(uint32_t *)(M.mem_base + addr) = swpl(val); - } - DB(if (DEBUG_MEM_TRACE()) - { - dbg("%s: %p 4 <- %x\r\n", __FUNCTION__, addr, val); - } ) -} - -/* - * PARAMETERS: - * addr - PIO address to read - * RETURN: - * 0 - * REMARKS: - * Default PIO byte read function. Doesn't perform real inb. - */ -inline uint8_t X86API p_inb(X86EMU_pioAddr addr) -{ - DB(if (DEBUG_IO_TRACE()) - { - dbg("%s: inb(%p)\r\n", __FUNCTION__); - } ) - return inb(addr); -} - -/* - * PARAMETERS: - * addr - PIO address to read - * RETURN: - * 0 - * REMARKS: - * Default PIO word read function. Doesn't perform real inw. - */ -inline uint16_t X86API p_inw(X86EMU_pioAddr addr) -{ - DB(if (DEBUG_IO_TRACE()) - { - dbg("%s: inw(%p)\r\n", __FUNCTION__, addr); - } ) - return inw(addr); -} - -/* - * PARAMETERS: - * addr - PIO address to read - * RETURN: - * 0 - * REMARKS: - * Default PIO long read function. Doesn't perform real inl. - */ -inline uint32_t X86API p_inl(X86EMU_pioAddr addr) -{ - DB(if (DEBUG_IO_TRACE()) - { - dbg("%s: inl %p\r\n", __FUNCTION__, addr); - } ) - return inl(addr); -} - -/* - * PARAMETERS: - * addr - PIO address to write - * val - Value to store - * REMARKS: - * Default PIO byte write function. Doesn't perform real outb. - */ -inline void X86API p_outb(X86EMU_pioAddr addr, uint8_t val) -{ - DB(if (DEBUG_IO_TRACE()) - { - dbg("%s: outb %x -> %x\r\n", __FUNCTION__, val, addr); - } ) - outb(val, addr); - return; -} - -/* - * PARAMETERS: - * addr - PIO address to write - * val - Value to store - * REMARKS: - * Default PIO word write function. Doesn't perform real outw. - */ -inline void X86API p_outw(X86EMU_pioAddr addr, uint16_t val) -{ - DB(if (DEBUG_IO_TRACE()) - { - dbg("outw %x -> %x\r\n", __FUNCTION__, val, addr); - } ) - outw(val, addr); - return; -} - -/* - * PARAMETERS: - * addr - PIO address to write - * val - Value to store - * REMARKS: - * Default PIO ;ong write function. Doesn't perform real outl. - */ -inline void X86API p_outl(X86EMU_pioAddr addr, uint32_t val) -{ - DB(if (DEBUG_IO_TRACE()) - { - dbg("%s: outl %x -> %x\r\n", __FUNCTION__, val, addr); - } ) - outl(val, addr); - return; -} - -/*------------------------- Global Variables ------------------------------*/ - -uint8_t(X86APIP sys_rdb) (uint32_t addr) = rdb; -uint16_t(X86APIP sys_rdw) (uint32_t addr) = rdw; -uint32_t(X86APIP sys_rdl) (uint32_t addr) = rdl; -void (X86APIP sys_wrb) (uint32_t addr, uint8_t val) = wrb; -void (X86APIP sys_wrw) (uint32_t addr, uint16_t val) = wrw; -void (X86APIP sys_wrl) (uint32_t addr, uint32_t val) = wrl; -uint8_t(X86APIP sys_inb) (X86EMU_pioAddr addr) = p_inb; -uint16_t(X86APIP sys_inw) (X86EMU_pioAddr addr) = p_inw; -uint32_t(X86APIP sys_inl) (X86EMU_pioAddr addr) = p_inl; -void (X86APIP sys_outb) (X86EMU_pioAddr addr, uint8_t val) = p_outb; -void (X86APIP sys_outw) (X86EMU_pioAddr addr, uint16_t val) = p_outw; -void (X86APIP sys_outl) (X86EMU_pioAddr addr, uint32_t val) = p_outl; - -/*----------------------------- Setup -------------------------------------*/ - -#if 0 // cannot works whith data in flash -/**************************************************************************** -PARAMETERS: -funcs - New memory function pointers to make active - -REMARKS: -This function is used to set the pointers to functions which access -memory space, allowing the user application to override these functions -and hook them out as necessary for their application. -****************************************************************************/ -void X86EMU_setupMemFuncs(X86EMU_memFuncs * funcs) -{ - sys_rdb = funcs->rdb; - sys_rdw = funcs->rdw; - sys_rdl = funcs->rdl; - sys_wrb = funcs->wrb; - sys_wrw = funcs->wrw; - sys_wrl = funcs->wrl; -} - -/**************************************************************************** -PARAMETERS: -funcs - New programmed I/O function pointers to make active - -REMARKS: -This function is used to set the pointers to functions which access -I/O space, allowing the user application to override these functions -and hook them out as necessary for their application. -****************************************************************************/ -void X86EMU_setupPioFuncs(X86EMU_pioFuncs * funcs) -{ - sys_inb = funcs->inb; - sys_inw = funcs->inw; - sys_inl = funcs->inl; - sys_outb = funcs->outb; - sys_outw = funcs->outw; - sys_outl = funcs->outl; -} -#endif - -/**************************************************************************** -PARAMETERS: -funcs - New interrupt vector table to make active - -REMARKS: -This function is used to set the pointers to functions which handle -interrupt processing in the emulator, allowing the user application to -hook interrupts as necessary for their application. Any interrupts that -are not hooked by the user application, and reflected and handled internally -in the emulator via the interrupt vector table. This allows the application -to get control when the code being emulated executes specific software -interrupts. -****************************************************************************/ -void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]) -{ - int i; - - for (i = 0; i < 256; i++) - _X86EMU_intrTab[i] = NULL; - if (funcs) { - for (i = 0; i < 256; i++) - _X86EMU_intrTab[i] = funcs[i]; - } -} - -/**************************************************************************** -PARAMETERS: -int - New software interrupt to prepare for - -REMARKS: -This function is used to set up the emulator state to exceute a software -interrupt. This can be used by the user application code to allow an -interrupt to be hooked, examined and then reflected back to the emulator -so that the code in the emulator will continue processing the software -interrupt as per normal. This essentially allows system code to actively -hook and handle certain software interrupts as necessary. -****************************************************************************/ -void X86EMU_prepareForInt(int num) -{ - push_word((uint16_t) M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(num * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(num * 4); - M.x86.intr = 0; -} - -void X86EMU_setMemBase(void *base, unsigned long size) -{ - M.mem_base = (int) base; - M.mem_size = size; -} diff --git a/xhdi/xhdi_interface.c b/xhdi/xhdi_interface.c deleted file mode 100644 index 3b41f8e..0000000 --- a/xhdi/xhdi_interface.c +++ /dev/null @@ -1,314 +0,0 @@ -/* - * xhdi_sd.c - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 01.05.2013 - * Copyright 2012: M. Fröschle - */ - -#include -#include - -#include "xhdi_sd.h" -#include "bas_printf.h" - - -uint32_t xhdi_call(uint16_t *stack) -{ - uint16_t opcode = *stack; - - switch (opcode) - { - case XHDI_VERSION: - return xhdi_version(); - break; - - case XHDI_INQUIRE_TARGET: - { - struct XHINQTARGET_args - { - uint16_t opcode; - uint16_t major; - uint16_t minor; - uint32_t *blocksize; - uint32_t *deviceflags; - char *productname; - } *args = (struct XHINQTARGET_args *) stack; - - return xhdi_inquire_target(args->major, args->minor, args->blocksize, - args->deviceflags, args->productname); - } - break; - - case XHDI_RESERVE: - { - struct XHRESERVE_args - { - uint16_t opcode; - uint16_t major; - uint16_t minor; - uint16_t do_reserve; - uint16_t key; - } *args = (struct XHRESERVE_args *) stack; - - return xhdi_reserve(args->major, args->minor, args->do_reserve, args->key); - } - - case XHDI_LOCK: - { - struct XHLOCK_args - { - uint16_t opcode; - uint16_t major; - uint16_t minor; - uint16_t do_lock; - uint16_t key; - } *args = (struct XHLOCK_args *) stack; - - return xhdi_lock(args->major, args->minor, args->do_lock, args->key); - } - - case XHDI_STOP: - { - struct XHSTOP_args - { - uint16_t opcode; - uint16_t major; - uint16_t minor; - uint16_t do_stop; - uint16_t key; - } *args = (struct XHSTOP_args *) stack; - - return xhdi_stop(args->major, args->minor, args->do_stop, args->key); - } - - case XHDI_EJECT: - { - struct XHEJECT_args - { - uint16_t opcode; - uint16_t major; - uint16_t minor; - uint16_t do_eject; - uint16_t key; - } *args = (struct XHEJECT_args *) stack; - - return xhdi_eject(args->major, args->minor, args->do_eject, args->key); - } - - case XHDI_DRIVEMAP: - { - return xhdi_drivemap(); - } - - case XHDI_INQUIRE_DEVICE: - { - struct XHINQDEV_args - { - uint16_t opcode; - uint16_t drv; - uint16_t *major; - uint16_t *minor; - uint32_t *start; - BPB *bpb; - } *args = (struct XHINQDEV_args *) stack; - - return xhdi_inquire_device(args->drv, args->major, args->minor, args->start, - args->bpb); - } - - case XHDI_INQUIRE_DRIVER: - { - struct XHINQDRIVER_args - { - uint16_t opcode; - uint16_t dev; - char *name; - char *version; - char *company; - uint16_t *ahdi_version; - uint16_t *maxIPL; - } *args = (struct XHINQDRIVER_args *) stack; - - return xhdi_inquire_driver(args->dev, args->name, args->version, args->company, - args->ahdi_version, args->maxIPL); - } - - case XHDI_NEW_COOKIE: - { - struct XHNEWCOOKIE_args - { - uint16_t opcode; - uint32_t newcookie; - } *args = (struct XHNEWCOOKIE_args *) stack; - - return xhdi_new_cookie(args->newcookie); - } - - case XHDI_READ_WRITE: - { - struct XHREADWRITE_args - { - uint16_t opcode; - uint16_t major; - uint16_t minor; - uint16_t rw; - uint32_t sector; - uint16_t count; - void *buf; - } *args = (struct XHREADWRITE_args *) stack; - - return xhdi_read_write(args->major, args->minor, - args->rw, args->sector, - args->count, args->buf); - } - - case XHDI_INQUIRE_TARGET2: - { - struct XHINQTARGET2_args - { - uint16_t opcode; - uint16_t major; - uint16_t minor; - uint32_t *blocksize; - uint32_t *deviceflags; - char *productname; - uint16_t stringlen; - } *args = (struct XHINQTARGET2_args *) stack; - - return xhdi_inquire_target2(args->major, args->minor, args->blocksize, - args->deviceflags, args->productname, args->stringlen); - } - - case XHDI_INQUIRE_DEVICE2: - { - struct XHINQDEV2_args - { - uint16_t opcode; - uint16_t drv; - uint16_t *major; - uint16_t *minor; - uint32_t *start; - BPB *bpb; - uint32_t *blocks; - char *partid; - } *args = (struct XHINQDEV2_args *) stack; - - return xhdi_inquire_device2(args->drv, args->major, args->minor, args->start, - args->bpb, args->blocks, args->partid); - } - - case XHDI_DRIVER_SPECIAL: - { - struct XHDRIVERSPECIAL_args - { - uint16_t opcode; - uint32_t key1; - uint32_t key2; - uint16_t subopcode; - void *data; - } *args = (struct XHDRIVERSPECIAL_args *) stack; - - return xhdi_driver_special(args->key1, args->key2, args->subopcode, - args->data); - } - - case XHDI_GET_CAPACITY: - { - struct XHGETCAPACITY_args - { - uint16_t opcode; - uint16_t major; - uint16_t minor; - uint32_t *blocks; - uint32_t *blocksize; - } *args = (struct XHGETCAPACITY_args *) stack; - - return xhdi_get_capacity(args->major, args->minor, args->blocks, - args->blocksize); - } - - case XHDI_MEDIUM_CHANGED: - { - struct XHMEDIUMCHANGED_args - { - uint16_t opcode; - uint16_t major; - uint16_t minor; - } *args = (struct XHMEDIUMCHANGED_args *) stack; - - return xhdi_medium_changed(args->major, args->minor); - } - - case XHDI_MINT_INFO: - { - struct XHMINTINFO_args - { - uint16_t opcode; - uint16_t subopcode; - void *data; - } *args = (struct XHMINTINFO_args *) stack; - - return xhdi_mint_info(args->subopcode, args->data); - } - - case XHDI_DOS_LIMITS: - { - struct XHDOSLIMITS_args - { - uint16_t opcode; - uint16_t which; - uint32_t limit; - } *args = (struct XHDOSLIMITS_args *) stack; - - return xhdi_dos_limits(args->which, args->limit); - } - - case XHDI_LAST_ACCESS: - { - struct XHLASTACCESS_args - { - uint16_t opcode; - uint16_t major; - uint16_t minor; - uint32_t *ms; - } *args = (struct XHLASTACCESS_args *) stack; - - return xhdi_last_access(args->major, args->minor, args->ms); - } - - case XHDI_REACCESS: - { - struct XHREACCESS_args - { - uint16_t opcode; - uint16_t major; - uint16_t minor; - } *args = (struct XHREACCESS_args *) stack; - - return xhdi_reaccess(args->major, args->minor); - } - - default: - { - xprintf("unknown XHDI function 0x%x\r\n", opcode); - return EINVFN; - break; - } - } -} - diff --git a/xhdi/xhdi_sd.c b/xhdi/xhdi_sd.c deleted file mode 100644 index a16567f..0000000 --- a/xhdi/xhdi_sd.c +++ /dev/null @@ -1,242 +0,0 @@ -/* - * xhdi_sd.c - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 01.05.2013 - * Copyright 2012 M. Fröschle - */ - -#include -#include - -#include "xhdi_sd.h" -#include "bas_printf.h" -#include "bas_string.h" -#include "diskio.h" - -#define DRIVER_VERSION 0x130 - -#define MY_MAJOR 7 -#define MY_MINOR 0 - -uint16_t xhdi_version(void) -{ - return DRIVER_VERSION; -} - -uint32_t xhdi_inquire_target(uint16_t major, uint16_t minor, uint32_t *block_size, uint32_t *flags, - char *product_name) -{ - return xhdi_inquire_target2(major, minor, block_size, flags, product_name, 33); -} - -uint32_t xhdi_reserve(uint16_t major, uint16_t minor, uint16_t do_reserve, uint16_t key) -{ - if (major == MY_MAJOR) - return ERROR; /* device cannot be reserved */ - - return EUNDEV; -} - -uint32_t xhdi_lock(uint16_t major, uint16_t minor, uint16_t do_lock, uint16_t key) -{ - if (major == MY_MAJOR) - return ERROR; /* device cannot be locked */ - - return EUNDEV; -} - -uint32_t xhdi_stop(uint16_t major, uint16_t minor, uint16_t do_stop, uint16_t key) -{ - if (major == MY_MAJOR) - return ERROR; /* device cannot be locked */ - - return EUNDEV; -} - -uint32_t xhdi_eject(uint16_t major, uint16_t minor, uint16_t do_eject, uint16_t key) -{ - if (major == MY_MAJOR) - return ERROR; /* device cannot be ejected */ - - return EUNDEV; -} - -uint32_t xhdi_drivemap(void) -{ - long map = (1 << ('S' - 'A')); - - return map; -} - -uint32_t xhdi_inquire_device(uint16_t bios_device, uint16_t *major, uint16_t *minor, - uint32_t *start_sector, /* BPB */ void *bpb) -{ - if (major != NULL) *major = MY_MAJOR; - if (minor != NULL) *minor = MY_MINOR; - if (start_sector != NULL) *start_sector = 0; - - return E_OK; -} - -uint32_t xhdi_inquire_driver(uint16_t bios_device, char *name, char *version, - char *company, uint16_t *ahdi_version, uint16_t *maxIPL) -{ - if (bios_device == 'S' - 'A') - { - if (name != NULL) strcpy(name, "BaS SD-card driver"); - if (version != NULL) strcpy(version, "0.1"); - if (company != NULL) strcpy(company, "Markus Fröschle"); - if (ahdi_version != NULL) *ahdi_version = 300; - if (maxIPL != NULL) *maxIPL = 7; - - return E_OK; - } - return EUNDEV; -} - -uint32_t xhdi_new_cookie(uint32_t newcookie) -{ - return EUNDEV; -} - -uint32_t xhdi_read_write(uint16_t major, uint16_t minor, uint16_t rwflag, - uint32_t recno, uint16_t count, void *buf) -{ - int ret; - uint16_t num_sectors; - int16_t s_count = count; - uint16_t retries; - const uint16_t max_retries = 3; - - if (major == MY_MAJOR) - { - do { - num_sectors = ((s_count > 63) ? 63 : s_count); - - retries = 0; - do { - ret = ((rwflag & 1) ? disk_write(0, buf, recno, num_sectors) : disk_read(0, buf, recno, num_sectors)); - if (ret != RES_OK) - { - disk_reset(0); - retries++; - if (retries < max_retries) continue; - - xprintf("SD card %s error at sector %lx: %d\r\n", (rwflag & 1) ? "write" : "read", recno, ret); - return ERROR; - } - } while (retries < max_retries && ret != RES_OK); - - buf += num_sectors * 512; - recno += num_sectors; - s_count -= num_sectors; - } while (s_count > 0); - - return E_OK; - } - return EUNDEV; -} - -uint32_t xhdi_inquire_target2(uint16_t major, uint16_t minor, uint32_t *block_size, - uint32_t *device_flags, char *product_name, uint16_t stringlen) -{ - if (major == MY_MAJOR) - { - if (block_size != NULL) *block_size = 512; - if (device_flags != NULL) *device_flags = XH_TARGET_REMOVABLE; - if (product_name != NULL) strncpy(product_name, "BaS SD driver", stringlen); - - return E_OK; - - } - return EUNDEV; -} - -uint32_t xhdi_inquire_device2(uint16_t bios_device, uint16_t *major, uint16_t *minor, - uint32_t *start_sector, BPB *bpb, uint32_t *blocks, char *partid) -{ - - if (bios_device == 'S' - 'A') - { - return E_OK; - } - return EUNDEV; -} - -uint32_t xhdi_driver_special(uint32_t key1, uint32_t key2, uint16_t subopcode, void *data) -{ - return EUNDEV; -} - -uint32_t xhdi_get_capacity(uint16_t major, uint16_t minor, uint32_t *blocks, uint32_t *bs) -{ - if (major == MY_MAJOR) - { - if (blocks != 0) - { - if (disk_ioctl(0, GET_SECTOR_COUNT, blocks) != RES_OK) - { - xprintf("disk_ioctl(0, GET_SECTOR_COUNT, %p) failed at %s:%d\r\n", blocks, __FILE__, __LINE__); - - return ERROR; - } - //xprintf("%s:%d: determined sector count to %ld\r\n", __FILE__, __LINE__, *blocks); - } - - if (bs != 0) - { - if (disk_ioctl(0, GET_SECTOR_SIZE, bs) != RES_OK) - { - xprintf("disk_ioctl(0, GET_SECTOR_SIZE, %p) failed at %s:%dr\n", bs, __FILE__, __LINE__); - - return ERROR; - } - //xprintf("%s:%d: determined sector size to %ld\r\n", __FILE__, __LINE__, *bs); - } - return E_OK; - } - return EUNDEV; -} - -uint32_t xhdi_medium_changed(uint16_t major, uint16_t minor) -{ - if (major == MY_MAJOR) - return 1; /* may have changed */ - - return EUNDEV; -} - -uint32_t xhdi_mint_info(uint16_t opcode, void *data) -{ - return EUNDEV; -} - -uint32_t xhdi_dos_limits(uint16_t which, uint32_t limit) -{ - return EUNDEV; -} - -uint32_t xhdi_last_access(uint16_t major, uint16_t minor, uint32_t *ms) -{ - return EUNDEV; -} - -uint32_t xhdi_reaccess(uint16_t major, uint16_t minor) -{ - return EUNDEV; -} diff --git a/xhdi/xhdi_vec.S b/xhdi/xhdi_vec.S deleted file mode 100644 index 1ef7a88..0000000 --- a/xhdi/xhdi_vec.S +++ /dev/null @@ -1,65 +0,0 @@ -/* - * xhdi_vec.S - * - * XHDI entry point for EmuTOS into BaS' SD-card driver - * - * This file is part of BaS_gcc. - * - * BaS_gcc is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * BaS_gcc is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with BaS_gcc. If not, see . - * - * Created on: 26.02.2013 - * Author: Markus Fröschle - */// -// XHDI entry point -// - .extern _xhdi_call - - .globl _xhdi_vec - .globl _xhdi_sd_install - -// -// this is where the XHDI cookie points to: -// - - .text - dc.b 'B','A','S','_' -_xhdi_vec: - lea -12(sp),sp // save all used registers according to XHDI spec - movem.l d1/a0-a1,(sp) - - pea 16(sp) // forward address of parameters on stack - jsr _xhdi_call // to internal routine - addq.l #4,sp // correct stack - - movem.l (sp),d1/a0-a1 // restore registers - lea 12(sp),sp - rts - - .bss -_old_vector: - .ds.l 1 - - .text - -// -// trap #0 handler to bring the address of the disk routines into TOS -// -_xhdi_sd_install: - move.l 4(sp),d0 // address of the old XHDI vector - move.l d0,_old_vector // save it - just in case we need it later - move.l #_xhdi_vec,d0 // return our BaS vector to TOS - move.l d0,a0 // - rte - -// vim: set syntax=asm68k :