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cleaned up. X86emu does not work with debug trace on currently.

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This commit is contained in:
Markus Fröschle
2014-01-03 21:03:35 +00:00
parent 85fc19e998
commit e5c9d63059
28 changed files with 1254 additions and 1227 deletions
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24
Makefile
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@@ -9,7 +9,7 @@
# can be either "Y" or "N" (without quotes). "Y" for using the m68k-elf-, "N" for using the m68k-atari-mint # can be either "Y" or "N" (without quotes). "Y" for using the m68k-elf-, "N" for using the m68k-atari-mint
# toolchain # toolchain
COMPILE_ELF=N COMPILE_ELF=Y
ifeq (Y,$(COMPILE_ELF)) ifeq (Y,$(COMPILE_ELF))
TCPREFIX=m68k-elf- TCPREFIX=m68k-elf-
@@ -33,6 +33,15 @@ INCLUDE=-Iinclude
CFLAGS=-mcpu=5474 \ CFLAGS=-mcpu=5474 \
-Wall \ -Wall \
-Os \ -Os \
-g \
-fomit-frame-pointer \
-ffreestanding \
-fleading-underscore \
-Wa,--register-prefix-optional
CFLAGS_OPTIMIZED = -mcpu=5474 \
-Wall \
-O2 \
-g \
-fomit-frame-pointer \ -fomit-frame-pointer \
-ffreestanding \ -ffreestanding \
-fleading-underscore \ -fleading-underscore \
@@ -94,6 +103,7 @@ CSRCS= \
queue.c \ queue.c \
net_timer.c \ net_timer.c \
am79c874.c \ am79c874.c \
bcm5222.c \
nif.c \ nif.c \
fecbd.c \ fecbd.c \
fec.c \ fec.c \
@@ -177,6 +187,18 @@ ifeq (firebee,$(1))
else else
MACHINE=MACHINE_M5484LITE MACHINE=MACHINE_M5484LITE
endif endif
# always optimize x86 emulator objects
$(1)/objs/x86decode.o: CFLAGS=$(CFLAGS_OPTIMIZED)
$(1)/objs/x86sys.o: CFLAGS=$(CFLAGS_OPTIMIZED)
$(1)/objs/x86debug.o: CFLAGS=$(CFLAGS_OPTIMIZED)
$(1)/objs/x86prim_ops.o:CFLAGS=$(CFLAGS_OPTIMIZED)
$(1)/objs/x86ops.o: CFLAGS=$(CFLAGS_OPTIMIZED)
$(1)/objs/x86ops2.o: CFLAGS=$(CFLAGS_OPTIMIZED)
$(1)/objs/x86fpu.o: CFLAGS=$(CFLAGS_OPTIMIZED)
$(1)/objs/x86biosemu.o: CFLAGS=$(CFLAGS_OPTIMIZED)
$(1)/objs/x86pcibios.o: CFLAGS=$(CFLAGS_OPTIMIZED)
$(1)/objs/%.o:%.c $(1)/objs/%.o:%.c
$(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@ $(CC) $$(CFLAGS) -D$$(MACHINE) $(INCLUDE) -c $$< -o $$@

1
bas.lk.in
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@@ -60,6 +60,7 @@ SECTIONS
OBJDIR/fecbd.o(.text) OBJDIR/fecbd.o(.text)
OBJDIR/fec.o(.text) OBJDIR/fec.o(.text)
OBJDIR/am79c874.o(.text) OBJDIR/am79c874.o(.text)
OBJDIR/bcm5222.o(.text)
OBJDIR/ip.o(.text) OBJDIR/ip.o(.text)
OBJDIR/udp.o(text) OBJDIR/udp.o(text)
OBJDIR/bootp.o(text) OBJDIR/bootp.o(text)

20
dma/dma.c
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@@ -51,7 +51,17 @@ struct dma_channel
void (*handler)(void); void (*handler)(void);
}; };
static char used_reqs[32]; static char used_reqs[32] =
{
DMA_ALWAYS, DMA_DSPI_RXFIFO, DMA_DSPI_TXFIFO, DMA_DREQ0,
DMA_PSC0_RX, DMA_PSC0_TX, DMA_USB_EP0, DMA_USB_EP1,
DMA_USB_EP2, DMA_USB_EP3, DMA_PCI_TX, DMA_PCI_RX,
DMA_PSC1_RX, DMA_PSC1_TX, DMA_I2C_RX, DMA_I2C_TX,
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0,
0, 0, 0, 0
};
static struct dma_channel dma_channel[NCHANNELS] = static struct dma_channel dma_channel[NCHANNELS] =
{ {
@@ -337,6 +347,7 @@ int dma_set_initiator(int initiator)
else /* No empty slots */ else /* No empty slots */
return 1; return 1;
break; break;
case DMA_PSC2_RX: case DMA_PSC2_RX:
if (used_reqs[28] == 0) if (used_reqs[28] == 0)
{ {
@@ -543,8 +554,6 @@ int dma_interrupt_handler(void *arg1, void *arg2)
{ {
uint32_t i, interrupts; uint32_t i, interrupts;
dbg("%s: arg1 = %p, arg2 = %p\r\n", __FUNCTION__, arg1, arg2);
(void) set_ipl(7); (void) set_ipl(7);
/* /*
@@ -555,7 +564,10 @@ int dma_interrupt_handler(void *arg1, void *arg2)
/* Make sure we are here for a reason */ /* Make sure we are here for a reason */
if (interrupts == 0) if (interrupts == 0)
{
dbg("%s: not DMA interrupt! Spurious?\r\n", __FUNCTION__);
return 0; return 0;
}
/* Clear the interrupt in the pending register */ /* Clear the interrupt in the pending register */
MCF_DMA_DIPR = interrupts; MCF_DMA_DIPR = interrupts;
@@ -567,7 +579,7 @@ int dma_interrupt_handler(void *arg1, void *arg2)
/* If there is a handler, call it */ /* If there is a handler, call it */
if (dma_channel[i].handler != NULL) if (dma_channel[i].handler != NULL)
{ {
dbg("%s: call handler for interrupt %d (%p)\r\n", __FUNCTION__, i, dma_channel[i].handler); dbg("%s: call handler for DMA channel %d (%p)\r\n", __FUNCTION__, i, dma_channel[i].handler);
dma_channel[i].handler(); dma_channel[i].handler();
} }
} }

2
include/fec.h
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@@ -69,7 +69,7 @@ extern void fec_duplex (uint8_t, uint8_t);
extern uint8_t fec_hash_address(const uint8_t *); extern uint8_t fec_hash_address(const uint8_t *);
extern void fec_set_address (uint8_t ch, const uint8_t *); extern void fec_set_address (uint8_t ch, const uint8_t *);
extern void fec_reset (uint8_t); extern void fec_reset (uint8_t);
extern void fec_init (uint8_t, uint8_t, const uint8_t *); extern void fec_init(uint8_t ch, uint8_t mode, const uint8_t *pa);
extern void fec_rx_start(uint8_t, int8_t *); extern void fec_rx_start(uint8_t, int8_t *);
extern void fec_rx_restart(uint8_t); extern void fec_rx_restart(uint8_t);
extern void fec_rx_stop (uint8_t); extern void fec_rx_stop (uint8_t);

2
include/firebee.h
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@@ -43,7 +43,7 @@
#endif /* COMPILE_RAM */ #endif /* COMPILE_RAM */
#define DRIVER_MEM_BUFFER_SIZE 0x80000 #define DRIVER_MEM_BUFFER_SIZE 0x100000
#define EMUTOS_BASE_ADDRESS 0xe0600000 #define EMUTOS_BASE_ADDRESS 0xe0600000

2
include/m5484l.h
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@@ -42,7 +42,7 @@
#define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS #define TARGET_ADDRESS BOOTFLASH_BASE_ADDRESS
#endif /* COMPILE_RAM */ #endif /* COMPILE_RAM */
#define DRIVER_MEM_BUFFER_SIZE 0x80000 #define DRIVER_MEM_BUFFER_SIZE 0x100000
#define EMUTOS_BASE_ADDRESS 0xe0100000 #define EMUTOS_BASE_ADDRESS 0xe0100000

6
include/net.h
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@@ -8,7 +8,6 @@
#ifndef _NET_H #ifndef _NET_H
#define _NET_H #define _NET_H
/********************************************************************/
/* /*
* Include information and prototypes for all protocols * Include information and prototypes for all protocols
@@ -22,11 +21,12 @@
#include "udp.h" #include "udp.h"
#include "tftp.h" #include "tftp.h"
/********************************************************************/ #define TIMER_NETWORK 3 /* use GPT3 for network timers */
#define TMR_INTC_LVL 3 /* interrupt level for network timer */
#define TMR_INTC_PRI 0 /* interrupt priority for network timer */
extern int net_init(void); extern int net_init(void);
/********************************************************************/
#endif /* _NET_H */ #endif /* _NET_H */

16
include/x86debug.h
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@@ -65,7 +65,7 @@
#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */ #define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset*/ #define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset*/
#ifdef DEBUG #ifdef DBG_X86EMU
# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F) # define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F) # define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F) # define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
@@ -77,7 +77,7 @@
# define CHECK_DATA_ACCESS() # define CHECK_DATA_ACCESS()
#endif #endif
#ifdef DEBUG #ifdef DBG_X86EMU
# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F) # define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F) # define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F) # define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
@@ -116,7 +116,7 @@
# define DEBUG_DECODE_NOPRINT() 0 # define DEBUG_DECODE_NOPRINT() 0
#endif #endif
#ifdef DEBUG #ifdef DBG_X86EMU
# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \ # define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
x86emu_decode_printf(x) x86emu_decode_printf(x)
@@ -146,7 +146,7 @@
# define SAVE_IP_CS(x,y) # define SAVE_IP_CS(x,y)
#endif #endif
#ifdef DEBUG #ifdef DBG_X86EMU
#define TRACE_REGS() \ #define TRACE_REGS() \
if (DEBUG_DISASSEMBLE()) { \ if (DEBUG_DISASSEMBLE()) { \
x86emu_just_disassemble(); \ x86emu_just_disassemble(); \
@@ -157,7 +157,7 @@
# define TRACE_REGS() # define TRACE_REGS()
#endif #endif
#ifdef DEBUG #ifdef DBG_X86EMU
# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step() # define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
#else #else
# define SINGLE_STEP() # define SINGLE_STEP()
@@ -167,7 +167,7 @@
TRACE_REGS(); \ TRACE_REGS(); \
SINGLE_STEP() SINGLE_STEP()
#ifdef DEBUG #ifdef DBG_X86EMU
# define START_OF_INSTR() # define START_OF_INSTR()
# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr(); # define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
# define END_OF_INSTR_NO_TRACE() x86emu_end_instr(); # define END_OF_INSTR_NO_TRACE() x86emu_end_instr();
@@ -177,7 +177,7 @@
# define END_OF_INSTR_NO_TRACE() # define END_OF_INSTR_NO_TRACE()
#endif #endif
#ifdef DEBUG #ifdef DBG_X86EMU
# define CALL_TRACE(u,v,w,x,s) \ # define CALL_TRACE(u,v,w,x,s) \
if (DEBUG_TRACECALLREGS()) \ if (DEBUG_TRACECALLREGS()) \
x86emu_dump_regs(); \ x86emu_dump_regs(); \
@@ -203,7 +203,7 @@
# define RETURN_TRACE(n,u,v) # define RETURN_TRACE(n,u,v)
#endif #endif
#ifdef DEBUG #ifdef DBG_X86EMU
#define DB(x) x #define DB(x) x
#else #else
#define DB(x) #define DB(x)

1
include/x86regs.h
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@@ -39,6 +39,7 @@
#ifndef __X86EMU_REGS_H #ifndef __X86EMU_REGS_H
#define __X86EMU_REGS_H #define __X86EMU_REGS_H
#include "x86debug.h"
/*---------------------- Macros and type definitions ----------------------*/ /*---------------------- Macros and type definitions ----------------------*/

2
net/am79c874.c
View File

@@ -49,7 +49,7 @@ int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duple
if (duplex); /* to do */ if (duplex); /* to do */
/* Initialize the MII interface */ /* Initialize the MII interface */
fec_mii_init(fec_ch, SYSCLK); fec_mii_init(fec_ch, SYSCLK / 1000);
dbg("%s: PHY reset\r\n", __FUNCTION__); dbg("%s: PHY reset\r\n", __FUNCTION__);
/* Reset the PHY */ /* Reset the PHY */

27
net/arp.c
View File

@@ -6,9 +6,18 @@
*/ */
#include "net.h" #include "net.h"
#include "net_timer.h"
#include "bas_printf.h"
#include <stdbool.h> #include <stdbool.h>
#include <stddef.h> #include <stddef.h>
#define DBG_ARP
#ifdef DBG_ARP
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_ARP */
#define TIMER_NETWORK 3 #define TIMER_NETWORK 3
static uint8_t *arp_find_pair(ARP_INFO *arptab, uint16_t protocol, uint8_t *hwa, uint8_t *pa) static uint8_t *arp_find_pair(ARP_INFO *arptab, uint16_t protocol, uint8_t *hwa, uint8_t *pa)
@@ -219,12 +228,12 @@ void arp_request(NIF *nif, uint8_t *pa)
int i, result; int i, result;
xprintf("%s\r\n", __FUNCTION__); dbg("%s\r\n", __FUNCTION__);
pNbuf = nbuf_alloc(); pNbuf = nbuf_alloc();
if (pNbuf == NULL) if (pNbuf == NULL)
{ {
xprintf("ARP: arp_request couldn't allocate Tx buffer\n"); dbg("%s: arp_request couldn't allocate Tx buffer\n", __FUNCTION__);
return; return;
} }
@@ -254,6 +263,7 @@ void arp_request(NIF *nif, uint8_t *pa)
pNbuf->length = ARP_HDR_LEN; pNbuf->length = ARP_HDR_LEN;
/* Send the ARP request */ /* Send the ARP request */
dbg("%s: sending ARP request\r\n", __FUNCTION__);
result = nif->send(nif, nif->broadcast, nif->hwa, ETH_FRM_ARP, pNbuf); result = nif->send(nif, nif->broadcast, nif->hwa, ETH_FRM_ARP, pNbuf);
if (result == 0) if (result == 0)
@@ -290,7 +300,7 @@ uint8_t *arp_resolve(NIF *nif, uint16_t protocol, uint8_t *pa)
* Check to see if the necessary MAC-to-IP translation information * Check to see if the necessary MAC-to-IP translation information
* is in table already * is in table already
*/ */
if (arp_resolve_pa (nif, protocol, pa, &hwa)) if (arp_resolve_pa(nif, protocol, pa, &hwa))
return hwa; return hwa;
/* /*
@@ -300,13 +310,20 @@ uint8_t *arp_resolve(NIF *nif, uint16_t protocol, uint8_t *pa)
*/ */
for (i = 0; i < 3; i++) for (i = 0; i < 3; i++)
{ {
arp_request (nif, pa); arp_request(nif, pa);
timer_set_secs(TIMER_NETWORK, ARP_TIMEOUT); timer_set_secs(TIMER_NETWORK, ARP_TIMEOUT);
while (timer_get_reference(TIMER_NETWORK)) while (timer_get_reference(TIMER_NETWORK))
{ {
if (arp_resolve_pa (nif, protocol, pa, &hwa)) dbg("%s: try to resolve %d.%d.%d.%d\r\n", __FUNCTION__,
pa[0], pa[1], pa[2], pa[3], pa[4]);
if (arp_resolve_pa(nif, protocol, pa, &hwa))
{
dbg("%s: resolved to %02x:%02x:%02x:%02x:%02x:%02x.\r\n", __FUNCTION__,
hwa[0], hwa[1], hwa[2], hwa[3], hwa[4], hwa[5], hwa[6]);
return hwa; return hwa;
}
} }
} }

73
net/fec.c
View File

@@ -18,6 +18,7 @@
#include "bas_printf.h" #include "bas_printf.h"
#include "util.h" #include "util.h"
#include "am79c874.h" #include "am79c874.h"
#include "bcm5222.h"
#include <stdbool.h> #include <stdbool.h>
#if defined(MACHINE_FIREBEE) #if defined(MACHINE_FIREBEE)
@@ -268,30 +269,30 @@ void fec_log_dump(uint8_t ch)
*/ */
void fec_debug_dump(uint8_t ch) void fec_debug_dump(uint8_t ch)
{ {
dbg("\n------------- FEC%d -------------\n",ch); dbg("\r\n------------- FEC%d -------------\r\n",ch);
dbg("EIR %08x \n", MCF_FEC_EIR(ch)); dbg("EIR %08x \r\n", MCF_FEC_EIR(ch));
dbg("EIMR %08x \n", MCF_FEC_EIMR(ch)); dbg("EIMR %08x \r\n", MCF_FEC_EIMR(ch));
dbg("ECR %08x \n", MCF_FEC_ECR(ch)); dbg("ECR %08x \r\n", MCF_FEC_ECR(ch));
dbg("RCR %08x \n", MCF_FEC_RCR(ch)); dbg("RCR %08x \r\n", MCF_FEC_RCR(ch));
dbg("R_HASH %08x \n", MCF_FEC_RHR_HASH(ch)); dbg("R_HASH %08x \r\n", MCF_FEC_RHR_HASH(ch));
dbg("TCR %08x \n", MCF_FEC_TCR(ch)); dbg("TCR %08x \r\n", MCF_FEC_TCR(ch));
dbg("FECTFWR %08x \n", MCF_FEC_FECTFWR(ch)); dbg("FECTFWR %08x \r\n", MCF_FEC_FECTFWR(ch));
dbg("FECRFSR %08x \n", MCF_FEC_FECRFSR(ch)); dbg("FECRFSR %08x \r\n", MCF_FEC_FECRFSR(ch));
dbg("FECRFCR %08x \n", MCF_FEC_FECRFCR(ch)); dbg("FECRFCR %08x \r\n", MCF_FEC_FECRFCR(ch));
dbg("FECRLRFP %08x \n", MCF_FEC_FECRLRFP(ch)); dbg("FECRLRFP %08x \r\n", MCF_FEC_FECRLRFP(ch));
dbg("FECRLWFP %08x \n", MCF_FEC_FECRLWFP(ch)); dbg("FECRLWFP %08x \r\n", MCF_FEC_FECRLWFP(ch));
dbg("FECRFAR %08x \n", MCF_FEC_FECRFAR(ch)); dbg("FECRFAR %08x \r\n", MCF_FEC_FECRFAR(ch));
dbg("FECRFRP %08x \n", MCF_FEC_FECRFRP(ch)); dbg("FECRFRP %08x \r\n", MCF_FEC_FECRFRP(ch));
dbg("FECRFWP %08x \n", MCF_FEC_FECRFWP(ch)); dbg("FECRFWP %08x \r\n", MCF_FEC_FECRFWP(ch));
dbg("FECTFSR %08x \n", MCF_FEC_FECTFSR(ch)); dbg("FECTFSR %08x \r\n", MCF_FEC_FECTFSR(ch));
dbg("FECTFCR %08x \n", MCF_FEC_FECTFCR(ch)); dbg("FECTFCR %08x \r\n", MCF_FEC_FECTFCR(ch));
dbg("FECTLRFP %08x \n", MCF_FEC_FECTLRFP(ch)); dbg("FECTLRFP %08x \r\n", MCF_FEC_FECTLRFP(ch));
dbg("FECTLWFP %08x \n", MCF_FEC_FECTLWFP(ch)); dbg("FECTLWFP %08x \r\n", MCF_FEC_FECTLWFP(ch));
dbg("FECTFAR %08x \n", MCF_FEC_FECTFAR(ch)); dbg("FECTFAR %08x \r\n", MCF_FEC_FECTFAR(ch));
dbg("FECTFRP %08x \n", MCF_FEC_FECTFRP(ch)); dbg("FECTFRP %08x \r\n", MCF_FEC_FECTFRP(ch));
dbg("FECTFWP %08x \n", MCF_FEC_FECTFWP(ch)); dbg("FECTFWP %08x \r\n", MCF_FEC_FECTFWP(ch));
dbg("FRST %08x \n", MCF_FEC_FECFRST(ch)); dbg("FRST %08x \r\n", MCF_FEC_FECFRST(ch));
dbg("--------------------------------\n\n"); dbg("--------------------------------\r\n\r\n");
} }
/* /*
@@ -398,11 +399,11 @@ void fec_reset(uint8_t ch)
| MCF_FEC_FECRFSR_FAE | MCF_FEC_FECRFSR_FAE
| MCF_FEC_FECRFSR_IP); | MCF_FEC_FECRFSR_IP);
MCF_FEC_FECTFSR(ch) = (0 MCF_FEC_FECTFSR(ch) = (0
| MCF_FEC_FECRFSR_OF | MCF_FEC_FECTFSR_OF
| MCF_FEC_FECRFSR_UF | MCF_FEC_FECTFSR_UF
| MCF_FEC_FECRFSR_RXW | MCF_FEC_FECTFSR_TXW
| MCF_FEC_FECRFSR_FAE | MCF_FEC_FECTFSR_FAE
| MCF_FEC_FECRFSR_IP); | MCF_FEC_FECTFSR_IP);
/* Reset the FIFOs */ /* Reset the FIFOs */
MCF_FEC_FECFRST(ch) |= MCF_FEC_FECFRST_SW_RST; MCF_FEC_FECFRST(ch) |= MCF_FEC_FECFRST_SW_RST;
@@ -1003,13 +1004,17 @@ void fec_tx_frame(uint8_t ch)
* Free up the network buffer that was just transmitted * Free up the network buffer that was just transmitted
*/ */
nbuf_free(pNbuf); nbuf_free(pNbuf);
dbg("%s: free buffer %p from TX ring\r\n", __FUNCTION__, pNbuf);
/* /*
* Re-initialize the Tx BD * Re-initialize the Tx BD
*/ */
pTxBD->data = NULL; pTxBD->data = NULL;
pTxBD->length = 0; pTxBD->length = 0;
return;
} }
dbg("%s: BD ring is empty\r\n", __FUNCTION__);
} }
void fec0_tx_frame(void) void fec0_tx_frame(void)
@@ -1228,16 +1233,20 @@ static void fec_irq_handler(uint8_t ch)
if (event & MCF_FEC_EIR_MII) if (event & MCF_FEC_EIR_MII)
{ {
fec_log[ch].mii++; fec_log[ch].mii++;
dbg("%s: MII\r\n", __FUNCTION__);
} }
if (event & MCF_FEC_EIR_TXF) if (event & MCF_FEC_EIR_TXF)
{ {
fec_log[ch].txf++; fec_log[ch].txf++;
dbg("%s: TXF\r\n", __FUNCTION__);
fec_log_dump(0);
} }
if (event & MCF_FEC_EIR_GRA) if (event & MCF_FEC_EIR_GRA)
{ {
fec_log[ch].gra++; fec_log[ch].gra++;
dbg("%s: GRA\r\n", __FUNCTION__);
} }
if (event & MCF_FEC_EIR_BABT) if (event & MCF_FEC_EIR_BABT)
@@ -1315,7 +1324,7 @@ void fec_eth_setup(uint8_t ch, uint8_t trcvr, uint8_t speed, uint8_t duplex, con
* Initialize the FEC * Initialize the FEC
*/ */
fec_reset(ch); fec_reset(ch);
fec_init(ch,trcvr,mac); fec_init(ch, trcvr, mac);
if (trcvr == FEC_MODE_MII) if (trcvr == FEC_MODE_MII)
{ {
@@ -1324,8 +1333,10 @@ void fec_eth_setup(uint8_t ch, uint8_t trcvr, uint8_t speed, uint8_t duplex, con
*/ */
#if defined(MACHINE_FIREBEE) #if defined(MACHINE_FIREBEE)
am79c874_init(0, 0, speed, duplex); am79c874_init(0, 0, speed, duplex);
#elif defined(MACHINE_M548X)
bcm_5222_init(0, 0, speed, duplex);
#else #else
fec_mii_init(ch, SYSCLK); fec_mii_init(ch, SYSCLK / 1000);
#endif /* MACHINE_FIREBEE */ #endif /* MACHINE_FIREBEE */
} }

4
net/ip.c
View File

@@ -280,6 +280,8 @@ void ip_handler(NIF *nif, NBUF *pNbuf)
*/ */
ip_frame_hdr *ipframe; ip_frame_hdr *ipframe;
dbg("%s: packet received\r\n", __FUNCTION__);
ipframe = (ip_frame_hdr *) &pNbuf->data[pNbuf->offset]; ipframe = (ip_frame_hdr *) &pNbuf->data[pNbuf->offset];
/* /*
@@ -300,7 +302,7 @@ void ip_handler(NIF *nif, NBUF *pNbuf)
switch (IP_PROTOCOL(ipframe)) switch (IP_PROTOCOL(ipframe))
{ {
case IP_PROTO_ICMP: case IP_PROTO_ICMP:
// FIXME: icmp_handler(nif,pNbuf); // FIXME: icmp_handler(nif, pNbuf);
break; break;
case IP_PROTO_UDP: case IP_PROTO_UDP:
udp_handler(nif,pNbuf); udp_handler(nif,pNbuf);

10
net/nbuf.c
View File

@@ -165,6 +165,7 @@ NBUF *nbuf_remove(int q)
void nbuf_add(int q, NBUF *nbuf) void nbuf_add(int q, NBUF *nbuf)
{ {
int level = set_ipl(7); int level = set_ipl(7);
queue_add(&nbuf_queue[q], (QNODE *) nbuf); queue_add(&nbuf_queue[q], (QNODE *) nbuf);
set_ipl(level); set_ipl(level);
} }
@@ -198,19 +199,20 @@ void nbuf_debug_dump(void)
for (i = 0; i < NBUF_MAXQ; ++i) for (i = 0; i < NBUF_MAXQ; ++i)
{ {
dbg("\n\nQueue #%d\n\n", i); dbg("\r\n\r\nQueue #%d\r\n\r\n", i);
dbg("\tBuffer Location\tOffset\tLength\n"); dbg("\tBuffer Location\tOffset\tLength\r\n");
dbg("--------------------------------------\n"); dbg("--------------------------------------\r\n");
j = 0; j = 0;
nbuf = (NBUF *) queue_peek(&nbuf_queue[i]); nbuf = (NBUF *) queue_peek(&nbuf_queue[i]);
while (nbuf != NULL) while (nbuf != NULL)
{ {
dbg("%d\t 0x%08x\t0x%04x\t0x%04x\n",j++,nbuf->data, dbg("%d\t0x%08x\t0x%04x\t0x%04x\r\n", j++, nbuf->data,
nbuf->offset, nbuf->offset,
nbuf->length); nbuf->length);
nbuf = (NBUF *) nbuf->node.next; nbuf = (NBUF *) nbuf->node.next;
} }
} }
dbg("\r\n");
set_ipl(level); set_ipl(level);
#endif /* DBG_NBUF */ #endif /* DBG_NBUF */

20
net/net_timer.c
View File

@@ -8,9 +8,18 @@
#include "net_timer.h" #include "net_timer.h"
#include <stdint.h> #include <stdint.h>
#include <stdbool.h> #include <stdbool.h>
#include "bas_printf.h"
#include "MCF5475.h" #include "MCF5475.h"
#include "interrupts.h" #include "interrupts.h"
#define DBG_TMR
#ifdef DBG_TMR
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_TMR */
#if defined(MACHINE_FIREBEE) #if defined(MACHINE_FIREBEE)
#include "firebee.h" #include "firebee.h"
#elif defined(MACHINE_M5484LITE) #elif defined(MACHINE_M5484LITE)
@@ -37,6 +46,8 @@ int timer_default_isr(void *not_used, NET_TIMER *t)
*/ */
MCF_GPT_GMS(t->ch) = 0; MCF_GPT_GMS(t->ch) = 0;
dbg("%s: timer isr called for timer channel %d\r\n", __FUNCTION__);
/* /*
* Clear the reference - the desired seconds have expired * Clear the reference - the desired seconds have expired
*/ */
@@ -119,7 +130,12 @@ bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri)
* initialization code. * initialization code.
*/ */
if (!((ch <= 3) && (lvl <= 7) && (lvl >= 1) && (pri <= 7))) if (!((ch <= 3) && (lvl <= 7) && (lvl >= 1) && (pri <= 7)))
{
dbg("%s: illegal parameters (ch=%d, lvl=%d, pri=%d)\r\n", __FUNCTION__,
ch, lvl, pri);
return false; return false;
}
/* /*
* Reset the timer * Reset the timer
@@ -143,8 +159,10 @@ bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri)
(void *) &net_timer[ch]) (void *) &net_timer[ch])
) )
{ {
dbg("%s: could not register timer interrupt handler\r\n", __FUNCTION__);
return false; return false;
} }
dbg("%s: timer handler registered\r\n", __FUNCTION__);
/* /*
* Calculate the require CNT value to get a 1 second timeout * Calculate the require CNT value to get a 1 second timeout
@@ -162,7 +180,7 @@ bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri)
* CNT = SYSTEM_CLOCK * (1000000/0xFFFF) * CNT = SYSTEM_CLOCK * (1000000/0xFFFF)
*/ */
net_timer[ch].pre = 0xFFFF; net_timer[ch].pre = 0xFFFF;
net_timer[ch].cnt = (uint16_t) (SYSCLK * (1000000 / 0xFFFF)); net_timer[ch].cnt = (uint16_t) ((SYSCLK / 1000) * (1000000 / 0xFFFF));
/* /*
* Save off the appropriate mode select register value * Save off the appropriate mode select register value

16
net/nif.c
View File

@@ -9,9 +9,18 @@
*/ */
#include "net.h" #include "net.h"
#include "bas_types.h" #include "bas_types.h"
#include "bas_printf.h"
#include <stdint.h> #include <stdint.h>
#include <stdbool.h> #include <stdbool.h>
#define DBG_NIF
#ifdef DBG_NIF
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_NIF */
int nif_protocol_exist(NIF *nif, uint16_t protocol) int nif_protocol_exist(NIF *nif, uint16_t protocol)
{ {
/* /*
@@ -46,8 +55,14 @@ void nif_protocol_handler(NIF *nif, uint16_t protocol, NBUF *pNbuf)
for (index = 0; index < nif->num_protocol; ++index) for (index = 0; index < nif->num_protocol; ++index)
{ {
if (nif->protocol[index].protocol == protocol) if (nif->protocol[index].protocol == protocol)
{
dbg("%s: call protocol handler for protocol %d at %p\r\n", __FUNCTION__, protocol,
nif->protocol[index].handler);
nif->protocol[index].handler(nif,pNbuf); nif->protocol[index].handler(nif,pNbuf);
return;
}
} }
dbg("%s: no protocol handler found for protocol %d\r\n", __FUNCTION__, protocol);
} }
void *nif_get_protocol_info(NIF *nif, uint16_t protocol) void *nif_get_protocol_info(NIF *nif, uint16_t protocol)
@@ -80,6 +95,7 @@ int nif_bind_protocol(NIF *nif, uint16_t protocol, void (*handler)(NIF *,NBUF *)
nif->protocol[nif->num_protocol].handler = (void(*)(NIF*,NBUF*))handler; nif->protocol[nif->num_protocol].handler = (void(*)(NIF*,NBUF*))handler;
nif->protocol[nif->num_protocol].info = info; nif->protocol[nif->num_protocol].info = info;
++nif->num_protocol; ++nif->num_protocol;
return true; return true;
} }
return false; return false;

17
net/udp.c
View File

@@ -8,6 +8,7 @@
* *
*/ */
#include "bas_types.h" #include "bas_types.h"
#include "bas_printf.h"
#include "net.h" #include "net.h"
#include <stddef.h> #include <stddef.h>
@@ -106,6 +107,8 @@ uint16_t udp_obtain_free_port(void)
int udp_send(NIF *nif, uint8_t *dest, int sport, int dport, NBUF *pNbuf) int udp_send(NIF *nif, uint8_t *dest, int sport, int dport, NBUF *pNbuf)
{ {
uint8_t *myip;
if (nif == NULL) if (nif == NULL)
{ {
dbg("%s: nif is NULL\r\n", __FUNCTION__); dbg("%s: nif is NULL\r\n", __FUNCTION__);
@@ -135,8 +138,14 @@ int udp_send(NIF *nif, uint8_t *dest, int sport, int dport, NBUF *pNbuf)
/* Add the length of the UDP packet to the total length of the packet */ /* Add the length of the UDP packet to the total length of the packet */
pNbuf->length += 8; pNbuf->length += 8;
return (ip_send(nif, dest, ip_get_myip(nif_get_protocol_info(nif, ETH_FRM_IP)), myip = ip_get_myip(nif_get_protocol_info(nif, ETH_FRM_IP));
IP_PROTO_UDP, pNbuf));
dbg("%s: sent UDP request to %d.%d.%d.%d from %d.%d.%d.%d\r\n", __FUNCTION__,
dest[0], dest[1], dest[2], dest[3],
myip[0], myip[1], myip[2], myip[3]);
return (ip_send(nif, dest, myip, IP_PROTO_UDP, pNbuf));
} }
void udp_handler(NIF *nif, NBUF *pNbuf) void udp_handler(NIF *nif, NBUF *pNbuf)
@@ -149,6 +158,8 @@ void udp_handler(NIF *nif, NBUF *pNbuf)
udpframe = (udp_frame_hdr *) &pNbuf->data[pNbuf->offset]; udpframe = (udp_frame_hdr *) &pNbuf->data[pNbuf->offset];
dbg("%s: packet received\r\n", __FUNCTION__);
/* /*
* Adjust the length and valid data offset of the packet we are * Adjust the length and valid data offset of the packet we are
* passing on * passing on
@@ -164,7 +175,7 @@ void udp_handler(NIF *nif, NBUF *pNbuf)
handler(nif, pNbuf); handler(nif, pNbuf);
else else
{ {
xprintf("Received UDP packet for non-supported port\n"); dbg("%s: received UDP packet for non-supported port\n", __FUNCTION__);
nbuf_free(pNbuf); nbuf_free(pNbuf);
} }

4
pci/pci.c
View File

@@ -892,9 +892,9 @@ void init_xlbus_arbiter(void)
MCF_XLB_XARB_PRIEN = MCF_XLB_XARB_PRIEN_M0 | /* activate programmed priority for Coldfire core */ MCF_XLB_XARB_PRIEN = MCF_XLB_XARB_PRIEN_M0 | /* activate programmed priority for Coldfire core */
MCF_XLB_XARB_PRIEN_M2 | /* activate programmed priority for Multichannel DMA */ MCF_XLB_XARB_PRIEN_M2 | /* activate programmed priority for Multichannel DMA */
MCF_XLB_XARB_PRIEN_M3; /* activate programmed priority for PCI target interface */ MCF_XLB_XARB_PRIEN_M3; /* activate programmed priority for PCI target interface */
MCF_XLB_XARB_PRI = MCF_XLB_XARB_PRI_M0P(3) | /* Coldfire core gets lowest */ MCF_XLB_XARB_PRI = MCF_XLB_XARB_PRI_M0P(7) | /* Coldfire core gets lowest */
MCF_XLB_XARB_PRI_M2P(5) | /* Multichannel DMA mid priority */ MCF_XLB_XARB_PRI_M2P(5) | /* Multichannel DMA mid priority */
MCF_XLB_XARB_PRI_M3P(7); /* PCI target interface is highest priority */ MCF_XLB_XARB_PRI_M3P(3); /* PCI target interface is highest priority */
} }
void init_pci(void) void init_pci(void)

36
radeon/radeon_base.c
View File

@@ -61,7 +61,7 @@
#include "bas_printf.h" #include "bas_printf.h"
#include "exceptions.h" /* for set_ipl() */ #include "exceptions.h" /* for set_ipl() */
//#define DBG_RADEON #define DBG_RADEON
#ifdef DBG_RADEON #ifdef DBG_RADEON
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) #define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else #else
@@ -670,23 +670,14 @@ static void radeon_get_pllinfo(struct radeonfb_info *rinfo)
*/ */
if (!force_measure_pll && (rinfo->bios_seg != NULL)) if (!force_measure_pll && (rinfo->bios_seg != NULL))
{ {
#ifdef DRIVER_IN_ROM // problem if BIOS ROM is invalid after run_bios()
rinfo->pll.sclk = rinfo->bios_pll.sclk; rinfo->pll.sclk = rinfo->bios_pll.sclk;
rinfo->pll.mclk = rinfo->bios_pll.mclk; rinfo->pll.mclk = rinfo->bios_pll.mclk;
rinfo->pll.ref_clk = rinfo->bios_pll.ref_clk; rinfo->pll.ref_clk = rinfo->bios_pll.ref_clk;
rinfo->pll.ref_div = rinfo->bios_pll.ref_div; rinfo->pll.ref_div = rinfo->bios_pll.ref_div;
rinfo->pll.ppll_min = rinfo->bios_pll.ppll_min; rinfo->pll.ppll_min = rinfo->bios_pll.ppll_min;
rinfo->pll.ppll_max = rinfo->bios_pll.ppll_max; rinfo->pll.ppll_max = rinfo->bios_pll.ppll_max;
#else
uint16_t pll_info_block = BIOS_IN16(rinfo->fp_bios_start + 0x30);
rinfo->pll.sclk = BIOS_IN16(pll_info_block + 0x08);
rinfo->pll.mclk = BIOS_IN16(pll_info_block + 0x0a);
rinfo->pll.ref_clk = BIOS_IN16(pll_info_block + 0x0e);
rinfo->pll.ref_div = BIOS_IN16(pll_info_block + 0x10);
rinfo->pll.ppll_min = BIOS_IN32(pll_info_block + 0x12);
rinfo->pll.ppll_max = BIOS_IN32(pll_info_block + 0x16);
#endif
dbg("%s: Retreived PLL infos from BIOS\r\n", __FUNCTION__); dbg("%s: Retreived PLL infos from BIOS\r\n", __FUNCTION__);
goto found; goto found;
} }
@@ -831,20 +822,31 @@ int radeonfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
v.xres_virtual = (pitch << 6) / ((v.bits_per_pixel + 1) / 8); v.xres_virtual = (pitch << 6) / ((v.bits_per_pixel + 1) / 8);
if (((v.xres_virtual * v.yres_virtual * nom) / den) > info->screen_size) if (((v.xres_virtual * v.yres_virtual * nom) / den) > info->screen_size)
{
dbg("%s: mode %d x %d rejected (screen size too small)\r\n", __FUNCTION__, v.xres_virtual, v.yres_virtual);
return -1; //-EINVAL; return -1; //-EINVAL;
}
if (v.xres_virtual < v.xres) if (v.xres_virtual < v.xres)
v.xres = v.xres_virtual; v.xres = v.xres_virtual;
if (v.xoffset < 0) if (v.xoffset < 0)
v.xoffset = 0; v.xoffset = 0;
if (v.yoffset < 0) if (v.yoffset < 0)
v.yoffset = 0; v.yoffset = 0;
if (v.xoffset > v.xres_virtual - v.xres) if (v.xoffset > v.xres_virtual - v.xres)
v.xoffset = v.xres_virtual - v.xres - 1; v.xoffset = v.xres_virtual - v.xres - 1;
if (v.yoffset > v.yres_virtual - v.yres) if (v.yoffset > v.yres_virtual - v.yres)
v.yoffset = v.yres_virtual - v.yres - 1; v.yoffset = v.yres_virtual - v.yres - 1;
v.red.msb_right = v.green.msb_right = v.blue.msb_right = 0; v.red.msb_right = v.green.msb_right = v.blue.msb_right = 0;
v.transp.offset = v.transp.length = v.transp.msb_right = 0; v.transp.offset = v.transp.length = v.transp.msb_right = 0;
dbg("%s: using mode %d x %d \r\n", __FUNCTION__, v.xres, v.yres);
memcpy(var, &v, sizeof(v)); memcpy(var, &v, sizeof(v));
return 0; return 0;
} }
@@ -1786,6 +1788,7 @@ int radeonfb_set_par(struct fb_info *info)
static void radeonfb_check_modes(struct fb_info *info, struct mode_option *resolution) static void radeonfb_check_modes(struct fb_info *info, struct mode_option *resolution)
{ {
struct radeonfb_info *rinfo = info->par; struct radeonfb_info *rinfo = info->par;
radeon_check_modes(rinfo, resolution); radeon_check_modes(rinfo, resolution);
} }
@@ -1839,6 +1842,7 @@ static struct fb_ops radeonfb_ops =
static int radeon_set_fbinfo(struct radeonfb_info *rinfo) static int radeon_set_fbinfo(struct radeonfb_info *rinfo)
{ {
struct fb_info *info = rinfo->info; struct fb_info *info = rinfo->info;
info->par = rinfo; info->par = rinfo;
info->fbops = &radeonfb_ops; info->fbops = &radeonfb_ops;
info->ram_base = info->screen_base = rinfo->fb_base; info->ram_base = info->screen_base = rinfo->fb_base;
@@ -1848,7 +1852,10 @@ static int radeon_set_fbinfo(struct radeonfb_info *rinfo)
info->screen_size = MAX_MAPPED_VRAM; info->screen_size = MAX_MAPPED_VRAM;
else if (info->screen_size > MIN_MAPPED_VRAM) else if (info->screen_size > MIN_MAPPED_VRAM)
info->screen_size = MIN_MAPPED_VRAM; info->screen_size = MIN_MAPPED_VRAM;
dbg("radeonfb: radeon_set_fbinfo: screen_size %lx\r\n", info->screen_size);
dbg("%s: ram_base %p\r\n", __FUNCTION__, info->screen_base);
dbg("%s: ram_size %p\r\n", __FUNCTION__, info->ram_size);
/* Fill fix common fields */ /* Fill fix common fields */
memcpy(info->fix.id, rinfo->name, sizeof(info->fix.id)); memcpy(info->fix.id, rinfo->name, sizeof(info->fix.id));
info->fix.smem_start = rinfo->fb_base_phys; info->fix.smem_start = rinfo->fb_base_phys;
@@ -2117,7 +2124,7 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)
if ((rinfo->bios_seg != NULL)) if ((rinfo->bios_seg != NULL))
{ {
dbg("%s: run VGA BIOS\r\n", __FUNCTION__); dbg("%s: run VGA BIOS\r\n", __FUNCTION__);
//run_bios(rinfo); run_bios(rinfo);
} }
else else
{ {
@@ -2180,7 +2187,8 @@ int32_t radeonfb_pci_register(int32_t handle, const struct pci_device_id *ent)
dbg("%s: build mode list\r\n", __FUNCTION__); dbg("%s: build mode list\r\n", __FUNCTION__);
radeon_check_modes(rinfo, &resolution); radeon_check_modes(rinfo, &resolution);
/* save current mode regs before we switch into the new one /*
* save current mode regs before we switch into the new one
* so we can restore this upon exit * so we can restore this upon exit
*/ */
dbg("%s: save current mode\r\n", __FUNCTION__); dbg("%s: save current mode\r\n", __FUNCTION__);

20
sys/BaS.c
View File

@@ -290,15 +290,27 @@ void network_init(void)
memcpy(nif1.hwa, mac, 6); memcpy(nif1.hwa, mac, 6);
memcpy(nif1.broadcast, bc, 6); memcpy(nif1.broadcast, bc, 6);
dbg("%s: ethernet address is %02X:%02X:%02X:%02X:%02X:%02X\r\n", __FUNCTION__,
nif1.hwa[0], nif1.hwa[1], nif1.hwa[2],
nif1.hwa[3], nif1.hwa[4], nif1.hwa[5]);
timer_init(TIMER_NETWORK, TMR_INTC_LVL, TMR_INTC_PRI);
arp_init(&arp_info); arp_init(&arp_info);
nif_bind_protocol(&nif1, ETH_FRM_ARP, arp_handler, (void *) &arp_info); nif_bind_protocol(&nif1, ETH_FRM_ARP, arp_handler, (void *) &arp_info);
ip_init(&ip_info, myip, gateway, netmask); ip_init(&ip_info, myip, gateway, netmask);
nif_bind_protocol(&nif1, ETH_FRM_IP, ip_handler, (void *) &ip_info); nif_bind_protocol(&nif1, ETH_FRM_IP, ip_handler, (void *) &ip_info);
dma_irq_enable(6, 6);
//set_ipl(0);
// bootp_request(&nif1, 0); udp_init();
dma_irq_enable(6, 6);
set_ipl(0);
bootp_request(&nif1, 0);
fec_eth_stop(0);
} }
void BaS(void) void BaS(void)
@@ -315,7 +327,7 @@ void BaS(void)
/* copy EMUTOS */ /* copy EMUTOS */
src = (uint8_t *) EMUTOS; src = (uint8_t *) EMUTOS;
memcpy(dst, src, EMUTOS_SIZE); dma_memcpy(dst, src, EMUTOS_SIZE);
xprintf("finished\r\n"); xprintf("finished\r\n");
xprintf("initialize MMU: "); xprintf("initialize MMU: ");

2
sys/driver_mem.c
View File

@@ -301,7 +301,7 @@ int driver_mem_init(void)
{ {
if (use_count == 0) if (use_count == 0)
{ {
dbg("%s: initialise driver_mem_buffer[] at %p, size %x\r\n", __FUNCTION__, driver_mem_buffer, DRIVER_MEM_BUFFER_SIZE); dbg("%s: initialise driver_mem_buffer[] at %p, size 0x%x\r\n", __FUNCTION__, driver_mem_buffer, DRIVER_MEM_BUFFER_SIZE);
memset(driver_mem_buffer, 0, DRIVER_MEM_BUFFER_SIZE); memset(driver_mem_buffer, 0, DRIVER_MEM_BUFFER_SIZE);
pmd.mp_mfl = pmd.mp_rover = &tab_md[0]; pmd.mp_mfl = pmd.mp_rover = &tab_md[0];

1
sys/exceptions.S
View File

@@ -310,6 +310,7 @@ init_vec_loop:
// install lowlevel_isr_handler for the FEC0 interrupt // install lowlevel_isr_handler for the FEC0 interrupt
move.l a1,(INT_SOURCE_FEC0 + 64) * 4(a0) move.l a1,(INT_SOURCE_FEC0 + 64) * 4(a0)
#ifndef MACHINE_FIREBEE #ifndef MACHINE_FIREBEE
// FEC1 not wired on the FireBee // FEC1 not wired on the FireBee
move.l a1,(INT_SOURCE_FEC1 + 64) * 4(a0) move.l a1,(INT_SOURCE_FEC1 + 64) * 4(a0)

1
video/fbmodedb.c
View File

@@ -507,6 +507,7 @@ int fb_find_mode(struct fb_var_screeninfo *var,
default_mode = &modedb[DEFAULT_MODEDB_INDEX]; default_mode = &modedb[DEFAULT_MODEDB_INDEX];
if (!default_bpp) if (!default_bpp)
default_bpp = 8; default_bpp = 8;
/* Did the user specify a video mode? */ /* Did the user specify a video mode? */
if (resolution->used) /* fVDI mode */ if (resolution->used) /* fVDI mode */
{ {

13
video/video.c
View File

@@ -277,9 +277,18 @@ void videl_screen_init(void)
static struct fb_info fb; static struct fb_info fb;
struct fb_info *info_fb = &fb; struct fb_info *info_fb = &fb;
const char monitor_layout[1024]; const char monitor_layout[1024] = "CRT,CRT";
int16_t ignore_edid; int16_t ignore_edid;
struct mode_option resolution;
struct mode_option resolution =
{
.used = 0,
.width = 640,
.height = 480,
.bpp = 8,
.freq = 60,
.flags = 0
};
int16_t force_measure_pll; int16_t force_measure_pll;
void install_vbl_timer(void *func, int remove) void install_vbl_timer(void *func, int remove)

126
x86emu/x86biosemu.c
View File

@@ -62,7 +62,7 @@ struct pci_data
uint16_t reserved_2; uint16_t reserved_2;
}; };
struct radeonfb_info *rinfo_biosemu; static struct radeonfb_info *rinfo_biosemu;
uint16_t offset_port; uint16_t offset_port;
uint32_t offset_mem; uint32_t offset_mem;
static uint32_t offset_io; static uint32_t offset_io;
@@ -105,9 +105,7 @@ uint8_t inb(uint16_t port)
if ((port >= offset_port) && (port <= offset_port + 0xFF)) if ((port >= offset_port) && (port <= offset_port + 0xFF))
{ {
//dbg("%s:\r\n", __FUNCTION__); val = * (uint8_t *) (offset_io + (uint32_t) port);
val = *(uint8_t *)(offset_io+(uint32_t)port);
//dbg("%s: inb(0x%x) = 0x%x\r\n", __FUNCTION__, port, val); //dbg("%s: inb(0x%x) = 0x%x\r\n", __FUNCTION__, port, val);
} }
return val; return val;
@@ -117,11 +115,10 @@ uint16_t inw(uint16_t port)
{ {
uint16_t val = 0; uint16_t val = 0;
if ((port >= offset_port) && (port <= offset_port+0xFF)) if ((port >= offset_port) && (port <= offset_port + 0xFF))
{ {
//dbg("inw("); val = swpw(*(uint16_t *)(offset_io + (uint32_t) port));
val = swpw(*(uint16_t *)(offset_io+(uint32_t)port)); //dbg("inw(0x%x) = 0x%x\r\n", port, val);
//dbg("0x%x) = 0x%x\r\n", port, val);
} }
return val; return val;
} }
@@ -129,42 +126,38 @@ uint16_t inw(uint16_t port)
uint32_t inl(uint16_t port) uint32_t inl(uint16_t port)
{ {
uint32_t val = 0; uint32_t val = 0;
if ((port >= offset_port) && (port <= offset_port+0xFF)) if ((port >= offset_port) && (port <= offset_port + 0xFF))
{ {
//dbg("inl("); val = swpl(*(uint32_t *)(offset_io + (uint32_t) port));
val = swpl(*(uint32_t *)(offset_io+(uint32_t)port));
//dbg("0x%x) = 0x%x\r\n", port, val); //dbg("0x%x) = 0x%x\r\n", port, val);
} }
else if (port == 0xCF8) else if (port == 0xCF8)
{ {
//dbg("inl(");
val = config_address_reg; val = config_address_reg;
//dbg("0x%x) = 0x%x\r\n", port, val); dbg("inl(0x%x) = 0x%x\r\n", port, val);
} }
else if ((port == 0xCFC) && ((config_address_reg & 0x80000000) != 0)) else if ((port == 0xCFC) && ((config_address_reg & 0x80000000) != 0))
{ {
dbg("%s: PCI BIOS access to register %x\r\n", __FUNCTION__, config_address_reg);
switch (config_address_reg & 0xFC) switch (config_address_reg & 0xFC)
{ {
case PCIIDR: case PCIIDR:
val = ((uint32_t) rinfo_biosemu->chipset << 16) + PCI_VENDOR_ID_ATI; val = ((uint32_t) rinfo_biosemu->chipset << 16) + PCI_VENDOR_ID_ATI;
break; break;
case PCIBAR1: case PCIBAR1:
val = (uint32_t) offset_port + 1; val = (uint32_t) offset_port + 1;
break; break;
default: default:
val = pci_read_config_longword(rinfo_biosemu->handle, config_address_reg & 0xFC); val = pci_read_config_longword(rinfo_biosemu->handle, config_address_reg & 0xFC);
break; break;
} }
//dbg("inl(0x%x) = 0x%x\r\n", port, val); dbg("inl(0x%x) = 0x%x\r\n", port, val);
} }
return val; return val;
} }
#ifdef DBG_X86EMU
#undef DBG_X86EMU
#define DBG_
#endif
void outb(uint8_t val, uint16_t port) void outb(uint8_t val, uint16_t port)
{ {
if ((port >= offset_port) && (port <= offset_port + 0xFF)) if ((port >= offset_port) && (port <= offset_port + 0xFF))
@@ -192,7 +185,7 @@ void outl(uint32_t val, uint16_t port)
} }
else if (port == 0xCF8) else if (port == 0xCF8)
{ {
//dbg("outl(0x%x, 0x%x)\r\n", port, val); dbg("outl(0x%x, 0x%x)\r\n", port, val);
config_address_reg = val; config_address_reg = val;
} }
else if ((port == 0xCFC) && ((config_address_reg & 0x80000000) !=0)) else if ((port == 0xCFC) && ((config_address_reg & 0x80000000) !=0))
@@ -201,16 +194,12 @@ void outl(uint32_t val, uint16_t port)
offset_port = (uint16_t)val & 0xFFFC; offset_port = (uint16_t)val & 0xFFFC;
else else
{ {
//dbg("outl(0x%x, 0x%x)\r\n", port, val); dbg("outl(0x%x, 0x%x) to PCI config space\r\n", port, val);
pci_write_config_longword(rinfo_biosemu->handle, config_address_reg & 0xFC, val); pci_write_config_longword(rinfo_biosemu->handle, config_address_reg & 0xFC, val);
} }
} }
} }
#ifdef DBG_
#define DBG_X86EMU
#endif
/* Interrupt multiplexer */ /* Interrupt multiplexer */
void do_int(int num) void do_int(int num)
@@ -364,14 +353,8 @@ static int setup_system_bios(void *base_addr)
* and all other locations by filling them with "hlt" * and all other locations by filling them with "hlt"
* TODO: implement hlt-handler for these * TODO: implement hlt-handler for these
*/ */
// for(i=0; i<0x10000; base[i++]=0xF4); for(i = 0; i < SIZE_EMU + 4; base[i++] = 0xF4);
for(i = 0; i < SIZE_EMU; base[i++] = 0xF4);
/* set bios date */
//strcpy(base + 0x0FFF5, "06/11/99");
/* set up eisa ident string */
//strcpy(base + 0x0FFD9, "PCI_ISA");
/* write system model id for IBM-AT */
//*((unsigned char *) (base + 0x0FFFE)) = 0xfc;
return(1); return(1);
} }
@@ -536,7 +519,7 @@ void run_bios(struct radeonfb_info *rinfo)
struct pci_data *rom_data; struct pci_data *rom_data;
unsigned long rom_size=0; unsigned long rom_size=0;
unsigned long image_size=0; unsigned long image_size=0;
void *biosmem = (void *) 0x01000000; /* when run_bios() is called, SDRAM is valid but not added to the system */ void *biosmem = (void *) 0x0100000; /* when run_bios() is called, SDRAM is valid but not added to the system */
unsigned long addr; unsigned long addr;
unsigned short initialcs; unsigned short initialcs;
unsigned short initialip; unsigned short initialip;
@@ -551,38 +534,31 @@ void run_bios(struct radeonfb_info *rinfo)
rinfo_biosemu = rinfo; rinfo_biosemu = rinfo;
config_address_reg = 0; config_address_reg = 0;
offset_port = 0x300; offset_port = 0x300;
#ifdef DIRECT_ACCESS
offset_io = (uint32_t) rinfo->io_base - (uint32_t) offset_port; offset_io = (uint32_t) rinfo->io_base - (uint32_t) offset_port;
offset_mem = (uint32_t) rinfo->fb_base - 0xA0000; offset_mem = (uint32_t) rinfo->fb_base - 0xA0000;
#else
offset_io = rinfo->io_base_phys -(uint32_t) offset_port;
offset_mem = rinfo->fb_base_phys - 0xA0000;
#endif
rom_header = (struct rom_header *) 0; rom_header = (struct rom_header *) 0;
do do
{ {
rom_header = (struct rom_header *)((unsigned long)rom_header + image_size); // get next image rom_header = (struct rom_header *) ((unsigned long) rom_header + image_size); // get next image
rom_data = (struct pci_data *)((unsigned long)rom_header + (unsigned long)BIOS_IN16((long)&rom_header->data)); rom_data = (struct pci_data *) ((unsigned long)rom_header + (unsigned long) BIOS_IN16((long) &rom_header->data));
image_size = (unsigned long)BIOS_IN16((long)&rom_data->ilen) * 512; image_size = (unsigned long) BIOS_IN16((long) &rom_data->ilen) * 512;
} while ((BIOS_IN8((long) &rom_data->type) != 0) && (BIOS_IN8((long) &rom_data->indicator) != 0)); // make sure we got x86 version } while ((BIOS_IN8((long) &rom_data->type) != 0) && (BIOS_IN8((long) &rom_data->indicator) != 0)); // make sure we got x86 version
if (BIOS_IN8((long) &rom_data->type) != 0) if (BIOS_IN8((long) &rom_data->type) != 0)
{ {
dbg("%s: ROM data type = 0x%x\r\n", __FUNCTION__, BIOS_IN8((long) &rom_data->type)); dbg("%s: ROM data type = 0x%x\r\n", __FUNCTION__, BIOS_IN8((long) &rom_data->type));
return; return;
} }
rom_size = (unsigned long) BIOS_IN8((long) &rom_header->size) * 512; rom_size = (unsigned long) BIOS_IN8((long) &rom_header->size) * 512;
if (PCI_CLASS_DISPLAY_VGA == BIOS_IN16((long) &rom_data->class_hi)) if (PCI_CLASS_DISPLAY_VGA == BIOS_IN16((long) &rom_data->class_hi))
{ {
//biosmem = driver_mem_alloc(SIZE_EMU);
biosmem = (char *) 0x100000;
if (biosmem == 0)
{
dbg("%s: could not allocate X86 BIOS memory\r\n", __FUNCTION__);
return;
}
memset((char *) biosmem, 0, SIZE_EMU); memset((char *) biosmem, 0, SIZE_EMU);
setup_system_bios((char *) biosmem); setup_system_bios((char *) biosmem);
dbg("%s: Copying VGA ROM Image from %p to %p (0x%lx bytes)\r\n", __FUNCTION__, (long) rinfo->bios_seg + (long) rom_header,
dbg("%s: Copying VGA ROM Image from %p to %p (0x%lx bytes)\r\n",
__FUNCTION__, (long) rinfo->bios_seg + (long) rom_header,
biosmem + PCI_VGA_RAM_IMAGE_START, rom_size); biosmem + PCI_VGA_RAM_IMAGE_START, rom_size);
{ {
long bytes_align = (long) rom_header & 3; long bytes_align = (long) rom_header & 3;
@@ -590,30 +566,21 @@ void run_bios(struct radeonfb_info *rinfo)
ptr = (unsigned char *) biosmem; ptr = (unsigned char *) biosmem;
i = (long) rom_header; i = (long) rom_header;
j = PCI_VGA_RAM_IMAGE_START; j = PCI_VGA_RAM_IMAGE_START;
if (bytes_align) if (bytes_align)
for(; i < 4 - bytes_align; ptr[j++] = BIOS_IN8(i++)); for(; i < 4 - bytes_align; ptr[j++] = BIOS_IN8(i++));
for(; i < (long) rom_header + rom_size; *((unsigned long *)&ptr[j]) = swpl(BIOS_IN32(i)), i += 4, j += 4);
for(; i < (long) rom_header + rom_size; i += 4, j += 4)
*((unsigned long *) &ptr[j]) = swpl(BIOS_IN32(i));
} }
addr = PCI_VGA_RAM_IMAGE_START; addr = PCI_VGA_RAM_IMAGE_START;
} }
else else
{ {
#ifdef USE_SDRAM setup_system_bios((char *) biosmem);
#if 0
if (os_magic) memset((char *) biosmem, 0, SIZE_EMU);
{
biosmem = Mxalloc(SIZE_EMU, 3);
if (biosmem == 0)
return;
}
#endif
#else
biosmem = Mxalloc(SIZE_EMU, 0);
if (biosmem == 0)
return;
#endif /* USE_SDRAM */
setup_system_bios((char *)biosmem);
memset((char *)biosmem, 0, SIZE_EMU);
dbg("%s: Copying non-VGA ROM Image from %p to %p (0x%lx bytes)\r\n", __FUNCTION__, dbg("%s: Copying non-VGA ROM Image from %p to %p (0x%lx bytes)\r\n", __FUNCTION__,
(long) rinfo->bios_seg + (long) rom_header, (long) rinfo->bios_seg + (long) rom_header,
biosmem + PCI_RAM_IMAGE_START, biosmem + PCI_RAM_IMAGE_START,
@@ -622,11 +589,14 @@ void run_bios(struct radeonfb_info *rinfo)
for (i = (long) rom_header, j = PCI_RAM_IMAGE_START; i < (long) rom_header+rom_size; ptr[j++] = BIOS_IN8(i++)); for (i = (long) rom_header, j = PCI_RAM_IMAGE_START; i < (long) rom_header+rom_size; ptr[j++] = BIOS_IN8(i++));
addr = PCI_RAM_IMAGE_START; addr = PCI_RAM_IMAGE_START;
} }
initialcs = (addr & 0xF0000) >> 4; initialcs = (addr & 0xF0000) >> 4;
initialip = (addr + 3) & 0xFFFF; initialip = (addr + 3) & 0xFFFF;
X86EMU_setMemBase((void *) biosmem, SIZE_EMU); X86EMU_setMemBase((void *) biosmem, SIZE_EMU);
for (i = 0; i < 256; i++) for (i = 0; i < 256; i++)
intFuncs[i] = do_int; intFuncs[i] = do_int;
X86EMU_setupIntrFuncs(intFuncs); X86EMU_setupIntrFuncs(intFuncs);
{ {
char *date = "01/01/99"; char *date = "01/01/99";
@@ -648,13 +618,15 @@ void run_bios(struct radeonfb_info *rinfo)
X86_DX = 0x80; X86_DX = 0x80;
X86_EIP = initialip; X86_EIP = initialip;
X86_CS = initialcs; X86_CS = initialcs;
/* Initialize stack and data segment */ /* Initialize stack and data segment */
X86_SS = initialcs; X86_SS = initialcs;
X86_SP = 0xfffe; X86_SP = 0xfffe;
X86_DS = 0x0040; X86_DS = 0x0040;
X86_ES = 0x0000; X86_ES = 0x0000;
/* We need a sane way to return from bios /*
* We need a sane way to return from bios
* execution. A hlt instruction and a pointer * execution. A hlt instruction and a pointer
* to it, both kept on the stack, will do. * to it, both kept on the stack, will do.
*/ */
@@ -665,26 +637,16 @@ void run_bios(struct radeonfb_info *rinfo)
// pushw(0xb890); /* nop, mov ax,#0x13 */ // pushw(0xb890); /* nop, mov ax,#0x13 */
pushw(X86_SS); pushw(X86_SS);
pushw(X86_SP + 2); pushw(X86_SP + 2);
#ifdef DEBUG_X86EMU #ifdef DBG_X86EMU
X86EMU_trace_on(); X86EMU_trace_on();
X86EMU_set_debug(DEBUG_DECODE_F | DEBUG_TRACE_F); X86EMU_set_debug(DEBUG_DECODE_F | DEBUG_TRACE_F);
#endif #endif
dbg("%s: X86EMU entering emulator\r\n", __FUNCTION__); dbg("%s: X86EMU entering emulator\r\n", __FUNCTION__);
//*vblsem = 0; //*vblsem = 0;
X86EMU_exec(); X86EMU_exec();
//*vblsem = 1; //*vblsem = 1;
dbg("%s: X86EMU halted\r\n", __FUNCTION__); dbg("%s: X86EMU halted\r\n", __FUNCTION__);
// biosfn_set_video_mode(0x13); /* 320 x 200 x 256 colors */ // biosfn_set_video_mode(0x13); /* 320 x 200 x 256 colors */
#ifdef USE_SDRAM
#if 0
if (os_magic)
{
memset((char *)biosmem, 0, SIZE_EMU);
Mfree(biosmem);
}
#endif
#else
memset((char *) biosmem, 0, SIZE_EMU); memset((char *) biosmem, 0, SIZE_EMU);
driver_mem_free(biosmem);
#endif /* USE_SDRAM */
} }

1371
x86emu/x86decode.c
View File

File diff suppressed because it is too large Load Diff

28
x86emu/x86ops.c
View File

@@ -79,7 +79,7 @@ extern unsigned decode_rmXX_address(int mod, int rm);
/* constant arrays to do several instructions in just one function */ /* constant arrays to do several instructions in just one function */
#ifdef DEBUG #ifdef DBG_X86EMU
static char *x86emu_GenOpName[8] = { static char *x86emu_GenOpName[8] = {
"ADD", "OR", "ADC", "SBB", "AND", "SUB", "XOR", "CMP"}; "ADD", "OR", "ADC", "SBB", "AND", "SUB", "XOR", "CMP"};
#endif #endif
@@ -160,7 +160,7 @@ static uint32_t (*opcD1_long_operation[])(uint32_t s, uint8_t d) =
sar_long, sar_long,
}; };
#ifdef DEBUG #ifdef DBG_X86EMU
static char *opF6_names[8] = static char *opF6_names[8] =
{ "TEST\t", "", "NOT\t", "NEG\t", "MUL\t", "IMUL\t", "DIV\t", "IDIV\t" }; { "TEST\t", "", "NOT\t", "NEG\t", "MUL\t", "IMUL\t", "DIV\t", "IDIV\t" };
@@ -1284,7 +1284,7 @@ void x86emuOp_opc80_byte_RM_IMM(uint8_t X86EMU_UNUSED(op1))
*/ */
START_OF_INSTR(); START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG #ifdef DBG_X86EMU
if (DEBUG_DECODE()) { if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more /* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings general, so that it is important to leave the strings
@@ -1360,7 +1360,7 @@ void x86emuOp_opc81_word_RM_IMM(uint8_t X86EMU_UNUSED(op1))
*/ */
START_OF_INSTR(); START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG #ifdef DBG_X86EMU
if (DEBUG_DECODE()) { if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more /* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings general, so that it is important to leave the strings
@@ -1470,7 +1470,7 @@ void x86emuOp_opc82_byte_RM_IMM(uint8_t X86EMU_UNUSED(op1))
*/ */
START_OF_INSTR(); START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG #ifdef DBG_X86EMU
if (DEBUG_DECODE()) { if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more /* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings general, so that it is important to leave the strings
@@ -1544,7 +1544,7 @@ void x86emuOp_opc83_word_RM_IMM(uint8_t X86EMU_UNUSED(op1))
*/ */
START_OF_INSTR(); START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG #ifdef DBG_X86EMU
if (DEBUG_DECODE()) { if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more /* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings general, so that it is important to leave the strings
@@ -3070,7 +3070,7 @@ void x86emuOp_opcC0_byte_RM_MEM(uint8_t X86EMU_UNUSED(op1))
*/ */
START_OF_INSTR(); START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG #ifdef DBG_X86EMU
if (DEBUG_DECODE()) { if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more /* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings general, so that it is important to leave the strings
@@ -3145,7 +3145,7 @@ void x86emuOp_opcC1_word_RM_MEM(uint8_t X86EMU_UNUSED(op1))
*/ */
START_OF_INSTR(); START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG #ifdef DBG_X86EMU
if (DEBUG_DECODE()) { if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more /* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings general, so that it is important to leave the strings
@@ -3622,7 +3622,7 @@ void x86emuOp_opcD0_byte_RM_1(uint8_t X86EMU_UNUSED(op1))
*/ */
START_OF_INSTR(); START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG #ifdef DBG_X86EMU
if (DEBUG_DECODE()) { if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more /* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings general, so that it is important to leave the strings
@@ -3693,7 +3693,7 @@ void x86emuOp_opcD1_word_RM_1(uint8_t X86EMU_UNUSED(op1))
*/ */
START_OF_INSTR(); START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG #ifdef DBG_X86EMU
if (DEBUG_DECODE()) { if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more /* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings general, so that it is important to leave the strings
@@ -3795,7 +3795,7 @@ void x86emuOp_opcD2_byte_RM_CL(uint8_t X86EMU_UNUSED(op1))
*/ */
START_OF_INSTR(); START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG #ifdef DBG_X86EMU
if (DEBUG_DECODE()) { if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more /* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings general, so that it is important to leave the strings
@@ -3868,7 +3868,7 @@ void x86emuOp_opcD3_word_RM_CL(uint8_t X86EMU_UNUSED(op1))
*/ */
START_OF_INSTR(); START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG #ifdef DBG_X86EMU
if (DEBUG_DECODE()) { if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more /* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings general, so that it is important to leave the strings
@@ -4852,7 +4852,7 @@ void x86emuOp_opcFE_byte_RM(uint8_t X86EMU_UNUSED(op1))
/* Yet another special case instruction. */ /* Yet another special case instruction. */
START_OF_INSTR(); START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG #ifdef DBG_X86EMU
if (DEBUG_DECODE()) { if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more /* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings general, so that it is important to leave the strings
@@ -4916,7 +4916,7 @@ void x86emuOp_opcFF_word_RM(uint8_t X86EMU_UNUSED(op1))
/* Yet another special case instruction. */ /* Yet another special case instruction. */
START_OF_INSTR(); START_OF_INSTR();
FETCH_DECODE_MODRM(mod, rh, rl); FETCH_DECODE_MODRM(mod, rh, rl);
#ifdef DEBUG #ifdef DBG_X86EMU
if (DEBUG_DECODE()) { if (DEBUG_DECODE()) {
/* XXX DECODE_PRINTF may be changed to something more /* XXX DECODE_PRINTF may be changed to something more
general, so that it is important to leave the strings general, so that it is important to leave the strings

344
x86emu/x86pcibios.c
View File

@@ -2,6 +2,7 @@
#include "pci.h" #include "pci.h"
#include "x86emu.h" #include "x86emu.h"
#include "x86pcibios.h" #include "x86pcibios.h"
#include "x86debug.h"
extern unsigned short offset_port; extern unsigned short offset_port;
@@ -11,232 +12,147 @@ int x86_pcibios_emulator()
unsigned long dev; unsigned long dev;
switch (X86_AX) { switch (X86_AX) {
case PCI_BIOS_PRESENT: case PCI_BIOS_PRESENT:
#ifdef DEBUG_X86EMU_PCI dbg("%s: PCI_BIOS_PRESENT\r\n", __FUNCTION__);
DPRINT("PCI_BIOS_PRESENT\r\n"); X86_AH = 0x00; /* no config space/special cycle support */
#endif X86_AL = 0x01; /* config mechanism 1 */
X86_AH = 0x00; /* no config space/special cycle support */ X86_EDX = 'P' | 'C' << 8 | 'I' << 16 | ' ' << 24;
X86_AL = 0x01; /* config mechanism 1 */ X86_EBX = 0x0210; /* Version 2.10 */
X86_EDX = 'P' | 'C' << 8 | 'I' << 16 | ' ' << 24; X86_ECX = 0xFF00; /* FixME: Max bus number */
X86_EBX = 0x0210; /* Version 2.10 */ X86_EFLAGS &= ~FB_CF; /* clear carry flag */
X86_ECX = 0xFF00; /* FixME: Max bus number */ ret = 1;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */ break;
ret = 1;
break;
case FIND_PCI_DEVICE:
/* FixME: support SI != 0 */
// vendor, device
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX("FIND_PCI_DEVICE vendor ", X86_DX);
DPRINTVALHEX(" device ", X86_CX);
#endif
dev = pci_find_device((unsigned long) X86_DX, ((unsigned long)X86_CX), 0);
if (dev != 0) { case FIND_PCI_DEVICE:
#ifdef DEBUG_X86EMU_PCI /* FixME: support SI != 0 */
DPRINT(" ... OK\r\n"); // vendor, device
#endif dbg("%s: FIND_PCI_DEVICE vendor = %04x, device = %04x\r\n", __FUNCTION__, X86_DX, X86_CX);
X86_BH = PCI_BUS_FROM_HANDLE(dev); dev = pci_find_device((unsigned long) X86_DX, ((unsigned long) X86_CX), 0);
//X86_BH = (char)(dev >> 16) / PCI_MAX_FUNCTION); // dev->bus->secondary;
X86_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev); if (dev != 0)
//X86_BL = (char)dev; // dev->path.u.pci.devfn; {
X86_AH = SUCCESSFUL; dbg("%s: ... OK\r\n", __FUNCTION__);
X86_EFLAGS &= ~FB_CF; /* clear carry flag */ X86_BH = PCI_BUS_FROM_HANDLE(dev);
ret = 1; //X86_BH = (char)(dev >> 16) / PCI_MAX_FUNCTION); // dev->bus->secondary;
} else { X86_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev);
#ifdef DEBUG_X86EMU_PCI //X86_BL = (char)dev; // dev->path.u.pci.devfn;
DPRINT(" ... error\r\n"); X86_AH = SUCCESSFUL;
#endif X86_EFLAGS &= ~FB_CF; /* clear carry flag */
X86_AH = DEVICE_NOT_FOUND; ret = 1;
X86_EFLAGS |= FB_CF; /* set carry flag */ } else {
ret = 0; dbg("%s: ... error\r\n", __FUNCTION__);
} X86_AH = DEVICE_NOT_FOUND;
break; X86_EFLAGS |= FB_CF; /* set carry flag */
case FIND_PCI_CLASS_CODE: ret = 0;
/* FixME: support SI != 0 */ }
#ifdef DEBUG_X86EMU_PCI break;
DPRINTVALHEX("FIND_PCI_CLASS_CODE ", X86_ECX);
#endif case FIND_PCI_CLASS_CODE:
dev = pci_find_classcode(X86_ECX, 0); /* FixME: support SI != 0 */
if (dev != 0) { dbg("%s: FIND_PCI_CLASS_CODE %x\r\n", __FUNCTION__, X86_ECX);
#ifdef DEBUG_X86EMU_PCI dev = pci_find_classcode(X86_ECX, 0);
DPRINT(" ... OK\r\n"); if (dev != 0) {
#endif dbg("%s: ... OK\r\n", __FUNCTION__);
X86_BH = PCI_BUS_FROM_HANDLE(dev); X86_BH = PCI_BUS_FROM_HANDLE(dev);
X86_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev); X86_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev);
X86_AH = SUCCESSFUL; X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */ X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1; ret = 1;
} else { }
#ifdef DEBUG_X86EMU_PCI else
DPRINT(" ... error\r\n"); {
#endif dbg("%s: ... error\r\n", __FUNCTION__);
X86_AH = DEVICE_NOT_FOUND; X86_AH = DEVICE_NOT_FOUND;
X86_EFLAGS |= FB_CF; /* set carry flag */ X86_EFLAGS |= FB_CF; /* set carry flag */
ret = 0; ret = 0;
} }
break; break;
case READ_CONFIG_BYTE:
// bus, devfn case READ_CONFIG_BYTE:
#ifdef DEBUG_X86EMU_PCI // bus, devfn
DPRINTVAL("READ_CONFIG_BYTE bus ", X86_BH); dbg("%s: READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x\r\n", __FUNCTION__, X86_BH, X86_BL, X86_DI);
DPRINTVAL(" devfn ", X86_BL); X86_CL = pci_read_config_byte(dev, X86_DI);
DPRINTVALHEX(" reg ", X86_DI); dbg("%s: value = %x\r\n", __FUNCTION__, X86_CL);
#endif
X86_CL = pci_read_config_byte(dev, X86_DI);
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX(" value ", X86_CL);
DPRINT("\r\n");
#endif
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case READ_CONFIG_WORD:
// bus, devfn
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL("READ_CONFIG_WORD bus ", X86_BH);
DPRINTVAL(" devfn ", X86_BL);
DPRINTVALHEX(" reg ", X86_DI);
#endif
if(X86_DI == PCIBAR1)
X86_CX = offset_port + 1;
else
X86_CX = pci_read_config_word(dev, X86_DI);
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX(" value ", X86_CX);
DPRINT("\r\n");
#endif
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case READ_CONFIG_DWORD:
// bus, devfn
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL("READ_CONFIG_DWORD bus ", X86_BH);
DPRINTVAL(" devfn ", X86_BL);
DPRINTVALHEX(" reg ", X86_DI);
#endif
if(X86_DI == PCIBAR1)
X86_CX = (unsigned long)offset_port+1;
else
X86_ECX = pci_read_config_longword(dev, X86_DI);
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX(" value ", X86_ECX);
DPRINT("\r\n");
#endif
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case WRITE_CONFIG_BYTE:
// bus, devfn
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL("READ_CONFIG_BYTE bus ", X86_BH);
DPRINTVAL(" devfn ", X86_BL);
DPRINTVALHEX(" reg ", X86_DI);
DPRINTVALHEX(" value ", X86_CL);
#endif
if ((ret = pci_write_config_byte(dev, X86_DI, X86_CL)) == 0)
{
#ifdef DEBUG_X86EMU_PCI
DPRINT(" ... OK\r\n");
#endif
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
} else {
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL(" ... error ", ret);
DPRINT("\r\n");
#endif
X86_AH = DEVICE_NOT_FOUND;
X86_EFLAGS |= FB_CF; /* set carry flag */
ret = 0;
}
break;
case WRITE_CONFIG_WORD:
// bus, devfn
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL("WRITE_CONFIG_WORD bus ", X86_BH);
DPRINTVAL(" devfn ", X86_BL);
DPRINTVALHEX(" reg ", X86_DI);
DPRINTVALHEX(" value ", X86_CX);
#endif
if(X86_DI == PCIBAR1) {
offset_port = X86_CX;
#ifdef DEBUG_X86EMU_PCI
DPRINT(" ... OK\r\n");
#endif
X86_AH = SUCCESSFUL; X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */ X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1; ret = 1;
break; break;
}
if ((ret = pci_write_config_word(dev, X86_DI, X86_CX)) == 0) case READ_CONFIG_WORD:
{ // bus, devfn
#ifdef DEBUG_X86EMU_PCI dbg("%s: READ_CONFIG_WORD bus = %x, devfn = %x, reg = %x\r\n", __FUNCTION__, X86_BH, X86_BL, X86_DI);
DPRINT(" ... OK\r\n"); if(X86_DI == PCIBAR1)
#endif X86_CX = offset_port + 1;
X86_AH = SUCCESSFUL; else
X86_EFLAGS &= ~FB_CF; /* clear carry flag */ X86_CX = pci_read_config_word(dev, X86_DI);
ret = 1; dbg("%s: value = %x\r\n", __FUNCTION__, X86_CX);
} else {
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL(" ... error ", ret);
DPRINT("\r\n");
#endif
X86_AH = DEVICE_NOT_FOUND;
X86_EFLAGS |= FB_CF; /* set carry flag */
ret = 0;
}
break;
case WRITE_CONFIG_DWORD:
// bus, devfn
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL("WRITE_CONFIG_DWORD bus ", X86_BH);
DPRINTVAL(" devfn ", X86_BL);
DPRINTVALHEX(" reg ", X86_DI);
DPRINTVALHEX(" value ", X86_ECX);
#endif
if(X86_DI == PCIBAR1) {
offset_port = (unsigned short)X86_ECX & 0xFFFC;
#ifdef DEBUG_X86EMU_PCI
DPRINT(" ... OK\r\n");
#endif
X86_AH = SUCCESSFUL; X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */ X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1; ret = 1;
break; break;
}
if ((ret = pci_write_config_longword(dev, X86_DI, X86_ECX)) == 0) case READ_CONFIG_DWORD:
{ // bus, devfn
#ifdef DEBUG_X86EMU_PCI dbg("%s: READ_CONFIG_DWORD bus = %x, devfn = %x, reg = %x\r\n", __FUNCTION__, X86_BH, X86_BL, X86_DI);
DPRINT(" ... OK\r\n"); if (X86_DI == PCIBAR1)
#endif X86_CX = (unsigned long) offset_port + 1;
else
X86_ECX = pci_read_config_longword(dev, X86_DI);
dbg("%s: value = %x\r\n", __FUNCTION__, X86_ECX);
X86_AH = SUCCESSFUL; X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */ X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1; ret = 1;
} break;
else
{ case WRITE_CONFIG_BYTE:
#ifdef DEBUG_X86EMU_PCI // bus, devfn
DPRINTVAL(" ... error ", ret); dbg("%s: READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x\r\n", __FUNCTION__, X86_BH, X86_BL, X86_CL);
DPRINT("\r\n"); pci_write_config_byte(dev, X86_DI, X86_CL);
#endif X86_AH = SUCCESSFUL;
X86_AH = DEVICE_NOT_FOUND; X86_EFLAGS &= ~FB_CF; /* clear carry flag */
X86_EFLAGS |= FB_CF; /* set carry flag */ ret = 1;
ret = 0; break;
}
break; case WRITE_CONFIG_WORD:
default: // bus, devfn
#ifdef DEBUG_X86EMU_PCI dbg("%s: WRITE_CONFIG_WORD bus = %x, devfn = %x, reg = %x, value = %x\r\n", X86_BH, X86_BL, X86_DI, X86_CX);
DPRINT("PCI_BIOS FUNC_NOT_SUPPORTED\r\n"); if (X86_DI == PCIBAR1)
#endif {
X86_AH = FUNC_NOT_SUPPORTED; offset_port = X86_CX;
X86_EFLAGS |= FB_CF; X86_AH = SUCCESSFUL;
break; X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
}
pci_write_config_word(dev, X86_DI, X86_CX);
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case WRITE_CONFIG_DWORD:
// bus, devfn
dbg("%s: WRITE_CONFIG_DWORD bus = %x, devfn = %x, value = %x\r\n", __FUNCTION__,
X86_BH, X86_BL, X86_DI, X86_ECX);
if (X86_DI == PCIBAR1)
{
offset_port = (unsigned short) X86_ECX & 0xFFFC;
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
}
pci_write_config_longword(dev, X86_DI, X86_ECX);
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
default:
dbg("%s: PCI_BIOS FUNC_NOT_SUPPORTED\r\n", __FUNCTION__);
X86_AH = FUNC_NOT_SUPPORTED;
X86_EFLAGS |= FB_CF;
break;
} }
return ret; return ret;