diff --git a/BaS_gcc/Makefile b/BaS_gcc/Makefile
index 226628d..4939114 100644
--- a/BaS_gcc/Makefile
+++ b/BaS_gcc/Makefile
@@ -31,12 +31,13 @@ RANLIB=$(TCPREFIX)ranlib
 NATIVECC=gcc
 
 INCLUDE=-Iinclude
-CFLAGS=-mcpu=5474\
-		-Wall\
+CFLAGS=-mcpu=5474 \
+		-Wall \
+		-Os \
 		-g \
-		-fomit-frame-pointer\
-		-ffreestanding\
-		-fleading-underscore\
+		-fomit-frame-pointer \
+		-ffreestanding \
+		-fleading-underscore \
 		-Wa,--register-prefix-optional
 
 SRCDIR=sources
diff --git a/BaS_gcc/sources/pci.c b/BaS_gcc/sources/pci.c
index 746d1dd..b2ded9c 100644
--- a/BaS_gcc/sources/pci.c
+++ b/BaS_gcc/sources/pci.c
@@ -670,6 +670,21 @@ void init_xlbus_arbiter(void)
 	MCF_XLB_XARB_ADRTO = 0x1fffff;
 	MCF_XLB_XARB_DATTO = 0x1fffff;
 	MCF_XLB_XARB_BUSTO = 0xffffff;
+
+	/*
+	 * set arbitration priorities for XLBUS masters
+	 *
+	 * M0 = ColdFire core
+	 * M2 = Multichannel DMA
+	 * M3 = PCI target interface
+	 */
+	
+	MCF_XLB_XARB_PRIEN = MCF_XLB_XARB_PRIEN_M0 |	/* activate programmed priority for Coldfire core */
+					MCF_XLB_XARB_PRIEN_M2 |			/* activate programmed priority for Multichannel DMA */
+					MCF_XLB_XARB_PRIEN_M3;			/* activate programmed priority for PCI target interface */
+	MCF_XLB_XARB_PRI = MCF_XLB_XARB_PRI_M0P(3) |	/* Coldfire core gets lowest */
+					MCF_XLB_XARB_PRI_M2P(5) |		/* Multichannel DMA mid priority */
+					MCF_XLB_XARB_PRI_M3P(7);		/* PCI target interface is highest priority */
 }