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Removed old FireTOS code.

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This commit is contained in:
Vincent Rivière
2012-10-22 18:15:01 +00:00
parent 76e41490fd
commit cbc695294e
2 changed files with 25 additions and 45 deletions
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54
BaS_GNU/BaS_GNU/sources/BaS.c
View File

@@ -39,44 +39,32 @@ void BaS(void)
sd_card_idle(); sd_card_idle();
} }
/* copy tos */ /* Initialize the NVRAM */
if (DIP_SWITCH & (1 << 6)) MCF_PSC3_PSCTB_8BIT = 'ACPF';
wait_10ms();
MCF_PSC0_PSCTB_8BIT = 'PIC ';
MCF_PSC0_PSCTB_8BIT = MCF_PSC3_PSCRB_8BIT;
MCF_PSC0_PSCTB_8BIT = MCF_PSC3_PSCRB_8BIT;
MCF_PSC0_PSCTB_8BIT = MCF_PSC3_PSCRB_8BIT;
MCF_PSC0_PSCTB_8BIT = 0x0d0a;
MCF_PSC3_PSCTB_8BIT = 0x01; /* request RTC data */
if (MCF_PSC3_PSCRB_8BIT == 0x81)
{ {
MCF_PSC3_PSCTB_8BIT = 'ACPF'; for (i = 0; i < 64; i++)
wait_10ms();
MCF_PSC0_PSCTB_8BIT = 'PIC ';
MCF_PSC0_PSCTB_8BIT = MCF_PSC3_PSCRB_8BIT;
MCF_PSC0_PSCTB_8BIT = MCF_PSC3_PSCRB_8BIT;
MCF_PSC0_PSCTB_8BIT = MCF_PSC3_PSCRB_8BIT;
MCF_PSC0_PSCTB_8BIT = 0x0d0a;
MCF_PSC3_PSCTB_8BIT = 0x01; /* request RTC data */
if (MCF_PSC3_PSCRB_8BIT == 0x81)
{ {
for (i = 0; i < 64; i++) * (uint8_t *) 0xffff8963 = MCF_PSC3_PSCRB_8BIT; /* Copy the NVRAM data from the PIC to the FPGA */
{
* (uint8_t *) 0xffff8963 = MCF_PSC3_PSCRB_8BIT; /* Copy the NVRAM data from the PIC to the FPGA */
}
}
/* copy EMUTOS */
src = (uint8_t *) 0xe0600000L;
while (src < (uint8_t *) 0xe0700000L)
{
*dst++ = *src++;
} }
} }
else
/* copy EMUTOS */
src = (uint8_t *) 0xe0600000L;
while (src < (uint8_t *) 0xe0700000L)
{ {
/* copy FireTOS */ *dst++ = *src++;
src = (uint8_t *) 0xe0400000L;
while (src < (uint8_t *) 0xe0500000L)
{
*dst++ = *src++;
}
} }
/* we have copied a code area, so flush the caches */ /* we have copied a code area, so flush the caches */

16
BaS_GNU/BaS_GNU/sources/sysinit.c
View File

@@ -709,22 +709,14 @@ void initialize_hardware(void) {
init_slt(); init_slt();
init_fbcs(); init_fbcs();
init_ddram(); init_ddram();
init_PCI();
/* do not initialize PCI if DIP switch 5 = on */
if (DIP_SWITCH & (1 << 6))
init_PCI();
init_fpga(); init_fpga();
init_pll(); init_pll();
init_video_ddr(); init_video_ddr();
dvi_on(); dvi_on();
test_upd720101();
/* do not initialize ports if DIP switch 5 = on */ //video_1280_1024();
if (DIP_SWITCH & (1 << 6)) { init_ac97();
test_upd720101();
/* video_1280_1024(); */
init_ac97();
}
/* copy the BaS code contained in flash to its final location */ /* copy the BaS code contained in flash to its final location */
src = (uint32_t *)BAS_LMA; src = (uint32_t *)BAS_LMA;