diff --git a/BaS_gcc/Makefile b/BaS_gcc/Makefile index 5de21d4..ef428c1 100644 --- a/BaS_gcc/Makefile +++ b/BaS_gcc/Makefile @@ -43,7 +43,7 @@ TRGTDIRS= ./firebee ./m5484lite OBJDIRS=$(patsubst %, %/objs,$(TRGTDIRS)) TOOLDIR=util -VPATH=dma:exe:flash:fs:if:kbd:pci:spi:sys:usb:net:util:xhdi +VPATH=dma exe flash fs if kbd pci spi sys usb net util xhdi # Linker control file. The final $(LDCFILE) is intermediate only (preprocessed version of $(LDCSRC) LDCFILE=bas.lk @@ -61,7 +61,6 @@ BASFLASH_EXEC=basflash.$(EXE) CSRCS= \ sysinit.c \ init_fpga.c \ - mmu.c \ fault_vectors.c \ interrupts.c \ bas_printf.c \ @@ -102,8 +101,7 @@ ASRCS= \ startcf.S \ printf_helper.S \ exceptions.S \ - supervisor.S \ - illegal_instruction.S \ + mmu.S \ xhdi_vec.S SRCS=$(ASRCS) $(CSRCS) @@ -228,7 +226,7 @@ indent: $(CSRCS) .PHONY: tags tags: - ctags sources/* include/* + ctags $(patsubst %,%/*,$(VPATH)) .PHONY: printvars printvars: diff --git a/BaS_gcc/bas.lk.in b/BaS_gcc/bas.lk.in index 689febe..54bf34f 100644 --- a/BaS_gcc/bas.lk.in +++ b/BaS_gcc/bas.lk.in @@ -37,8 +37,6 @@ SECTIONS OBJDIR/wait.o(.text) OBJDIR/exceptions.o(.text) OBJDIR/interrupts.o(.text) - OBJDIR/illegal_instruction.o(.text) - OBJDIR/supervisor.o(.text) OBJDIR/mmu.o(.text) OBJDIR/BaS.o(.text) diff --git a/BaS_gcc/flash_scripts/flash_firebee_etos.bdm b/BaS_gcc/flash_scripts/flash_firebee_etos.bdm index ff6dda5..df3d892 100755 --- a/BaS_gcc/flash_scripts/flash_firebee_etos.bdm +++ b/BaS_gcc/flash_scripts/flash_firebee_etos.bdm @@ -78,4 +78,4 @@ erase-wait 0xe0000000 erase 0xe0000000 0x378000 erase-wait 0xe0000000 -load -v emutos.elf +load -v emutos-firebee.elf diff --git a/BaS_gcc/include/MCF5475_MMU.h b/BaS_gcc/include/MCF5475_MMU.h index 16794da..334ad28 100644 --- a/BaS_gcc/include/MCF5475_MMU.h +++ b/BaS_gcc/include/MCF5475_MMU.h @@ -1,79 +1,79 @@ -/* Coldfire C Header File - * Copyright Freescale Semiconductor Inc - * All rights reserved. - * - * 2008/05/23 Revision: 0.81 - * - * (c) Copyright UNIS, a.s. 1997-2008 - * UNIS, a.s. - * Jundrovska 33 - * 624 00 Brno - * Czech Republic - * http : www.processorexpert.com - * mail : info@processorexpert.com - */ - -#ifndef __MCF5475_MMU_H__ -#define __MCF5475_MMU_H__ - - -/********************************************************************* -* -* Memory Management Unit (MMU) -* -*********************************************************************/ - -/* Register read/write macros */ - -/* note the uint32_t_a - this is to avoid gcc warnings about pointer aliasing */ -#define MCF_MMU_MMUCR (*(volatile uint32_t_a*)(&_MMUBAR[0])) -#define MCF_MMU_MMUOR (*(volatile uint32_t*)(&_MMUBAR[0x4])) -#define MCF_MMU_MMUSR (*(volatile uint32_t*)(&_MMUBAR[0x8])) -#define MCF_MMU_MMUAR (*(volatile uint32_t*)(&_MMUBAR[0x10])) -#define MCF_MMU_MMUTR (*(volatile uint32_t*)(&_MMUBAR[0x14])) -#define MCF_MMU_MMUDR (*(volatile uint32_t*)(&_MMUBAR[0x18])) - - -/* Bit definitions and macros for MCF_MMU_MMUCR */ -#define MCF_MMU_MMUCR_EN (0x1) -#define MCF_MMU_MMUCR_ASM (0x2) - -/* Bit definitions and macros for MCF_MMU_MMUOR */ -#define MCF_MMU_MMUOR_UAA (0x1) -#define MCF_MMU_MMUOR_ACC (0x2) -#define MCF_MMU_MMUOR_RW (0x4) -#define MCF_MMU_MMUOR_ADR (0x8) -#define MCF_MMU_MMUOR_ITLB (0x10) -#define MCF_MMU_MMUOR_CAS (0x20) -#define MCF_MMU_MMUOR_CNL (0x40) -#define MCF_MMU_MMUOR_CA (0x80) -#define MCF_MMU_MMUOR_STLB (0x100) -#define MCF_MMU_MMUOR_AA(x) (((x)&0xFFFF)<<0x10) - -/* Bit definitions and macros for MCF_MMU_MMUSR */ -#define MCF_MMU_MMUSR_HIT (0x2) -#define MCF_MMU_MMUSR_WF (0x8) -#define MCF_MMU_MMUSR_RF (0x10) -#define MCF_MMU_MMUSR_SPF (0x20) - -/* Bit definitions and macros for MCF_MMU_MMUAR */ -#define MCF_MMU_MMUAR_FA(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_MMU_MMUTR */ -#define MCF_MMU_MMUTR_V (0x1) -#define MCF_MMU_MMUTR_SG (0x2) -#define MCF_MMU_MMUTR_ID(x) (((x)&0xFF)<<0x2) -#define MCF_MMU_MMUTR_VA(x) (((x)&0x3FFFFF)<<0xA) - -/* Bit definitions and macros for MCF_MMU_MMUDR */ -#define MCF_MMU_MMUDR_LK (0x2) -#define MCF_MMU_MMUDR_X (0x4) -#define MCF_MMU_MMUDR_W (0x8) -#define MCF_MMU_MMUDR_R (0x10) -#define MCF_MMU_MMUDR_SP (0x20) -#define MCF_MMU_MMUDR_CM(x) (((x)&0x3)<<0x6) -#define MCF_MMU_MMUDR_SZ(x) (((x)&0x3)<<0x8) -#define MCF_MMU_MMUDR_PA(x) (((x)&0x3FFFFF)<<0xA) - - -#endif /* __MCF5475_MMU_H__ */ +/* Coldfire C Header File + * Copyright Freescale Semiconductor Inc + * All rights reserved. + * + * 2008/05/23 Revision: 0.81 + * + * (c) Copyright UNIS, a.s. 1997-2008 + * UNIS, a.s. + * Jundrovska 33 + * 624 00 Brno + * Czech Republic + * http : www.processorexpert.com + * mail : info@processorexpert.com + */ + +#ifndef __MCF5475_MMU_H__ +#define __MCF5475_MMU_H__ + + +/********************************************************************* +* +* Memory Management Unit (MMU) +* +*********************************************************************/ + +/* Register read/write macros */ + +/* note the uint32_t_a - this is to avoid gcc warnings about pointer aliasing */ +#define MCF_MMU_MMUCR (*(volatile uint32_t_a*)(&_MMUBAR[0])) +#define MCF_MMU_MMUOR (*(volatile uint32_t_a*)(&_MMUBAR[0x4])) +#define MCF_MMU_MMUSR (*(volatile uint32_t_a*)(&_MMUBAR[0x8])) +#define MCF_MMU_MMUAR (*(volatile uint32_t_a*)(&_MMUBAR[0x10])) +#define MCF_MMU_MMUTR (*(volatile uint32_t_a*)(&_MMUBAR[0x14])) +#define MCF_MMU_MMUDR (*(volatile uint32_t_a*)(&_MMUBAR[0x18])) + + +/* Bit definitions and macros for MCF_MMU_MMUCR */ +#define MCF_MMU_MMUCR_EN (0x1) +#define MCF_MMU_MMUCR_ASM (0x2) + +/* Bit definitions and macros for MCF_MMU_MMUOR */ +#define MCF_MMU_MMUOR_UAA (0x1) +#define MCF_MMU_MMUOR_ACC (0x2) +#define MCF_MMU_MMUOR_RW (0x4) +#define MCF_MMU_MMUOR_ADR (0x8) +#define MCF_MMU_MMUOR_ITLB (0x10) +#define MCF_MMU_MMUOR_CAS (0x20) +#define MCF_MMU_MMUOR_CNL (0x40) +#define MCF_MMU_MMUOR_CA (0x80) +#define MCF_MMU_MMUOR_STLB (0x100) +#define MCF_MMU_MMUOR_AA(x) (((x)&0xFFFF)<<0x10) + +/* Bit definitions and macros for MCF_MMU_MMUSR */ +#define MCF_MMU_MMUSR_HIT (0x2) +#define MCF_MMU_MMUSR_WF (0x8) +#define MCF_MMU_MMUSR_RF (0x10) +#define MCF_MMU_MMUSR_SPF (0x20) + +/* Bit definitions and macros for MCF_MMU_MMUAR */ +#define MCF_MMU_MMUAR_FA(x) (((x)&0xFFFFFFFF)<<0) + +/* Bit definitions and macros for MCF_MMU_MMUTR */ +#define MCF_MMU_MMUTR_V (0x1) +#define MCF_MMU_MMUTR_SG (0x2) +#define MCF_MMU_MMUTR_ID(x) (((x)&0xFF)<<0x2) +#define MCF_MMU_MMUTR_VA(x) (((x)&0x3FFFFF)<<0xA) + +/* Bit definitions and macros for MCF_MMU_MMUDR */ +#define MCF_MMU_MMUDR_LK (0x2) +#define MCF_MMU_MMUDR_X (0x4) +#define MCF_MMU_MMUDR_W (0x8) +#define MCF_MMU_MMUDR_R (0x10) +#define MCF_MMU_MMUDR_SP (0x20) +#define MCF_MMU_MMUDR_CM(x) (((x)&0x3)<<0x6) +#define MCF_MMU_MMUDR_SZ(x) (((x)&0x3)<<0x8) +#define MCF_MMU_MMUDR_PA(x) (((x)&0x3FFFFF)<<0xA) + + +#endif /* __MCF5475_MMU_H__ */ diff --git a/BaS_gcc/include/mmu.h b/BaS_gcc/include/mmu.h index da7a6c7..ac8d5b4 100644 --- a/BaS_gcc/include/mmu.h +++ b/BaS_gcc/include/mmu.h @@ -24,6 +24,8 @@ #ifndef _MMU_H_ #define _MMU_H_ +#include "bas_types.h" + #define SCA_PAGE_ID 6 /* indicates video memory page */ /* @@ -33,6 +35,6 @@ extern long video_tlb; extern long video_sbt; extern void mmu_init(void); -extern void mmutr_miss(void); +extern void mmutr_miss(uint32_t addresss); #endif /* _MMU_H_ */ diff --git a/BaS_gcc/sys/BaS.c b/BaS_gcc/sys/BaS.c index db0cfba..a58ac7e 100644 --- a/BaS_gcc/sys/BaS.c +++ b/BaS_gcc/sys/BaS.c @@ -254,7 +254,7 @@ void BaS(void) xprintf("finished\r\n"); xprintf("enable MMU: "); - MCF_MMU_MMUCR = MCF_MMU_MMUCR_EN; /* MMU on */ + MCF_MMU_MMUCR = MCF_MMU_MMUCR_EN; /* MMU on */ NOP(); /* force pipeline sync */ xprintf("finished\r\n"); diff --git a/BaS_gcc/sys/exceptions.S b/BaS_gcc/sys/exceptions.S index 05fb276..11340ab 100644 --- a/BaS_gcc/sys/exceptions.S +++ b/BaS_gcc/sys/exceptions.S @@ -27,23 +27,19 @@ #include "m5484l.h" #endif /* MACHINE_FIREBEE */ - .extern __Bas_base .extern __SUP_SP .extern _rom_entry .extern __RAMBAR0 - .extern _rt_cacr .extern _rt_mod .extern _rt_ssp .extern _rt_usp .extern _rt_vbr - .extern _illegal_instruction - .extern _privileg_violation .extern _mmutr_miss .extern __MBAR .extern __MMUBAR .extern _video_tlb .extern _video_sbt - .extern cpusha + .extern _flush_and_invalidate_caches .extern _xhdi_sd_install /* trap #0 exception vector for installation of xhdi SD card driver */ /* PCI interrupt handlers */ @@ -181,11 +177,8 @@ #define MCF_MMU_MMUDR_PA(x) (((x)&0x3FFFFF)<<0xA) #define std_mmutr (MCF_MMU_MMUTR_SG|MCF_MMU_MMUTR_V) -#define mmuord_d ( MCF_MMU_MMUOR_ACC|MCF_MMU_MMUOR_UAA) -#define mmuord_i (MCF_MMU_MMUOR_ITLB|MCF_MMU_MMUOR_ACC|MCF_MMU_MMUOR_UAA) #define writethrough_mmudr (MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(00)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X) #define copyback_mmudr (MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(01)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X) -#define nocache_precise_mmudr (MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(10)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X) // equates for (experimental) video page copying via Coldfire DMA .equ MCD_SINGLE_DMA, 0x100 @@ -216,10 +209,6 @@ /**********************************************************/ .altmacro .macro irq vector,int_mask,clr_int - local irq_protect - local sev_supint - local irq_end - move.w #0x2700,sr // disable interrupt subq.l #8,a7 movem.l d0/a5,(a7) // save registers @@ -227,57 +216,11 @@ lea MCF_EPORT_EPFR,a5 move.b #\clr_int,(a5) // clear int pending -#if MACHINE_FIREBEE -// test for protect mode. Only for FireBee (m5484LITE has no dip switch) - move.b DIP_SWITCHa,d0 - btst #7,d0 - bne irq_protect // yes -#endif /* MACHINE_FIREBEE */ - movem.l (a7),d0/a5 // restore registers addq.l #8,a7 move.l \vector,-(a7) move #0x2\int_mask\()00,sr rts - -#if MACHINE_FIREBEE -irq_protect: - move.l usp,a5 // get usp - tst.b _rt_mod // supervisor mode active? - bne sev_supint // yes -> - mov3q.l #-1,_rt_mod // enable supervisor mode - move.l a5,_rt_usp // save rt_usp - move.l _rt_ssp,a5 // get rt_ssp -#ifdef cf_stack - move.l 12(a7),-(a5) // transfer pc - move.l 8(a7),-(a5) // sr,vec -#else - move.w 8(a7),-(a5) // vector no - move.l 12(a7),-(a5) // pc verschieben - move.w 10(a7),-(a5) // sr verschieben -#endif - bra irq_end -sev_supint: -#ifdef cf_stack - move.l 12(a7),-(a5) // pc transferieren - move.l 8(a7),-(a5) // sr,vec - bset #5,2(a5) // auf super setzen -#else - move.w 8(a7),-(a5) // vector nr. - move.l 12(a7),-(a5) // pc verschieben - move.w 10(a7),-(a5) // sr verschieben - bset #5,(a5) // auf super -#endif /* cf_stack */ -irq_end: - move.l a5,usp // usp setzen - lea \vector,a5 - adda.l _rt_vbr,a5 - move.l (a5),12(a7) // vectoradresse eintragen - move.b #\int_mask,10(a7) // intmaske setzen - movem.l (a7),d0/a5 // register zur�ck - addq.l #8,a7 - rte // und weg -#endif /* MACHINE_FIREBEE */ .endm /* @@ -327,58 +270,12 @@ init_vec_loop: lea access(pc),a1 // set illegal access exception handler move.l a1,0x08(a0) -#ifdef MACHINE_FIREBEE /* only the FireBee has a dip switch */ - move.b DIP_SWITCHa,d0 // ++ vr - btst #7,d0 - beq no_protect_vectors -#elif MACHINE_M5484LITE - bra no_protect_vectors -#endif /* MACHINE_FIREBEE */ - -#ifdef MACHINE_FIREBEE /* protect mode only enabled for FireBee */ - lea _illegal_instruction(pc),a1 - move.l a1,0x0c(a0) - lea _illegal_instruction(pc),a1 - move.l a1,0x10(a0) - lea zero_divide(pc),a1 - move.l a1,0x14(a0) - lea _privileg_violation(pc),a1 - move.l a1,0x20(a0) - lea linea(pc),a1 - move.l a1,0x28(a0) - lea linef(pc),a1 - move.l a1,0x2c(a0) - lea format(pc),a1 - move.l a1,0x38(a0) - - // floating point overflow - lea flpoow(pc),a1 - move.l a1,0xc0(a0) - lea flpoow(pc),a1 - move.l a1,0xc4(a0) - lea flpoow(pc),a1 - move.l a1,0xc8(a0) - lea flpoow(pc),a1 - move.l a1,0xcc(a0) - lea flpoow(pc),a1 - move.l a1,0xd0(a0) - lea flpoow(pc),a1 - move.l a1,0xd4(a0) - lea flpoow(pc),a1 - move.l a1,0xd8(a0) - lea flpoow(pc),a1 - move.l a1,0xdc(a0) - -#endif /* MACHINE_FIREBEE */ - - -no_protect_vectors: - // trap #0 (without any parameters for now) is used to provide BaS' XHDI // routine address to EmuTOS. lea _xhdi_sd_install,a1 move.l a1,0x80(a0) // trap #0 exception vector +#ifdef MACHINE_FIREBEE // ACP interrupts 1-7 (user-defined, generated by FPGA on the FireBee, M5484LITE has irq7 and irq5 for PCI) lea irq1(pc),a1 move.l a1,0x104(a0) @@ -395,11 +292,6 @@ no_protect_vectors: lea irq7(pc),a1 move.l a1,0x11c(a0) -/* - * m5448LITE has neither PIC nor emulated VIDEL, so we do nothing special for it here which keeps the - * std_exc_vec in place we set earlier - */ -#ifdef MACHINE_FIREBEE // install PSC vectors (used for PIC communication on the FireBee) lea handler_psc3(pc),a1 // PSC3 interrupt source = 32 @@ -420,13 +312,6 @@ std_exc_vec: move.w #0x2700,sr // disable interrupt subq.l #8,a7 movem.l d0/a5,(sp) // save registers - -#ifdef MACHINE_FIREBEE - move.b DIP_SWITCHa,d0 // "protect mode"? - btst #7,d0 - bne stv_protect // yes -#endif /* MACHINE_FIREBEE */ - move.w 8(sp),d0 // fetch vector and.l #0x3fc,d0 // mask out vector number @@ -469,60 +354,9 @@ noprint: rts // jump to exception routine exception_text: - .ascii "EXCEPTION %d caught at %p" + .ascii "DEBUG: EXCEPTION %d caught at %p" .byte 13, 10, 0 - -#ifdef MACHINE_FIREBEE -stv_protect: - move.l usp,a5 // usp holen - tst.b _rt_mod // supervisor? - bne sev_sup // ja -> - mov3q.l #-1,_rt_mod // auf supervisor setzen - move.l a5,_rt_usp // rt_usp speichern - move.l _rt_ssp,a5 // rt_ssp holen -#ifdef cf_stack - move.l 12(a7),-(a5) // pc transferieren - move.l 8(a7),d0 // sr holen - move.l d0,-(a5) // sr transferieren - swap d0 // vec -> lw -#else - move.w 8(a7),d0 // vector holen - move.w d0,-(a5) // ablegen - move.l 12(a7),-(a5) // pc transferieren - move.w 10(a7),-(a5) // sr transferieren -#endif - move.l a5,usp // usp setzen - and.l #0x3fc,d0 // vector nummer ausmaskieren - add.l _rt_vbr,d0 // + basis - move.l d0,a5 - move.l (a5),12(a7) // hier geht's weiter - movem.l (a7),d0/a5 // register zur�ck - addq.l #8,a7 - rte // und weg - -sev_sup: -#ifdef cf_stack - move.l 12(a7),-(a5) // pc transferieren - move.l 8(a7),d0 // sr holen - bset #13,d0 // war aus rt super - move.l d0,-(a5) // sr transferieren - swap d0 // vec -> lw -#else - move.w 8(a7),d0 // vector holen - move.w d0,-(a5) // ablegen - move.l 12(a7),-(a5) // pc transferieren - move.w 10(a7),-(a5) // sr transferieren - bset #5,(a5) // war aus super -#endif - move.l a5,usp // usp setzen - and.l #0x3fc,d0 // vector nummer ausmaskieren - add.l _rt_vbr,d0 // + basis - move.l d0,a5 - move.l (a5),12(a7) // hier geht's weiter - movem.l (a7),d0/a5 // register zurück - addq.l #8,a7 - rte // und weg -#endif /* MACHINE_FIREBEE */ + .align 4 reset_vector: move.w #0x2700,sr // disable interrupt @@ -557,13 +391,15 @@ access_mmu: cmp.l #__FASTRAM_END,d0 // above max User RAM area? bge bus_error // -> bus error - lea -4*4(sp),sp // save gcc scratch registers - movem.l d0-d1/a0-a1,(sp) + lea -5*4(sp),sp // save gcc scratch registers + movem.l d0-d1/a0-a2,(sp) + move.l d0,-(sp) // fault address jsr _mmutr_miss // else we have an MMU TLB miss + addq.l #4,sp - movem.l (sp),d0-d1/a0-a1 // restore gcc scratch registers - lea 4*4(sp),sp + movem.l (sp),d0-d1/a0-a2 // restore gcc scratch registers + lea 5*4(sp),sp move.l (sp)+,d0 // restore register @@ -603,7 +439,8 @@ zd_end: move.l (a7)+,d0 move.l (a7)+,a0 rte - + +#ifdef _NOT_USED_ linea: move.w #0x2700,sr // disable interrupt halt @@ -626,6 +463,9 @@ flpoow: halt nop nop + +#endif /* _NOT_USED */ + irq1: irq 0x64,1,0x02 @@ -640,7 +480,7 @@ irq3: irq4: // vbl irq 0x70,4,0x10 -#if MACHINE_M5484LITE // handlers for M5484LITE +#if MACHINE_M5484LITE_notyet // handlers for M5484LITE irq5: // irq5 is tied to PCI INTC# and PCI INTD# on the M5484LITE move.w #0x2700,sr // disable interrupts @@ -706,7 +546,7 @@ irq6: // MFP interrupt from FPGA lea -28(a7),a7 // save more registers movem.l d0-d4/a0-a1,(a7) // clr.l d3 // beginn mit 0 - bsr cpusha // clear caches + jsr _flush_and_invalidate_caches // eintrag suchen irq6_next_sca: @@ -845,14 +685,8 @@ irq6_3: mov3q.l #-1,_rt_mod // auf supervisor setzen move.l a5,_rt_usp // rt_usp speichern move.l _rt_ssp,a5 // rt_ssp holen -#ifdef cf_stack move.l 12(a7),-(a5) // pc transferieren move.l 8(a7),-(a5) // sr transferieren -#else - move.w 8(a7),-(a5) // vector transferieren - move.l 12(a7),-(a5) // pc transferieren - move.w 10(a7),-(a5) // sr transferieren -#endif move.l a5,usp // usp setzen move.l 0xF0020000,a5 // vector holen: intack routine add.l _rt_vbr,a5 // virtuelle VBR des Systems @@ -862,16 +696,9 @@ irq6_3: move.b #6,2(a7) // intmaske setzen rte // und weg sev_sup6: -#ifdef cf_stack move.l 12(a7),-(a5) // pc transferieren move.l 8(a7),-(a5) // sr,vec bset #5,2(a5) // auf super setzen -#else - move.w 8(a7),-(a5) // vector nr. - move.l 12(a7),-(a5) // pc verschieben - move.w 10(a7),-(a5) // sr verschieben - bset #5,(a5) // auf super -#endif move.l a5,usp // usp setzen move.l 0xF0020000,a5 // vector holen: intack routine add.l _rt_vbr,a5 // virtuelle VBR des Systems @@ -1051,7 +878,7 @@ video_chg_1page: bset.l d2,d4 // set as changed bne video_chg_2page // was it set already? move.l d4,_video_tlb - bsr cpusha // clear cache + jsr _flush_and_invalidate_caches video_copy_data: move.l d4,_video_tlb