further modified to adapt for Coldfire
This commit is contained in:
Markus Fröschle
@@ -1,48 +1,64 @@
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/*------------------------------------------------------------------------/
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/ Bitbanging MMCv3/SDv1/SDv2 (in SPI mode) control module
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/-------------------------------------------------------------------------/
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/
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/ Copyright (C) 2012, ChaN, all right reserved.
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/*------------------------------------------------------------------------*/
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/* Firebee: MMCv3/SDv1/SDv2 (SPI mode) control module */
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/*------------------------------------------------------------------------*/
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/*
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/ Copyright (C) 2011, ChaN, all right reserved.
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/ Copyright (C) 2012, mfro, all rights reserved.
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/
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/ * This software is a free software and there is NO WARRANTY.
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/ * No restriction on use. You can use, modify and redistribute it for
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/ personal, non-profit or commercial products UNDER YOUR RESPONSIBILITY.
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/ * Redistributions of source code must retain the above copyright notice.
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/
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/--------------------------------------------------------------------------/
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Features and Limitations:
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* Very Easy to Port
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It uses only 4 bit of GPIO port. No interrupt, no SPI port is used.
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* Platform Independent
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You need to modify only a few macros to control GPIO ports.
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* Low Speed
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The data transfer rate will be several times slower than hardware SPI.
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/-------------------------------------------------------------------------*/
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#define SSP_CH 1 /* SSP channel to use (0:SSP0, 1:SSP1) */
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#include "diskio.h" /* Common include file for FatFs and disk I/O layer */
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#define CCLK 100000000UL /* cclk frequency [Hz] */
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#define PCLK_SSP 50000000UL /* PCLK frequency for SSP [Hz] */
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#define SCLK_FAST 25000000UL /* SCLK frequency under normal operation [Hz] */
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#define SCLK_SLOW 400000UL /* SCLK frequency under initialization [Hz] */
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#define INS (!(FIO2PIN1 & _BV(1))) /* Socket status (true:Inserted, false:Empty) */
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#define WP 0 /* Card write protection (true:yes, false:no) */
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#if SSP_CH == 0
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#define SSPxDR SSP0DR
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#define SSPxSR SSP0SR
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#define SSPxCR0 SSP0CR0
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#define SSPxCR1 SSP0CR1
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#define SSPxCPSR SSP0CPSR
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#define CS_LOW() {FIO0CLR2 = _BV(2);} /* Set P0.18 low */
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#define CS_HIGH() {FIO0SET2 = _BV(2);} /* Set P0.18 high */
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#define PCSSPx PCSSP0
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#define PCLKSSPx PCLK_SSP0
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#elif SSP_CH == 1
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#define SSPxDR SSP1DR
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#define SSPxSR SSP1SR
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#define SSPxCR0 SSP1CR0
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#define SSPxCR1 SSP1CR1
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#define SSPxCPSR SSP1CPSR
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#define CS_LOW() {FIO0CLR0 = _BV(6);} /* Set P0.6 low */
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#define CS_HIGH() {FIO0SET0 = _BV(6);} /* Set P0.6 high */
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#define PCSSPx PCSSP1
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#define PCLKSSPx PCLK_SSP1
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#endif
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#if PCLK_SSP * 1 == CCLK
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#define PCLKDIV_SSP PCLKDIV_1
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#elif PCLK_SSP * 2 == CCLK
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#define PCLKDIV_SSP PCLKDIV_2
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#elif PCLK_SSP * 4 == CCLK
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#define PCLKDIV_SSP PCLKDIV_4
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#elif PCLK_SSP * 8 == CCLK
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#define PCLKDIV_SSP PCLKDIV_8
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#else
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#error Invalid clock frequency.
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#endif
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/*-------------------------------------------------------------------------*/
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/* Platform dependent macros and functions needed to be modified */
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/*-------------------------------------------------------------------------*/
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#include <sd_card.h> /* Include device specific declareation file here */
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#define INIT_PORT() init_port() /* Initialize MMC control port (CS=H, CLK=L, DI=H, DO=in) */
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#define DLY_US(n) wait(n) /* Delay n microseconds */
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#define CS_H() PORT |= 0x01 /* Set MMC CS "high" */
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#define CS_L() PORT &= 0xFE /* Set MMC CS "low" */
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#define CK_H() PORT |= 0x02 /* Set MMC SCLK "high" */
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#define CK_L() PORT &= 0xFD /* Set MMC SCLK "low" */
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#define DI_H() PORT |= 0x04 /* Set MMC DI "high" */
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#define DI_L() PORT &= 0xFB /* Set MMC DI "low" */
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#define DO (PORT & 0x08) /* Test for MMC DO ('H':true, 'L':false) */
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#define FCLK_FAST() { SSPxCPSR = (PCLK_SSP / SCLK_FAST) & ~1; }
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#define FCLK_SLOW() { SSPxCPSR = (PCLK_SSP / SCLK_SLOW) & ~1; }
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@@ -52,256 +68,280 @@
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---------------------------------------------------------------------------*/
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/* MMC/SD command (SPI mode) */
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#include "MCF5475.h"
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#include "diskio.h"
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/* MMC/SD command */
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#define CMD0 (0) /* GO_IDLE_STATE */
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#define CMD1 (1) /* SEND_OP_COND */
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#define CMD1 (1) /* SEND_OP_COND (MMC) */
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#define ACMD41 (0x80+41) /* SEND_OP_COND (SDC) */
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#define CMD8 (8) /* SEND_IF_COND */
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#define CMD9 (9) /* SEND_CSD */
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#define CMD10 (10) /* SEND_CID */
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#define CMD12 (12) /* STOP_TRANSMISSION */
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#define CMD13 (13) /* SEND_STATUS */
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#define ACMD13 (0x80+13) /* SD_STATUS (SDC) */
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#define CMD16 (16) /* SET_BLOCKLEN */
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#define CMD17 (17) /* READ_SINGLE_BLOCK */
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#define CMD18 (18) /* READ_MULTIPLE_BLOCK */
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#define CMD23 (23) /* SET_BLOCK_COUNT */
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#define CMD23 (23) /* SET_BLOCK_COUNT (MMC) */
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#define ACMD23 (0x80+23) /* SET_WR_BLK_ERASE_COUNT (SDC) */
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#define CMD24 (24) /* WRITE_BLOCK */
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#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
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#define CMD41 (41) /* SEND_OP_COND (ACMD) */
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#define CMD32 (32) /* ERASE_ER_BLK_START */
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#define CMD33 (33) /* ERASE_ER_BLK_END */
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#define CMD38 (38) /* ERASE */
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#define CMD55 (55) /* APP_CMD */
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#define CMD58 (58) /* READ_OCR */
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/* Card type flags (CardType) */
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#define CT_MMC 0x01 /* MMC ver 3 */
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#define CT_SD1 0x02 /* SD ver 1 */
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#define CT_SD2 0x04 /* SD ver 2 */
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#define CT_SDC 0x06 /* SD */
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#define CT_BLOCK 0x08 /* Block addressing */
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static volatile
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DSTATUS Stat = STA_NOINIT; /* Physical drive status */
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static volatile
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UINT Timer1, Timer2; /* 1kHz decrement timer stopped at zero (disk_timerproc()) */
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static
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DSTATUS Stat = STA_NOINIT; /* Disk status */
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static
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BYTE CardType; /* b0:MMC, b1:SDv1, b2:SDv2, b3:Block addressing */
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BYTE CardType; /* Card type flags */
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/*-----------------------------------------------------------------------*/
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/* Transmit bytes to the card (bitbanging) */
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/* Send/Receive data to the MMC (Platform dependent) */
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/*-----------------------------------------------------------------------*/
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static
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void xmit_mmc (
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const BYTE* buff, /* Data to be sent */
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UINT bc /* Number of bytes to send */
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)
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/* Exchange a byte */
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static BYTE xchg_spi(BYTE byte)
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{
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do {
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spi_send_byte(*buff++);
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} while (--bc);
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* (volatile uint8_t *) (&MCF_DSPI_DTFR + 3) = byte;
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while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait until DSPI transfer complete */
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MCF_DSPI_DSR = 0xffffffff; /* clear DSPI status register */
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return * (volatile uint8_t *) (&MCF_DSPI_DRFR + 3);
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}
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/* Receive multiple byte
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*
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* buff: pointer to data buffer
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* btr: number of bytes to receive (16, 64 or 512)
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*/
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static void rcvr_spi_multi(BYTE *buff, UINT count)
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{
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int i;
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for (i = 0; i < count; i++)
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*buff++ = xchg_spi(0xff);
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}
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#if _USE_WRITE
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/* Send multiple byte
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*
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* buff: pointer to data
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* btx: number of bytes to send
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*/
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static void xmit_spi_multi(const BYTE *buff, UINT btx)
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{
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UINT n = 512;
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WORD d;
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for (i = 0; i < btx; i++)
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xchg_spi(*buff++);
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}
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#endif
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static bool card_ready(void)
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{
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uint8_t d;
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d = xchg_spi(0xff);
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return (d != 0xff);
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}
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/*
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* Wait for card ready
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*
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* wt: timeout in ms
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* returns 1: ready, 0: timeout
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*/
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static int wait_ready (UINT wt)
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{
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return waitfor(card_ready, wt);
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}
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/*-----------------------------------------------------------------------*/
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/* Receive bytes from the card (bitbanging) */
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/*-----------------------------------------------------------------------*/
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static
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void rcvr_mmc (
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BYTE *buff, /* Pointer to read buffer */
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UINT bc /* Number of bytes to receive */
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)
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{
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BYTE r;
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DI_H(); /* Send 0xFF */
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do {
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r = 0; if (DO) r++; /* bit7 */
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CK_H(); CK_L();
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r <<= 1; if (DO) r++; /* bit6 */
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CK_H(); CK_L();
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r <<= 1; if (DO) r++; /* bit5 */
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CK_H(); CK_L();
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r <<= 1; if (DO) r++; /* bit4 */
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CK_H(); CK_L();
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r <<= 1; if (DO) r++; /* bit3 */
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CK_H(); CK_L();
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r <<= 1; if (DO) r++; /* bit2 */
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CK_H(); CK_L();
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r <<= 1; if (DO) r++; /* bit1 */
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CK_H(); CK_L();
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r <<= 1; if (DO) r++; /* bit0 */
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CK_H(); CK_L();
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*buff++ = r; /* Store a received byte */
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} while (--bc);
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}
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/*-----------------------------------------------------------------------*/
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/* Wait for card ready */
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/*-----------------------------------------------------------------------*/
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static
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int wait_ready (void) /* 1:OK, 0:Timeout */
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{
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BYTE d;
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UINT tmr;
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for (tmr = 5000; tmr; tmr--) { /* Wait for ready in timeout of 500ms */
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rcvr_mmc(&d, 1);
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if (d == 0xFF) break;
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DLY_US(100);
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}
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return tmr ? 1 : 0;
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}
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/*-----------------------------------------------------------------------*/
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/* Deselect the card and release SPI bus */
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/*-----------------------------------------------------------------------*/
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/*
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* Deselect card and release SPI
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*/
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static
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void deselect (void)
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{
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BYTE d;
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CS_HIGH(); /* CS = H */
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xchg_spi(0xFF); /* Dummy clock (force DO hi-z for multiple slave SPI) */
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CS_H();
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rcvr_mmc(&d, 1); /* Dummy clock (force DO hi-z for multiple slave SPI) */
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}
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/*-----------------------------------------------------------------------*/
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/* Select the card and wait for ready */
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/*-----------------------------------------------------------------------*/
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/*
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* Select card and wait for ready
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*/
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static
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int select (void) /* 1:OK, 0:Timeout */
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{
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BYTE d;
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CS_LOW();
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xchg_spi(0xFF); /* Dummy clock (force DO enabled) */
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CS_L();
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rcvr_mmc(&d, 1); /* Dummy clock (force DO enabled) */
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if (wait_ready()) return 1; /* OK */
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if (wait_ready(500)) return 1; /* OK */
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deselect();
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return 0; /* Timeout */
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}
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/*
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* Control SPI module (Platform dependent)
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*/
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static
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void power_on (void) /* Enable SSP module and attach it to I/O pads */
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{
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__set_PCONP(PCSSPx, 1); /* Enable SSP module */
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__set_PCLKSEL(PCLKSSPx, PCLKDIV_SSP); /* Select PCLK frequency for SSP */
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SSPxCR0 = 0x0007; /* Set mode: SPI mode 0, 8-bit */
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SSPxCR1 = 0x2; /* Enable SSP with Master */
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#if SSP_CH == 0
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__set_PINSEL(0, 15, 2); /* Attach SCK0 to I/O pad */
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__set_PINSEL(0, 16, 2); /* Attach MISO0 to I/O pad */
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__set_PINSEL(0, 17, 2); /* Attach MOSI0 to I/O pad */
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FIO0DIR |= _BV(18)|_BV(17)|_BV(15); /* Set SCK0, MOSI0 and CS# as output */
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#elif SSP_CH == 1
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__set_PINSEL(0, 7, 2); /* Attach SCK1 to I/O pad */
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__set_PINSEL(0, 8, 2); /* Attach MISO1 to I/O pad */
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__set_PINSEL(0, 9, 2); /* Attach MOSI1 to I/O pad */
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FIO0DIR |= _BV(9)|_BV(7)|_BV(6); /* Set SCK1, MOSI1 and CS# as output */
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#endif
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CS_HIGH(); /* Set CS# high */
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for (Timer1 = 10; Timer1; ) ; /* 10ms */
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}
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static
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void power_off (void) /* Disable SPI function */
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{
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select(); /* Wait for card ready */
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deselect();
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return 0; /* Failed */
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}
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/*-----------------------------------------------------------------------*/
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/* Receive a data packet from the card */
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/* Receive a data packet from the MMC */
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/*-----------------------------------------------------------------------*/
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static
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int rcvr_datablock ( /* 1:OK, 0:Failed */
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BYTE *buff, /* Data buffer to store received data */
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UINT btr /* Byte count */
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int rcvr_datablock ( /* 1:OK, 0:Error */
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BYTE *buff, /* Data buffer */
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UINT btr /* Data block length (byte) */
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)
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{
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BYTE d[2];
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UINT tmr;
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BYTE token;
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for (tmr = 1000; tmr; tmr--) { /* Wait for data packet in timeout of 100ms */
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rcvr_mmc(d, 1);
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if (d[0] != 0xFF) break;
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DLY_US(100);
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}
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if (d[0] != 0xFE) return 0; /* If not valid data token, return with error */
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Timer1 = 200;
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do { /* Wait for DataStart token in timeout of 200ms */
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token = xchg_spi(0xFF);
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/* This loop will take a time. Insert rot_rdq() here for multitask envilonment. */
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} while ((token == 0xFF) && Timer1);
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if(token != 0xFE) return 0; /* Function fails if invalid DataStart token or timeout */
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rcvr_mmc(buff, btr); /* Receive the data block into buffer */
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rcvr_mmc(d, 2); /* Discard CRC */
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rcvr_spi_multi(buff, btr); /* Store trailing data to the buffer */
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xchg_spi(0xFF); xchg_spi(0xFF); /* Discard CRC */
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return 1; /* Return with success */
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return 1; /* Function succeeded */
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}
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/*-----------------------------------------------------------------------*/
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/* Send a data packet to the card */
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/* Send a data packet to the MMC */
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/*-----------------------------------------------------------------------*/
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#if _USE_WRITE
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static
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int xmit_datablock ( /* 1:OK, 0:Failed */
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const BYTE *buff, /* 512 byte data block to be transmitted */
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BYTE token /* Data/Stop token */
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const BYTE *buff, /* Ponter to 512 byte data to be sent */
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BYTE token /* Token */
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)
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{
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BYTE d[2];
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BYTE resp;
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if (!wait_ready()) return 0;
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if (!wait_ready(500)) return 0; /* Wait for card ready */
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d[0] = token;
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xmit_mmc(d, 1); /* Xmit a token */
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if (token != 0xFD) { /* Is it data token? */
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xmit_mmc(buff, 512); /* Xmit the 512 byte data block to MMC */
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rcvr_mmc(d, 2); /* Xmit dummy CRC (0xFF,0xFF) */
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rcvr_mmc(d, 1); /* Receive data response */
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if ((d[0] & 0x1F) != 0x05) /* If not accepted, return with error */
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xchg_spi(token); /* Send token */
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if (token != 0xFD) { /* Send data if token is other than StopTran */
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xmit_spi_multi(buff, 512); /* Data */
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xchg_spi(0xFF); xchg_spi(0xFF); /* Dummy CRC */
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resp = xchg_spi(0xFF); /* Receive data resp */
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if ((resp & 0x1F) != 0x05) /* Function fails if the data packet was not accepted */
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return 0;
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}
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return 1;
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}
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#endif
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/*-----------------------------------------------------------------------*/
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/* Send a command packet to the card */
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/* Send a command packet to the MMC */
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/*-----------------------------------------------------------------------*/
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static
|
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BYTE send_cmd ( /* Returns command response (bit7==1:Send failed)*/
|
||||
BYTE cmd, /* Command byte */
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BYTE send_cmd ( /* Return value: R1 resp (bit7==1:Failed to send) */
|
||||
BYTE cmd, /* Command index */
|
||||
DWORD arg /* Argument */
|
||||
)
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||||
{
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||||
BYTE n, d, buf[6];
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||||
BYTE n, res;
|
||||
|
||||
|
||||
if (cmd & 0x80) { /* ACMD<n> is the command sequense of CMD55-CMD<n> */
|
||||
if (cmd & 0x80) { /* Send a CMD55 prior to ACMD<n> */
|
||||
cmd &= 0x7F;
|
||||
n = send_cmd(CMD55, 0);
|
||||
if (n > 1) return n;
|
||||
res = send_cmd(CMD55, 0);
|
||||
if (res > 1) return res;
|
||||
}
|
||||
|
||||
/* Select the card and wait for ready */
|
||||
/* Select card */
|
||||
deselect();
|
||||
if (!select()) return 0xFF;
|
||||
|
||||
/* Send a command packet */
|
||||
buf[0] = 0x40 | cmd; /* Start + Command index */
|
||||
buf[1] = (BYTE)(arg >> 24); /* Argument[31..24] */
|
||||
buf[2] = (BYTE)(arg >> 16); /* Argument[23..16] */
|
||||
buf[3] = (BYTE)(arg >> 8); /* Argument[15..8] */
|
||||
buf[4] = (BYTE)arg; /* Argument[7..0] */
|
||||
n = 0x01; /* Dummy CRC + Stop */
|
||||
if (cmd == CMD0) n = 0x95; /* (valid CRC for CMD0(0)) */
|
||||
if (cmd == CMD8) n = 0x87; /* (valid CRC for CMD8(0x1AA)) */
|
||||
buf[5] = n;
|
||||
xmit_mmc(buf, 6);
|
||||
/* Send command packet */
|
||||
xchg_spi(0x40 | cmd); /* Start + command index */
|
||||
xchg_spi((BYTE)(arg >> 24)); /* Argument[31..24] */
|
||||
xchg_spi((BYTE)(arg >> 16)); /* Argument[23..16] */
|
||||
xchg_spi((BYTE)(arg >> 8)); /* Argument[15..8] */
|
||||
xchg_spi((BYTE)arg); /* Argument[7..0] */
|
||||
n = 0x01; /* Dummy CRC + Stop */
|
||||
if (cmd == CMD0) n = 0x95; /* Valid CRC for CMD0(0) */
|
||||
if (cmd == CMD8) n = 0x87; /* Valid CRC for CMD8(0x1AA) */
|
||||
xchg_spi(n);
|
||||
|
||||
/* Receive command response */
|
||||
if (cmd == CMD12) rcvr_mmc(&d, 1); /* Skip a stuff byte when stop reading */
|
||||
n = 10; /* Wait for a valid response in timeout of 10 attempts */
|
||||
/* Receive command resp */
|
||||
if (cmd == CMD12) xchg_spi(0xFF); /* Diacard following one byte when CMD12 */
|
||||
n = 10; /* Wait for response (10 bytes max) */
|
||||
do
|
||||
rcvr_mmc(&d, 1);
|
||||
while ((d & 0x80) && --n);
|
||||
res = xchg_spi(0xFF);
|
||||
while ((res & 0x80) && --n);
|
||||
|
||||
return d; /* Return with the response value */
|
||||
return res; /* Return received response */
|
||||
}
|
||||
|
||||
|
||||
@@ -314,112 +354,100 @@ BYTE send_cmd ( /* Returns command response (bit7==1:Send failed)*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Get Disk Status */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS disk_status (
|
||||
BYTE drv /* Drive number (always 0) */
|
||||
)
|
||||
{
|
||||
DSTATUS s;
|
||||
BYTE d;
|
||||
|
||||
|
||||
if (drv) return STA_NOINIT;
|
||||
|
||||
/* Check if the card is kept initialized */
|
||||
s = Stat;
|
||||
if (!(s & STA_NOINIT)) {
|
||||
if (send_cmd(CMD13, 0)) /* Read card status */
|
||||
s = STA_NOINIT;
|
||||
rcvr_mmc(&d, 1); /* Receive following half of R2 */
|
||||
deselect();
|
||||
}
|
||||
Stat = s;
|
||||
|
||||
return s;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Initialize Disk Drive */
|
||||
/* Initialize disk drive */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS disk_initialize (
|
||||
BYTE drv /* Physical drive nmuber (0) */
|
||||
BYTE drv /* Physical drive number (0) */
|
||||
)
|
||||
{
|
||||
BYTE n, ty, cmd, buf[4];
|
||||
UINT tmr;
|
||||
DSTATUS s;
|
||||
BYTE n, cmd, ty, ocr[4];
|
||||
|
||||
|
||||
if (drv) return RES_NOTRDY;
|
||||
if (drv) return STA_NOINIT; /* Supports only drive 0 */
|
||||
power_on(); /* Initialize SPI */
|
||||
|
||||
INIT_PORT(); /* Initialize control port */
|
||||
for (n = 10; n; n--) rcvr_mmc(buf, 1); /* 80 dummy clocks */
|
||||
if (Stat & STA_NODISK) return Stat; /* Is card existing in the soket? */
|
||||
|
||||
FCLK_SLOW();
|
||||
for (n = 10; n; n--) xchg_spi(0xFF); /* Send 80 dummy clocks */
|
||||
|
||||
ty = 0;
|
||||
if (send_cmd(CMD0, 0) == 1) { /* Enter Idle state */
|
||||
if (send_cmd(CMD0, 0) == 1) { /* Put the card SPI/Idle state */
|
||||
Timer1 = 1000; /* Initialization timeout = 1 sec */
|
||||
if (send_cmd(CMD8, 0x1AA) == 1) { /* SDv2? */
|
||||
rcvr_mmc(buf, 4); /* Get trailing return value of R7 resp */
|
||||
if (buf[2] == 0x01 && buf[3] == 0xAA) { /* The card can work at vdd range of 2.7-3.6V */
|
||||
for (tmr = 1000; tmr; tmr--) { /* Wait for leaving idle state (ACMD41 with HCS bit) */
|
||||
if (send_cmd(ACMD41, 1UL << 30) == 0) break;
|
||||
DLY_US(1000);
|
||||
}
|
||||
if (tmr && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
|
||||
rcvr_mmc(buf, 4);
|
||||
ty = (buf[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* SDv2 */
|
||||
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF); /* Get 32 bit return value of R7 resp */
|
||||
if (ocr[2] == 0x01 && ocr[3] == 0xAA) { /* Is the card supports vcc of 2.7-3.6V? */
|
||||
while (Timer1 && send_cmd(ACMD41, 1UL << 30)) ; /* Wait for end of initialization with ACMD41(HCS) */
|
||||
if (Timer1 && send_cmd(CMD58, 0) == 0) { /* Check CCS bit in the OCR */
|
||||
for (n = 0; n < 4; n++) ocr[n] = xchg_spi(0xFF);
|
||||
ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2; /* Card id SDv2 */
|
||||
}
|
||||
}
|
||||
} else { /* SDv1 or MMCv3 */
|
||||
if (send_cmd(ACMD41, 0) <= 1) {
|
||||
ty = CT_SD1; cmd = ACMD41; /* SDv1 */
|
||||
} else { /* Not SDv2 card */
|
||||
if (send_cmd(ACMD41, 0) <= 1) { /* SDv1 or MMC? */
|
||||
ty = CT_SD1; cmd = ACMD41; /* SDv1 (ACMD41(0)) */
|
||||
} else {
|
||||
ty = CT_MMC; cmd = CMD1; /* MMCv3 */
|
||||
ty = CT_MMC; cmd = CMD1; /* MMCv3 (CMD1(0)) */
|
||||
}
|
||||
for (tmr = 1000; tmr; tmr--) { /* Wait for leaving idle state */
|
||||
if (send_cmd(cmd, 0) == 0) break;
|
||||
DLY_US(1000);
|
||||
}
|
||||
if (!tmr || send_cmd(CMD16, 512) != 0) /* Set R/W block length to 512 */
|
||||
while (Timer1 && send_cmd(cmd, 0)) ; /* Wait for end of initialization */
|
||||
if (!Timer1 || send_cmd(CMD16, 512) != 0) /* Set block length: 512 */
|
||||
ty = 0;
|
||||
}
|
||||
}
|
||||
CardType = ty;
|
||||
s = ty ? 0 : STA_NOINIT;
|
||||
Stat = s;
|
||||
|
||||
CardType = ty; /* Card type */
|
||||
deselect();
|
||||
|
||||
return s;
|
||||
if (ty) { /* OK */
|
||||
FCLK_FAST(); /* Set fast clock */
|
||||
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT flag */
|
||||
} else { /* Failed */
|
||||
power_off();
|
||||
Stat = STA_NOINIT;
|
||||
}
|
||||
|
||||
return Stat;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Read Sector(s) */
|
||||
/* Get disk status */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS disk_status (
|
||||
BYTE drv /* Physical drive number (0) */
|
||||
)
|
||||
{
|
||||
if (drv) return STA_NOINIT; /* Supports only drive 0 */
|
||||
|
||||
return Stat; /* Return disk status */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Read sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DRESULT disk_read (
|
||||
BYTE drv, /* Physical drive nmuber (0) */
|
||||
BYTE *buff, /* Pointer to the data buffer to store read data */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
BYTE count /* Sector count (1..128) */
|
||||
BYTE drv, /* Physical drive number (0) */
|
||||
BYTE *buff, /* Pointer to the data buffer to store read data */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
BYTE count /* Number of sectors to read (1..128) */
|
||||
)
|
||||
{
|
||||
if (disk_status(drv) & STA_NOINIT) return RES_NOTRDY;
|
||||
if (!count) return RES_PARERR;
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert LBA to byte address if needed */
|
||||
if (drv || !count) return RES_PARERR; /* Check parameter */
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
|
||||
|
||||
if (count == 1) { /* Single block read */
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* LBA ot BA conversion (byte addressing cards) */
|
||||
|
||||
if (count == 1) { /* Single sector read */
|
||||
if ((send_cmd(CMD17, sector) == 0) /* READ_SINGLE_BLOCK */
|
||||
&& rcvr_datablock(buff, 512))
|
||||
count = 0;
|
||||
}
|
||||
else { /* Multiple block read */
|
||||
else { /* Multiple sector read */
|
||||
if (send_cmd(CMD18, sector) == 0) { /* READ_MULTIPLE_BLOCK */
|
||||
do {
|
||||
if (!rcvr_datablock(buff, 512)) break;
|
||||
@@ -430,33 +458,36 @@ DRESULT disk_read (
|
||||
}
|
||||
deselect();
|
||||
|
||||
return count ? RES_ERROR : RES_OK;
|
||||
return count ? RES_ERROR : RES_OK; /* Return result */
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Write Sector(s) */
|
||||
/* Write sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_WRITE
|
||||
DRESULT disk_write (
|
||||
BYTE drv, /* Physical drive nmuber (0) */
|
||||
const BYTE *buff, /* Pointer to the data to be written */
|
||||
BYTE drv, /* Physical drive number (0) */
|
||||
const BYTE *buff, /* Ponter to the data to write */
|
||||
DWORD sector, /* Start sector number (LBA) */
|
||||
BYTE count /* Sector count (1..128) */
|
||||
BYTE count /* Number of sectors to write (1..128) */
|
||||
)
|
||||
{
|
||||
if (disk_status(drv) & STA_NOINIT) return RES_NOTRDY;
|
||||
if (!count) return RES_PARERR;
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert LBA to byte address if needed */
|
||||
if (drv || !count) return RES_PARERR; /* Check parameter */
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check drive status */
|
||||
if (Stat & STA_PROTECT) return RES_WRPRT; /* Check write protect */
|
||||
|
||||
if (count == 1) { /* Single block write */
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* LBA ==> BA conversion (byte addressing cards) */
|
||||
|
||||
if (count == 1) { /* Single sector write */
|
||||
if ((send_cmd(CMD24, sector) == 0) /* WRITE_BLOCK */
|
||||
&& xmit_datablock(buff, 0xFE))
|
||||
count = 0;
|
||||
}
|
||||
else { /* Multiple block write */
|
||||
if (CardType & CT_SDC) send_cmd(ACMD23, count);
|
||||
else { /* Multiple sector write */
|
||||
if (CardType & CT_SDC) send_cmd(ACMD23, count); /* Predefine number of sectors */
|
||||
if (send_cmd(CMD25, sector) == 0) { /* WRITE_MULTIPLE_BLOCK */
|
||||
do {
|
||||
if (!xmit_datablock(buff, 0xFC)) break;
|
||||
@@ -468,72 +499,164 @@ DRESULT disk_write (
|
||||
}
|
||||
deselect();
|
||||
|
||||
return count ? RES_ERROR : RES_OK;
|
||||
return count ? RES_ERROR : RES_OK; /* Return result */
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Miscellaneous Functions */
|
||||
/* Miscellaneous drive controls other than data read/write */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _USE_IOCTL
|
||||
DRESULT disk_ioctl (
|
||||
BYTE drv, /* Physical drive nmuber (0) */
|
||||
BYTE ctrl, /* Control code */
|
||||
void *buff /* Buffer to send/receive control data */
|
||||
BYTE drv, /* Physical drive number (0) */
|
||||
BYTE ctrl, /* Control command code */
|
||||
void *buff /* Pointer to the conrtol data */
|
||||
)
|
||||
{
|
||||
DRESULT res;
|
||||
BYTE n, csd[16];
|
||||
DWORD cs;
|
||||
BYTE n, csd[16], *ptr = buff;
|
||||
DWORD *dp, st, ed, csize;
|
||||
|
||||
|
||||
if (disk_status(drv) & STA_NOINIT) return RES_NOTRDY; /* Check if card is in the socket */
|
||||
if (drv) return RES_PARERR; /* Check parameter */
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check if drive is ready */
|
||||
|
||||
res = RES_ERROR;
|
||||
switch (ctrl) {
|
||||
case CTRL_SYNC : /* Make sure that no pending write process */
|
||||
if (select()) {
|
||||
deselect();
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
case GET_SECTOR_COUNT : /* Get number of sectors on the disk (DWORD) */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
|
||||
if ((csd[0] >> 6) == 1) { /* SDC ver 2.00 */
|
||||
cs = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 8) + 1;
|
||||
*(DWORD*)buff = cs << 10;
|
||||
} else { /* SDC ver 1.XX or MMC */
|
||||
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
|
||||
cs = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
|
||||
*(DWORD*)buff = cs << (n - 9);
|
||||
switch (ctrl) {
|
||||
case CTRL_SYNC : /* Wait for end of internal write process of the drive */
|
||||
if (select()) {
|
||||
deselect();
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
case GET_SECTOR_COUNT : /* Get drive capacity in unit of sector (DWORD) */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) {
|
||||
if ((csd[0] >> 6) == 1) { /* SDC ver 2.00 */
|
||||
csize = csd[9] + ((WORD)csd[8] << 8) + ((DWORD)(csd[7] & 63) << 16) + 1;
|
||||
*(DWORD*)buff = csize << 10;
|
||||
} else { /* SDC ver 1.XX or MMC ver 3 */
|
||||
n = (csd[5] & 15) + ((csd[10] & 128) >> 7) + ((csd[9] & 3) << 1) + 2;
|
||||
csize = (csd[8] >> 6) + ((WORD)csd[7] << 2) + ((WORD)(csd[6] & 3) << 10) + 1;
|
||||
*(DWORD*)buff = csize << (n - 9);
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
case GET_SECTOR_SIZE : /* Get sector size in unit of byte (WORD) */
|
||||
*(WORD*)buff = 512;
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case GET_BLOCK_SIZE : /* Get erase block size in unit of sector (DWORD) */
|
||||
if (CardType & CT_SD2) { /* SDC ver 2.00 */
|
||||
if (send_cmd(ACMD13, 0) == 0) { /* Read SD status */
|
||||
xchg_spi(0xFF);
|
||||
if (rcvr_datablock(csd, 16)) { /* Read partial block */
|
||||
for (n = 64 - 16; n; n--) xchg_spi(0xFF); /* Purge trailing data */
|
||||
*(DWORD*)buff = 16UL << (csd[10] >> 4);
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
} else { /* SDC ver 1.XX or MMC */
|
||||
if ((send_cmd(CMD9, 0) == 0) && rcvr_datablock(csd, 16)) { /* Read CSD */
|
||||
if (CardType & CT_SD1) { /* SDC ver 1.XX */
|
||||
*(DWORD*)buff = (((csd[10] & 63) << 1) + ((WORD)(csd[11] & 128) >> 7) + 1) << ((csd[13] >> 6) - 1);
|
||||
} else { /* MMC */
|
||||
*(DWORD*)buff = ((WORD)((csd[10] & 124) >> 2) + 1) * (((csd[11] & 3) << 3) + ((csd[11] & 224) >> 5) + 1);
|
||||
}
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
case GET_BLOCK_SIZE : /* Get erase block size in unit of sector (DWORD) */
|
||||
*(DWORD*)buff = 128;
|
||||
case CTRL_ERASE_SECTOR : /* Erase a block of sectors (used when _USE_ERASE == 1) */
|
||||
if (!(CardType & CT_SDC)) break; /* Check if the card is SDC */
|
||||
if (disk_ioctl(drv, MMC_GET_CSD, csd)) break; /* Get CSD */
|
||||
if (!(csd[0] >> 6) && !(csd[10] & 0x40)) break; /* Check if sector erase can be applied to the card */
|
||||
dp = buff; st = dp[0]; ed = dp[1]; /* Load sector block */
|
||||
if (!(CardType & CT_BLOCK)) {
|
||||
st *= 512; ed *= 512;
|
||||
}
|
||||
if (send_cmd(CMD32, st) == 0 && send_cmd(CMD33, ed) == 0 && send_cmd(CMD38, 0) == 0 && wait_ready(30000)) /* Erase sector block */
|
||||
res = RES_OK; /* FatFs does not check result of this command */
|
||||
break;
|
||||
|
||||
/* Following command are not used by FatFs module */
|
||||
|
||||
case MMC_GET_TYPE : /* Get MMC/SDC type (BYTE) */
|
||||
*ptr = CardType;
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_CSD : /* Read CSD (16 bytes) */
|
||||
if (send_cmd(CMD9, 0) == 0 /* READ_CSD */
|
||||
&& rcvr_datablock(ptr, 16))
|
||||
res = RES_OK;
|
||||
break;
|
||||
break;
|
||||
|
||||
default:
|
||||
res = RES_PARERR;
|
||||
case MMC_GET_CID : /* Read CID (16 bytes) */
|
||||
if (send_cmd(CMD10, 0) == 0 /* READ_CID */
|
||||
&& rcvr_datablock(ptr, 16))
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_OCR : /* Read OCR (4 bytes) */
|
||||
if (send_cmd(CMD58, 0) == 0) { /* READ_OCR */
|
||||
for (n = 4; n; n--) *ptr++ = xchg_spi(0xFF);
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
case MMC_GET_SDSTAT : /* Read SD status (64 bytes) */
|
||||
if (send_cmd(ACMD13, 0) == 0) { /* SD_STATUS */
|
||||
xchg_spi(0xFF);
|
||||
if (rcvr_datablock(ptr, 64))
|
||||
res = RES_OK;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
res = RES_PARERR;
|
||||
}
|
||||
|
||||
deselect();
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* This function is defined for only project compatibility */
|
||||
/* Device timer function */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* This function must be called from timer interrupt routine in period
|
||||
/ of 1 ms to generate card control timing.
|
||||
*/
|
||||
|
||||
void disk_timerproc (void)
|
||||
{
|
||||
/* Nothing to do */
|
||||
}
|
||||
WORD n;
|
||||
BYTE s;
|
||||
|
||||
|
||||
n = Timer1; /* 1kHz decrement timer stopped at 0 */
|
||||
if (n) Timer1 = --n;
|
||||
n = Timer2;
|
||||
if (n) Timer2 = --n;
|
||||
|
||||
s = Stat;
|
||||
if (WP) /* Write protected */
|
||||
s |= STA_PROTECT;
|
||||
else /* Write enabled */
|
||||
s &= ~STA_PROTECT;
|
||||
if (INS) /* Card is in socket */
|
||||
s &= ~STA_NODISK;
|
||||
else /* Socket empty */
|
||||
s |= (STA_NODISK | STA_NOINIT);
|
||||
Stat = s;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user