From bf32e899d1647e839aa135ed7dfdad368b6ad561 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?David=20G=C3=A1lvez?= Date: Thu, 10 Jul 2014 15:45:45 +0000 Subject: [PATCH] Merge pci_BaS_gcc branch to trunk --- BaS_gcc/Makefile | 3 +- BaS_gcc/bas.lk.in | 1 + BaS_gcc/if/driver_vec.c | 62 ++++- BaS_gcc/include/driver_vec.h | 64 ++++- BaS_gcc/include/pci.h | 86 ++++++- BaS_gcc/pci/pci.c | 161 ++++++++++++ BaS_gcc/pci/pci_wrappers.S | 469 +++++++++++++++++++++++++++++++++++ 7 files changed, 839 insertions(+), 7 deletions(-) create mode 100644 BaS_gcc/pci/pci_wrappers.S diff --git a/BaS_gcc/Makefile b/BaS_gcc/Makefile index 9201c92..7c92cab 100644 --- a/BaS_gcc/Makefile +++ b/BaS_gcc/Makefile @@ -144,7 +144,8 @@ ASRCS= \ startcf.S \ printf_helper.S \ exceptions.S \ - xhdi_vec.S + xhdi_vec.S \ + pci_wrappers.S SRCS=$(ASRCS) $(CSRCS) COBJS=$(patsubst %.c,%.o,$(CSRCS)) diff --git a/BaS_gcc/bas.lk.in b/BaS_gcc/bas.lk.in index 4f6c271..1f3adef 100644 --- a/BaS_gcc/bas.lk.in +++ b/BaS_gcc/bas.lk.in @@ -48,6 +48,7 @@ SECTIONS OBJDIR/BaS.o(.text) OBJDIR/pci.o(.text) + OBJDIR/pci_wrappers.o(.text) OBJDIR/usb.o(.text) OBJDIR/driver_mem.o(.text) OBJDIR/usb_mouse.o(.text) diff --git a/BaS_gcc/if/driver_vec.c b/BaS_gcc/if/driver_vec.c index ba1f177..1d94e03 100644 --- a/BaS_gcc/if/driver_vec.c +++ b/BaS_gcc/if/driver_vec.c @@ -30,6 +30,7 @@ #include "dma.h" #include "driver_vec.h" #include "driver_mem.h" +#include "pci.h" /* * driver interface struct for the SD card BaS driver @@ -69,6 +70,58 @@ static struct dma_driver_interface dma_interface = extern const struct fb_info *info_fb; +/* + * driver interface struct for the PCI_BIOS BaS driver + */ +static struct pci_bios_interface pci_interface = +{ + .subjar = 0, + .version = 0x00010000, + .find_pci_device = wrapper_find_pci_device, + .find_pci_classcode = wrapper_find_pci_classcode, + .read_config_byte = wrapper_read_config_byte, + .read_config_word = wrapper_read_config_word, + .read_config_longword = wrapper_read_config_longword, + .fast_read_config_byte = wrapper_fast_read_config_byte, + .fast_read_config_word = wrapper_fast_read_config_word, + .fast_read_config_longword = wrapper_fast_read_config_longword, + .write_config_byte = wrapper_write_config_byte, + .write_config_word = wrapper_write_config_word, + .write_config_longword = wrapper_write_config_longword, + .hook_interrupt = wrapper_hook_interrupt, + .unhook_interrupt = wrapper_unhook_interrupt, + .special_cycle = wrapper_special_cycle, + .get_routing = wrapper_get_routing, + .set_interrupt = wrapper_set_interrupt, + .get_resource = wrapper_get_resource, + .get_card_used = wrapper_get_card_used, + .set_card_used = wrapper_set_card_used, + .read_mem_byte = wrapper_read_mem_byte, + .read_mem_word = wrapper_read_mem_word, + .read_mem_longword = wrapper_read_mem_longword, + .fast_read_mem_byte = wrapper_fast_read_mem_byte, + .fast_read_mem_word = wrapper_fast_read_mem_word, + .fast_read_mem_longword = wrapper_fast_read_mem_longword, + .write_mem_byte = wrapper_write_mem_byte, + .write_mem_word = wrapper_write_mem_word, + .write_mem_longword = wrapper_write_mem_longword, + .read_io_byte = wrapper_read_io_byte, + .read_io_word = wrapper_read_io_word, + .read_io_longword = wrapper_read_io_longword, + .fast_read_io_byte = wrapper_fast_read_io_byte, + .fast_read_io_word = wrapper_fast_read_io_word, + .fast_read_io_longword = wrapper_fast_read_io_longword, + .write_io_byte = wrapper_write_io_byte, + .write_io_word = wrapper_write_io_word, + .write_io_longword = wrapper_write_io_longword, + .get_machine_id = wrapper_get_machine_id, + .get_pagesize = wrapper_get_pagesize, + .virt_to_bus = wrapper_virt_to_bus, + .bus_to_virt = wrapper_bus_to_virt, + .virt_to_phys = wrapper_virt_to_phys, + .phys_to_virt = wrapper_phys_to_virt, +}; + /* * driver interface struct for the BaS framebuffer video driver */ @@ -105,7 +158,14 @@ static struct generic_interface interfaces[] = .revision = 1, .interface.fb = &framebuffer_interface, }, - + { + .type = PCI_DRIVER, + .name = "PCI", + .description = "BaS PCI_BIOS driver", + .version = 0, + .revision = 1, + .interface.pci = &pci_interface, + }, /* insert new drivers here */ { diff --git a/BaS_gcc/include/driver_vec.h b/BaS_gcc/include/driver_vec.h index f70b98e..143e64e 100644 --- a/BaS_gcc/include/driver_vec.h +++ b/BaS_gcc/include/driver_vec.h @@ -27,15 +27,17 @@ #include "xhdi_sd.h" #include "MCD_dma.h" +#include "pci.h" enum driver_type { - END_OF_DRIVERS, /* marks end of driver list */ - BLOCKDEV_DRIVER, - CHARDEV_DRIVER, - VIDEO_DRIVER, +// BLOCKDEV_DRIVER, +// CHARDEV_DRIVER, XHDI_DRIVER, MCD_DRIVER, + VIDEO_DRIVER, + PCI_DRIVER, + END_OF_DRIVERS, /* marks end of driver list */ }; struct generic_driver_interface @@ -204,12 +206,66 @@ struct framebuffer_driver_interface struct fb_info **framebuffer_info; /* pointer to an fb_info struct (defined in include/fb.h) */ }; +struct pci_bios_interface { + uint32_t subjar; + uint32_t version; + /* Although we declare this functions as standard gcc functions (cdecl), + * they expect paramenters inside registers (fastcall) unsupported by gcc m68k. + * Caller will take care of parameters passing convention. + */ + int32_t (*find_pci_device) (uint32_t id, uint16_t index); + int32_t (*find_pci_classcode) (uint32_t class, uint16_t index); + int32_t (*read_config_byte) (int32_t handle, uint16_t reg, uint8_t *address); + int32_t (*read_config_word) (int32_t handle, uint16_t reg, uint16_t *address); + int32_t (*read_config_longword) (int32_t handle, uint16_t reg, uint32_t *address); + uint8_t (*fast_read_config_byte) (int32_t handle, uint16_t reg); + uint16_t (*fast_read_config_word) (int32_t handle, uint16_t reg); + uint32_t (*fast_read_config_longword) (int32_t handle, uint16_t reg); + int32_t (*write_config_byte) (int32_t handle, uint16_t reg, uint16_t val); + int32_t (*write_config_word) (int32_t handle, uint16_t reg, uint16_t val); + int32_t (*write_config_longword) (int32_t handle, uint16_t reg, uint32_t val); + int32_t (*hook_interrupt) (int32_t handle, uint32_t *routine, uint32_t *parameter); + int32_t (*unhook_interrupt) (int32_t handle); + int32_t (*special_cycle) (uint16_t bus, uint32_t data); + int32_t (*get_routing) (int32_t handle); + int32_t (*set_interrupt) (int32_t handle); + int32_t (*get_resource) (int32_t handle); + int32_t (*get_card_used) (int32_t handle, uint32_t *address); + int32_t (*set_card_used) (int32_t handle, uint32_t *callback); + int32_t (*read_mem_byte) (int32_t handle, uint32_t offset, uint8_t *address); + int32_t (*read_mem_word) (int32_t handle, uint32_t offset, uint16_t *address); + int32_t (*read_mem_longword) (int32_t handle, uint32_t offset, uint32_t *address); + uint8_t (*fast_read_mem_byte) (int32_t handle, uint32_t offset); + uint16_t (*fast_read_mem_word) (int32_t handle, uint32_t offset); + uint32_t (*fast_read_mem_longword) (int32_t handle, uint32_t offset); + int32_t (*write_mem_byte) (int32_t handle, uint32_t offset, uint16_t val); + int32_t (*write_mem_word) (int32_t handle, uint32_t offset, uint16_t val); + int32_t (*write_mem_longword) (int32_t handle, uint32_t offset, uint32_t val); + int32_t (*read_io_byte) (int32_t handle, uint32_t offset, uint8_t *address); + int32_t (*read_io_word) (int32_t handle, uint32_t offset, uint16_t *address); + int32_t (*read_io_longword) (int32_t handle, uint32_t offset, uint32_t *address); + uint8_t (*fast_read_io_byte) (int32_t handle, uint32_t offset); + uint16_t (*fast_read_io_word) (int32_t handle, uint32_t offset); + uint32_t (*fast_read_io_longword) (int32_t handle, uint32_t offset); + int32_t (*write_io_byte) (int32_t handle, uint32_t offset, uint16_t val); + int32_t (*write_io_word) (int32_t handle, uint32_t offset, uint16_t val); + int32_t (*write_io_longword) (int32_t handle, uint32_t offset, uint32_t val); + int32_t (*get_machine_id) (void); + int32_t (*get_pagesize) (void); + int32_t (*virt_to_bus) (int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); + int32_t (*bus_to_virt) (int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); + int32_t (*virt_to_phys) (uint32_t address, PCI_CONV_ADR *pointer); + int32_t (*phys_to_virt) (uint32_t address, PCI_CONV_ADR *pointer); +// int32_t reserved[2]; +}; + union interface { struct generic_driver_interface *gdi; struct xhdi_driver_interface *xhdi; struct dma_driver_interface *dma; struct framebuffer_driver_interface *fb; + struct pci_bios_interface *pci; }; struct generic_interface diff --git a/BaS_gcc/include/pci.h b/BaS_gcc/include/pci.h index 318bff7..5939d43 100644 --- a/BaS_gcc/include/pci.h +++ b/BaS_gcc/include/pci.h @@ -243,10 +243,94 @@ extern int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t va extern int32_t pci_write_config_word(int32_t handle, int offset, uint16_t value); extern int32_t pci_write_config_byte(int32_t handle, int offset, uint8_t value); -extern struct pci_rd *pci_get_resource(int32_t handle); extern int32_t pci_hook_interrupt(int32_t handle, void *interrupt_handler, void *parameter); extern int32_t pci_unhook_interrupt(int32_t handle); +extern struct pci_rd *pci_get_resource(int32_t handle); + +/* + * Not implemented PCI_BIOS functions + */ +extern uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg); +extern uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg); +extern uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg); +extern int32_t pci_special_cycle(uint16_t bus, uint32_t data); +extern int32_t pci_get_routing(int32_t handle); +extern int32_t pci_set_interrupt(int32_t handle); +extern int32_t pci_get_card_used(int32_t handle, uint32_t *address); +extern int32_t pci_set_card_used(int32_t handle, uint32_t *callback); +extern int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address); +extern int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address); +extern int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address); +extern uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset); +extern uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset); +extern uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset); +extern int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val); +extern int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val); +extern int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val); +extern int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address); +extern int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address); +extern int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address); +extern uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset); +extern uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset); +extern uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset); +extern int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val); +extern int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val); +extern int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val); +extern int32_t pci_get_machine_id(void); +extern int32_t pci_get_pagesize(void); +extern int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); +extern int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); +extern int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer); +extern int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer); + +/* + * prototypes for PCI wrapper routines + */ +extern int32_t wrapper_find_pci_device(uint32_t id, uint16_t index); +extern int32_t wrapper_find_pci_classcode(uint32_t class, uint16_t index); +extern int32_t wrapper_read_config_byte(int32_t handle, uint16_t reg, uint8_t *address); +extern int32_t wrapper_read_config_word(int32_t handle, uint16_t reg, uint16_t *address); +extern int32_t wrapper_read_config_longword(int32_t handle, uint16_t reg, uint32_t *address); +extern uint8_t wrapper_fast_read_config_byte(int32_t handle, uint16_t reg); +extern uint16_t wrapper_fast_read_config_word(int32_t handle, uint16_t reg); +extern uint32_t wrapper_fast_read_config_longword(int32_t handle, uint16_t reg); +extern int32_t wrapper_write_config_byte(int32_t handle, uint16_t reg, uint16_t val); +extern int32_t wrapper_write_config_word(int32_t handle, uint16_t reg, uint16_t val); +extern int32_t wrapper_write_config_longword(int32_t handle, uint16_t reg, uint32_t val); +extern int32_t wrapper_hook_interrupt(int32_t handle, uint32_t *routine, uint32_t *parameter); +extern int32_t wrapper_unhook_interrupt(int32_t handle); +extern int32_t wrapper_special_cycle(uint16_t bus, uint32_t data); +extern int32_t wrapper_get_routing(int32_t handle); +extern int32_t wrapper_set_interrupt(int32_t handle); +extern int32_t wrapper_get_resource(int32_t handle); +extern int32_t wrapper_get_card_used(int32_t handle, uint32_t *address); +extern int32_t wrapper_set_card_used(int32_t handle, uint32_t *callback); +extern int32_t wrapper_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address); +extern int32_t wrapper_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address); +extern int32_t wrapper_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address); +extern uint8_t wrapper_fast_read_mem_byte(int32_t handle, uint32_t offset); +extern uint16_t wrapper_fast_read_mem_word(int32_t handle, uint32_t offset); +extern uint32_t wrapper_fast_read_mem_longword(int32_t handle, uint32_t offset); +extern int32_t wrapper_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val); +extern int32_t wrapper_write_mem_word(int32_t handle, uint32_t offset, uint16_t val); +extern int32_t wrapper_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val); +extern int32_t wrapper_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address); +extern int32_t wrapper_read_io_word(int32_t handle, uint32_t offset, uint16_t *address); +extern int32_t wrapper_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address); +extern uint8_t wrapper_fast_read_io_byte(int32_t handle, uint32_t offset); +extern uint16_t wrapper_fast_read_io_word(int32_t handle, uint32_t offset); +extern uint32_t wrapper_fast_read_io_longword(int32_t handle, uint32_t offset); +extern int32_t wrapper_write_io_byte(int32_t handle, uint32_t offset, uint16_t val); +extern int32_t wrapper_write_io_word(int32_t handle, uint32_t offset, uint16_t val); +extern int32_t wrapper_write_io_longword(int32_t handle, uint32_t offset, uint32_t val); +extern int32_t wrapper_get_machine_id(void); +extern int32_t wrapper_get_pagesize(void); +extern int32_t wrapper_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); +extern int32_t wrapper_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); +extern int32_t wrapper_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer); +extern int32_t wrapper_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer); + #define PCI_MK_CONF_ADDR(bus, device, function) (MCF_PCI_PCICAR_E | \ ((bus) << 16) | \ ((device << 8) | \ diff --git a/BaS_gcc/pci/pci.c b/BaS_gcc/pci/pci.c index b119851..5a4d10c 100644 --- a/BaS_gcc/pci/pci.c +++ b/BaS_gcc/pci/pci.c @@ -587,7 +587,168 @@ int32_t pci_unhook_interrupt(int32_t handle) return PCI_SUCCESSFUL; } +/* + * Not implemented PCI_BIOS functions + */ +uint8_t pci_fast_read_config_byte(int32_t handle, uint16_t reg) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +uint16_t pci_fast_read_config_word(int32_t handle, uint16_t reg) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +uint32_t pci_fast_read_config_longword(int32_t handle, uint16_t reg) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_special_cycle(uint16_t bus, uint32_t data) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_get_routing(int32_t handle) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_set_interrupt(int32_t handle) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_get_card_used(int32_t handle, uint32_t *address) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_set_card_used(int32_t handle, uint32_t *callback) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_read_mem_byte(int32_t handle, uint32_t offset, uint8_t *address) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_read_mem_word(int32_t handle, uint32_t offset, uint16_t *address) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_read_mem_longword(int32_t handle, uint32_t offset, uint32_t *address) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +uint8_t pci_fast_read_mem_byte(int32_t handle, uint32_t offset) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +uint16_t pci_fast_read_mem_word(int32_t handle, uint32_t offset) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +uint32_t pci_fast_read_mem_longword(int32_t handle, uint32_t offset) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_write_mem_byte(int32_t handle, uint32_t offset, uint16_t val) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_write_mem_word(int32_t handle, uint32_t offset, uint16_t val) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_write_mem_longword(int32_t handle, uint32_t offset, uint32_t val) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_read_io_byte(int32_t handle, uint32_t offset, uint8_t *address) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_read_io_word(int32_t handle, uint32_t offset, uint16_t *address) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_read_io_longword(int32_t handle, uint32_t offset, uint32_t *address) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +uint8_t pci_fast_read_io_byte(int32_t handle, uint32_t offset) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +uint16_t pci_fast_read_io_word(int32_t handle, uint32_t offset) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +uint32_t pci_fast_read_io_longword(int32_t handle, uint32_t offset) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_write_io_byte(int32_t handle, uint32_t offset, uint16_t val) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_write_io_word(int32_t handle, uint32_t offset, uint16_t val) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_write_io_longword(int32_t handle, uint32_t offset, uint32_t val) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_get_machine_id(void) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_get_pagesize(void) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_virt_to_bus(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer) +{ + return PCI_FUNC_NOT_SUPPORTED; +} +int32_t pci_bus_to_virt(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_virt_to_phys(uint32_t address, PCI_CONV_ADR *pointer) +{ + return PCI_FUNC_NOT_SUPPORTED; +} + +int32_t pci_phys_to_virt(uint32_t address, PCI_CONV_ADR *pointer) +{ + return PCI_FUNC_NOT_SUPPORTED; +} /* * pci_device_config() diff --git a/BaS_gcc/pci/pci_wrappers.S b/BaS_gcc/pci/pci_wrappers.S new file mode 100644 index 0000000..faf166e --- /dev/null +++ b/BaS_gcc/pci/pci_wrappers.S @@ -0,0 +1,469 @@ +/* + * pci.S + * + * Purpose: PCI configuration for the Coldfire builtin PCI bridge. + * + * Notes: + * + * This file is part of BaS_gcc. + * + * BaS_gcc is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * BaS_gcc is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with BaS_gcc. If not, see . + * + * Created on: 08.05.2014 + * Author: David Galvez + */ + +.global _wrapper_find_pci_device +.global _wrapper_find_pci_classcode + +.global _wrapper_read_config_longword +.global _wrapper_read_config_word +.global _wrapper_read_config_byte + +.global _wrapper_fast_read_config_byte +.global _wrapper_fast_read_config_word +.global _wrapper_fast_read_config_longword + +.global _wrapper_write_config_longword +.global _wrapper_write_config_word +.global _wrapper_write_config_byte + +.global _wrapper_get_resource +.global _wrapper_hook_interrupt +.global _wrapper_unhook_interrupt + +.global _wrapper_special_cycle +.global _wrapper_get_routing +.global _wrapper_set_interrupt +.global _wrapper_get_resource +.global _wrapper_get_card_used +.global _wrapper_set_card_used + +.global _wrapper_read_mem_byte +.global _wrapper_read_mem_word +.global _wrapper_read_mem_longword + +.global _wrapper_fast_read_mem_byte +.global _wrapper_fast_read_mem_word +.global _wrapper_fast_read_mem_longword + +.global _wrapper_write_mem_byte +.global _wrapper_write_mem_word +.global _wrapper_write_mem_longword + +.global _wrapper_read_io_byte +.global _wrapper_read_io_word +.global _wrapper_read_io_longword + +.global _wrapper_fast_read_io_byte +.global _wrapper_fast_read_io_word +.global _wrapper_fast_read_io_longword + +.global _wrapper_write_io_byte +.global _wrapper_write_io_word +.global _wrapper_write_io_longword + +.global _wrapper_get_machine_id +.global _wrapper_get_pagesize + +.global _wrapper_virt_to_bus +.global _wrapper_bus_to_virt +.global _wrapper_virt_to_phys +.global _wrapper_phys_to_virt + + +_wrapper_find_pci_device: + move.l D1,-(SP) // index + move.l D0,-(SP) // Vendor ID + move.l #16,D1 + lsr.l D1,D0 + move.l D0,-(SP) // Device ID + jsr _pci_find_device + add.l #12,SP + rts + +_wrapper_find_pci_classcode: + move.l D1,-(SP) // index + move.l D0,-(SP) // ID + jsr _pci_find_classcode + addq.l #8,SP + rts + +_wrapper_read_config_byte: + move.l A0,-(SP) // pointer to space for read data + move.l D1,-(SP) // PCI register + move.l D0,-(SP) // handle + jsr _pci_read_config_byte + move.l 8(SP),A0 // PCI_BIOS expects value in memory + move.l D0,(A0) + add.l #12,SP + move.l #0,D0 + rts + +_wrapper_read_config_word: + move.l A0,-(SP) // pointer to space for read data + move.l D1,-(SP) // PCI register + move.l D0,-(SP) // handle + jsr _pci_read_config_word + move.l 8(SP),A0 // little to big endian + move.l D0,(A0) + mvz.b 1(A0),D0 + lsl.l #8,D0 + move.b (A0),D0 + move.l D0,(A0) // PCI_BIOS expects value in memory, not in D0 + add.l #12,SP + move.l #0,D0 + rts + +_wrapper_read_config_longword: + move.l A0,-(SP) // pointer to space for read data + move.l D1,-(SP) // PCI register + move.l D0,-(SP) // handle + jsr _pci_read_config_longword + move.l 8(SP),A0 // little to big endian + move.l D0,(A0) + mvz.b 3(A0),D0 + lsl.l #8,D0 + move.b 2(A0),D0 + lsl.l #8,D0 + move.b 1(A0),D0 + lsl.l #8,D0 + move.b (A0),D0 + move.l D0,(A0) // PCI_BIOS expects value in memory, not in D0 + add.l #12,SP + move.l #0,D0 + rts + +/* Not implemented */ +_wrapper_fast_read_config_byte: + move.l D1,-(SP) // PCI register + move.l D0,-(SP) // handle + jsr _pci_fast_read_config_byte + addq.l #8,SP + rts + +/* Not implemented */ +_wrapper_fast_read_config_word: + move.l D1,-(SP) // PCI register + move.l D0,-(SP) // handle + jsr _pci_fast_read_config_word + addq.l #8,SP + rts + +/* Not implemented */ +_wrapper_fast_read_config_longword: + move.l D1,-(SP) // PCI register + move.l D0,-(SP) // handle + jsr _pci_fast_read_config_longword + addq.l #8,SP + rts + +_wrapper_write_config_byte: + move.l D2,-(SP) // data to write + move.l D1,-(SP) // PCI register + move.l D0,-(SP) // handle + jsr _pci_write_config_byte + add.l #12,SP + rts + +_wrapper_write_config_word: + move.l D0,-(SP) // make data little endian + moveq #0,D1 + move.w D2,D1 + lsr.l #8,D1 + asl.l #8,D2 + or.l D1,D2 + move.l (SP)+,D0 + move.l D2,-(SP) // data to write + move.l D1,-(SP) // PCI register + move.l D0,-(SP) // handle + jsr _pci_write_config_word + add.l #12,SP + rts + +_wrapper_write_config_longword: + move.l D0,-(SP) + move.l D2,D0 // make data little endian + lsr.l #8,D0 + asl.l #8,D2 + and.l #0x00FF00FF,D0 + and.l #0xFF00FF00,D2 + or.l D0,D2 + swap D2 + move.l (SP)+,D0 + move.l D2,-(SP) // data to write + move.l D1,-(SP) // PCI register + move.l D0,-(SP) // handle + jsr _pci_write_config_longword + add.l #12,SP + rts + +_wrapper_hook_interrupt: + move.l A1,-(SP) // parameter for interrupt handler + move.l A0,-(SP) // pointer to interrupt handler + move.l D0,-(SP) // handle + jsr _pci_hook_interrupt + add.l #12,SP + rts + +_wrapper_unhook_interrupt: + move.l D0,-(SP) // handle + jsr _pci_unhook_interrupt + addq.l #4,SP + rts + +/* Not implemented */ +_wrapper_special_cycle: + move.l D1,-(SP) // special cycle data + move.l D0,-(SP) // bus number + jsr _pci_special_cycle + addq.l #8,SP + rts + +/* Not implemented */ +_wrapper_get_routing: + move.l D0,-(SP) // handle + jsr _pci_get_routing + addq.l #4,SP + rts + +/* Not implemented */ +_wrapper_set_interrupt: + move.l D1,-(SP) // mode + move.l D0,-(SP) // handle + jsr _pci_set_interrupt + addq.l #8,SP + rts + +_wrapper_get_resource: + move.l D0,-(SP) // handle + jsr _pci_get_resource + addq.l #4,SP + rts + +/* Not implemented */ +_wrapper_get_card_used: + move.l D1,-(SP) // address + move.l D0,-(SP) // handle + jsr _pci_get_card_used + addq.l #8,SP + rts + +/* Not implemented */ +_wrapper_set_card_used: + move.l A0,-(SP) // callback + move.l D0,-(SP) // handle + jsr _pci_set_card_used + addq.l #8,SP + rts + +/* Not implemented */ +_wrapper_read_mem_byte: + move.l A0,-(SP) // pointer to data in memory + move.l D1,-(SP) // address to access (in PCI memory address space) + move.l D0,-(SP) // handle + jsr _pci_read_mem_byte + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_read_mem_word: + move.l A0,-(SP) // pointer to data in memory + move.l D1,-(SP) // address to access (in PCI memory address space) + move.l D0,-(SP) // handle + jsr _pci_read_mem_word + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_read_mem_longword: + move.l A0,-(SP) // pointer to data in memory + move.l D1,-(SP) // address to access (in PCI memory address space) + move.l D0,-(SP) // handle + jsr _pci_read_mem_longword + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_fast_read_mem_byte: + move.l D1,-(SP) // address to access (in PCI memory address space) + move.l D0,-(SP) // handle + jsr _pci_read_mem_byte + addq.l #8,SP + rts + +/* Not implemented */ +_wrapper_fast_read_mem_word: + move.l D1,-(SP) // address to access (in PCI memory address space) + move.l D0,-(SP) // handle + jsr _pci_read_mem_word + addq.l #8,SP + rts + +/* Not implemented */ +_wrapper_fast_read_mem_longword: + move.l D1,-(SP) // address to access (in PCI memory address space) + move.l D0,-(SP) // handle + jsr _pci_read_mem_longword + addq.l #8,SP + rts + +/* Not implemented */ +_wrapper_write_mem_byte: + move.l D2,-(SP) // data to write + move.l D1,-(SP) // address to access (in PCI memory address space) + move.l D0,-(SP) // handle + jsr _pci_write_mem_byte + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_write_mem_word: + move.l D2,-(SP) // data to write + move.l D1,-(SP) // address to access (in PCI memory address space) + move.l D0,-(SP) // handle + jsr _pci_write_mem_word + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_write_mem_longword: + move.l D2,-(SP) // data to write + move.l D1,-(SP) // address to access (in PCI memory address space) + move.l D0,-(SP) // handle + jsr _pci_write_mem_longword + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_read_io_byte: + move.l A0,-(SP) // pointer to data in memory + move.l D1,-(SP) // address to access (in PCI I/O address space) + move.l D0,-(SP) // handle + jsr _pci_read_io_byte + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_read_io_word: + move.l A0,-(SP) // pointer to data in memory + move.l D1,-(SP) // address to access (in PCI I/O address space) + move.l D0,-(SP) // handle + jsr _pci_read_io_word + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_read_io_longword: + move.l A0,-(SP) // pointer to data in memory + move.l D1,-(SP) // address to access (in PCI I/O address space) + move.l D0,-(SP) // handle + jsr _pci_read_io_longword + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_fast_read_io_byte: + move.l D1,-(SP) // address to access (in PCI I/O address space) + move.l D0,-(SP) // handle + jsr _pci_read_io_byte + addq.l #8,SP + rts + +/* Not implemented */ +_wrapper_fast_read_io_word: + move.l D1,-(SP) // address to access (in PCI I/O address space) + move.l D0,-(SP) // handle + jsr _pci_read_io_word + addq.l #8,SP + rts + +/* Not implemented */ +_wrapper_fast_read_io_longword: + move.l D1,-(SP) // address to access (in PCI I/O address space) + move.l D0,-(SP) // handle + jsr _pci_read_io_longword + addq.l #8,SP + rts + +/* Not implemented */ +_wrapper_write_io_byte: + move.l D2,-(SP) // data to write + move.l D1,-(SP) // address to access (in PCI I/O address space) + move.l D0,-(SP) // handle + jsr _pci_write_io_byte + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_write_io_word: + move.l D2,-(SP) // data to write + move.l D1,-(SP) // address to access (in PCI I/O address space) + move.l D0,-(SP) // handle + jsr _pci_write_io_word + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_write_io_longword: + move.l D2,-(SP) // data to write + move.l D1,-(SP) // address to access (in PCI I/O address space) + move.l D0,-(SP) // handle + jsr _pci_write_io_longword + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_get_machine_id: + jsr _pci_get_machine_id + rts + +/* Not implemented */ +_wrapper_get_pagesize: + jsr _pci_get_pagesize + rts + +/* Not implemented */ +_wrapper_virt_to_bus: + move.l A0,-(SP) // ptr + move.l D1,-(SP) // address in virtual CPU space + move.l D0,-(SP) // handle + jsr _pci_virt_to_bus + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_bus_to_virt: + move.l A0,-(SP) // ptr + move.l D1,-(SP) // PCI bus address + move.l D0,-(SP) // handle + jsr _pci_bus_to_virt + add.l #12,SP + rts + +/* Not implemented */ +_wrapper_virt_to_phys: + move.l A0,-(SP) // ptr + move.l D0,-(SP) // address in virtual CPU space + jsr _pci_virt_to_phys + addq.l #8,SP + rts + +/* Not implemented */ +_wrapper_phys_to_virt: + move.l A0,-(SP) // ptr + move.l D0,-(SP) // physical CPU address + jsr _pci_phys_to_virt + addq.l #8,SP + rts