diff --git a/.gdbinit b/.gdbinit
index 8cc437c..e663f22 100644
--- a/.gdbinit
+++ b/.gdbinit
@@ -1,7 +1,7 @@
 #set disassemble-next-line on
 define tr
 	# target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
-	target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
+	target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
 	monitor bdm-reset
 end
 define tbtr
diff --git a/include/pci.h b/include/pci.h
index 806ce7f..4e2b878 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -210,7 +210,7 @@ extern int16_t pci_unhook_interrupt(uint16_t handle);
 
 #define PCI_HANDLE(bus, slot, function)	(0 | ((bus & 0xff) << 8 | (slot & 0x1f) << 3 | (function & 7)))
 #define PCI_BUS_FROM_HANDLE(h)				(((h) & 0xff00) >> 8)
-#define PCI_SLOT_FROM_HANDLE(h)				(((h) & 0xf8) >> 3)
+#define PCI_DEVICE_FROM_HANDLE(h)			(((h) & 0xf8) >> 3)
 #define PCI_FUNCTION_FROM_HANDLE(h)			(((h) & 0x7))
 
 #endif /* _PCI_H_ */
diff --git a/sources/mmu.S b/sources/mmu.S
index 9e8d2b9..ebbd252 100644
--- a/sources/mmu.S
+++ b/sources/mmu.S
@@ -168,7 +168,7 @@ _mmu_init:
 // 00D0'0000 - 0x00DF'FFFF (last megabyte of ST RAM = Falcon video memory) locked ID=6
 // mapped to physical address 60D0'0000 (FPGA video memory)
 // video ram: read write execute normal write true
-#ifdef MACHINE_FIREBEE
+#if MACHINE_FIREBEE
  		move.l	#0x00d00000|MCF_MMU_MMUTR_ID(sca_page_ID)|std_mmutr,d0
 		move.l	#0x60d00000|writethrough_mmudr|MCF_MMU_MMUDR_LK,d1
 		move.l	d0,MCF_MMU_MMUTR		
@@ -196,13 +196,23 @@ _mmu_init:
 // this maps virtual 0x00F0'0000 - 0x00FF'FFFF to physical 0xFFF0'0000 - 0xFFFF'FFFF effectively making I/O area
 // accesses ST-compatible (just the same what Atari made for TT and Falcon). This does not get mapped for the
 // m5484LITE boards which enables us to later act on I/O access attempts during a page miss exception
-#ifdef MACHINE_FIREBEE
+#if MACHINE_FIREBEE
 		move.l	#0x00f00000|std_mmutr,d0
 		move.l	#0xfff00000|nocache_precise_mmudr|MCF_MMU_MMUDR_LK,d1
 		move.l	d0,MCF_MMU_MMUTR		
 		move.l	d1,MCF_MMU_MMUDR
 		move.l	d2,MCF_MMU_MMUOR						// mapped to ffffxxx, precise,
 		move.l	d3,MCF_MMU_MMUOR						// mapped to ffffxxx, precise,
+#elif MACHINE_M5484LITE
+//
+// Instead, we lock PCI address space. Uncached, precise. For now, only for the M5484LITE
+//
+		move.l	#0x80000000|std_mmutr,d0
+		move.l	#0x80000000|nocache_precise_mmudr|MCF_MMU_MMUDR_LK,d1
+		move.l	d0,MCF_MMU_MMUTR		
+		move.l	d1,MCF_MMU_MMUDR
+		move.l	d2,MCF_MMU_MMUOR						// mapped to ffffxxx, precise,
+		move.l	d3,MCF_MMU_MMUOR						// mapped to ffffxxx, precise,
 #endif /* MACHINE_FIREBEE */
 
 // maps (locked) the last MB (this is where BaS .data and .bss resides) of physical SDRAM to the same physical address
diff --git a/sources/pci.c b/sources/pci.c
index 3f3f3dd..fa3132d 100644
--- a/sources/pci.c
+++ b/sources/pci.c
@@ -102,7 +102,7 @@ uint32_t pci_read_config_longword(uint16_t handle, uint16_t offset)
 {
 	uint32_t value;
 	uint16_t bus = PCI_BUS_FROM_HANDLE(handle);
-	uint16_t slot = PCI_SLOT_FROM_HANDLE(handle);
+	uint16_t device = PCI_DEVICE_FROM_HANDLE(handle);
 	uint16_t function = PCI_FUNCTION_FROM_HANDLE(handle);
 
 	/* clear PCI status/command register */
@@ -114,7 +114,7 @@ uint32_t pci_read_config_longword(uint16_t handle, uint16_t offset)
 				MCF_PCI_PCISCR_DP;					/* clear parity error */
 	
 	//(void) MCF_PCI_PCISCR;
-	//wait(10);
+	//wait(100);
 
 	//xprintf("PCISCR before config cycle: %lx\r\n", MCF_PCI_PCISCR);
 
@@ -122,13 +122,13 @@ uint32_t pci_read_config_longword(uint16_t handle, uint16_t offset)
 
 	MCF_PCI_PCICAR = MCF_PCI_PCICAR_E |			/* enable configuration access special cycle */
 			MCF_PCI_PCICAR_BUSNUM(bus) |
-			MCF_PCI_PCICAR_DEVNUM(slot) |			/* device number, devices 0 - 9 are reserved */
+			MCF_PCI_PCICAR_DEVNUM(device) |		/* device number, devices 0 - 9 are reserved */
 			MCF_PCI_PCICAR_FUNCNUM(function) |	/* function number */
 			MCF_PCI_PCICAR_DWORD(offset / 4);
 
-	//wait(10);
+	//wait(100);
 	value =  * (volatile uint32_t *) PCI_IO_OFFSET;	/* access device */
-	//xprintf("pci_read_config_longword(%d (bus=%d, slot=%d, function=%d), %d) = %d\r\n", handle, bus, slot, function, offset, swpl(value));
+	//xprintf("pci_read_config_longword(%d (bus=%d, device=%d, function=%d), %d) = %d\r\n", handle, bus, device, function, offset, swpl(value));
 
 	return swpl(value);
 }
@@ -158,7 +158,7 @@ uint8_t pci_read_config_byte(uint16_t handle, uint16_t offset)
 void pci_write_config_longword(uint16_t handle, uint16_t offset, uint32_t value)
 {
 	uint16_t bus = PCI_BUS_FROM_HANDLE(handle);
-	uint16_t slot = PCI_SLOT_FROM_HANDLE(handle);
+	uint16_t device = PCI_DEVICE_FROM_HANDLE(handle);
 	uint16_t function = PCI_FUNCTION_FROM_HANDLE(handle);
 
 	/* clear PCI status/command register */
@@ -178,7 +178,7 @@ void pci_write_config_longword(uint16_t handle, uint16_t offset, uint32_t value)
 
 	MCF_PCI_PCICAR = MCF_PCI_PCICAR_E |				/* enable configuration access special cycle */
 			MCF_PCI_PCICAR_BUSNUM(bus) |
-			MCF_PCI_PCICAR_DEVNUM(slot) |			/* device number, devices 0 - 9 are reserved */
+			MCF_PCI_PCICAR_DEVNUM(device) |			/* device number, devices 0 - 9 are reserved */
 			MCF_PCI_PCICAR_FUNCNUM(function) |		/* function number */
 			MCF_PCI_PCICAR_DWORD(offset / 4);
 
@@ -210,20 +210,20 @@ struct pci_rd *pci_get_resource(uint16_t handle)
 int16_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index)
 {
 	uint16_t bus;
-	uint16_t slot;
+	uint16_t device;
 	uint16_t function;
 	uint16_t pos = 0;
 	int handle;
 
-	for (bus = 0; bus < 2; bus++)	/* FireBee USB is on DEVSEL(17) ??? */
+	for (bus = 0; bus < 255; bus++)	/* FireBee USB is on DEVSEL(17) ??? */
 	{
-		for (slot = 0; slot < 32; slot++)
+		for (device = 0; device < 32; device++)
 		{
 			for (function = 0; function < 8; function++)
 			{
 				uint32_t value;
 
-				handle = PCI_HANDLE(bus, slot, function);
+				handle = PCI_HANDLE(bus, device, function);
 				value = pci_read_config_longword(handle, 0);
 				if (value != 0xffffffff)	/* we have a device at this position */
 				{
@@ -275,7 +275,7 @@ static uint32_t io_address = PCI_IO_OFFSET;
  *
  * Map card resources, adjust BARs and fill resource descriptors
  */
-static void pci_device_config(uint16_t bus, uint16_t slot, uint16_t function)
+static void pci_device_config(uint16_t bus, uint16_t device, uint16_t function)
 {
 	uint32_t address;
 	uint16_t handle;
@@ -283,8 +283,8 @@ static void pci_device_config(uint16_t bus, uint16_t slot, uint16_t function)
 	struct pci_rd *descriptors;
 	int i;
 
-	/* determine pci handle from bus, slot + function number */
-	handle = PCI_HANDLE(bus, slot, function);
+	/* determine pci handle from bus, device + function number */
+	handle = PCI_HANDLE(bus, device, function);
 
 	/* find index into resource descriptor table for handle */
 	index = handle2index(handle);
@@ -384,26 +384,26 @@ static void pci_device_config(uint16_t bus, uint16_t slot, uint16_t function)
 void pci_scan(void)
 {
 	uint16_t bus;
-	uint16_t slot;
+	uint16_t device;
 	uint16_t function;
 	int16_t index = 0;
 
 	xprintf("\r\nPCI bus scan...\r\n\r\n");
-	xprintf(" Bus|Slot|Func|Vndr|Dev |\r\n");
+	xprintf(" Bus| Dev|Func|Vndr|D-ID|\r\n");
 	xprintf("----+----+----|----+----|\r\n");
-	for (bus = 0; bus < 2; bus++)	/* scan two busses. FireBee USB is on DEVSEL(17) */
+	for (bus = 0; bus < 255; bus++)	/* scan two busses. FireBee USB is on DEVSEL(17) */
 	{
-		for (slot = 0; slot < 32; slot++)
+		for (device = 0; device < 32; device++)
 		{
 			for (function = 0; function < 8; function++)
 			{
 				uint32_t value;
-				uint16_t handle = PCI_HANDLE(bus, slot, function);
+				uint16_t handle = PCI_HANDLE(bus, device, function);
 
 				value = pci_read_config_longword(handle, 0);
 				if (value != 0xffffffff)
 				{
-					xprintf(" %02x | %02x | %02x |%04x|%04x| %s\r\n", bus, slot, function,
+					xprintf(" %02x | %02x | %02x |%04x|%04x| %s\r\n", bus, device, function,
 							PCI_VENDOR_ID(value),
 							PCI_DEVICE_ID(value),
 							device_class(pci_read_config_longword(handle, 0x08) >> 24 & 0xff));
@@ -411,10 +411,10 @@ void pci_scan(void)
 					if (PCI_VENDOR_ID(value) != 0x1057 && PCI_DEVICE_ID(value) != 0x5806) /* do not configure bridge */
 					{
 						/* save handle to index value so that we later find our resources again */
-						handles[index++] = PCI_HANDLE(bus, slot, function);
+						handles[index++] = PCI_HANDLE(bus, device, function);
 
 						/* configure memory and I/O for card */
-						pci_device_config(bus, slot, function);
+						pci_device_config(bus, device, function);
 					}
 
 					/* test for multi-function device to avoid ghost device detects */