From bd3e32ebf792f789095a9e4225cc4f6bb91784e0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Markus=20Fr=C3=B6schle?= <mfro@mubf.de>
Date: Tue, 30 Oct 2012 20:26:43 +0000
Subject: [PATCH] finished ELF toolchain integration

---
 sources/startcf.S |  7 ++++---
 sources/sysinit.c | 15 +++++++++------
 2 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/sources/startcf.S b/sources/startcf.S
index 7f369ae..7ae96a6 100644
--- a/sources/startcf.S
+++ b/sources/startcf.S
@@ -1,15 +1,16 @@
 		.equ	MCF_MMU_MMUCR, __MMUBAR + 0
+		.global _startup
 
-_startup:
 		.extern	_initialize_hardware
 		.extern _rt_mbar
 
+_startup:
 		bra.s	warmstart
 		jmp		___BOOT_FLASH + 8 		/* that's also our reset vector */
 
 		/* disable interrupts */
 warmstart:
-		move.w	#0x2700,sr
+		move.w #0x2700,SR
 
 		/* Initialize MBAR */
 
@@ -25,7 +26,7 @@ warmstart:
 		move.l	d0,MCF_MMU_MMUCR
 
 		/* Initialize RAMBARs: locate SRAM and validate it */
-		move.l	#__RAMBAR0 + 0x7,d0 	/* supervisor only */
+		move.l	#__RAMBAR0 + 0x7,%d0 	/* supervisor only */
 		movec	d0,RAMBAR0
 		move.l	#__RAMBAR1 + 0x1,d0
 		movec	d0,RAMBAR1
diff --git a/sources/sysinit.c b/sources/sysinit.c
index fcbddea..10634e7 100644
--- a/sources/sysinit.c
+++ b/sources/sysinit.c
@@ -77,7 +77,7 @@ void init_slt(void)
 {
 	xprintf("slice timer initialization: ");
 	MCF_SLT0_STCNT = 0xffffffff;
-	MCF_SLT0_SCR = 0x05000000;
+	MCF_SLT0_SCR = MCF_SLT_SCR_TEN | MCF_SLT_SCR_IEN | MCF_SLT_SCR_RUN;	/* enable and run continuously */
 	xprintf("finished\r\n");
 }
 
@@ -283,16 +283,19 @@ void init_ddram(void)
 }
 
 /*
- * init FB_CSx
+ * initialize FlexBus chip select registers
  */
 void init_fbcs()
 {
 	xprintf("FlexBus chip select registers initialization: ");
 
 	/* Flash */
-	MCF_FBCS0_CSAR = 0xE0000000;			/* flash base address */
-	MCF_FBCS0_CSCR = 0x00001180;			/* 16 bit 4ws aa */
-	MCF_FBCS0_CSMR = 0x007F0001;			/* 8MB on */
+	MCF_FBCS0_CSAR = 0xE0000000;	/* flash base address */
+	MCF_FBCS0_CSCR = MCF_FBCS_CSCR_PS_16 |
+			MCF_FBCS_CSCR_WS(4)|
+			MCF_FBCS_CSCR_AA;
+	MCF_FBCS0_CSMR = MCF_FBCS_CSMR_BAM_8M |
+			MCF_FBCS_CSMR_V;				/* 8 MByte on */
 
 	MCF_FBCS1_CSAR = 0xFFF00000;			/* ATARI I/O ADRESS */
 	MCF_FBCS1_CSCR = MCF_FBCS_CSCR_PS_16	/* 16BIT PORT */
@@ -317,7 +320,7 @@ void init_fbcs()
 	MCF_FBCS4_CSCR = MCF_FBCS_CSCR_PS_32	// 32BIT PORT
 	    | MCF_FBCS_CSCR_BSTR				// BURST READ ENABLE
 	    | MCF_FBCS_CSCR_BSTW;				// BURST WRITE ENABLE
-	MCF_FBCS4_CSMR = MCF_FBCS_CSMR_BAM_1G	// 4000'0000-7FFF'FFFF
+	MCF_FBCS4_CSMR = MCF_FBCS_CSMR_BAM_4M	// 4000'0000-7FFF'FFFF
 			  | MCF_FBCS_CSMR_V;
 
 	xprintf("finished\r\n");