fix compiler warnings

This commit is contained in:
Markus Fröschle
2016-10-04 06:39:12 +00:00
parent 4a7fcbccee
commit b89fdda6d7
15 changed files with 83 additions and 58 deletions

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@@ -43,7 +43,6 @@ CFLAGS= -Wall \
-ffreestanding \ -ffreestanding \
-fleading-underscore \ -fleading-underscore \
-Winline \ -Winline \
-Wshadow \
-Wa,--register-prefix-optional \ -Wa,--register-prefix-optional \
-g2 -g2
CFLAGS_OPTIMIZED = -mcpu=5474 \ CFLAGS_OPTIMIZED = -mcpu=5474 \

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@@ -164,11 +164,10 @@ int MCD_initDma (dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags)
int taskTableSize, varTabsSize, funcDescTabsSize, contextSavesSize; int taskTableSize, varTabsSize, funcDescTabsSize, contextSavesSize;
int taskDescTabSize; int taskDescTabSize;
int i;
/* check if physical address is aligned on 512 byte boundary */ /* check if physical address is aligned on 512 byte boundary */
if (((u32)taskTableDest & 0x000001ff) != 0) if (((u32) taskTableDest & 0x000001ff) != 0)
return(MCD_TABLE_UNALIGNED); return MCD_TABLE_UNALIGNED;
MCD_taskTable = taskTableDest; /* set up local pointer to task Table */ MCD_taskTable = taskTableDest; /* set up local pointer to task Table */
@@ -246,9 +245,9 @@ int MCD_initDma (dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags)
entryPtr[i].TDTend = (u32)taskDescTabsOffset - 4; entryPtr[i].TDTend = (u32)taskDescTabsOffset - 4;
} }
#ifdef MCD_INCLUDE_EU /* Tack single DMA BDs onto end of code so API controls #ifdef MCD_INCLUDE_EU /* Tack single DMA BDs onto end of code so API controls
where they are since DMA might write to them */ where they are since DMA might write to them */
MCD_relocBuffDesc = (MCD_bufDesc*)(entryPtr[NUMOFVARIANTS - 1].TDTend + 4); MCD_relocBuffDesc = (MCD_bufDesc*)(entryPtr[NUMOFVARIANTS - 1].TDTend + 4);
#else /* DMA does not touch them so they can be wherever and we don't need to #else /* DMA does not touch them so they can be wherever and we don't need to
waste SRAM on them */ waste SRAM on them */
MCD_relocBuffDesc = MCD_singleBufDescs; MCD_relocBuffDesc = MCD_singleBufDescs;
#endif #endif
@@ -300,7 +299,7 @@ int MCD_initDma (dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags)
else else
MCD_dmaBar->ptdControl |= PTD_CTL_COMM_PREFETCH; MCD_dmaBar->ptdControl |= PTD_CTL_COMM_PREFETCH;
return(MCD_OK); return MCD_OK;
} }
/*********************** End of MCD_initDma() ***********************/ /*********************** End of MCD_initDma() ***********************/
@@ -379,14 +378,14 @@ int MCD_startDma (
if((channel < 0) || (channel >= NCHANNELS)) if((channel < 0) || (channel >= NCHANNELS))
return(MCD_CHANNEL_INVALID); return(MCD_CHANNEL_INVALID);
/* tbd - need to determine the proper response to a bad funcDesc when not /* tbd - need to determine the proper response to a bad funcDesc when not
including EU functions, for now, assign a benign funcDesc, but maybe including EU functions, for now, assign a benign funcDesc, but maybe
should return an error */ should return an error */
#ifndef MCD_INCLUDE_EU #ifndef MCD_INCLUDE_EU
funcDesc = MCD_FUNC_NOEU1; funcDesc = MCD_FUNC_NOEU1;
#endif #endif
#ifdef MCD_DEBUG #ifdef MCD_DEBUG
printf("startDma:Setting up params\n"); printf("startDma:Setting up params\n");
#endif #endif
@@ -547,7 +546,7 @@ printf("startDma:Setting up params\n");
} }
} }
MCD_chStatus[channel] = MCD_IDLE; MCD_chStatus[channel] = MCD_IDLE;
return(MCD_OK); return MCD_OK;
} }
/************************ End of MCD_startDma() *********************/ /************************ End of MCD_startDma() *********************/
@@ -562,7 +561,7 @@ printf("startDma:Setting up params\n");
* Notes: * Notes:
* MCD_XferProgrQuery() upon completing or after aborting a DMA, or * MCD_XferProgrQuery() upon completing or after aborting a DMA, or
* while the DMA is in progress, this function returns the first * while the DMA is in progress, this function returns the first
* DMA-destination address not (or not yet) used in the DMA. When * DMA-destination address not (or not yet) used in the DMA. When
* encountering a non-ready buffer descriptor, the information for * encountering a non-ready buffer descriptor, the information for
* the last completed descriptor is returned. * the last completed descriptor is returned.
* *
@@ -694,7 +693,7 @@ int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep)
default: break; default: break;
} }
return(MCD_OK); return MCD_OK;
} }
/******************* End of MCD_XferProgrQuery() ********************/ /******************* End of MCD_XferProgrQuery() ********************/
@@ -753,7 +752,7 @@ int MCD_killDma (int channel)
* MCD_XferProgrQuery (channel, &progRep); * MCD_XferProgrQuery (channel, &progRep);
* progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr; * progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr;
*/ */
return(MCD_OK); return MCD_OK;
} }
/************************ End of MCD_killDma() **********************/ /************************ End of MCD_killDma() **********************/
@@ -776,7 +775,7 @@ int MCD_continDma (int channel)
MCD_dmaBar->taskControl[channel] |= TASK_CTL_EN; MCD_dmaBar->taskControl[channel] |= TASK_CTL_EN;
MCD_chStatus[channel] = MCD_RUNNING; MCD_chStatus[channel] = MCD_RUNNING;
return(MCD_OK); return MCD_OK;
} }
/********************** End of MCD_continDma() **********************/ /********************** End of MCD_continDma() **********************/
@@ -808,7 +807,7 @@ int MCD_continDma (int channel)
* this means that bits 14 and 0 must enable debug functions before * this means that bits 14 and 0 must enable debug functions before
* bits 1 and 2, respectively, have any effect. * bits 1 and 2, respectively, have any effect.
* *
* NOTE: It's extremely important to not pause more than one DMA channel * NOTE: It's extremely important to not pause more than one DMA channel
* at a time. * at a time.
********************************************************************/ ********************************************************************/
@@ -839,7 +838,7 @@ int MCD_pauseDma (int channel)
* progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr; * progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr;
*/ */
} }
return(MCD_OK); return MCD_OK;
} }
/************************* End of MCD_pauseDma() ********************/ /************************* End of MCD_pauseDma() ********************/
@@ -858,7 +857,7 @@ int MCD_resumeDma (int channel)
if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN) if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN)
MCD_resmActions (channel); MCD_resmActions (channel);
return(MCD_OK); return MCD_OK;
} }
/************************ End of MCD_resumeDma() ********************/ /************************ End of MCD_resumeDma() ********************/
@@ -881,7 +880,7 @@ int MCD_csumQuery (int channel, u32 *csum)
*csum = MCD_relocBuffDesc[channel].csumResult; *csum = MCD_relocBuffDesc[channel].csumResult;
return(MCD_OK); return(MCD_OK);
#else #else
return(MCD_ERROR); return MCD_ERROR;
#endif #endif
} }
/*********************** End of MCD_resumeDma() *********************/ /*********************** End of MCD_resumeDma() *********************/

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@@ -103,13 +103,13 @@ static uint32_t hex_to_long(uint8_t hex[8])
static uint8_t checksum(uint8_t arr[]) static uint8_t checksum(uint8_t arr[])
{ {
int i; int i;
uint8_t checksum = SREC_COUNT(arr); uint8_t csum = SREC_COUNT(arr);
for (i = 0; i < SREC_COUNT(arr) - 1; i++) for (i = 0; i < SREC_COUNT(arr) - 1; i++)
{ {
checksum += arr[i + 2]; csum += arr[i + 2];
} }
return ~checksum; return ~csum;
} }
#ifdef _NOT_USED_ #ifdef _NOT_USED_

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@@ -23,7 +23,7 @@
#define RADEON_MMIOSIZE 0x80000 #define RADEON_MMIOSIZE 0x80000
#define RADEON_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1)) #define RADEON_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1))
#define ATY_RADEON_LCD_ON 0x00000001 #define ATY_RADEON_LCD_ON 0x00000001
#define ATY_RADEON_CRT_ON 0x00000002 #define ATY_RADEON_CRT_ON 0x00000002
@@ -82,7 +82,7 @@ enum radeon_chip_flags
CHIP_FLAGS_MASK = 0xffff0000UL, CHIP_FLAGS_MASK = 0xffff0000UL,
CHIP_IS_MOBILITY = 0x00010000UL, CHIP_IS_MOBILITY = 0x00010000UL,
CHIP_IS_IGP = 0x00020000UL, CHIP_IS_IGP = 0x00020000UL,
CHIP_HAS_CRTC2 = 0x00040000UL, CHIP_HAS_CRTC2 = 0x00040000UL,
}; };
/* /*
@@ -235,7 +235,7 @@ struct radeon_regs
uint32_t dot_clock_freq; uint32_t dot_clock_freq;
uint32_t pll_output_freq; uint32_t pll_output_freq;
int32_t feedback_div; int32_t feedback_div;
int32_t post_div; int32_t post_div;
/* PLL registers */ /* PLL registers */
uint32_t ppll_div_3; uint32_t ppll_div_3;
@@ -308,7 +308,7 @@ struct radeonfb_info
{ {
int32_t handle; /* PCI BIOS, must be 1st place */ int32_t handle; /* PCI BIOS, must be 1st place */
int32_t big_endian; /* PCI BIOS */ int32_t big_endian; /* PCI BIOS */
uint32_t cursor_x; uint32_t cursor_x;
uint32_t cursor_y; uint32_t cursor_y;
int32_t cursor_show; int32_t cursor_show;
@@ -352,10 +352,10 @@ struct radeonfb_info
void *io_base; void *io_base;
void *mmio_base; void *mmio_base;
void *fb_base; void *fb_base;
uint32_t fb_local_base; uint32_t fb_local_base;
uint32_t fb_offset; uint32_t fb_offset;
uint32_t bios_seg_phys; uint32_t bios_seg_phys;
void *bios_seg; void *bios_seg;
int32_t fp_bios_start; int32_t fp_bios_start;
@@ -413,7 +413,7 @@ struct radeonfb_info
#endif #endif
/* Texture */ /* Texture */
int32_t RenderInited3D; int32_t RenderInited3D;
int32_t tilingEnabled; int32_t tilingEnabled;
void *RenderTex; void *RenderTex;
@@ -437,7 +437,7 @@ struct radeonfb_info
int32_t RageTheatreCompositePort; int32_t RageTheatreCompositePort;
int32_t RageTheatreSVideoPort; int32_t RageTheatreSVideoPort;
int32_t tunerType; int32_t tunerType;
int32_t videoStatus; int32_t videoStatus;
int32_t encoding; int32_t encoding;
int32_t overlay_deint32_terlacing_method; int32_t overlay_deint32_terlacing_method;
@@ -451,7 +451,7 @@ struct radeonfb_info
uint32_t y,u,v; uint32_t y,u,v;
} videoLinearOffset; } videoLinearOffset;
#endif /* _NOT_USED_ */ #endif /* _NOT_USED_ */
int32_t dec_hue; int32_t dec_hue;
int32_t dec_saturation; int32_t dec_saturation;
int32_t dec_contrast; int32_t dec_contrast;
@@ -489,8 +489,8 @@ extern void __OUTPLLP(struct radeonfb_info *rinfo, uint32_t index, uint32_t val,
#define INREG16(addr) swpw(*(uint16_t *)(rinfo->mmio_base + addr)) #define INREG16(addr) swpw(*(uint16_t *)(rinfo->mmio_base + addr))
#define INREG(addr) swpl(*(uint32_t *)(rinfo->mmio_base + addr)) #define INREG(addr) swpl(*(uint32_t *)(rinfo->mmio_base + addr))
#define OUTREG8(addr, val) (*((uint8_t *)(rinfo->mmio_base + addr)) = val) #define OUTREG8(addr, val) (*((uint8_t *)(rinfo->mmio_base + addr)) = val)
#define OUTREG16(addr, val) (*((uint16_t *)(rinfo->mmio_base + addr)) = swpw(val)) #define OUTREG16(addr, val) (*((uint16_t *)(rinfo->mmio_base + addr)) = swpw((uint32_t) val))
#define OUTREG(addr, val) (*((uint32_t *)(rinfo->mmio_base + addr)) = swpl(val)) #define OUTREG(addr, val) (*((uint32_t *)(rinfo->mmio_base + addr)) = swpl((uint32_t) val))
extern int32_t *tab_funcs_pci; extern int32_t *tab_funcs_pci;
#define BIOS_IN8(v) (* ((uint8_t *) rinfo->bios_seg_phys + v)) #define BIOS_IN8(v) (* ((uint8_t *) rinfo->bios_seg_phys + v))
@@ -600,24 +600,24 @@ extern void radeon_restore_accel_state_mmio(struct fb_info *info);
extern void radeon_setup_for_solid_fill(struct fb_info *info, int color, int rop, unsigned int planemask); extern void radeon_setup_for_solid_fill(struct fb_info *info, int color, int rop, unsigned int planemask);
extern void radeon_subsequent_solid_fill_rect_mmio(struct fb_info *info, int x, int y, int w, int h); extern void radeon_subsequent_solid_fill_rect_mmio(struct fb_info *info, int x, int y, int w, int h);
extern void radeon_setup_for_solid_line_mmio(struct fb_info *info, int color, int rop, unsigned int planemask); extern void radeon_setup_for_solid_line_mmio(struct fb_info *info, int color, int rop, unsigned int planemask);
extern void radeon_subsequent_solid_hor_vert_line_mmio(struct fb_info *info, int x, int y, int len, int dir); extern void radeon_subsequent_solid_hor_vert_line_mmio(struct fb_info *info, int x, int y, int len, int dir);
extern void radeon_subsequent_solid_two_point_line_mmio(struct fb_info *info, int xa, int ya, int xb, extern void radeon_subsequent_solid_two_point_line_mmio(struct fb_info *info, int xa, int ya, int xb,
int yb, int flags); int yb, int flags);
extern void radeon_setup_for_dashed_line_mmio(struct fb_info *info, int fg, int bg, extern void radeon_setup_for_dashed_line_mmio(struct fb_info *info, int fg, int bg,
int rop, unsigned int planemask, int length, unsigned char *pattern); int rop, unsigned int planemask, int length, unsigned char *pattern);
extern void radeon_subsequent_dashed_two_point_line_mmio(struct fb_info *info, extern void radeon_subsequent_dashed_two_point_line_mmio(struct fb_info *info,
int xa, int ya, int xb, int yb, int flags, int phase); int xa, int ya, int xb, int yb, int flags, int phase);
extern void radeon_setup_for_screen_to_screen_copy_mmio(struct fb_info *info, extern void radeon_setup_for_screen_to_screen_copy_mmio(struct fb_info *info,
int xdir, int ydir, int rop, unsigned int planemask, int trans_color); int xdir, int ydir, int rop, unsigned int planemask, int trans_color);
extern void radeon_subsequent_screen_to_screen_copy_mmio(struct fb_info *info, extern void radeon_subsequent_screen_to_screen_copy_mmio(struct fb_info *info,
int xa, int ya, int xb, int yb, int w, int h); int xa, int ya, int xb, int yb, int w, int h);
extern void radeon_screen_to_screen_copy_mmio(struct fb_info *info, extern void radeon_screen_to_screen_copy_mmio(struct fb_info *info,
int xa, int ya, int xb, int yb, int w, int h, int rop); int xa, int ya, int xb, int yb, int w, int h, int rop);
extern void radeon_setup_for_mono_8x8_pattern_fill_mmio(struct fb_info *info, extern void radeon_setup_for_mono_8x8_pattern_fill_mmio(struct fb_info *info,
int patternx, int patterny, int fg, int bg, int rop, unsigned int planemask); int patternx, int patterny, int fg, int bg, int rop, unsigned int planemask);
extern void radeon_subsequent_mono_8x8_pattern_fill_rect_mmio(struct fb_info *info, extern void radeon_subsequent_mono_8x8_pattern_fill_rect_mmio(struct fb_info *info,
int patternx, int patterny, int x, int y, int w, int h); int patternx, int patterny, int x, int y, int w, int h);
extern void radeon_setup_for_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info, extern void radeon_setup_for_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info,
int fg, int bg, int rop, unsigned int planemask); int fg, int bg, int rop, unsigned int planemask);
extern void radeon_subsequent_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info, extern void radeon_subsequent_scanline_cpu_to_screen_color_expand_fill_mmio(struct fb_info *info,
int x, int y, int w, int h, int skipleft); int x, int y, int w, int h, int skipleft);
@@ -625,12 +625,12 @@ extern void radeon_subsequent_scanline_mmio(struct fb_info *info, unsigned long
extern void radeon_setup_for_scanline_image_write_mmio(struct fb_info *info, extern void radeon_setup_for_scanline_image_write_mmio(struct fb_info *info,
int rop, unsigned int planemask, int trans_color, int bpp); int rop, unsigned int planemask, int trans_color, int bpp);
extern void radeon_subsequent_scanline_image_write_rect_mmio(struct fb_info *info, extern void radeon_subsequent_scanline_image_write_rect_mmio(struct fb_info *info,
int x, int y, int w, int h, int skipleft); int x, int y, int w, int h, int skipleft);
extern void radeon_set_clipping_rectangle_mmio(struct fb_info *info, extern void radeon_set_clipping_rectangle_mmio(struct fb_info *info,
int xa, int ya, int xb, int yb); int xa, int ya, int xb, int yb);
extern void radeon_disable_clipping_mmio(struct fb_info *info); extern void radeon_disable_clipping_mmio(struct fb_info *info);
extern int32_t radeon_setup_for_cpu_to_screen_alpha_texture_mmio(struct fb_info *info, extern int32_t radeon_setup_for_cpu_to_screen_alpha_texture_mmio(struct fb_info *info,
int op, int red, int green, int blue, int op, int red, int green, int blue,
int alpha, int maskFormat, int dstFormat, int alpha, int maskFormat, int dstFormat,
uint8_t *alphaPtr, int alphaPitch, uint8_t *alphaPtr, int alphaPitch,

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@@ -25,5 +25,8 @@ enum {
SET_FAILED = 0x88, SET_FAILED = 0x88,
BUFFER_TOO_SMALL = 0x89 BUFFER_TOO_SMALL = 0x89
}; };
extern int x86_pcibios_handler(struct X86EMU *emu);
#endif /* PCI_BIOS_H */ #endif /* PCI_BIOS_H */

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@@ -213,7 +213,18 @@ void ikbd_handle_input(unsigned char cmd)
} }
} }
void ikbd_poll(void) { /*
* FIXME: temporarily provide function prototypes for unimplemented functions here to make compiler happy
*/
extern int GetTimer(int);
extern int CheckTimer(int);
extern void EnableIO(void);
extern void DisableIO(void);
extern int SPI(int);
void ikbd_poll(void)
{
static int mtimer = 0; static int mtimer = 0;
if (CheckTimer(mtimer)) if (CheckTimer(mtimer))
{ {

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@@ -509,8 +509,8 @@ void radeon_setup_for_mono_8x8_pattern_fill_mmio(struct fb_info *info, int patte
OUT_ACCEL_REG(DP_BRUSH_BKGD_CLR, bg); OUT_ACCEL_REG(DP_BRUSH_BKGD_CLR, bg);
if (rinfo->big_endian) if (rinfo->big_endian)
{ {
OUT_ACCEL_REG(BRUSH_DATA0, *(unsigned long *) &pattern[0]); OUT_ACCEL_REG(BRUSH_DATA0, &pattern[0]);
OUT_ACCEL_REG(BRUSH_DATA1, *(unsigned long *) &pattern[4]); OUT_ACCEL_REG(BRUSH_DATA1, &pattern[4]);
} }
else else
{ {

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@@ -39,7 +39,7 @@ static struct fb_var_screeninfo radeonfb_default_var =
.vmode = FB_VMODE_NONINTERLACED .vmode = FB_VMODE_NONINTERLACED
}; };
static char *radeon_get_mon_name(int type) char *radeon_get_mon_name(int type)
{ {
char *pret = NULL; char *pret = NULL;
switch(type) switch(type)

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@@ -127,7 +127,8 @@ int dspi_set_baudrate(int rate)
pbr = baudrates[i].pbr_divisor; pbr = baudrates[i].pbr_divisor;
/* TODO: set br and pbr here */ /* TODO: set br and pbr here */
(void) pbr;
(void) br;
return set_baudrate; return set_baudrate;
} }
@@ -162,7 +163,7 @@ uint8_t dspi_xchg_byte(int device, uint8_t byte, int last)
* buff: pointer to data buffer * buff: pointer to data buffer
* btr: number of bytes to receive (16, 64 or 512) * btr: number of bytes to receive (16, 64 or 512)
*/ */
static void dspi_rcv_byte_multi(int device, uint8_t *buff, uint32_t count) void dspi_rcv_byte_multi(int device, uint8_t *buff, uint32_t count)
{ {
int i; int i;
@@ -176,7 +177,7 @@ static void dspi_rcv_byte_multi(int device, uint8_t *buff, uint32_t count)
* buff: pointer to data * buff: pointer to data
* btx: number of bytes to send * btx: number of bytes to send
*/ */
static void dspi_xmt_byte_multi(int device, const uint8_t *buff, uint32_t btx) void dspi_xmt_byte_multi(int device, const uint8_t *buff, uint32_t btx)
{ {
int i; int i;

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@@ -531,7 +531,7 @@ void BaS(void)
xprintf("call FireTOS\r\n"); xprintf("call FireTOS\r\n");
/* Jump into FireTOS */ /* Jump into FireTOS */
typedef void void_func(void);
void_func* FireTOS = (void_func*) FIRETOS; void_func* FireTOS = (void_func*) FIRETOS;
FireTOS(); // Should never return FireTOS(); // Should never return
} }

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@@ -138,9 +138,9 @@ int usb_init(int32_t handle, const struct pci_device_id *ent)
{ {
if (controller_priv[i] != NULL) if (controller_priv[i] != NULL)
{ {
long handle = controller_priv[i]->handle; long hdl = controller_priv[i]->handle;
if (handle) if (hdl)
{ {
res |= usb_init(handle, NULL); /* FIXME: recursive call!? */ res |= usb_init(handle, NULL); /* FIXME: recursive call!? */
} }
@@ -1044,13 +1044,13 @@ struct usb_device *usb_get_dev_index(int index, int index_bus)
* returns a pointer of a new device structure or NULL, if * returns a pointer of a new device structure or NULL, if
* no device struct is available * no device struct is available
*/ */
struct usb_device *usb_alloc_new_device(int bus_index, void *priv) struct usb_device *usb_alloc_new_device(int bus, void *priv)
{ {
int i; int i;
int index = dev_index[bus_index]; int index = dev_index[bus];
struct usb_device *dev; struct usb_device *dev;
dbg("USB %d new device %d\r\n", bus_index, index); dbg("USB %d new device %d\r\n", bus, index);
if (index >= USB_MAX_DEVICE) if (index >= USB_MAX_DEVICE)
{ {
dbg("ERROR, too many USB Devices, max=%d\r\n", USB_MAX_DEVICE); dbg("ERROR, too many USB Devices, max=%d\r\n", USB_MAX_DEVICE);
@@ -1058,7 +1058,7 @@ struct usb_device *usb_alloc_new_device(int bus_index, void *priv)
} }
/* default Address is 0, real addresses start with 1 */ /* default Address is 0, real addresses start with 1 */
dev = &usb_dev[(bus_index * USB_MAX_DEVICE) + index]; dev = &usb_dev[(bus * USB_MAX_DEVICE) + index];
dev->devnum = index + 1; dev->devnum = index + 1;
dev->maxchild = 0; dev->maxchild = 0;
@@ -1067,8 +1067,8 @@ struct usb_device *usb_alloc_new_device(int bus_index, void *priv)
dev->parent = NULL; dev->parent = NULL;
dev->priv_hcd = priv; dev->priv_hcd = priv;
dev->usbnum = bus_index; dev->usbnum = bus;
dev_index[bus_index]++; dev_index[bus]++;
return dev; return dev;
} }

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@@ -84,9 +84,9 @@ int strcmp(const char *s1, const char *s2)
int strncmp(const char *s1, const char *s2, size_t max) int strncmp(const char *s1, const char *s2, size_t max)
{ {
int i; int i;
int cmp; int cmp = 0;
for (i = 0; i < max && *s1++ && *s2++; i++); for (i = 0; i < max && *s1++ && *s2++; i++)
{ {
cmp = (*s1 - *s2); cmp = (*s1 - *s2);
if (cmp != 0) return cmp; if (cmp != 0) return cmp;

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@@ -488,6 +488,12 @@ int fb_find_mode(struct fb_var_screeninfo *var,
dbg("fb_find_mode\r\n"); dbg("fb_find_mode\r\n");
/*
* FIXME: temporarily use unused variables here to make compiler happy
*/
(void) yres_specified;
(void) bpp_specified;
/* Set up defaults */ /* Set up defaults */
if (!db) if (!db)
{ {

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@@ -8,6 +8,7 @@
#include "x86emu_regs.h" #include "x86emu_regs.h"
#include "pci.h" #include "pci.h"
#include "pci_ids.h" #include "pci_ids.h"
#include "x86pcibios.h"
#define USE_SDRAM #define USE_SDRAM
#define DIRECT_ACCESS #define DIRECT_ACCESS

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@@ -418,6 +418,7 @@ get_data_segment(struct X86EMU *emu)
return emu->x86.R_SS; return emu->x86.R_SS;
} }
X86EMU_halt_sys(emu); X86EMU_halt_sys(emu);
return 0L;
} }
/**************************************************************************** /****************************************************************************
PARAMETERS: PARAMETERS:
@@ -636,6 +637,7 @@ decode_rm_byte_register(struct X86EMU *emu, int reg)
default: default:
X86EMU_halt_sys(emu); X86EMU_halt_sys(emu);
} }
return 0L;
} }
static uint8_t * static uint8_t *
@@ -683,6 +685,7 @@ decode_rm_word_register(struct X86EMU *emu, int reg)
default: default:
X86EMU_halt_sys(emu); X86EMU_halt_sys(emu);
} }
return 0;
} }
static uint16_t * static uint16_t *
@@ -730,6 +733,7 @@ decode_rm_long_register(struct X86EMU *emu, int reg)
default: default:
X86EMU_halt_sys(emu); X86EMU_halt_sys(emu);
} }
return 0L;
} }
static uint32_t * static uint32_t *
@@ -775,6 +779,7 @@ decode_rh_seg_register(struct X86EMU *emu)
default: default:
X86EMU_halt_sys(emu); X86EMU_halt_sys(emu);
} }
return 0;
} }
/* /*
* *