Firebee/FireBee_SVN
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

did more changes to interrupt code, but still crashes in networking

Browse Source
This commit is contained in:
Markus Fröschle
2015-01-10 17:19:56 +00:00
parent cb5bd09713
commit b56f40fc98
13 changed files with 884 additions and 796 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
bas_firebee.bdm
View File

@@ -63,10 +63,6 @@ write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
sleep 100 sleep 100
load -v firebee/ram.elf load -v firebee/ram.elf
write-ctrl 0x80e 0x2700
write-ctrl 0x2 0xa50c8120
dump-register SR
dump-register CACR
dump-register MBAR
execute execute
wait wait

1084
dma/MCD_dmaApi.c
View File

File diff suppressed because it is too large Load Diff

10
dma/dma.c
View File

@@ -665,6 +665,7 @@ void *dma_memcpy(void *dst, void *src, size_t n)
int dma_init(void) int dma_init(void)
{ {
int i;
int res; int res;
dbg("MCD DMA API initialization: "); dbg("MCD DMA API initialization: ");
@@ -675,6 +676,15 @@ int dma_init(void)
return 0; return 0;
} }
/*
* make sure dma_channel array is properly initialized
*/
for (i = 0; i < NCHANNELS; i++)
{
dma_channel[i].req = -1;
dma_channel[i].handler = NULL;
}
// test // test
dma_memcpy((void *) 0x10000, (void *) 0x03e00000, 0x00100000); /* copy one megabyte of flash to RAM */ dma_memcpy((void *) 0x10000, (void *) 0x03e00000, 0x00100000); /* copy one megabyte of flash to RAM */

27
include/MCD_dma.h
View File

@@ -12,8 +12,9 @@
/* /*
* Turn Execution Unit tasks ON (#define) or OFF (#undef) * Turn Execution Unit tasks ON (#define) or OFF (#undef)
*/ */
#undef MCD_INCLUDE_EU
//#define MCD_INCLUDE_EU //#define MCD_INCLUDE_EU
#undef MCD_INCLUDE_EU
/* /*
* Number of DMA channels * Number of DMA channels
@@ -291,53 +292,53 @@ int MCD_startDma (
uint32_t funcDesc /* a description of byte swapping, bit swapping, and CRC actions */ uint32_t funcDesc /* a description of byte swapping, bit swapping, and CRC actions */
); );
/* /*
* MCD_initDma() initializes the DMA API by setting up a pointer to the DMA * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
* registers, relocating and creating the appropriate task structures, and * registers, relocating and creating the appropriate task structures, and
* setting up some global settings * setting up some global settings
*/ */
int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, uint32_t flags); int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, uint32_t flags);
/* /*
* MCD_dmaStatus() returns the status of the DMA on the requested channel. * MCD_dmaStatus() returns the status of the DMA on the requested channel.
*/ */
int MCD_dmaStatus (int channel); int MCD_dmaStatus (int channel);
/* /*
* MCD_XferProgrQuery() returns progress of DMA on requested channel * MCD_XferProgrQuery() returns progress of DMA on requested channel
*/ */
int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep); int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep);
/* /*
* MCD_killDma() halts the DMA on the requested channel, without any * MCD_killDma() halts the DMA on the requested channel, without any
* intention of resuming the DMA. * intention of resuming the DMA.
*/ */
int MCD_killDma (int channel); int MCD_killDma (int channel);
/* /*
* MCD_continDma() continues a DMA which as stopped due to encountering an * MCD_continDma() continues a DMA which as stopped due to encountering an
* unready buffer descriptor. * unready buffer descriptor.
*/ */
int MCD_continDma (int channel); int MCD_continDma (int channel);
/* /*
* MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is * MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is
* running on that channel). * running on that channel).
*/ */
int MCD_pauseDma (int channel); int MCD_pauseDma (int channel);
/* /*
* MCD_resumeDma() resumes the DMA on a given channel (if any DMA is * MCD_resumeDma() resumes the DMA on a given channel (if any DMA is
* running on that channel). * running on that channel).
*/ */
int MCD_resumeDma (int channel); int MCD_resumeDma (int channel);
/* /*
* MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA * MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA
*/ */
int MCD_csumQuery (int channel, uint32_t *csum); int MCD_csumQuery (int channel, uint32_t *csum);
/* /*
* MCD_getCodeSize provides the packed size required by the microcoded task * MCD_getCodeSize provides the packed size required by the microcoded task
* and structures. * and structures.
*/ */

1
include/MCF5475_INTC.h
View File

@@ -107,7 +107,6 @@
#define MCF_INTC_LIACK(x) (*(volatile uint8_t *)(&_MBAR[0x7E4 + ((x-1)*0x4)])) #define MCF_INTC_LIACK(x) (*(volatile uint8_t *)(&_MBAR[0x7E4 + ((x-1)*0x4)]))
/* Bit definitions and macros for MCF_INTC_IPRH */ /* Bit definitions and macros for MCF_INTC_IPRH */
#define MCF_INTC_IPRH_INT32 (0x1) #define MCF_INTC_IPRH_INT32 (0x1)
#define MCF_INTC_IPRH_INT33 (0x2) #define MCF_INTC_IPRH_INT33 (0x2)

4
include/dma.h
View File

@@ -26,10 +26,6 @@
#include "MCD_dma.h" #include "MCD_dma.h"
#include "bas_string.h" #include "bas_string.h"
#define DMA_INTC_LVL 5
#define DMA_INTC_PRI 3
void *dma_memcpy(void *dst, void *src, size_t n); void *dma_memcpy(void *dst, void *src, size_t n);
extern int dma_init(void); extern int dma_init(void);
extern int dma_get_channel(int requestor); extern int dma_get_channel(int requestor);

382
include/driver_vec.h
View File

@@ -31,56 +31,57 @@
enum driver_type enum driver_type
{ {
BLOCKDEV_DRIVER, BLOCKDEV_DRIVER,
CHARDEV_DRIVER, CHARDEV_DRIVER,
XHDI_DRIVER, XHDI_DRIVER,
MCD_DRIVER, MCD_DRIVER,
VIDEO_DRIVER, VIDEO_DRIVER,
PCI_DRIVER, PCI_DRIVER,
MMU_DRIVER, MMU_DRIVER,
END_OF_DRIVERS = 0xffffffff, /* marks end of driver list */ END_OF_DRIVERS = 0xffffffff, /* marks end of driver list */
}; };
struct generic_driver_interface struct generic_driver_interface
{ {
uint32_t (*init)(void); uint32_t (*init)(void);
uint32_t (*read)(void *buf, size_t count); uint32_t (*read)(void *buf, size_t count);
uint32_t (*write)(const void *buf, size_t count); uint32_t (*write)(const void *buf, size_t count);
uint32_t (*ioctl)(uint32_t request, ...); uint32_t (*ioctl)(uint32_t request, ...);
}; };
struct dma_driver_interface struct dma_driver_interface
{ {
int32_t version; int32_t version;
int32_t magic; int32_t magic;
int (*dma_set_initiator)(int initiator); int (*dma_set_initiator)(int initiator);
uint32_t (*dma_get_initiator)(int requestor); uint32_t (*dma_get_initiator)(int requestor);
void (*dma_free_initiator)(int requestor); void (*dma_free_initiator)(int requestor);
int (*dma_set_channel)(int requestor, void (*handler)(void)); int (*dma_set_channel)(int requestor, void (*handler)(void));
int (*dma_get_channel)(int requestor); int (*dma_get_channel)(int requestor);
void (*dma_free_channel)(int requestor); void (*dma_free_channel)(int requestor);
void (*dma_clear_channel)(int channel); void (*dma_clear_channel)(int channel);
int (*MCD_startDma)(long channel, int (*MCD_startDma)(long channel,
int8_t *srcAddr, unsigned int srcIncr, int8_t *destAddr, unsigned int destIncr, int8_t *srcAddr, unsigned int srcIncr, int8_t *destAddr, unsigned int destIncr,
unsigned int dmaSize, unsigned int xferSize, unsigned int initiator, int priority, unsigned int dmaSize, unsigned int xferSize, unsigned int initiator, int priority,
unsigned int flags, unsigned int funcDesc); unsigned int flags, unsigned int funcDesc);
int32_t (*MCD_dmaStatus)(int32_t channel); int32_t (*MCD_dmaStatus)(int32_t channel);
int32_t (*MCD_XferProgrQuery)(int32_t channel, MCD_XferProg *progRep); int32_t (*MCD_XferProgrQuery)(int32_t channel, MCD_XferProg *progRep);
int32_t (*MCD_killDma)(int32_t channel); int32_t (*MCD_killDma)(int32_t channel);
int32_t (*MCD_continDma)(int32_t channel); int32_t (*MCD_continDma)(int32_t channel);
int32_t (*MCD_pauseDma)(int32_t channel); int32_t (*MCD_pauseDma)(int32_t channel);
int32_t (*MCD_resumeDma)(int32_t channel); int32_t (*MCD_resumeDma)(int32_t channel);
int32_t (*MCD_csumQuery)(int32_t channel, uint32_t *csum); int32_t (*MCD_csumQuery)(int32_t channel, uint32_t *csum);
void *(*dma_malloc)(uint32_t amount); void *(*dma_malloc)(uint32_t amount);
int32_t (*dma_free)(void *addr); int32_t (*dma_free)(void *addr);
}; };
struct xhdi_driver_interface struct xhdi_driver_interface
{ {
uint32_t (*xhdivec)(); uint32_t (*xhdivec)();
}; };
/* Interpretation of offset for color fields: All offsets are from the right, /*
* Interpretation of offset for color fields: All offsets are from the right,
* inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you
* can use the offset as right argument to <<). A pixel afterwards is a bit * can use the offset as right argument to <<). A pixel afterwards is a bit
* stream and is written to video memory as that unmodified. This implies * stream and is written to video memory as that unmodified. This implies
@@ -88,10 +89,10 @@ struct xhdi_driver_interface
*/ */
struct fb_bitfield struct fb_bitfield
{ {
unsigned long offset; /* beginning of bitfield */ unsigned long offset; /* beginning of bitfield */
unsigned long length; /* length of bitfield */ unsigned long length; /* length of bitfield */
unsigned long msb_right; /* != 0 : Most significant bit is */ unsigned long msb_right; /* != 0 : Most significant bit is */
/* right */ /* right */
}; };
/* /*
@@ -99,165 +100,166 @@ struct fb_bitfield
*/ */
struct fb_var_screeninfo struct fb_var_screeninfo
{ {
unsigned long xres; /* visible resolution */ unsigned long xres; /* visible resolution */
unsigned long yres; unsigned long yres;
unsigned long xres_virtual; /* virtual resolution */ unsigned long xres_virtual; /* virtual resolution */
unsigned long yres_virtual; unsigned long yres_virtual;
unsigned long xoffset; /* offset from virtual to visible */ unsigned long xoffset; /* offset from virtual to visible */
unsigned long yoffset; /* resolution */ unsigned long yoffset; /* resolution */
unsigned long bits_per_pixel; /* guess what */ unsigned long bits_per_pixel; /* guess what */
unsigned long grayscale; /* != 0 Graylevels instead of colors */ unsigned long grayscale; /* != 0 Graylevels instead of colors */
struct fb_bitfield red; /* bitfield in fb mem if true color, */ struct fb_bitfield red; /* bitfield in fb mem if true color, */
struct fb_bitfield green; /* else only length is significant */ struct fb_bitfield green; /* else only length is significant */
struct fb_bitfield blue; struct fb_bitfield blue;
struct fb_bitfield transp; /* transparency */ struct fb_bitfield transp; /* transparency */
unsigned long nonstd; /* != 0 Non standard pixel format */ unsigned long nonstd; /* != 0 Non standard pixel format */
unsigned long activate; /* see FB_ACTIVATE_* */ unsigned long activate; /* see FB_ACTIVATE_* */
unsigned long height; /* height of picture in mm */ unsigned long height; /* height of picture in mm */
unsigned long width; /* width of picture in mm */ unsigned long width; /* width of picture in mm */
unsigned long accel_flags; /* (OBSOLETE) see fb_info.flags */ unsigned long accel_flags; /* (OBSOLETE) see fb_info.flags */
/* Timing: All values in pixclocks, except pixclock (of course) */ /* Timing: All values in pixclocks, except pixclock (of course) */
unsigned long pixclock; /* pixel clock in ps (pico seconds) */ unsigned long pixclock; /* pixel clock in ps (pico seconds) */
unsigned long left_margin; /* time from sync to picture */ unsigned long left_margin; /* time from sync to picture */
unsigned long right_margin; /* time from picture to sync */ unsigned long right_margin; /* time from picture to sync */
unsigned long upper_margin; /* time from sync to picture */ unsigned long upper_margin; /* time from sync to picture */
unsigned long lower_margin; unsigned long lower_margin;
unsigned long hsync_len; /* length of horizontal sync */ unsigned long hsync_len; /* length of horizontal sync */
unsigned long vsync_len; /* length of vertical sync */ unsigned long vsync_len; /* length of vertical sync */
unsigned long sync; /* see FB_SYNC_* */ unsigned long sync; /* see FB_SYNC_* */
unsigned long vmode; /* see FB_VMODE_* */ unsigned long vmode; /* see FB_VMODE_* */
unsigned long rotate; /* angle we rotate counter clockwise */ unsigned long rotate; /* angle we rotate counter clockwise */
unsigned long refresh; unsigned long refresh;
unsigned long reserved[4]; /* Reserved for future compatibility */ unsigned long reserved[4]; /* Reserved for future compatibility */
}; };
struct fb_fix_screeninfo struct fb_fix_screeninfo
{ {
char id[16]; /* identification string eg "TT Builtin" */ char id[16]; /* identification string eg "TT Builtin" */
unsigned long smem_start; /* Start of frame buffer mem */ unsigned long smem_start; /* Start of frame buffer mem */
/* (physical address) */ /* (physical address) */
unsigned long smem_len; /* Length of frame buffer mem */ unsigned long smem_len; /* Length of frame buffer mem */
unsigned long type; /* see FB_TYPE_* */ unsigned long type; /* see FB_TYPE_* */
unsigned long type_aux; /* Interleave for interleaved Planes */ unsigned long type_aux; /* Interleave for interleaved Planes */
unsigned long visual; /* see FB_VISUAL_* */ unsigned long visual; /* see FB_VISUAL_* */
unsigned short xpanstep; /* zero if no hardware panning */ unsigned short xpanstep; /* zero if no hardware panning */
unsigned short ypanstep; /* zero if no hardware panning */ unsigned short ypanstep; /* zero if no hardware panning */
unsigned short ywrapstep; /* zero if no hardware ywrap */ unsigned short ywrapstep; /* zero if no hardware ywrap */
unsigned long line_length; /* length of a line in bytes */ unsigned long line_length; /* length of a line in bytes */
unsigned long mmio_start; /* Start of Memory Mapped I/O */ unsigned long mmio_start; /* Start of Memory Mapped I/O */
/* (physical address) */ /* (physical address) */
unsigned long mmio_len; /* Length of Memory Mapped I/O */ unsigned long mmio_len; /* Length of Memory Mapped I/O */
unsigned long accel; /* Indicate to driver which */ unsigned long accel; /* Indicate to driver which */
/* specific chip/card we have */ /* specific chip/card we have */
unsigned short reserved[3]; /* Reserved for future compatibility */ unsigned short reserved[3]; /* Reserved for future compatibility */
}; };
struct fb_chroma struct fb_chroma
{ {
unsigned long redx; /* in fraction of 1024 */ unsigned long redx; /* in fraction of 1024 */
unsigned long greenx; unsigned long greenx;
unsigned long bluex; unsigned long bluex;
unsigned long whitex; unsigned long whitex;
unsigned long redy; unsigned long redy;
unsigned long greeny; unsigned long greeny;
unsigned long bluey; unsigned long bluey;
unsigned long whitey; unsigned long whitey;
}; };
struct fb_monspecs struct fb_monspecs
{ {
struct fb_chroma chroma; struct fb_chroma chroma;
struct fb_videomode *modedb; /* mode database */ struct fb_videomode *modedb; /* mode database */
unsigned char manufacturer[4]; /* Manufacturer */ unsigned char manufacturer[4]; /* Manufacturer */
unsigned char monitor[14]; /* Monitor String */ unsigned char monitor[14]; /* Monitor String */
unsigned char serial_no[14]; /* Serial Number */ unsigned char serial_no[14]; /* Serial Number */
unsigned char ascii[14]; /* ? */ unsigned char ascii[14]; /* ? */
unsigned long modedb_len; /* mode database length */ unsigned long modedb_len; /* mode database length */
unsigned long model; /* Monitor Model */ unsigned long model; /* Monitor Model */
unsigned long serial; /* Serial Number - Integer */ unsigned long serial; /* Serial Number - Integer */
unsigned long year; /* Year manufactured */ unsigned long year; /* Year manufactured */
unsigned long week; /* Week Manufactured */ unsigned long week; /* Week Manufactured */
unsigned long hfmin; /* hfreq lower limit (Hz) */ unsigned long hfmin; /* hfreq lower limit (Hz) */
unsigned long hfmax; /* hfreq upper limit (Hz) */ unsigned long hfmax; /* hfreq upper limit (Hz) */
unsigned long dclkmin; /* pixelclock lower limit (Hz) */ unsigned long dclkmin; /* pixelclock lower limit (Hz) */
unsigned long dclkmax; /* pixelclock upper limit (Hz) */ unsigned long dclkmax; /* pixelclock upper limit (Hz) */
unsigned short input; /* display type - see FB_DISP_* */ unsigned short input; /* display type - see FB_DISP_* */
unsigned short dpms; /* DPMS support - see FB_DPMS_ */ unsigned short dpms; /* DPMS support - see FB_DPMS_ */
unsigned short signal; /* Signal Type - see FB_SIGNAL_* */ unsigned short signal; /* Signal Type - see FB_SIGNAL_* */
unsigned short vfmin; /* vfreq lower limit (Hz) */ unsigned short vfmin; /* vfreq lower limit (Hz) */
unsigned short vfmax; /* vfreq upper limit (Hz) */ unsigned short vfmax; /* vfreq upper limit (Hz) */
unsigned short gamma; /* Gamma - in fractions of 100 */ unsigned short gamma; /* Gamma - in fractions of 100 */
unsigned short gtf : 1; /* supports GTF */ unsigned short gtf : 1; /* supports GTF */
unsigned short misc; /* Misc flags - see FB_MISC_* */ unsigned short misc; /* Misc flags - see FB_MISC_* */
unsigned char version; /* EDID version... */ unsigned char version; /* EDID version... */
unsigned char revision; /* ...and revision */ unsigned char revision; /* ...and revision */
unsigned char max_x; /* Maximum horizontal size (cm) */ unsigned char max_x; /* Maximum horizontal size (cm) */
unsigned char max_y; /* Maximum vertical size (cm) */ unsigned char max_y; /* Maximum vertical size (cm) */
}; };
struct framebuffer_driver_interface struct framebuffer_driver_interface
{ {
struct fb_info **framebuffer_info; /* pointer to an fb_info struct (defined in include/fb.h) */ struct fb_info **framebuffer_info; /* pointer to an fb_info struct (defined in include/fb.h) */
}; };
struct pci_bios_interface { struct pci_bios_interface
uint32_t subjar; {
uint32_t version; uint32_t subjar;
/* Although we declare this functions as standard gcc functions (cdecl), uint32_t version;
* they expect paramenters inside registers (fastcall) unsupported by gcc m68k. /* Although we declare this functions as standard gcc functions (cdecl),
* Caller will take care of parameters passing convention. * they expect parameters inside registers (fastcall) unsupported by gcc m68k.
*/ * Caller will take care of parameters passing convention.
int32_t (*find_pci_device) (uint32_t id, uint16_t index); */
int32_t (*find_pci_classcode) (uint32_t class, uint16_t index); int32_t (*find_pci_device)(uint32_t id, uint16_t index);
int32_t (*read_config_byte) (int32_t handle, uint16_t reg, uint8_t *address); int32_t (*find_pci_classcode)(uint32_t class, uint16_t index);
int32_t (*read_config_word) (int32_t handle, uint16_t reg, uint16_t *address); int32_t (*read_config_byte)(int32_t handle, uint16_t reg, uint8_t *address);
int32_t (*read_config_longword) (int32_t handle, uint16_t reg, uint32_t *address); int32_t (*read_config_word)(int32_t handle, uint16_t reg, uint16_t *address);
uint8_t (*fast_read_config_byte) (int32_t handle, uint16_t reg); int32_t (*read_config_longword)(int32_t handle, uint16_t reg, uint32_t *address);
uint16_t (*fast_read_config_word) (int32_t handle, uint16_t reg); uint8_t (*fast_read_config_byte)(int32_t handle, uint16_t reg);
uint32_t (*fast_read_config_longword) (int32_t handle, uint16_t reg); uint16_t (*fast_read_config_word)(int32_t handle, uint16_t reg);
int32_t (*write_config_byte) (int32_t handle, uint16_t reg, uint16_t val); uint32_t (*fast_read_config_longword)(int32_t handle, uint16_t reg);
int32_t (*write_config_word) (int32_t handle, uint16_t reg, uint16_t val); int32_t (*write_config_byte)(int32_t handle, uint16_t reg, uint16_t val);
int32_t (*write_config_longword) (int32_t handle, uint16_t reg, uint32_t val); int32_t (*write_config_word)(int32_t handle, uint16_t reg, uint16_t val);
int32_t (*hook_interrupt) (int32_t handle, uint32_t *routine, uint32_t *parameter); int32_t (*write_config_longword)(int32_t handle, uint16_t reg, uint32_t val);
int32_t (*unhook_interrupt) (int32_t handle); int32_t (*hook_interrupt)(int32_t handle, uint32_t *routine, uint32_t *parameter);
int32_t (*special_cycle) (uint16_t bus, uint32_t data); int32_t (*unhook_interrupt)(int32_t handle);
int32_t (*get_routing) (int32_t handle); int32_t (*special_cycle)(uint16_t bus, uint32_t data);
int32_t (*set_interrupt) (int32_t handle); int32_t (*get_routing)(int32_t handle);
int32_t (*get_resource) (int32_t handle); int32_t (*set_interrupt)(int32_t handle);
int32_t (*get_card_used) (int32_t handle, uint32_t *address); int32_t (*get_resource)(int32_t handle);
int32_t (*set_card_used) (int32_t handle, uint32_t *callback); int32_t (*get_card_used)(int32_t handle, uint32_t *address);
int32_t (*read_mem_byte) (int32_t handle, uint32_t offset, uint8_t *address); int32_t (*set_card_used)(int32_t handle, uint32_t *callback);
int32_t (*read_mem_word) (int32_t handle, uint32_t offset, uint16_t *address); int32_t (*read_mem_byte)(int32_t handle, uint32_t offset, uint8_t *address);
int32_t (*read_mem_longword) (int32_t handle, uint32_t offset, uint32_t *address); int32_t (*read_mem_word)(int32_t handle, uint32_t offset, uint16_t *address);
uint8_t (*fast_read_mem_byte) (int32_t handle, uint32_t offset); int32_t (*read_mem_longword)(int32_t handle, uint32_t offset, uint32_t *address);
uint16_t (*fast_read_mem_word) (int32_t handle, uint32_t offset); uint8_t (*fast_read_mem_byte)(int32_t handle, uint32_t offset);
uint32_t (*fast_read_mem_longword) (int32_t handle, uint32_t offset); uint16_t (*fast_read_mem_word)(int32_t handle, uint32_t offset);
int32_t (*write_mem_byte) (int32_t handle, uint32_t offset, uint16_t val); uint32_t (*fast_read_mem_longword)(int32_t handle, uint32_t offset);
int32_t (*write_mem_word) (int32_t handle, uint32_t offset, uint16_t val); int32_t (*write_mem_byte)(int32_t handle, uint32_t offset, uint16_t val);
int32_t (*write_mem_longword) (int32_t handle, uint32_t offset, uint32_t val); int32_t (*write_mem_word)(int32_t handle, uint32_t offset, uint16_t val);
int32_t (*read_io_byte) (int32_t handle, uint32_t offset, uint8_t *address); int32_t (*write_mem_longword)(int32_t handle, uint32_t offset, uint32_t val);
int32_t (*read_io_word) (int32_t handle, uint32_t offset, uint16_t *address); int32_t (*read_io_byte)(int32_t handle, uint32_t offset, uint8_t *address);
int32_t (*read_io_longword) (int32_t handle, uint32_t offset, uint32_t *address); int32_t (*read_io_word)(int32_t handle, uint32_t offset, uint16_t *address);
uint8_t (*fast_read_io_byte) (int32_t handle, uint32_t offset); int32_t (*read_io_longword)(int32_t handle, uint32_t offset, uint32_t *address);
uint16_t (*fast_read_io_word) (int32_t handle, uint32_t offset); uint8_t (*fast_read_io_byte)(int32_t handle, uint32_t offset);
uint32_t (*fast_read_io_longword) (int32_t handle, uint32_t offset); uint16_t (*fast_read_io_word)(int32_t handle, uint32_t offset);
int32_t (*write_io_byte) (int32_t handle, uint32_t offset, uint16_t val); uint32_t (*fast_read_io_longword)(int32_t handle, uint32_t offset);
int32_t (*write_io_word) (int32_t handle, uint32_t offset, uint16_t val); int32_t (*write_io_byte)(int32_t handle, uint32_t offset, uint16_t val);
int32_t (*write_io_longword) (int32_t handle, uint32_t offset, uint32_t val); int32_t (*write_io_word)(int32_t handle, uint32_t offset, uint16_t val);
int32_t (*get_machine_id) (void); int32_t (*write_io_longword)(int32_t handle, uint32_t offset, uint32_t val);
int32_t (*get_pagesize) (void); int32_t (*get_machine_id)(void);
int32_t (*virt_to_bus) (int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); int32_t (*get_pagesize)(void);
int32_t (*bus_to_virt) (int32_t handle, uint32_t address, PCI_CONV_ADR *pointer); int32_t (*virt_to_bus)(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
int32_t (*virt_to_phys) (uint32_t address, PCI_CONV_ADR *pointer); int32_t (*bus_to_virt)(int32_t handle, uint32_t address, PCI_CONV_ADR *pointer);
int32_t (*phys_to_virt) (uint32_t address, PCI_CONV_ADR *pointer); int32_t (*virt_to_phys)(uint32_t address, PCI_CONV_ADR *pointer);
// int32_t reserved[2]; int32_t (*phys_to_virt)(uint32_t address, PCI_CONV_ADR *pointer);
// int32_t reserved[2];
}; };
struct mmu_driver_interface struct mmu_driver_interface
@@ -270,30 +272,30 @@ struct mmu_driver_interface
union interface union interface
{ {
struct generic_driver_interface *gdi; struct generic_driver_interface *gdi;
struct xhdi_driver_interface *xhdi; struct xhdi_driver_interface *xhdi;
struct dma_driver_interface *dma; struct dma_driver_interface *dma;
struct framebuffer_driver_interface *fb; struct framebuffer_driver_interface *fb;
struct pci_bios_interface *pci; struct pci_bios_interface *pci;
struct mmu_driver_interface *mmu; struct mmu_driver_interface *mmu;
}; };
struct generic_interface struct generic_interface
{ {
enum driver_type type; enum driver_type type;
char name[16]; char name[16];
char description[64]; char description[64];
int version; int version;
int revision; int revision;
union interface interface; union interface interface;
}; };
struct driver_table struct driver_table
{ {
uint32_t bas_version; uint32_t bas_version;
uint32_t bas_revision; uint32_t bas_revision;
void (*remove_handler)(void); /* calling this will disable the BaS' hook into trap #0 */ void (*remove_handler)(void); /* calling this will disable the BaS' hook into trap #0 */
struct generic_interface *interfaces; struct generic_interface *interfaces;
}; };

4
include/interrupts.h
View File

@@ -145,7 +145,9 @@
#endif /* MACHINE_FIREBEE */ #endif /* MACHINE_FIREBEE */
extern void isr_init(void); extern void isr_init(void);
extern int isr_register_handler(int vector, int (*handler)(void *, void *), void *hdev, void *harg); extern bool isr_set_prio_and_level(int int_source, int priority, int level);
extern bool isr_enable_int_source(int int_source);
extern bool isr_register_handler(int vector, int level, int priority, int (*handler)(void *, void *), void *hdev, void *harg);
extern void isr_remove_handler(int (*handler)(void *, void *)); extern void isr_remove_handler(int (*handler)(void *, void *));
extern bool isr_execute_handler(int vector); extern bool isr_execute_handler(int vector);
extern int pic_interrupt_handler(void *arg1, void *arg2); extern int pic_interrupt_handler(void *arg1, void *arg2);

2
net/net_timer.c
View File

@@ -158,7 +158,7 @@ bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri)
/* /*
* Register the timer interrupt handler * Register the timer interrupt handler
*/ */
if (!isr_register_handler(TIMER_VECTOR(ch), if (!isr_register_handler(TIMER_VECTOR(ch), 3, 0,
(int (*)(void *,void *)) timer_default_isr, (int (*)(void *,void *)) timer_default_isr,
NULL, NULL,
(void *) &net_timer[ch]) (void *) &net_timer[ch])

28
sys/BaS.c
View File

@@ -186,28 +186,28 @@ void nvram_init(void)
xprintf("finished\r\n"); xprintf("finished\r\n");
} }
#define KBD_ACIA_CONTROL ((uint8_t *) 0xfffffc00) #define KBD_ACIA_CONTROL * ((uint8_t *) 0xfffffc00)
#define MIDI_ACIA_CONTROL ((uint8_t *) 0xfffffc04) #define MIDI_ACIA_CONTROL * ((uint8_t *) 0xfffffc04)
#define MFP_INTR_IN_SERVICE_A ((uint8_t *) 0xfffffa0f) #define MFP_INTR_IN_SERVICE_A * ((uint8_t *) 0xfffffa0f)
#define MFP_INTR_IN_SERVICE_B ((uint8_t *) 0xfffffa11) #define MFP_INTR_IN_SERVICE_B * ((uint8_t *) 0xfffffa11)
void acia_init() void acia_init()
{ {
xprintf("init ACIA: "); xprintf("init ACIA: ");
/* init ACIA */ /* init ACIA */
* KBD_ACIA_CONTROL = 3; /* master reset */ KBD_ACIA_CONTROL = 3; /* master reset */
NOP(); NOP();
* MIDI_ACIA_CONTROL = 3; /* master reset */ MIDI_ACIA_CONTROL = 3; /* master reset */
NOP(); NOP();
* KBD_ACIA_CONTROL = 0x96; /* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */ KBD_ACIA_CONTROL = 0x96; /* clock div = 64, 8N1, RTS low, TX int disable, RX int enable */
NOP(); NOP();
* MFP_INTR_IN_SERVICE_A = -1; MFP_INTR_IN_SERVICE_A = 0xff;
NOP(); NOP();
* MFP_INTR_IN_SERVICE_B = -1; MFP_INTR_IN_SERVICE_B = 0xff;
NOP(); NOP();
xprintf("finished\r\n"); xprintf("finished\r\n");
@@ -280,7 +280,7 @@ void init_isr(void)
/* /*
* register the FEC interrupt handler * register the FEC interrupt handler
*/ */
if (!isr_register_handler(64 + INT_SOURCE_FEC0, fec0_interrupt_handler, NULL, (void *) &nif1)) if (!isr_register_handler(64 + INT_SOURCE_FEC0, 7, 6, fec0_interrupt_handler, NULL, (void *) &nif1))
{ {
err("unable to register isr for FEC0\r\n"); err("unable to register isr for FEC0\r\n");
} }
@@ -289,13 +289,11 @@ void init_isr(void)
* Register the DMA interrupt handler * Register the DMA interrupt handler
*/ */
if (!isr_register_handler(64 + INT_SOURCE_DMA, dma_interrupt_handler, NULL, NULL)) if (!isr_register_handler(64 + INT_SOURCE_DMA, 7, 7, dma_interrupt_handler, NULL, NULL))
{ {
err("Error: Unable to register isr for DMA\r\n"); err("Error: Unable to register isr for DMA\r\n");
} }
dma_irq_enable(7, 7); /* TODO: need to match the FEC driver's specs in MiNT? */
#ifdef _NOT_USED_ #ifdef _NOT_USED_
/* /*
* register the PIC interrupt handler * register the PIC interrupt handler
@@ -356,6 +354,8 @@ void BaS(void)
xprintf("copy EmuTOS: "); xprintf("copy EmuTOS: ");
dma_init();
/* copy EMUTOS */ /* copy EMUTOS */
src = (uint8_t *) EMUTOS; src = (uint8_t *) EMUTOS;
dma_memcpy(dst, src, EMUTOS_SIZE); dma_memcpy(dst, src, EMUTOS_SIZE);
@@ -441,7 +441,7 @@ void BaS(void)
xprintf("BaS initialization finished, enable interrupts\r\n"); xprintf("BaS initialization finished, enable interrupts\r\n");
init_isr(); init_isr();
enable_coldfire_interrupts(); enable_coldfire_interrupts();
//init_pci(); init_pci();
// video_init(); // video_init();
/* initialize USB devices */ /* initialize USB devices */

47
sys/exceptions.S
View File

@@ -238,7 +238,7 @@ init_vec_loop:
move.l a1,(INT_SOURCE_XLBPCI + 64) * 4(a0) move.l a1,(INT_SOURCE_XLBPCI + 64) * 4(a0)
#ifndef MACHINE_FIREBEE #ifndef MACHINE_FIREBEE
// FEC1 not wired on the FireBee (used for FPGA as GPIO), but used on other machines // FEC1 not wired on the FireBee (used for FPGA as GPIO), but available on other machines
move.l a1,(INT_SOURCE_FEC1 + 64) * 4(a0) move.l a1,(INT_SOURCE_FEC1 + 64) * 4(a0)
#endif #endif
@@ -430,15 +430,18 @@ irq5_forward: move.l 0x74,a0 // fetch OS irq5 vector
move.w #0x2500,sr // set interrupt level move.w #0x2500,sr // set interrupt level
rts // jump through vector rts // jump through vector
/*
* irq6 needs special treatment since - because the Coldfire only supports autovector interrupts
* - the exception vector is provided by the simulated MFP from the FPGA
*/
irq6: move.w #0x2700,sr // disable interrupt irq6: move.w #0x2700,sr // disable interrupt
subq.l #4,sp // extra space subq.l #4,sp // extra space
link a6,#-4 * 4 // save gcc scratch registers link a6,#-4 * 4 // save gcc scratch registers
movem.l d0-d1/a0-a1,(sp) movem.l d0-d1/a0-a1,(sp)
move.l 4(a6),-(sp) // format status word move.l 8(a6),-(sp) // format status word
move.l 8(a6),-(sp) // pc at exception move.l 12(a6),-(sp) // pc at exception
jsr _irq6_handler // call C handler jsr _irq6_handler // call C handler
lea 8(sp),sp // fix stack lea 8(sp),sp // fix stack
@@ -563,25 +566,53 @@ irq7text:
/* /*
* low-level interrupt service routine for routines registered with * low-level interrupt service routine for routines registered with
* isr_register_handler() * isr_register_handler(int vector). If the higlevel routine (isr_execute_handler())
* returns != 0, the call is forwarded to the OS (through its own vector base).
*/ */
.global _lowlevel_isr_handler .global _lowlevel_isr_handler
.extern _isr_execute_handler .extern _isr_execute_handler
/*
* stack format (after link instruction) is like this:
*
* +12 program counter (return address)
* +8 format_status
* +4 save area for rts (if we need to jump through the OS vector)
* (a6) -> saved a6 (from link)
* -4
* -8
* -12
* (sp) -> gcc scratch registers save area
*/
_lowlevel_isr_handler: _lowlevel_isr_handler:
move.w #0x2700,sr // do not disturb subq.l #4,sp // extra space
link a6,#-4 * 4 // make room for link a6,#-4 * 4 // make room for
movem.l d0-d1/a0-a1,(sp) // gcc scratch registers and save them, movem.l d0-d1/a0-a1,(sp) // gcc scratch registers and save them,
// other registers will be handled by gcc itself // other registers will be taken care of by gcc itself
move.w 4(a6),d0 // fetch vector number from stack move.w 8(a6),d0 // fetch vector number from stack
lsr.l #2,d0 // move it in place lsr.l #2,d0 // move it in place
andi.l #0xff,d0 // mask it out andi.l #0xff,d0 // mask it out
move.l d0,-(sp) // push it move.l d0,-(sp) // push it
jsr _isr_execute_handler // call the C handler jsr _isr_execute_handler // call the C handler
addq.l #4,sp // adjust stack addq.l #4,sp // adjust stack
tst.l d0 // handled?
bne lowlevel_forward // no, we forward it to TOS
movem.l (sp),d0-d1/a0-a1 // restore registers movem.l (sp),d0-d1/a0-a1 // restore registers
unlk a6 unlk a6
addq.l #4,sp // eliminate extra space
rte rte
lowlevel_forward:
move.l 8(a6),d0 // fetch OS irq vector
lsr.l #2,d0 // move it in place
andi.l #0xff,d0 // mask out vector number
add.l _rt_vbr,d0 // add runtime vbr
move.l d0,4(a6) // put on stack as return address
movem.l (sp),d0-d1/a0-a1 // restore registers
unlk a6 //
rts // jump through vector

84
sys/interrupts.c
View File

@@ -37,9 +37,6 @@
#include "dma.h" #include "dma.h"
#include "pci.h" #include "pci.h"
extern void (*rt_vbr[])(void);
#define VBR rt_vbr
#define IRQ_DEBUG #define IRQ_DEBUG
#if defined(IRQ_DEBUG) #if defined(IRQ_DEBUG)
#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0) #define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
@@ -72,6 +69,51 @@ void isr_init(void)
memset(isrtab, 0, sizeof(isrtab)); memset(isrtab, 0, sizeof(isrtab));
} }
bool isr_set_prio_and_level(int int_source, int priority, int level)
{
if (int_source > 8 && int_source <= 62)
{
/*
* preset interrupt control registers with level and priority
*/
MCF_INTC_ICR(int_source) = MCF_INTC_ICR_IP(priority) |
MCF_INTC_ICR_IL(level);
}
else if (int_source >= 1 && int_source <= 8)
{
dbg("interrrupt control register for vector %d is read only!\r\n");
}
else
{
err("invalid vector - interrupt control register not set.\r\n");
return false;
}
return true;
}
/*
* enable internal int source in DMA controller
*/
bool isr_enable_int_source(int int_source)
{
if (int_source < 32 && int_source > 0)
{
MCF_INTC_IMRL &= ~(1 << int_source);
}
else if (int_source >= 32 && int_source <= 62)
{
MCF_INTC_IMRH &= ~(1 << (int_source - 32));
}
else
{
err("vector %d does not correspond to an internal interrupt source\r\n");
return false;
}
return true;
}
/* /*
* This function places an interrupt handler in the ISR table, * This function places an interrupt handler in the ISR table,
* thereby registering it so that the low-level handler may call it. * thereby registering it so that the low-level handler may call it.
@@ -80,9 +122,10 @@ void isr_init(void)
* pointer to the device itself, and the second a pointer to a data * pointer to the device itself, and the second a pointer to a data
* structure used by the device driver for that particular device. * structure used by the device driver for that particular device.
*/ */
int isr_register_handler(int vector, int (*handler)(void *, void *), void *hdev, void *harg) bool isr_register_handler(int vector, int level, int priority, int (*handler)(void *, void *), void *hdev, void *harg)
{ {
int index; int index;
int int_source;
if ((vector == 0) || (handler == NULL)) if ((vector == 0) || (handler == NULL))
{ {
@@ -108,12 +151,26 @@ int isr_register_handler(int vector, int (*handler)(void *, void *), void *hdev,
isrtab[index].hdev = hdev; isrtab[index].hdev = hdev;
isrtab[index].harg = harg; isrtab[index].harg = harg;
int_source = vector - 64;
if (!isr_enable_int_source(int_source))
{
err("failed to enable internal interrupt souce %d in IMRL/IMRH\r\n", int_source);
return false;
}
if (!isr_set_prio_and_level(int_source, priority, level))
{
err("failed to set priority and level for interrupt source %d\r\n", int_source);
return false;
}
return true; return true;
} }
} }
dbg("no available slots to register handler for vector %d\n\r", vector); dbg("no available slots to register handler for vector %d\n\r", vector);
return false; /* no available slots */ return false; /* no available slots */
} }
void isr_remove_handler(int (*handler)(void *, void *)) void isr_remove_handler(int (*handler)(void *, void *))
@@ -145,24 +202,19 @@ bool isr_execute_handler(int vector)
int index; int index;
bool retval = false; bool retval = false;
dbg("vector = 0x%x\r\n", vector); dbg("vector = %d\r\n", vector);
/* /*
* locate an Interrupt Service Routine handler. * locate an interrupt service routine handler.
*/ */
for (index = 0; index < MAX_ISR_ENTRY; index++) for (index = 0; index < MAX_ISR_ENTRY; index++)
{ {
if (isrtab[index].vector == vector) if (isrtab[index].vector == vector)
{ {
retval = true; return isrtab[index].handler(isrtab[index].hdev, isrtab[index].harg);
if (isrtab[index].handler(isrtab[index].hdev, isrtab[index].harg))
{
return retval;
}
} }
} }
dbg("no isr handler for vector %d found\r\n", vector); err("no isr handler for vector %d found. Spurious?\r\n", vector);
return retval; return retval;
} }

1
sys/sysinit.c
View File

@@ -1117,7 +1117,6 @@ void initialize_hardware(void)
#if MACHINE_FIREBEE #if MACHINE_FIREBEE
init_ac97(); init_ac97();
#endif /* MACHINE_FIREBEE */ #endif /* MACHINE_FIREBEE */
dma_init();
/* jump into the BaS */ /* jump into the BaS */
extern void BaS(void); extern void BaS(void);