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Reverse merge from trunk in pci_BaS_gcc branch

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This commit is contained in:
David Gálvez
2014-07-10 13:20:14 +00:00
parent 818cb2bcd7
commit b0617246e2
54 changed files with 1006 additions and 3653 deletions
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10
net/am79c874.c
View File

@@ -13,10 +13,8 @@
#include "firebee.h"
#elif defined(MACHINE_M5484LITE)
#include "m5484l.h"
#elif defined(MACHINE_M54455)
#include "m54455.h"
#else
#error "unknown machine!"
#error "unknown machine"
#endif
//#define DBG_AM79
@@ -65,7 +63,6 @@ int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duple
if (!(settings & MII_AM79C874_CR_RESET))
break;
}
if (timeout >= FEC_MII_TIMEOUT)
{
dbg("%s: PHY reset failed\r\n", __FUNCTION__);
@@ -91,14 +88,11 @@ int am79c874_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duple
if (timeout >= FEC_MII_TIMEOUT)
{
dbg("%s: Auto-negotiation failed (timeout). Set default mode (100Mbps, full duplex)\r\n", __FUNCTION__);
dbg("%s: PHY Set the default mode\r\n", __FUNCTION__);
/* Set the default mode (Full duplex, 100 Mbps) */
if (!fec_mii_write(fec_ch, phy_addr, MII_AM79C874_CR, MII_AM79C874_CR_100MB | MII_AM79C874_CR_DPLX))
{
dbg("%s: forced setting 100Mbps/full failed.\r\n", __FUNCTION__);
return 0;
}
}
#ifdef DBG_AM79

2
net/arp.c
View File

@@ -11,7 +11,7 @@
#include <stdbool.h>
#include <stddef.h>
//#define DBG_ARP
#define DBG_ARP
#ifdef DBG_ARP
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else

26
net/bcm5222.c
View File

@@ -18,15 +18,13 @@
#include "firebee.h"
#elif defined(MACHINE_M5484LITE)
#include "m5484l.h"
#elif defined(MACHINE_M54455)
#include "m54455.h"
#else
#error "Unknown machine!"
#endif
#define DBG_BCM
#ifdef DBG_BCM
#define dbg(format, arg...) do { xprintf("DEBUG %s(): " format, __FUNCTION__, ##arg); } while (0)
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_BCM */
@@ -55,7 +53,7 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
/* Initialize the MII interface */
fec_mii_init(fec_ch, SYSCLK / 1000);
dbg("PHY reset\r\n");
dbg("%s: PHY reset\r\n", __FUNCTION__);
/* Reset the PHY */
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, BCM5222_CTRL_RESET | BCM5222_CTRL_ANE))
@@ -71,7 +69,7 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
if(timeout >= FEC_MII_TIMEOUT)
return 0;
dbg("PHY reset OK\r\n");
dbg("%s: PHY reset OK\r\n", __FUNCTION__);
settings = (BCM5222_AN_ADV_NEXT_PAGE | BCM5222_AN_ADV_PAUSE);
@@ -89,13 +87,13 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_AN_ADV, settings))
return 0;
dbg("PHY Enable Auto-Negotiation\r\n");
dbg("%s: PHY Enable Auto-Negotiation\r\n", __FUNCTION__);
/* Enable Auto-Negotiation */
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_CTRL, (BCM5222_CTRL_ANE | BCM5222_CTRL_RESTART_AN)))
return 0;
dbg("PHY Wait for auto-negotiation to complete\r\n");
dbg("%s: PHY Wait for auto-negotiation to complete\r\n", __FUNCTION__);
/* Wait for auto-negotiation to complete */
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
@@ -108,7 +106,7 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
if (timeout < FEC_MII_TIMEOUT)
{
dbg("PHY auto-negociation complete\r\n");
dbg("%s: PHY auto-negociation complete\r\n", __FUNCTION__);
/* Read Auxiliary Control/Status Register */
if (!fec_mii_read(fec_ch, phy_addr, BCM5222_ACSR, &settings))
@@ -116,7 +114,7 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
}
else
{
dbg("auto negotiation failed, PHY Set the default mode\r\n");
dbg("%s: auto negotiation failed, PHY Set the default mode\r\n", __FUNCTION__);
/* Set the default mode (Full duplex, 100 Mbps) */
if (!fec_mii_write(fec_ch, phy_addr, BCM5222_ACSR, settings = (BCM5222_ACSR_100BTX | BCM5222_ACSR_FDX)))
@@ -129,17 +127,17 @@ int bcm5222_init(uint8_t fec_ch, uint8_t phy_addr, uint8_t speed, uint8_t duplex
else
fec_duplex(fec_ch, FEC_MII_HALF_DUPLEX);
dbg("PHY Mode: ");
dbg("%s: PHY Mode: ", __FUNCTION__);
if (settings & BCM5222_ACSR_100BTX)
dbg("100Mbps\r\n");
dbg("%s: 100Mbps\r\n", __FUNCTION__);
else
dbg("10Mbps\r\n");
dbg("%s: 10Mbps\r\n", __FUNCTION__);
if (settings & BCM5222_ACSR_FDX)
dbg("Full-duplex\r\n");
dbg("%s: Full-duplex\r\n", __FUNCTION__);
else
dbg("Half-duplex\r\n");
dbg("%s: Half-duplex\r\n", __FUNCTION__);
return 1;
}

4
net/bootp.c
View File

@@ -13,7 +13,7 @@
#define DBG_BOOTP
#ifdef DBG_BOOTP
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_BOOTP */
@@ -94,7 +94,7 @@ void bootp_handler(NIF *nif, NBUF *nbuf)
struct bootp_packet *rx_p;
udp_frame_hdr *udpframe;
dbg("\r\n");
dbg("%s\n", __FUNCTION__);
rx_p = (struct bootp_packet *) &nbuf->data[nbuf->offset];
udpframe = (udp_frame_hdr *) &nbuf->data[nbuf->offset - UDP_HDR_SIZE];

231
net/fec.c
View File

@@ -17,24 +17,21 @@
#include "bas_string.h"
#include "bas_printf.h"
#include "util.h"
#include "wait.h"
#include "am79c874.h"
//#include "bcm5222.h"
#include "bcm5222.h"
#include <stdbool.h>
#if defined(MACHINE_FIREBEE)
#include "firebee.h"
#elif defined(MACHINE_M5484LITE)
#include "m5484l.h"
#elif defined(MACHINE_M54455)
#include "m54455.h"
#else
#error Unknown machine!
#endif
// #define DBG_FEC
//#define DBG_FEC
#ifdef DBG_FEC
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_FEC */
@@ -94,12 +91,11 @@ int fec_mii_write(uint8_t ch, uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
*/
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
{
wait(1);
if (MCF_FEC_EIR(ch) & MCF_FEC_EIR_MII)
break;
}
if (timeout == FEC_MII_TIMEOUT)
if(timeout == FEC_MII_TIMEOUT)
return 0;
/*
@@ -160,12 +156,11 @@ int fec_mii_read(uint8_t ch, uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
*/
for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
{
wait(1);
if (MCF_FEC_EIR(ch) & MCF_FEC_EIR_MII)
break;
}
if (timeout == FEC_MII_TIMEOUT)
if(timeout == FEC_MII_TIMEOUT)
return 0;
/*
@@ -237,33 +232,33 @@ void fec_log_init(uint8_t ch)
*/
void fec_log_dump(uint8_t ch)
{
dbg("\r\n FEC%d Log\r\n", __FUNCTION__, ch);
dbg(" ---------------\r\n", __FUNCTION__);
dbg(" Total: %4d\r\n", fec_log[ch].total);
dbg(" hberr: %4d\r\n", fec_log[ch].hberr);
dbg(" babr: %4d\r\n", fec_log[ch].babr);
dbg(" babt: %4d\r\n", fec_log[ch].babt);
dbg(" gra: %4d\r\n", fec_log[ch].gra);
dbg(" txf: %4d\r\n", fec_log[ch].txf);
dbg(" mii: %4d\r\n", fec_log[ch].mii);
dbg(" lc: %4d\r\n", fec_log[ch].lc);
dbg(" rl: %4d\r\n", fec_log[ch].rl);
dbg(" xfun: %4d\r\n", fec_log[ch].xfun);
dbg(" xferr: %4d\r\n", fec_log[ch].xferr);
dbg(" rferr: %4d\r\n", fec_log[ch].rferr);
dbg(" dtxf: %4d\r\n", fec_log[ch].dtxf);
dbg(" drxf: %4d\r\n", fec_log[ch].drxf);
dbg(" \r\nRFSW:\r\n");
dbg(" inv: %4d\r\n", fec_log[ch].rfsw_inv);
dbg(" m: %4d\r\n", fec_log[ch].rfsw_m);
dbg(" bc: %4d\r\n", fec_log[ch].rfsw_bc);
dbg(" mc: %4d\r\n", fec_log[ch].rfsw_mc);
dbg(" lg: %4d\r\n", fec_log[ch].rfsw_lg);
dbg(" no: %4d\r\n", fec_log[ch].rfsw_no);
dbg(" cr: %4d\r\n", fec_log[ch].rfsw_cr);
dbg(" ov: %4d\r\n", fec_log[ch].rfsw_ov);
dbg(" tr: %4d\r\n", fec_log[ch].rfsw_tr);
dbg(" ---------------\r\n\r\n");
dbg("%s: \r\n FEC%d Log\r\n", __FUNCTION__, ch);
dbg("%s: ---------------\r\n", __FUNCTION__);
dbg("%s: Total: %4d\r\n", __FUNCTION__, fec_log[ch].total);
dbg("%s: hberr: %4d\r\n", __FUNCTION__, fec_log[ch].hberr);
dbg("%s: babr: %4d\r\n", __FUNCTION__, fec_log[ch].babr);
dbg("%s: babt: %4d\r\n", __FUNCTION__, fec_log[ch].babt);
dbg("%s: gra: %4d\r\n", __FUNCTION__, fec_log[ch].gra);
dbg("%s: txf: %4d\r\n", __FUNCTION__, fec_log[ch].txf);
dbg("%s: mii: %4d\r\n", __FUNCTION__, fec_log[ch].mii);
dbg("%s: lc: %4d\r\n", __FUNCTION__, fec_log[ch].lc);
dbg("%s: rl: %4d\r\n", __FUNCTION__, fec_log[ch].rl);
dbg("%s: xfun: %4d\r\n", __FUNCTION__, fec_log[ch].xfun);
dbg("%s: xferr: %4d\r\n", __FUNCTION__, fec_log[ch].xferr);
dbg("%s: rferr: %4d\r\n", __FUNCTION__, fec_log[ch].rferr);
dbg("%s: dtxf: %4d\r\n", __FUNCTION__, fec_log[ch].dtxf);
dbg("%s: drxf: %4d\r\n", __FUNCTION__, fec_log[ch].drxf);
dbg("%s: \r\nRFSW:\r\n", __FUNCTION__);
dbg("%s: inv: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_inv);
dbg("%s: m: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_m);
dbg("%s: bc: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_bc);
dbg("%s: mc: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_mc);
dbg("%s: lg: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_lg);
dbg("%s: no: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_no);
dbg("%s: cr: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_cr);
dbg("%s: ov: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_ov);
dbg("%s: tr: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_tr);
dbg("%s: ---------------\r\n\r\n", __FUNCTION__);
}
/*
@@ -486,7 +481,9 @@ void fec_init(uint8_t ch, uint8_t mode, const uint8_t *pa)
*/
MCF_FEC_RCR(ch) = 0
| MCF_FEC_RCR_MAX_FL(ETH_MAX_FRM)
//#ifdef FEC_PROMISCUOUS
| MCF_FEC_RCR_PROM
//#endif
| MCF_FEC_RCR_FCE;
if (mode == FEC_MODE_MII)
@@ -538,26 +535,19 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
{
uint32_t initiator;
int channel;
#ifdef DBG_FEC
int res;
#endif
/*
* Make the initiator assignment
*/
#if defined(DBG_FEC)
res =
#else
(void)
#endif
dma_set_initiator(DMA_FEC_RX(ch));
dbg("dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", ch, res);
res = dma_set_initiator(DMA_FEC_RX(ch));
dbg("%s: dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", __FUNCTION__, ch, res);
/*
* Grab the initiator number
*/
initiator = dma_get_initiator(DMA_FEC_RX(ch));
dbg("dma_get_initiator(DMA_FEC_RX(%d)) = %d\r\n", ch, initiator);
dbg("%s: dma_get_initiator(DMA_FEC_RX(%d)) = %d\r\n", __FUNCTION__, ch, initiator);
/*
* Determine the DMA channel running the task for the
@@ -565,7 +555,7 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
*/
channel = dma_set_channel(DMA_FEC_RX(ch),
(ch == 0) ? fec0_rx_frame : fec1_rx_frame);
dbg("DMA channel for FEC%1d: %d\r\n", ch, channel);
dbg("%s: DMA channel for FEC%1d: %d\r\n", __FUNCTION__, ch, channel);
/*
* Start the Rx DMA task
@@ -579,18 +569,18 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
0,
initiator,
FECRX_DMA_PRI(ch),
0
| MCD_FECRX_DMA
0
| MCD_FECRX_DMA
| MCD_INTERRUPT
| MCD_TT_FLAGS_CW
| MCD_TT_FLAGS_CW
| MCD_TT_FLAGS_RL
| MCD_TT_FLAGS_SP
,
0
0
| MCD_NO_CSUM
| MCD_NO_BYTE_SWAP
);
dbg("Rx DMA task for FEC%1d started\r\n", ch);
dbg("%s: Rx DMA task for FEC%1d started\r\n", __FUNCTION__, ch);
}
/*
@@ -614,13 +604,13 @@ void fec_rx_continue(uint8_t ch)
*/
channel = dma_get_channel(DMA_FEC_RX(ch));
dbg("RX DMA channel for FEC%1d is %d\r\n", ch, channel);
dbg("%s: RX DMA channel for FEC%1d is %d\r\n", __FUNCTION__, ch, channel);
/*
* Continue/restart the DMA task
*/
MCD_continDma(channel);
dbg("RX dma on channel %d continued\r\n", channel);
dbg("%s: RX dma on channel %d continued\r\n", __FUNCTION__, channel);
}
/*
@@ -649,9 +639,9 @@ void fec_rx_stop (uint8_t ch)
/* Kill the FEC Rx DMA task */
MCD_killDma(channel);
/*
* Free up the FEC requestor from the software maintained
* initiator list
/*
* Free up the FEC requestor from the software maintained
* initiator list
*/
dma_free_initiator(DMA_FEC_RX(ch));
@@ -663,7 +653,7 @@ void fec_rx_stop (uint8_t ch)
}
/*
* Receive Frame interrupt handler - this handler is called by the
* Receive Frame interrupt handler - this handler is called by the
* DMA interrupt handler indicating that a packet was successfully
* transferred out of the Rx FIFO.
*
@@ -678,7 +668,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
NBUF *cur_nbuf, *new_nbuf;
int keep;
dbg("started\r\n");
dbg("%s: started\r\n", __FUNCTION__);
while ((pRxBD = fecbd_rx_alloc(ch)) != NULL)
{
@@ -691,7 +681,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
* - No undefined bits should be set
* - The upper 5 bits of the length should be cleared
*/
if (!(pRxBD->status & RX_BD_L) || (pRxBD->status & 0x0608)
if (!(pRxBD->status & RX_BD_L) || (pRxBD->status & 0x0608)
|| (pRxBD->length & 0xF800))
{
keep = false;
@@ -723,8 +713,8 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
if (keep)
{
/*
* Pull the network buffer off the Rx ring queue
/*
* Pull the network buffer off the Rx ring queue
*/
cur_nbuf = nbuf_remove(NBUF_RX_RING);
@@ -740,7 +730,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
new_nbuf = nbuf_alloc();
if (new_nbuf == NULL)
{
dbg("nbuf_alloc() failed\n");
dbg("%s: nbuf_alloc() failed\n", __FUNCTION__);
/*
* Can't allocate a new network buffer, so we
@@ -774,7 +764,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
/*
* Let the DMA know that there is a new Rx BD (in case the
* Let the DMA know that there is a new Rx BD (in case the
* ring was full and the DMA was waiting for an empty one)
*/
fec_rx_continue(ch);
@@ -785,7 +775,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
eth_hdr = (ETH_HDR *) cur_nbuf->data;
/*
* Pass the received packet up the network stack if the
* Pass the received packet up the network stack if the
* protocol is supported in our network interface (NIF)
*/
if (nif_protocol_exist(nif, eth_hdr->type))
@@ -796,12 +786,12 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
else
{
nbuf_free(cur_nbuf);
dbg("got unsupported packet %d, trashed it\r\n", eth_hdr->type);
dbg("%s: got unsupported packet %d, trashed it\r\n", __FUNCTION__, eth_hdr->type);
}
}
else
else
{
/*
/*
* This frame isn't a keeper
* Reset the status and length, but don't need to get another
* buffer since we are trashing the data in the current one
@@ -811,7 +801,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
pRxBD->status |= RX_BD_E;
/*
* Move the current buffer from the beginning to the end of the
* Move the current buffer from the beginning to the end of the
* Rx ring queue
*/
cur_nbuf = nbuf_remove(NBUF_RX_RING);
@@ -851,28 +841,22 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
{
uint32_t initiator;
int channel;
int result;
void fec0_tx_frame(void);
void fec1_tx_frame(void);
#ifdef DBG_FEC
int res;
#endif
/*
* Make the initiator assignment
*/
#ifdef DBG_FEC
res =
#else
(void)
#endif
dma_set_initiator(DMA_FEC_TX(ch));
dbg("dma_set_initiator(%d) = %d\r\n", ch, res);
res = dma_set_initiator(DMA_FEC_TX(ch));
dbg("%s: dma_set_initiator(%d) = %d\r\n", __FUNCTION__, ch, res);
/*
* Grab the initiator number
*/
initiator = dma_get_initiator(DMA_FEC_TX(ch));
dbg("dma_get_initiator(%d) = %d\r\n", ch, initiator);
dbg("%s: dma_get_initiator(%d) = %d\r\n", __FUNCTION__, ch, initiator);
/*
@@ -881,7 +865,7 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
*/
channel = dma_set_channel(DMA_FEC_TX(ch),
(ch == 0) ? fec0_tx_frame : fec1_tx_frame);
dbg("dma_set_channel(%d, ...) = %d\r\n", ch, channel);
dbg("%s: dma_set_channel(%d, ...) = %d\r\n", __FUNCTION__, ch, channel);
/*
* Start the Tx DMA task
@@ -895,18 +879,18 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
0,
initiator,
FECTX_DMA_PRI(ch),
0
| MCD_FECTX_DMA
0
| MCD_FECTX_DMA
| MCD_INTERRUPT
| MCD_TT_FLAGS_CW
| MCD_TT_FLAGS_CW
| MCD_TT_FLAGS_RL
| MCD_TT_FLAGS_SP
,
0
0
| MCD_NO_CSUM
| MCD_NO_BYTE_SWAP
);
dbg("DMA tx task started\r\n");
dbg("%s: DMA tx task started\r\n", __FUNCTION__);
}
/*
@@ -929,13 +913,14 @@ void fec_tx_continue(uint8_t ch)
* selected FEC
*/
channel = dma_get_channel(DMA_FEC_TX(ch));
dbg("dma_get_channel(DMA_FEC_TX(%d)) = %d\r\n", ch, channel);
dbg("%s: dma_get_channel(DMA_FEC_TX(%d)) = %d\r\n",
__FUNCTION__, ch, channel);
/*
* Continue/restart the DMA task
*/
MCD_continDma(channel);
dbg("DMA TX task continue\r\n");
dbg("%s: DMA TX task continue\r\n", __FUNCTION__);
}
/*
@@ -982,9 +967,9 @@ void fec_tx_stop(uint8_t ch)
/* Kill the FEC Tx DMA task */
MCD_killDma(channel);
/*
* Free up the FEC requestor from the software maintained
* initiator list
/*
* Free up the FEC requestor from the software maintained
* initiator list
*/
dma_free_initiator(DMA_FEC_TX(ch));
@@ -996,7 +981,7 @@ void fec_tx_stop(uint8_t ch)
}
/*
* Trasmit Frame interrupt handler - this handler is called by the
* Trasmit Frame interrupt handler - this handler is called by the
* DMA interrupt handler indicating that a packet was successfully
* transferred to the Tx FIFO.
*
@@ -1009,7 +994,7 @@ void fec_tx_frame(uint8_t ch)
NBUF *pNbuf;
bool is_empty = true;
dbg("\r\n");
dbg("%s:\r\n", __FUNCTION__);
while ((pTxBD = fecbd_tx_free(ch)) != NULL)
{
fec_log[ch].dtxf++;
@@ -1023,7 +1008,7 @@ void fec_tx_frame(uint8_t ch)
* Free up the network buffer that was just transmitted
*/
nbuf_free(pNbuf);
dbg("free buffer %p from TX ring\r\n", pNbuf);
dbg("%s: free buffer %p from TX ring\r\n", __FUNCTION__, pNbuf);
/*
* Re-initialize the Tx BD
@@ -1032,9 +1017,9 @@ void fec_tx_frame(uint8_t ch)
pTxBD->length = 0;
is_empty = false;
}
}
if (is_empty)
dbg("transmit queue was empty!\r\n");
dbg("%s: transmit queue was empty!\r\n", __FUNCTION__);
}
void fec0_tx_frame(void)
@@ -1057,7 +1042,7 @@ void fec1_tx_frame(void)
* dst Destination MAC Address
* src Source MAC Address
* type Ethernet Frame Type
* length Number of bytes to be transmitted (doesn't include type,
* length Number of bytes to be transmitted (doesn't include type,
* src, or dest byte count)
* pkt Pointer packet network buffer
*
@@ -1072,14 +1057,14 @@ int fec_send(uint8_t ch, NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NB
/* Check the length */
if ((nbuf->length + ETH_HDR_LEN) > ETH_MTU)
{
dbg("nbuf->length (%d) + ETH_HDR_LEN (%d) exceeds ETH_MTU (%d)\r\n",
nbuf->length, ETH_HDR_LEN, ETH_MTU);
dbg("%s: nbuf->length (%d) + ETH_HDR_LEN (%d) exceeds ETH_MTU (%d)\r\n",
__FUNCTION__, nbuf->length, ETH_HDR_LEN, ETH_MTU);
return 0;
}
/*
* Copy the destination address, source address, and Ethernet
* type into the packet
/*
* Copy the destination address, source address, and Ethernet
* type into the packet
*/
memcpy(&nbuf->data[0], dst, 6);
memcpy(&nbuf->data[6], src, 6);
@@ -1095,7 +1080,7 @@ int fec_send(uint8_t ch, NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NB
*/
nbuf_add(NBUF_TX_RING, nbuf);
/*
/*
* Setup the buffer descriptor for transmission
*/
pTxBD->data = nbuf->data;
@@ -1205,7 +1190,7 @@ static void fec_irq_handler(uint8_t ch)
event = eir & MCF_FEC_EIMR(ch);
if (event != eir)
dbg("pending but not enabled: 0x%08x\r\n", (event ^ eir));
dbg("%s: pending but not enabled: 0x%08x\r\n", __FUNCTION__, (event ^ eir));
/*
* Clear the event(s) in the EIR immediately
@@ -1216,8 +1201,8 @@ static void fec_irq_handler(uint8_t ch)
{
fec_log[ch].total++;
fec_log[ch].rferr++;
dbg("RFERR\r\n");
dbg("FECRFSR%d = 0x%08x\r\n", ch, MCF_FEC_FECRFSR(ch));
dbg("%s: RFERR\r\n", __FUNCTION__);
dbg("%s: FECRFSR%d = 0x%08x\r\n", __FUNCTION__, ch, MCF_FEC_FECRFSR(ch));
//fec_eth_stop(ch);
}
@@ -1225,14 +1210,14 @@ static void fec_irq_handler(uint8_t ch)
{
fec_log[ch].total++;
fec_log[ch].xferr++;
dbg("XFERR\r\n");
dbg("%s: XFERR\r\n", __FUNCTION__);
}
if (event & MCF_FEC_EIR_XFUN)
{
fec_log[ch].total++;
fec_log[ch].xfun++;
dbg("XFUN\r\n");
dbg("%s: XFUN\r\n", __FUNCTION__);
//fec_eth_stop(ch);
}
@@ -1240,54 +1225,54 @@ static void fec_irq_handler(uint8_t ch)
{
fec_log[ch].total++;
fec_log[ch].rl++;
dbg("RL\r\n");
dbg("%s: RL\r\n", __FUNCTION__);
}
if (event & MCF_FEC_EIR_LC)
{
fec_log[ch].total++;
fec_log[ch].lc++;
dbg("LC\r\n");
dbg("%s: LC\r\n", __FUNCTION__);
}
if (event & MCF_FEC_EIR_MII)
{
fec_log[ch].mii++;
dbg("MII\r\n");
dbg("%s: MII\r\n", __FUNCTION__);
}
if (event & MCF_FEC_EIR_TXF)
{
fec_log[ch].txf++;
dbg("TXF\r\n");
dbg("%s: TXF\r\n", __FUNCTION__);
fec_log_dump(0);
}
if (event & MCF_FEC_EIR_GRA)
{
fec_log[ch].gra++;
dbg("GRA\r\n");
dbg("%s: GRA\r\n", __FUNCTION__);
}
if (event & MCF_FEC_EIR_BABT)
{
fec_log[ch].total++;
fec_log[ch].babt++;
dbg("BABT\r\n");
dbg("%s: BABT\r\n", __FUNCTION__);
}
if (event & MCF_FEC_EIR_BABR)
{
fec_log[ch].total++;
fec_log[ch].babr++;
dbg("BABR\r\n");
dbg("%s: BABR\r\n", __FUNCTION__);
}
if (event & MCF_FEC_EIR_HBERR)
{
fec_log[ch].total++;
fec_log[ch].hberr++;
dbg("HBERR\r\n");
dbg("%s: HBERR\r\n", __FUNCTION__);
}
}
@@ -1297,7 +1282,7 @@ static void fec_irq_handler(uint8_t ch)
*/
int fec0_interrupt_handler(void* arg1, void* arg2)
{
(void) arg1; /* not used */
(void) arg1;
(void) arg2;
fec_irq_handler(0);
@@ -1307,7 +1292,7 @@ int fec0_interrupt_handler(void* arg1, void* arg2)
int fec1_interrupt_handler(void* arg1, void* arg2)
{
(void) arg1; /* not used */
(void) arg1;
(void) arg2;
fec_irq_handler(1);
@@ -1357,9 +1342,9 @@ void fec_eth_setup(uint8_t ch, uint8_t trcvr, uint8_t speed, uint8_t duplex, con
*/
#if defined(MACHINE_FIREBEE)
if (am79c874_init(0, 0, speed, duplex))
dbg("PHY init completed\r\n");
dbg("%s: PHY init completed\r\n", __FUNCTION__);
else
dbg("PHY init failed\r\n");
dbg("%s: PHY init failed\r\n", __FUNCTION__);
#elif defined(MACHINE_M548X)
bcm_5222_init(0, 0, speed, duplex);
#else
@@ -1412,7 +1397,7 @@ void fec_eth_stop(uint8_t ch)
*/
level = set_ipl(7);
dbg("fec %d stopped\r\n", ch);
dbg("%s: fec %d stopped\r\n", __FUNCTION__, ch);
/*
* Gracefully disable the receiver and transmitter
*/
@@ -1434,12 +1419,12 @@ void fec_eth_stop(uint8_t ch)
fec_log_dump(ch);
#endif
/*
/*
* Flush the network buffers
*/
nbuf_flush();
/*
/*
* Restore interrupt level
*/
set_ipl(level);

16
net/fecbd.c
View File

@@ -11,7 +11,7 @@
#include "bas_printf.h"
#include <stddef.h>
#define DBG_FECBD
//#define DBG_FECBD
#ifdef DBG_FECBD
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else
@@ -31,14 +31,14 @@
*
*/
static FECBD unaligned_bds[(2 * NRXBD) + (2 * NTXBD) + 1];
FECBD unaligned_bds[(2 * NRXBD) + (2 * NTXBD) + 1];
/*
* These pointers are used to reference into the chunck of data set
* aside for buffer descriptors
*/
static FECBD *RxBD;
static FECBD *TxBD;
FECBD *RxBD;
FECBD *TxBD;
/*
* Macros to easier access to the BD ring
@@ -65,7 +65,7 @@ void fecbd_init(uint8_t ch)
NBUF *nbuf;
int i;
dbg("\r\n");
dbg("%s:\r\n", __FUNCTION__);
/*
* Align Buffer Descriptors to 4-byte boundary
@@ -73,7 +73,7 @@ void fecbd_init(uint8_t ch)
RxBD = (FECBD *)(((int) unaligned_bds + 3) & 0xFFFFFFFC);
TxBD = (FECBD *)((int) RxBD + (sizeof(FECBD) * 2 * NRXBD));
dbg("initialise RX buffer descriptor ring\r\n");
dbg("%s: initialise RX buffer descriptor ring\r\n", __FUNCTION__);
/*
* Initialize the Rx Buffer Descriptor ring
@@ -84,7 +84,7 @@ void fecbd_init(uint8_t ch)
nbuf = nbuf_alloc();
if (nbuf == NULL)
{
dbg("could not allocate network buffer\r\n");
dbg("%s: could not allocate network buffer\r\n", __FUNCTION__);
return;
}
@@ -102,7 +102,7 @@ void fecbd_init(uint8_t ch)
*/
RxBD(ch, i - 1).status |= RX_BD_W;
dbg("initialise TX buffer descriptor ring\r\n");
dbg("%s: initialise TX buffer descriptor ring\r\n", __FUNCTION__);
/*
* Initialize the Tx Buffer Descriptor ring

26
net/ip.c
View File

@@ -7,15 +7,13 @@
* Modifications:
*/
#include "net.h"
#include "bas_printf.h"
#include "bas_string.h"
#include <stdint.h>
#include <stddef.h>
#define IP_DEBUG
//#define IP_DEBUG
#if defined(IP_DEBUG)
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif
@@ -44,7 +42,7 @@ uint8_t *ip_get_myip(IP_INFO *info)
{
return (uint8_t *) &info->myip[0];
}
dbg("info is NULL!\n\t");
dbg("%s: info is NULL!\n\t", __FUNCTION__);
return 0;
}
@@ -74,9 +72,9 @@ uint8_t *ip_resolve_route(NIF *nif, IP_ADDR_P destip)
info = nif_get_protocol_info(nif, ETH_FRM_IP);
if (memcmp(destip, bc, 4) == 0)
if (memcmp(destip, bc) == 0)
{
dbg("destip is broadcast address, no gateway needed\r\n");
dbg("%s: destip is broadcast address, no gateway needed\r\n", __FUNCTION__);
return destip;
}
@@ -170,7 +168,7 @@ int ip_send(NIF *nif, uint8_t *dest, uint8_t *src, uint8_t protocol, NBUF *pNbuf
route = ip_resolve_route(nif, dest);
if (route == NULL)
{
dbg("Unable to locate %d.%d.%d.%d\r\n",
dbg("%s: Unable to locate %d.%d.%d.%d\r\n", __FUNCTION__,
dest[0], dest[1], dest[2], dest[3]);
return 0;
}
@@ -178,9 +176,9 @@ int ip_send(NIF *nif, uint8_t *dest, uint8_t *src, uint8_t protocol, NBUF *pNbuf
else
{
route = bc;
dbg("route = broadcast\r\n");
dbg("nif = %p\r\n", nif);
dbg("nif->send = %p\r\n", nif->send);
dbg("%s: route = broadcast\r\n", __FUNCTION__);
dbg("%s: nif = %p\r\n", __FUNCTION__, nif);
dbg("%s: nif->send = %p\r\n", __FUNCTION__, nif->send);
}
return nif->send(nif, route, &nif->hwa[0], ETH_FRM_IP, pNbuf);
@@ -282,7 +280,7 @@ void ip_handler(NIF *nif, NBUF *pNbuf)
*/
ip_frame_hdr *ipframe;
dbg("packet received\r\n");
dbg("%s: packet received\r\n", __FUNCTION__);
ipframe = (ip_frame_hdr *) &pNbuf->data[pNbuf->offset];
@@ -291,8 +289,6 @@ void ip_handler(NIF *nif, NBUF *pNbuf)
*/
if (!validate_ip_hdr(nif, ipframe))
{
dbg("not a valid IP packet!\r\n");
nbuf_free(pNbuf);
return;
}
@@ -312,8 +308,6 @@ void ip_handler(NIF *nif, NBUF *pNbuf)
udp_handler(nif,pNbuf);
break;
default:
dbg("no protocol handler registered for protocol %d\r\n",
__FUNCTION__, IP_PROTOCOL(ipframe));
nbuf_free(pNbuf);
break;
}

5
net/net_timer.c
View File

@@ -24,8 +24,6 @@
#include "firebee.h"
#elif defined(MACHINE_M5484LITE)
#include "m5484l.h"
#elif defined(MACHINE_M54455)
#include "m54455.h"
#else
#error unknown machine!
#endif
@@ -154,7 +152,8 @@ bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri)
/*
* Register the timer interrupt handler
*/
if (!isr_register_handler(TIMER_VECTOR(ch),
if (!isr_register_handler(ISR_DBUG_ISR,
TIMER_VECTOR(ch),
(int (*)(void *,void *)) timer_default_isr,
NULL,
(void *) &net_timer[ch])

5
net/udp.c
View File

@@ -39,7 +39,6 @@ void udp_init(void)
for (index = 0; index < UDP_MAX_PORTS; ++index)
{
udp_port_table[index].port = 0;
udp_port_table[index].handler = 0;
}
udp_port = DEFAULT_UDP_PORT; /* next free port */
@@ -89,7 +88,7 @@ static void *udp_port_handler(uint16_t port)
{
if (udp_port_table[index].port == port)
{
return (void *) udp_port_table[index].handler;
return (void *)udp_port_table[index].handler;
}
}
return NULL;
@@ -117,7 +116,7 @@ int udp_send(NIF *nif, uint8_t *dest, int sport, int dport, NBUF *pNbuf)
}
/*
* This function takes data, creates a UDP frame from it and
* This function takes data and creates a UDP frame and
* passes it onto the IP layer
*/
udp_frame_hdr *udpframe;