Initial checkin of DSP 56k VHDL code.

This commit is contained in:
Matthias Alles
2010-11-02 07:29:43 +00:00
parent ebdb8e0d71
commit af014dc0d6
56 changed files with 7279 additions and 0 deletions

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clr a
move #$000001,a1
tst a
rep #$2F
norm R3,a
clr a
move #$FF0000,a
move #$84,a2
tst a
rep #$2F
norm R1,a
clr a
rep #$2F
norm R2,a