Initial checkin of DSP 56k VHDL code.

This commit is contained in:
Matthias Alles
2010-11-02 07:29:43 +00:00
parent ebdb8e0d71
commit af014dc0d6
56 changed files with 7279 additions and 0 deletions

View File

@@ -0,0 +1,17 @@
andi #$00,CCR
clr a
move #$100000,a
move #>$123456,x0
move #>$123456,y0
macr x0,y0,a
move #$100001,a
move #>$123456,x0
move #>$123456,y0
macr x0,y0,a
move #$100000,a
move #$800000,a0
move #>$123456,x0
move #>$123456,y0
macr x0,y0,a