Initial checkin of DSP 56k VHDL code.

This commit is contained in:
Matthias Alles
2010-11-02 07:29:43 +00:00
parent ebdb8e0d71
commit af014dc0d6
56 changed files with 7279 additions and 0 deletions

View File

@@ -0,0 +1,17 @@
andi #$00,CCR
clr a
move #$80,a2
move #>0.25,x0
move #>0.50,y0
mac -x0,y0,a
move #>-0.25,x0
move #>-0.55,y0
mac x0,y0,a
move #>-0.20,x0
move #>+0.55,y0
mac x0,y0,a
move #>-0.20,x0
move #>+0.55,y0
mac -x0,y0,a