Initial checkin of DSP 56k VHDL code.

This commit is contained in:
Matthias Alles
2010-11-02 07:29:43 +00:00
parent ebdb8e0d71
commit af014dc0d6
56 changed files with 7279 additions and 0 deletions

View File

@@ -0,0 +1,8 @@
; move #>0,y0
; move #>1,y1
clr b
move #>$A5,b0
move #>$A5,b1
move #>$A5,b2
andi #$00,ccr
asl b