Initial checkin of DSP 56k VHDL code.
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12
vhdl/dsp56k/asm/test_alu/test_and.asm
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12
vhdl/dsp56k/asm/test_alu/test_and.asm
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move #>$000FFF,y0
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move #>$FFFFFF,b
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andi #$00,ccr
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and y0,b
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move #>$FFF000,y0
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move #>$FFFFFF,b
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andi #$00,ccr
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and y0,b
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move #>$000000,y0
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move #>$FFFFFF,b
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andi #$00,ccr
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and y0,b
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