Initial checkin of DSP 56k VHDL code.

This commit is contained in:
Matthias Alles
2010-11-02 07:29:43 +00:00
parent ebdb8e0d71
commit af014dc0d6
56 changed files with 7279 additions and 0 deletions

View File

@@ -0,0 +1,9 @@
move #>$55,a
clr b
move #>$55,b0
andi #$00,ccr
addr a,b
move #>$AA,a
addr a,b
move #>$80,b2
addr a,b